OPEN ENDED EXPERIMENT

DIGITAL ELECTRONICS (ECE 205)

TO CONSTRUCT A 16 x 1 MULTIPLEXER USING TWO 8 x 1
MULTIPLEXERS AND ONE 2 x 1 MULTIPLEXER

Submitted To – Submitted By -
Dr. Pradeep Kumar Vikram Singh
Department of Electronics & Communication Engineering (A2305116061)
Amity School of Engineering & Technology P. Uday Ashish
Amity University Uttar Pradesh (A2305116072)

Rishi Deb
(A2305116073)

Department of Electronics & Communication Engineering

Amity School of Engineering & Technology
Amity University Uttar Pradesh
 TABLE OF CONTENT
Title Page No.
Aim 1
Components required 1
Theory 1 -6
Implementation 7-8
Observation 9-10
Result 11
Conclusion 11
 List of Figures
Name Page No.
Pin out diagram of a multiplexer 1

Block diagram & logic diagram of 2x1 mux 2

Block diagram & logic diagram of 4x1 mux 3

Block diagram & logic diagram of 8x1 mux 4

Block diagram & logic diagram of 16x1 mux 5

Implementation of 16x1 mux using 8x1 mux & 2x1 mux 7

Implementation of 16x1 mux using 8x1 mux & 8

logic gates
AIM: - To construct a 16 x 1 multiplexer using two 8 x 1 multiplexers and one 2 x 1 multiplexer.

COMPONENTS REQUIRED: -
1. 8 x 1 multiplexer, IC no. – 74151
2. For 2 x 1 multiplexer -
MUX IC no. – 74158
OR
AND gate (IC no. – 7408), NOT gate (IC no. – 7404) & OR gate (IC no. – 7432)
3. Breadboard
4. Connecting wires

THEORY: -
Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection lines and
single output. One of these data inputs will be connected to the output based on the values of
selection lines. Since there are ‘n’ selection lines, there will be 2n possible combinations of zeros
and ones. So, each combination will select only one data input.
Multiplexers are used in various applications where multiple-data is needed to be transmitted by
using single line, for example in communication system, computer memory, transmission between
satellites etc.
Multiplexers are capable of handling both analog and digital applications. In analog applications,
multiplexers are made up of relays and transistor switches, whereas in digital applications, the
multiplexers are built from standard logic gates. Following figure shows the general idea of a
multiplexer with n input signal, m control signals and one output signal.

n
Fig. 1: - Pinout Diagram of a multiplexer

1
Types of Multiplexers: -
Multiplexer are commonly classified into the following four types: -
1) 2 x 1 Multiplexer: -
In this Mux there are 2 input lines and 1 selection line. Fig. 2 shows the block diagram & logic
diagram of 2 x 1 mux. The IC no. of 2 x 1 mux is 74158.

I0 I0
I0 I0
I0
2x1 Y 0

I01 MUX

I1
I0

Fig. 2: - Block diagram & Logic diagram of 2 x 1 mux

Table No. 1: - Truth table for 2x1 Mux

INPUT OUTPUT
S Y
Logic function: -
0 I0
Y = I0S’ + I1S

1 I1

2
2) 4 x 1 Multiplexer: -
In this Mux there are 4 input lines and 2 selection lines. Fig. 3 shows the block diagram &
logic diagram of 4 x 1 mux. The IC no. of 4 x 1 mux is 74153.

S1 S0

I0

I1 Y I0

I2
I1 Y
I3
I2

S0 S1 I3

Fig. 3: - Block diagram & Logic diagram of 4 x 1 mux

Table No. 2: - Truth table for 4x1 mux

Input Input Output
S0 S1

0 0 I0

0 1 I1
Logic function: -
1 0 I2
Y = I0S0’S’1 + I1S1S0’ + I2S0S1’ + I3S1S0
1 1 I3

3
3) 8 x 1 Multiplexer: -
In this Mux there are 8 input lines and 3 selection lines. Fig. 4 shows the block diagram & logic
diagram of 8 x 1 mux. The IC no. of 8 x 1 mux is 74153.

S2 S1 S0

I1

I7

Fig. 4: - Block diagram & Logic diagram of 8 x 1 mux

Table No. 3: - Truth table for 8x1 mux

Input Input Input Output
S2 S1 S0 Y

0 0 0 I0

0 0 1 I1

0 1 0 I2

0 1 1 I3

1 0 0 I4

1 0 1 Logic function: -
I5
Y = I0S0’S’1S’2+I1S0S’1S2’+I2S0’S1S’2+I3S0S1S’2 +
1 1 0 I6 I I4S0’S’1S2+I5S0S’1S2+I6S0’S1S2+I7S0S1S2
1 1 1 I7

4
 4) 16x 1 Multiplexer: -
In this Mux there are 16 input lines and 4 selection lines. Fig. 5shows the block diagram &
circuit diagram of 16 x 1 mux. The IC no. of 16 x 1 mux is 74150.

I0 : S3 S2 S1 S0
:
:
:
:
16 x 1 I0
I5 : Y :
: MUX :
:
: :
:
: Y
: :
: :
:
: :
:
:
:
I15 :
:
:
:
:
:

S3 S2 S1 S0 I15

Fig. 5: - Block diagram & Logic diagram of 16 x 1 mux

5
 Table No. 4: - Truth table for 16 x 1 mux

Input Input Input Input Output

S3 S3 S3 S3 Y

0 0 0 0 I0

0 0 0 1 I1

0 0 1 0 I2

0 0 1 1 I3

0 1 0 0 I4

0 1 0 1 I5

0 1 1 0 I6

0 1 1 1 I7

1 0 0 0 I8

1 0 0 1 I9

1 0 1 0 I10

1 0 1 1 I11

1 1 0 0 I12

1 1 0 1 I13

1 1 1 0 I14

1 1 1 1 I15

Logic function: -

Y = I0S0’S1’S2’S3’+ I1S0S1’S2’S3’+ I2S0’S1S2’S3’+ I3S0S1S2’S3’+ I4S0’S1’S2S3’+ I5S0S1’S2S3’+ I6S0’S1S2S3’+

I7S0S1S2S3’+ I8S0’S1’S2’S3+ I9S0S1’S2’S3+ I10S0’S1S2’S3+ I11S0S1S2’S3+ I12S0’S1’S2S3+ I13S0S1’S2S3+
I14S0S1S2S3+ I15S0S1S2S3

6
Implementation of 16x1 mux using 8x1 mux and 2x1 mux: -

For constructing a 16x1 mux, we’ll use two 8x1 mux which will give us the required 16 inputs and
the selection lines of both are made common which will give us 3 of the 4 required selection lines,
and for the 4th selection line the 2x1 mux will be used. The outputs of the previous 2 mux will act
as input for the 2x1 mux.
Thus, this circuit can be used to produce the output of a 16x1 mux.

I0
I1
I2 Y1
I3
I4
I5
I6
I7

I8
I9
I10 S3
I11
I12
Y2
I13
I14
I15

S2 S1 S0

Fig. 6: - Implementation of 16x1 mux using 8x1 mux and 2x1 mux

7
 Implementation of 16x1 mux using 8x1 mux and logic gates (for 2x1 mux): -
For constructing a 16x1 mux, we’ll use two 8x1 mux which will give us the required 16 inputs and
the selection lines of both are made common which will give us 3 of the 4 required selection lines,
and for the 4th selection line the 2x1 mux will be used. The outputs of the previous 2 mux will act
as input for the 2x1 mux.
Thus, this circuit can be used to produce the output of a 16x1 mux.

I0
I1
I2
I3
I4 2 x 1 MUX
I5
I6
I7 S

I8
I9
I10
I11
I12
I13
I14
I15

Fig. 7 : - Implementation of 16x1 mux using 8x1 mux and logic gates(for x1)

8
OBSERVATIONS

Table No. 5: - Observation table

Switch 1 Switch 2 Switch 3 Switch 4 Output

Off Off Off Off I0

Off Off Off On I1

Off Off On Off I2

Off Off On On I3

Off On Off Off I4

Off On Off On I5

Off On On Off I6

Off On On On I7

On Off Off Off I8

On Off Off On I9

On Off On Off I10

On Off On On I11

On On Off Off I12

On On Off On I13

On On On Off I14

On On On On I15

9
RESULT: -
The implementation of 16 x 1 multiplexer using 8 x 1 multiplexer and 2 x 1 multiplexer has been
done, and the truth table of 16 x 1 multiplexer has been verified.

CONCLUSION: -
By performing this experiment, we come to the conclusion that a multiplexer with n numbers of
inputs can be implemented by other multiplexers which have lesser number of inputs than the
required one.

11