Nokia Customer Care

Service Manual

RM-325 (Nokia 6600 fold)

Schematics
Part No: (Issue 1)

COMPANY CONFIDENTIAL

Copyright © 2008 Nokia. All rights reserved.

 1 2 3 4 5 6

Grounding spring

E2002 E2003 E2004 E2005

X2011 X2012 X2013 E2006

CAMERA
9901956 9903139
6400184 6400184 9902886 9902885 9902887 9902888
schematic
GND GND GND GND GND GND GND GND
C-cover SIM frame SIM frame Keypad GEN_CTRL_CMT(20:0)
EMA
Double Grounding spring CCP_CMT(3:0)

X2010 SPI_CMT(3:0)

A CAM_CTRL_CMT(6:0) A
6400183

GND CAMERA_BTB(8:0)
SIM frame
MAIN_CAMERA_CONN(16:1) MAIN_CAMERA_CONN(16:1)
SYS_CONN Engine
I2C(1:0) FLASH_CONN(2:1) FLASH_CONN(2:1)
schematic schematic
3300-3399
USB_ACI(7:0) USB_ACI(7:0) CCP_CMT(3:0)

USB_CTRL_CMT(2:0) USB_CTRL_CMT(2:0) SPI_CMT(3:0)

CHARGER CHARGER CAM_CTRL_CMT(6:0)

LPRF
I2C(1:0)
schematic

PUSL(7:0) FM_ANT

XAUDIO(5:0) XAUDIO(5:0) I2C(1:0)

FM_ANT AUDIO(6:0)

SLOWAD(6:0) PUSL(7:0) PUSL(7:0)

2000-2059
PCM(3:0) PCM(3:0)

LPRF_CMT(6:0) LPRF_CMT(6:0)
PROD_TEST_PATTERN

LPRFCLK LPRFCLK_I
7pin_dct5
GEN_CTRL_CMT(20:0)
USB_ACI(7:0)
6000-6099

B B
2060-2069

TOP_FLEX_CONN

schematic
TOP_FLEX_CONN(52:1) TOP_FLEX_CONN(52:1)
BATTERY_CONN

AUDIO_BTB(8:0)
schematic

DISPLAY_BTB(25:0)
SLOWAD(6:0) SLOWAD(6:0)
CAMERA_BTB(8:0)

I2C(1:0)

GEN_CTRL_CMT(20:0) GEN_CTRL_CMT(20:0)
2070-2079

UI_BTB(5:0)
3500-3549

Audio

schematic SIM
XAUDIO(5:0)
schematic

AUDIO(6:0) AUDIO(6:0)
SIM(6:0) SIMIF(6:0)
GEN_CTRL_CMT(20:0)

C DIG_AUDIO(5:0) DIG_AUDIO(5:0) C

2700-2799
H_BRIDGE(3:0) H_BRIDGE(3:0)
IHF_CONN(2:1) IHF_CONN(2:1)
AUDIO_BTB(8:0)

2100-2169 MMC-SD-card

schematic

UI

MMC_CMT(15:0) MMC_CMT(15:0)
schematic
MESSI_CMT(25:0) MESSI_CMT(25:0)

I2C(1:0) I2C(1:0)

4800-4899
PUSL(7:0)

KEYB_CMT(20:0) KEYB_CMT(20:0)
EMU_RAP
PwrOnx PwrOnX

schematic
GEN_CTRL_CMT(20:0)
2200-2399
2800-2899
DISPLAY_BTB(25:0) JTAG(6:0) JTAG(6:0)
2900-2999
7500-7599
UI_BTB(5:0) ETM(16:0) ETM(16:0)
7800-7899
2400-2499

3100-3199

D D

Name Appr
Top Sheet dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

Dynamo DC-Charger (2mm)

Production Test
Z2000 F2000 E2000 (For carbon TP: 2 pcs) X2000
J2000 900X910|1.3_CARBON 1
CHARGER

NOT_ASSEMBLED
J2001 900X910|1.3_CARBON 2

ESDA18-1F2
2.0A

A1
A2
100nF 9900505
5119045 5469849

2320546

2351053

4129259
C2001

C2002

R2000
3200015

470n
R2001

27p
NOT_ASSEMBLED

B1
B2
E2001
1M

1430014
R2002
VBUS connect from here to Betty 1430014

1M
Internal VBUS N2000

2320143
C2022

External VBUS
FAN5665UCX 9900505

220n
VBAT VBUS VBAT

MA26111009JN
Wake-up Logic A3 EN C1+ B1
Pick and place pads

Assemble if EMC problem

GND

4111187
A B3 VIN C1- A1 A

V2001

NOT_ASSEMBLED
GND

1419087
C1 VOUT C2+ C2

R2003
A2 C3

1k
N2005 N2006 GND C2-

2351075

2316001

2316001

2320143
C2005

C2004

C2006

C2003
SN0703023 STM1066

100n

220n
2u2

2u2
4341629
VIO B1 EN VIN A1 A1 VIN EN B1 VIO
GND
B2 INH OUT A2 A2 OUT INH B2
GND GND GND
Not used in Shelby Not used in Shelby
D1 PKX POX D2 C2 VCC GND C1
dangle dangle
4341716|ALT

2351104
C2025
C1 GND VCC C2 R2020

2u2
GND SLOWAD(6:0)
LST 6
MUST place very near E2 pad

share footprint with C2010

4341919
GND NOT_ASSEMBLED 1M

SMB_USB_BOM
1430014

TI_USB_BOM
8-pin Tigger for space reserve on PCB GND

1410024
R2021
2351061

2351029

2322231
220k
C2010

C2910

C2023
R2004

10u

1u0

1n
VBAT 0R068
1445348|1.5A N2001
L2099 TI_USB_BOM C2008 BQ24150
PCB: Max current 1A 1 CURRENT 4 PCB: Max current 1A L2000 A3 A1 GND GND PCB: Max current 1A GND GND

SMB_USB_BOM
BOOT DCIN
SENSE B1 A2
220R/100MHz 1uH MID DCIN

2351075

2351061

share footprint with C2014

10n

C2011

C2012
3203771 2 3 3649176 B2

100n
MID

10u
2351032

2320125
C20xx
B3 E3

SMB_USB_BOM
MID VDDCAP

1u0

TI_USB_BOM
C1 SW AUXPWR E2

2351009

2351029

2351050
C2015

C2014

C2914
C2 SW

1u0

1u0

4u7
GND C3 B4 I2C0_SDA 1
SW SDA
GND A4 I2C0_SCL 0
Add an extra CAP if R2004 SCL
E1 CSIN
is far away from C2010

share footprint with C2016

E4 D4 GND
CSOUT OTG

PCB: Max current 1A

C4

SMB_USB_BOM
STAT

TI_USB_BOM
D1 PGND Summit USB BOM TI USB BOM

2351029

2351050
C2916

C2016
D2 PGND SGND D3

1u0

4u7
4341803 4341805
4341805 N2001
DC/DC CONV SMB138C 19WLCSP DC/DC CONV Bq24150 WLCSP20
B GND 1445348 B
R2004 Not Assembled
CHIPRES 0W125 0R068 F 0402
C2010 2351029 2351061
GND C2910 CHIPCAP X5R 1U K 25V 0603 CHIPCAP X5R 10UF K 6V3 0603
USB_CTRL_CMT(2:0)
2351061
C2012 Not Assembled
CHIPCAP X5R 10UF K 6V3 0603
0 USBChargStatus C2014 2351050 2351029
(GenIO43) C2914 CHIPCAP X5R 4U7 K 6V3 0603 CHIPCAP X5R 1U K 25V 0603
C2016 2351029 2351050
C2916 CHIPCAP X5R 1U K 25V 0603 CHIPCAP X5R 4U7 K 6V3 0603
I2C(1:0)
Do NOT use 2320505 for 2351050

VIO
N2002 R2007

A4 SPKR_R A1

2351075
/MIC SERVICE_N 1k

C2018
A3

100n
SPKR_L 1419087

External VBUS
Over-Voltage Protection
E2
dangle C_B
E3 E5
dangle C_A VBUS GND
E1
CPGND
C5 ID
GND B1 ID
1 USBOTGIntN
INT_N
(GenIO44) 0 PURX C2 C4
RESET_N CR_INT
PUSL(7:0)
1 I2C0_SDA D2 D4
SDA DP
0 I2C0_SCL D3 D5
SCL DM
VIO VBAT Z2009 F2001
C1 C3 PCB: Max current 1A
ADR/PSW AGND

NOT_ASSEMBLED
PCB: route signals together
VIO E4
VCC

IP4385CX4LF
2.0A
1419107

A5 A2

A1
A2
100nF
R2008

dangle 5119045

2322019

4129328
RCV VREG

and keep same length

100k

C2013

R2005
B4 3200015

27p

PCB: Max current 1A

SE0/VM
C B5 D1 C
DAT/VP VCC(I/O)

B1
B2
B3
OE_N/INT_N

2351075

2351075

2351075
GND
C2021

C2019

C2020
1419107

1419107

B2

100n

100n

100n
R2009

R2010

DGND
100k

100k

GND GND
GND
ISP1302UK
4346975 GND GND GND GND
GND GND

Place near DM_TXD traces

Place near DP_RXD traces

4 Slave_PU Production Test
(For carbon TP: 2 pcs)
X2001 J2006 900X910|1.3_CARBON

1419117

1419117
R2011

R2012

R2013
33R

33R
EMIF02-USB01F2 External_VBUS 1 J2002 900X910|1.3_CARBON
A3 Slave_PU D- 2 J2003 900X910|1.3_CARBON
R3
1 DP_RXD C3 C1 D+ D+ 3 J2004 900X910|1.3_CARBON
R2
0 DM_TXD E3 E1 D- ID 4 J2005 900X910|1.3_CARBON
R1
A1 USB_GND 5
dangle
ID

1410024
B2 GND

R2015
USB_ACI(7:0)

220k
6
7
8
GND D2 9
GND 10
4129001 11
GND

ID ID GND 5407332

uUSB Connector (AB type)

D D

Name Appr
USB OTG and Charging Interface
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
FM_ANT
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
XAUDIO(5:0)
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

Traceability pad

X2060

5409309

B GND B

BB5.0 have defined 7-pin test pad pattern

USB_ACI(7:0)

J2061
2 RXD2 R2060 1419077 4
10R
8
1 DP_RXD R2061 1419077 3
10R
3 Mbus_CLK R2062 1419077 7 VPP
10R
0 DM_TXD R2063 1419077 2 VBUS
10R
6
1
GND

NOT_ASSEMBLED
5.6V/15V/0.05J
800X488|LINE_CARBON
C3 C1 A3 A1

1825127
R2068
R2064
ESDA14V2-4BF3
4129311
GND
GND
B2

C C
GND

D D

Name Appr
Production test pattern
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

Battery inferface

Test Pads for charger cal.

J2070

9900600

J2071
VBAT Tabby
X2070
1 + 9900600

Change from 1825133 (14V/50V)

2 GND

150u_6V3
2320121

2611822

2320546
C2071

C2070

C2074
3 BSI J2072 900X910|1.9_CARBON

10p

27p
B B
J2073

5.6V/15V/0.05J
5469741
BGND

1825127
R2070
GND GND GND
9900600
GND

GND NOTE !! R2070 IS NEEDED IF VILMA IS FAR FROM BATTERY CONNECTOR !!!
SLOWAD(6:0) PLACE R2070 NEAR BATTERY CONNECTOR !!!
2 BSI
3 BTemp

BTEMP NTC

2320121
C2072
1820061

10p
R2071
2320121
-t

C2073

47k
10p
GND
GND GND

C C

D D

Name Appr
Battery Connector Interface
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

Test Pads

0 MIC2N J2100 900X910|1.9_CARBON

1 MIC2P J2101 900X910|1.9_CARBON J2110 900X910|1.0_CARBON

2 XEARL J2102 900X910|1.9_CARBON

A 3 XEARLC J2103 900X910|1.9_CARBON J2111 900X910|1.0_CARBON A

XAUDIO(5:0)

Microphone Interface

DIG_AUDIO(5:0)

R2100
0 AudioClk

1k
1419087 B2100
31100-3008062
GEN_CTRL_CMT(20:0)
6 GND GND 1
Audio_Clk 5 CLK L/R 2
9 AuxMicData AuxMic_Data 4 OUT VDD 3

2351075
C2100
5140044

100n
GND 5140034 (alt) GND
8 DMIC_En VDD

GND

B B

Vibra

Vibra placed on top board

VBAT

AUDIO_BTB(8:0)
N2100
A1 C3 VIN
10 VibraEn VEN VOUT VIBRA+ 2
LP3985ITLX
BYPASS C1 (not Used) 3
dangle dangle

2351009

2351009
-3.0_NOPB

C2101

C2102
NC A3

1u0

1u0
B2 GND
4341715

GND GND GND

Earpiece
AUDIO(6:0)
0 EARP EarP 0
1 EARN EarN 1

C C

B2100

H_BRIDGE(3:0) IHF
IHF_CONN(2:1)

L2102 X2101
0 HFSPP L2103 1
on top board
220R/100MHz 68nH
3203771 3649003 6443309
L2104 X2102
1 HFSPN L2105 2
220R/100MHz 68nH
2322019

2322019
C2103

C2104

3203771 3649003 6443309

27p0

27p0

To be placed close to IHF

GND GND

To be placed close to Cebbo2S

D D

NOTE: Name Appr

Audio Interface
Copyright (C) Nokia Corporation. All rights reserved.
IHF lines must be wide and low impedance THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

Display

MESSI_CMT(25:0)
HALL SENSOR
DISPLAY_BTB(25:0)
A Z2400 A
EMIF10-LCD02F3
1 D1 A5 Output1 Input1 A2 D1 1 VIO
13 !Reset A4 Output2 Input2 A1 !Reset 13
B5 Output3 Input3 B2 N2400 VAUX
dangle dangle
0 D0 B4 Output4 Input4 B1 D0 0 HED54XXU11 L3502

1430014
R2400

1M
12 D/!C C5 Output5 Input5 C2 D/!C 12 VDD 1
GEN_CTRL_CMT(20:0)
3 D3 C4 Output6 Input6 C1 D3 3 600R/100MHz

2320546
C2400
9 TE Main D5 Output7 Input7 D2 TE Main 9 7 HALL_INT 2 Output GND 3 3203755

27p
D4 Output8 Input8 D1
dangle dangle 4605953
2 D2 E5 Output9 Input9 E2 D2 2
15 !CS Sub E4 E1 !CS Sub 15 GND
Output10 Input10
GND

1419107
A3 GND GND C3

R2401

100k
E3 GND GND D3

4129289
GND GND
GND
Z2401
EMIF10-LCD02F3
14 TE Sub A5 Output1 Input1 A2 TE Sub 14
11 !RD A4 Output2 Input2 A1 !RD 11
KEYBOARD (Single ended)
B5 Output3 Input3 B2
dangle dangle
7 D7 B4 Output4 Input4 B1 D7 7
10 !CS Main C5 Output5 Input5 C2 !CS Main 10
KEYB_CMT(20:0)
6 D6 C4 Output6 Input6 C1 D6 6
5 D5 D5 Output7 Input7 D2 D5 5
D4 Output8 Input8 D1 0 Key_Navigation_Up
dangle dangle
8 !WR E5 Output9 Input9 E2 !WR 8 1 Key_Soft_Left
4 D4 E4 Output10 Input10 E1 D4 4 2 Key_Navigation_Left
Send Left Soft Left Up
A3 GND GND C3
E3 GND GND D3
3 Key_Send S2400 S2401 S2402 S2403
B 4129289 B
800X155|CARBON 800X155|CARBON 800X155|CARBON 800X155|CARBON
GND GND

GND GND GND GND

4 Key_Navigation_Down
5 Key_Soft_Right
6 Key_Navigation_Right

Select Right Soft Right Down

7 Key_Navigation_Select S2404 S2405 S2406 S2407

N2401 VIO 800X155|CARBON 800X155|CARBON 800X155|CARBON 800X155|CARBON
LP5521TMX_NOPB
E4 TRIG EN E2
UI_BTB(5:0) GND GND GND GND
dangle E3 INT SCL D1 I2C0_SCL 0
SDA E1 I2C0_SDA 1
GND EM Switch
1 Alive Light A1 B CLK_32K D3 J2407 SleepClk 1
0 Top Light B1 G 900X910|04S S2409 End
C1 R ADDR_SEL1 B2
ADDR_SEL0 C2 8 Key_EM_Switch 11 2
2
D2 GPO 5200064 PWX 1 S2411
Light dangle PwrOnX

2351025 2351025
B3 GND
C2402

800X155|CARBON
4860039

4860039

0u47
CFLY1N
CL-435

CL-435
V2400

V2401

A2 B4 GND
VOUT CFLY1P 2
CFLY2N A3
GND
C2403

A4
0u47

CFLY2P
2351009
C2404

C3 GND
1u0

11 3
1430718

1430718

D4 GND VDD C4
R2403

R2404
47R

47R

VBAT 10 2
4348448
GND GND 1 2 3

VBAT
GND GND 9 1 S2412 S2413 S2414
2351009
C2406

800X155|CARBON 800X155|CARBON 800X155|CARBON

1u0

C C

GND GND GND GND

Input capacitor shares with C2006 (USB sheet) 8 6
N2402 7 5
PUSL(7:0)
TC35892XBG
GND 4 5 6
0 PURX C1 RESETN PWM0 E4
dangle
D6 EXTIO0 PWM1 F5
I2C(1:0) dangle
PWM2 E5 6 4 S2416 S2417 S2418
1 I2C0_SDA GND E2 SDA IRQN F3 EXT_IOEINT 10 800X155|CARBON 800X155|CARBON 800X155|CARBON
0 I2C0_SCL E1 SCL
KPY0 C6
dangle GND GND GND
NOTE: SleepClk is not needed in FW3 version. D2 XTAL1 KPY1 C5
dangle
In that case connect D2 to GND. D1 XTAL2 KPY2 B6 5 9
dangle dangle
KPY3 B5 9 5 4 8
GND A6 B2 4 6
dangle KPX0 KPY4 7 8 9
A5 KPX1 KPY5 A1 5 7
dangle
F1 KPX2 KPY6 B1 6 8
dangle
0 * F2 KPX3 KPY7 C2 1 9 3 7 S2420 S2421 S2422
1 0 A2 KPX4 KPY8 E3 2 10 800X155|CARBON 800X155|CARBON 800X155|CARBON
2 # B3 KPX5 KPY9 D5 3 11
3 7 A3 KPX6 KPY10 E6
dangle GND GND GND
4 8 B4 KPX7 KPY11 F6
dangle
VIO 2 #
A4 VCC GND C3 1 0
F4 VCC GND C4
* 0 #
GND D3
2351075
C2401

D4
100n

GND
0 * S2424 S2425 S2426
4340748 800X155|CARBON 800X155|CARBON 800X155|CARBON
I2C Address b’1000 011x GND
GND
Internal_key_bus(13:0) GND GND GND

D D

Name Appr
UI Interface
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

Added R3411 to Clk Lores

Removed coils in the supply lines TXVDDA, TXVDDA1, ...(as in Hammer)

VBAT

SI8413DB-T1-E1
Down sized components
4341751: DM5011
4342492: DM500

4210073
N3300

2351061

V3302
C3319
OMAP-DM500

3649178
10u

L3306

2u2H
P4 VD0 DNC A8
dangle
M4 HD0 DNC A9
dangle
P6 A10

D D
PCLK0 DNC dangle V3301
Ok but not required M2 A12 GND

S
COIN9 DNC dangle
N2 COIN8 DNC A13
dangle MA21D34001JN

2351015
C3318

1430084
P3 COIN7 DNC A14

4u7

R3393
dangle GEN_CTRL_CMT(20:0) 4111149

470k
N3 COIN6 DNC B8 N3304

G
dangle
A N4 COIN5 DNC B9 ADP1653ACPZ-R7 C3331 A
dangle I2C(1:0)
L4 COIN4 DNC B10 3 MAGNET_ENABLE (Coil) 15 EN ILED 6
dangle dangle GND
P5 COIN3 DNC B12 0 I2C0_SCL 3 SCL/CTRL1
dangle 10n
N5 COIN2 DNC B13 1 I2C0_SDA 4 SDA/CTRL0 LX 13
dangle 2351032
M5 COIN1 DNC B14 11 _INT R3397
dangle NOT_ASSEMBLED
L5 COIN0 10 INTF OUT 7 J3315 900X910|1.8
DNC C7 J3399 900X910|0.8
dangle

MA21D34001JN
GNDB3 4 MAGNET_STROBE (Coil) GND 16 3k3 J3395 900X910|0.7

1430040
VCAM_1V8 TCK DNC C8 STR HPLED 9

R3396
dangle dangle 1430006

10k

1430084

4111149
D4 TDI DNC C9 VBAT N

R3398

V3300
JULIE dangle dangle

470k
D3 TDO DNC C10 C3329 R3312 1 SETT GND 8 VBAT
JTAG dangle dangle
B2 TRSTN DNC C11 2 SETF PGND 12 J3316 900X910|1.8 S
dangle dangle
J3396 900X910|0.8

1419083

1419083
C2 TMS DNC C12 5 SETI

R3300

R3301
dangle dangle 10n 47k 14 GND GND

4k7

4k7
J3394 900X910|0.7

1410023
A3 C13

GND
TEST DNC VDD

R3315
CAM_CTRL_CMT(6:0) dangle 2351032 1410023

47k
B4 BTSEL DNC C14 5900008 (Black)
dangle 17= GND
6 CAM_RESET J3305 900X910|0_6 5900015 (Purple)

1430056

1430056
B6 RSTNX

R3395

R3394
4348519

15R

15R
0 CAMCLK M1 SYSCLK J3315 & J3316: Pads for ACF Bonding

2351017

2351017
C3339

C3340
3 HOST-TO-CAM_INT (WAKE UP) J3307 900X910|0_6 C4 D14

100n

100n
WAKEUPX/INT0 DNC dangle J3399 & J3396: Pads for Repair Flex
F13 GND
DNC
place near RAP

dangle J3395 & J3394: Pads for measurement

2320121
C3330

0 SDA_LORES M12 SDA0 DNC F14

10p

dangle GND GND

1 SCL_LORES M11 SCL0 DNC G13 V3304 3 OUT
dangle
3 SPI_CS A5 SDEN0 DNC G14
dangle R1
0 SPI_CLK A4 SCLK0 DNC H13 MAGNET_STROBE (Coil) MAGNET_STROBE (Coil) IN
GND dangle
2 SPI_DAO C5 SDI0 DNC H14 1
dangle 4k7
1 SPI_DAIN B5 SDO0 DNC K14 R2 47k
dangle
DNC L14
dangle
2 CCPdaP J2 HSSIX_DP 4210497 2 GND
SPI_CMT(3:0)
3 CCPdaN J1 HSSIX_DN NC K13
dangle GND
0 CCPClkP K2 HSSIX_SP NC L13
dangle
1 CCPClkN R3303 R3304 R3302 K1 HSSIX_SN NC M13
dangle
G3 M14

GND
HSSIX_IREF NC dangle N3305
ADP1653ACPZ-R7
CCP_CMT(3:0) 100R 100R 2k
2 HIRES_CCPDATAP D2 HSSIR_DP0 FLASH_INT 15 EN ILED 6
1419081 1419081 1410013 dangle
3 HIRES_CCPDATAN D1 HSSIR_DN0 1 SCL SCL 3 SCL/CTRL1 FLASH_CONN(2:1)
0 HIRES_CCPCLKP E2 HSSIR_SP0 0 SDA SDA 4 SDA/CTRL0 LX 13
B B

HIRESCAM_I2C(1:0)
1 HIRES_CCPCLKN E1 HSSIR_SN0 FLASH_INT 11 _INT
2 LORES_CCPDATAP G2 HSSIR_DP1 10 INTF OUT 7

FLASH_INT

FLASH_EN
3 LORES_CCPDATAN G1 HSSIR_DN1 E3300

SI8413DB-T1-E1
0 LORES_CCPCLKP F2 GND 16 9 FLASH_LED_Cathode 2
HSSIR_SP1 VCAM_1V8 VCAM_1V8 STR HPLED 4
3

FLASH_SYNC
1 LORES_CCPCLKN R3305 F1 HSSIR_SN1CLK_TX_THRU0 M3 VBAT
dangle
F3 L3 1 8 2

4210073
GND

R3306 R3307 HSSIR_IREFCLK_TX_THRU1 dangle SETT GND

V3303
1 1

1419083

1419083
2 SETF PGND 12 VBAT

R3309

R3308
2k

4k7

4k7
GIO30 N11 5 SETI
100R 1410013 dangle 9901543
100R
GIO29 P11 VDD 14 GND FLASH_LED_Anode
1419081 1419081 dangle
K3 P12

D D
VSSA GIO28/INT1 dangle 17= GND
J4 N12 XSHUTDOWN_LORES J3415
XSHUTDOWN_LORES 1

S
LORESCAM_CCP(3:0)

VCAM_1V3 VDDA GIO27 VCAM_1V8

CAM_CTRL_CMT(6:0)

HIRESCAM_CCP(3:0)

4348519
LORESCAM_I2C(1:0)

L3300 GIO23 N6 SDA_HIRES 900X910|0_6 0

SCL_HIRES 1

1430084
M7

FLASH_SYNC
GIO22 R3310

R3392

470k
FLASH_INT
CLK_HIRES

1430040
J3 P8

FLASH_EN
600R/100MHz TXVDDA GIO17 R3311

R3314

G
2351075
C3302

10k
3203755 G5 P9 CLK_LORES CLK_LORES 0
100n

TXVDDA1 GIO16
M10 33R
GIO12 dangle 1419117
N9 33R
GIO11 dangle 1419117
VCAM_1V8 H4 TXVSSA GIO10 M9 FLASH_INT FLASH_INT V3305 3 OUT
GND G4 M8 FLASH_EN FLASH_EN
L3302 TXVSSA1 GIO9
GIO8 N8 FLASH_SYNC FLASH_SYNC FLASH_SYNC IN R1
600R/100MHz F5 RXVDDA GIO7/INT3 N7 CLK_HIRES 0 1
dangle 4k7
3203755 GIO4/INT2 P7 XSHUTDOWN_HIRES XSHUTDOWN_HIRES 1 R2 47k
2351075
C3303

C6 JULIE-TO-HOST INT J3413 900X910|0_6

100n

GIO2
F4 RXVSSA GIO0 A6 VCAM_1V3 4210497 2 GND
dangle
L3304
G10 GND
VDDDLL
GND GND F10
VSSDLL 600R/100MHz

2351075

LORESCAM_CTRL(1:0)
C2333 3203755

HIRESCAM_CTRL(3:0)
100n
VCAM_2V8 VCAM_1V8

HIRESCAM_I2C(1:0)
F6,F7,F8,F9,G6,G7,G8,G9,H6,H7,H8,H9,J6,J7,J8,J9,H1,H2= VCAM_1V3
GND

220R/100MHz

220R/100MHz
D8,D9,E8,J10= VCAM_1V8

3203771

3203771
A7,A11,D10,D11,D12,E12,E14,F12,G12,H12,J12,J14,K10,K11,K12,N13= VCAM_1V8

L3308

L3307
GND
A1,A2,D5,H5= VCAM_1V8 MAIN_CAMERA_CONN(16:1)
X3399
L9,L10,L11,L12,P10,P13= VCAM_1V8
C L6,L7,M6,P2= VCAM_1V8 GND 1 GND 1 C
CCPCLKN_HIRES Z3302 CCPCLKN_HIRES 2 CCPCLKN_HIRES 2
B1,C1,L1,N1,P1,L2,E4,K4,E5,J5,K5,E6,K6,E7,K7,K8,L8,K9,N10,P14,E3,H3,D6,D7= GND 1
B7,B11,E9,E10,E11,E13,D13,F11,G11,H10,H11,J11,J13,N14= GND 0 CCPCLKP_HIRES CCPCLKP_HIRES 3 CCPCLKP_HIRES 3
2 CAM-TO-HOST_INT 4342492 3203845 VDig 4 VDig 4
CCPDATAN_HIRES Z3301 CCPDATAN_HIRES 5 CCPDATAN_HIRES 5
3
HIRESCAM_CCP(3:0) HIRESCAM_CCP(3:0) 2 CCPDATAP_HIRES CCPDATAP_HIRES 6 CCPDATAP_HIRES 6
3203845 VCAP 7 VCAP/NC 7
LORESCAM_CCP(3:0) VAna 8 VAna 8
1 XSHUTDOWN_HIRES XSHUTDOWN_HIRES 9 XSHUTDOWN_HIRES 9
LORESCAM_I2C(1:0) 0 CLK_HIRES CLK_HIRES 10 CLK_HIRES 10
1 SCL_HIRES SCL_HIRES 11 SCL_HIRES 11
0 SDA_HIRES SDA_HIRES 12 SDA_HIRES 12

LORESCAM_I2C(1:0)

LORESCAM_CCP(3:0)

LORESCAM_CTRL(1:0)
GND 13

2322019

2351009

2322019

2351009

2322019

2320143
C3322

C3321

C3328

C3320

C3327

C3326
5 CAM_VCTRL_1V8 J3414 900X910|0_6 GND 14

27p0

27p0

27p0

220n
1u0

1u0
GND 15
VBAT N3301 GND 16
LM3677TLX-1.82_NOPB GND
U//U GND GND GND GND GND GND 17
L3301
A1 Vin FB C3 VCAM_1V8 18
120R/100MHz 19
2351061
C3300

3203855 A3 GND EN C1 SH PLATE

10u

20
B2 L3303 21
SW
1uH 1 XSHUTDOWN_LORES XSHUTDOWN_LORES 7 LOCK PIN
2351061
C3301

4348537 3649176 0 CLK_LORES CLK_LORES 6 5400094

10u

3 LORES_CCPDATAN Z3304 LORES_CCPDATAN 5 GND

Place Pin 2 near board edge
Cut-out GND for switch power supplier 2 LORES_CCPDATAP LORES_CCPDATAP 4
Connect to common GND only under C3300 1 LORES_CCPCLKN Z3303 3203845 LORES_CCPCLKN 3
VCAM_1V8 0 LORES_CCPCLKP LORES_CCPCLKP 2
GND 1 SCL_LORES 3203845 SCL_LORES 1
VCAM_1V8 VCAM_1V3 0 SDA_LORES SDA_LORES 0
N3302 VCAM_1V3
C3 A1 VIN
EN VOUT
CAMERA_BTB(8:0)
2351104

2351075

2351075

2351075

2351075

2351075

2351075

2351104

2351075

D LP5952TLX D
C3306

C3307

C3308

C3309

C3310

C3311

C3312

C3313

C3314

VBATT A3
100n

100n

100n

100n

100n

100n

100n
2u2

2u2

-1.3
2316001
C3304

C1
2u2

B2 GND
4346967

GND GND GND GND

N3303 VCAM_2V8 Name Appr

Camera Interface
2351009
C3316

A1 C3 VIN
1u0

Copyright (C) Nokia Corporation. All rights reserved.

VEN VOUT
LP3987ITLX
MODE C1 THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
-2.85-NOPB
2316001
C3315

A3
2u2

GND B2 GND UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

4341561
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.

If possible then add solder jumper for current measurements This document is property of Nokia Corporation
GND GND

1 2 3 4 5 6
 1 2 3 4 5 6

BLUETOOTH & FM RADIO MODULE INCLUDING RF FILTER

A A

D6000
X6000 BTHFMRDS2.1M_ES5
C6000
ANT_BT 15 BT_ANT SCL 17 I2C0_SCL
B See Note (5) B
SDA 18 I2C0_SDA

2320151
2p7
C6001
6443403 NC 29
3648993

STATUS

2p7
L6000

2320151 dangle
47nH

FMANTENNA 20 ANT_FM
FM_ANT
NC 28 RF_ACTIVE
dangle
GND 33 VReg.1.8
GND 9 FM_AUDIO_PL
GEN_CTRL_CMT(20:0) VAFR dangle
NC 27 TX_CONFX VAFL 10 FM_AUDIO_PR
dangle dangle
INTX 32 FM_INTX
dangle
1 BTH_CLK_REQ J6005 900X910|0_6 13 CLK_REQ

BT_PCM_OUT/I2S_DO 26 I2S/PCM_OUT I2SSD2 3

BT_PCM 1 I2S/PCM_IN I2SSD1 2
BT_PCM_SYNC/I2S_WS 3 I2S/PCM_SYNC I2SWS 1
LPRF_CMT(6:0)
BT_PCM_CLK/I2S_CLK 2 I2S/PCM_CLK I2SClk 0

3 BTCTS J6006 900X910|0_6 UART_RTS 4 BT_UART_RTS PCM(3:0)

4 BTRTS J6007 900X910|0_6 UART_CTS 5 BT_UART_CTS
2 BTDaOut UART_RX 6 BT_UART_RX REF_CLK 12 RFCLK J6001 900X910|0_6
LPRFCLK_I
1 BTDaIn UART_TX 7 BT_UART_TX
SLEEPCLK 23 SLEEPCLK J6002 SLEEPCLK 1
6 BTHostWake J6000 900X910|0_6 UART_WAKE 30 UART_WAKEUP 900X910|0_6
PUSL(7:0)

5 BTWake J6003 900X910|0_6 BT_WAKEUP 31 BT_WAKEUP

0 BTRstX J6004 900X910|0_6 BT_RESETX 22 BT_RESETX GND 11
GND 14
GND 16
GND 19
VIO 25 VBAT GND 21
R6000 GND 24
8 VIO(1.8V)

0R 34 NC GND
C 800X716|0402_R I2S_WS dangle C
I2S_SDO 36 NC
CURRENT MEASUREMENTS dangle
I2S_SCK 35 NC
dangle
4390024

Notes

(5) 3k3 Pull-up Resistors are required on I2C_SCL, I2C_SDA.

I2C(1:0)
(7) Pins marked NC should be Not Connected.

AUDIO(6:0)

D D

Name Appr
BTHFMRDS
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

DISPLAY_BTB(25:0) TOP_FLEX_CONN(52:1)

1 50
X3300
14 TE Sub 1 TE Sub 1
11 !RD 2 !RD 2
7 D7 3 D7 3
6 D6 4 D6 4
5 GND 5
10 !CS Main 6 !CS Main 6
5 D5 7 D5 7
VIO 8 GND
9 VIO 9
4 D4 10 D4 10
8 !WR 11 !WR 11
B 12 GND B
1 D1 13 D1 13
13 !Reset 14 !Reset 14
0 D0 15 D0 15
3 D3 16 D3 16
12 D/!C 17 D/!C 17
9 TE Main 18 TE Main 18
15 !CS Sub 19 !CS Sub 19
2 D2 20 D2 20
VBAT F3300 21 N.C. on B2
UI_BTB(5:0) dangle
22 VBAT 22
23 VBAT
1 Alive Light 0.75A 24 Alive Light 24
5119050
0 Top Light 25 Top Light 25 VIO
26 VAUX 26
AUDIO_BTB(8:0) VAUX
27 VIO
28 GND

2351017
C3359
0 EarP 29 EarP 29

100n
1 EarN 30 EarN 30
2 VIBRA+ 31 ViBRA+ 31
32 VCAM_2V8 32
I2C(1:0) VCAM_2V8 GND
33 VCAM_1V8 33
VCAM_1V8
34 GND
1 I2C0_SDA 35 I2C0_SDA 35
0 I2C0_SCL 36 I2C0_SCL 36
CAMERA_BTB(8:0)
37 GND
0 SDA_LORES 38 SDA_LORES 38
1 SCL_LORES 39 SCL_LORES 39
40 GND
6 CLK_LORES 41 CLK_LORES 41
42 GND
7 XSHUTDOWN_LORES 43 XSHUTDOWN_LORES 43
44 GND
GEN_CTRL_CMT(20:0)
C 3 LORES_CCPCLKN 45 LORES_CCPCLKN 45 C
2 LORES_CCPCLKP 46 LORES_CCPCLKP 46
6 ACC_INT J3300 900X910|0_6 47 ACC_INT 47
LORES_CCPDATAP Place under RAP 48 LORES_CCPDATAP 48
4 LORES_CCPDATAN 49 LORES_CCPDATAN 49
5 50 GND
GND
51 GND
52 GND

25 26
5469064
GND

E3500

9901956

GND

D D

NOTE:

Earpiece lines must be wide and low impedance Name Appr

Main board to top flex Interface
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

B B

SIMIF(6:0)

VSIM1

X2701
1 SIMDa1 L2700 C707_10M006_194_2
0 SIMClk1 L2701 CLK 5 1 I/O
39nH C5 C1
2 SIMRst1 3646097 L2702 RST 6 2 NC
39nH C6 C2 dangle Check routing near Pin 6 to avoid ESD problem
6 SIMCARDDETECT
(Not Used) 3646097 39nH VSIM 7 3 GND
dangle C7 C3
3646097

2320546

2320546

2320546

2320546

2351017
C2703

C2704

C2705

C2701

C2700
5469046

100n
27p

27p

27p

27p
GND
SIM card Reader is rotated

GND GND GND GND GND

C C

Route SIM_CLK and SIM_IO signals as striplines (EMC)

Use gnd to protect other signals (ESD)

Use together with Vilma

D D

Name Appr
SIM Interface dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

MMC_CMT(15:0)

2 MMC_HotSwap(Not Used)
dangle Cold swap uSD reader
3 MMCDet(Not Used)
dangle
4 MMC WP(Not Used)
B dangle B
CLK L4800 CLK
12nH

2320544

2320544
N4802

C4810

C4811
3646065

22p

22p
LP3929TMEX-AACQ_NOPB X4800
11 MMCClk CLK_A CLK_B GND DAT2 1 DAT2
0 MMCFb_clk fCLK_A Only connect to VSS pin CS/DAT3 2 CD/DAT3 VSD
GND CMD 3 CMD
7 MMCCmd CMD_A CMD_B CMD CMD VDD 4 VDD
10 MMCCmdDir CMD_DIR CLK 5 CLK
GND 6 VSS
6 MMCDa0 D0_A D0_B DAT0 DAT0 DAT0 7 DAT0
9 MMCDaDir DIR_0 DAT1 8 DAT1
GND
GND
8 MMCDa1 D1_A D1_B DAT1 DAT1 GND 9
Don’t connect direct
1 MMCDaDir1 DIR_1-3 GND 10
GND 11 to GND on top layer
12 MMCDa2 D2_A D2_B DAT2 DAT2 GND 12
Connect to massive
GND 13
13 MMCDa3 D3_A D3_B CS/DAT3 CS/DAT3 GND 14 GND at the inner layer
GND 15
CD GND 16
dangle
5 MMCLSShutDn EN WP VIO VSD
dangle
VBAT VBAT 5469172
GND
VDDB
GND

1419107
GND VDDA

R4805
2322019

2351104

2351104

2322019

100k
C4804

C4806

C4808

C4809
27p

2u2

2u2

27p
4346715
2322019

2351009
C4807

C4800
27p

1u0

GND Alternative is 4340380

GND GND GND GND GND

GND GND
R4805 is to discharge VSD.
C Cards may not start properly, C
if they are not discharged
after previous usage.

PIN 3 GND MUST NOT BE CONNECTED TO TOP LAYER GND

If SD regulator far away from connector

ALL LINES MUST BE SEPARATED AND SURROUNDED BY GND
bigger capacitor (C3205) may be needed.

CLK and DATA lines must be placed in strip-line layer

and routed with GND on all sides (transmission line)

D D

Name Appr
SD-Card Interface
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

ETM Interface
JTAG Interface

VBAT
B B
J3119 900X910

JTAG(6:0)
VIO
4 JTDO J3100 900X910
3 JTMS J3101 900X910 J3120 900X910
ETM(16:0)
1 JTRst J3102 900X910
2 JTDI J3103 900X910
15 JTClkRet J3110 900X910
0 JTClk J3104 900X910 14 EMU1 J3111 900X910

4 XTI_TX3 J3112 900X910

3 XTI_TX2 J3113 900X910
2 XTI_TX1 J3114 900X910

5 EMU0 J3105 900X910 5 XTI_RX J3115 900X910

1 XTI_TX0 J3116 900X910
0 XTI_CLK J3117 900X910

2322019
C3100
J3118 900X910

27p0
GND GND

C C

D D

Name Appr
Test Interface
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

CMT_ENGINE

schematic
LPRFCLK
AUDIO(6:0) AUDIO(6:0) LPRFCLK LPRFCLK

RFCLK(1:0)
H_BRIDGE(3:0) H_BRIDGE(3:0) RFCLK(1:0)
RFCTRL(8:0)
RFCTRL(8:0)
SIM(6:0) SIM(6:0)
RFCONV(11:0)
RFCONV(11:0)
XAUDIO(5:0) XAUDIO(5:0)
TXCCONV(1:0)
TXCCONV(1:0)

RFPWR(4:0) RF
USB_ACI(7:0) USB_ACI(7:0) RFPWR(4:0)

schematic
CHARGER CHARGER
0 VBAT
LPRF_CMT(6:0) LPRF_CMT(6:0) VBAT
SLOWAD(6:0) SLOWAD(6:0)
1 VRCP1 (Not Connected)
CAM_CTRL_CMT(6:0) CAM_CTRL_CMT(6:0) VCP2
RFCLKEXT_GPS dangle
2 VR1
ETM(16:0) ETM(16:0) CCP_CMT(3:0) CCP_CMT(3:0) VXO
0 TXresetX
JTAG(6:0) JTAG(6:0) MMC_CMT(15:0) MMC_CMT(15:0) TXRESETX
Iref1 8
DAC_REF1
6 RFBusClk
dangle LPRFCLK_I MESSI_CMT(25:0) MESSI_CMT(25:0) RFBUSCLK
B 7 RFBusDa RxIP 4 B
PwrOnX PWRONX KEYB_CMT(20:0) KEYB_CMT(20:0) RFBUSDAT RXIP
8 RFBusEn1X RxIN 5
dangle INTUSB(8:0) SPI_CMT(3:0) SPI_CMT(3:0) RFBUSENA RXIN
2 TxQP RxQP 6
PUSL(7:0) PUSL(7:0) FCI_CMT(3:0) dangle TXQP RXQP

3 TxQN RxQN 7
PCM(3:0) PCM(3:0) GEN_CTRL_CMT(20:0) GEN_CTRL_CMT(20:0) TXQN RXQN

0 TxIP VrefP 9
dangle AUDIOCTRL(5:0) I2C(1:0) I2C(1:0) TXIP VREFCM

1 TxIN LPRFCLK
DIG_AUDIO(5:0) DIG_AUDIO(5:0) USB_CTRL_CMT(2:0) USB_CTRL_CMT(2:0) TXIN RFCLKEXT
1 TxC1 AUXDAC1 J7501 RFCLKN 1
TXC RFCLKN
900X910|0_6
3 VREF J7500 RFCLKP 0
VREFRF01 RFCLKP
900X910|0_6
1 VCP1 TXPWRDET 0
VCP1 WTXDET

0 AFC AFCOUT RFTEMP 1

AFC RFTEMP
7500-7599
7800-7899

SLOWAD(6:0)

C C

APE

(empty)

A2000

MOUNTED SHIELDING
040-041927
9591828

D D

GND

Name Appr
BB-RF Engine Top Sheet
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

EXT_COMP

RF

E7600 schematic X7801

VBAT VBAT X7800
800X211|2 E7616
ANT

4
E7601 800X211
VCP2 VBAT_PA
800X211|1 6442573

3646423
L7800

12nH
E7602

2 1
VBAT_WPA RFC10 RFCLKEXT_GPS
800X211|4
RFC11 dangle (Not Used)
E7603 GND 5429037
VXO VXO GND
800X211|4 E7619
DAC_REF1 DAC_REF1
E7604 800X211|1
TXRESETX TXRESETX
800X211|2 E7620 Place closed to ant.
RXIP RXIP
E7605 800X211|4
RFBUSCLK RFBUSCLK X7802
800X211|2 E7621
RXIN RXIN
E7606 800X211|4
RFBUSDAT RFBUSDAT
800X211|1 E7622
RXQP RXQP
E7607 800X211|4 6442573
RFBUSENA RFBUSENA
800X211|1 E7623
RXQN RXQN GND
E7608 800X211|4
TXQP TXQP
800X211|4 E7624
B VREFCM VREFCM B
E7609 800X211|2
TXQN TXQN
800X211|4 E7625
RFCLKEXT RFCLKEXT
E7610 800X211|2
TXIP TXIP
800X211|4 E7626 7800-7899
RFCLKN RFCLKN
E7611 800X211|1
TXIN TXIN
800X211|4 E7627
RFCLKP RFCLKP
E7612 800X211|1
TXC TXC
800X211|1 E7628
WTXDET WTXDET
E7613 800X211|2
VREFRF01 VREFRF01
800X211|2 E7629
RFTEMP RFTEMP
E7614 800X211|1
VCP1 VCP1
800X211|4
RFC6 dangle
E7615
AFC AFC
800X211|1
smashed
7500-7599

With WG3.2 BB VCP1 and VCP2 pins are connected together

C C

R50-22 with no shield

D D

R7543: 1430778 (5%) -> 1430911 (1%) C7521: 2351009 -> 2320540

C7543: 2320505 -> 2351050 Z7503: 4000084 -> 4000118

L7503, L7506, L7550, L7591: 3203769 -> 3203855

Name Appr
Ritsa RF schematics dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6 7 8

L7592
E7528 800X211|2
VBAT
A N7590 220R/100MHz A

2351061

2320564
C7591

C7592
LM3206TLX_NOPB 3203771

150p
10u
T7580 U//U
L7586 L7590

not_assembled
LDM182G1410LB002 A2 SW PVIN A1
1 Unbal Bal 3

3646065
1n2H 3u3H

L7580

12nH
6 NC 3646103 3649181 GND GND
Bal 4 A3 PGND VDD B1
L7587
GND
GND B3 C1
2 5 1n2H SGND EN
4580022 3646103 L7502
GND C3 C2
FB NC
220R/100MHz 4348579

2351061

2351061
GND

C7500

C7590
N7505 3203771

10u

10u
AHNEUS204A
A2 INP_2150 VBAT_RX H2
Z7501 A3 L12
INN_2150 VBAT_TX
GND GND
UNBAL_IN BAL_OUT Z7580

3646065
BAL_OUT B39212B9424M510 B1 OUTP_FDD VCP M2 E7530 800X211|3

L7500
VCP1

12nH
1800/1900MHz In Out C1 OUTN_FDD VDAC K12
UNBAL_IN BAL_OUT In 2140MHzOut
GND BAL_OUT GND D1 INP_MIX_H VDIG L7 E7534 800X211|4
VXO
E1 INN_MIX_H
4511597 4511819

2320760
C7513
VVCO_CAP M7

4n7
GND
GND A4 L10
INP_1900 CBUF_CAP

2351104
GND

C7519
3646065
A5 INN_1900

2u2
L7501

12nH
GND
A6 GND
INP_1800 R7503
A7 E2 GND E7536 800X211|2
Z7504 INN_1800 VBEXT VREFRF01
942.5MHz RBEXT_RX H1

2351017
1% TOLERANCE
4k7

C7518
A8

100n
IN OUT INP_900 1430770
A9

1430911
OUT INN_900

R7502

10k
GND ENV_DET C10
4511755 A10 INP_850
A11 GND GND
B INN_850 B
GND
GND E10
DAC1O1 DAC101
B7 E11 GND
OUTP_850 DAC1O2 DAC102
B6 OUTN_850
DAC2O1 H10 DAC201
B2 INP_MIX_L DAC2O2 G10 DAC202
C2 INN_MIX_L DAC2O3 G11 DAC203
N7520 R7526
SKY77514-20 C4 L8

1430700
RFC1 VCO_CTRL

R7501

10R
B4 RFC2
1k0 B5 GND
1430754 RFC3 C7520
2 D2 M8

GND
DAC203 VGAIN RFC4 LO_IN
K11 G7501
R7525 RFC5
28 3 C7 1n0 VCC 4
ICONT_L VPD RFC6 RFC6 R7509

2320560
2320584

NOT_ASSEMBLED
C7524
C8 L9 OUT VCON E7540 800X211|1

100p
RFC7 OSCIN AFC
2320602

100R 38.4MHz
C7525

27 4 B8 RFC8 3 1
4p7

Tx_1 VDET 1430726

2320524

2320778
22k

C7508

C7507
R7527 B9 RFC9 4520008G 2

3p3

10n
2351017 2351017 2351017 2351017
GND 1430788

C7580
25 5 L1 G3

100n
IDENT VC_3 RFC10 RFC10 C1IP
GND L3 H3
R7523 RFC11 RFC11 C1IN
23 6 1k0 G2 GND
VCC_1 VC_2 1430754 C2IP
GND GND

C7581
not_assembled
C9 G1

100n
R7560 R7524 RFTEMP L7503 MUX_IN C2IN
E53 1k0

1430786
21 7 B3 MUX_OUT

R7522
ANT VC_1
not_assembled

ANT 1430754

18k
800X211 120R/100MHz
2320635

6p8 1k0
C7560

C7582
3646069

19 9 3203855 B12 E3

100n
W_OUTP_H C1QP
0p5

C7561

2320532 Rx_1 ICONT_H 1430754

33nH

T7502 3 C12 F3
R7528 W_OUTN_H C1QN
18 10 Z7521 1 C2QP F1
Rx_2 Tx_2 GND

C7583
not_assembled

not_assembled 5 D10 F2

GND

100n
OUT IN W_OUTP_L C2QN
GND 2p2
3646091

1430744

17 13 D11 W_OUTN_L
R7529

R7530

Rx_3 GND/Rx_5 2320520 2400-2480MHz

6n8H

470R

GND 4
16 14 2 F12 P_OUTP RXOUT_PI K4 E7542 800X211|4
Rx_4 VCC_2 4551080 RXIP
4580070|RITSA5_BOM1 G12 P_OUTN RXOUT_NI M4 E7544 800X211|4
1,8,11,12,15,20,22,24,26,29,30= GND GND GND RXIN
L7510 RXOUT_PQ L4 E7546 800X211|4
4355040 GND GND GND RXQP
C E7010 800X211|1 D12 G_OUTP RXOUT_NQ L5 E7548 800X211|4 C
VBAT_PA RXQN
28R/100MHz E12 G_OUTN
2320540

2320540
C7523

C7521

3203775
15p

15p

L7506 B11 DET TXQ_0 J11 E7550 800X211|4

TXQN
TXC B10 TXC TXQ_180 J12 E7552 800X211|4
TXQP
120R/100MHz TXI_0 H12 E7554 800X211|4
GND GND TXIP
3203855 F11 TX_SUB TXI_180 H11 E7556 800X211|4
TXIN
L11 TXLOOP_SUB
M3 TXVCO_SUB DAC_REF1 K10 E7558 800X211|1
DAC_REF1
K3 GNDVCO
Z7503 C3 GNDVCO_RX
Tx_Out Tx_In C5 GNDLNA SDATA L6 E7560 800X211|1
RFBUSDAT
850/900MHz
Tx_In C6 GNDLNA2 SCLK M5 E7562 800X211|2
RFBUSCLK
Vc GND D3 GNDMIX XENA K5 E7564 800X211|1
RFBUSENA
J3 GNDPRE_RX XRESET M6 E7566 800X211|2
4000118 TXRESETX
K1 GNDPRE_RX2
K8 GNDPRE_TX
GND
GND GND
GND J2 GNDBB_RX
J1 GNDBB_RX2
J10 GNDBB_TX
K6 GNDDIG VREF_CM L2 E7568 800X211|2
VREFCM
K7 GNDDIG_TX
C11 GNDVGA
F10 GNDRF_TX REFP M9 E7570 800X211|1
RFCLKP
K2 GNDCP REFN K9 E7572 800X211|1
RFCLKN
M11 GNDCP_TX REFG M10 E7574 800X211|2
RFCLKEXT
D4,D5,D6,D7,D8,D9,E4,E5,E6,E7,E8,E9,F4,F5,F6,F7,F8,F9,G4,G5,G6,G7,G8,G9,H4,H5,H6,H7,H8,H9,J4,J5,J6,J7,J8,J9= GND
ANT 4380206
Z7540 N7540
SKY77421-20 GND
NOT_ASSEMBLED

RX DUPLEX TX
RX FILTER 2
NC/GND
2320548
C7549

D D
33p

4512325 28 3
Out_1 NC/GND
NOT_ASSEMBLED

GND 26 5 GND
GND
GND GND
GND GND VCC Vbat
ANT
2320584
C7553

Z7541 25 6 DAC202
1n0

VCC VID

RX DUPLEX TX 23 Icont_l 7
GND Out_2
FILTER

2320766
C7548
21 9

8n2
Vdet In_1
4512076 Z7582
20 11 824-849/1920-1980MHZ
Vreg VCC
In1
GND
GND GND
GND GND
GND 18 12 GND
DAC201 Vbat VCC Out1 In1

3646009
In2

L7588

10nH
E7814 800X211|2 R7544 16 14
WTXDET Icont_h In_2 Out2 In2
47nH GND
2321007

2320584
C7544

C7550

3646179 1,4,8,10,13,15,17,19,22,24,27,29= GND

1430911
22n

1n0
R7543

4511826
10k

4355057

GND
GND
GND
GND
GND GND
GND

L7550
E7524 800X211|4
VBAT_WPA
120R/100MHz
3203855

RFTEMP

E7526 800X211|1
RFTEMP
E TXC E

E7506 800X211|1
TXC
RFC10 L7591

E51 800X211|2 120R/100MHz

RFC10
2351061
C7547

RFC11 3203855 N7541

10u

LM3202TLX_NOPB
E52 800X211|2 U//U
RFC11 L7540
RFC6 A1 PVIN SW A2
2320584

GND
C7540

3u3H
1n0
2320536
C7545

E50 800X211|3 B1 VDD PGND A3 3649045

10p

RFC6

DAC101 C1 EN SGND B3 GND

GND
GND C2 C3 GND
VCON FB
4346537
2351050
C7543
1430913

4u7
R7541

1k2

GND
GND

R50_22
F F

R7543: 1430778 (5%) -> 1430911 (1%)

C7543: 2320505 -> 2351050

Name Appr
r50_engine dd-mmm-yy
L7503, L7506, L7550, L7591: 3203769 -> 3203855 Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
C7521: 2351009 -> 2320540
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
Z7503: 4000084 -> 4000118
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6 7 8
 1 2 3 4 5 6

SLOWAD(6:0)

LPRFCLK_I
LPRFCLK_I

TXC_CONV_I(1:0) RF_BB
POWER
A schematic A
basic RAP

dangle GPSCLK
rapstack
LPRFCLK_I LPRFCLK LPRFCLK
AUDIO(6:0) AUDIO(6:0) TXC_CONV(1:0)
TXCCONV_I(1:0) TXCCONV(1:0) TXCCONV(1:0)
DIG_AUDIO(5:0)
H_BRIDGE(3:0) H_BRIDGE(3:0) DIG_AUDIO(5:0) DIG_AUDIO(5:0)
RFCLK_I(1:0)
RFCLK_I(1:0) RFCLK_I(1:0) RFCLK(1:0) RFCLK(1:0)
EMINT(1:0)
EMINT(1:0) EMINT(1:0)
RFCTRL_I(8:0)
RFCTRL_I(8:0) RFCTRL_I(8:0) RFCONV(11:0) RFCONV(11:0)
ACI(1:0)
ACI(1:0) ACI(1:0)
RFCONV_I(11:0)
RFCONV_I(11:0) RFCONV_I(11:0) RFCTRL(8:0) RFCTRL(8:0)
TXC(2:0)
TXC(2:0) TXC(2:0)
INT_SIM(5:0)
SIM(6:0) SIM(6:0) INT_SIM(5:0) INT_SIM(5:0) RFPWR(4:0) RFPWR(4:0)
LPRF_CMT(6:0)
LPRF_CMT(6:0)
CBUS(3:0)
XAUDIO(5:0) XAUDIO(5:0) CBUS(3:0) CBUS(3:0)
CAM_CTRL_CMT(6:0)
CAM_CTRL_CMT(6:0)
PUSL(7:0)
PUSL(7:0) PUSL(7:0)
CCP_CMT(3:0)
CCP_CMT(3:0) LPRF_CMT(6:0)
USB_ACI(7:0) USB_ACI(7:0) I2C(1:0)
MMC_CMT(15:0)
MMC_CMT(15:0) CAM_CTRL_CMT(6:0)
CHARGER CHARGER INTUSB(8:0)
MESSI_CMT(25:0)
MESSI_CMT(25:0) CCP_CMT(3:0)
SLOWAD(6:0) PWRONX PCM(3:0)
KEYB_CMT(20:0)
KEYB_CMT(20:0) MMC_CMT(15:0)
JTAG(6:0)
SPI_CMT(3:0)
SPI_CMT(3:0) MESSI_CMT(25:0)
ETM(16:0)
FCI_CMT(3:0)
FCI_CMT(3:0) KEYB_CMT(20:0)

GEN_CTRL_CMT(20:0)
GEN_CTRL_CMT(20:0) SPI_CMT(3:0)
B B
USB_CMT(8:0) FCI_CMT(3:0)

NAND(15:0) dangle GEN_CTRL_CMT(20:0)

AUDIOCTRL(5:0) AUDIOCTRL(5:0)

USB_CTRL_CMT(2:0) USB_CTRL_CMT(2:0)

PWRONX

DIG_AUDIO(5:0)

USB_CONN

I2C(1:0)
no_ape

INTUSB(8:0) INTUSB(8:0) USB_CMT(8:0)

PCM(3:0) PUSL(7:0)

C C

ETM(16:0)
ETM(16:0)

JTAG(6:0)
JTAG(6:0)

PUSL(7:0)
PUSL(7:0)

REF: $eng_rel_db/master/releases/bb_cebbo2s/rapstack200_av105c_b210/a2.0_2006_wk26
D D

Name Appr
CMT_Engine Top level dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

VILMA

basic

DIG_AUDIO(5:0) DIG_AUDIO(5:0) AUDIO(6:0) AUDIO(6:0)

XAUDIO(5:0) XAUDIO(5:0)

H_BRIDGE(3:0) H_BRIDGE(3:0)

ACI(1:0) ACI(1:0) EMINT(1:0) EMINT(1:0)

INT_SIM(5:0) INT_SIM(5:0) SIM(6:0) SIM(6:0)

TXC(2:0) TXC(2:0) TXC_CONV(1:0) TXC_CONV(1:0)

PWRONX PWRONX USB_ACI(7:0)

SLOWAD(6:0) SLOWAD(6:0) PUSL(7:0) PUSL(7:0)

CBUS(3:0) CHSWSTAT

2200-2299

B B
BETTY

basic

SLOWAD(6:0) CHSWSTAT

PUSL(7:0)

CBUS(3:0) CBUS(3:0) EMINT(1:0)

CHARGER CHARGER

INTUSB(8:0) INTUSB(8:0) USB_ACI(7:0) USB_ACI(7:0)

2300-2399

C C

D D

Name Appr
Energy management dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

AUDIO(6:0)
A A

XAUDIO(5:0)
R2200

NOT_ASSEMBLED
0
1
MIC2N
MIC2P

2351104
2k2

C2202

2u2
1419106
NOT_ASSEMBLED

GND N2200
AVILMA_1.05C

EarP C2 EARP 0
2 MIC1P (Not Used) H1 Mic1P EarN D3 EARN 1
(Not Used) MIC2P G3 Mic2P XEarL E3 XEARL 2
(Not Used) MIC2N G1 Mic2N XEarLC E2 XEARLC 3
3 Mic3P (Not Used) D1 Mic3P XEarR F3 (Not Used) XEARR 4
4 Mic3N (Not Used) D2 Mic3N XEarRC F1 (Not Used)XEARRC 5
5 Mic3PR (Not Used) F5 Mic3PR MicB1 H3 (Not Used) Removed C2203
dangle
6 Mic3NR (Not Used) E5 Mic3NR MicB2 G2 (Not Used)
SLOWAD(6:0)

C1

GND
VSARx H_BRIDGE(3:0)
2 BSI L11 F2

GND
BSI VSATx
3 BTEMP E9 J1

GND
BTemp MicSub
(Not Used) J10 HeadDet
VBAT
HFSpP B2 HFSPP 0
5 LS (Not Used) J2 LS HFSpN C3 HFSPN 1
6 LST Used for VBUS L1 LST VibraP A2 (Not Used) VIBRAP 2
1 RFTEMP K1 RFTemp VibraN A1 (Not Used) VIBRAN 3

2322231
C2205

1n0
(Not Used) (Not Used externally)

2351009
C2228
E11 VBat6 C2201 VRCP1 VSIM2 VSIM1 VRFC VR1 VIO VDRAM VAUX VANA VREF

1u0
ACI
G10

GND
VBG
4 VCHAR GND D10 G9
VChar VRef
B 0 WTXDET GND J3 E1 2u2 B
WTxDet VAna 2351104
VAux E10
B2200 L8 L10
CrI VDRAM
L9 CrO VIO G11

VBACK
J8 VBack VR1 H11
32.768kHz VRFC H10
4530069 D9 PwrOnX VSIM1 A7
PWRONX
(Not Used) K2 SIMDetX VSIM2 B9
WATCHDOG ENABLE G7 WDDis

NOT_ASSEMBLED
VRCP1 C9
DIG_AUDIO(5:0)
800X716|0402_R

0 AudioClk L3 AudClk

2351009

2351104

2351104

2351104

2351104

2351104

2351104

2351104

2351104
C2222

C2221

C2220

C2219

C2213

C2218

C2216

C2215

C2217
J6 ChSwS VCP A10 C2232

1u0

2u2

2u2

2u2

2u2

2u2

2u2

2u2

2u2
R9999

CHSWSTAT
0R

1 EarDataL B4 EarDaL FlyHigh B10

2312249
C2211
2 EarDataR A4 EarDaR FlyLow A11

4u7
3 MicData K4 1u0
MBusTx 2351009
4 PMARP A3 J4 GND GND GND GND GND GND GND GND GND
PMARP MBusRx
GND 5 PMARN C4 L2
CBUS(3:0) PMARN MicData
0 CBusClk L4 K3 GND
SerClk PURX EMINT(1:0)
1 CBusData K5 SerData VilmaInt K6 VilmaInt 0
2 CBusEn1X J5 SerSelX SlClk L5
G5 SleepX
TXC(2:0) USB_ACI(7:0)
0 TxCClk L7 TxCClk MBus H9 Mbus_CLK 3
2 TxDaCtrl G6 TxCCtrl RstX F9 (Not Used) ACI 7
1 TxCDa K7 TxCDa TXC_CONV(1:0)
AFC J11 AFCOUT 0
K9 HV TxC1 J7 AUXDAC1 1
dangle

INT_SIM(5:0) SIM(6:0)
0 INT_SIMClk1 A5 SIMClk1 SIMClkC1 B7 SIMClk1 0

SIMCARDDETECT
2 INT_SIMDa1 B6 SIMDa1 SIMDaC1 C7 SIMDa1 1
1 INT_SIMIOCtrl1 E6 SIMIOC1 SIMRstC1 B5 SIMRst1 2
A6 SIMClk2 SIMClkC2 A9 (Not Used) SIMClk2 3
C6 SIMDa2 SIMDaC2 C8 (Not Used) SIMDa2 4
MicData

SleepX
C VBAT ACITx E7 SIMIOC2 SIMRstC2 C5 (Not Used) SIMRst2 5 C

SIMCARDDETECT
ACI

L2202 SIMCARDDETECT 6
GND F11 K8 (Not Used)
VBat1 TM
120R/100MHz K11 VBat2 Gnd1 F7
2351061
C2227

SleepClk
3203855 A8 VBat3 Gnd2 J9

MicData
10u

PUSL(7:0)

ACIRx
PURX
F10 VBat4 Gnd3 B8

RstX

ACI
VBAT D11 VBat5 Gnd4 L6
L2205 C11 VBatCP GndCP C10 PURX 0
GND B3 B1 SleepClk 1 Note: With SleepClk line should be used Near-End Star Cluster topology,
VBatH GndH
SIMCARDDETECT

120R/100MHz C2231 between pins VBATH and GNDH GndTH F6 RstX 2

3203855 H2 GND
Gnd5
2351061

which means that every conponent has own branch so they are not chained.
C2231

K10 Gnd6
10u

B11 GND
Gnd7
MicData

SleepX
ACITx
ACI

4396299 It is very important these branches are equal lenght and the star point
GND GND SleepX SleepX 3
SIMCARDDETECT
ACI (dividing point) is near Vilma

MicData

ACI(1:0)
1 ACITx
0 ACIRx ACIRx

VBACK
4707575
G2200

GND
D D
Warning to copy projects: copy the schematic and also the layout !

Reduced de-coupling capacitors requires the special power layout design

Name Appr
AVilma 10-Aug-00
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A

Changed from 10nF to 1nF

VBAT VCORE
L2301
N2300
BETTY_V2.1_V2.2_LFA USB_ACI(7:0)
120R/100MHz

2351061

2322231

2351037
C2309

C2300

C2301
3203855 A4 VBAT1 Slave_PU G8 Slave_PU 4

10u

1n0

22u
B5 VBAT1 Master_PD1 H8 (Not Used) Master_PD1 5
L2302 B4 G7 (Not Used) Master_PD2 6
VCoreCoil Master_PD2
10uH A3 VCoreCoil CLK H4 Mbus_CLK 3

2351037
GND GND

C2302
3649117 C4 VCore RXD2 G5 RXD2 2

22u
A2 GND1 DP_RXD H5 DP_RXD 1
B3 GND1 DM_TXD H6 DM_TXD 0
B2
GND
VPP_VIO dangle C2303
D8 VCharIn1 VCCint F6 VIO
CHARGER
VBAT D7 VCharIn2
C7 B1 1u0 GND
VCharInK VIO 2351009
E8 VCharOut1 INTUSB(8:0)
E7 VCharOut2 OEX F4 OEX 5
D6 VCharOutK FSE0 F5 FSE0 4
VO H3 VO 3
SLOWAD(6:0)
4 VCHAR E6 VCharADC RCV_FRX2 G2 RCV_FRX2 2
E4 ChSwS VP_FRX G3 VP_FRX 1
CHSWSTAT
VBAT E1 SMPSClk VM_CLK H2 VM_CLK 0
E2 GND4 FTX G4 FTX 6
F7 VBAT3 SlaveSWSet E5 SlaveSWSet 7
G6 GND3 PUSL(7:0)
RstX D5 RstX 2
A8 LedCoil PurX D1 PURX 0
B B8 D2 SleepX 3 B
LedCoil SleepX EMINT(1:0)

SMPSClk
B6 SetCurr BettyInt D3 BettyInt 1
CBUS(3:0)
C8 LedOut CbusData C1 CBusData 1
dangle
CbusSelX C3 CBusEn1X 2
B7 GND5 CbusClk C2 CBusClk 0
VOUT A7 GND5 VCoreDef C6
VcoreDis A5

NOT_ASSEMBLED
GND F8 A1
VOUT FlashM dangle GND
TestMode C5
dangle

2351104
C2313
F1 SenseP TestOut A6

2u2
dangle
GenOut1 H1
dangle
G1 SenseM GenOut2 F3
dangle
PWM300 F2
GND dangle
H7 VCC Clk600 D4 Clk600 7
SleepClk E3 J2307 SleepClk 1
900X910|0_6
4376535
change to v2.2 (4376582) ???
Sense+ J2398 900X910|0_6 SMPSClk 5
Sense- J2399 900X910|0_6

R2300
2 3 VBUS
SENSE
1 CURRENT 4
PMR03EZPJU10L

2351009
GND BGND

C2312
1445345

1u0
GND

C C

D D

Warning to copy projects: copy the schematic and also the layout !

Reduced de-coupling capacitors requires the special power layout design

Name Appr
Betty 10-Aug-00
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

D2800 GenIO(73:0)
Pin Reset State FUNCTION
RAP3GS_V3.02-PA CAM_CTRL_CMT(6:0)
E3 TMAct GenIO0 U21 In,H CAM-TO-HOST_INT 0 68 CAMCLK 0
RFCLK_I(1:0)
GenIO1 V21 In,H HOST-TO-CAM_INT 1 0 CAM-TO-HOST_INT 2
0 RFClkP GND G4 RFClkP GenIO2 U20 In,H MMCFb_Clk 2 1 HOST-TO-CAM_INT 3
1 RFClkN H4 RFClkN GenIO3 V22 In,H MMCDaDir1 3 52 CAM_VCTRL_1V8 5 NOTE! D3000 must have same coordinates and rotation than D2800
PUSL(7:0)
0 PURX R2804 3 SleepX B3 SleepX GenIO4 W21 In,H TESub 4 54 CAM_RESET 6 For CAD-file and partlist. Do not route!
MMC_CMT(15:0) D2800
1 SleepClk D7 SleepClk GenIO5 W20 In,H DMIC_EN 5 2 MMCFb_Clk 0
RAP3GS_V3.02-PA

2322231
C2823
PURX C4 PURX GenIO6 W22 In,H (Not Used) (MMC_WP) 6 3 MMCDaDir1 1 2 MMCHotSwap (Not Used)

1n0
1k dangle
5 SMPSClk AC15 SMPSClk GenIO7 V23 In,L MMCLSShutDn 7 6 (Not Used) (MMC_WP) 4 3 MMCDet (Not Used) AC10 0
1419087 dangle dangle D3000
6 SysClk Y4 SysClk GenIO8 Y20 In,L MMCDa0 8 7 MMCLSShutDn 5 AB9 1 SDRCKE AB11 VIO VIO
dangle dangle S72NS512PE0KJFLG
4 APESleepX D3 APESleepX GenIO9 Y21 In,L MMCCmd 9 8 MMCDa0 6 AC8 2 SDRCLK M21
RFCTRL_I(8:0) dangle dangle
0 TxResetGND N4 TXReset GenIO10 AA21 Out,H MMCDa1 10 9 MMCCmd 7 AB7 3 SDRCLKX L23 A1 COMBO 32Mx16 NOR
dangle dangle dangle 16Mx16 DDR DRAM
4 TxP In,H MMCDaDir 11 10 MMCDa1 8

1419083
AB22 AB15

1419083
N7 TXP GenIO11 AA19 4 SDRWEX

R2802

R2803
dangle dangle

4k7

4k7
5 TxA P3 TXA GenIO12 AA20 In,H MMCCmdDir 12 11 MMCDaDir 9 AB21 5 SDRCASX AB20
dangle dangle 4347128|NONET
1 Rx1 N2 RX1 GenIO13 Y19 Out,L MMCCClk 13 12 MMCCmdDir 10 AC21 6 SDRRASX AC20
dangle dangle 4347128 SPANSION
A 2 Rx2 R3 RX2 GenIO14 AA18 In,H MMCDa2 14 13 MMCCClk 11 AB18 7 SDRAd SDRLDQS U23 A
RFCONV_I(11:0) dangle 4347003 SAMSUNG
0 TxIP K4 TxIP GenIO15 R21 In,H MMCDa3 15 14 MMCDa2 12 AC18 8 SDRUDQS E21
dangle
1 TxIN L4 TxIN GenIO16 H21 Out,L D0 16 15 MMCDa3 13 AB17 9 SDRDQMU L22
MESSI_CMT(25:0) dangle dangle
2 TxQP G11 TXQP GenIO17 F21 In,L D1 17 16 D0 0 AB10 10 SDRDQML P22
dangle dangle
3 TxQN G12 TXQN GenIO18 Y9 Out,L D2 18 17 D1 1 AB14 11
dangle
4 RxIP J3 RxIP GenIO19 U9 Out,H D3 19 18 D2 2 AB12 12 FlsCS2X AA1
dangle dangle
5 RxIN J2 RxIN GenIO20 AA8 In,H D4 20 19 D3 3 AC12 13 FlsADVX C1
dangle dangle
6 RxQP K7 RxQP GenIO21 AA7 Out,L D5 21 20 D4 4 AC11 14 FlsClk A14
dangle dangle
7 RxQN J7 RxQN GenIO22 AC9 In,H D6 22 21 D5 5 FlsRSTX D1
dangle
9 VrefP G9 VrefP GenIO23 Y6 In,H D7 23 22 D6 6 FlsWEX F2
dangle
G8 VrefN GenIO24 AB8 In,H !WR 24 23 D7 7 U22 0 FlsWaitX E2
dangle dangle
8 Iref1 G10 Iref1 GenIO25 Y5 In,H TE Main 25 24 !WR 8 T23 1 FlsOEX D2
dangle dangle
GenIO26 AC4 Out,H !CS Main 26 25 TE Main 9 VIO VIO T22 2 FlsCSX N1
dangle dangle VIO
GenIO27 AA5 In,H !RD 27 26 !CS Main 10 R23 3
TXC(2:0) GND D19 dangle
1 TxCDa TxCDa GenIO28 AA4 In,L D/!C 28 27 !RD 11 T21 4 TOP_VCCnor1 U2
dangle
2 TxCDaCtrl Out,L BTWAKE 29 28 D/!C 12

1430006

1430006
B19 TxCDaCtrl GenIO29 AA6 N23 5 TOP_VCCnor0 V1

R2805

R2806
dangle

3k3

3k3
0 TxCClk D18 TxCClk GenIO30 AA13 In,H I2C0_SDA 30 55 !Reset 13 P23 6 TOP_VCCmm0 AC3
dangle dangle VPP
GenIO31 Y13 In,H I2C0_SCL 31 4 TESub 14 M22 7 TOP_VCCmm1 AC5
dangle SDRDa dangle
GenIO32 R22 In,H Key_Navigation_Up 32 47 !CSSub 15 L21 8 TOP_Vpp U1 VIO
I2C(1:0) dangle
GenIO33 V20 In,H Key_Soft_Left 33 31 I2C0_SCL 0 K21 9
dangle
GenIO34 Y18 In,H Key_Navigation_Left 34 30 I2C0_SDA 1 K23 10 TOP_Vccq0 F1
dangle
GenIO35 AB16 In,H Key_Send 35 J23 11 TOP_Vccq1 G1 VDRAM
KEYB_CMT(20:0) dangle
GenIO36 N21 In,H Key_Navigation_Down 36 32 Key_Navigation_Up 0 H23 12
CBUS(3:0) dangle
0 CBusClk Y14 CBusClk GenIO37 T17 In,H Key_Soft_Right 37 33 Key_Soft_Left 1 G22 13 TOP_Vdd0 B20
dangle
1 CBusData U12 CBusDa GenIO38 P21 In,H Key_Navigation_Right 38 34 Key_Navigation_Left 2 G23 14 TOP_Vdd1 A21
dangle
2 CBusEN1X AA14 CBusEn1X GenIO39 Y16 In,H Key_Navigation_Select 39 35 Key_Send 3 E23 15 TOP_Vdd2 A20
ACI(1:0) dangle
0 ACIRx G17 ACIRx GenIO40 AA17 In,H Key_EM_Switch 40 36 Key_Navigation_Down 4 TOP_Vdd3 AA23
1 ACITx B17 ACITx GenIO41 N22 In,H (Not Used) 41 37 Key_Soft_Right 5 C2 0 TOP_Vdd4 AC7
dangle
GenIO42 M23 In,H EXT_IOEINT 42 38 Key_Navigation_Right 6 B6 1 TOP_Vdd5 AC6 VIO
DIG_AUDIO(5:0) dangle
1 EarDataL AA10 EarDataL GenIO43 U15 In,H USBChargStatus 43 39 Key_Navigation_Select 7 C7 2
dangle
2 EarDataR F23 EarDataR GenIO44 Y15 In,H USBOTGIntN 44 40 Key_EM_Switch 8 B7 3 TOP_Vddq0 W23
dangle
3 MicData AC13 MicData GenIO45 AA15 In,L MAGNET_STROBE 45 42 EXT_IOEINT 10 B8 4 TOP_Vddq1 A19
USB_CTRL_CMT(2:0) dangle
0 AudioClk U10 AudioClk GenIO46 L17 In,H (Not Used) 46 43 USBChargStatus 0 B11 5 TOP_Vddq2 A18
dangle
4 PMARP AA12 PMARP GenIO47 N17 In,H !CSSub 47 44 USBOTGIntN 1 A12 6 TOP_Vddq3 A16
B GEN_CTRL_CMT(20:0) dangle B
5 PMARN Y10 PMARN GenIO48 J21 In,H (Not Used) 48 53 BTH_CLK_REQ 1 B13 7 TOP_Vddq4 B18
dangle
GenIO49 J20 Out,L VibraEn 49 61 MAGNET_ENABLE 3 B4 8 TOP_Vddq5 A17
dangle
GenIO50 AA9 In,H HALL_INT 50 45 MAGNET_STROBE 4 B5 9
dangle
6 RFBusClk C12 RFBusClk GenIO51 H20 In,H ACC_INT 51 51 ACC_INT 6 A6 10 TOP_Vssd0 AC14
dangle
7 RFBusDa N3 RFBusDa GenIO52 R1 Out,L CAM_VCTRL_1V8 52 50 HALL_INT 7 A8 11 TOP_Vssd1 AC16
dangle
8 RFBusEn1X M1 RFBusEn1X GenIO53 B21 In,L BTH_CLK_REQ 53 5 DMIC_EN 8 A9 12 ExtAdDa TOP_Vssd2 AA22
dangle
3 RXRESET (Not Used) GenIO54 E22 In,L CAM_RESET 54 71 AuxMicData 9 A10 13 TOP_Vssd3 B16
dangle dangle
GenIO55 D21 In,L !Reset 55 49 VibraEn 10 A11 14 TOP_Vssd4 A15
PCM(3:0) LPRF_CMT(6:0) dangle
0 I2SClk N20 I2SSCLK GenIO56 R2 In,H (Not Used) 56 64 BTRstX 0 A13 15 TOP_Vssd5 B14
dangle
1 I2SWS M17 I2SWS GenIO57 R4 In,H (Not Used) 57 59 BTDaIn 1 T2 16
dangle GND
2 I2SSD1 AB13 I2SSD1 GenIO58 T4 In,H DSP SW 58 60 BTDaOut 2 Y1 17 TOP_Vss0 G2
dangle
3 I2SSD2 AA16 I2SSD2 GenIO59 P4 In,H BTDaIn 59 69 BTCTS 3 P2 18 TOP_Vss1 H2
dangle
GenIO60 P7 In,H BTDaOut 60 70 BTRTS 4 U3 19 TOP_Vss2 H1
USB_CMT(8:0) dangle
1 RAP_USB_VP_FRX Y3 USBVP_FRX GenIO61 D17 In,L MAGNET_ENABLE 61 29 BTWAKE 5 P1 20 TOP_Vss3 K1
dangle
0 RAP_USB_VM_Clk AA3 USBVM_Clk GenIO62 W1 In,L SPI DATA IN 62 67 BTHostWake 6 T1 21 TOP_Vss4 K2
SPI_CMT(3:0) dangle
2 RAP_USB_RCV_FRX2 W2 USBRCV_FRX2 GenIO63 C17 In,L SPI DATA OUT 63 72 SPI CLK 0 Y2 22 TOP_Vss5 L1
dangle
3 RAP_USB_VO Y7 USBVO GenIO64 T3 Out,L BTRstX 64 62 SPI DATA IN 1 M2 23 TOP_Vss6 L2
dangle
4 RAP_USB_FSE0_FTX W3 USBFSE0_FTX GenIO65 Y12 Out,L VPPLOCK 65 63 SPI DATA OUT 2 VPP AA2 24
dangle GND
5 RAP_USB_OEX V4 USBOEX Out,L GenIO66: WPX (internal) 73 SPI CS 3 R2801 TOP_Vssq0 B22
6 PUEN (Not Used) V2 USBDSyncClk GenIO67 K17 In,L BTHostWake 67 65 VPPLOCK WPX (internal) AB2 GenIO66 TOP_Vssq1 C23
dangle dangle
GenIO68 J22 In,H CAMCLK 68 58 DSP SW (Vesper RF func) AB5 TOP_INT TOP_Vssq2 C22
INT_SIM(5:0) dangle

2351017
INT_SIMClk1 GND 4k7

C2815
0 C16 U4 In,H BTCTS 69 41 (Not Used) AB6 D23

100n
SIMClk1 GenIO69 dangle 1419083 TOP_/CEd TOP_Vssq3
1 INT_SIMIOCtrl1 In,H BTRTS 70 46 (Not Used)

1430014
F22 SIMIOCtrl1 GenIO70 T7 AB3 TOP_/CEmm TOP_Vssq4 Y23

R2809
dangle GND dangle

1M
2 INT_SIMIODa1 G20 SIMIODa1 GenIO71 R7 In,H AuxMicData 71 48 (Not Used) AC17 TOP_SDRAdres TOP_Vssq5 Y22
dangle
GenIO72 G15 In,H SPI CLK 72 56 (Not Used)
JTAG(6:0) dangle GND 4377156
0 JTClk F4 JTClk GenIO73 U7 In,H SPI CS 73 57 (Not Used)
dangle GND GND
1 JTRst F3 JTrst CCP_CMT(3:0) GND
2 JTDI D5 JTDI SpecialIO0 C20 CCP Data+ 2
3 JTMS D8 JTMS SpecialIO1 C19 CCP Data- 3 VDRAM
4 JTDO H3 JTDO SpecialIO2 D16 CCP Clk+ 0
5 EMU0 E4 EMU0 SpecialIO3 D15 CCP Clk- 1

ETM(16:0) R2807 R2808

2351075

2351075

2351075
C2816

C2817

C2818
100n

100n

100n
C 0 XTICLK B9 ETMClk NC_BGA A1 C
dangle100R 100R
1 XTITxD_0 C9 ETMPkt0 NC_BGA A2
1419081
dangle 1419081
2 XTITxD_1 A7 ETMPkt1 NC_BGA A22
dangle
3 XTITxD_2 A5 ETMPkt2 NC_BGA A23
dangle GND
4 XTITxD_3 C15 ETMPkt3 NC_BGA AB1
dangle
5 XTIRxD C5 ETMPkt4 NC_BGA AB23
dangle Bypass for memory
6 D14 ETMPkt5 NC_BGA AC1
dangle
7 B12 ETMPkt6 NC_BGA AC2
dangle
8 C6 ETMPkt7 NC_BGA AC22
dangle
9 D10 ETMSync NC_BGA AC23
dangle
10 C10 ETMPipe0 NC_BGA B1
dangle
11 B10 ETMPipe1 NC_BGA B2
dangle
12 D9 ETMPipe2 NC_BGA B23 VRFC VRFC
dangle
13 C8 ETMSyncB
14 EMU1 A4 ETMPipeB0 VDDARX E20
15 JTClkRet D6 F20
GND GND

ETMPipeB1 VSSARX
16 A3 ETMPipeB2 VDDATX K3
VSSATX M3
EMINT(1:0)
2351075

2351075
C2808

C2809

0 VilmaInt D20 L3
100n

100n

RetuInt VSSASUB VCORE

1 BettyInt H22 TahvoInt
VCORE VDDCORE1 E1 GND
U13 VDDDSP1 VDDCORE2 M4
U16 L7 GND GND
VDDDSP2 VDDCORE3
R20 VDDDSP3 VDDCORE4 W4
U14 VSSDSP1 VDDCORE5 U8
VCORE U17 VSSDSP2 VDDCORE6 AB19
GND NAND(15:0)
P20 VSSDSP3 VDDCORE7 P17
Bypass for CPU
J17 VDDMCU1 VDDCORE8 K20
FCI_CMT(3:0)
C13 VDDMCU2 VDDCORE9 D13
VCORE VCORE VCORE G21 VSSMCU1 VDDCORE10 D11
AUDIOCTRL(5:0)
R2800 G16 VSSMCU2 VDDCORE11 G13
GND K22 C18
VDD1 VDDCORE12
U11 VDD2 VSSCORE1 C3
2351075

2351075

2351075

2351075

2351075

2351075

10R
C2802

C2803

C2804

C2805

C2806

C2800

J1
100n

100n

100n

100n

100n

100n

1419077 VIO VSSCORE2 Warning to copy projects: copy the schematic and also the layout !
D M7 J4 D
VDDSIO1 VSSCORE3
AB4 VDDSIO2 VSSCORE4 C14
Y11 VDDSIO3 VSSCORE5 V3
GND Reduced de-coupling capacitors requires the special power layout design
Y17 VDDSIO4 VSSCORE6 Y8
GND T20 AA11
VDDSIO5 VSSCORE7
VIO R17 VDDSIO6 VSSCORE8 AC19
H17 VDDSIO7 VSSCORE9 M20
C21 VDDSIO8 VSSCORE10 L20 Name Appr
D12 D22
RAPStack dd-mmm-yy
VIO VDDSIO9 VSSCORE11
2351075

2351075

2351075

2351075

2351075

Copyright (C) Nokia Corporation. All rights reserved.

C2810

C2811

C2812

C2813

C2814

D4 B15
100n

100n

100n

100n

100n

VDDSIO10 VSSCORE12
G3 VDDA VSSCORE13 C11 THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
H7 VSSA VSSCORE14 G14
2351075

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

C2801

100n

4377156
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
GND GND GND
This document is property of Nokia Corporation
GND

1 2 3 4 5 6
 1 2 3 4 5 6

A A

INTUSB(8:0) USB_CMT(8:0)

7 SlaveSWSet PUEN 6
6 FTX RAP_USB_FSE0_FTX 4
5 OEX RAP_USB_OEX 5
4 FSE0 RAP_USB_FSE0_FTX 4
3 VO RAP_USB_VO 3
2 RCV_FRX2 RAP_USB_RCV_FRX2 2
B 1 VP_FRX RAP_USB_VP_FRX 1 B
0 VM_CLK RAP_USB_VM_Clk 0

PUSL(7:0)
4 APESleepX

GND

C C

D D

Name Appr
USB Connections without APE dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6
 1 2 3 4 5 6

A A
CBB5X TOP SHEET

0: RFClkP
1: RFClkN
RFCLK_I(1:0) RFCLK(1:0)

LPRFCLK_I LPRFCLK

0: TxIP 6: RxQP
1: TxIN 7: RxQN
2: TxQP 8: Iref1
3: TxQN 9: VrefP
4: RxIP 10: DRXIP (Not Used)
5: RxIN 11: DRXIN (Not Used)
RFCONV_I(11:0) RFCONV(11:0)
0: TxReset
1: Rx1 (Not Used)
2: Rx2 (Not Used)
3: RXRESET ? (Not Used)
4: TxP (Not Used)
5: TxA (Not Used)
B 6: RFBusClk B
7: RFBusDa
8: RFBusEn1X
RFCTRL_I(8:0) RFCTRL(8:0)

0: AFC
1: TxC1
TXCCONV_I(1:0) TXCCONV(1:0)

GPSCLK

C C

VBAT VRCP1 VR1 VREF

0 1 2 3
RFPWR(4:0)

D D

Name Appr
RF IF dd-mmm-yy
Copyright (C) Nokia Corporation. All rights reserved.
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.

UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.

THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
This document is property of Nokia Corporation

1 2 3 4 5 6