2nd EUROPEAN COMPUTING CONFERENCE (ECC’08)

Malta, September 11-13, 2008

Use of Artificial Intelligence Techniques

to Fault Diagnosis in Analog Systems
Jerzy Rutkowski, Damian Grzechca
Department of Automatic Control, Electronics, and Computer Science
Silesian University of Technology
44-100 Gliwice, Akademicka Street 16
POLAND

Abstract: - Basic concepts of fault diagnosis in analog and mixed (analog and digital) electronic systems by means of
the simulation-before-test approach, the so called dictionary approach, have been presented. Special attention has been
paid to application of artificial intelligence tools, such as: artificial neural networks, fuzzy sets and evolutionary
computing.

Key-Words: - Analog electronic fault diagnosis, parametric faults, artificial intelligence.

1 Introduction or parametric tests measure the DUT responses (node

Automated testing and fault diagnosis of devices are
fundamental topics in the development (design,
production) and maintenance of safe and reliable
complex systems. They are major steps in all production
industries, and especially in electronic systems
production. Such systems can be constructed almost
entirely with digital components, however many systems
still have analog components [Bur01]. The digital part
can be tested with practically verified standard methods,
aided by automatic test pattern generator and Built-In-
Self-Test (BIST) [Bak96], [Ric98]. Testing the analog
part is less well understood. Since 1970’s, analog fault
diagnosis has become an active research area. Two
major issues make the diagnosis particularly difficult:
unknown deviation in tolerances of nonfaulty
components and very complex nature of faults [Mil98].
They generally fall into two categories: catastrophic or
hard faults and parametric or soft faults. It is claimed
that 80-90 percent of analog faults involve shorted and
opened resistors, capacitors, diodes and transistors
[Mil89], i.e. catastrophic faults. Moreover, in case of
mixed integrated circuits (ICs), the cost of the test
process is about 30% of the production costs and it is
estimated that 80% of costs refers to analog part which
occupies less than 10% of the substrate. The theoretical
foundation of analog fault diagnosis is primarily laid,
although there is still a long way to go for practical
applications.
The load board connects the Device Under Test (DUT)
to the tester resources (test program + test hardware) and
all the performed tests fall into two categories:
Specification Driven Tests (SDT) and Fault Driven Tests
(FDT) [Hue93]. The SDT or functional tests are those
which measure the DUT dynamic behaviour. The FDT
voltages) for given test stimulus or stimuli, and then,
component fault can be detected, and eventually further
classified, located and identified. In the high level secure
and safe systems, like in aviation or aeronautics, the
prediction of all faults are obligatory. The pyramid in the
fig. 1 shows the low level test up to high level diagnostic
with fault localization and identification.
High fault isolation level
Long time consumption
Basic fault isolation level
Short time consumption
Figure 1. Classification of diagnosis precision level.
Today, Time-To-Market (TTM) seems to be the most
important factor of a design-production process, and
thus, time costly SDT have to be preceded by simple and
fast FDT [Mil94]. Two different approaches to FDT can
be distinguished: Simulation-Before-Test (SBT) and
Simulation-After-Test SAT [Ban85]. In the SAT
approach fault isolation is obtained by estimating the
DUT parameters from the measured responses. All the
calculations are performed on-line, after the test, what
makes this approach very time consuming, and thus,
impractical at a production stage of the DUT life. The
SBT approach is based on comparison of the DUT
responses associated with predefined test stimulus or

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 2nd EUROPEAN COMPUTING CONFERENCE (ECC’08)
Malta, September 11-13, 2008
stimuli with those induced by different fault conditions
and stored in the so called Analog Fault Dictionary
(AFD). A subsequent classification must be performed
to solve a fault detection and eventually location
problems. Data obtained from the DUT simulations and
stored in the dictionary are collected in the so called
signatures. Nowadays, there is a common opinion that
the SBT approach should be preferred for both,
prototype diagnosis and production tests [Rut03]. In this
approach all the simulations are performed off-line, at
the dictionary construction stage, i.e. at the before-test-
stage, not during the test application stage [Hue93].
Main steps of AFD construction have been presented in
Fig. 2.
Generally speaking, the selected classifier designates the
AFD type and four types can be distinguished:
1. “Classical” dictionary, Nearest Neighbour Rule
(NNR) classifier and real number signatures.
2. Integer-code-dictionary, classifier based on
ambiguity set concept and integer-code signatures.
3. Dictionary with Artificial Neural Network (ANN)
classifier, single integer signature or binary-code
signatures.
4. Fuzzy System (FS) base dictionary, decision rules
classifier and IF-THEN rule signatures.
5. Transmittance dictionary, algebraic
expression type signatures.
DESIGN ENGINEER
⇓ ↓
DUT description, Fault definition Stimulus selection,
designation of designation of its
accessible nodes variable parameter(s)
discrete values
⇓ 2 Usage of Artificial Intelligence
Computer simulations of all circuit condition
(“healthy”: f=0 ; “faulty conditions”: f=1,…,F )
⇓
Test points (nodes + values of stimulus parameter(s))
optimisation, preceded by determination of each
measurement ambiguity sets
⇓ selection and ordering of tests and minimization of
Selection and construction of a classifier,
designation of signatures, test software development
⇓
AUTOMATIC TEST EQUIPMENT – ATE
Figure 2. Stages of analog FD construction.
It can be considered that the post-test fault diagnosis is
the problem of pattern recognition and use of Artificial
Intelligence (AI) techniques has been proposed in 1989
[McK89], and then developed extensively by many
researches. The first obtained results seem to be very
promising and application of these techniques to AFD
problems will be discussed in the section 2. Before then,
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fundamental concepts of fault, error and failure will be
explained. There is a cause-effect relationship between
them, as shown in Figure 3, where the main agents
provoking a fault are depicted as well. Fault is a physical
defect, imperfection or flaw that occurs within a
component and causes deviation of its parameter outside
the tolerance region. Fault in the DUT can be detected
(GO/NO GO test) and eventually located. Error is the
manifestation of fault. It is a short or open circuit, in case
of hard fault or parameter deviation from nominal value,
in case of soft fault. Component error can be identified,
i.e. short can be distinguished from open or soft
deviation value can be determined. This last
identification is practically limited to SAT techniques.
Failure can be either the non-performance of some action
that is due or expected or the performance of a function
in a subnormal quality or quantity. The DUT fault and
error can be diagnosed by means of the FDT, while
failure by means of the SDT. It should be mentioned,
that the DUT with faulty component may not exhibit
failure!
DESIGN PRODUCTION OPERATION
↓ ↓ ↓
FAULT – component parameter outside tolerance region
(detection and eventually location)
↓
ERROR – component parameter deviation
(identification)
FAILURE – design specification outside
acceptability region
Figure 3. Analog fault diagnosis cause-effect relationship.
techniques to FD construction
Main problems of analog test program development
and AFD construction generally fall into two categories:
1. before-test optimisation of the testing effort (testing
time + test equipment complexity), i.e. optimally
test points (test nodes + test stimuli parameters),
2. classification of signatures (pattern recognition).
Both problems can be well solved by means of the AI
tools, such as: Artificial Neural Networks (ANN),
Evolutionary Computing (EC) and Fuzzy Systems (FS).
2.1 Testing effort optimisation
Testing effort optimisation is one of the main problems
of AFD construction. This optimisation comprises: 1)
test program development, i.e. stimuli selection, 2) test
points selection. These problems are very similar. They
belong to the NP hard class of problems and only
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heuristic procedures are possible. These procedures can
be grouped in three categories:
- procedures based on engineer’s intuition [Hoc79],
[Pra00],
- procedure based on information theory and information
channel concept [Rut93], [Star04], [Gol06]
- procedures based on EC [Gol02a,b], [Rut03], [Rut04],
[Puc04], [Gol07].
These last procedures seem to be very effective.
However, time effort of evolutionary procedures is
normally much greater than those of other optimisation
procedures, but the obtained results are usually better
and it should be emphasized, that computer time spent at
the before-test stage is of the less importance and can be
accepted as long as it is contained within a reasonable
limit.
1) Stimuli selection.
Optimum test signal should have two, excluding each
other, features: i) provide maximum diagnostic
information, ii) assure tester construction simplicity and
short testing time. Functional tests (SDT) provide
maximum information at minimum access, but they are
time costly and require complex tester equipment. Such
tests are normally performed at postproduction stage of
DUT life and should be preceded by simple FDT. The
DC tests are the simplest and they are performed at first,
at wafer probe stage [Mil89], however, their diagnostic
information provided is the lowest and they require
access to DUT internal nodes. Variable in time test
signals: sinusoidal, square-wave or aperiodic (step,
pulse), increase tester equipment complexity and testing
time, but they provide more diagnostic information and
allow limiting test nodes to the external ones. For such
signals, test is normally repeated for different values of
the test signal parameter (frequency, step increase time,
pulse width, etc.). Testing with aperiodic excitation has
not been well explored yet, however, this approach is
definitely worth greater attention of researchers [Zie96],
[Bal96], [Chru06], [Chru07], [Jan08].
As no single test (stimulus) provides sufficient
diagnostic information, some number of tests have to be
performed, one by one. From the pointed, by the design
engineer, tests, those that provide the maximum
diagnostic information in the minimum testing time
should be selected and ordered. In [Ziel05], Genetic
Algorithm (GA) based procedure of test program
development has been proposed. It has been assumed
that faults (circuit conditions) have been defined by the
design-engineer and each test is characterized by its time
effort and ambiguity sets that cluster selected circuit
conditions. Each gene of a chromosome binary codes
one test: 1=include, 0=exclude. Fitness function takes
into account both, i) selected tests overall fault isolation
rate (calculated based on ambiguity sets), ii) time effort.
The function weights enable to set prevalence of one of
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these factors and that way select the best test for the
DUT given stage of life. The obtained results have been
compared with those obtained by other procedures and
have proved the EC approach effectiveness.
2) Test points optimisation
Selection of the minimum set of test points, i.e. test
nodes from all accessible nodes and values of stimulus
parameters from all proposed values, that provide the
assumed diagnostic information is one of the main
problems of the AFD construction. It seems that entropy
based procedure [Rut93,02], [Star04] and EC-aided
procedure [Gol02a], [Puc04], [Puc06] are of equivalent
effectiveness and prevail over the intuitive procedures
[Hoc79], [Lin88], [Pra00]. All these procedures are
based on measurement ambiguity sets conception. For
each measurement, sets that contain indiscernible circuit
conditions (ambiguity sets) have to be defined, what
requires mapping of tolerance regions from parameter
space to measurement space, for each simulated circuit
condition. Simple heuristic procedure [Hoc79] and much
more complex sensitivity analysis based procedure
[Mil89].
Use of GA to test point optimisation has been
proposed in [Gol02a] and [Gol07]. Single excitation has
been assumed, what means that optimisation is limited to
test nodes. In [Puc04], application of the algorithm has
been extended into general case, i.e simultaneous
optimisation of test nodes and values of stimulus
parameter. Each gene of a chromosome codes one test
point: 1=include; 0=exclude. Fitness function takes into
account both, i) number of selected test points (weight of
a chromosome) and ii) fault isolation rate. This rate is
designated based on ambiguity sets assigned to
individual test point (measurements). The obtained
results have been compared with those obtained by
means of information channel concept [Rut93], [Star04]
and they proved the evolutionary approach effectiveness.
By proper selection of the optimisation problem target
function, i.e. fitness function of chromosomes, and its
weights, prevalence of the diagnostic information
obtained (fault isolation range) or testing effort (number
of test points selected) can be established.
Today, because of IC element density, fault detection
and location can be done by tests at a limited number of
test nodes, practically limited to output connections.
Thus, optimally selection of test signals and then,
preliminary assumption of discrete values of their
parameters, such as frequency of sinusoidal excitation,
increase time of step excitation or width of pulse
excitation, becomes the predominant problem of analog
fault diagnosis. In [Gol02b], use of Evolutionary
Strategy (ES) to optimally selection of step excitation
increase time has been proposed and the obtained results
have proved effectiveness of this approach. In ES genes
are real numbers and this evolutionary technique seems
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to be an ideal technique to solve these optimisation
problems.
2.1 Testing effort optimisation
Fault definition and classifier selection are other main
problems of the SBT technique. Fault definition is
generally based on the design engineer’s experience and
intuition, and no effective algorithmic methods are
available so far. Normally, only catastrophic faults (more
than 80 percent of all analog faults) are defined. Taking
into account soft faults enormously increase size of
traditional signature AFD (NNR based, integer-code).
New, AI based classifiers (ANN, FS, transmittance - EC
based) permit to avoid this deficiency. Fault classifier is
the fundamental part of AFD. Good classifier should
reveal generalization ability at the after-test stage, i.e.
first of all it should provide good isolation of all
simulated conditions (one “healthy” + F “faulty”
conditions), at a presence of noise caused by design
tolerances of nonfaulty elements, and eventually it
should also detect some soft faults, especially significant
faults from regions laid far away from tolerance region,
e.g. (0 , 0.5Xnom); (2Xnom , ∞). Other important feature of
good classifier is minimum on-line time effort, i.e. from-
test-to-decision time.
The most commonly used and the simplest NNR
(Euclidean distance) based classifier demonstrates poor
generalization ability and significant on-line
computations, and then, it is not worth researchers’
attention.
Classifier based on ambiguity set conception and
integer-coding of signatures requires very low on-line
calculations (signatures are arranged in ascending order),
however, its generalization ability is questionable,
especially when heuristic procedure of ambiguity sets
definition is applied.
In [Gol03] completely new approach to AFD
construction has been proposed. In this approach
classical signatures built of real, integer or binary
numbers, have been replaced by transfer functions
(transmittances) that express F circuit faulty conditions
by M measurements, Yf = Yf(V1,…,VM); f=1,…,F. A
Genetic Programming (GP) has been used to find these
functions, with measurements and assumed real numbers
as chromosome tree terminals T, related by basic
mathematical operations F = {+, –, ·, /, >}. For example,
T={I,V2,V3, -2,-1,-½,-¼,¼,½,1,2}. To find these
functions, for each faulty condition the training set has to
be prepared, based on the DUT simulations. An
exemplary transfer function YR2 = (V2-(½-((V2>I)·(I-
V2)))), to find resistor R2 fault (hard or soft) requires two
measurements. It has been assumed, that in case of
component fault, this function returns positive value, and
negative value if the DUT component is nonfaulty. The
assumed target (fitness) function allows minimization of
test points and maximization of fault isolation, with the
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assumed weights deciding predomination of one of these
criteria. Such classifier reveals very good generalization
ability, including soft fault detection ability, and is the
only one that does not require finding of ambiguity sets,
and then, test points optimisation. Selection of the most
suitable test nodes and identification of the most
effective values of input stimulus parameter is performed
simultaneously with finding of transfer functions.
Fuzzy system based classifier, with IF-THEN decision
rules (as signatures) and membership function
parameters designated by means of the DUT sensitivity
analysis, is the other new and promising classifier. It
allows location of both, single catastrophic and soft
faults, and moreover, partial identification of component
parameter deviation sign. It should be emphasized, that
such identification does not double the number of
signatures, what is absolutely new capability of AFD. Its
input are M measurements. At the before-test stage, the
DUT simulations are performed for f=0,1,…,F selected
conditions (f=0 ≡ “healthy”; f=0,1,…,F ≡ “faulty”) and
nominal values of nonfaulty parameters. Then, F+1
vectors Vf=[V1f,…,VMf] are obtained. At the after-test
stage, the measurement vector V is compared with those
stored in the dictionary. Real values of parameters of
nonfaulty components are not known. Thus, information
obtained from measurements is imprecise or in other
words fuzzy. Mathematical description of such fuzzy
information has been proposed by L.Zadeh [Zad65].
Then, it seems that embedding of fuzzy set theory to
analog fault diagnosis is a natural approach. For the first
time this approach has been proposed in 1979 [Lee79].
Measurements could be preprocessed by membership
functions, however designation of their parameters is the
main problem. In 2001, utilization of the DUT
sensitivity has been proposed [Grz01] and [Grz06]. It
has been assumed that each measurement is
preprocessed by three gamma-trapeze membership
functions: “low”, “normal” and “high”. For all
parameters from tolerance region, measurement is
“normal”, and “low” or “high” if one parameter is
outside tolerance region. Parameters of these functions
and IF-THEN decision rules are designated at the before-
test stage, based on sensitivity analysis. Such fuzzy
dictionary has two new features: capability of soft fault
detection and partial identification, by designation of a
sign of a parameter deviation outside tolerance margins.
Decidedly best features, both, best generalization
ability and minimum on-line computations, reveal ANN
classifiers, what has been claimed by many researchers.
Over two past decades, the field of the ANN has shown
many attractive features. One of the most enticing
potentiality of ANN is their classification capabilities.
Another attractive property of ANN is their learning and
generalization capabilities. The mentioned properties
make the ANN suitable for identification problems, and
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so, offer the possibility to use them as classifier in AFD.
The first attempts have appeared in 1989 and dealt with
process fault diagnosis [Ven89] and medical diagnosis
[Sca89]. The first application of ANN to electronic
circuit diagnosis has been reported in 1990 [Rut90],
[Spi92]. During the next years vast number of
contributions have appeared. The following should be
listed, [Mea91], [Spi92,97], Rut[92,95], [Mai97],
[Mad99], [Ami02], [Grz05], [Grz06a]. Generally
speaking, there are four types of ANN [Yan00]:
- back-propagation neural network (BPNN),
- probabilistic neural network (PNN),
- self-organizing map (SOM),
- radial basis function neural network (RBF).
It is difficult to state which type of ANN best suits
analog fault classification. A PNN classifies data by
estimating the class conditional probability density
function. The first presented results [Yan00] are
promising, however a PNN classifier practical
effectiveness should be verified by other researchers. A
SOM is known as a topological mapping algorithm, in
which similar patterns cluster together automatically.
Only few applications to analog fault classification have
been reported [Col94], [Oso95]. Difficulty in
determining the boundary on mapping space is the main
drawback. A RBF is a feed-forward ANN and its
application to analog fault classification has been
proposed in [Cat02]. Optimally selecting the basis
function for the classification problem is the main
drawback. Great majority of contributions propose to use
a BPNN as analog fault classifier and this approach
seems to be the most promising. It seems, that by proper
preparation of training set, input data preprocessing and
output data coding very good isolation of simulated
faults can be achieved in the presence of design
tolerances. It has been suggested to split fault
classification into two phases: 1) fault detection by
means of GO/NO GO neural (single output) fault
dictionary, 2) fault location by means of multi-output
(signature) neural dictionary [Grz02]. This solution
provides much better isolation of “healthy” condition,
than in case of single, fault detecting and locating
dictionary. It should be mentioned that training sets of
both dictionaries are the same. As pointed out, AFD
classifier input data preprocessing and output data
coding are important problems to be solved by the
design-engineer.
Input data preprocessing.
Normalization is the most commonly used technique
of AFD input data (measurements) preprocessing
[Ami02]. Standard normalization allows to equalize
level of different input signals from a very wide range,
but it fails when a single signal takes values from a wide
range and distinction of both, “low” signals and “high”
signals is the task.
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In such case, granulation technique can be utilized
[Rut92,95]. In this technique, each input signal is split
into subinputs, each of them is responsible for one and
only one decade of the signal.
Fuzzyfication is the other effective technique of input
signal preprocessing. The technique has been proposed
in 2001 [Grz02]. Each signal (measurement) is
preprocessed by three membership functions “low”,
“normal” and “high”. Parameters of these functions can
be well defined by means of sensitivity analysis. It
should be mentioned, that both, fuzzyfication and
granulation preprocessing techniques also provide input
data normalization.
Other input signal preprocessing techniques have been
proposed, such as:
- wavelet transformation [Ami00],[Chru06],
- compression by means of principal component analysis
[Mat96], [Ami02], [Ali02],
- bilinear transformation [Cza03],
- preprocessing by Linear Vector Quantization (LVQ)
ANN [Rut94].
Application of these preprocessing techniques is usually
limited to specialized circuits and they normally require
greater on-line computations.
Coding of outputs
Coding method of AFD outputs (signatures) is
normally imposed by the used classifier. Each output
(signature) of integer-code classifier (f=0,1,…,F) based
on ambiguity set concept, is built of integers. Each digit
(integer) of such output corresponds to one
measurement, and for the given circuit condition, it is a
number of ambiguity set that contains the condition.
Each output of transmittance classifier takes real values
from the range <−1 ,+1>; positive value indicates
component fault occurrence.
In BPNN classifier, signatures are designated by the
output layer. This layer can contain:
- one neuron with output taking binary values 0 and 1,
for GO/NO GO test or integer values 0,1,…,F , for fault
locating dictionary,
- F neurons with binary outputs, 1 at the f-th output
means occurrence of the f-th faulty condition,
- K≥log2(F+1) neurons with binary outputs, that code
F+1 circuit conditions. Simple binary code is preferred.
This way of BPPN classifier output coding seems to be
the best, as it provides the best isolation of circuit
conditions at minimum size of the output layer.
3 Summary
As pointed out, basic problems that have to be solved
by the design engineer when constructing an AFD are: 1)
stimuli selection, 2) test point optimisation, 3) fault
definition, 4) selection of a classifier, 5) selection of an
input data (measurement) preprocessing method, 6)
selection of an output (signature) coding.
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ISSN:1790-5109 274 ISBN: 978-960-474-002-4