Rev No 2

Course Outline CS 252 Credit Hours: 3 Page 1 of 2 pages

Dated: 01.06.05

Computer Architecture
Text Book:- M. Morris Mano, Computer System Architecture

Reference Books:-
 Computer Architecture and Organization by John P. Hayes, McGraw Hill
International Edition
 Advanced Computer Architecture- A design space approach by Dezso Sima,
Terence Fountain, Peter Kacsuk, Pearson Edition
 Computer Organization and Architecture, by William Stallings, 6th Edition,
Prentice Hall Publishers.

Course Description:-

The objective of this course is to familiarize the students with the architecture
and organization of computer systems. It builds on the already acquired knowledge
of DLD and electronics. The major topics include: Data path design, ALUs,
pipelining, memory management, Internal devices and their architectural
requirements, control mechanism, and parallel processing.

Pre- requisite:-

Digital Logic Design

Grading Policy:-

In Semester Evaluations: 30%

End Semester Evaluation: 70%

Week-wise Breakdown

Week Topics/Activities Chapter

Control Memory, Address Sequencing

1 7.1 to 7.3
Micro program example

2 Design of Control Unit 7.4

Introduction, General Register Organization

3 8.1 to 8.3
Stack Organization

Instruction Formats, Addressing Modes

4 8.4 to 8.6
Data Transfer & Manipulation
Rev No 2
Course Outline CS 252 Credit Hours: 3 Page 2 of 2 pages
Dated: 01.06.05

Program Control, Reduced Instruction Set Computers (RISC),

5 8.7 to 8.8
Overlap Register Windows

Parallel Processing, Pipelining, Arithmetic Pipeline,

6 9.1 to 9.4
Instruction Pipeline

RISC Pipeline, Vector Processing

7 9.5 to 9.7
Array Processors

Introduction, Addition & Subtraction

8 10.1 to 10.4
Multiplication Algorithms, Division Algorithms

Floating Point Arithmetic Operations

9 Decimal Arithmetic Unit 10.5 to 10.7
Decimal Arithmetic Operations

Peripheral Devices, Input-Output Interface

10 11.1 to 11.4
Asynchronous Data Transfer, Modes of Transfer

Priority Interrupt
11 Direct Memory Access Input-Output Process 11.5 to 11.8
Serial Communication

Memory Hierarchy, Main Memory

12 12.1 12.4
Auxiliary Memory, Associative Memory

Cache Memory, Virtual Memory

13 12.5 to 12.7
Memory Management Hardware

Characteristics of Multiprocessors
Interconnection Structures, Interprocessor Arbitration,
14 13
Interprocessor Communication & Synchronization, Cache
Coherence.

15 Review

16 End Semester Exam