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CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO.

3, SEPTEMBER 2017 231

Technical Approaches Towards Ultra-High


Power Density SiC Inverter in Electric Vehicle
Applications
Xuhui Wen, Senior Member, IEEE, Tao Fan, Senior Member, IEEE
Puqi Ning, Senior Member, IEEE, and Qing Guo, Senior Member, IEEE
(Invited)

Abstract—Along with the rapid growth in electric vehicle (EV) and inverter system level integration technology, Toyota
market, higher power density and more efficient motor drive Corporation in Japan produced a high power density inverter
inverters are required. It is well known that silicon carbide (SiC) with 17.2 kW/L (at 65°C). In ref [3], a research level prototype
has advantages of high temperature, high efficiency and high reached 36 kW/L, which is extremely high for a Si based
switching frequency. It is believed that the appropriate utilization inverter.
of these merits can pave the way to ultra-high power density In recent years, the silicon carbide (SiC) power
inverters. This paper presents issues about SiC chip’s semiconductor has emerged as an attractive alternative that
current-carrying capability enhancement which is crucial for a
pushes the limitations of band-gap width, breakdown voltage,
compact inverter of tens and hundreds of kilowatts. Technical
approaches towards ultra-high power density EV inverter
saturation drift rate and thermal conductivity of silicon (Si)
including SiC module packaging, dc-link capacitor function devices [2][4]. Research organizations and EV vendors have
analysis and system level integration are discussed. Different successfully developed a high temperature and high frequency
PWM algorithms which may improve efficiency and help to SiC inverter, which demonstrated advantages as high power
reduce the inverter volume are also studied. density, high efficiency and low cost. In ref [5], Fuji Electric
developed 10kW air-cooled SiC EV inverter with 190°C chip
Index Terms—DC-link capacitor, electrical motor, electric junction temperature, 50 kHz switching frequency, and about
vehicle, inverter, silicon carbide. 40kW / L power density. In ref [6], Toyota increased vehicle
fuel efficiency by 5%, which proofed their leadership in EV
area with novel SiC device and its application. In the past 5
I. INTRODUCTION
years, there are closed to 6700 patents related to inverters for

T O enable the rapidly emerging and imminent energy


economy, electric vehicles (EV) are needed at low cost.
According to France's famous consulting firm Yole, the annual
electric vehicles. Among them, about 37.1% patents presented
the utilization of SiC devices with its high temperature and high
frequency advantages. SiC technology will assure future
production and sales of world's electric vehicle will reach 20 compact power electronics systems which target deployment in
million by 2020 [1]. Therefore, dramatic improvements in EV the emerging energy economy.
motor drive inverter have to be achieved in terms of energy This article provides a status report on SiC devices and
efficiency, cost, and reliability. presents the key challenges that must be addressed when
In the late 90s, GM launched its electric car EV1, Toyota developing future compact SiC converter at high junction
demonstrated its hybrid car Prius, and Daimler Chrysler temperature. Issues regarding high temperature low parasitic
launched fuel cell EV NuCar. In the past two decades, medium parameters module packaging, dc-link capacitor functional
power rating inverters for EV drive are dominated by the analysis with associated PWM algorithm and system-level
mature and well established silicon IGBT technology. AC inverter integration methods have been discussed. In
asynchronous motors and permanent magnet motors competed conclusion, with continually improved SiC chip technology,
with other types of motors, and finally shares the EV high frequency/ high temperature passive component and
marketplace[2]. With state-of-the-art IGBT module packaging inverter technology, SiC devices are thus expected to drive the
growth of EV motor drive inverter as they are the key
components of a power system.
This work was supported by National Key R&D Program of China (No.
2016YFB0100600) II. CHALLENGES OF ENHANCING SIC CHIP’S HIGH
Xuhui Wen, Tao Fan and Puqi Ning are with Key Laboratory of Power
TEMPERATURE CURRENT-CARRYING CAPABILITY
Electronics and Electric Drive, Institute of Electrical Engineering, Chinese
Academy of Sciences; Collaborative Innovation Center of Electric Vehicles in SiC has a 3-time-higher band-gap, 3-time-higher thermal
Beijing. (e-mai: wxh@mail.iee.ac.cn; fantao@mail.iee.ac.cn;
npq@mail.iee.ac.cn).
conductivity, 10-time-higher critical breakdown electric field
Qing Guo is with Zhejiang University, National Engineering Center for than Si [7], as shown in Table I. Therefore, SiC power devices
Applied Power Electronics).
232 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO. 3, SEPTEMBER 2017

can work under high temperature and high frequency improving the high temperature current-carrying capability of
conditions with high efficiency. The above characteristics have SiC chips, especially SiC MOSFETs, is of paramount
built a solid foundation for the realization of importance.
high-power-density automotive motor drive inverter. The carrier transport mechanisms and behaviors under high
TABLE I temperature and high electric field of SiC chips determine SiC
CHARACTERISTICS ANALYSIS OF SI, GAN AND SIC chip’s high temperature electrical characteristics and reliability:
Si SiC Analysis 1) Carrier scattering at high temperature deceases its mobility,
Wider band-gap can
improve the working and leading to higher SiC chip resistance and lower
Bandgap(eV) 1.12 3.2 temperature, thus current-carrying capability. When the temperature
simplifying the increases, this scattering mechanisms will lead to mobility
cooling system.
Higher critical
lowering, mobility saturation in MOS channel at high
breakdown electric electric field etc., hindering the current-carrying capability
Critical breakdown
electric field 3 30
field leads to lower improvement and increase on resistance of SiC chips. One
5 power losses, thus research has reported that, the carrier mobility of
(MV/cm,x10 )
improving the
inverter’s efficiency. MOSFETs annealed in phosphorous ambient is 130
Electron/hole mobility Higher mobility and cm2/V·s at room temperature. It will reduce to 80 cm2/V·s
1450/450 950/115 saturation velocity
(cm2/V.s) at 150⁰C and 50 cm2/V·s at 300⁰C. New MOS structures
can reduce switching
Electron saturation
1 2 loss and improve are needed to improve the carrier mobility at high
7
velocity(cm/s, x10 ) switching frequency. temperature.
Higher thermal 2) Under high temperature and high electric field, more
Thermal conductivity conductivity is
(W/cm.k)
1.3 5
beneficial for inverter electron-hole pairs in PN junction barrier depletion region
heat dissipation. are produced resulting in larger leakage current. This
leakage current at high temperature may be reduced by
The voltage levels of electric vehicle motor drive systems suppressing the parasitic parameters of the device.
span from 48V to 900V with power ratings of 3~300kW. The 3) For SiC MSOFET, the carrier capture and release at high
motor drive inverter utilizes SiC MOSFETs with body-diode or temperature gate interface will affect the device stability
with anti-parallel SBD as switches, as shown in Fig. 1. Until and reliability. At high temperature, the electrons are
2016, the highest current-carrying capability of 1200V SiC accelerated to create large number of holes. These holes
MOSFET commercial chip is 63A at 25⁰C and reduces to 46A may be captured by oxide layer. This increases the electric
at 100°C. Besides, SiC MOSFET Rdson at 200⁰C increases field strength at local oxide defects and leads to tunneling
rapidly to 2.5 times higher than its room temperature value, current, which may cause oxide layer breakdown. It is
leading to sharp loss growth [8]. necessary to develop a new gate dielectric layer growth
method to improve the reliability of SiC MOS oxide layer.
Therefore, theories about the carrier transport mechanisms at
high temperature, MOS gate dielectric interface degradation
mechanisms and device failure mechanisms of SiC material are
essential to SiC device design and fabrication. Under the
theoretical guidance, the processes such as trench structure, p+
implantation, wafer thinning and low-interface high-reliability
gate dielectric growth is the key for improving high
temperature current-carrying capability of SiC chips.

III. TECHNICAL APPROACHES TOWARDS ULTRA-HIGH POWER


DENSITY ON-BOARD INVERTER
Fig. 1. Diagram of SiC MOSFET chip and module. When vehicles vary from mild-hybrid cars to full electric
Compared with SiC IGBT modules for EV motor drive buses, the power rating of motor drive system increase from 3 ~
inverter, current SiC MOSFET chips show obvious problems 5kW to 200 ~ 300kW, and the battery voltage raises from VIV
such as low single-chip current-carrying capability and its to around 540V. If classified by power and voltage, EV motor
deterioration at higher temperature. For example, in a compact drive inverter is a typical medium/low power, low voltage
battery powered electric car, the 77kVA motor drive inverter converter system.
adopts a 650V/450A IGBT module comprised of 3 150A In the past 20 years or so, current-type inverter [9], Z-source
IGBTs and 3 anti-parallel diodes. If SiC chips were utilized, at converter [10] and multi-phase inverter [11] were invented and
least 9 MOSFETs and 9 diodes were needed to be researched in the development of EV. However, the main
parallel-connected, thus greatly increasing the module topology of EV motor drive power stage is still taken by
complexity and stray inductance. The increased module stray two-level three-phase voltage source inverter (VSI). In the
inductance will result in high electric stress of SiC MOSFETs, recent research and development of VSI for EV application, in
switching oscillations and EMI problems. Therefore, order to increase the power density, the utilizations of new
WEN et al: TECHNICAL APPROACHES TOWARDS ULTRA-HIGH POWER DENSITY SIC INVERTER IN ELECTRIC VEHICLE APPLICATIONS 233

components, including double sided cooling IGBT and bonding and optimal chip distribution method need to be
different kinds of capacitors, and multi-physical field analysis studied. As the converter switching frequency is increased for
based system level integration method have been studied. In module miniaturization, electromagnetic interference will
SiC inverter research, the core is how to use the promising become another important issue to tackle. In the end, the
benefits of SiC device. current rating of a single SiC MOSFET die is 1/4 ~ 1/6 of Si
IGBT. It means that a 450A SiC MOSFET module need to
A. High temperature approach focusing on developing power
parallel 9 dies, while a 450 Si IGBT module only needs to
module planar packaging technology
parallel 3 IGBT dies. As a result, a large number of dies raises
Since SiC chip cannot be directly applied to the motor drive many difficulties in module layout design.
inverter, the module packaging technology plays an important In the new generation of automotive modules, planar
role to take the full advantages of SiC chips. package is preferred, because that the planar package can
The first problem about SiC packaging is high temperature. reduce stray inductance by 70%. With double-sided cooling
High temperature causes module thermal stress and thus structure, the planar package can also reduce the thermal
packaging material degradation. Although the loss of a SiC resistance by 35% [15]. Most of planar package researches are
chip is smaller than that of a Si chip, heat flux density becomes focused on the top die surface interconnection and the package
larger because of reduction of the chip area. For example, the layout design. Among the top die surface interconnection
maximum current of Cree's 1200V/40mΩ MOSFET chip can methods, the main approaches include, molybdenum buffer
reach 63A, and the operative area is 0.183cm2. When working layer inter-connection [16], soldering bump implantation over
at 50 kHz and 50Arms, the heat flux of the SiC chip reaches 623 passivation layer [17], embedded direct bonded copper (DBC)
W/cm2, which is 2.5 times of state-of-the-art IGBT chip [13].
structure[18], multi-layer sputtering and curing method [19].
Therefore, high temperature packaging material and method are
For double-sided structure design, scholars are exploring
needed.
genetic algorithm based multi-objective optimization methods.
In power module, SiC or Si chips are soldered or sintered on
The novel optimization method can break through the design
the direct bonded copper (DBC) substrate. The melting points
limits of experience based engineering method, and it can prove
of conventional solder alloys used in Si IGBT packaging, such
high temperature and high frequency advantages of SiC chips
as SAC305 etc, are commonly below 300 °C, and the operation
[20].
temperature cannot exceed 175°C. High temperature solders,
In summary, the planar package and Nano silver paste
such as Au80Sn20 and Au88Ge12 are too hard and do not meet
interconnect technology will assist SiC from a promising future
the requirement of high temperature operation (200°C above).
technology to a potent alternative to Si in high reliability, high
Although the micrometer scale silver paste can be sintered at
temperature and high frequency applications.
250°C and the operation temperature is over 500°C, the
sintering process requires a pressure over 15 MPa, which may B. High switching frequency approach focusing on raising
easily damage SiC chips [13]. In ref [14], Nano silver paste can dc-link capacitor’s current-carrying capability and inverter
achieve a pressure free low temperature sintering process, and switch frequency
also allows over 600°C operation temperature. After the The power circuit of electric vehicles can be described by a
sintering, the formed micro-pore structure can absorb thermal battery pack, a two-level three-phase inverter and a motor. The
stresses, which meet the high temperature and high reliability battery pack is equivalent to an ideal voltage source in series
requirements of SiC chip. with a small resistance of hundreds of nano-ohms, a very large
With high temperature cycling and large temperature capacitor of several hundreds of Farads paralleled with its
excursion, especially during transient switching conditions internal resistance. A dc-link capacitor is required to supply
when the semiconductor chips are commonly lack of thermal ripple current to switches and balance DC voltage fluctuation,
balance, the packaging materials will degrade fast. Under these as Fig. 2 shows.
stresses, layer in the module will form pre-defects, the residual Usually in IGBT inverter, the dc-link capacitor accounts for
stress will be intensified, and potting materials evaporate fast, 35% of the total volume and 25% of the total mass. It is well
all of those lead to module failure. Therefore, the calculation known that the capacitor in EMI filter can be reduced by
methods for electrical unbalance and temperature unbalance increasing frequency. Therefore, the beginning idea of utilizing
between key packaging components need to be carefully the high frequency capability of SiC device starts with the
studied. For SiC power module designs, it is extremely dc-link capacitor function research in order to increase power
important to learn the fatigue failure and acceleration mode of density of SiC inverter.
packaging material under electrical stress, thermal stress and C1
iload
i
mechanical stress.
The second problem is how to insure fast switching and high
R2
R1 iC
frequency operations. The switching speed of SiC MOSFET is U0 Cap
Motor
3 to 5 times higher than Si IGBT while its frequency can reach Battery
up to 1 MHz for a power converter. Fast switching and high
frequency require extreme low stray impedance in SiC module. P
Package parasitic reduction methods such as copper ribbon Fig. 2. Schematic Diagram of EV‘s power circuit.
234 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO. 3, SEPTEMBER 2017

Contrast to the capacitor in EMI filter, the first role of the capacitor used in domestic inverter is usually 600 off, which is
dc-link capacitor in the EV power circuit is to supply ripple 500 mL based on the state-of-art film capacitor technology
current to the inverter switches during switching period. By (1.2μF/mL).
using the law of power equilibrium, under the condition of TABLE II
IMPACT OF SWITCH FREQUENCY TO CAPACITOR
balanced sinusoidal three phase AC current, Kolar [21] derived
the relationship between the DC and AC currents on both sides Si_inverter SiC_ inverter
of switches during one single switching period as equation (1) U 0 (V ) 320 320
and (2) shown. From the equations, it is clear that the inverter I rms ( A) 200 200
ripple current Irms and the capacitor ripple current IC,rms can be I peak ( A) 282.8 282.8
described by the motor phase current Iφ,rms, power factor cosφ
C ( F ) 600 120
and the voltage modulation index M . Because the impedance V *C (mL) 500 100
of dc-link capacitor branch is much lower than that of the f s (kHz) 10 50
battery branch, the high order harmonics of Irms has to be U (V ) 23.57 23.57
extracted from the dc-link capacitor. U
U0
(%) 7.36 7.36

2 3 1 (1)
I rms  I ,rms M (  cos 2  ) But, in a SiC inverter, assuming the switch frequency being
 4
arisen by 5 times, the capacitance can be decreased to 120μF
 3 3 9M  (2) and volume to 100mL. The same DC voltage fluctuation
I C ,rms  I ,rms 2M   cos 2  (  )
 4  16  limitation is also guaranteed, as Table II shown. It should be
The second role of the dc-link capacitor in the circuit is to pointed out that this 120 μF film capacitor has to provide the
smooth the dc voltage fluctuations caused by the load Pmax. This ripple current of 50 kHz and its harmonics corresponding to
function is expressed by the right term of Eq. (3): 282.8 A! Therefore, research objectives of the film capacitor in
SiC inverter should include not only capacitance per volume
 1   1  (3) (C/mL) but also the current-carrying capability at high
Pmax  ic  U dc 0  ic   ic  U dc 0  U 
2Cf  2  temperature. The latter one is even more important.
 s 
Where, Udc0 is the steady state of DC voltage, fs is the switching The research of film capacitors used in automobile spans
frequency, C and ic are the capacitance and the ripple current of from material level to component level. At the material level,
the capacitor respectively. From equation (3), it is apparent: GE has developed polyetherimide (PEI) film materials,
1) The low impedance dc-link capacitor is a better source for allowing the ambient temperature up to 180℃, 4% higher than
the inverter ripple current, especially for its current that of the polypropylene (PP) film which is most widely used
harmonics near the switching frequency. It is even more currently. In terms of component level, the SBE from US has
important for EV, since tens of kilohertz and hundred reduced the equivalent thermal resistance of the capacitor
amperes of ripple current will inevitably reduce battery through the integration of capacitor and its cooling components.
lifetime. The capacitor rated ripple current is directly enhanced [22].
2) The dc-link voltage fluctuation ΔU caused by load needs to In conclusion, making full use of high frequency feature of
be suppressed, which is expressed as: SiC devices is embodied in developing the film capacitor with
high current-carrying ability at high temperature and large
ic t i (4) C/mL value. Based on the planar SiC packaging technology
U   c
C Cf s and high density film capacitor technology, the multi-physical
field analysis methods and system-level power electronics
For a three phase AC motor, Eq. (4) can be rewritten as:
integration technology can make SiC inverter even better:
3 1  M  n, T   M  n,T  I ,rms  n,T  (5) 1) DC bus bar optimization: the DC bus bar connects
C  n,T   capacitor cells and SiC power module together. The
2Uf s
electromagnetic field analysis such as ANSYS Q3D can
M and Iφ,rms are functions of motor speed n and torque T. help to optimize the bus bar current distribution and reduce
The capacitance of the dc-link capacitor is determined by the the inverter loop stray inductance which may result in
modulation index as well as the power factor [24], can be reduction of SiC power rating and increase of inverter
obtained from (5). From Eq. (4) and (5), assuming the dc-link power density.
capacitor supplies adequate inverter ripple current, it is known 2) Inverter layout optimization: after the losses and heat
that the increase of switch frequency in SiC inverter is much distribution in the inverter are obtained by circuit
more appropriate than the way of the capacitor value augment, calculation and 3D thermal simulation, the high efficient
because of the SiC device’s high frequency advantage. heat transmission methods including phase transformation
Take a 77KVA inverter for example again. Its voltage is and specific heat by-pass design can help to decrease the
320V, peak current is 282A. In a Si based IGBT motor drive thermal resistance between each heat source and heat sink
inverter, 10 kHz switch frequency is commonly used. After [23]. Sometime the heat insulation technology need be
evaluating the capacitor ripple current-carrying capability and included to reduce the thermal coupling between the heat
the DC voltage fluctuation limit (5% ~ 10%), the dc-link film
WEN et al: TECHNICAL APPROACHES TOWARDS ULTRA-HIGH POWER DENSITY SIC INVERTER IN ELECTRIC VEHICLE APPLICATIONS 235

source and heat sensitive components in SiC inverters. used in inverter design. From another point of view, because
the voltage fluctuation is well below the voltage fluctuation
C. High efficient approach focusing on SiC inverter PWM
limit ∆U at other working points rather than the
algorithms
above-mentioned one, lower switching frequencies are thus
The losses of an EV electrical drive system are divided into allowed to obtain reduced switching losses in those working
the motor losses and the inverter losses. The loss arising from conditions.
the power switch is the dominant part in an inverter. The The relationship behind the Fig 4 means that, the minimal
innovative pulse modulation methods are effective to increase allowed switching frequency with a defined ∆U is a function of
SiC inverter efficiency and thus power density. both speed and torque when capacitor is chosen, and this makes
a) High efficiency pulse width modulation algorithm for SiC PWM algorithm more effective but rather complex in
inverter implementation. A simplified method is given in Fig 5. It is
The power loss of the SiC devices can be expressed by (6)
essentially an improved subsection synchronization modulation.
assuming the loss from the FRDs is ignored. Eon(k) and Eoff(k)
The Upper Limit in Fig 5 is calculated by the maximum
are the power loss from the kth power switch in an inverter. Ns(k)
allowed switching losses, and the Lower Limit is a function of
is the number of switching on-and-off in a unit time, Ds is a
speed, and can be calculated by (7). C0 is the maximum
constant. For the three-phase half bridge, the upper limit of k is
capacitance, and fsw0 is the frequency corresponding to C0 and
6.
6
∆U. Max (C (n, T)) means the maximum capacitance for a given
Ps  Ds   Eon  k   Eoff  k   N s  k  (6) speed with all torque.
k 1
In the EV’s AC motor drive application, the space vector
modulation method is commonly used. Optimization of the
operation sequence for the resulting space vector is an efficient
way to decrease k in (6). The so-called 7-segment method is
drawn on the left of Fig 3. In this pattern, the numbers of
switching is 6 in a carrier wave period. If combining the zero
vectors in the middle and the ends together, namely, the zero
vector 111 is not used, a different switching pattern is obtained,
which is shown on the right in Fig 3. It can be seen that, the
numbers of switching are reduced by 1/3.
A dilemma is found when reviewing section III-B: on the one
hand, the switching frequency rise can decrease the required
dc-link capacitance and thus the inverter volume. On the other
hand, the switching frequency decrease can rise the inverter
efficiency and cut down the loss which is also helpful for higher
power density. Therefore, an optimal switching frequency is
needed to balance the efficiency and the power density of an Fig. 4. the relationship between the capacitance and the working condition.
inverter. Using this approach, an optimized switching frequency can
Tc Tc
T0(000,111)
be obtained. As a result, the switching loss is reduced and the
power density of the inverter is increased.
T1(100)

T2(110)

Upper Limit

Fig. 3. Different switching pattern

b) Pulse width modulation algorithm considering working


condition Lower Limit
According to the discussion in the section III-B, it is known
that the capacitance is inversely proportional to the switching
frequency for a certain DC voltage fluctuation limit. Choosing
a typical 60kW electrical motor as an example, the relationship 1000 2000 Speed(rpm)
corresponding to (5) is given in Fig 4 (the switching frequency Fig. 5. Improved subsection synchronization modulation.
is kept constant). It is shown that the required capacitance is
changing with the working condition within a predefined C0
f lower_limit  n   f sw0 (7)
voltage fluctuation limit (∆U). The maximum capacitance is Max  C  n, T  
found at the mid-range speed with peak torque
(1800rpm@190Nm). Therefore, this maximum capacitance is
236 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 1, NO. 3, SEPTEMBER 2017

IV. CONCLUSION [15] Z. Liang, "Integrated double sided cooling packaging of planar SiC power
modules" in Proc. IEEE ECCE 2015, pp.4907-4912.
Because of its excellent characteristics in high temperature, [16] H. Yan, S. Fu et al., "Double-sided joining IGBT devices by pressureless
high efficiency and high switching frequency, SiC device has sintering of nanosilver paste" in Proc. IEEE ICEP 2016, pp.386-390.
been used to develop ultra-high power density inverter for EV [17] S. Chungpaiboonpatana and F. Shi, "Packaging of copper/low-k IC devices:
applications. Issues including SiC chip’s current-carrying a novel direct fine pitch gold wirebond ball interconnects onto
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current-carrying capability and inverter switching frequency is [21] J. W. Kolar; T. M. Wolbank; M. Schrodl “Analytical calculation of the
mainly aiming at the purpose of high frequency; while SiC RMS current stress on the DC link capacitor of voltage DC link PWM
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[22] M.A. Brubaker, H. C. Kirbie, and T. A. Hosking, “Integrated DC Link
components, the inverter system level integration technologies, Capacitor/Bus Structures to Minimize External ESL Contribution to
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[23] Liu Jun et al., “Inverter Output Power Density Increasing Technologies for
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ACKNOWLEDGMENT Machines and Systems, ICEMS 2016, November 13-16, 2016 ,
GS2G-4-11.
The authors would like to acknowledge the support and help
[24] L. Solero; V. Serrao; P. Taglioni; F. Crescimbini, “Low-voltage power
of Dr. Huajun Shen from Institute of microelectronics, Chinese electronics building block for automotive applications”, Twenty-First
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APEC '06.
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became an associate professor in 2011. His research direction
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WEN et al: TECHNICAL APPROACHES TOWARDS ULTRA-HIGH POWER DENSITY SIC INVERTER IN ELECTRIC VEHICLE APPLICATIONS 237

Puqi Ning (D’10) was born in Tianjin,


China. She received the Ph.D. degree in
electrical engineering from Virginia Tech,
Blacksburg, US in 2010.
He is full professor in Institute of
Electrical Engineering, Chinese Academy
of Sciences. Dr. Ning has been involved
in high temperature packaging and high density converter
design for more than 10 years.

Qing Guo was born in Tai’an, China. He


received the Ph.D. degree in
Microelectronics from Zhejiang
University, Hangzhou, China.
He is associate professor in electric
engineering, Zhejiang University. Dr. Guo
has been involved in power devices for
about 10 years