Pioneerdj850sm PDF

ORDER NO.
RRV4298
DJM-850-K
DJ MIXER
DJM-850-K
DJM-850-S
THIS MANUAL IS APPLICABLE TO THE FOLLOWING MODEL(S) AND TYPE(S).
Model Type Power Requirement Remarks
DJM-850-K, DJM-850-S SYXJ8 AC 220 V to 240 V

DJM-850-K, DJM-850-S UXJCB AC 120 V
DJM-850-K, DJM-850-S LXJ AC 110 V to 120 V or 220 V to 240 V
DJM-850-K, DJM-850-S KXJ5 AC 220 V

DJM-850-K, DJM-850-S XJCN5 AC 220 V to 240 V
PIONEER CORPORATION 1-1, Shin-ogura, Saiwai-ku, Kawasaki-shi, Kanagawa 212-0031, Japan

PIONEER ELECTRONICS (USA) INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A.
PIONEER EUROPE NV Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE. LTD. 253 Alexandra Road, #04-01, Singapore 159936
PIONEER CORPORATION 2012
K-MZV MAR. 2012 Printed in Japan
1 2 3 4
SAFETY INFORMATION
This service manual is intended for qualified service technicians; it is not meant for the casual do-it-
yourselfer. Qualified technicians have the necessary test equipment and tools, and have been trained
to properly and safely repair complex products such as those covered by this manual.
Improperly performed repairs can adversely affect the safety and reliability of the product and may
void the warranty. If you are not qualified to perform the repair of this product properly and safely, you
should not risk trying to do so and refer the repair to a qualified service technician.
WARNING
B This product may contain a chemical known to the State of California to cause cancer, or birth defects or other reproductive
harm.
Health & Safety Code Section 25249.6 - Proposition 65
(FOR USA MODEL ONLY)

ANY MEASUREMENTS NOT WITHIN THE LIMITS
1. SAFETY PRECAUTIONS
OUTLINED ABOVE ARE INDICATIVE OF A POTENTIAL
The following check should be performed for the
SHOCK HAZARD AND MUST BE CORRECTED BEFORE
continued protection of the customer and service
RETURNING THE APPLIANCE TO THE CUSTOMER.
technician.
C LEAKAGE CURRENT CHECK
Measure leakage current to a known earth ground 2. PRODUCT SAFETY NOTICE
(water pipe, conduit, etc.) by connecting a leakage Many electrical and mechanical parts in the appliance
current tester such as Simpson Model 229-2 or have special safety related characteristics. These are
equivalent between the earth ground and all exposed often not evident from visual inspection nor the protection
metal parts of the appliance (input/output terminals, afforded by them necessarily can be obtained by using
screwheads, metal overlays, control shaft, etc.). Plug replacement components rated for voltage, wattage, etc.
the AC line cord of the appliance directly into a 120 V Replacement parts which have these special safety
AC 60 Hz outlet and turn the AC power switch on. Any characteristics are identified in this Service Manual.
current measured must not exceed 0.5 mA. Electrical components having such features are
identified by marking with a > on the schematics and on
D
the parts list in this Service Manual.
Reading should The use of a substitute replacement component which
Leakage not be above does not have the same safety characteristics as the
Device current 0.5 mA
under tester PIONEER recommended replacement one, shown in the
test parts list in this Service Manual, may create shock, fire,
Test all or other hazards.
exposed metal
surfaces Product Safety is continuously under review and new
instructions are issued from time to time. For the latest
information, always consult the current PIONEER Service
Also test with Manual. A subscription to, or additional copies of,
plug reversed Earth PIONEER Service Manual may be obtained at a nominal
E (Using AC adapter ground
plug as required) charge from PIONEER.
AC Leakage Test
2 DJM-850-K
1 2 3 4
5 6 7 8
CONTENTS
SAFETY INFORMATION.......................................................................................................................................................... 2
1. SERVICE PRECAUTIONS .................................................................................................................................................... 5
1.1 NOTES ON SOLDERING ............................................................................................................................................... 5 A
1.2 NOTES ON REPLACING ............................................................................................................................................... 5
1.3 NOTES ON SERVICING................................................................................................................................................. 5
2. SPECIFICATIONS................................................................................................................................................................. 6
3. BASIC ITEMS FOR SERVICE .............................................................................................................................................. 7
3.1 CHECK POINTS AFTER SERVICING ........................................................................................................................... 7
3.2 JIGS LIST ....................................................................................................................................................................... 7
3.3 PCB LOCATIONS ........................................................................................................................................................... 8
4. BLOCK DIAGRAM .............................................................................................................................................................. 10
4.1 OVERALL WIRING DIAGRAM ..................................................................................................................................... 10
4.2 AUDIO SYSTEM BLOCK DIAGRAM ............................................................................................................................ 12
4.3 DSP BLOCK DIAGRAM................................................................................................................................................ 14
4.4 POWER BLOCK DIAGRAM ......................................................................................................................................... 16 B
5. DIAGNOSIS ........................................................................................................................................................................ 18
5.1 POWER ON SEQUENCE............................................................................................................................................. 18
5.2 TROUBLESHOOTING.................................................................................................................................................. 20
5.3 POWER SUPPLY DIAGNOSIS INFORMATION ........................................................................................................... 31
5.4 VOLTAGE MONITORING CIRCUIT .............................................................................................................................. 32
5.5 ABOUT POLYSWITCH ................................................................................................................................................. 34
5.6 ABOUT PROTECTOR .................................................................................................................................................. 35
5.7 V+34D DIAGNOSIS...................................................................................................................................................... 36
5.8 ERROR INDICATIONS ................................................................................................................................................. 37
5.9 CONNECTION CHECK WITH EACH INTERFACE ...................................................................................................... 38
5.10 HOW TO CONFIRM THE DVS SIGNAL ROUTE ....................................................................................................... 39
C
5.11 IC INFORMATION ...................................................................................................................................................... 43
6. SERVICE MODE ................................................................................................................................................................. 56
6.1 TEST MODE................................................................................................................................................................. 56
6.2 ABOUT THE DEVICE................................................................................................................................................... 71
7. DISASSEMBLY ................................................................................................................................................................... 72
8. EACH SETTING AND ADJUSTMENT ................................................................................................................................ 84
8.1 NECESSARY ITEMS TO BE NOTED........................................................................................................................... 84
8.2 UPDATING OF THE FIRMWARE ................................................................................................................................. 84
8.3 USER SETABLE ITEMS ............................................................................................................................................... 87
8.4 SHEET FOR CONFIRMATION OF THE USER SETTING ........................................................................................... 87
9. EXPLODED VIEWS AND PARTS LIST............................................................................................................................... 88
9.1 PACKING SECTION ..................................................................................................................................................... 88 D
9.2 EXTERIOR SECION..................................................................................................................................................... 90
9.3 BOTTOM SECTION...................................................................................................................................................... 92
9.4 CONTROL PANEL SECTION (1/2)............................................................................................................................... 94
9.5 CONTROL PANEL SECTION (2/2)............................................................................................................................... 96
10. SCHEMATIC DIAGRAM .................................................................................................................................................... 98
10.1 INPUT ASSY (1/5) ...................................................................................................................................................... 98
10.2 INPUT ASSY (2/5) .................................................................................................................................................... 100
10.3 INPUT ASSY (3/5) .................................................................................................................................................... 102
10.4 INPUT ASSY (4/5) .................................................................................................................................................... 104
10.5 INPUT ASSY (5/5) .................................................................................................................................................... 106
10.6 MIC1 and MTRM ASSYS ......................................................................................................................................... 108
10.7 MAIN ASSY (1/19).................................................................................................................................................... 110 E
10.8 MAIN ASSY (2/19).................................................................................................................................................... 112
10.9 MAIN ASSY (3/19).................................................................................................................................................... 114
10.10 MAIN ASSY (4/19).................................................................................................................................................. 116
10.11 MAIN ASSY (5/19).................................................................................................................................................. 118
10.12 MAIN ASSY (6/19).................................................................................................................................................. 120
10.13 MAIN ASSY (7/19).................................................................................................................................................. 122
10.14 MAIN ASSY (8/19).................................................................................................................................................. 124
10.15 MAIN ASSY (9/19).................................................................................................................................................. 126
10.16 MAIN ASSY (10/19)................................................................................................................................................ 128
DJM-850-K 3
5 6 7 8
1 2 3 4
10.17 MAIN ASSY (11/19) ................................................................................................................................................130

10.18 MAIN ASSY (12/19) ................................................................................................................................................132
A 10.19 MAIN ASSY (13/19) ................................................................................................................................................134
10.20 MAIN ASSY (14/19) ................................................................................................................................................136
10.21 MAIN ASSY (15/19) ................................................................................................................................................138
10.22 MAIN ASSY (16/19) ................................................................................................................................................140
10.23 MAIN ASSY (17/19) ................................................................................................................................................142
10.24 MAIN ASSY (18/19) ................................................................................................................................................144
10.25 MAIN ASSY (19/19) ................................................................................................................................................146
10.26 SEC/HP ASSY (1/2)................................................................................................................................................148
10.27 SEC/HP ASSY (2/2)................................................................................................................................................150
10.28 USBI and HPJK ASSYS..........................................................................................................................................152
10.29 PNLA ASSY (1/2)....................................................................................................................................................154
10.30 PNLA ASSY (2/2)....................................................................................................................................................156
B
10.31 PNLB and FADC ASSYS ........................................................................................................................................158
10.32 FAD1 to FAD4 ASSYS ............................................................................................................................................160
10.33 REG ASSY..............................................................................................................................................................161
10.34 TRANS, PRIMARY and ACSW ASSYS ..................................................................................................................162
10.35 WAVEFORMS .........................................................................................................................................................164
11. PCB CONNECTION DIAGRAM ......................................................................................................................................168
11.1 INPUT, MIC1 and MTRM ASSYS .............................................................................................................................168
11.2 MAIN ASSY...............................................................................................................................................................172
11.3 SEC/HP, USBI and HPJK ASSYS.............................................................................................................................178
11.4 PNLA ASSY ..............................................................................................................................................................182
11.5 PNLB and FADC ASSYS ..........................................................................................................................................186
C 11.6 FAD1 to FAD4 and REG ASSYS...............................................................................................................................190
11.7 TRANS, PRIMARY and ACSW ASSYS ....................................................................................................................192
12. PCB PARTS LIST ............................................................................................................................................................196
4 DJM-850-K
1 2 3 4
5 6 7 8
1. SERVICE PRECAUTIONS
1.1 NOTES ON SOLDERING
• For environmental protection, lead-free solder is used on the printed circuit boards mounted in this unit. A
Be sure to use lead-free solder and a soldering iron that can meet specifications for use with lead-free solders for repairs
accompanied by reworking of soldering.
• Compared with conventional eutectic solders, lead-free solders have higher melting points, by approximately 40 ºC.
Therefore, for lead-free soldering, the tip temperature of a soldering iron must be set to around 373 ºC in general, although
the temperature depends on the heat capacity of the PC board on which reworking is required and the weight of the tip of
the soldering iron.
Do NOT use a soldering iron whose tip temperature cannot be controlled.
Compared with eutectic solders, lead-free solders have higher bond strengths but slower wetting times and higher melting
B
temperatures (hard to melt/easy to harden).
The following lead-free solders are available as service parts:

• Parts numbers of lead-free solder:
GYP1006 1.0 in dia.
GYP1007 0.6 in dia.
GYP1008 0.3 in dia.
1.2 NOTES ON REPLACING

The part listed below is difficult to replace as a discrete component part.
When the part listed in the table is defective, replace whole Assy.
Parts that is Diffcult to Replace
Assy Name PCB Assy Part No.
Ref No. Function Part No. Remarks
IC1405 13V → 3.3V DC/DC converter BD9328EFJ IC with heat-pad
IC1408 13V → 1.2V DC/DC converter BD9328EFJ IC with heat-pad
IC2603 USB UCOM ADSP-BF525BBCZ-5A BGA
MAIN Assy DWX3360
IC3007 FPGA XC3S50A-4FTG256C BGA
D
IC3201 DSP D810K013BZKB400 BGA
IC201 DAC PCM1691DCA IC with heat-pad
1.3 NOTES ON SERVICING

VOLTAGE MONITORING
This unit always monitors for power failure and will shut itself off immediately after an error is detected.
E
A power failure is indicated with flashing of the SETUP LED (Intervals: 250 ms [Lit 125 ms/Unlit 125 ms]).
All the LEDs other than SETUP LED will be unlit, and all the switches and VRs will be disabled.
Repair the unit according to the diagnostic procedures described in “5.3 INFORMATION ON POWER DIAGONOSTICS.”
CONFIRMATION OF USER-SETTING
This product has user- and club-setting data. Be sure to confirm those data before starting repair, although changing them
may not have a large effect. Use the Check Sheet in “8.4,” to which you can transcribe the settings, as required.
The settings are stored in Flash ROM (IC2802) on the MAIN Assy.
To display the [USER SETUP] screen, hold [SETUP (WAKE UP)] pressed for at least 1 sec.
To display the [CLUB SETUP] screen, press [POWER] (ON) while holding [SETUP (WAKE UP)] pressed.
F
DJM-850-K 5
5 6 7 8
1 2 3 4
2. SPECIFICATIONS
A General Rated output level / Load impedance

Power requirements........ AC 220 V to 240 V, 50 Hz/ 60 Hz (SYXJ8) MASTER1.............................................................. +24 dBu/10 kΩ
AC 120 V, 60 Hz (UXJCB) MASTER2.............................................................. +20 dBu/10 kΩ
AC 110 V to 120 V or 220 V to 240 V, 50 Hz/ 60 Hz (LXJ) Crosstalk
AC 220 V, 60 Hz (KXJ5) LINE......................................................................................82 dB
AC 220 V to 240 V, 50 Hz/ 60 Hz (XJCN5) Channel equalizer characteristic
Power consumption ....................................................32 W (SYXJ8) HI ...........................................................–26 dB to +6 dB (13 kHz)
30 W (UXJCB) MID..........................................................–26 dB to +6 dB (1 kHz)
32 W (LXJ) LOW ........................................................–26 dB to +6 dB (70 Hz)
29 W (KXJ5) Microphone equalizer characteristic
32 W (XJCN5) HI .........................................................–12 dB to +12 dB (10 kHz)
Power consumption (standby) .............................................. 0.45 W LOW ....................................................–12 dB to +12 dB (100 Hz)
Main unit weight.............................................................. 7 kg (17 lb) Input / Output terminals
Max. dimensions............. 320 mm (W) × 108 mm (H) × 381 mm (D) PHONO input terminal
B
(12.6 in. (W) × 4.3 in. (H) × 15 in. (D)) RCA pin jack.........................................................................2 sets
Tolerable operating temperature CD/LINE input terminal
............................................. +5 °C to +35 °C (+41 °F to +95 °F) RCA pin jacks .......................................................................4 sets
Tolerable operating humidity............ 5 % to 85 % (no condensation) LINE input terminal
RCA pin jack.........................................................................2 sets
Audio Section MIC1 input terminal
Sampling rate ........................................................................ 96 kHz XLR connector/phone jack (Ø 6.3 mm) ................................. 1 set
MASTER D/A converter..........................................................32 bits MIC2 input terminal
Other A/D and D/A converters................................................24 bits Phone jack (Ø 6.3 mm).......................................................... 1 set
Frequency characteristic RETURN Input terminals
CD/LINE ...............................................................20 Hz to 20 kHz Phone jack (Ø 6.3 mm).......................................................... 1 set
S/N ratio (rated output, A-WEIGHTED) MASTER output terminal
PHONO ................................................................................92 dB XLR connector....................................................................... 1 set
C CD/LINE .............................................................................106 dB RCA pin jacks ........................................................................ 1 set
MIC1, MIC2 ..........................................................................84 dB BOOTH output terminal
Total harmonic distortion (20 kHzBW) Phone jack (Ø 6.3 mm).......................................................... 1 set
CD/LINE — MASTER1..................................................... 0.004 % REC OUT output terminal
Standard input level / Input impedance RCA pin jacks ........................................................................ 1 set
PHONO ................................................................. –52 dBu/47 kΩ SEND output terminal
CD/LINE ................................................................ –12 dBu/47 kΩ Phone jack (Ø 6.3 mm).......................................................... 1 set
MIC1 ..................................................................... –52 dBu/8.5 kΩ DIGITAL MASTER OUT coaxial output terminal
MIC2 ...................................................................... –52 dBu/49 kΩ RCA pin jacks ........................................................................ 1 set
RETURN................................................................ –12 dBu/49 kΩ MIDI OUT terminal
Standard output level / Load impedance / Output impedance 5P DIN ................................................................................... 1 set
MASTER1........................................+6 dBu/10 kΩ/360 Ω or lower PHONES output terminal
MASTER2........................................+2 dBu/10 kΩ/390 Ω or lower Stereo phone jack (Ø 6.3 mm) .............................................. 1 set
D
REC OUT ..........................................–8 dBu/10 kΩ/22 Ω or lower USB terminal
BOOTH............................................+6 dBu/10 kΩ/360 Ω or lower B type .................................................................................... 1 set
SEND............................................... –12 dBu/10 kΩ/1 kΩ or lower CONTROL terminal
PHONES ..........................................+8.5 dBu/32 Ω/10 Ω or lower Mini phone jack (Ø 3.5 mm) .................................................4 sets
• The specifications and design of this product are subject to

change without notice.
• Be sure to use the [MASTER1] terminals only for a balanced
output. Connection with an unbalanced input (such as RCA)
using an XLR to RCA converter cable (or converter adapter), etc.,
may lower the sound quality and/or result in noise.
For connection with an unbalanced input (such as RCA), use the
[MASTER2] terminals.
E
Accessories
• Driver software CD-ROM
(DXX2694)
• USB cable
(DDE1128)
• Power cord
(SYXJ8, LXJ: ADG7062)
(UXJCB: DDG1108)
(KXJ5: ADG7115)
(XJCN5: ADG7105)
• Operating instructions
(SYXJ8: DRB1604, DRB1605)
F (UXJCB: DRB1606)
(LXJ: DRB1607)
(KXJ5: DRB1608)
(XJCN5: DRB1609)
6 DJM-850-K
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5 6 7 8
3. BASIC ITEMS FOR SERVICE

3.1 CHECK POINTS AFTER SERVICING
A
Items to be checked after servicing / DJM
To keep the product quality after servicing, confirm recommended check points shown below.
No. Procedures Check points
The firmware version must be the latest one.
1 Check the firmware version in Test mode.
If it is not the latest one, be sure to update it.
Confirm whether the customer complain has been solved.
If the customer complain occurs with the specific source, such as The customer complain must not be reappeared.
2
Mic, each Input, Fader, Equalizer, and Trim, input that specific Audio and operations must be normal.
source for checking.
Check the analog audio input
3 (Check the MIC1, MIC2 and RETURN.) (Make the analog Audio and operations must be normal. B
connections with CDJ player, analog player and MIC.)
Check the analog audio output (MASTER1, 2, REC, BOOTH and
4 Audio and operations must be normal.
SEND.) (Make the analog connection with CDJ player.)
5 Check the digital audio input/output Audio for each channel and operations must be normal.
6 Check DVS signal route. Make sure that PC applications function properly and that the
audio signals and operations of each channel are normal.
7 Check the headphones output. There must be no errors, such as noise, in the audio output.
Check playback, using the fader function.
There must be no errors in audio output and operations of each
8 (Select the fader function then check operations of each channel
channel.
with audio signals via the DSP.)
Check the connection of each interface.
9 C
USB B The device must be properly recognized by the PC.
Make sure that all buttons and controls on the main unit
10 Check the buttons and controls.
function properly.
11 Check the FL displays and LEDs. Check that all the FL displays and LEDs light in Test mode.
13 Check the user settings. They must be returned to those set before repair.
13 Check the appearance of the product. No scratches or dirt on its appearance after receiving it for service.
See the table below for the items to be checked regarding audio.
Item to be checked regarding audio
Distortion
D
Noise
Volume too low
Volume too high
Volume fluctuating
Sound interrupted
3.2 JIGS LIST

E
Jigs List
Jig Name Part No. Purpose of use / Remarks
USB cable GGP1193 for PC connection
Lubricants and Glues List
Name Part No. Remarks

Silicon grease GEM1057 Refer to "9.3 BOTTOM SECTION".
F
Lubricating oil GYA1001 Refer to "9.4 CONTROL PANEL SECTION (1/2)".
DJM-850-K 7
5 6 7 8
1 2 3 4
3.3 PCB LOCATIONS
B MIC1 ASSY
MTRM ASSY C F USBI ASSY A INPUT ASSY R ACSW ASSY
• Bottom view
PNLA H Q PRIMARY
ASSY ASSY
D MAIN
ASSY
PNLB I E SEC/HP
ASSY ASSY
C
FADC J
ASSY
G HPJK ASSY O REG ASSY P TRANS ASSY

FAD1 ASSY K N FAD4 ASSY
FAD2 ASSY L M FAD3 ASSY
NOTES: - Parts marked by “NSP” are generally unavailable because they are not in our Master Spare Parts List.
- The > mark found on some component parts indicates the importance of the safety factor of the part.
Therefore, when replacing, be sure to use parts of identical designation.
Mark No. Description Part No. Mark No. Description Part No.
LIST OF ASSEMBLIES
E NSP 1..MOTHER ASSY DWM2464 NSP 1..SUB ASSY (SYXJ8, KXJ5, XJCN5) DWM2471
2..MAIN ASSY DWX3360 NSP 1..SUB ASSY (UXJCB) DWM2472
2..USBI ASSY DWX3361 NSP 1..SUB ASSY (LXJ) DWM2466
2..ACSW ASSY DWR1515
NSP 1..AUDIO ASSY DWM2465 2..TRANS ASSY (SYXJ8, KXJ5, XJCN5) DWR1516
2..REG ASSY DWR1510
2..SEC/HP ASSY DWR1511 2..TRANS ASSY (UXJCB) DWR1517
2..INPUT ASSY DWX3362 2..TRANS ASSY (LXJ) DWR1512
2..HPJK ASSY DWX3363 2..PRIMARY ASSY (SYXJ8, KXJ5, XJCN5) DWR1519
2..PRIMARY ASSY (UXJCB) DWR1520
2..FAD1 ASSY DWX3366 2..PRIMARY ASSY (LXJ) DWR1509
2..FAD2 ASSY DWX3367
2..FAD3 ASSY DWX3368 2..PNLB ASSY DWX3365
F 2..FAD4 ASSY DWX3369 2..MIC1 ASSY DWX3371
2..FADC ASSY DWX3370 2..MTRM ASSY DWX3372
1..PNLA ASSY DWX3359
8 DJM-850-K
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DJM-850-K 9
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1 2 3 4
4. BLOCK DIAGRAM
4.1 OVERALL WIRING DIAGRAM
A MIDI OUT MIC2 CH1
JA4602 JA4601 JA4001 JA
- When ordering service parts, be sure to refer to "EXPLODED VIEWS DKN1188-A DKN1614-A DKB1083-A D
and PARTS LIST" or "PCB PARTS LIST". L

- The > mark found on some component parts indicates the importance
MIC1 R
of the safety factor of the part. JA9001
DKB1108-A
6 MIC1_COLD
5 MIC1_COLD
MIC1_HOT
MIC1_HOT
Therefore, when replacing, be sure to use parts of identical designation. PHONO
CKS3533-A
CD/LINE CD/L
GNDA
GNDA
- : The power supply is shown with the marked box.
C
CN9001
B
1
4
3
2
PF03PP-B12 PF03PP2B07 PF03PP6B07 PF03PP4B12
MTRM ASSY 6P BtoB
MIC1 ASSY
1 V+3R3D_REFA
3 V+3R3D_REFA
1 V+3R3D_REFA
3 V+3R3D_REFA
CKS3561-A
(DWX3372)
3 GNDD_REFA
1 GNDD_REFA
3 GNDD_REFA
1 GNDD_REFA
CN4601
L= 125mm L= 75mm L= 75mm L= 125mm
2 VR_FADER1
2 2 VR_FADER2
2 2 VR_FADER3
2 2 VR_FADER4
WHITE RED BLUE YELLOW
2
MIC1_COLD 6
MIC1_COLD 5
4
3
1
(DWX3371)
MIC1_HOT
MIC1_HOT
GNDA
GNDA
KM200NA3R
KM200NA3E
KM200NA3Y
KM200NA3
CN6609
CN6610
CN6612
CN6611
CN8801
2
CN4602
B
1
3
1
3
1
3
1
3
CKS3533-A CKS3561-A
GND_PO
GND_PO
KM200NA4L
KM200NA3R
KM200NA3E
KM200NA3Y
4 GNDIN_MIC2
5 GNDIN_MIC2
7 GNDIN_MIC1
8 GNDIN_MIC1
V+15A
V-15A
MIC1_TRIM_IN 6 6 MIC1_TRIM_IN
KM200NA3
CN4801
2
2 MIDI_TXD
2
6P BtoB
MIC1_TRIM_OUT 5 5 MIC1_TRIM_OUT
CN7201
CN7401
CN7601
1
3 V+3R3REF2 3
1 V+3R3REF2 1
3
3 V+3R3REF2 3
CN7801
1 V+3R3REF2 1
3 GNDREF2 3
GND_MIC2 4 4
3 GNDD
GND_MIC2
VKN1285-A
1 V+5D
6 MIC2
1 GNDREF2
3 GNDREF2
1 GNDREF2
2
3
4
1
CN4802
GND_MIC1 3 3 GND_MIC1
2 VR_FD1
2 VR_FD2
2 VR_FD3
2 VR_FD4
MIC2_TRIM_OUT 2 2 MIC2_TRIM_OUT
MIC2_TRIM_IN 1 1 MIC2_TRIM_IN
K L M N SCREW PLATE
KN201 JA201 JA202
CONTROL
VNE1948-A VKN1034-A VKN1034-A
DIGITAL
OUT
JA3401
DKB1089-A
FAD1 ASSY FAD2 ASSY FAD3 ASSY FAD4 ASSY CH1

CH2
CH3
CH4
(DWX3366) (DWX3367) (DWX3368) (DWX3369)

CN6601
VKN1255-A
VKN1428-A-TBB
CN1001 USBI ASSY
V+3R3D 24 24 V+3R3D
(DWX3361)
C H H 1/2, H 2/2 GNDD 23
FPGA_CLK 22
GNDD 21
23 GNDD
22 FPGA_CLK
21 GNDD
VKN1429-A-TBB
FPGA_TX_DAT 20 20 FPGA_TX_DAT
PNLA ASSY FPGA_RX_DAT 19 19 FPGA_RX_DAT
CN1003
FPGA_SIGNAL 18 18 FPGA_SIGNAL
JA3801
GNDD 17 17 GNDD
B Type DKN1237-A
(DWX3359)
1
2
3
4
5
6
7
8
SUB_INT 16 16 SUB_INT
MIDI_TXD
GNDD
GNDIN_MIC2
GNDIN_MIC2
GNDIN_MIC1
GNDIN_MIC1
V+5D
MIC2
DDD1599-
GND_USB
GND_USB
SUB_CTRL 15 15 SUB_CTRL
V+5VBUS
D+USB
SUB_CPU_RESET 14 14 SUB_CPU_RESET
D-USB
KM200NA5L
GNDD 13 24P FFC 13 GNDD
CN3801
CH4_TRIM 12 12 CH4_TRIM
CN6603 L=244mm
1
2
3
4
5
VR_FADER4 11 11 VR_FADER4
VKN1258-A CH3_TRIM 10 P=1.0mm 10 CH3_TRIM
GND_REFA 9 9 GND_REFA
27 LED_OUT15
26 LED_MTX_SEL7A
25 GND_LED
24 CH_FADER_LED
GND_REFA 5 5 GND_REFA
23 GNDD
CROSS_FADER 4 4 CROSS_FADER
22 EFX_CH_SEL
21 KEY_IN3
20 ENC1_1
19 KEY_IN4
V+3R3D_REFA 1 1 V+3R3D_REFA DDA1043-
18 ENC1_0 L=170mm PH
17 KEY_IN5 V+5D_LED 17 17 V+5D_LED
SHIELDED
D 16 KEY_MTX3 GNDD_LED 16 16 GNDD_LED
AKM1276-A-TBB
GNDD_LED 14
CN2602
14 KEY_MTX4 14 GNDD_LED
1
2
3
4
5
12 KEY_MTX5 GNDD_LED 12 DDD1600-
GND_USB
GND_USB
D-USB
D+USB
V+5VBUS
12 GNDD_LED
11 EFX_ON/OFF V+5D_LED 11 11 V+5D_LED
10 GNDD_REFB_PA GNDD_LED 10 17P FFC 10 GNDD_LED
9 GNDD GNDD 9 9 GNDD
DDD1601- 8 V+34D 8
L=316mm
HP_MIX 8 V+34D
27P FFC 7 GNDD 7 P=1.0mm
CROSS_FADER 7 GNDD
L=346mm 6 HP_LEVEL GNDD_34D 6 6 GNDD_34D
P=1.0mm 5 V+3R3_REFA_PA EFX_ON/OFF 5 5 EFX_ON/OFF
4 LEVEL_DEPTH MVR_MUTE 4 4 MVR_MUTE
3 GNDD_REFA_PA V+3R3E 3 3 V+3R3E
2 BOOTH_LEVEL STBY_KEY 2 2 STBY_KEY
REVERSE 1 V+3R3_REFB_PA STBY_LED 1 1 STBY_LED
CN6602 VKN1421-A-TBB
VKN1248-A
CN1002
CN7001
I
GND_PO
GND_PO
E VKN1258-A
PNLB ASSY
V+15A
V-15A
KM200NA4
LED_OUT15 27
(DWX3365)
CN2
LED_MTX_SEL7A 26
2
3
4
1
GND_LED 25 PF04PP-S17
CH_FADER_LED 24 L=175mm
GNDD 23
EFX_CH_SEL 22
KEY_IN3 21
HPJK ASSY
ENC1_1 20
KEY_IN4 19 (DWX3363)
ENC1_0 18
FADC ASSY E
J
KEY_IN5 17
KEY_MTX3 16
KEY_IN6 15
KEY_MTX4 14
KEY_IN7 13
(DWX3370) G CN9201 CN101
KEY_MTX5 12
EXF_ON/OFF 11
JA9201
DKN1622-A
KM200NA4L
HP_L_OUT 1
KM200NA4
1 HP_L_OUT
SEC
GNDD_REFB_PA 10
GNDD
HP_MIX
9
8
CN7002
KM200NA3
CN8001
KM200NA3L PHONES
GNDHP
GNDHP
HP_R_OUT
2
3
4
2
3
4
GNDHP
GNDHP
HP_R_OUT
(DW
CROSS_FADER 7 3 V+3R3REF2 3 3 3 V+3R3REF2
2 VR_CFD 2 2 2 VR_CFD
HP_LEVEL 6 1 GNDREF2 1 1 1 GNDREF2
F V+3R3_REFA_PA
LEVEL_DEPTH
5
4
GNDD_REFA_PA 3
PF04PP-S05
BOOTH_LEVEL 2 PF03PP-B07 L=50mm
V+3R3_REFB_PA 1 L= 75mm
10 DJM-850-K
1 2 3 4
5 6 7 8
CH1 CH2 CH3 CH4 RETURN A

JA4001 JA4002 JA4201 JA4202 JA4401 JA4402
DKB1083-A DKB1083-A DKB1083-A DKB1083-A XKB3066-A DKN1614-A
L L L L AC POWER CORD AC POWER CORD

UXJCB:DDG1108-A SYXJ8/LXJ:ADG7062-A
R R R R L(MONO) R KXJ5:ADG7115-A
XJCN5:ADG7105-B
PHONO LINE LINE PHONO
AC INLET ASSY AC INLET ASSY
CD/LINE CD/LINE CD/LINE CD/LINE SYXJ8/KXJ5/XJCN5/LXJ
UXJCB: DKP3915-A
B
:DKP3916-A
ACSW ASSY
C1 ASSY
WX3371)
A A 1/5 - A 5/5 (DWR1515)
INPUT ASSY (DWX3362) R
!
L N B
JP9401
4 GNDIN_MIC2
5 GNDIN_MIC2
7 GNDIN_MIC1
8 GNDIN_MIC1
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH4
GNDIN_CH4
1 1 GNDIN_CH4
1 3 GNDIN_CH4
1 5 GNDIN_CH4
1 6 GNDIN_RET
1 7 GNDIN_RET
1 9 GNDIN_RET
2 1 GNDIN_RET
DKP3847-A
1 0 GNDIN_CH1
1 1 GNDIN_CH1
1 3 GNDIN_CH1
1 5 GNDIN_CH1
1 7 GNDIN_CH1
1 8 GNDIN_CH2
1 9 GNDIN_CH2
2 1 GNDIN_CH2
2 3 GNDIN_CH2
2 5 GNDIN_CH2
L N
CH3_SEL
1 2 CH4_SEL
2 MIDI_TXD
L=60mm
1 4 CH1_SEL
2 2 CH2_SEL
2 0 RET_IN
CH3_R
1 4 CH4_R
2 2 RET_R
CH3_L
1 0 CH4_L
1 8 RET_L
1 6 CH1_R
2 4 CH2_R
1 2 CH1_L
2 0 CH2_L
3 GNDD
VKN1282-A
VKN1285-A
1 V+5D
6 MIC2
9 MIC1
!
CN4802
CN4803
!
1
2
3
4
5
6
7
8
9
L N
BLUE VIOLET
L N
L CN3001 1 2
BOOTH MASTER1 SEND RKP1751-A ! 2 1 !
JA502 JA503 JA401 JA301 JA302 JA601 JA602 LIVE NEUTRAL CN3002
DKN1622-A DKN1622-A DKB1083-A DKB1093-A DKB1093-A DKN1614-A DKN1614-A B2P3-VH
L L
DDD1597- L R
R R L(MONO) R
25P FFC
L R
L=70mm
P=1.0mm MASTER2
REC C
DDD1598- CN1201 JP3001
VKN1429-A-TBB
L=70mm P=1.0mm 22P FFC

VKN1426-A-TBB
AKM1274-A-TBB PF03PG-Q07(L=75mm)
CN1004
CN1003
V+11E_UNREG 3 3 V+11E_UNREG
CH4_L 10
GNDIN_CH4 11
CH4_SEL 12
GNDIN_CH4 13
CH4_R 14
GNDIN_CH4 15
GNDIN_RET 16
GNDIN_RET 17
RET_L 18
GNDIN_RET 19
RET_IN 20
GNDIN_RET 21
RET_R 22
1
2
3
4
5
6
7
8
9
GNDIN_CH1 10
GNDIN_CH1 11
CH1_L 12
GNDIN_CH1 13
CH1_SEL 14
GNDIN_CH1 15
CH1_R 16
GNDIN_CH1 17
GNDIN_CH2 18
GNDIN_CH2 19
CH2_L 20
GNDIN_CH2 21
CH2_SEL 22
GNDIN_CH2 23
CH2_R 24
GNDIN_CH2 25
1
2
3
4
5
6
7
8
9
GNDD 2 2 GNDD
GNDIN_CH3
CH3_L
GNDIN_CH3
CH3_SEL
GNDIN_CH3
CH3_R
GNDIN_CH3
GNDIN_CH4
GNDIN_CH4
MIDI_TXD
GNDD
GNDIN_MIC2
GNDIN_MIC2
GNDIN_MIC1
GNDIN_MIC1
V+5D
MIC2
MIC1
RELAY_CONT 1 1 RELAY_CONT
Board In
Q
PRIMARY ASSY
D D 1/19 - D 19/19 (DWR1519: SYXJ8, KXJ5,
H
MAIN ASSY (DWX3360) XJCN5 )
D
(DWR1520: UXJCB)
(DWR1509: LXJ)
OTHERS LXJ ONLY

POWER_RESET_A
CN3004 CN3003
V+13D_UNREG
B2P3-VH B3P5-VH
GNDA_HP
GNDA_HP
GND_PO
GND_PO
! !
AKP7199-A
HP_R+
HP_L+
V+15A
HP_R-
GNDD
GNDD
GNDD
HP_L-
GNDA
GNDA
V-15A
MUTE
V+5A
1
2
3
CN1005
220-240V
NEUTRAL
19
18
17
16
15
14
13
12
11
10
LIVE
9
8
7
6
5
4
3
2
1
19P BRIDGE CONNECTOR PF13EE-S17

L=175mm
OTHERS
GND_PO
GND_PO
CN3101
AKM7077-A
CN3
V+15_AC 13 13
E
GNDD 19
GNDD 18
POWER_RESET_A 17
MUTE 16
GNDD 15
V+13D_UNREG 14
GND_PO 13
V-15A 12
GND_PO 11
V+15A 10
V+15A
V+15_AC
S13B-EH
9
8
7
6
5
4
3
2
1
V-15A
KM200NA4
NC 12 12 NC Board In
GNDA
GNDA
HP_L+
GNDA_HP
HP_L-
GNDA_HP
HP_R-
HP_R+
V+5A
P JP3101:DDX1285-A
P=2.5mm
V+5A_AC1 11 11 ! LXJ
CN2
V+5A_AC1
L=140mm 3pin for LXJ
2
3
4
1
V+5A_AC2 10 10 V+5A_AC2
NC 9 9 NC ! JP3102:DDX1284-A
V-15_AC 8 8 V-15_AC L=140mm 2pin for EXCEPT LXJ
V+13D_AC1
GNDA 7
6
7
6
GNDA
V+13D_AC1
TRANS ASSY
V+13D_AC2
GNDD
5
4
5
4
V+13D_AC2
GNDD
(DWR1516: SYXJ8, KXJ5, XJCN5)
V+HP_AC
GNDHP 3
2
3
2
GNDHP
V+HP_AC (DWR1517: UXJCB)
E E 1/2, E 2/2 V-HP_AC
CN1
B13B-EH
1 1 V-HP_AC
JP3105
(DWR1512: LXJ)
P=2.5mm DE007WF0
SEC/HP ASSY CN4

52147-1010
CN5001 P=2.0mm
52147-1010
(DWR1511) V+5A_UNREG
GND5A_UNREG
1
2
1
2
V+5A_UNREG
GND5A_UNREG O
D20PYY1010E
GND5A 3 3 GND5A
V+5A 4 4 V+5A
REG ASSY
L=100mm
5 5
V-15A_UNREG
V-15A V-15A
F
(DWR1510)
6 6 V-15A_UNREG
GNDA_UNREG 7 7 GNDA_UNREG
GND_PO 8 8 GND_PO
V+15A_UNREG 9 9 V+15A_UNREG
V+15A 10 10 V+15A
DJM-850-K 11
5 6 7 8
1 2 3 4
4.2 AUDIO SYSTEM BLOCK DIAGRAM
A SUB ucom
IC6601
DYW1809- /J
KE Y MA TRI X
(UPD78F1162AGF) CSI (SPI)
KEY_IN0 7
V R MA T RIX
VR_IN1 6
MA IN U
VR_FADER 1
IC28
K FAD1 ASSY C hannel 1 F ader
DYW180
VR_FADER 2 (UPD78F11
L FAD2 ASSY C hannel 2 F ader
Serial F LA SH (4Mbit)
VR_FADER 3 IC2802 SPI
M FAD3 ASSY C hannel 3 F ader
DYW1807- /J
B VR_FADER 4
MX25L4006EM2I- 12G
SPI
N FAD4 ASSY C hannel 4 F ader
Blackfin Flash
SPI
CROSS_FADER
FPGA Flash
J FADC ASSY C ross F ader
EFFECT_ON/OFF
E F FEC T_ON/ OFF
SPI (BOOT)
F
MX25L4006EM2I- 12G Serial F LA SH (4Mbit) SPI

IC3008 IC
DSP
A INPUT ASSY DYW1808- /J
XC 3S50A
SDRA M (256M)
IC3202
MIDI_TXD
MIDI DSP_BUS D
16bit
16bit
EMIF B SPI EM
C B MIC1 ASSY IC4601
NJM4580MD
IC4601
DSPB_BUS_CLK
A
7
MIC 1 (mono) 5 3
1
98.304MHz
IC4603
NJM4580MD IC4603
7 1
MIC 2 (mono) 5 3
1 A DC (single) 9
2 IC2401 ADAT_MIC_AN ADAT_DOU
AK 5358AET
IC1602
IC4002 NJM4580MD
NJM2121MD 3 1 7
C hannel 1
CD/LIN 7
6 CH 1_L 4 5
A DC (differntial)
5 15
7 2 IC1604 ADAT_CH 1_
1 7
PHONO RIAA 1 CH 1_TRIM
2 CH 1_R 24 25 PCM 1804
ADAT_MASTE
5
IC4001
SELEC IC1601
NJM4580D NJM4580MD
IC1802
IC4004 NJM4580MD
NJM2121MD 1 7
C hannel 2
LINE 3
4 5
2 6 CH 2_L
5 A DC (differntial) 15
D CD/LIN
7
2 1 7
CH 2_R 24 25
IC1804
PCM 1804
ADAT_CH 2_
1
CH 2_TRIM 5
SELEC IC1801
NJM4580MD
ADAT_RE
IC2002
IC4202 NJM4580MD
NJM2121MD 1 7
C hannel 3
LINE 3
2
5
6 CH 3_L
4 5
A DC (differntial)
ADAT_BOOTH
15
7
CH 3_TRIM
IC2004 ADAT_CH 3_ DSP
CD/LIN 1 2 1 7
CH 3_R 24 25 PCM 1804
5
SELEC IC2001
NJM4580MD IC 3201
IC2202
IC4204 NJM4580MD D810K013BZKB400- K
C hannel 4
NJM2121MD 1 7
CD/LIN 3
4 5
7
6 CH 4_L A DC (differntial)
5 15
PHONO 7 2
1 7
IC2204 ADAT_CH 4_A
1 2 CH 4_R 24 25 PCM 1804
CH 4_TRIM 5 ADAT_SEN
IC4201
SELEC IC2201
NJM4580D NJM4580MD
E
IC4401
NJM4565MD
RET URN 3 5 1 7 A DC (single) 9
IC2402
(T S) 1 2 AK 5358AET
ADAT_RETURN_
ADAT_H
MIDI_TXD_USB
UART
F USBI ASSY (Downloard & other)
SPI (Boot)
ADAT_USBIN 1
USB B ADAT_USBIN 1
USB differential 90 ADAT_USBIN 2 ADAT_USB
ADAT_USBIN 2
CH 1 4 USB Ucom ADAT_USBIN 3
ADAT_USB
ADAT_USBIN 3
ADAT_USBIN 4
IC2603 ADAT_USBIN 4 ADAT_USB
ADSP - BF 525BBCZ - 5A- K ADAT_USB
USB_S_CLK 106.5MHz
F
SDRA M (64M)
IC2604 16bit
M12L64164A- 5TG 2M-
12 DJM-850-K
1 2 3 4
5 6 7 8
FL H PNLA ASSY A nalog A udio

Digital A udio A
MUT E signal
LED
(MA T RIX) C ontrol Signal
I PNLB ASSY PO WER
RESET_OUT
D MAIN ASSY
90 1 RE SET IC
IC2801
S- 80927CNMC - G8X
MA IN Ucom 10
IC2803 RELAY Control Q PRIMARY ASSY
DYW1806- /J
MVR_MUTE(MASTER TRIM)
(UPD78F1167AGF) 11 SUB TRANS
CPU_MUTE
SPI
RELAY
MCPU_BUS
B
16bit
SPI
SPI
MA IN T RA NS
OT)
F PGA RESET
SPI
IC3007 CONTROL Descrete
Mut e circuit
XC 3S50A- 4FTG 256C
MUTE_OUT
CSI (SPI) DIT_SI/SO/SCK
DIGITAL DATA
DSP_BUS (48k/ 96k)
16bit
SPI EMIF A C O NT ROL 1ch

AD MIN 11bit
C O NT ROL 2ch C
C O NT ROL 3ch
C O NT ROL 4ch
DIT
IC3405 17 DIGIT A L O UT
C_AN ADAT_DOUT
AK 4114VQ
IC301 IC303
NJM4580MD NJM2114D
2 1 5 7
1_ 3 6
ADAT_MASTER 5 7 1
MA ST ER 1
2
6 3
IC301 IC303
NJM4580MD NJM2114MD
DA C
IC201
1 7
PCM 1691DCA - 3
TBB 5 MA ST ER 2
2_ IC402 D
NJM4580MD
IC401
NJM4565MD
ADAT_REC 2 1 7 REC
6
1
2
ADAT_BOOTH 2 1 7 IC504 BOOTH
NJM4580MD
3_ 6 (T RS)
DSP IC502 5
7
NJM4565MD IC504
NJM4580MD
IC 3201
0K013BZKB400- K
IC602
NJM4565MD
4_A DA C 10 2 1 7 SEND
ADAT_SEND 3 IC601 11 6 (T S)
AK 4387ET
E
E SEC/HP ASSY G HP_JK ASSY
IC101 IC102
TURN_ DA C 9 NJM4565MD NJM4580D
ADAT_HP 3 IC1001 10 HEA D
AK 4382AVT 11 PHO NES
12
(T RS)
IN 1 ADAT_UDOUT 1
ADAT_USB 1
IN 2 ADAT_UDOUT 2
IN 3 ADAT_USB 2
ADAT_UDOUT 3
IN 4 ADAT_USB 3
ADAT_UDOUT 4
ADAT_USB 4
F
DJM-850-K 13
5 6 7 8
1 2 3 4
4.3 DSP BLOCK DIAGRAM
CHx in
B
CHx Timecode
Analog_PHONO Phono Level meter CHx Post CHx Fader
BPM Detect CHx Select
AMP Digital Channel Cross Fader Assign
Trim SOUND 3Band BEAT SOUND BEAT CUE Fader Thru
Analog_CD,LINE BEAT
COLOR EQ/ EFFECT COLOR EFFECT Monitor EFFEC
CF A
EFFECT ISOLATOR CHx EFFECT CHx CHx BPM De
CF B
USB 2Position Send/ 3Position
Return
CHx
CHx_CUE Cross
CH Fader
Fader
Curve
3Position Assign A
CHx
C
CH1 - 4 COMMON
Assign B Cross
CHx Fader
Curve
Effect CH Select 3Positi
Return in Beat CH x
BPM De
Effect
CF A/B
Send out Send/
MIC
Master
3Position
D 2Band Off
MIC1/2 MIC EQ On
MIC1,2 MIC1,2 TalkOver
MIC MIC In MIX
TalkOver ON/OFF
FILTER Level
MIC1,2 COMMON Detect
BEAT EFFECT (SEND/RETURN) BEAT EFFECT (Others)

Effect SW
Effect CH Select SEND BEAT
Effect CH Select Level Depth Effect CH Select
EFFECT Effect Out
No Cable
Effect SW
Return
Level Effect CH Select
RETURN Effect Out
E SEL
Effect_C
Cable Exist
Cable Check Effect_C
14 DJM-850-K
1 2 3 4
5 6 7 8
Booth
Level
MIC_Out Booth
SEL
MIC Output
to Booth Monitor
On/Off SW
Rec Out B
BPM Detect Master REC out
Level meter Master

TalkOver ON/OFF
Assign Thru
Boost Digital out
BPM Detect CF A CH 1 - 4
Master Master
Balance Level
BEAT Master Talk Master
Over CUE ATT Master out
Cross BEAT EFFECT
Fader EFFECT
CF A Send/ 2Position
Return Talk Over Master_CU
Send/ Cross Fader A Master Mode
Assign A Talk Over
Return Advanced Level CHx_CUE
CHx
CF A /Normal HP
Effect_C Level
2Parameter 4Parameter Mono Split / C
BEAT Master_CU Stereo SWITCH H.P. out
EFFECT & MIXING
CF B
Send/ Cross Fader B
Assign B Cross Return
CHx Timecode
CHx Fader CF B Boost USB Common out
Curve Post CHx Fader
3Position Mixer
Cross Fader A
Audio
BPM Detect CF B Cross Fader B Output
Select
MIC
BPM Detect MIC MIC
Rec Out
3Position Master
Balance CH1 - 4 COMMON
Off BEAT D
On EFFECT MIC_Out
TalkOver MIC
Send/
Return
MIC
Mono Split / Stereo SWITCH & MIXING

CHx Cue On/Off SW
Effect CH Select
CHx_CUE
Effect Out
Effect Cue On/Off SW Cue L
Mixing
Effect_CUE
Mono Split
H.P. MIX L Out
R E
Effect_C SEL Stereo
MONO SPLIT/
MIXING STEREO SWITCH
2Position
Mono Split
Master Cue On/Off SW Master L
Mixing SEL Stereo H.P. MIX R Out
Master_CU
DJM-850-K 15
5 6 7 8
1 2 3 4
4.4 POWER BLOCK DIAGRAM
A G MAIN ASSY
T3001
SUB_TRANS.
IC1401
V+11E_UNREG NJM2831F33
(7.2 to 18 V) 5 4 V+3R3E
LDO MAIN_UCOM
reset (IC2803) 10 Relay Cont
FUSE. 2200uF signal
FU 1 90
/ 25V
11
MUTE
B
V+11E_UNREG
MAIN TRANS.
V+13D_UNREG IC1403
NJM 2392M
(9.7 to 17 V) 6 1
DDC V+34D (for FL)
Relay Cont
6800uF
/ 25V
IC1404
BD 9325FJ
2 3
DDC V+5LED (for FL, LED, etc)
IC1406
NJM 2878F3- 33
5 4 V+3R3REFA
LDO
(for MAIN_UCOM, SUB_UCOM)
C IC1405
BD 9328EFJ
2 3
DDC V+3R3D
IC1407
S- 1132B25- U5
5 1
LDO V+2R5D (for USB UCOM)
IC1408
BD 9328EFJ
2 3
DDC V+1R2D
(for DSP, FPGA, USB UCOM)
V+5A (for ADC/DAC)

IC1402
S- 1132B33
5 1
D V+3R3A (for ADC)
LDO
IC5001
BA 05T
V+5A_UNREG
REG
100uF TH 1
/ 16V
Poly V+15A (for Opamp [INPUT])
SW
IC5002
NJM 7815FA
V+15A_UNREG
REG V+15A (for Opamp)
3300uF 100uF
E / 35V / 25V
6800uF
/ 16V IC5003
3300uF NJM 7915FA 100uF
/ 35V / 25V
REG
V-15A (for Opamp)
V- 15A_UNREG TH 2
Poly
V-15A (for Opamp [INPUT])
SW
P101
V+HP_UNREG Poly
SW V+HP_UNREG_1 (for HP_Tr)
1000uF
/ 25V
F 1000uF
V- HP_UNREG / 25V
V- HP_UNREG_1 (for HP_Tr)
16 DJM-850-K
1 2 3 4
5 6 7 8
DJM-850-K 17
5 6 7 8
1 2 3 4
5. DIAGNOSIS
5.1 POWER ON SEQUENCE
A FPGA MAIN UCOM SUB UCOM USB UCOM DSP
Program start
MUTE setting ON
Reset Reset
Canceling reset of MAIN Flash
Fail-safe state acquisition

(Internal ROM / FLASH)
Starting power supply to the peripheral ICs

B
FPGA_xPGM setting to LOW
FPGA_xPGM setting to HIGH

Starting FPGA configuration
FPGA_xINITstandby HIGH
FPGA_xINIT setting to HIGH

Accepting FPGA configuration
Loading data into FPGA
C
FPGA_DONE standby HIGH
FPGA_DONE setting to HIGH

Completion of FPGA configuration
Canceling reset
DPRAM validation
System initialization
Starting power supply to FL

D
Canceling reset
Program start
NEC_B_CTRL setting to LOW

Inhibiting and cancelling
SUB UCOM from accessing FPGA
DIT, DAC reset cancel
Loading of setup data
power supply, voltage check

E
Notifying of version
(Initialization completion)
Obtaining KEY data
Operation mode judgment
Notifying of operation mode
A
18 DJM-850-K
1 2 3 4
5 6 7 8
A A
Canceling reset of DSP FLASH
Canceling reset
Canceling reset (Wait from reset cancellation of the DSP for several msec.)
Program start
MAIN UCOM -DSP
Handshake request
MAIN UCOM-DSP B
Standby for handshake request
Notifying of version
(Initialization completion)
MAIN UCOM -DSP

Handshake response
MAIN UCOM-DSP
Standby for handshake request
MAIN UCOM-DSP
Handshake response
C
Boot loader start
Loading of USB UCOM firmware
Program start
Multitasking start
Process for main communication start
USB_REQ setting to LOW
D
Permission for USB function start
Standby for USB function start response Permission for USB function start
Completion of USB function start
USB function activation
USB UCOM version request
Standby for USB UCOM version response

E
Notifying of USB UCOM version
Notifying of completion of
normal DSP startup
Initialization process of MAIN UCOM
Entering main loop Entering main loop

Notifying of completion of
input selector, automatic start information
USB communication start F
MUTE setting OFF
DJM-850-K 19
5 6 7 8
1 2 3 4
5.2 TROUBLESHOOTING
A
Contents
[0] Prior Confirmation [3] AUDIO OUTPUT
[0-1] Checking Internal Cables [3-1] No signal is output from the MASTER1/
[1] Failure in Startup MASTER2/REC/BOOTH connectors.
[1-1] The unit dose not turn on, and the LED of the [3-2] No signal is output from the SEND connector.
SETUP LED does not flash. [3-3] No signal is output from the PHONES
[1-2] The unit dose not turn on, and the LED of the connector.
SETUP LED flashes four times. [3-4] No signal is output from the DIGITAL
[1-3] The unit dose not turn on, and the LED of the MASTER OUT connector.
SETUP LED flashes two times. [4] USB
[1-4] The unit dose not turn on, and the LED of the [4-1] Co connection to the PC, No signal is input to
SETUP LED flashes five times. and output from the USB connector.
B
[1-5] The unit dose not turn on, and the LED of the [4-2] No timecode signal input to the mixer.
SETUP LED flashes once. [5] FL
[1-6] The unit dose not turn on, and the LED of the [5-1] The FL does not light.
SETUP LED flashes six times. [6] CONTROL
[1-7] The unit dose not turn on, and the LED of the [6-1] The FADER START function does not work
SETUP LED flashes endlessly.
[2] AUDIO INPUT
[2-1] No signal is input to the CD/LINE, PHONO *Point to be checked – Assys are classified with prefix.
connectors. [1-**] MAIN Assy
[2-2] No signal is input to the MIC1/MIC2 [2-**] INPUT Assy
connectors. [3-**] PNLA Assy
[2-3] No signal is input to the RETURN connector. [4-**] SEC/HP Assy
C
[5-**] PRIMARY Assy
[0] Prior Confirmation

[0-1] Checking Internal Cables
No. Cause Diagnostics Point Item to be Checked Corrective Action Reference
1 Disconnection, Relevant part Check that all the cables are securely Securely connect the cables. If a cable is 4.1 OVERALL
breakage, or connected. broken, replace it. CONNECTION
loose connection Check that there is no breakage in the DIAGRAM
D of internal cables cables.
[1] Failure in Startup

[1-1] The unit dose not turn on, and the LED of the SETUP LED does not flash.
The fuse may be blowout or V+11E_UNREG, V+3R3E power failure or MAIN UCOM (IC2803), FLASH (IC2802) startup error may be suspected.
1 Circuit failure PRIMARY Assy Check the primary side fuse. • If blowing of the fuse is visible, go to [2]. —————
Excessive power FU1 5-1 • If blowing of the fuse is not visible, go to [3].
supply voltage
injection
E 2 Power failure Each power supply Check if any power supply is • If any power supply is short-circuited, repair it. 4.4 POWER
short-circuited to ground. • If no power supply is short-circuited, replace BLOCK DIAGRAM
the fuse.
3 Power failure MAIN Assy Check for the V+11E_UNREG power. • If the V+11E_UNREG power can be confirmed, 4.4 POWER
CN1201 pin 3 1-1 go to [4]. BLOCK DIAGRAM
• If the V+11E_UNREG power cannot be 5.3 INFORMATION
confirmed, go to [7]. ON POWER
DIAGNOSTICS
4 Power failure, MAIN Assy Check for the V+3R3E power. • If the V+3R3E power can be confirmed, 4.4 POWER
defective parts IC1401 pin 4 1-2 go to [5]. BLOCK DIAGRAM
• If the V+3R3E power cannot be confirmed, 5.3 INFORMATION
the 3.3V REGULATOR (IC1401) block may be ON POWER
defective. Check for the status of soldering and DIAGNOSTICS
replace it.
F 5 RESET signal MAIN Assy Check for the CPU_RESET signal. • If the IC103_1 pin is high level, go to [6]. —————
error IC2803 pin 90 1-3 • If the IC103_1 pin is not high level, the RESET
IC (IC2801) block may be defective. Check for
the status of soldering and replace it.
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5 6 7 8
No. Cause Diagnostics Point Item to be Checked Corrective Action Reference A
6 20 MHz CLK MAIN Assy Check for the 20M_CLK signal. • If an output signal can be confirmed, go to [8]. 10.35 WAVEFORMS
error R2804 1-4 This is a simple check of whether a signal • If an output signal cannot be confirmed, the 1-4
is output or not. A normal waveform crystal (X2801) block or MAIN UCOM (IC2803)
cannot be observed, because the drive may be defective.
circuit is inside the IC. Check for the status of soldering and replace it.
7 Power failure, PRIMARY Assy Check for the V+11E_UNREG power • If the V+11E_UNREG power can be confirmed, 4.4 POWER
defective parts, JP3001 pin 3 5-2 on PRIMARY Assy. JP3001 may be defective. Replace it. BLOCK DIAGRAM
Wire defect • If the V+11E_UNREG power cannot be 5.3 INFORMATION
confirmed, the PRIMARY Assy may be ON POWER
defective. Replace it. DIAGNOSTICS
8 MAIN UCOM MAIN Assy If the symptom persists after the above The MAIN UCOM (IC2803) may be defective. —————
defective IC2803 corrections. Replace it.
B
[1-2] The unit dose not turn on, and the LED of the SETUP LED flashes four times.
MAIN UCOM (IC2803) startup error may be suspected.
1 20 MHz CLK MAIN Assy Check for the 20M_CLK signal. • If an output signal can be confirmed, go to [2]. 10.35 WAVEFORMS
is output or not. A normal waveform crystal (X2801) block may be defective.
cannot be observed, because the drive Check for the status of soldering and replace it.
circuit is inside the IC.
2 MAIN UCOM MAIN Assy If the symptom persists after the above The MAIN UCOM (IC2803) may be defective. —————
C
[1-3] The unit dose not turn on, and the LED of the SETUP LED flashes two times.
Communication error between the MAIN UCOM (IC2803) and FPGA (IC3007)
1 Power failure, MAIN Assy • Check for the V+3R3D_FPGA power. • If the V+3R3D_FPGA power and 4.4 POWER
defective parts R3037 1-5 • Check for the V+1R2D_FPGA power. V+1R2D_FPGA power can be confirmed, BLOCK DIAGRAM
F3001 1-6 go to [2]. 5.3 INFORMATION
• If either power cannot be confirmed, the power ON POWER
line may be defective. DIAGNOSTICS
Check for the status of soldering and replace it.
2 RESET signal MAIN Assy Check that the signal level of • If the signal level is High, go to [3]. —————
error R3097 1-7 FPGA_RESET is High. • If the signal level is low, something on the
FPGA_RESET path may be wrong.
Check for the status of soldering and replace it. D
3 24MCLK MAIN Assy Check for the 24M_CLK_FPGA signal. • If an output signal can be confirmed, go to [4]. 10.35 WAVEFORMS
error R3070 1-8 • If an output signal cannot be confirmed, the 1-8
24MCLK (IC3204) block may be defective.
4 Defective parts MAIN Assy If the symptom persists after the above The FPGA (IC3007) or FLASH (IC2802) may —————
IC3007 corrections. be defective. Replace it.
IC2802
[1-4] The unit dose not turn on, and the LED of the SETUP LED flashes five times.
Communication error between the MAIN UCOM (IC2803) and SUB UCOM (IC6601)
No. Cause Diagnostics Point Item to be Checked Corrective Action Reference E
1 Power failure, PNLA Assy Check for the V+3R3D_PA power. • If the V+3R3D_PA power can be confirmed, 4.4 POWER
defective parts R6615 3-1 go to [2]. BLOCK DIAGRAM
• If an V+3R3D_PA power cannot be confirmed, 5.3 INFORMATION
the power line may be defective. ON POWER
Check for the status of soldering and replace it. DIAGNOSTICS
2 RESET signal PNLA Assy Check that the signal level of • If the signal level is High, go to [3]. —————
error IC6601 pin 90 3-2 SUB_CPU_RESET is High. • If the signal level is low, the path inside the
MAIN Assy may be wrong.
3 20 MHz CLK PNLA Assy Check for the 20M_CLK signal. • If the signal can be confirmed, go to [4]. 10.35 WAVEFORMS
error R6624 3-3 This is a simple check of whether a signal • If an signal cannot be confirmed, crystal 3-3
is output or not. A normal waveform (X6601) block or SUB UCOM (IC6601) may
cannot be observed, because the drive be defective.
circuit is inside the IC. Check for the status of soldering and replace it. F
4 SUB UCOM PNLA Assy If the symptom persists after the above SUB UCOM (IC6601) may be defective. —————
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1 2 3 4
A [1-5] The unit dose not turn on, and the LED of the SETUP LED flashes once.
Communication error between the MAIN UCOM (IC2803) and DSP (IC3201).
1 Power failure, MAIN Assy • Check for the V+3R3D_DSP power. • If the V+3R3D_DSP power and 4.4 POWER
defective parts R3209 1-9 • Check for the V+1R2D_DSP power. V+1R2D_DSP power can be confirmed, BLOCK DIAGRAM
F3201 1-10 go to [2]. 5.3 INFORMATION
• If either power cannot be confirmed, the power ON POWER
line may be defective. DIAGNOSTICS
error R3276 1-11 DSP_RESET is High. • If the signal level is low, something on the
DSP_RESET path may be wrong.
B
3 24MCLK MAIN Assy Check for the 24M_CLK_DSP signal. • If an output signal can be confirmed, go to [4]. 10.35 WAVEFORMS
error R3234 1-12 • If an output signal cannot be confirmed, the 1-12
24MCLK (IC3204) block may be defective.
4 Defective parts MAIN Assy If the symptom persists after the above DSP (IC3201) or FLASH (IC3008) may be —————
IC3201 corrections. defective.
IC3008 Check for the status of soldering and replace it.
[1-6] The unit dose not turn on, and the LED of the SETUP LED flashes six times.
Communication error between the MAIN UCOM (IC2803) and USB UCOM (IC2603)
C 1 Power failure, MAIN Assy • Check for the V+3R3D_USB power. • If the all power can be confirmed, go to [2]. 4.4 POWER
defective parts R2604 1-13 • Check for the V+1R2D_USB power. • If either power cannot be confirmed, the power BLOCK DIAGRAM
F2601 1-14 • Check for the V+2R5D_USB_PLL line may be defective. 5.3 INFORMATION
R2611 1-15 power. Check for the status of soldering and replace it. ON POWER
DIAGNOSTICS
error R2669 1-16 USB_RESET is High. • If the signal level is low, something on the
USB_RESET path may be wrong.
3 24MCLK MAIN Assy Check for the 24M_CLK signal. • If an output signal can be confirmed, go to [4]. 10.35 WAVEFORMS
is output or not. A normal waveform crystal (X2601) block or USB UCOM (IC2603)
cannot be observed, because the drive may be defective.
circuit is inside the IC. Check for the status of soldering and replace it.
D
4 Defective parts MAIN Assy If the symptom persists after the above USB UCOM (IC2603) or FLASH (IC2802) —————
IC2603 corrections. may be defective. Replace it.
IC2802
[1-7] The unit dose not turn on, and the LED of the SETUP LED flashes endlessly.
The unit is shut down in error by the Voltage Monitoring Circuit.
1 Power failure See “5.4 VOLTAGE Check for power at each point, following Repair the defective parts. 5.4 VOLTAGE
MONITORING “5.4 VOLTAGE MONITORING CIRCUIT.” MONITORING
CIRCUIT.” CIRCUIT
22 DJM-850-K
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5 6 7 8
A
[2] AUDIO INPUT
[2-1] No signal is input to the CD/LINE, PHONO connectors.
0 Prior CD/LINE, PHONO, Confirm on the screen that the selector ————— Operating
Confirmation LINE, USB */* is set properly. instructions
selector switch
/ TRIM control
1 Loose connection INPUT Assy [Confirmation of input signal selection] • If the selection is proper, go to [2]. 10.35 WAVEFORMS
/defective parts IC4002/IC4003 (CH1) Check if the input signal selection at each • If the selection is not proper, soldering of parts 2-1 (CD)
pin1 switching operational amplifier in the peripheral circuits of the switching 2-1 (PHONO)
IC4004/IC4005 (CH2) (IC4002/IC4003/IC4004/IC4005/IC4202/ operational amplifiers or the control transistors
pin1 IC4203/IC4204/IC4205) is proper. (Q4005/Q4006/Q4205/Q4206) is defective or
IC4202/IC4203 (CH3) one or more of the parts is defective. Or part of B
pin1 the circuit in the path from the MAIN UCOM
IC4204/IC4205 (CH4) (IC2803) to a control transistor may be
pin1 disrupted.
2-1
2 Loose connection MAIN Assy [Checking the ADC block] If no audio signal is input to ADC, a problem in 10.35 WAVEFORMS
/defective parts IC1604 (CH1) 1-18 Check for an audio signal at the input an analog circuit at a previous stage may be 2-2 (CD input signal)
IC1804 (CH2) 1-19 connector of ADC (IC1604/IC1804/ suspected. 2-3 (PHONO·MIC
IC2004 (CH3) 1-20 IC2004/IC2204). • If an audio signal is input, go to [3]. input signal)
IC2204 (CH4) 1-21 • If no audio signal is input, check for a part 1-18
pin 4, 5, 24, 25 where the signal is interrupted, by observing
Representative the audio signal in the path from the input
CH1_R- 1-18 connector to the ADC, then check the
/CH1_R+ 1-18 soldering status and check for a defective
part in the corresponding part.
C
3 Loose connection MAIN Assy [Checking the ADC block] • If the RESET signal level is L, go to [6]. —————
/defective parts IC1604(CH1) 1-22 Check for the RESET signal of ADC. • If the RESET signal level is H, go to [4].
IC1804(CH2) 1-23
IC2004(CH3) 1-24
IC2204(CH4) 1-25
pin 19
4 Loose connection MAIN Assy [Checking the ADC block] • If no CLK signal is input, go to [7]. 10.35 WAVEFORMS
/defective parts IC1604 (CH1) Check for the CLK signal of ADC. • If the CLK signal is input, go to [5]. 1-26 1-27 1-28
IC1804 (CH2)
IC2004 (CH3)
IC2204 (CH4)
96k CLK: pin 17
Representative 1-26
6M CLK: pin 16
Representative 1-27 D
24M CLK: pin 18
Representative 1-28
5 Loose connection MAIN Assy [Checking the ADC block] • If output signal cannot be confirmed, ADC 10.35 WAVEFORMS
/defective parts IC1604(CH1) Check for the signal output from may be defective. 1-29
IC1804(CH2) ADC output terminal. Check for the status of soldering and replace it.
IC2004(CH3) • If output signal can be confirmed, DSP
IC2204(CH4) (IC3201) must be improperly soldered or
pin 15 Representative defective.
1-29
6 Loose connection MAIN Assy [Checking the RESET signal path] • If the signal level at Pin 1 is H and that at —————
/defective parts IC2804 pin 1, pin 3 Check for the RESET signal. Pin 3 is L, IC2804 must be soldered
1-30 impropely or defective.
• If the signal level at Pin 1 is L and there is no
abnormality in the path from the MAIN UCOM E
(IC2803) to IC2804, soldering of the MAIN
UCOM (IC2803) or the IC itself is defective.
7 Loose connection MAIN Assy [Checking the CLK signal path] • If no signal is output from Pin 7 even though 10.35 WAVEFORMS
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and Pin 4 is normal for CH1/CH3, or if no signal is 1-31 1-32 1-33
pin 10, pin 8 1-31 24M CLK signals. output from Pin 11 even though Pin 13 is
6M CLK: IC3004 normal for CH2/CH4, soldering of IC3006/
pin 10, pin 8 1-32 IC3004/IC3005 or these ICs themselves are
24M CLK: IC3005 defective.
pin 10, pin 8 1-33 • If Pin 4 is not normal for CH1/CH3 or if Pin 13
is not normal for CH2/CH4, and if there is no
abnormality in the path from the FPGA
(IC3007) to IC3006/IC3004/IC3005, soldering
of the FPGA (IC3007) or this IC itself is
defective.
F
DJM-850-K 23
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1 2 3 4
A
[2-2] No signal is input to the MIC1/MIC2 connectors.
0 Prior OFF, ON, TALK OVER Confirm on the screen that the selector ————— Operating
Confirmation selector switch is set properly. instructions
/ TRIM control
/defective parts IC2401 Check for an audio signal at the input an analog circuit at a previous stage may be 1-34 1-35
MIC1: pin 1 1-34 connector of ADC (IC2401). suspected.
MIC2: pin 2 1-35 • If an audio signal is input, go to [2].
• If no audio signal is input, check for a part
where the signal is interrupted, by observing
the audio signal in the path from the input
connector to the ADC, then check the
B soldering status and check for a defective
2 Loose connection MAIN Assy [Checking the ADC block] • If the RESET signal level is L, go to [5]. —————
/defective parts IC2401 pin 13 Check for the RESET signal of ADC • If the RESET signal level is H, go to [3].
(IC2401).
3 Loose connection MAIN Assy [Checking the ADC block] • If no CLK signal is input, go to [7]. 10.35 WAVEFORMS
/defective parts IC2401 Check for the CLK signal of ADC (IC2401). • If the CLK signal is input, go to [4]. 1-37 1-38 1-39
96k CLK: pin 10 1-37
6M CLK: pin 12 1-38
24M CLK: pin 11 1-39
/defective parts IC2401 pin 9 1-40 Check for the signal output from may be defective. 1-40
ADC (IC2401) output terminal. Check for the status of soldering and replace it.
• If output signal can be confirmed, DSP
C (IC3201) must be improperly soldered or
defective.
/defective parts IC2804 pin10, pin 8 Check for the RESET signal. Pin 8 is L, IC2804 must be soldered
1-41 impropely or defective.
abnormality in the path from the MAIN UCOM
UCOM (IC2803) or this IC itself is defective.
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and Pin 10 is normal, soldering of the IC3006/ 1-31 1-32 1-33
pin 10, pin 8 1-31 24M CLK signals. IC3004/IC3005 or these ICs themselves are
pin 10, pin 8 1-32 • If Pin 10 is not normal and if there is no
D 24.576M CLK: IC3005 abnormality in the path from the FPGA
pin 10, pin 8 1-33 (IC3007) to IC3006/IC3004/IC3005, soldering
defective.
[2-3] No signal is input to the RETURN.

0 Prior DELAY, ECHO, • Check that the type for BEAT EFFECT ————— Operating
Confirmation UP ECHO, SPIRAL, is set to SND/RTN. instructions
REVERB, TRANS, • Check that the BEAT EFFECT is set
FILTER, FLANGER, to ON.
PHASER, ROBOT, • Check that a cable is connected to the
SLIP ROLL, ROLL, RETURN L connector.
E REV ROLL, SND/RTN
selector switch
/ ON/OFF button
1 Loose connection INPUT Assy Check that the RETURN IN signal level • If it is L, JA4401 or R4803 must be —————
/defective parts CN4803 pin 20 is H. improperly soldered or defective.
2-4 • If it is H, go to [2].
24 DJM-850-K
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5 6 7 8
/defective parts IC2402 pin1, pin 2 Check for an audio signal at the input an analog circuit at a previous stage may be 1-42
1-42 connector of ADC (IC2401). suspected.
• If no audio signal is input, check for a part
where the signal is interrupted, by observing
the audio signal in the path from the input
connector to the ADC, then check the
soldering status and check for a defective
• If an audio signal is input, go to [3].
3 Loose connection MAIN Assy [Checking the RESET signal path] • If the RESET signal level is L, go to 2-2 [5]. —————
/defective parts IC2402 pin 13 1-43 Check for the RESET signal at ADC. • If the RESET signal level is H, go to [4].
4 Loose connection MAIN Assy [Checking the ADC block] • If no CLK signal is input, go to 2-2 [6]. 10.35 WAVEFORMS B
/defective parts LRCK: IC2402 pin 10 Check for the CLK signal of ADC. • If the CLK signal is input, go to [5]. 1-44 1-45 1-46
1-44
BCLK: IC2402 pin 12
1-45
MCLK: IC2402 pin 11
1-46
/defective parts IC2402 pin 9 1-47 Check for the signal output from ADC may be defective. 1-47
output terminal. Check for the status of soldering and replace it.
• If output signal can be confirmed, DSP
(IC3201) must be improperly soldered or
defective.
[3] AUDIO OUTPUT

[3-1] No signal is output from the MASTER1/MASTER2/REC/BOOTH connectors.
1 Prior MASTER1 / Identify the connector(s) that do(es) not • If all connectors does output, go to [2]. Operating
Confirmation MASTER2 / output signals. • If neither MASTER 1 nor 2 connector outputs, instructions
REC / BOOTH go to [9].
• If only the MASTER 1 connector does not
output, go to [10].
• If only the MASTER 2 connector does not
output, go to [11].
• If only the BOOTH connector does not output,
go to [13]. D
2 Loose connection MAIN Assy [Checking the DAC block] • If the DAC output signal is normal, the MUTE 10.35 WAVEFORMS
/defective parts IC201 1-48 Check for the DA converter (IC201) circuit is activated. Go to [15]. 1-48 (MASTER)
signal output. • If no signal is output from the DAC output, 1-48 (REC)
MASTER: pin 29, pin31, pin 33, pin 35 go to [3]. 1-48 (BOOTH)
REC: pin37, pin 39
BOOTH: pin41, pin 43
3 Loose connection MAIN Assy [Checking the DAC block] • If no signal is output, the DSP (IC3201) must 10.35 WAVEFORMS
/defective parts IC201 pin 8, 9, 10, 11 Check that a signal is input to the be improperly soldered or defective. 1-49
1-49 DA converter. • If a signal is output, go to [4].
MASTER: pin10, pin 11
REC: pin 9
BOOTH: pin 8
4 Loose connection MAIN Assy [Checking the DAC block] • If it is L, the R212 or IC201 must be ————— E
/defective parts IC201 pin 18 1-50 Check for the AMUTEI signal improperly soldered or defective.
(IC201 pin 18). • If it is H, go to [5].
5 Loose connection MAIN Assy [Checking the DAC block] • If it is H, go to [7]. —————
/defective parts IC201 pin 15 1-51 Check for the RESET signal at • If it is L, go to [6].
DA converter.
6 Loose connection MAIN Assy [Checking the DAC block] • If a signal is output, go to [8]. 10.35 WAVEFORMS
/defective parts 96k CLK: IC201 Check for the CLK signal at DA converter. • If the CLK signal is output, soldering of the 1-52 1-53 1-54
pin 6 1-52 IC201 or the IC itself is defective.
6M CLK: IC201
pin 7 1-53
24M CLK: IC201
pin 14 1-54
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1 2 3 4
A
/defective parts IC2804 Check for the RESET signal. Pin 6 is L, IC2804 must be soldered
pin4, pin 6 1-55 impropely or defective.
UCOM (IC2803) or the IC itself is defective.
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and Pin 1 is normal, soldering of the IC3006/ 1-56 1-57 1-58
pin 1, pin 3 1-56 24M CLK signals. IC3004/IC3005 or these ICs themselves are
pin 1, pin 3 1-57 • If Pin 1 is not normal and if there is no
24M CLK: IC3005 abnormality in the path from the FPGA
B pin 1, pin 3 1-58 (IC3007) to IC3006/IC3004/IC3005, soldering
defective.
9 Loose connection MAIN Assy [Checking the MASTER Shaping Noise Filter] • If a signal is output from the Pin 1/Pin 7 of 10.35 WAVEFORMS
/defective parts IC301 pin 1, pin 7 Check for the DAC differential audio signal IC301/IC302, go to [10] and [11]. 1-59 1-60
1-59 output. • If signals are output from the DAC (Pins 29,
IC302 pin 1, pin 7 Check the waveforms of the signals 31, 33 and 35 of IC201) but not from Pins 1
1-60 output pins of IC301/IC302. and 7 of IC301/IC302, soldering of the
IC301/IC302 block or some part in the block
is defective.
• If no signal is output from the DAC (Pins 37,
39, 41and 43 of IC123), go to [3].
10 Loose connection MAIN Assy [Checking the Balanced Output AMP] • If no signal is output, soldering of the IC303/ 10.35 WAVEFORMS
/defective parts IC303 pin 1, pin 7 Check the waveforms of the signals from IC304 is defective or the ICs themselves are 1-61 1-62
C 1-61 the output pins of IC303/304. defective.
IC304 pin 1, pin 7 • If signals are output, soldering of the output
1-62 capacitors (C355, C356, C357, C358) or the
ICPs (P302, P301) is defective or the
capacitors or ICPs themselves are defective.
Or the MUTE circuited is activated.
• If the MUTE circuited is activated, go to [15].
11 Loose connection MAIN Assy [Checking the MASTER2] • If no signal is output, soldering of the IC402 or 10.35 WAVEFORMS
/defective parts IC402 pin 1, pin 7 Check the waveform of IC402 output pin. the IC itself is defective. 1-63
1-63 • If signals are output, soldering of the output
capacitors (C425, C426), output resistor
(R427, R428) is defective or one or more of
those parts is defective.
D • If the MUTE circuited is activated, go to [17].
12 Loose connection MAIN Assy [Checking the REC] • If signals are output from the DAC (Pins 37 and 10.35 WAVEFORMS
/defective parts IC401 pin 1, pin 7 Check the waveform of IC401 output pin. 39 of IC201) but not from IC401, soldering of 1-64
1-64 the IC401 block or some part in the block
is defective.
and 39 of IC201), go to [3].
• If signals are output from Pins 1 and 7 of
IC401, soldering of the output capacitors
(C423, C424), output resistor (R422, R425,
R419 and R426) is defective or one or more of
those parts is defective.
E 13 Loose connection MAIN Assy [Checking the BOOTH Shaping Noise Filter] • If signals are output from Pins 1 and 7 of 10.35 WAVEFORMS
/defective parts IC502 pin 1, pin 7 Check the waveform of IC502 output pin. IC502, go to [14]. 1-65
1-65 • If signals are output from the DAC (Pins 41
and 43 of IC201) but not from Pins 1 and 7 of
IC502, soldering of IC502, or IC502 block is
defective or one or more of those parts is
defective.
• If no signal is output from the DAC (Pins 41
and 43 of IC201), go to [3].
14 Loose connection MAIN Assy [Checking the BOOTH Balanced Output AMP] • If no signal is output, soldering of the IC503/ 10.35 WAVEFORMS
/defective parts IC503 pin 1, pin 7 Check the waveform of IC503/IC504 IC504 or the IC itself is defective. 1-66 1-67
1-66 output pin. Or the MUTE circuited is activated.
IC504 pin 1, pin 7 • If signals are output, soldering of the output
1-67 capacitors (C553, C554, C555 and C556),
output resistor (R542, R545, R548 and R551)
F
is defective or one or more of those parts is
defective. Or the MUTE circuited is activated.
26 DJM-850-K
1 2 3 4
5 6 7 8
15 Loose connection MAIN Assy [Checking the MASTER_MUTE] • If the signal is within the range of —————
/defective parts MASTER_MUTE Check that the MASTER_MUTE signal approx. –14 to –15 V, go to [17].
1-68 1-68 is within the range of approx. –14 to –15 V. • If the signal is outside the range of
approx. –14 to –15 V, go to [16].
16 Loose connection MASTER LEVEL [Checking the MVR_MUTE] • If MVR_MUTE (CN1002 pin 4) is H, VR6607 —————
/defective parts knob / • Check that the MASTER LEVEL knob is or IC6605 on the PNLA Assy or peripheral
MAIN Assy not set to –∞. parts must be improperly soldered or defective.
CN1002 pin 4 1-69 • Check the FFC connections with the • If MVR_MUTE (CN1002 pin 4) is L, Q203,
PNLA Assy. Q204 or peripheral parts must be improperly
• Check that the MVR_MUTE (CN1002 soldered or defective.
pin 4) level is Low.
17 Loose connection MAIN Assy [Checking the MUTE] • If the signal is within the range of approx. –14 —————
/defective parts MUTE 1-70 Check that the MUTE signal 1-70 is to –15 V, soldering of the MUTE transistor or B
within the range of approx. –14 to –15 V. parts in its peripheral circuits is defective or
one or more of those parts is defective.
MUTE transistor • • •
MASTER1: Q305, Q306, Q307, Q308
MASTER2: Q401, Q402, Q407, Q408
REC: Q405, Q406
BOOTH: Q513, Q514, Q515, Q516, Q509,
Q510, Q511, Q512
SEND: Q603, Q604
• If the signal is outside the range of approx. –14
to –15 V, check if the MUTE transistor is
defective. If the transistor is OK, go to [18].
18 Loose connection MAIN Assy [Checking the CPU_MUTE] • If it is L, MAIN UCOM (IC2803) or R2833 —————
/defective parts IC2803 pin 11 1-71 Check that the CPU_MUTE signal level is must be improperly soldered or defective.
C
High. • If it is H, Q201, Q202 and Q205 must be
improperly soldered or defective.
[3-2] No signal is output from the SEND connector.

1 Loose connection MAIN Assy [Checking the SEND] • If signals are output from Pins 1 and 7 of 10.35 WAVEFORMS
/defective parts IC602 pin 1, pin 7 Check the waveform of IC602 output pin. IC602, soldering of the output capacitors 1-72 (SEND output)
1-72 (C624, C625), output resistor (R621, R622) is 1-72 (SENDDAC output)
IC601 pin 1, pin 7 defective or one or more of those parts is
1-72 defective. Or the MUTE circuited is activated.
• If signals are output from the DAC (Pins 1 and
7 of IC601) but not from Pins 1 and 7 of IC602,
soldering of the IC601 and IC602 block or D
some part in the block is defective.
and 11 of IC601), go to [2].
2 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, DSP (IC3201) must be 10.35 WAVEFORMS
/defective parts IC601 pin 3 1-73 Check the input signal of DAC (IC601). improperly soldered or defective. 1-73
• If a signal is found, go to [3].
3 Loose connection MAIN Assy [Checking the DAC] • If it is L, go to [5]. —————

/defective parts IC601 pin 5 1-74 Check the RESET signal of DAC. • If it is H, go to [4].
4 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, go to [6]. 10.35 WAVEFORMS
/defective parts 96k CLK: IC601 pin 4 Check the CLK signal of DAC. • If a CLK signal is found, IC601 must be 1-75 1-76 1-77
1-75 improperly soldered or defective.
6M CLK: IC601 pin 2 E
1-76
24M CLK: IC601 pin 1
1-77
5 Loose connection MAIN Assy [Checking the RESET signal path] • If a signal level at Pin 4 is H and that at —————
/defective parts IC2804 pin 4, pin 6 Check the RESET signal. Pin 6 is L, IC2804 must be improperly
1-55 soldered or defective.
UCOM (IC2803) or this IC itself is defective.
6 Loose connection MAIN Assy [Checking the CLK signal path] • If Pin 1 is normal but a singal is not output 10.35 WAVEFORMS
/defective parts 96k CLK: IC3006 Check for the 96k CLK, 6M CLK and from the Pin 3, IC3006/IC3004/IC3005 1-56 1-57 1-58
pin 1, pin 3 1-56 24M CLK signals. must be improperly soldered or defective.
6M CLK: IC3004 • If Pin 1 is not normal and if there is no F
pin 1, pin 3 1-57 abnormality in the path from the FPGA
24M CLK: IC3005 (IC3007) to IC3006/IC3004/IC3005, soldering
pin 1, pin 3 1-58 of the FPGA (IC3007) or this IC itself is
defective.
DJM-850-K 27
5 6 7 8
1 2 3 4
A [3-3] No signal is output from the PHONES connector.

0 Prior CUE button / LEVEL Confirm on the screen that the selector ————— Operating
Confirmation knob / MIXING knob is set properly. instructions
/ MONO, STEREO
selector
1 Loose connection MAIN Assy / Check for the connection between the Correct any power connections. —————
/defective parts SEC/HP Assy / MAIN Assy, SEC/HP Assy and
HPJK Assy HPJK Assy.
2 Loose connection SEC/HP Assy Check for the signals at Pins 1 and 4 of • If a signal is found, the HPJK Assy or wires 10.35 WAVEFORMS
/defective parts CN101 pin 1, pin 4 CN101. are defective. Replace them. 4-1
4-1 • If no signal is found, go to [3].
B 3 Loose connection SEC/HP Assy Check the audio signal of SEC/HP Assy. • Check for a part where the signal is interrupted, —————
/defective parts HP_L+/L- by observing the audio signal before and after
HP_R+/R- each block. Soldering of the part or the part itself
where the signal is interrupted is defective. Or the
MUTE circuit is activated.
• If no signal is found at CN3, go to [5].
4 Loose connection SEC/HP Assy [Checking the MUTE] • If the signal is within the range of approx. –14 to —————
/defective parts MUTE 4-2 Check that the MUTE signal 4-2 is within –15 V, soldering of the MUTE transistors (Q103,
the range of approx. –14 to –15 V. Q104) or any part in their peripheral circuits is
defective or one or more of those parts is defective.
• If the signal is outside the range of approx. –14 to
–15 V, check the conduction at CN3 and CN1005
and check the above-mentioned MUTE
transistors. If they are OK, go to 3-1 [17].
C
5 Loose connection MAIN Assy [Checking the DAC] • If the DAC output signal is normal, check the 10.35 WAVEFORMS
/defective parts IC1001 Check the output signal of DAC (IC1001). conduction at CN3 and CN1005. 1-78
pin 9, 10, 11, 12 1-78 • If no DAC signal is found, go to [6].
6 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, DSP (IC3201) must be 10.35 WAVEFORMS
/defective parts IC1001 pin 3 1-79 Check the input signal of DAC. improperly soldered or defective. 1-79
• If signal is found, go to [7].
7 Loose connection MAIN Assy [Checking the DAC] • If it is H, go to [8]. —————
/defective parts IC1001 pin 5 1-80 Check the RESET signal of DAC. • If it is H, go to 2-2 [5].
8 Loose connection MAIN Assy [Checking the DAC] • If no signal is found, go to 2-2 [6]. 10.35 WAVEFORMS
/defective parts 96k CLK: IC1001 pin 4 Check the CLK signal of DAC. • If CLK signal is found, DAC (IC1001) must be 1-81 1-82 1-83
1-81 improperly soldered or defective.
D 1-82
1-83
[3-4] No signal is output from the DIGITAL MASTER OUT connector.

1 Loose connection MAIN Assy Check for the signal at Pins 16 of DIT • If the signal can be found, soldering of any 10.35 WAVEFORMS
/defective parts IC3405 pin 16 1-84 (IC3405). part in the signal path from IC3405 to JA3401 1-84
may be defective. Check the soldering status.
If soldering is OK, replace the defective part.
• If no signal is found, go to [2].
2 Loose connection MAIN Assy Check for the V+3R3D_DIT power. • If V+3R3D_DIT power is found, go to [3]. 4.4 POWER
/defective parts C3411 1-85 • If V+3R3D_DIT power cannot be found, BLOCK DIAGRAM
E
soldering of any part in the power path may be 5.3 INFORMATION
defective. Check the soldering status. If ON POWER
soldering is OK, replace the defective part. DIAGNOSTICS
3 Loose connection MAIN Assy Check that the DIT_RESET signal level • If it is H, go to [4]. —————
/defective parts R3434 1-86 is High. • If the signal level is L, soldering of any part in
the DIT_RESET path may be defective. Check
the soldering status. If soldering is OK, replace
the defective part.
4 Loose connection MAIN Assy Check for the any signals of DIT • If any signal is abnormal, soldering of any part 10.35 WAVEFORMS
/defective parts IC3405 (IC3405). in the signal path may be defective. Check the 1-87 1-88 1-89 1-90
FPGASRC_LRCK soldering status. If soldering is OK, replace the
pin 24 1-87 defective part.
FPGASRC_BCK • If all signals are normal, soldering of the DIT
pin 26 1-88 (IC3405) or the IC itself may be defective.
F ADAT_DOUT_FPGASRC Check the soldering status. If soldering is OK,
pin 28 1-89 replace the defective part.
FPGASRC_MCLK
pin 30 1-90
28 DJM-850-K
1 2 3 4
5 6 7 8
A
[4] USB
[4-1] Co connection to the PC, No signal is input to and output from the USB connector.
0 Prior CD/LINE, PHONO, • Check that the selector is set to USB*/*. ————— Operating
Confirmation LINE, USB • Check that the driver software dedicated instructions
*/* selector settings, for the DJM-850 has been installed on
PC settings the customer's PC.
• Check that the DJM-850 utility of the
connected PC is set properly.
1 Loose connection MAIN Assy • Check that the voltage at Pin 5 • If any signal is abnormal, soldering of any part 10.35 WAVEFORMS
/defective parts CN2602 (V+5VBUS) of CN2602 is about 5 V in the signal path from the PC to the MAIN 1-92 1-93
V+5VBUS (4.75 to 5.25) using a PC connected. Assy may be defective. Check for any B
pin 5 1-91 • Check for the D+USB and D-USB breakage in the cable and check the soldering
D+USB signals. status. If both are OK, replace the defective
pin 4 1-92 part.
D-USB • If all signals are normal, soldering of any part
pin 3 1-93 in the signal path from CN2602 to the USB
UCOM (IC2603) or the USB UCOM (IC2603)
is defective. Check the soldering status. If
soldering is OK, replace the defective part.
[4-2] No timecode signal input to the mixer.

0 Prior CD/LINE, PHONO, • Check that the selector is set to USB*/*. ————— Operating
Confirmation LINE, USB • Check that the driver software dedicated instructions C
*/* selector settings, for the DJM-850 has been installed on
PC settings the customer's PC.
• Check that the DJM-850 utility of the
connected PC is set properly.
• When using a DJ player (when using a
Time code (control CD,)) check that the
DJ player is connected via the CD
connector. When using a turntable (when
using a Time code (control turntable,))
check that the turntable is connected via
the PHONO connector.
1 Incorrect setting PC Setting Utility 1 Start up the Setup Utility that has been If CH* Timecode PHONO is selected, set it to Operating
(at the CD input) installed on the customer’s PC then click CH* Timecode CD. instructions
on the MIXER OUTPUT tab.
Check that CH* Timecode CD is selected. D
2 Incorrect setting PC Setting Utility 2 Start up the Setup Utility that has been If CH* Timecode CD is selected, set it to Operating
(at the PHONO input) installed on the customer’s PC then click CH* Timecode PHONO. instructions
on the MIXER OUTPUT tab.
Check that CH* Timecode PHONO is
selected.
3 Incorrect setting DECK mode of Start up TRAKTOR2 that has been If CUE and CUP are displayed next to the Play TRAKTOR2 manual
TRAKTOR2 installed on the customer’s PC then check button on the track deck (in Internal Playback
that two record icons are displayed next to mode), switch to Scratch Control mode. To switch
the Play button on the track deck. modes, click on b beneath [A], [B], [C] or [D] on
(If a record icon is displayed, the unit is in the deck GUI.
Scratch Control mode, which signifies that
the DVS can be used.)
4 Incorrect setting Playback Tracking Check that one of the two record icons If both their icons are unlit, set TRAKTOR2 to TRAKTOR2 manual
E
mode of TRAKTOR2 next to the Play button on the track deck Playback Tracking mode.
is lit.
5 Incorrect setting Timecode signal Select Preferences, Timecode Setup, then If no double circle is displayed, possible reasons —————
input Timecode Inputs on TRAKTOR2, then are as follows:
check that the double circle is displayed 1 The channel for USB AUDIO output of the
for the channel to which the timecode DJM-850 and that for USB AUDIO input of
signal is input. (The double circle for TRAKTOR2 do not match.
VINYL is displayed somewhat distorted. → Check the channel setting on the Input
The shapes of the double circles for the Routing screen in the Preferences window
outer and inner tracks are different.) of TRAKTOR2 and that of the PC Setup
Perform this check only when a timecode Utility.
control CD or VINYL (media on which 2 Connection between the external device
timecodes are recorded) is available. (DJ player, turntable) and the DJM-850 is not
properly made.
→ Check the connection and check if the RCA F
cables are broken.
DJM-850-K 29
5 6 7 8
1 2 3 4
A
[5] FL
The FL is controlled by the SUB UCOM (IC6601).
[5-1] The FL does not light.

The driver power to be supplied to the FL is produced at the MAIN Assy.
1 Power failure PNLA Assy Check for the voltage of the FL. If no loose connection is detected with the FL of 4.4 POWER
V6601 (V+3R3D_PA/V+5D_LED_PA/V+34D_PA) the PNLA Assy but power voltage is not BLOCK DIAGRAM
pin 24 3-12 detected, check the mounting status of the 5.3 INFORMATION
pin 1 3-10 DC-DC converter IC and peripheral parts for ON POWER
pin 25 3-9 each voltage point of the MAIN Assy. DIAGNOSTICS
If an error is detected, repair the defective parts.
B MAIN Assy
IC1407 V+3R3D Block
1-94
IC1405 V+5DBlock
1-95
IC1403 V+34DBlock
1-96
2 Filament PNLA Assy Check that the FL filament voltage is If the voltage is outside the normal range, a bias —————
voltage error V6601: 2.3 V. circuit error of the FL may be suspected.
of the FL Voltage between pins Check the mounting status of Q6601, Q6602,
1P to 32P and peripheral parts. If there is no problem,
3-11 Q6601 or Q6602 may be defective.
Replace them.
3 Signal errors PNLA Assy Check for the output signal of the FL If no signal is output, check for the mounting 10.35 WAVEFORMS
V6601 communication line and the cable status of SUB UCOM (IC6601). 3-14 3-13 3-15 3-16
C
pin 22 3-14 connection status in the PNLA Assy. If there is no problem, the port may be defective.
pin 21 3-13 • FL_SCK Replace it.
pin 23 3-15 • FL_TXD If soldering is improper, resolder it.
pin 24 3-16 • FL_LAT
• FL_BK
4 Defective FL PNLA Assy If the symptom persists after the above FL may be defective. —————
corrections. Replace it.
[6] CONTROL
The control signal is output from the FPGA (IC3007).
D To make the diagnostic procedure easier, set the CROSS FADER ASSIGN selectors for all channels to THRU before starting
diagnosis.
[6-1] The FADER START function does not work
0 Prior USER SETUP • Check that FADER START in the USER ————— Operating
Confirmation settings SETUP is set to ON. instructions
FADER START button • Check that the FADER START button is
settings set to ON.
1 Signal errors/ MAIN Assy • Check for the FADER_START signal • If the signal is output, the CONTROL cable 10.35 WAVEFORMS
E Loose C231 to C238 1-97 when the CH FADER is changed from may be defective. Replace it. 1-97
connection Representative CH1 0 to 10. • If the signal is not output, go to [2].
• Check for the FADER_STOP signal
when the CH FADER is changed from
10 to 0.
2 Power failure MAIN Assy Check for the V+5D_CONTROL power. • If the V+5D_CONTROL power can be 4.4 POWER
R222 1-98 confirmed, go to [3]. BLOCK DIAGRAM
• If V+5D_CONTROL power cannot be found, 5.3 INFORMATION
soldering of any part in the V+5D_CONTROL ON POWER
power path may be defective. Check the DIAGNOSTICS
soldering status. If soldering is OK, replace the
defective part.
3 Signal errors/ MAIN Assy • Check for the FADER_START signal • If signal is output, the CONTROL block must 10.35 WAVEFORMS
defective parts R3057, R3058 1-99 when the CH FADER is changed from be improperly defective. Replace it. 1-99
F Representative CH1 0 to 10. • If no signal is output, the FPGA (IC3007)
• Check for the FADER_STOP signal must be improperly soldered or defective.
when the CH FADER is changed from
10 to 0.
30 DJM-850-K
1 2 3 4
5 6 7 8
5.3 POWER SUPPLY DIAGNOSIS INFORMATION
Observing Normal Voltage Possible defective point when Standby State A

Name Remarks
Point Level a voltage error is generated (Power SW ON)
MAIN UCOM (IC2803), RESET IC (IC2801),
1 V+11E_UNREG 7.2 to 18 ON
SETUP LED (PNLA ASSY)
2 V+13D_UNREG 9.7 to 17 ALL DIGITAL CIRCUIT OFF
V+15A
3 14.25 to 15.75 ANALOG AUDIO CIRCUIT OFF
(V+15A_*)
V-15A
4 -15.75 to -14.25 ANALOG AUDIO CIRCUIT OFF
(V-15A_*)
V+5A
5 4.7 to 5.4 DAC, ADC OFF
(V+5A_*)
V+5D FL, LED, MIDI, DIGITAL OUT,
6 4.75 to 5.35 OFF
(V+5D_*) MAIN UCOM (IC2803)
B
MAIN ASSY
V+3R3E MAIN UCOM (IC2803), RESET IC (IC2801),

7 3.2 to 3.4 ON
(V+3R3E_*) SETUP LED (PNLA ASSY)
V+3R3A
8 3.2 to 3.4 ADC OFF
(V+3R3A_*)
V+3R3D
9 3.15 to 3.45 ALL DIGITAL CIRCUIT OFF
(V+3R3D_*)
V+3R3D_REFA
10 3.15 to 3.45 MAIN UCOM (IC2803) OFF
(V+3R3D_REFA_*)
V+2R5D
11 2.4 to 2.6 USB UCOM (IC2603) OFF
(V+2R5D_*)
V+1R2D FPGA (IC3007), DSP (IC3201),
12 1.1 to 1.28 OFF
(V+1R2D_*) USB UCOM (IC2603)
V+34D
13 31 to 36 FL OFF
(V+34D_*) C
14 V+5VBUS Power of the connected PC 4.75 to 5.25 USB communication failure ON
INPUT ASSY
15 V+15A After the polyswitch 14.25 to 15.75 INPUT CIRCUIT OFF

16 V-15A After the polyswitch -15.75 to -14.25 INPUT CIRCUIT OFF
V+5D
17 4.75 to 5.35 MIDI OUT OFF
(V+5D_*)
18 V+15A_UNREG 17.6 to 27.8 ANALOG AUDIO CIRCUIT OFF
19 V-15A_UNREG -17.6 to 27.8 ANALOG AUDIO CIRCUIT OFF
20 V+5A_UNREG 7.4 to 12.0 DAC, ADC OFF
SEC/HP ASSY
21 V+13D_UNREG 9.7 to 17 ALL DIGITAL CIRCUIT OFF

22 V+HP_UNREG Before the polyswitch 4.5 to 9.5 HP CIRCUIT OFF D
23 V+HP_UNREG_1 After the polyswitch 4.5 to 9.5 HP CIRCUIT OFF
24 V-HP_UNREG -4.5 to -9.5 HP CIRCUIT OFF
25 V+15A 14.25 to 15.75 ANALOG AUDIO CIRCUIT OFF
26 V-15A -15.75 to -14.25 ANALOG AUDIO CIRCUIT OFF
27 V+5A 4.7 to 5.4 DAC, ADC OFF
28 V+15A_UNREG 17.6 to 27.8 ANALOG AUDIO CIRCUIT OFF
29 V-15A_UNREG -17.6 to 27.8 ANALOG AUDIO CIRCUIT OFF
REG ASSY
30 V+5A_UNREG 7.4 to 12.0 DAC, ADC OFF

31 V+15A 14.25 to 15.75 ANALOG AUDIO CIRCUIT OFF
E
32 V-15A -15.75 to -14.25 ANALOG AUDIO CIRCUIT OFF
33 V+5A 4.7 to 5.4 DAC, ADC OFF
V+5D_LED
34 4.75 to 5.35 FL,LED OFF
(V+5D_LED*)
35 V+3R3E 3.2 to 3.4 SETUP LED ON
PNLA ASSY
V+3R3D
36 3.15 to 3.45 FL, SUB UCOM (IC6601) OFF
(V+3R3D_*)
V+34D
37 31 to 36 FL OFF
(V+34D_*)
V+3R3D_REFA
38 3.15 to 3.45 CH1-4 FADER, CROSS FADER OFF
(V+3R3D_REFA_*)
PNLB ASSY
V+3R3_REFB
39 3.15 to 3.45 VR OFF F
(V+3R3D_REFB_*)
V+3R3D_REFA
40 3.15 to 3.45 CROSS FADER OFF
(V+3R3D_REFA_*)
ex) V+15A_* • • • • V+15A_O, V+15A_IN, etc • • •
DJM-850-K 31
5 6 7 8
1 2 3 4
5.4 VOLTAGE MONITORING CIRCUIT
A
Voltage-Monitoring Circuit
This unit monitors the voltages of the main power-supply ICs, using the VDET signal.
The VDET signal level is high (+3.3 V) during normal operations. When the level becomes low (0 V), detect abnormality
in the MAIN UCOM (IC2803).
Product behavior when an error is generated

If power failure is detected with the VDET signal, the MAIN UCOM will stop supplying the primary source of
power to the main transformer, setting the RELAY_CONT signal to low and interrupting the relay RY3001.
MAIN ASSY
SEC/HP
V+34D
ASSY
B V+5D
V+3R3D Monitoring Voltage
V+1R2D monitoring
V+15A circuit
V-15A
V+5A
V+3R3A
TRANS
ASSY
VDET
H: Normal
L: Abnormal
PNLA ASSY
H: Main trans. is output.
C RELAY_CONT L: Main trans. output is stopped.
SETUP LED
STBY_LED D6624 (RED)
MAIN UCOM
IC1404
(IC2803)
PRIMARY
ASSY
Flashing when
V+11E_UNREG V+3R3E
IC1401 an error occurs
LDO
Always output during power-on
The MAIN UCOM also informs of power failure with flashing of the SETUP button, by sending the STBY_LED signal:
Flashing intervals: 250 ms (lit for 125 ms/unlit for 125 ms)
As the switching-system output is stopped, the indications other than the SETUP LED are unlit and all the switches
D and VRs are disabled.
Diagnostic procedure
If any voltage is abnormal, that error will be detected by the voltage-monitoring program after it is started after a usual
startup of the unit. Then the power supply to the main transformer will be stopped. For this reason, power will be supplied
for about 1 sec after startup.
Identify which power-supply IC is defective, by turning the unit OFF then back ON while monitoring each voltage with an
oscilloscope. Check the value of each voltage immediately before stopping power supply.
Note: Each time before turning the unit ON, make sure that each power-supply IC is not short-circuited to GND.
E
32 DJM-850-K
1 2 3 4
5 6 7 8
Circuit diagram of the voltage-monitoring section A
Voltage abnormality detect circuit

V+34D V+5D V+5A V+15A V+34D
D MAIN ASSY
R1247
6.2k
(D)
1SS301
Low value Hi value
D1205
V+34D 27.63V 44.59V
V+5A
V+5D 3.70V 7.21V
R1215
R1233
V+3R3D
200
33k
(D)
(D)
STBY V+3R3D 2.37V 4.31V
1000p/50
C1201
R1201
R1204 R1252
160k
V+1R2D 2.18V
NM 82k 4.92V
V+15A 19.73V
R1248
R1234
(D)
750
4.7k
(D)
(D)
R1203 Q1201 R1214 R1231 -19.30V
V-15A -6.97V
HN1A01FU(YGR) V+3R3E
0 (1/2) 1k 2.7k V+5A 3.65V 7.21V
GNDD
1000p/50
(D) (D)
R1202
C1210
Q1202 Q1206
39k V+3R3A 1.29V 6.22V
R1216
R1249
R1243
HN1A01FU(YGR) HN1A01FU(YGR)
820
10k
(1/2)
(D)
(2/2)
0
R1246
GNDD D1201 GNDD GNDD

100
VDET
10:14F To MAIN_UCOM
GNDD
0.01u/16
C1215
Q1208 NORMAL
V+5D V+3R3D LTC114YUB High B
1SS352
D1202
1SS301 ABNORMAL
Low
STBY GNDD GNDD
C1202
R1205
0.1u/10
R1208
16k
(D)
V+3R3A
NM
R1207 Q1201
HN1A01FU(YGR)
GNDD 0 (2/2)
R1244
R1206
12k
43k
(D)
(D)
Q1207
GNDD HN1B04FU(YGR)
(2/2)
R1245
V+15A V+5A R1253
33k
(D)
100k
(D)
R1210
R1213
47k
(D)
10k V-15A
(D) GNDD
R1212 Q1202
HN1A01FU(YGR)
0 (1/2)
R1211
62k
(D)
GNDD
C
V+3R3A V+1R2D
STBY
C1214
R1235
0.1u/10
R1238
24k
(D)
NM
R1237 Q1206
HN1A01FU(YGR) D1204
0 (2/2)
GNDD
R1236
22k
(D)
1SS301
GNDD
V+34D V+3R3A
R1239
R1242
47k
(D)
100k
(D)
R1241 Q1207
HN1B04FU(YGR)
0 (1/2)
R1240
33k
(D)
D
R1251
V-15A
Table 1: Voltage value of the voltage-monitoring section

Over voltage / Threshold
Power Cause of error detection
Under voltage Detection range in consideration of variations Center value
+ More than 38.50 to 49.57 V 44.59 V Abnormality around IC1403
V+34D Abnormality around IC1403 or,
− 19.72 to 30.29 V or less 27.63 V
Short-circuiting at GND or different power supply
Abnormality around IC1404 or,
+ More than 6.08 to 8.43 V 7.21 V E
Short-circuiting at different power supply
V+5D
− 3.37 to 4.30 V or less 3.70 V
+ More than 3.89 to 4.65 V 4.31 V
V+3R3D
− 1.26 to 2.81 V or less 2.37 V
V+1R2D + More than 1.87 to 2.38 V 2.18 V
+ More than 17.43 to 21.54 V 19.73 V Short-circuiting at regulator (IC5002) IN/OUT
V+15A
− 3.72 to 7.23 V or less 4.92 V Short-circuiting at GND or different power supply
+ More than -17.07 to -21.55 V -19.30 V Short-circuiting at regulator (IC5003) IN/OUT
V-15A
− -6.24 to -8.29 V or less -6.97 V Short-circuiting at GND or different power supply
+ More than 6.08 to 8.43 V 7.21 V Short-circuiting at regulator (IC5001) IN/OUT F
V+5A
+ More than 4.01 to 6.72 V 6.22 V Short-circuiting at regulator (IC1402) IN/OUT
V+3R3A
DJM-850-K 33
5 6 7 8
1 2 3 4
5.5 ABOUT POLYSWITCH
A This unit monitors the voltages of the main power-supply ICs, using the voltage-monitoring circuit. As resettable fuses
(PolySwitches) are also used, some circuits cannot be monitored by the voltage-monitoring circuit when any resettable fuse is
activated.
The resettable fuse opens when excess current flows and will be restored to a conductive state after the cause of the
corresponding circuit error is removed. (Replacement of the resettable fuse is not required if the corresponding circuit error is
remedied.)
Circuits using the resettable fuses

1 INPUT ASSY
Power-supply line using a resettable fuse: V+15A
Power-supply line using a resettable fuse: V-15A
B
A circuit in the INPUT Assy may be in failure if the voltages of the above-mentioned power in the INPUT Assy are 0 V, with
the UTILITY LED (STBY_LED) not flashing.
Possible causes: Abnormal audio input
Item to be checked: Check the peripheries of the ICs in the INPUT Assy to which the above-mentioned power is supplied.
SEC/HP ASSY INPUT ASSY
V+15A Poly switch V+15A

CN4801
TH1: PTGL05AS3R9K2B5
CN2
V-15A Poly switch V-15A

TH2: PTGL05AS3R9K2B5
2 SEC/HP ASSY
Power-supply line using a resettable fuse: V+HP_UNREG
A circuit in the SEC/HP Assy may be in failure if the voltages of the above-mentioned power in the SEC/HP Assy are 0 V, with
D the UTILITY LED (STBY_LED) not flashing.
Possible causes: Abnormal or no HP output
Item to be checked: Check if there is any abnormality in the periphery of Q105 or Q106.
SEC/HP ASSY
V+HP_UNREG Poly switch
Q105
P101: RXEF075P-T
Diagnostic procedure when any resettable fuse is activated

1. Unplug the AC power cord.
2. Check for any error, such as short-circuiting or defective parts, in the circuits downstream from the resettable fuse.
3. Repair the detective part.
34 DJM-850-K
1 2 3 4
5 6 7 8
5.6 ABOUT PROTECTOR
This unit uses ICPs (IC protectors) in MASTER1 output circuit. A

If the specified signal from the MASTER 1 connectors (XLR) is not properly output, check if any ICP is activated.
D MAIN ASSY
MASTER1 L MASTER1 R
JA301 JA302
DKB1093-A DKB1093-A
4 4
1 2 1 2
3 3
B
MASTER1_L_COLD MASTER1_R_COLD
COLD
COLD
HOT
HOT
CFHXSQ472J16-T
CFHXSQ472J16-T
Q305 Q307
INC2002AC1 INC2002AC1
R378 R380
DZ2S180C
DZ2S180C
4700p/16
4700p/16
C359
D302
C361
D304
18k 18k
R382
R384
NM
NM
STBY
STBY
CFHXSQ472J16-T
CFHXSQ472J16-T
R383
R385
DZ2S180C
DZ2S180C
NM
NM
4700p/16
4700p/16
C360
D303
C362
D305
R379 R381
18k Q306 18k C

Q308
INC2002AC1 INC2002AC1
GNDA_OUT GNDA_OUT
P302 P301
1 2 1 2
AEK1073-A AEK1073-A
MASTER1_L_HOT MASTER1_R_HOT
DJM-850-K 35
5 6 7 8
1 2 3 4
5.7 V+34D DIAGNOSIS
A The driver power output for the FL (V+34D) is controlled with a transistor switch.
Diagnostic procedures when only V+34D is not output

1 Check V+34D_1 at the prior stage of the transistor (Q1402).
2 If no signal is detected at V+34D_1, the mounting status of the peripheral parts of the 34V DC/DC converter
(IC1403) may be improper or IC1403 itself may be defective.
3 If a signal is detected at V+34D_1, check the Q1405 and Q1406.
If V+34D_CONT is L, the mounting status of the MAIN UCOM (IC2803) may be improper or IC2803 itself may be
defective.
If V+5A is 0 V, confirm an output of IC5001 of REG Assy and connection state.
4 If both V+34D_CONT and V+5A are H:
B If the output signal from Q1406 is L, the mounting status of Q1406 may be improper or Q1406 itself may be defective.
5 When the above does not have any problem, the following problems are thought about.
1. The mounting status of the peripheral parts of Q1401 or Q1402 may be improper or Q1401/Q1402 may be defective.
2. The mounting status of the peripheral parts of Q1403 or Q1404 may be improper or Q1403/Q1404 may be defective.
13V 34V (FL) D MAIN ASSY
C
STBY
V+34D_1 1 V+34D
R1404
R1405
R1406 C1412
SQ
SQ
1.5
1.5
NM NM
A side Q1402
LSA1576UB(QRS)
A side
L1401 D1403
DTL1123-A
470uH RB160L-40
IC1403 ! R1414
R1417
100k
V+13D_UNREG
47k
15k
15k
15k
15k
15k
R1403 8 1
CD CS
1 . 5 k SR 7 2
SI ES
C1405 STBY
6 3
R1415
R1418
R1421
R1422
R1423
R1424
R1425
1000p/50
V+ CT
100u/50
SR
18k
47k
C1414
R1407
C1417
C1461
C1416
SR (D)
0.1u/50
5 4 100p/50 CH
NM
CH
SR
39k
IN- GND
CCG1236-A
1000p/50
100u/25
C1403
C1404
C1454
C1455
NJM2392M
0.1u/25
10u/35
CH
SR
R1408
!
SR (D)
1.5k
D V+5A
GNDD
3 GNDD_34D
Q1406
LTA124EUB
Q1401
LTC124EUB
V+34D_CONT
From MAIN_UCOM Q1405
10:12K
3
LTC124EUB
5
Q1404
LSC4081UB(QRS)
3 V+34C_CONT V+34D Discharge circuit 4 GNDD
High R1416
Q1403
GNDD LSC4081UB(QRS)
Low 2.2k
5
E GNDD
36 DJM-850-K
1 2 3 4
5 6 7 8
5.8 ERROR INDICATIONS
A
Indications of Errors during Startup
Error (in the Detecting
Indication Cause Diagnostic procedure
order of detection) Microcomputer
MAIN UCOM MAIN UCOM Repeated 4-time flashing of the ROM error check Troubleshooting: [1-2]
(IC2803) (IC2803) SETUP LED.
FPGA MAIN UCOM Repeated 2-time flashing of the Configuration with MAIN UCOM Troubleshooting: [1-3]
(IC3007) (IC2803) SETUP LED. is NG
SUB UCOM MAIN UCOM Repeated 5-time flashing of the Handshake with MAIN UCOM Troubleshooting: [1-4]
DSP MAIN UCOM Repeated 1-time flashing of the Handshake with MAIN UCOM Troubleshooting: [1-5]
B
USB UCOM MAIN UCOM Repeated 6-time flashing of the Handshake with MAIN UCOM Troubleshooting: [1-6]
(Audio section)(IC2603) (IC2803) SETUP LED. is NG
Indications of Errors during Power Failure

The SETUP LED infinite flashes.
Indications of Errors during Updating

C
Effect Parameter SETUP LED BPM
Microcomputer in failure Correspondence
Indication Indication flashing Indication
ERROR E004 4 Lit off MAIN UCOM UPDATE error Please update it again.
ERROR E002 2 Lit off FPGA UPDATE error Please update it again.
ERROR Non 5 Lit off SUB UCOM UPDATE error Please update it again.
ERROR E001 1 Lit off DSP data UPDATE error Please update it again.
ERROR E001 1 Lit off DSP program UPDATE error Please update it again.
ERROR E006 6 Lit off USB UCOM UPDATE error Please update it again.
ERROR E008 8 Lit off USB UCOM BOOT UPDATE error Please update it again.
ERROR E009 9 Lit off SYS Ver. UPDATE error Please update it again.
ERROR E000 Non Lit off Others, the whole error Please update it again.
D
DJM-850-K 37
5 6 7 8
1 2 3 4
5.9 CONNECTION CHECK WITH EACH INTERFACE
A
USB
[USB Bconnector]
Whether communication between the PC connected via the USB B connector and this unit is properly performed or not can
be confirmed on the PC.
Note: The driver software must be installed beforehand.
Use Device Manager for checking.

If the PC and this unit are properly connected, the components of this unit
are added in Device Manager (under Hardware) as devices.
B
If all components are properly displayed, the PC and this unit are properly
communicating via the USB connector.
In a case of Windows XP:

Start, Control Panel, System, Hardware, then Device Manager
Devices to be added:
• Universal Serial Bus controllers
USB Composite Device
• Under “Sound, video and game controllers”
PIONEER DJM-850
USB Audio Device
C
A communication check may be easily performed if connection
is made with Device Manager displayed on the PC screen.
38 DJM-850-K
1 2 3 4
5 6 7 8
5.10 HOW TO CONFIRM THE DVS SIGNAL ROUTE
What is the DVS (Digital Vinyl System)? A
The Digital Vinyl System (DVS) enables control of DJ software with normal DJ's operations of the CDJs or turntables, with use
of a control CD or VINYL supplied with DJ software that supports the DVS. A control disc contains timecodes for controlling
DJ software, which enable playback of music files stored on the PC from an assigned playback position at an assigned
playback speed.
Note: For checking operations as the DVS, a control CD (CD on which timecodes are recorded) is required. However,
assuming a case where no control CD is available, a simple check procedure using a music CD is explained here.
Necessary Items
• PC with the USB driver and TRAKTOR (demo version or TRAKTOR DDJ-T1 EDITION possible) installed
Can download the Traktor demo version from the following URL. B
http://www.native-instruments.com/#/en/products/dj/traktor-pro-2/?page=1975
• Media (CD, etc.) for checking operations, CDJ player
Check Procedures
1. Connect this unit and a PC, using the USB cable.
2. Connect the audio output of CDJ Player to the CD/LINE of CH1 of this unit.
3. Set the CD/LINE, PHONO, LINE, and USB */* selectors to USB1/2.
4. For details on settings to be made on the PC, see “Settings for the Driver” and “Settings on TRAKTOR” below.
5. Play back the CDJ Player, and check the following items:
• The level meters of Input Routing and Master Out on the TRAKTOR move in sync with audio output signals.
• The Master Out is output normally. C
*Repeat the above steps for channels 2 to 4, to check the DVS paths.
Note:
The Master Out signal will not be output if the MAIN volume control is set to the minimum volume position.
If the MAIN volume indicators are not displayed on the screen, set the TRAKTOR screen to Full screen.
D
[Connection Diagram (When the CDJ Player is Connected to CH1)]
DJM-850 DJM-850
Computers
USB cable
Power amplifier
CDJ player
DJM-850-K 39
5 6 7 8
1 2 3 4
A
Settings for the Driver
Start up the "DJM-850 Settings Utility".
(Reference)
For Windows
Click [Start] menu → [All Programs] → [Pioneer] → [DJM-850] → [DJM-850 Settings Utility].
For MacOS
Click [Macintosh HD] → [Aplications] → [Pioneer] → [DJM-850] → [DJM-850 Settings Utility].
MIXER INPUT MIXER OUTPUT

B
CH1: USB CH1 Timecode CD/LINE
When the CD/LINE, PHONO, LINE, and USB */* selectors Set the Timecode CD/LINE.
of the mixer are set to USB*/*, “USB” must be displayed
on the PC screen.
40 DJM-850-K
1 2 3 4
5 6 7 8
A
Settings on TRAKTOR
1 After starting TRAKTOR, set the deck layout, in "Mixer".
Figure of TRAKTOR2 screen image
2 Set the deck A to D, in "Live Input".
3 Select Traktor then Preferences, or click on the "Preferences" button.
Figure of TRAKTOR2 screen image F
DJM-850-K 41
5 6 7 8
1 2 3 4
A 4 In "Audio Setup", select "DJM-850". 6 In "Input Routing", select "Input Channel A-D".
C Figure of TRAKTOR2 screen image Figure of TRAKTOR2 screen image
5 In "Output Routing", select "External, With the above settings, CH 1 of the mixer is assigned to
Output Channel A-D". Deck A, CH 2 to Deck B, CH 3 to Deck C, and CH 4 to
Deck D.
7 Close the "Preferences" window, by clicking on the

Close "×" button.
8 Play the Audio signal of a Player connected to the

D
Mixer, and confirm that a sound is output by the
MASTER output.
The TRIM knob, Channel Fader, MASTER LEVEL
knob of the input path do operation like normal mixer
use.
42 DJM-850-K
1 2 3 4
5 6 7 8
5.11 IC INFORMATION
A
DYW1806 (MAIN ASSY: IC2803)
MAIN UCOM
• Pin Function
Pull-up
No. I/O Port Name I/O Signal Name Description
(Note)
1 P60/SCL0 O LINE_SEL1 CH1 LINE/PHONO input line switch ×
2 P61/SDA0 O LINE_SEL2 CH2 LINE/PHONO input line switch ×
3 P62 O LINE_SEL3 CH3 LINE/PHONO input line switch ×
4 P63 O LINE_SEL4 CH4 LINE/PHONO input line switch ×
5 P31/TI03/TO03/INTP4 O DEBUG_LED Debug LED indication confirmation ×
6 P64/RD O MCPU_RD Bus control × B
7 P65/WR0 O MCPU_WR0 Bus control ×
8 P66/WR1 O NC Bus control: Not used (open) ×
9 P67/ASTB O MCPU_ASTB Bus control ×
10 P77/EX23/KR7/INTP11 O RELAY_CONT Standby mode transition ×
11 P76/EX22/KR6/INTP10 O CPU_MUTE Mute signal H: MUTE, L: MUTE cancel ×
12 P75/EX21/KR5/INTP9 O NC Not used (open) ×
13 P74/EX20/KR4/INTP8 I POWER_RESET_A Standby mode transition ×
14 P73/EX19/KR3 O V+34D_CONT Power supply start-up, down for sequence control ×
15 P72/EX18/KR2 O V+5D_CONT Power supply start-up, down for sequence control ×
16 P71/EX17/KR1 O V+3R3D_CONT Power supply start-up, down for sequence control ×
17 P70/EX16/KR0 O V+1R2D_CONT Power supply start-up, down for sequence control ×
18 P06/WAIT O SUB_CTRL NEC B control signal ×
C
(Communication permission signal to NEC B)
19 P05/CLKOUT O NC Not used (open) ×
20 EVSS1 G GNDD Ground −
21 P80/EX0 I/O MCPU_DATA0 Bus input / output 0 ×
29 P30/INTP3/RTC1HZ O SUB_CPU_RESET SUB UCOM reset ×
30 EVDD1 V V+3R3E Power supply (Connect to 3.3 V) − D
39 P17/EX31TI02/TO02 I HWAIT HWAIT ×
40 P16/EX30/TI01/TO01/INTP5 I USB_REQ Communication prohibition signal from USB UCOM (BF) _
(0 can communicate)
41 P15/EX29/RTCDIV/RTCCL O USB_RCV Transmission permission signal to USB UCOM (BF) × E
(1 admits the transmission)
42 P14/EX28/RxD3 I USB_SI UART input from USB UCOM (BF) ×
43 P13/EX27/TxD3 O USB_SO UART output to USB UCOM (BF) ×
44 P12/EX26/SO00/TxD0 O FPGA_SO Sync serial data output for FPGA ×
45 P11/EX25/SI00/RxD0 O USB_RESET USB reset ×
46 P10/EX24/SCK00 O FPGA_SCK Serial clock output for FPGA ×
47 AVREF1 V V+3R3E Power supply (Connect to 3.3 V) −
48 P110/ANO0 I USB_ERR_MAIN Error signal from USB −
49 P111/ANO1 I VDET Power supply abnormality detection −
50 AVREF0 V V+3R3D_REFA Power supply (Connect to 3.3 V) −
Note "−": There is no built-in pulling up function

F
DJM-850-K 43
5 6 7 8
1 2 3 4
A
• Pin Function
Pull-up
(Note)
51 AVSS G GNDREF_A Ground −
52 P157/ANI15 I VR_TRIM4 Trim 4 −
53 P156/ANI14 I VR_FADER4 CH4 fader −
58 P151/ANI9 I VR_FADER_CRS Cross fader −
B
61 P26/ANI6 O NC Not used (open) −
62 P25/ANI5 O DSP_RESET DSP reset −
63 P24/ANI4 O DIT_RESET DIT reset −
64 P23/ANI3 O DOUT_SRC_RESET DIT SRC reset −
65 P22/ANI2 O AD_DA_RESET ADC DAC reset −
66 P21/ANI1 O NC Not used (open) −
67 P20/ANI0 O DBG_PORT2(NC) Palpation port for microcomputer debug −
68 P130 O STBY_LED UTILITY/Standby cancellation key indicator ×
69 P131/TI06/TO06 O DSP_USB_WP Write protect (4 MBit serial FLASH for MAIN, DSP common use) ×
70 P04/SCK10/SCL10 O MFL_SCK Sync serial clock output for MAIN Flash ×
71 P03/SI10/RxD1/SDA10 I MFL_RxD Sync serial data input for MAIN Flash ×
C 72 P02/SO10/TxD1 O MFL_TxD Sync serial data output for MAIN Flash ×
73 P01/TO00 O MFL_CS Chip select for MAIN Flash ×
74 P00/TI00 I EFX_ON/OFF Beat effect ON/OFF switch ×
75 P145/TI07/TO07 O MFL_WP Write protect (4 MBit serial FLASH for built-in MAIN) ×
76 P144/SO20/TxD2 O MIDI_TXD MIDI output ×
77 P143/SI20/RxD2/SDA20 O FPGA_RESET FPGA reset ×
78 P142/SCK20/SCL20 O FPGA_XPGM PROG_B output signal ×
79 P141/PCLBUZ1/INTP7 I SUB_INT Notice during the access to FPGA and external interrupt
generation signal to SUB UCOM ×
80 P140/PCLBUZ0/INTP6 I STBY_KEY Standby cancel interrupt, external interrupt pin ×
81 P120/INTP0/EXLVI O DBG_PORT1(NC) Palpation port for microcomputer debug ×
82 P47/INTP2 O DBG_PORT0(NC) Palpation port for microcomputer debug ×
D 83 P46/INTP1/TI05/TO05 O DSP_USB_CS Chip select for DSP Update/USB Boot (course switch) ×
84 P45/SO01 O DSP_USB_SO Serial data output for DSP Update/USB Boot ×
85 P44/SI01 I DSP_USB_SI Serial data input for DSP Update/USB Boot ×
86 P43/SCK01 O DSP_USB_CLK Serial clock output for DSP Update/USB Boot ×
87 P42/TI04/TO04 I RETERN_IN RETURN output connection confirmation switch ×
88 P41/TOOL1 O TOOL1 Clock output for debugger ×
89 P40/TOOL0 I/O TOOL0 Flash memory programer/Data input, output for debugger ×
90 RESET I RESET_OUT Reset cancellation of MAIN UCOM −
91 P124/XT2 I FPGA XINIT INT_B input signal −
92 P123/XT1 I FPGA_DONE DONE input signal (for end judgments) −
93 FLMD0 I FLMD0 Draw a flash memory programming mode −
94 P122/X2/EXCLK O X2 X2 (crystal/ceramic) oscillation −
E 95 P121/X1 I X1 X2 (crystal/ceramic) oscillation −
96 REGC O REGC Regulator output for internal working −
97 VSS G GNDD Ground −
98 EVSS0 G GNDD Ground −
99 VDD V V+3R3E Power supply (Connect to 3.3 V) −
100 EVDD0 V V+3R3E Power supply (Connect to 3.3 V) −
44 DJM-850-K
1 2 3 4
5 6 7 8
A
DYW1809 (PNLA ASSY: IC6601)
SUB UCOM
• Pin Function
Pull-up
(Note)
1 P60/SCL0 O NC Not used (open) ×
2 P61/SDA0 O NC Not used (open) ×
3 P62 O NC Not used (open) ×
5 P31/TI03/TO03/INTP4 I CFX_BEAT_SW1 CFX_BEAT1 key input ×
6 P64/RD I CFX_BEAT_SW2 CFX_BEAT2 key input × B
7 P65/WR0 I CFX_BEAT_SW3 CFX_BEAT3 key input ×
8 P66/WR1 I CFX_BEAT_SW4 CFX_BEAT4 key input ×
9 P67/ASTB O NC Not used (open) ×
10 P77/EX23/KR7/INTP11 O LED_MTX_SEL0 LED matrix grid selection signal 0 ×
14 P73/EX19/KR3 O LED_MTX_SEL4 LED matrix grid selection signal 4 ×
18 P06/WAIT O VR_SEL_0_0 × C
VR select (0_0, 0_1) for IC6602
19 P05/CLKOUT O VR_SEL_0_1 ×
20 EVSS1 G GNDD Ground for port −
21 P80/EX0 O LED_OUT8 LED lighting signal 8 ×
29 P30/INTP3/RTC1HZ O LED_OUT0 LED lighting signal 0 ×
30 EVDD1 V V+3R3D_PA Power supply for port −
D
38 P57/EX15 O NC Not used (open) ×
39 P17/EX31TI02/TO02 O KEY_MTX_SEL0 Key matrix grid selection signal 0 ×
40 P16/EX30/TI01/TO01/INTP5 O KEY_MTX_SEL1 Key matrix grid selection signal 1 ×
41 P15/EX29/RTCDIV/RTCCL O KEY_MTX_SEL2 Key matrix grid selection signal 2 ×
42 P14/EX28/RxD3 O KEY_MTX_SEL3 Key matrix grid selection signal 3 ×
43 P13/EX27/TxD3 O KEY_MTX_SEL4 Key matrix grid selection signal 4 × E
44 P12/EX26/SO00/TxD0 O KEY_MTX_SEL5 Key matrix grid selection signal 5 ×
45 P11/EX25/SI00/RxD0 O KEY_MTX_SEL6 Key matrix grid selection signal 6 ×
46 P10/EX24/SCK00 O KEY_MTX_SEL7 Key matrix grid selection signal 7 ×
47 AVREF1 V V+3R3D_REFB_PA Reference power supply for DAC −
48 P110/ANO0 I BEAT_DOWN Beat down key input −
49 P111/ANO1 I BEAT_UP Beat up key input −
50 AVREF0 V V+3R3D_REFB_PA Reference power supply for AD −
DJM-850-K 45
5 6 7 8
1 2 3 4
A
• Pin Function
Pull-up
(Note)
51 AVSS G GNDD_REFB_PA Reference ground for AD/DA −
52 P157/ANI15 I VR_IN1 VR IC 1_1 (for IC6604) −
58 P151/ANI9 I EFX_CH_SEL Effect CH select (Perform a voltage value in AD) −
59 P150/ANI8 O SUB_INT Interrupt request signal to MAIN UCOM −
B
60 P27/ANI7 I KEY_IN7 Key input signal 7 −
69 P131/TI06/TO06 I CFX1_SW CFX_SW1 key input ×
70 P04/SCK10/SCL10 I CFX2_SW CFX_SW2 key input ×
71 P03/SI10/RxD1/SDA10 O NC Not used (open) ×
C 72 P02/SO10/TxD1 O NC Not used (open) ×
73 P01/TO00 O VR_SEL_1_0 ×
VR select (1_0, 1_1) for IC6603, 6604
74 P00/TI00 O VR_SEL_1_1 ×
75 P145/TI07/TO07 O FL_BK Break signal for FL ×
76 P144/SO20/TxD2 O FL_TXD Sync serial data output for FL update ×
77 P143/SI20/RxD2/SDA20 I TAP_SW1 TAP SW key input ×
78 P142/SCK20/SCL20 O FL_SCK Serial clock output for FL update ×
79 P141/PCLBUZ1/INTP7 I CFX3_SW CFX_SW3 key input ×
80 P140/PCLBUZ0/INTP6 I CFX4_SW CFX_SW4 key input ×
81 P120/INTP0/EXLVI O FPGA_SIGNAL Communication start signal to FPGA ×
82 P47/INTP2 O NC Not used (open) ×
83 P46/INTP1/TI05/TO05 O FL_LAT Latch signal for FL ×
D 84 P45/SO01 O FPGA_TX_DAT Transmit data of FPGA ×
85 P44/SI01 I FPGA_RX_DAT Receive data from FPGA ×
86 P43/SCK01 O FPGA_CLK Data transmission and reception clock with FPGA ×
87 P42/TI04/TO04 I SUB_CTRL SUB UCOM control signal (Communication permission signal from MAIN UCOM) ×
88 P41/TOOL1 O TOOL1 Clock output for debugger ×
89 P40/TOOL0 O TOOL0 Flash memory programmer/Clock input, output for debugger ×
90 RESET I SUB_CPU_RESET Reset cancellation from MAIN UCOM −
91 P124/XT2 I ENC1_1 Encoder 1 −
92 P123/XT1 I ENC1_0 Encoder 1 −
93 FLMD0 I FLMD0 Draw a flash memory programming mode −
94 P122/X2/EXCLK O X2 X1 (crystal/ceramic) oscillation −
95 P121/X1 I X1 X1 (crystal/ceramic) oscillation −
E 96 REGC V REGC Regulator output for internal working, be connected to Vss through a capacitor. −
97 VSS G GNDD Ground −
98 EVSS0 G GNDD Ground for port −
99 VDD V V+3R3D_PA Power supply −
100 EVDD0 V V+3R3D_PA Power supply for port −
46 DJM-850-K
1 2 3 4
5 6 7 8
A
D810K013BZKB400 (MAIN ASSY: IC3201)
DSP
• Pin Function
Pin No. Pin Name I/O Function and Operation
A1 Vss G GND
A2 Vss G GND
A3 Vss G GND
A4 AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11] I McASP0 receive master clock
A5 AXR0[11]/AXR2[0]/GP3[11] O Not used (open)
A6 AXR0[7]/MDIO_CLK/GP3[7] I CH1 ANALOG IN
A7 AXR0[3]/RMII_CRS_DV/AXR2[2]/GP3[7] I RETURN IN B
A8 EMB_RAS O SDRAM connection
A9 EMB_A[10]/GP7[12] O SDRAM address
A12 EMB_WE_DQM[3] O Not used (open)
A13 EMB_D[24] O Not used (open)
A14 EMB_D[26] O Not used (open)
A15 Vss G GND
A16 Vss G GND
B1 RSV2 V Power supply 1.2 V
B2 Vss G GND
B3 Vss G GND
C
B4 ACLKR0/ECAP1/APWM1/GP2[15] I McASP0 receive bit clock
B5 AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11] I McASP0 transmit master clock
B6 AXR0[8]/MDIO_D/GP3[8] I CH3 ANALOG IN
B7 AXR0[4]/RMII_RXD[0]/AXR2[1]/GP3[4] I MIC IN
B8 AXR0[0]/RMII_TXD[0]/AFSR2/GP3[0] I CH2 ANALOG IN
B9 EMB_BA[1]/GP7[0] O SDRAM bank address
B10 EMB_A[2]/GP7[4] O SDRAM address
B13 EMB_WE_DQM[2] O Not used (open)
B14 EMB_D[25] O Not used (open)
B16 DVDD V Power supply 3.3 V D
C1 USB1_VDDA33 Not used (open)
C2 USB1_VDDA18 Not used (open)
C3 USB0_VDDA12 GND
C4 AFSR0/GP3[12] I McASP0 receive frame sync
C5 ACLKX0/ECAP0/APWM0/GP2[12] I McASP0 transmit bit clock
C6 UART1_RXD/AXR0[9]/GP3[9] I CH4 ANALOG IN
C7 AXR0[5]/RMII_RXD[1]/AFSX2/GP3[5] I CH3 USB IN
C8 AXR0[1]/RMII_TXD[1]/ACLKX2/GP3[1] I CH1 USB IN
C9 EMB_BA[0]/GP7[1] O SDRAM bank address
C10 EMB_A[1]/GP7[3] O SDRAM address
C11 EMB_A[5]/GP7[7] O SDRAM address
C12 EMB_A[9]/GP7[11] O SDRAM address E
C13 EMB_SDCKE O SDRAM connection
C14 EMB_CLK O SDRAM clock
C15 EMB_WE_DQM[1]/GP5[14] O SDRAM connection
C16 EMB_D[8]/GP6[8] I/O SDRAM data bus
D1 PLL0_VDDA V Power supply 1.2 V
D2 USB0_ID G Not used (open)
D3 USB0_VBUS G Not used (open)
D4 AMUTE1/EHRPWMTZ/GP4[14] O Not used (open)
D5 AFSX0/GP2[13]/BOOT[10] I McASP0 transmit frame sync
D6 UART1_TXD/AXR0[10]/GP3[10] O Not used (open)
D7 AXR0[6]/RMII_RXER/ACLKR2/GP3[6] I CH2 USB IN
D8 AXR0[2]/RMII_TXEN/AXR2[3]/GP3[2] I CH4 USB IN
F
D9 EMB_CS[0] O SDRAM chip select
D10 EMB_A[0]/GP7[2] O SDRAM address
DJM-850-K 47
5 6 7 8
1 2 3 4
A
• Pin Function
D13 EMB_D[9]/GP6[9] I/O SDRAM data bus
E1 PLL0_VSSA G GND
E2 OSCVSS G GND
E3 USB0_VDDA18 Not used (open)
E4 USB0_DRVVBUS/GP4[15] O Not used (open)
E5 DVDD V Power supply 3.3 V
B
E6 Vss G GND
E7 Vss G GND
E10 Vss G GND
E11 Vss G GND
E13 EMB_D[13]/GP6[13] I/O SDRAM data bus
E14 EMB_D[27] O Not used (open)
E15 EMB_D[28] O Not used (open)
E16 EMB_D[14]/GP6[14] I/O SDRAM data bus
F1 OSCOUT O Not used (open)
C F2 OSCIN I CLOCK
F3 USB0_VSSA Not used (open)
F4 USB0_DP Not used (open)
F5 DVDD V Power supply 3.3 V
F6 CVDD V Power supply 1.2 V
F7 RSV1 Not used (open)
F8 Vss G GND
F9 Vss G GND
F10 Vss G GND
F13 EMB_D[15]/GP6[15] I/O SDRAM data bus
D F14 EMB_D[29] O Not used (open)
F15 EMB_D[30] O Not used (open)
F16 EMB_D[0]/GP6[0] I/O SDRAM data bus
G1 RTC_CVDD V Power supply 1.2 V
G2 RTC_VSS G GND
G3 RESET I Reset signal
G4 USB0_DM Not used (open)
G5 DVDD V Power supply 3.3 V
G6 CVDD V Power supply 1.2 V
G8 Vss G GND
G9 Vss G GND
E
G12 DVDD V Power supply 3.3 V
G13 EMB_D[1]/GP6[1] I/O SDRAM data bus
G14 EMB_D[31] O Not used (open)
G15 EMB_D[16] O Not used (open)
G16 EMB_D[2]/GP6[2] I/O SDRAM data bus
H1 RTC_XI I Power supply 1.2 V
H2 RTC_XO O Not used (open)
H3 TCK I JTAG test clock
H4 USB0_VSSA33 Not used (open)
H5 USB0_VDDA33 Not used (open)
H6 CVDD V Power supply 1.2 V
F
48 DJM-850-K
1 2 3 4
5 6 7 8
A
• Pin Function
H8 Vss G GND
H9 Vss G GND
H13 EMB_D[3]/GP6[3] I/O SDRAM data bus
H14 EMB_D[17] O Not used (open)
H15 EMB_D[18] O Not used (open)
H16 EMB_D[4]/GP6[4] I/O SDRAM data bus
B
J1 TMS I JTAG test mode select
J2 TDI I JTAG test data input
J3 TDO O JTAG test data output
J4 TRST I JTAG test reset
J5 EMU[0] I Miscellaneous emulation pin
J6 CVDD V Power supply 1.2 V
J8 Vss G GND
J9 Vss G GND
J13 EMB_D[5]/GP6[5] I/O SDRAM data bus C
J14 EMB_D[19] O Not used (open)
J15 EMB_D[6]/GP6[6] I/O SDRAM data bus
J16 EMB_D[7]/GP6[7] I/O SDRAM data bus
K1 RTCK (GP7[14]) O Not used (open)
K2 AHCLKX1/EPWM0B/GP3[14] I McASP1 transmit master clock
K3 ACLKX1/EPWM0A/GP3[15] I McASP1 transmit bit clock
K4 AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10] I McASP1 transmit frame sync
K5 DVDD V Power supply 3.3 V
K6 CVDD V Power supply 1.2 V
K8 Vss G GND
K9 Vss G GND D
K12 DVDD V Power supply 3.3 V
K13 EMB_D[20] O Not used (open)
K14 EMB_WE_DQM[0]/GP5[15] O SDRAM connection
K15 EMB_WE O SDRAM connection
K16 EMB_D[21] O Not used (open)
L1 AHCLKR1/GP4[11] I McASP1 receive master clock
L2 ACLKR1/ECAP2/APWM2/GP4[12] I McASP1 receive bit clock
L3 AFSR1/GP4[13] I McASP1 receive frame sync
L4 AMUTE0/RESETOUT O Not used (open)
L5 DVDD V Power supply 3.3 V
E
L6 CVDD V Power supply 1.2 V
L7 Vss G GND
L8 Vss G GND
L9 Vss G GND
L10 Vss G GND
L13 EMB_CAS O SDRAM column address strobe
L14 EMB_D[22] O Not used (open)
L15 EMB_D[23] O Not used (open)
L16 EMA_CAS/EMA_CS[4]/GP2[1] O Not used (open)
M1 AXR1[9]/GP4[9] O SEND OUT
F
DJM-850-K 49
5 6 7 8
1 2 3 4
A
• Pin Function
M2 AXR1[8]/EPWM1A/GP4[8] O MASTER L OUT
M3 AXR1[7]/EPWM1B/GP4[7] O USB CH4 OUT
M4 AXR1[6]/EPWM2A/GP4[6] O USB CH1 OUT
M5 DVDD V Power supply 3.3 V
M6 Vss G GND
M7 Vss G GND
M10 Vss G GND
B
M11 Vss G GND
M13 EMA_WE/UHPI_URW/AXR0[12]/GP2[3]/BOOT[14] O FPGA connection
M14 EMA_WE_DQM[0]/UHPI_HINT/AXR0[15]/GP2[9] O Not used (open)
M15 EMA_D[7]/MMCSD_DAT[7]/UHPI_HD[7]/GP0[7]/BOOT[13] I/O External data bus
M16 EMA_D[15]/UHPI_HD[15]/LCD_D[15]/GP0[15] I/O External data bus
N1 AXR1[5]/EPWM2B/GP4[5] O MASTER R OUT
N2 AXR1[4]/EQEP1B/GP4[4] O REC OUT
N3 AXR1[10]/GP5[10] O USB CH2 OUT
N4 SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4] O SPI CHIP SELECT
N5 SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6] O Not used (open)
N6 EMA_WAIT[0]/UHPI_HRDY/GP2[10] I PULL UP (3.3 V)
N7 EMA_RAS/EMA_CS[5]/GP2[2] O Not used (open)
C N8 EMA_A[10]/LCD_VSYNC/GP1[10] O Not used (open)
N9 EMA_A[3]/LCD_D[6]/GP1[3] O External data bus
N10 EMA_A[7]/LCD_D[0]/GP1[7] O External data bus
N11 EMA_A[12]/LCD_MCLK/GP1[12] O Not used (open)
N12 EMA_D[8]/UHPI_HD[8]/LCD_D[8]/GP0[8] I/O External data bus
N13 EMA_D[6]/MMCSD_DAT[6]/UHPI_HD[6]/GP0[6] I/O External data bus
N15 EMA_D[5]/MMCSD_DAT[5]/UHPI_HD[5]/GP0[5] I/O External data bus
P1 AXR1[3]/EQEP1A/GP4[3] O BOOTH OUT
P2 AXR1[2]/GP4[2] O DIGITAL OUT
P3 UART0_TXD/I2C0_SCL/TM640_OUT12/GP5[9]/BOOT[9] O Not used (open)
D P4 SPI1_SCS[0]/UART2_TXD/GP5[13] O Not used (open)
P5 SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5] O Not used (open)
P6 SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1] O BOOT mode setting/ For SPI communication
P7 EMA_CS[2]/UHPI_HCS/GP2[5]/BOOT[15] O Not used (open)
P8 EMA_BA[1]/LCD_D[5]/UHPI_HHWL/GP1[13] O External address
P9 EMA_A[2]/MMCSD_CMD/UHPI_HCNTL1/GP1[2] O External address
P10 EMA_A[6]/LCD_D[1]/GP1[6] O External address
P11 EMA_A[11]/LCD_AC_ENB_CS/GP1[11] O Not used (open)
P12 EMA_WE_DQM[1]/UHPI_HDS2/AXR0[14]/GP2[8] O Not used (open)
P13 EMA_D[4]/MMCSD_DAT[4]/UHPI_HD[4]/GP0[4] I/O External data bus
P14 EMA_D[12]/UHPI_HD[12]/LCD_D[12]/GP0[12] I/O External data bus
P15 EMA_D[3]/MMCSD_DAT[3]/UHPI_HD[3]/GP0[3] I/O External data bus
P16 EMA_D[11]/UHPI_HD[11]/LCD_D[11]/GP0[11] I/O External data bus
E
R1 DVDD V Power supply 3.3 V
R2 AXR1[1]/GP4[1] O USB CH3 OUT
R3 UART0_RXD/I2C0_SDA/TIM64P0_IN12/GP5[8]/BOOT[8] O Not used (open)
R4 SPI1_ENA/UART2_RXD/GP5[12] O For DSP processing cycle measurement
R5 SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3] O For SPI communication
R6 SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0] I BOOT mode setting/ For SPI communication
R7 EMA_OE/UHPI_HDS1/AXR0[13]/GP2[7] O FPGA connection
R8 EMA_BA[0]/LCD_D[4]/GP1[14] O Not used (open)
R9 EMA_A[1]/MMCSD_CLK/UHPI_HCNTL0/GP1[1] O External address
R10 EMA_A[5]/LCD_D[2]/GP1[5] O External address
R11 EMA_A[9]/LCD_HSYNC/GP1[9] O External address
R12 EMA_CLK/OBSCLK/AHCLKR2/GP1[15] O Not used (open)
F
50 DJM-850-K
1 2 3 4
5 6 7 8
A
• Pin Function
R13 EMA_D[2]/MMCSD_DAT[4]/UHPI_HD[2]/GP0[2] I/O External data bus
R14 EMA_D[10]/UHPI_HD[10]/LCD_D[10]/GP0[10] I/O External data bus
R15 EMA_D[1]/MMCSD_DAT[1]/UHPI_HD[1]/GP0[1] I/O External data bus
R16 DVDD V Power supply 3.3 V
T1 Vss G GND
T2 Vss G GND
T3 AXR1[0]/GP4[0] O HEAD PHONE OUT
T4 AXR1[11]/GP5[11] O Not used (open)
T5 SPI0_CLK/EQEP1I/GP5[2]/BOOT[2] I/O BOOT mode setting/ SPI CLOCK
T6 SPI1_CLK/EQEP1S/GP5[7]/BOOT[7] I BOOT mode setting B
T7 EMA_CS[3]/AMUTE2/GP2[6] O FPGA connection
T8 EMA_CS[0]/UHPI_HAS/GP2[4] O Not used (open)
T9 EMA_A[0]/LCD_D[7]/GP1[0] O External address
T12 EMA_SDCKE/GP2[0] O Not used (open)
T13 EMA_D[0]/MMCSD_DAT[0]/UHPI_HD[0]/GP0[0]/BOOT[12] I/O External data bus
T14 EMA_D[9]/UHPI_HD[9]/LCD_D[9]/GP0[9] I/O External data bus
T15 Vss G GND
T16 Vss G GND
DJM-850-K 51
5 6 7 8
1 2 3 4
A
ADSP-BF525BBCZ-5A (MAIN ASSY: IC2603)
USB UCOM
• Pin Function
A01 VSS G VSS (Ground)
A02 PF9/PPI D9/RSCLK1/xSPISEL6 I Bit clock for receive (CH3, CH4)
A03 PF11/PPI D11/TFS1/CZM I LR clock for transmission (CH3, CH4)
A04 SCL I/O Not used
A05 PF13/PPI D13/TSCLK1/xSPISEL3/CUD I Bit clock for transmission (CH3, CH4)
A06 PF15/PPI D15/DR1SEC/UART1RX/TACI3 I Audio input (CH4)
B A07 PH0/ND_D0/HOST_D0 I Not used
A08 PH2/ND_D2/HOST_D2 I Not used
A09 PH4/ND_D4/HOST_D4 I Not used
A10 XTAL O Clock output
A11 CLKIN I Clock input
A12 PH8/xSPISEL4/HOST_D8/TACLK2 I Not used
A13 PH10/xND_CE/HOST_D10 I Not used
A14 RTXI I Real time clock input
A15 RTXO O Not used
A16 VDDRTC V Power supply for real time clock
A18 USB_XO O USB clock output
A19 USB_XI I USB clock input
C
B01 PF7/PPI D7/DR0SEC/ND_D7A/TACI1 I Audio input (CH2)
B02 PF8/PPI D8/DR1PRI I Audio input (CH3)
B03 PF10/PPI D10/RFS1/xSPISEL7 I LR clock for receive (CH3, CH4)
B04 SDA I/O Not used
B05 PF12/PPI D12/DT1PRI/xSPISEL2/CDG O Audio output (CH3)
B06 PF14/PPI D14/DT1SEC/UART1TX O Audio output (CH4)
B07 PH1/ND_D1/HOST_D1 I Not used
D B12 PH9/xSPISEL5/HOST_D9/TACLK3 I Not used
B13 PH11/xND_WE/HOST_D11 I Not used
B14 PH12/xND_RE/HOST_D12 I Not used
B15 PH13/xND_BUSY/HOST_D13 I Not used
B16 PH14/ND_CLE/HOST_D14 I Not used
B17 PH15/ND_ALE/HOST_D15 I Not used
B18 RESET~ I Reset
B19 NMI~ I Non-Maskable interrupt
B20 VSS G VSS (Ground)
C01 PF5/PPI D5/TSCLK0/ND_D5A/TACLK1 I Bit clock for transmission (CH1, CH2)
C02 PF6/PPI D6/DT0SEC/ND_D6A/TACI0 O Audio output (CH2)
C19 CLKBUF O Clock buffer
E
C20 USB_ID I USB mode judgment
D01 PF3/PPI D3/DT0PRI/ND_D3A O Audio output (CH1)
D02 PF4/PPI D4/TFS0/ND_D4A/TACLK0 I LR clock for transmission (CH1, CH2)
D19 VDDUSB V 3.3 V USB reference voltage
D20 USB_RSET I USB OTG setting
E01 PF1/PPI D1/RFS0/ND_D1A I LR clock for receive (CH1, CH2)
E02 PF2/PPI D2/RSCLK0/ND_D2A I Bit clock for receive (CH1, CH2)
E19 USB_VBUS I 5 V voltage for USB
E20 USB_DP I/O USB data line (Differential +)
F01 PF0/PPI D0/DR0PRI /ND_D0A I Audio input (CH1)
F02 PPI_FS1/TMR0 O Not used
F19 VDDEXT V Power supply voltage for I/O
F20 USB_DM I/O USB data line (Differential -)
F
G01 PG15/TFS0A/HOST_CE I USB_RCV: UART receive information (MAIN)
G02 PPI_CLK/TMRCLK I Not used
G07 VDDEXT V Power supply voltage for I/O
52 DJM-850-K
1 2 3 4
5 6 7 8
A
• Pin Function
G12 VDDINT V Power supply voltage for internal core
G19 PG~ I Power supply surveillance
G20 VDDUSB V 3.3 V power supply voltage for USB
H01 PG13/DMAR0/UART1RXA/HOST_ADDR/TACI2 I UART communication receive line (MAIN) B
H02 PG14/TSCLK0A1/xHOST_RD O USB_REQ: UART communication request (MAIN)
H07 VDDEXT V Power supply voltage for I/O
H08 VDDEXT V Power supply voltage for I/O
H09 VSS G VSS (Ground)
H14 VDDINT V Power supply voltage for internal core
H19 USB_VREF I USB reference power supply voltage
H20 EXT_WAKE1 O Not used
C
J01 PG11/TMR7/xHOST_WR I Not used
J02 PG12/DMAR1/UART1TXA/HOST_ACK O UART communication transmission line (MAIN)
J07 VDDEXT V Power supply voltage for I/O
J08 VDDEXT V Power supply voltage for I/O
J09 VSS G VSS (Ground)
J14 VDDINT V Power supply voltage for internal core
J19 AMS0~ O Not used
J20 EXT_WAKE0 O Not used
D
K01 PG9/TMR5/RSCLK0A/TACI5 O UART1 communication error (MAIN)
K02 PG10/TMR6/TSCLK0A/TACI6 I Not used
K07 VDDEXT V Power supply voltage for I/O
K08 VDDEXT V Power supply voltage for I/O
K09 VSS G VSS (Ground)
K14 VDDINT V Power supply voltage for internal core
K19 AMS1~ O Not used
K20 CLKOUT O Clock output for SDRAM E
L01 PG7/TMR3/DR0PRIA/UART0TX I Not used
L02 PG8/TMR4/RFS0A/UART0RX/TACI4 I MIDI receive (UART)
L07 VDDEXT V Power supply voltage for I/O
L08 VDDMEM V Power supply voltage for I/O
L09 VSS G VSS (Ground)
L14 VDDINT V Power supply voltage for internal core
L19 VPPOTP V Power supply voltage for one time programming
L20 AMS3~ O Not used F
M01 PG5/TMR1/PPI_FS2 I Not used
M02 PG6/DT0PRIA/TMR2/PPI_FS3 I Not used
DJM-850-K 53
5 6 7 8
1 2 3 4
A
• Pin Function
M07 VDDMEM V Power supply voltage for memory
M08 VDDMEM V Power supply voltage for memory
M09 VSS G VSS (Ground)
M14 VDDINT V Power supply voltage for internal core
M19 AMS2~ O Not used
B M20 ARE~ O Not used
N01 PG3/MISO/DR0SECA O SPI output (For starting)
N02 PG4/MOSI/DT0SECA I SPI input (For starting)
N07 VDDMEM V Power supply voltage for memory
N08 VDDMEM V Power supply voltage for memory
N09 VSS G VSS (Ground)
N14 VDDINT V Power supply voltage for internal core
N19 AWE~ O Not used
C
N20 AOE~ O Not used
P01 PG1/xSPISS/xSPISEL1 I SPI slave select (For starting)
P02 PG2/SCK I SPI clock (For starting)
P07 VDDMEM V Power supply voltage for memory
P12 VDDINT V Power supply voltage for internal core
D P19 ARDY I Not used
P20 SCKE O Clock enable for SDRAM
R01 TDI I JTAG serial data input
R02 PG0/HWAIT O Boot host wait
R19 SMS~ O SDRAM bank select
R20 VDDOTP V Power supply voltage for one time programming
T01 TDO O JTAG serial data output
T02 EMU O JTAG emulation output
T19 SRAS~ O SDRAM row address strobe
T20 SWE~ O SDRAM write enable
U01 TRST~ I JTAG reset
U02 TMS I JTAG mode select
E U19 SA10 O SDRAM A10
U20 SCAS~ O SDRAM column address strobe
V01 DATA15 I/O Data bus
V02 TCK I JTAG clock
V19 ABE0~/SDQM0 O SDRAM data mask
V20 ABE1~/SDQM1 O SDRAM data mask
W01 DATA14 I/O Data bus
F
W09 BMODE3 I Boot mode judgment
54 DJM-850-K
1 2 3 4
5 6 7 8
A
• Pin Function
W10 BMODE1 I Boot mode judgment
W11 ADDR18 O Address bus
W12 ADDR16 O Not used
W13 ADDR14 O Not used
B
Y01 VSS G VSS (Ground)
Y02 DATA12 I/O Data bus
Y09 BMODE2 I Boot mode judgment
Y10 BMODE0 I Boot mode judgment
C
Y11 ADDR19 O Address bus
Y12 ADDR17 O Not used
Y20 VSS G VSS (Ground)
DJM-850-K 55
5 6 7 8
1 2 3 4
6. SERVICE MODE
6.1 TEST MODE
A
1. Description of Test Modes
The Following 10 test modes are provided for this unit:
1 Mode 1 : Confirmation of software version. "Version" 6 Mode 6 : Rotary VRs value test. "VOLTEST"
2 Mode 2 : All LEDs & FL display "OFF" mode. "ALL CLR" 7 Mode 7 : Fader test. "FDRTEST"
3 Mode 3 : ALL LEDs & FL display "ON" mode. "ALL SET" 8 Mode 8 : Channel Level Indicator LED test. "LEDTEST"
4 Mode 4 : KEY operating test. "KEY TEST" 9 Mode 10 : AD values of the rotary VRs test. "VOL AD"
5 Mode 5 : SELECT SW Operating test. "SW TEST" a Mode 11 : AD values of the fader test. "FDR AD"
2. Test Mode
Test Mode : ON Cyclic operation
Mode 1 Mode 2 Mode 3

TAP
FADER SOUND button
START (Rear panel)
COLOR Mode 11 Mode 4
1 CH-1 FX POWER ON Test Mode
(Mode 1) TAP
CUE NOISE Mode 10 Mode 5
C
Mode 8 Mode 7 Mode 6
Test Mode : CANCEL
(Rear panel)
POWER OFF POWER SW
56 DJM-850-K
1 2 3 4
5 6 7 8
A
3. Test mode Contents
1 Mode 1 : Confirmation of software version

• Mode for confirmation of the versions of the system, MAIN UCOM, SUB UCOM, DSP (program), DSP (data), USB UCOM,
FPGA and BOOT.
When this mode is entered, “Version” is displayed at the top of the FL display and the TAP key lights.
• Mode 1 consists of 8 pages for indicating the versions of the system, MAIN UCOM, SUB UCOM, DSP (program), DSP (data),
USB UCOM, FPGA and BOOT.
The pages can be changed by pressing the BEAT c, d button.
When Mode 1 is entered, the System Version Display mode is automatically entered.
B
BEAT BEAT BEAT

d button d button d button
Software name
BEAT BEAT BEAT

c button c button c button
version
BEAT BEAT
c button d button
BEAT BEAT BEAT

d button d button d button D
BEAT BEAT BEAT

Software Name FL Display

System SYS
MAIN UCOM M
SUB UCOM SUB
DSP (program) D_P
DSP (data) D_D
USB UCOM USB
FPGA F
BOOT BT
DJM-850-K 57
5 6 7 8
1 2 3 4
A
2 Mode 2 : All LEDs & FL display “OFF” mode
• Mode for extinguishing all the LEDs and FL segments.
Only after this mode is entered, “ALL CLR” is displayed for about 1 second at the top of the FL display.
Note: The CH1 CUE, CH2 CUE, CH3 CUE, CH4 CUE, MASTER CUE and BEAT EFFECTS CUE button LEDs
light dimly.
3 Mode 3 : All LEDs & FL display “ON” mode

• Mode for lighting all the LEDs and FL segments.
Only after this mode is entered, “ALL SET” is displayed for about 1 second at the top of the FL display.
B
4 Mode 4 : Key operating test

• Mode for indicating a pressed key with lighting of an LED and indication on the FL display.
When this mode is entered, “KEYTEST” is displayed at the top of the FL display and the TAP key lights.
• The name of a pressed key is indicated on the FL display.
Operating Keys Lighting LED FL Display Remark
C FADER START 1 button FADER START 1 button LED FSCH1

FADER START 2 button FADER START 2 button LED FSCH2
CH1 CUE button CH1 CUE button LED CUE_1
MASTER CUE button MASTER CUE LED CUE_M
D
BEAT EFFECTS CUE button BEAT EFFECTS CUE button LED CUE_E
SOUND COLOR FX NOISE button SOUND COLOR FX NOISE button LED CFX_1
SOUND COLOR FX GATE button SOUND COLOR FX GATE button LED CFX_2
SOUND COLOR FX CRUSH button SOUND COLOR FX CRUSH button LED CFX_3
SOUND COLOR FX FILTER button SOUND COLOR FX FILTERbutton LED CFX_4
SETUP (WAKE UP) button SETUP (WAKE UP) button LED SETUP
MIDI ON/OFF button MIDI ON/OFF button LED MD_ON
MIDI START/STOP button None MD_ST
BEAT c button None BEAT<
E
BEAT d button None BEAT>
AUTO/TAP button None AUTO
BEAT EFFECT ON/OFF button BEAT EFFECT ON/OFF button LED EFXon
CH1 BEAT button CH1 BEAT button LED CF_B1
58 DJM-850-K
1 2 3 4
5 6 7 8
5 Mode 5 : SELECT SW Operating test. "SW TEST" A
• When this mode is entered, “SW TEST” is displayed at the top of the FL display and the TAP key lights.
Operating Switches Lighting LED Remark

: CD/LINE 7 dB
CD/LINE, PHONO, LINE,
: PHONO CH1 Channel Level Indicator LED 10 dB
USB 1/2 selector switch CH1
: USB 1/2 OVER
: CD/LINE 7 dB
: USB 3/4 OVER
: CD/LINE 7 dB B
: USB 5/6 OVER
: CD/LINE 7 dB
: USB 7/8 OVER
: Assign A -24dB
CROSS FADER ASSIGN
: THRU CH1 Channel Level Indicator LED -15dB
(A, THRU, B) selector switch CH1
: Assign B -10dB
: Assign A -24dB
CROSS FADER ASSIGN
: THRU CH2 Channel Level Indicator LED -15dB C
: Assign B -10dB
: Assign A -24dB
CROSS FADER ASSIGN
: Assign B -10dB
: Assign A -24dB
CROSS FADER ASSIGN
: Assign B -10dB
: OFF -1dB
OFF, ON, TALK OVER CH1 Channel Level Indicator LED
: ON 0dB
selector switch
: TALK OVER 1dB D
MONO SPLIT, STEREO : MONO SPLIT -5dB
CH1 Channel Level Indicator LED
selector switch : STEREO -3dB
: MONO 0dB
MONO, STEREO selector switch CH2 Channel Level Indicator LED
: STEREO 1dB
EQ CURVE (ISOLATOR, EQ) : ISOLATOR -3dB
CH2 Channel Level Indicator LED
selector switch : EQ -2dB
: Left -1dB
CH FADER
: MID CH3 Channel Level Indicator LED 0dB
selector switch
: Right 1dB
: Left -1dB
CROSS FADER E
: MID CH4 Channel Level Indicator LED 0dB
selector switch
: Right 1dB
:1 -24dB
:2 -15dB
:3 -10dB
1, 2, 3, 4, MIC, CF.A, CF.B, :4 Master Level Indicator ED -7dB
MASTER selector switch : MIC L CH -5dB
: CF.A -3dB
: CF.B -2dB
: MASTER -1dB
F
DJM-850-K 59
5 6 7 8
1 2 3 4
A
Operating Switches Lighting LED Remark
: DELAY -24dB
: ECHO -15dB
: UP ECHO -10dB
: SPIRAL -7dB
: REVERB -5dB
DELAY, ECHO, UP ECHO, : TRANS -3dB
SPIRAL, REVERB, TRANS, : FILTER -2dB
Master Level Indicator LED
FILTER, FLANGER, PHASER,
: FLANGER R CH -1dB
ROBOT, SLIP ROLL, ROLL,
REV ROLL, SND/RTN : PHASER 0dB
B selector switch : ROBOT 1dB
: SLIP ROLL 2dB
: ROLL 4dB
: REV ROLL 7dB
: SND/RTN (MIDI LFO) 10dB
This mode is also used to check operation of the TIME control.

The value displayed on the FL display increases/decreases as you turn the TIME control:
Minimum value Initial value Maximum value
Operation range
Initial value: 0
C Maximum value: 100
Minimum value: -100
Turn Turn
counterclockwise. clockwise.
60 DJM-850-K
1 2 3 4
5 6 7 8
A
Correspondence diagram of Mode 5 : SELECT SW Operating test. "SW TEST"
1 3 4
C
2
2
E
DJM-850-K 61
5 6 7 8
1 2 3 4
A
6 Mode 6 : Rotary VRs value test. "VOLTEST"
• Mode for confirmation of the AD conversion value for each rotary VR on the operation panel with lighting of a level indicator
LED or the segments on the FL display
When this mode is entered, “VOLTEST” is displayed at the top of the FL display and the TAP key lights.
• To indicate the AD conversion values for several rotary VRs with a level indicator, the rotary VRs are divided into 4 groups.
The group pages can be changed by pressing the BEAT c, d button.
Group 1 Group 2 Group 3 Group 4
B BEAT BEAT BEAT

d button d button d button
Group No. BEAT BEAT BEAT

C BEAT
d button
[Use of this mode during repair]

• For failure judgment of the rotary VRs
• For operation check of a rotary VR after replacement
• Group 1
Rotary VRs whose AD conversion values can be confirmed:
• CH1 TRIM control, CH2 TRIM control, CH3 TRIM control, CH4 TRIM control, EQ HI control,
EQ LOW control, CH1 COLOR control
D
VR to be tested Lit LED or FL Remarks
"-∞": Lights off
CH1 TRIM control CH1 Channel Level Indicator LED
"+9": Full Illuminate
"-∞": Lights off
"-∞": Lights off
"-∞": Lights off
"-12": Lights off
EQ HI control Master Level Indicator L LED
E
"-12": Lights off
EQ LOW control Master Level Indicator R LED
"LOW": Lights off
CH1 COLOR control At the bottom of the FL display
"HIGH": Full Illuminate
62 DJM-850-K
1 2 3 4
5 6 7 8
• Group 2 A

• CH1 EQ/ISO HI control, CH2 EQ/ISO HI control, CH3 EQ/ISO HI control, CH4 EQ/ISO HI control,
MIXING control, LEVEL control, CH2 COLOR control

"-∞/-26": Lights off
CH1 EQ/ISO HI control CH1 Channel Level Indicator LED
"+6": Full Illuminate B
"CUE": Lights off
MIXING control Master Level Indicator L LED
"MASTER": Full Illuminate
"-∞": Lights off
LEVEL control Master Level Indicator R LED
"0": Full Illuminate
"LOW": Lights off
• Group 3
• CH1 EQ/ISO MID control, CH2 EQ/ISO MID control, CH3 EQ/ISO MID control, CH4 EQ/ISO MID control,
MASTER LEVEL control, BALANCE control, CH3 COLOR control

CH1 EQ/ISO MID control CH1 Channel Level Indicator LED
"-∞/-26": Lights off D
"-∞": Lights off
MASTER LEVEL control Master Level Indicator L LED
"L": Lights off
BALANCE control Master Level Indicator R LED
"R": Full Illuminate
"LOW": Lights off
E
DJM-850-K 63
5 6 7 8
1 2 3 4
A
• Group 4
• CH1 EQ/ISO LOW control, CH2 EQ/ISO LOW control, CH3 EQ/ISO LOW control, CH4 EQ/ISO LOW control,
BOOTH MONITOR control, LEVEL/DEPTH control, CH4 COLOR control

CH1 EQ/ISO LOW control CH1 Channel Level Indicator LED
B CH3 EQ/ISO LOW control CH3 Channel Level Indicator LED
"-∞": Lights off
BOOTH MONITOR control Master Levele Indicator L LED
"MIN": Lights off
LEVEL/DEPTH control Master Levele Indicator R LED
"MAX": Full Illuminate
"LOW": Lights off
: Group 1
: Group 2
: Group 3
: Group 4
64 DJM-850-K
1 2 3 4
5 6 7 8
7 Mode 7 : Fader test. "FDRTEST" A
• Mode for confirmation of the values of CH1–4 Channel FADER and CROSS FADER with the level indicator LEDs.
When this mode is entered, “FDRTEST” is displayed at the top of the FL display and the TAP key lights.

• For failure judgment of the faders
• For operation check of a fader after replacement
Fader to be tested Lit LED Remarks
"0": Lights off
CH1 Channel Fader CH1 Channel Level Indicator LED
B
"0": Lights off
"0": Lights off
"0": Lights off
"A": Full Illuminate
Cross Fader Master Level Indicator L LED
"B": Lights off
8 Mode 8 : Channel Level Indicator LED test. "LEDTEST"

• Mode for confirming lighting of the level indicator LEDs
When this mode is entered, “LEDTEST” is displayed at the top of the FL display and the TAP key lights.
The LEDs for CH1 CUE button, CH2 CUE button, CH3 CUE button, CH4 CUE button, MASTER CUE button, D
and EFFECT CUE button light.
• Each time the CUE button is pressed, the level indicator LEDs for each channel light one by one from the bottom.
At first, all the LEDs are unlit.
If the CUE button is pressed after it was pressed 15 times (when the top LED is lit), all the LEDs become unlit again.
Button to be tested Lit Meter Remarks
CH1 CUE button CH1 Channel Level Indicator LED

E
MASTER CUE button Master Level Indicator L LED
EFFECT CUE button Master Level Indicator R LED
DJM-850-K 65
5 6 7 8
1 2 3 4
A
9 Mode 10 : AD values of the rotary VRs test. "VOL AD"
• Mode for displaying the AD values of rotary VRs on the FL display for confirmation.
When this mode is entered, “VOL AD” is displayed at the top of the FL display.
To indicate the AD values for several rotary VRs with a single level meter, the rotary VRs are divided into 4 groups.
The group pages can be changed by pressing the BEAT c, d button.
When the groups are switched, the name of the VR at the top of the group list is displayed at the bottom of the FL display.
The rotary VRs in a group can be changed by pressing the CH1–4 CUE button.
• The maximum amplitude value among AD conversion values for a rotary VR being tested can be confirmed on each page
of this mode.
The value is expressed with the number of segments lit at the bottom of the FL display. The measurement procedure is as
B indicated below.
Turn the rotary VR you wish to test to a desired position then press the EFFECT CUE key to start measurement. To reset,
press the EFFECT CUE key again. During measurement, the maximum amplitude value will be continuously displayed.
The EFFECT CUE key is lit during measurement and goes dark when reset.
Details on the amplitude value display are shown in the figures below.
An amplitude value in the range of ±1 to ±6 with regard to the VR value at the beginning of measurement is displayed.
For a value greater than +7 or less than -7, all the 7 segments are lit.
C
BEAT BEAT BEAT
AD value
(in hexadecimal d button d button d button
Name of the notation)
rotary VR
Amplitude
value
BEAT BEAT BEAT
CH1 CH2 CH3 CH4

CUE button CUE button CUE button CUE button
Note:
E
If the CUE button is pressed while the last VR on each group list is displayed, the top VR on that group list will then
be displayed.
When the BEAT c, d button is pressed for a layer lower than the 2nd one, the top VR on the list of the next group
will be displayed.
66 DJM-850-K
1 2 3 4
5 6 7 8
A
• For failure judgment of the rotary VRs
As a guide, amplitude values higher than +4 or lower than -4 may be judged as failure.
The VRs can be set to any position during measurement. Possible symptoms are shown below.
• The volume changes arbitrarily.
• Interrupted sound leakage occurs even if the volume is decreased to the minimum at the Master or ZONE.
• The MIDI signal is output even if the corresponding VR is not operated.
• For operation check of a rotary VR after replacement
• Group 1 B
• CH1 TRIM control, CH1 EQ/ISO HI control, CH1 EQ/ISO MID control, CH1 EQ/ISO LOW control,
CH1 COLOR control, EQ HI control, EQ LOW control
VR to be tested FL Display Name Remarks

"-∞": 000
CH1 TRIM control CH1_T
"+9": 3FF
"-∞/-26": 000
CH1 EQ/ISO HI control CH1_H
"+6": 3FF
"-∞/-26": 000
CH1 EQ/ISO MID control CH1_M
"+6": 3FF
C
"-∞/-26": 000
CH1 EQ/ISO LOW control CH1_L
"+6": 3FF
"LOW": 000
CH1 COLOR control CH1_C
"HIGH": 3FF
"-12": 000
EQ HI control MIC_H
"+12": 3FF
"-12": 000
EQ LOW control MIC_L
"+12": 3FF
*As an AD value that is displayed on the FL display is the one before a hysteresis removal process,
and as it has an amplitude, an error of about ±2 may be produced.
D
• Group 2
CH2 COLOR control, MIXING control, LEVEL control

"-∞": 000
"+9": 3FF
"-∞/-26": 000
"+6": 3FF
"-∞/-26": 000 E
"+6": 3FF
"-∞/-26": 000
"+6": 3FF
"LOW": 000
"HIGH": 3FF
"CUE": 000
MIXING control HP_MX
"MASTER": 3FF
"-∞": 000
LEVEL control HP_LV
"0": 3FF
and as it has an amplitude, an error of about ±2 may be produced. F
DJM-850-K 67
5 6 7 8
1 2 3 4
A
• Group 3
CH3 COLOR control, MASTER LEVEL control, BALANCE control

"-∞": 000
"+9": 3FF
"-∞/-26": 000
"+6": 3FF
"-∞/-26": 000
B "+6": 3FF
"-∞/-26": 000
"+6": 3FF
"LOW": 000
"HIGH": 3FF
"-∞": 000
MASTER LEVEL control MSTLv
"0": 3FF
"L": 000
BALANCE control MST_B
"R": 3FF
C
• Group 4
CH4 COLOR control, BOOTH MONITOR control, LEVEL/DEPTH control

"-∞": 000
"+9": 3FF
"-∞/-26": 000
D "+6": 3FF
"-∞/-26": 000
"+6": 3FF
"-∞/-26": 000
"+6": 3FF
"LOW": 000
"HIGH": 3FF
"-∞": 000
BOOTH MONITOR control BOOTH
"0": 3FF
"MIN": 000
LEVEL/DEPTH control LV/DP
"MAX": 3FF
E *As an AD value that is displayed on the FL display is the one before a hysteresis removal process,
68 DJM-850-K
1 2 3 4
5 6 7 8
a Mode 11 : AD values of the fader test. "FDR AD" A
• Mode for displaying the AD values of the faders on the FL display for confirmation
When this mode is entered, “FDR AD” is displayed at the top of the FL display and the TAP key lights.
• Mode 11 consists of 5 pages for indicating the values of 5 faders.

The pages can be changed by pressing the BEAT c, d button.
When the groups are switched, the name of the VR at the top of the group list is displayed at the bottom of the FL display
and its AD value is displayed in the middle.
• The maximum amplitude value among AD conversion values for a fader being tested can be confirmed on each page of
this mode. The value is expressed with the number of segments lit at the bottom of the FL display. The measurement
procedure is as indicated below. B
Set the fader you wish to test to a desired position then press the EFFECT CUE key to start measurement. To reset, press
the EFFECT CUE key again. During measurement, the maximum amplitude value will be continuously displayed.
The EFFECT CUE key is lit during measurement and goes dark when reset.
Details on the amplitude value display are shown in the figures below.
An amplitude value in the range of ±1 to ±7 with regard to the VR value at the beginning of measurement is displayed.
For a value greater than +7 or less than -7, all the 7 segments are lit.
BEAT BEAT
d button d button C
AD value
(in hexadecimal
notation)
Fader name
BEAT BEAT
c button c button
Amplitude
value BEAT BEAT
c button d button
BEAT
c button D
BEAT
d button
• For failure judgment of the faders
As a guide, amplitude values higher than +4 or lower than -4 may be judged as failure.
The VRs can be set to any position during measurement. Possible symptoms are shown below.
• The volume changes arbitrarily.
• Interrupted sound leakage occurs even if the volume is decreased to the minimum at the fader. E
• The MIDI signal is output even if the corresponding VR is not operated.

• For operation check of a fader after replacement
Faders that can be confirmed
Fader to be tested FL Display Name Remarks
"0": 000
CH1 Channel Fader CH1
"10": 3FF
"0": 000
CH2 Channel Fader CH2 "10": 3FF
"0": 000
"10": 3FF
"0": 000 F
"10": 3FF
"A": 000
Cross Fader CROSS "B": 3FF
DJM-850-K 69
5 6 7 8
1 2 3 4
A 4. Mode transition flowchart

START
Mode 1:
Confirmation of software version. "Version"
BEAT
System MAIN UCOM SUB UCOM DSP (program) DSP (data) USB UCOM FPGA BOOT
Version display Version display Version display Version display Version display Version display Version display Version display
TAP
Mode 2 :
All LEDs & FL display "OFF" mode. "ALL CLR"
B
TAP
Mode 3 :
ALL LEDs & FL display "ON" mode. "ALL SET"
TAP
Mode 4 :
KEY operating test. "KEY TEST"
TAP
Mode 5 :
SELECT SW Operating test. "SW TEST"
TAP
Mode 6 :
Rotary VRs value test. "VOLTEST"
C
BEAT BEAT BEAT
TAP
Mode 7 :
Fader test. "FDRTEST"
TAP
Mode 8 :
Channel Level Indicator LED test. "LEDTEST"
TAP
Mode 10 :
AD values of the rotary VRs test. "VOL AD"
D
CH 1 TRIM CH 2 TRIM CH 3 TRIM CH 4 TRIM
CH1 CUE CH2 CUE CH3 CUE CH4 CUE
CH 1 HI CH 2 HI CH 3 HI CH 4 HI
CH 1 MID CH 2 MID CH 3 MID CH 4 MID
CH 1 LOW CH 2 LOW CH 3 LOW CH 4 LOW

BEAT BEAT BEAT
CH 1 COLOR CH 2 COLOR CH 3 COLOR CH 4 COLOR

E
EQ HI HP MIXING MASTER BOOTH
LEVEL MONITOR
CH1 CUE CH2 CUE CH4 CUE
CH3 CUE
EQ LOW HP LEVEL MASTER LEVEL/
BALANCE DEPTH
CH1 CUE CH2 CUE
CH3 CUE CH4 CUE
TAP
Mode 11 :
AD values of the fader test. "FDR AD"
BEAT BEAT BEAT BEAT

F
CH1 CH2 CH3 CH4 CROSS
FADER FADER FADER FADER FADER
TAP
70 DJM-850-K
1 2 3 4
5 6 7 8
6.2 ABOUT THE DEVICE
A
Device Name Function Part No. Reference No. Assy
MAIN UCOM Main control DYW1806 IC2803 MAIN Assy
FLASH (4M) Memory for Main, USB UCOM (Firmware) DYW1807 IC2802 MAIN Assy
FPGA For RAM, Digital input distinction, clock divider XC3S50A-4FTG256C IC2214 MAIN Assy
FLASH (4M) Memory for DSP (Firmware) DYW1808 IC3008 MAIN Assy
DSP Audio DSP D810K013BZKB400 IC3201 MAIN Assy
SDRAM (256M) Memory for DSP (Work) M12L2561616A-5TG2A IC3202 MAIN Assy
USB UCOM Controller for USB ADSP-BF525BBCZ-5A IC2603 MAIN Assy
SDRAM (64M) Memory for USB UCOM (Work) M12L64164A-5TG2M IC2604 MAIN Assy
B
SUB UCOM LED, FL, KEY, VR control DYW1809 IC6601 PNLA Assy
Two or more FLASH and SDRAM are mounted in this unit.
Please judge the device which you should diagnose in reference to this list.
DJM-850-K 71
5 6 7 8
1 2 3 4
7. DISASSEMBLY
A Note: Even if the unit shown in the photos and illustrations in this manual may differ from your product, the
procedures described here are common.
Knobs and Volumes Location
E
B
F
A
B G
C E
C H
I
E
J
D
K
D
L
A Knob/MIC B Knob/EQ C Rotary SW Knob (HM) D Knob (Black) E Knob (MA)

(DAA1301) ×2 (DAA1302) ×2 (DAA1256) ×4 (DAA1212) ×2 (DAA1210) ×3
White
White White
White White
Gray Black Silver Black Black
E
F Knob/CH G Rotary SW Knob (B) H Select Knob L Slider Knob 1 Slider Knob 2 Slider Knob Stopper
(DAA1300) ×4 (DAA1176) ×12 (DAA1205) ×1 (DAC2684) ×5 (DAC2685) ×5 (DNK5888) ×5
White White White
Gray Black Black Slider Knob 2
White Projection White
Slider Knob 1
I FX SEL Knob J Knob (TIME) K Rotary Knob (BN)
(DAA1213) ×1 (DAA1214) ×1 (DAA1220) ×1
Black
White White
F
Black Slider Knob Stopper
Black Black Gray
72 DJM-850-K
1 2 3 4
5 6 7 8
Disassembly A
[1] Control Panel Section

[1-1] Front panel
(1) Remove the six screws. (BBZ40P060FTB)
(2) Remove the front panel.
Screw tightening order
C B A
B
1 ×6
2
F E D
Front panel
[1-2] Control panel section

(1) Remove the two knob/MIC. 1 ×2
(2) Remove the two screws. (BBZ30P060FTB) 4 ×2
Knob/MIC
(3) Remove the two screws. (BBZ30P060FTC)
(4) Remove the two screws. (BPZ30P120FTB) 2 ×2
(5) Remove the six screws.
(K: DBA1290, S: DBA1436)
5 5 ×3
×3 D
3 ×2
E
B A A B
B
DJM-850-K 73
5 6 7 8
1 2 3 4
A (6) Remove the control panel section.

6
Control panel section

B
[2] INPUT Assy

(1) Disconnect the four short pin plugs. 1 ×2 1 ×2 4
(2) Remove the three washers and three nuts. 5 5 5
(3) Remove the two screws. (PMH30P100FTB) 5
(4) Remove the one screw. (BBZ30P060FTB)
(5) Remove the four screws. (BPZ30P080FTB)
3 ×2
2 ×2 2
• Rear view
D
Screw tightening order Nut tightening order
Tighten the nuts after tightening the screws indicated in the figure
on the left.
F E D C B A
A B C
(6) Remove the MIC1 Assy. 7 ×2 MIC1 Assy

(8) Remove the MTRM Assy with stay.
MTRM Assy
8 6
74 DJM-850-K
1 2 3 4
5 6 7 8
(9) Remove the five screws. (BBZ30P060FTC) A

Shield plate/INP
(10) Remove the shield plate/INP.
9 9
D 9
E
C 9
B 9 10
A
B
(11) Remove the three screws. (BBZ30P060FTC) INPUT Assy

Before tightening these screws, be sure to tighten
C
the screws and nuts for securing the INPUT Assy
to the rear panel. (Positioning of the INPUT Assy
is determined by its attachment position on the
rear panel.)
11 11 11
A B C
D
(12) Lift up the INPUT Assy to a front direction.
PNLA Assy Control panel section
Diagnosis PNLB Assy MAIN Assy

E
INPUT Assy
12 ACSW
Assy
FADC Assy
HPJK Assy
SEC/HP Assy F
REG Assy
PRIMARY Assy
TRANS Assy
DJM-850-K 75
5 6 7 8
1 2 3 4
A
Reference information
Screw tightening order (Rear panel) Screw tightening order (MAIN Assy)
B A
a b
C
A
B D
C c d
E D
Rear panel
Note:
B
The rear panel is attached to the chassis with the INLET
connector. Therefore, when detaching the rear panel, Nut tightening order (MAIN Assy)
remove the two screws for INLET connector. Tighten the nuts after tightening the screws indicated in the
figure on the upper.
Screw tightening order (Bracket PSW)
A B C D
A B
C Bracket PSW
ACSW Assy Screw tightening order (MAIN Assy)

Before tightening these screws, be sure to tighten the
screws and nuts for securing the MAIN Assy to the rear
panel. (Positioning of the MAIN Assy is determined by its
Bracket PSW
attachment position on the rear panel.)
A B
D MAIN Assy
B A F
Rear panel
C D E
E
Screw tightening order (SEC/HP, REG Assy) Screw tightening order (Stay/INP)
D c b
SEC/HP Assy MAIN Assy

A
B B
C A
F
E
a
REG Assy
Stay/INP
76 DJM-850-K
1 2 3 4
5 6 7 8
Jumper wire styling A
3 rotations.
Screw tightening order (Bracket/USB) (For improving sound quality)
C TRANS
Bracket/USB Assy
B A
CN3101
Panel/USB CN1
SEC/HP
Assy
B
Screw tightening order (Bracket/MIC)
A B
CN5001 REG C
Assy
Bracket/MIC
SEC/HP
Assy
Nut tightening order (Bracket/MIC) CN4
Bend the FFC at the place A above so that the cable

will not bulge in the direction indicated by the arrow (i).
A
B Locking wire saddle position D
(LXJ model only)

board align TRANS Assy
Bracket/MIC
Screw tightening order (Side panel L)
A C B Coil side
Cable
board align E
D E F Locking wire
Side panel L
saddle
Screw tightening order (Side panel R)
Side of the product

A C B
1: Adhere the Locking Wire Saddle so that its corner and
that of the board align.
E 2: Be sure to clamp the cables to the Locking Wire Saddle F
D F so that they are styled coming from the coil side toward
Power level select SW the side of the product, as shown in the figure above.
(Only LXJ model) Side panel R
DJM-850-K 77
5 6 7 8
1 2 3 4
A
[3] Panel Section
[3-1] Control panel and Fader panel
(1) Remove the all knobs. 1 ×31
(2) Remove the five silider knobs 2,
five slider knobs 1, five slider knob stoppers.
(See below.)
B The reference of the direction

Side on which
the line reaches the bottom
Side on which
the line reaches the bottom
Stopper
(rear direction)
Stopper
(right direction)
2 ×5
• Disassembly of the slider knob

The new slider knob adopted by this product is designed so that it is not pulled out easily.
Therefore, the method for removing the slider knob is different from the conventional method; it can only be pulled out after
slider knob 2 is removed.
D
1 Find the side on which the line reaches 2 Insert a pair of tweezers etc. beneath 3 Remove the slider knob 2.
the bottom. the line then push the slider knob 2
upward. To protect the panel from being
scratched, use protective material.
Slider knob 2
Slider knob 2
E *: During reassembly, fully push

Tweezers Protective material down Slider knob 2 until it is
dented into Slider knob 1.
4 Remove the slider knob 1. 5 Remove the slider knob stopper.
Slider knob 1
Slider knob stopper
78 DJM-850-K
1 2 3 4
5 6 7 8
(3) Remove the six screws. A

(K: DBA1290, S: DBA1436) Control panel
(4) Remove the five screws.
4 ×5
(K: DBA1290, S: DBA1436) 3 ×4
(5) Remove the Control panel and Fader panel.
Note: 3
When you remove only Fader panel, it is a
process of step (2), (4).
(for MAIN unit)
6 2
8 12 B
3
Fader panel 5
4 5 11
13 14
C
15
10 16 17 7
3 1
Note:
Screws 1 – 6 are for securing the control panel and
panel stay, screws.
Screws 7 – c are for securing the Control Panel Assy
and the cabinet of the product.
Screws d – h are for securing the Fader Panel and
the cabinet of the product.
D
[3-2] Fader section

(2) Remove the FADC Assy. 4 ×8 FAD1 Assy
(3) Disconnect the one connector. (CN8001) FAD2 Assy
(4) Remove the eight screws. (BSZ20P040FTB) FAD3 Assy
(5) Remove the FAD1 to FAD4 Assemblies. FAD4 Assy
(6) Disconnect the four connectors.
(CN7201, 7401, 7601, 7801)
(7) Release the jumper wire from clamper.
5
• Connectors color E
Match the color of a connected connector.
6 ×4
CN7201
CN7801
1 ×2
3
CN8001 7
FAD1 W Y FAD4
(White) (Yellow)
FAD2 R B FAD3 2
(Red) (Blue)
CN7401
CN7601
FADC Assy
F
DJM-850-K 79
5 6 7 8
1 2 3 4
A Screw tightening order

FADC Assy FAD1 FAD2 FAD3 FAD4
Assy Assy Assy Assy
A D E H
B A
CRF stay
B
B C F G
B A
FADC Assy
Cable styling
Style the cable (yellow) from the FAD4 Assy so that it is placed between the PNLB Assy and the FAD3 Fader section
and will not protrude from the bottom of the PNLB Assy.
(FAD3 Fader section) FAD4 Assy
D
OK NG
PNLB Assy Cable (yellow) PNLB Assy • Bottom view PNLB Assy
80 DJM-850-K
1 2 3 4
5 6 7 8
• FAD1 to FAD4 Assemblies A

(1) Remove the four screws. (BPZ20P060FTC)
(2) Remove the FAD Assy with VR stay. 1 ×4
(3) Remove th two screws. (PMH20P040FTC)
(4) Remove the FAD Assy. 3 ×2
(5) Remove the two screws and remove the

guide shaft (S) and slider base section. FAD Assy
(CPZ26P080FTC)
(6) Remove the slider section from guide shaft (S). 4
(7) Remove the two screws and remove the 7 ×2
lever plate. (BPZ20P060FTC) VR stay
Lever plate B

2
5 ×2 7
FAD Assy
C D Guide shaft (S)
Slider base
6
VR stay
A B 5
C
VR stay Shaft holder
A B FAD Assy
Note:
Lubricating oil
(GYA1001)
Greasing must be performed at a total of 8 points,
2 points each for the upper and bottom places of each
Top & Bottom Top & Bottom shaft. (0.4 to 1 mg per point × 8 points)
After applying grease, move the slider base back and
forth from one end to the other for approximately 10 to
20 strokes, in order to fully spread the grease.
Top & Bottom Top & Bottom
[3-3] PNLA and PNLB Assemblies

(1) Remove the 30 flange nuts M9.
(2) Remove the one nut. 1 ×30
DJM-850-K 81
5 6 7 8
1 2 3 4
A
(3) Remove the five SW packings. 3 SW packing 3 ×4
(4) Remove the eight slide SW caps (W). SW packing
(5) Remove the SW packing (EF).
B
4 ×8 5
Slide SW Cap (W) SW packing (EF)
(6) Reverse the control panel section. Barrier/A

(7) Remove the 13 screws. (BBZ30P060FTC)
C
(8) Remove the barrier/A and barrier/PNL. 7 ×13 Barrier/PNL
(9) Remove the seven screws. (BBZ30P060FTC)
(10) Remove the one screws (PBH30P080FTB)
(11) Remove the PNLA and PNLB Assemblies.
PNLA Assy
9 ×7
D
10
PNLB Assy
11
E
• Bottom view
82 DJM-850-K
1 2 3 4
5 6 7 8
Screw tightening order A
C
PNLA Assy
B 5 11
4
12
Barrier/PNL
D 6 2
A 1
d
c b 7
Barrier/A B
PNLB Assy 13
a
3
9
10 8
Note: Note:
When the PNLA Assy and PNLB Assy were both Tighten the screws (b to d) after performing styling
detached, secure the screws in the order of follows. of flexible cables.
A → a → B → b → c → C → D → d
Flexible cables, Barriers styling
FFC FFC
Barrier/A Barrier/PNL Barrier/A Barrier/PNL
B
D
FFC C FFC
Be sure to place the PNLB Assy, Barrier/A, Bend the two FFCs on some this side
FFC, and Barrier/PNL, in that order, from of edge (barrier/PNL).
the bottom upward.
A B C E
Be sure to insert the bending

part of the barrier beneath the
raising tab during styling.
Bending part
Raising tab
Be sure to insert the hook. Bending part slit

Be sure to insert this bending part
of the barrier into the slit of the F
Barrier/PNL.
Be sure that each FFC is separately placed up and down with
regard to the above raising tab and that they do not overlap.
DJM-850-K 83
5 6 7 8
1 2 3 4
8. EACH SETTING AND ADJUSTMENT

8.1 NECESSARY ITEMS TO BE NOTED
A It is recommended that you take note of the setting data before starting repair.
Use “8.4 SHEET FOR CONFIMATION OF THE USER SETTINGS” for taking notes.
After repairing, be sure to check the version of the firmware (see “Mode 1: For confirmation of the version” in “TEST MODE” ),
and if it is not the latest one, update to the latest version.
When the following parts are replaced, confirmation of the version of the firmware, updating to the latest version of the
firmware.
• MAIN Assy
(MAIN UCOM: IC2803, FLASH: IC2802, FLASH: IC3008)
• PNLA Assy
(SUB UCOM: IC6601)
B
8.2 UPDATING OF THE FIRMWARE

A. Confirmation of the Download Files:
1. Unzip the downloaded file.
D Windows:
Put [DJM-850_vxxx_WIN.zip] which you downloaded in any directory including the desktop, and please unzip it.
Macintosh:
Put [DJM-850_vxxx_MAC.dmg] which you downloaded in any directory including the desktop, and please unfold by
double click.
2. Confirm the contents of the file.

Windows:
[DJM-850_vxxx_WIN] folder is generated.
1. [DJM-850_vxxx.exe]
2. [DJM-850_update_manual.pdf]
E
Macintosh:
[DJM-850_vxxx_MAC] folder is generated.
1. [DJM-850_vxxx.app]
2. [DJM-850_update_manual.pdf]
Notes:
• The above xxx denotes the version of new firmware.
• The extension (.exe or .upd) may not be displayed, depending on the setting of the computer.
84 DJM-850-K
1 2 3 4
5 6 7 8
B. Preparation for Updating on the DJM-850: A
1 Connect computer with DJM-850.

Connect your computer with DJM-850 by USB cable.
2 Move to update mode.

Press [CUE (BEAT EFFECT)] button and [ON/OFF (BEAT EFFECT)] button with power button.
3 Check the current version.

Check the current version of your firmware by "current version" on FL display.
(No need to update it if current version shows as x.xx. It is the latest firmware.)
B
1 Connect your computer with DJM-850 by USB cable.
2 Press [CUE (BEAT EFFECT)] button and

[ON/OFF (BEAT EFFECT)] button with power button.
C
3 Check the current version.
DJM-850-K 85
5 6 7 8
1 2 3 4
A C. Operate a computer, and please execute update:
1. Executing Updating <STEP4> Update completion screen

Close all of applications before updating. Confirm completion of the update.
The following screen was displayed, and please click [OK].
When "SUCCESS" message is displayed on FL display of
<STEP1> Start update tool DJM-850, update is completion.
Windows:
Double click [DJM-850_vxxx.exe].
Macintosh:
B Double click [DJM-850_vxxx.app].
<STEP2> Language selection screen

Choose a language to become the use, and lick "OK" button.
(a selection screen English as for the follows)
<STEP3> Version confirmation screen

Confirm that an update version is x.xx, and click [start].
Never pull power cord, USB cable during update.
(the following screen is an example)
<STEP5> DJM-850 restart

D
Turn it on again after turning off the power of DJM-850 once.
2. Update was completed, or confirm a current version

of DJM-850.
<STEP1> Start with an update mode
Press [CUE (BEAT EFFECT)] button and
Screen during the update [ON/OFF (BEAT EFFECT)] button with power button.
Please wait until a progress bar arrives at the end.
E <STEP2> The confirmation of the version
If the version on the FL display of DJM-850 is displayed
with x.xx, the update is completed normally.
[Reference information]
The update tool is available by the following OS's.
Windows: WindowsXP/Windows Vista/Windows 7
Mac: OS X 10.5/OS X 10.6/OS X 10.7
Be approximately 3 minutes at update time.

F
86 DJM-850-K
1 2 3 4
5 6 7 8
8.3 USER SETABLE ITEMS
FL Initial Value Part Content to be A

Setting Item Display Setting Area Part No. Ref No. Assy Stored
(Factory settings) Name
Fader Start F.S. ON/OFF ON
MIDI CH MIDI CH 1 to 16 1
USER MIDI Button Type MIDI BT Toggle/Trigger Toggle

SETUP
TALK OVER MODE TLK MOD ADVANCED / NORMAL ADVANCED
TALK OVER LEVEL TLK LVL -24dB/-18dB/-12dB/-6dB -18dB
Digital Master Out Level DOUT LV -19dB/-15dB/-10dB/-5dB -19dB

DYW1807 Flash IC2802 MAIN UTILITY
Digital Out Sampling Rate DOUT FS 48kHz/96kHz 96kHz ROM setting
MASTER ATT. MST ATT -6dB/-3dB/0dB 0dB
B
CLUB Auto Standby AUTOSTB ON/OFF ON
SETUP
Mic Output To Booth Monitor MIC BTH ON/OFF ON
PC Utility PC UTLY ON/OFF ON
Factory Reset INITIAL YES/NO NO
8.4 SHEET FOR CONFIRMATION OF THE USER SETTING
When you write down a setting item, please make use of this seat.
USER SETUP CLUB SETUP

D
Fader Start Digital Master Out Level
OFF ON -19dB -15dB -10dB -5dB
MIDI CH Digital Out Sampling Rate

1 2 3 4 5 6 7 8 48kHz 96kHz
9 10 11 12 13 14 15 16
MASTER ATT.
-6dB -3dB 0dB
MIDI Button Type
TGL TRG
Auto Standby
OFF ON E
TALK OVER MODE

NOR ADV Mic Output To Booth Monitor
OFF ON
TALK OVER LEVEL
-24dB -18dB -12dB -6dB PC Utility
OFF ON
Factory Reset
NEVER perform FACTORY RESET before taking note
of setting data. F
DJM-850-K 87
5 6 7 8
1 2 3 4
9. EXPLODED VIEWS AND PARTS LIST

NOTES: - Parts marked by “NSP” are generally unavailable because they are not in our Master Spare Parts List.
A
- The > mark found on some component parts indicates the importance of the safety factor of the part.
Therefore, when replacing, be sure to use parts of identical designation.
- Screws adjacent to b mark on product are used for disassembly.
- For the applying amount of lubricants or glue, follow the instructions in this manual.
(In the case of no amount instructions, apply as you think it appropriate.)
9.1 PACKING SECTION
SYXJ8 only
C
KXJ5 only
or or or
or or
SYXJ8, UXJCB
only
F SYXJ8, UXJCB
only
88 DJM-850-K
1 2 3 4
5 6 7 8
(1) PACKING SECTION PARTS LIST

Mark No. Description Part No.
> 1 AC Power Cord See Contrast table (2)
2 USB Cable DDE1128 A
3 Driver Software CD-ROM DXX2694

4 Operating Instructions See Contrast table (2)

NSP 10 Warranty Card (WY) See Contrast table (2)
B
NSP 11 Label RCY See Contrast table (2)
NSP 12 Polyethylene Bag AHG7117
13 Packing Pad/A DHA1883
14 Packing Pad/B DHA1884
15 Packing Case See Contrast table (2)
16 Packing Sheet RHC1023

NSP 17 Leaflet/NI DRM1367
18 Label/NI See Contrast table (2)
(2) CONTRAST TABLE

DJM-850-K/SYXJ8, UXJCB, LXJ, KXJ5, XJCN5, DJM-850-S/SYXJ8, UXJCB, LXJ, KXJ5 and XJCN5 are constructed the same
except for the following:
DJM-850-K DJM-850-K DJM-850-K DJM-850-K DJM-850-K
Mark No. Symbol and Description
/SYXJ8 /UXJCB /LXJ /KXJ5 /XJCN5
> 1 AC Power Cord ADG7062 DDG1108 ADG7062 ADG7115 ADG7105
4 Operating Instructions (En, Fr, De, It) DRB1604 Not used Not used Not used Not used
5 Operating Instructions (Nl, Es, Ru) DRB1605 Not used Not used Not used Not used
6 Operating Instructions (En) Not used DRB1606 Not used Not used Not used
7 Operating Instructions (En, Es, Zhtw) Not used Not used DRB1607 Not used Not used D
8 Operating Instructions (Ko) Not used Not used Not used DRB1608 Not used
9 Operating Instructions (En, Zhcn) Not used Not used Not used Not used DRB1609
NSP 10 Warranty Card (WY) ARY7107 Not used Not used Not used Not used
NSP 11 Label RCY Not used Not used Not used DRW2487 Not used
15 Packing Case DHG3093 DHG3094 DHG3095 DHG3098 DHG3097
18 Label/NI DRW2543 DRW2543 Not used Not used Not used
DJM-850-S DJM-850-S DJM-850-S DJM-850-S DJM-850-S

> 1 AC Power Cord ADG7062 DDG1108 ADG7062 ADG7115 ADG7105
4 Operating Instructions (En, Fr, De, It) DRB1604 Not used Not used Not used Not used
E
5 Operating Instructions (Nl, Es, Ru) DRB1605 Not used Not used Not used Not used
6 Operating Instructions (En) Not used DRB1606 Not used Not used Not used
7 Operating Instructions (En, Es, Zhtw) Not used Not used DRB1607 Not used Not used
8 Operating Instructions (Ko) Not used Not used Not used DRB1608 Not used
9 Operating Instructions (En, Zhcn) Not used Not used Not used Not used DRB1609
NSP 10 Warranty Card (WY) ARY7107 Not used Not used Not used Not used
NSP 11 Label RCY Not used Not used Not used DRW2487 Not used
15 Packing Case DHG3105 DHG3106 DHG3107 DHG3110 DHG3109
18 Label/NI DRW2543 DRW2543 Not used Not used Not used
DJM-850-K 89
5 6 7 8
1 2 3 4
9.2 EXTERIOR SECION
Refer to
"9.4 CONTROL PANEL SECTION (1/2)" .
C
UXJCB
B only
B
F
C
A B
UXJCB
UXJCB, LXJ, KXJ5
only
only
C
D
D
F
E
B
A
G
F UXJCB
only
E C
E D
NON-CONTACT
CONTACT SIDE
LXJ only
F LXJ only
SIDE
UXJCB
Refer to
only
"9.3 BOTTOM SECTION" .
90 DJM-850-K
1 2 3 4
5 6 7 8
(1) EXTERIOR SECION PARTS LIST

1 USBI Assy DWX3361 26 Terminal Screw AKE-031

2 INPUT Assy DWX3362 27 Front Panel DNK6063 A
3 HPJK Assy DWX3363 28 Knob/MIC DAA1301
4 MIC1 Assy DWX3371 NSP 29 Label See Contrast table (2)
5 MTRM Assy DWX3372 NSP 30 Label See Contrast table (2)
6 Short Pin Plug AKM7008 NSP 31 Caution Label See Contrast table (2)
7 Shielded Conn-Cable DDA1043 NSP 32 V Select Label See Contrast table (2)
8 FFC/25P DDD1597 33 • • • • •
9 FFC/22P DDD1598 34 Flange Nut M9 DBN1008
10 Connector Assy (J2) PF04PP-S05 35 Nut M12 DBN1018
36 Nut (M12) NKX2FNI B

11 Cable (J3) PF04PP-S17
12 Stay/HP DNF1907 37 Washer DEC2920
13 Shield Plate/INP DNF1908 38 Screw (FE) See Contrast table (2)
14 Bracket/USB DNF1909 39 Screw (M3*5) DBA1340
15 Bracket/MIC DNF1910 40 Screw BBZ30P060FTB
16 Stay/INP DNF1911 41 Screw BBZ30P060FTC

17 Cover/PCB DNK6136 42 Screw BBZ40P060FTB
18 Nylon Rivet AEC1671 43 Screw BPZ30P080FTB
19 Locking Mini Clamp DEC2439 44 Screw BPZ30P120FTB
20 Holder VEC1355 45 Screw PMH30P100FTB
C
21 USB Cover B DNK5868

22 Side Panel L DNK6061
23 Side Panel R See Contrast table (2)
24 Panel/USB DNK6120
25 Knob/POW See Contrast table (2)
(2) CONTRAST TABLE D

23 Side Panel R DNK6062 DNK6062 Not used DNK6062 DNK6062
23 Side Panel R/G Not used Not used DNK6065 Not used Not used
25 Knob/POW Not used Not used DNK6066 Not used Not used
NSP 29 Label DAL1207 DAL1208 DAL1209 DAL1212 DAL1211
NSP 30 Label Not used DRW1975 Not used Not used Not used
NSP 31 Caution Label Not used DRW2429 DRW2430 DRW2542 Not used E
NSP 32 V Select Label Not used Not used DRW2400 Not used Not used
38 Screw (FE) DBA1290 DBA1290 DBA1290 DBA1290 DBA1290

23 Side Panel R DNK6062 DNK6062 Not used DNK6062 DNK6062
23 Side Panel R/G Not used Not used DNK6065 Not used Not used
25 Knob/POW Not used Not used DNK6066 Not used Not used
NSP 29 Label DAL1213 DAL1214 DAL1215 DAL1218 DAL1217
NSP 30 Label Not used DRW1975 Not used Not used Not used
NSP 31 Caution Label Not used DRW2429 DRW2430 DRW2542 Not used
NSP 32 V Select Label Not used Not used DRW2400 Not used Not used F
DJM-850-K 91
5 6 7 8
1 2 3 4
9.3 BOTTOM SECTION
PNLA
CN6602
PNLA INPUT
CN6601 CN4802
USBI
D
HPJK
CN9201 CN3801
B
INPUT
CN4803
E INPUT
CN4801 C
Silicon grease
(GEM1057)
Bottom side
C O
A
D
LXJ only
P
UXJCB
only
R
C
B
Q
LXJ only
LXJ only
92 DJM-850-K
1 2 3 4
5 6 7 8
(1) BOTTOM SECTION PARTS LIST

1 MAIN Assy DWX3360 21 Sheet/BOT DEC3404

2 REG Assy DWR1510 NSP 22 Insulating Sheet DMR1010 A
3 SEC/HP Assy DWR1511 23 PCB Holder PNW2029
4 ACSW Assy DWR1515 24 Holder VEC1355
5 TRANS Assy See Contrast table (2) NSP 25 PC Support VEC1749
6 PRIMARY Assy See Contrast table (2) 26 Power Knob DAC2306

> 7 Fuse (FU1: T630 mA) AEK1052 27 Power Knob Guard DNK4534
> 8 AC Inlet See Contrast table (2) 28 Locking Wire Saddle See Contrast table (2)
> 9 Transformer/L (T3101) See Contrast table (2) 29 Binder See Contrast table (2)
10 Jumper Wire (J1) D20PYY1010E 30 Nut (M12) NKX2FNI
31 Washer DEC2920 B
11 Connector Assy (J4) PF13EE-S17
NSP 12 Chassis DNA1437 32 Screw See Contrast table (2)
13 Rear Panel See Contrast table (2) 33 Screw BBZ30P060FTB
14 Bracket PSW DNF1759 34 Screw BBZ30P060FTC
15 Shield Plate/PW DNF1906 35 Screw BPZ30P080FTB
NSP 16 Plate DNK6124 36 Screw IBZ30P080FTB

17 Foot (Rubber) REC-434 37 Screw IMZ30P040FTC
NSP 18 PCB Stay (FE) VNE2489 38 Screw PMB40P060FTB
NSP 19 Spacer AEB7092 39 Screw PPZ30P080FTB
20 Spacer DEB1998 C
(2) CONTRAST TABLE

5 TRANS Assy DWR1516 DWR1517 DWR1512 DWR1516 DWR1516
6 PRIMARY Assy DWR1519 DWR1520 DWR1509 DWR1519 DWR1519 D
> 8 AC Inlet/2P DKP3916 Not used DKP3916 DKP3916 DKP3916
> 8 AC Inlet/3P Not used DKP3915 Not used Not used Not used
> 9 Transformer/L (T3101) DTT1256 DTT1257 DTT1256 DTT1256 DTT1256
13 Rear Panel DNC2069 DNC2070 DNC2081 DNC2082 DNC2073
28 Locking Wire Saddle Not used Not used DEC3439 Not used Not used
29 Binder Not used Not used ZCA-SKB90BK Not used Not used
32 Screw Not used PMH40P080FTC Not used Not used Not used

5 TRANS Assy DWR1516 DWR1517 DWR1512 DWR1516 DWR1516 E
6 PRIMARY Assy DWR1519 DWR1520 DWR1509 DWR1519 DWR1519
> 8 AC Inlet/2P DKP3916 Not used DKP3916 DKP3916 DKP3916
> 8 AC Inlet/3P Not used DKP3915 Not used Not used Not used
> 9 Transformer/L (T3101) DTT1256 DTT1257 DTT1256 DTT1256 DTT1256
13 Rear Panel DNC2069 DNC2070 DNC2081 DNC2082 DNC2073
28 Locking Wire Saddle Not used Not used DEC3439 Not used Not used
29 Binder Not used Not used ZCA-SKB90BK Not used Not used
32 Screw Not used PMH40P080FTC Not used Not used Not used
DJM-850-K 93
5 6 7 8
1 2 3 4
9.4 CONTROL PANEL SECTION (1/2)
or
K or M
or
L or N
D
W R
B Y

Lubricating oil
(GYA1001)
E Note:
Greasing must be performed at a total of 8 points, 2 points each for the
upper and bottom places of each shaft. (0.4 to 1 mg per point × 8 points)
After applying grease, move the slider base back and forth from one end
to the other for approximately 10 to 20 strokes, in order to fully spread
the grease.
W
R Y
B
J
F Nut:
Attached part of Rotary encoder
Refer to
"9.5 CONTROL PANEL SECTION (2/2)" .
94 DJM-850-K
1 2 3 4
5 6 7 8
(1) CONTROL PANEL SECTION (1/2) PARTS LIST

1 FAD1 Assy DWX3366 26 Knob (TIME) DAA1214

2 FAD2 Assy DWX3367 27 Rotary Knob (BN) DAA1220 A
3 FAD3 Assy DWX3368 28 Rotary SW Knob (HM) DAA1256
4 FAD4 Assy DWX3369 29 Knob/CH DAA1300
5 FADC Assy DWX3370 30 Knob/EQ DAA1302
6 Connector Assy PF03PP-B07 31 Slide SW Cap (W) DAC2401

7 Connector Assy PF03PP-B12 32 Slider Knob 1 DAC2684
8 Connector Assy PF03PP2B07 33 Slider Knob 2 DAC2685
9 Connector Assy PF03PP4B12 34 Fader Panel See Contrast table (2)
10 Connector Assy PF03PP6B07 35 Control Panel See Contrast table (2)
36 Panel/FL DAH2877 B
11 CRF Stay DNF1870
12 SW Cushion HH48/2 DEC2538 37 Lens DNK4532
13 Fader Packing DEC2903 38 Slider Knob Stopper DNK5888
14 SW Packing (EF) DEC2929 39 • • • • •
15 SW Packing DED1177 40 • • • • •
NSP 16 Guide Shaft (S) DLA1918 41 Flange Nut M9 DBN1008

17 Lever Plate DNH2954 42 Screw (FE) See Contrast table (2)
18 VR Stay DNH2955 43 Screw BBZ30P060FTC
19 Slider Base DNK5851 44 Screw BPZ20P060FTC
20 Shaft Holder DNK5852 45 Screw BSZ20P040FTB
C
21 Rotary SW Knob (B) DAA1176 46 Screw CPZ26P080FTC

22 Select Knob DAA1205 47 Screw IMZ30P040FTC
23 Knob (MA) DAA1210 48 Screw PMH20P040FTC
24 Knob (Black) DAA1212
25 FX SEL Knob DAA1213
(2) CONTRAST TABLE D

34 Fader Panel DNB1196 DNB1196 DNB1196 DNB1196 DNB1196
35 Control Panel DNB1197 DNB1197 DNB1197 DNB1197 DNB1197

34 Fader Panel DNB1201 DNB1201 DNB1201 DNB1201 DNB1201
E
35 Control Panel DNB1202 DNB1202 DNB1202 DNB1202 DNB1202
DJM-850-K 95
5 6 7 8
1 2 3 4
9.5 CONTROL PANEL SECTION (2/2)
A • Bottom view
Note:
B Refer to “7. DISASSEMBLY” for styling of flexible cables, barriers.
MAIN
CN1002
MAIN
CN1001
Note: Fix the packing/L to the lower right of Barrier FL.
I
D
A
Caution: Only this screw is different in a type.
E
NON-CONTACT
CONTACT SIDE
F
SIDE
96 DJM-850-K
1 2 3 4
5 6 7 8
CONTROL PANEL SECTION (2/2) PARTS LIST

Mark No. Description Part No.
1 PNLB Assy DWX3365
2 PNLA Assy DWX3359 A
3 FFC/24P DDD1599
4 FFC/17P DDD1600
5 FFC/27P DDD1601
6 Panel Stay DND1272

7 Barrier FL DEC3351
8 Barrier/PNL DMR1007
9 Barrier/A DMR1009
10 Wire Saddle XEC3100
B
11 Effect Knob DAC2304
12 Slide SW Cap DAC2400
13 Button (MIDI) DAC2655
14 Button/CFX DAC2837
15 Button/CUE DAC2838
16 Button/TAP DAC2839
17 Button/FS DAC2840
18 Button/BFX DAC2841
19 Lens Holder DNK4533
20 Lebel Meter Assy DXB1882 C
21 Packing/L DEC3416
22 • • • • •
23 Screw BBZ30P060FTC
24 Screw PBH30P080FTB
DJM-850-K 97
5 6 7 8
1 2 3 4
10. SCHEMATIC DIAGRAM

10.1 INPUT ASSY (1/5)
A (CL1) R4003 (CL1) CD1_L
100
1000p/50
100p/50
RN
C4001
C4009
R4017
CH
CH
RN
47k
CH1 2-2 V+15A V+15A
V+15A
C4037
JA4001
1000p/50
R4018
DKB1083-A
100p/50
1
C4002
C4010
47u/35
R4025
R4029
CH
CH
RN
47k
RN
RN
1.5k
1.5k
L C4029 C4038 GND_PO
CD/LINE 2 R4004 0.1u/25 PHONO1_L
IC4002
NJM2121MD 0.1u/25
R 3
R4031
100 GND_P1 (P1) GND_CH1
47
RN V+ 2 8
330p/50
6 (P1)
C4021
4 8
7
C4031 R4039
CH
3
0.022u/50
L (C1)
C4019
10u/35 0 5
GND_CH1 4 I C 4 0 0 1 (2/2) NP (CL1)
PHONO 5 5
V- NJM4580D
7
R 6 Q4001 V-15A
6 1
2SK209(BL)-TLB Q4003
R4041
2SK209(BL)-TLB 4
100k
RN
(P1) (P1)
2-3 R4009 R4037
8.2k C4039
100
1000p/50
RN
100p/50
C4007
C4011
R4019
RN
CH
CH
RN
47k
C4026 0.1u/25
B C4017 C4043 GND_CH1
C4022 R4033
0.01u/50
CFTLA GND_CH1
150
D
470p/50 47u/35
R4026
CH
2.4k
RN
1000p/50
R4047 GND_PO
100p/50
C4008
C4012
R4020
V-15A
220u/10
CH
RN
47k
CH
1.2k
R4043
RN
RN
1.5k
R4010
V-15A V+15A
V+15A
100
R4034
RN
0
GND_P1 GND_CH1
C4033
R4030
R4027
RN
RN
1.5k
1.5k
IC4003
GND_P1 PHONO1_R NJM2121MD 0.1u/25
V+15A
2 8 GND_CH1
47
R4032
V+ I C 4 0 0 1 (1/2)
3
330p/50
2 NJM4580D
C4023
8 C4032 R4040
1 5
CH
0.022u/50
C4020
4C 4 0 3 0 10u/35 0 7
3 NP
V- CD1_R 6 1
0.1u/25
4
GND_P1
R4042
100k
V-15A
RN
Q4004
Q4002
2SK209(BL)-TLB R4038
C 2SK209(BL)-TLB 8.2k C4034
RN 0.1u/25
C4028
V-15A GND_CH1
0.01u/50 R4048
GND_CH1
C4024 R4035
150
CFTLA
D
C4018 1.2k
R4045
1.5k
RN
RN
470p/50
220u/10
R4028
2.4k
CH
RN
R4055
R4036
V-15A 0
0
GND_CH1
(CL2) R4005
GND_P1 (CL2) CD2_L
100
1000p/50
100p/50
RN
C4003
C4013
R4021
CH
RN
47k
CH2
V+15A
JA4002
1000p/50
R4022
DKB1083-A C4040
100p/50
C4004
C4014
D 1
CH
RN
47k
L 47u/35
CD/LINE 2 R4006 LINE2_L IC4004

NJM2121MD
C4041 GND_PO
R 3 100 (L2) 0.1u/25
RN 2 8
4
3
GND_CH2
L GND_CH2 (C2)
5
(CL2)
LINE 5
7
R 6
6 1
(L2) 4
R4007
100 C4042
1000p/50
RN
C4005
C4015
R4023
100p/50
CH
CH
RN
47k
0.1u/25
C4044 GND_CH2
47u/35
1000p/50
GND_PO
100p/50
C4006
C4016
R4024
V-15A
CH
CH
RN
47k
R4049
R4008 1.2k
R4044
RN
RN
V+15A
1.5k
100
E RN
GND_CH2
GND_CH2 C4035
LINE2_R IC4005
STBY 0.1u/25
NJM2121MD
R4001
2 8 GND_CH2
NM
SQ 3
5
R4002
7
NM
SQ CD2_R 6 1
GND_CH1 GND_CH2 4
Notes
NM is STBY
C4036
RS1/10SR***J
SQ RS1/8SQ***J 0.1u/25
RN RN1/16SE****D GND_CH2
V-15A
R4050
CH CCSRCH***J F
CCSQCH***J F 1.2k
R4046
CCSQ RN
RN
1.5k
CKSRYB***K F
F
CFTLA CFTLA F
NP CEANP F GND_CH2
CEAT F
A 1/5
98 DJM-850-K
1 2 3 4
5 6 7 8
CH1 CH2 INPUT A 1/5 INPUT ASSY (DWX3362)

4037
7u/35
SHIELD CASE(MIDI) DNH2736-
4038 GND_PO
u/25
GND_CH1
5
(C1) C4048 (C1)
5:6C
CH1_L
47u/35
4039
u/25
4043 GND_CH1 B
7u/35
GND_PO
033
/25
GND_CH1
5 C4049
5:6D
CH1_R
47u/35
034 C
V+15A
/25
R4051
GND_CH1
47k
R4052
47k
2-1
A 5/5 A 5/5
CH1_ASEL_OUT
Q4005
LTC114EUB 5:6D To BOARD IF Block
C4045
0.1u/16
GND_CH1
4040
D
7u/35
4041 GND_PO
u/25
GND_CH2
(C2) C4047 (C2)
5 5:6D
CH2_L
47u/35
4042
u/25
4044 GND_CH2
7u/35
GND_PO
E
035
/25
GND_CH2
5 C4050 5:6D
CH2_R
47u/35
V+15A
R4053
47k
036
R4054
(P1)
: Voltage measuring point
47k
/25
: CH1 PHONO Signal (L CH)
GND_CH2 (CL1)
A 5/5 : CH1 CD/LINE Signal (L CH) : Waveform measuring point
(C1)
CH2_ASEL_OUT
Q4006
LTC114EUB 5:6D
: CH1 Audio Signal (L CH)
(L2) F
C4046
0.1u/16
: CH2 LINE Signal (L CH)

(CL2)
(C2)
: CH2 CD/LINE Signal (L CH)
GND_CH2
A 1/5
DJM-850-K 99
5 6 7 8
1 2 3 4

(CL3) R4205 (CL3) CD3_L
100
1000p/50
100p/50
RN
C4201
C4209
R4221
A
CH
CH
RN
47k
CH3 V+15A
C4237
JA4201
DKB1083-A
1000p/50
R4222
1 47u/35
100p/50
C4202
C4210
CH
CH
RN
47k
L C4238 GND_PO
CD/LINE 2 R4206
LINE3_L
IC4202
NJM2121MD 0.1u/25
R 3 100 (L3) GND_CH3
RN 2 8
4
3
L (C3
GND_CH3 5
(CL3)
LINE 5
7
R 6
6 1
4
(L3) R4207 (L3)
C4239
1000p/50
100
C4203
C4211
R4223
100p/50
RN
CH
CH
RN
47k
0.1u/25
C4243 GND_CH3
B 47u/35
1000p/50
R4249 GND_PO
C4204
C4212
R4224
100p/50
V-15A
CH
CH
RN
47k
1.2k
R4245
RN
RN
1.5k
R4208
V+15A
100
RN
GND_CH3 GND_CH3
C4233
IC4203
LINE3_R 0.1u/25
NJM2121MD
2 8 GND_CH3
3
5
7
CD3_R 6 1
CH3 CH4 INPUT 4
C4234
C
0.1u/25
V-15A GND_CH3
R4250
1.2k
R4247
RN
1.5k
RN
GND_CH3
(CL4) R4209 (CL4) CD4_L
100
1000p/50
100p/50
RN
C4205
C4213
R4225
CH
RN
47k
CH4 V+15A V+15A

V+15A
JA4202
1000p/50
DKB1083-A C4240
R4226
1
R4231
100p/50
C4206
C4214
R4227
1.5k
1.5k
CH
RN
RN
RN
47k
L C4229 47u/35
CD/LINE 2 R4210 0.1u/25 PHONO4_L IC4204

NJM2121MD
C4241 GND_PO
R4233
R 100 GND_P4 (P4)

47
3 0.1u/25
D RN V+ 2 8
6
330p/50
(P4)
C4221
4 8
7
C4231 R4241 GND_CH4
CH
3
0.022u/50
L GND_CH4
C4219
10u/35 0 5
4 I C 4 2 0 1 (2/2)
PHONO 5
5
V- NJM4580D
NP (CL4)
7
R
R4243
6 V-15A
100k
RN
Q4201 6 1
Q4203
(P4) 2SK209(BL)-TLB 2SK209(BL)-TLB 4
R4211 R4239
100 8.2k C4242

1000p/50
RN RN
100p/50
C4207
C4215
R4219
CH
RN
47k
C4226
CH
0.1u/25
C4217 0.01u/50 GND_CH4 C4244 GND_CH4
C4222 R4235
150
CFTLA
D
470p/50
R4228
47u/35
CH
2.4k
RN
1000p/50
GND_PO
100p/50
C4208
C4216
R4220
220u/10
V-15A
CH
CH
RN
47k
R4251
R4212 1.2k
V-15A
R4246
RN
RN
V+15A
1.5k
100 V+15A
R4236
RN
0
GND_P4
STBY GND_CH4 C4235
R4229
R4232
E
RN
RN
1.5k
1.5k
R4201 R4203 PHONO4_R IC4205

GND_P4 NJM2121MD 0.1u/25
NM NM
SQ SQ V+15A 8 GND_CH4
2
R4234
47
V+ I C 4 2 0 1 (1/2) 3
R4202 R4204
2 NJM4580D
330p/50
C4223
8 C4232 R4242
1 5
CH
0.022u/50
NM NM
C4220
SQ SQ 4 C4230 10u/35 0 7
3 NP
GND_CH2 GND_CH3 GND_CH4 V- CD4_R 6 1
0.1u/25
R4244
4
100k
RN
GND_P4
Q4204 V-15A
Q4202
2SK209(BL)-TLB
Notes 2SK209(BL)-TLB
R4240 C4236
NM is STBY 8.2k
0.1u/25
RN
RS1/10SR***J C4228
V-15A GND_CH4
C4218 0.01u/50 R4252
SQ RS1/8SQ***J GND_CH4
C4224 R4237
CFTLA
150
D
RN RN1/16SE****D 470p/50 1.2k

R4230
R4248
RN
2.4k
RN
RN
1.5k
CH
CCSRCH***J F
220u/10
CH
CCSQ CCSQCH***J F
F CKSRYB***K F V-15A
R4257
R4238
CFTLA CFTLA F
0
0
NP CEANP F
GND_CH4
A 2/5 CEAT F
GND_P4
100 DJM-850-K
1 2 3 4
5 6 7 8
V+15A
A 2/5 INPUT ASSY (DWX3362) A
C4237
47u/35
C4238 GND_PO
MD 0.1u/25
GND_CH3
8
5
(C3) C4247 (C3)
5:8C
CH3_L
47u/35
1
4
C4239
0.1u/25
C4243 GND_CH3
47u/35 B
V-15A GND_PO
V+15A
C4233
D 0.1u/25
8 GND_CH3
5 C4249
5:8C
CH3_R
47u/35
1 V+15A
4
R4253
47k
C4234
C
0.1u/25
R4254
47k
V-15A GND_CH3
A 5/5
Q4205 CH3_ASEL_OUT
LTC114EUB 5:8C
C4245
0.1u/16
A 5/5
To BOARD IF Block
GND_CH3
V+15A
C4240
47u/35
C4241 GND_PO
MD
0.1u/25
8 D
GND_CH4
(C4) C4248 (C4)
5 5:8C
CH4_L
47u/35
1
4
C4242
0.1u/25
C4244 GND_CH4
47u/35
GND_PO
V-15A
V+15A
C4235
E
D 0.1u/25
8 GND_CH4
5 C4250 5:8D
CH4_R
47u/35
V+15A
1
4
R4255
47k
C4236
R4256
0.1u/25
47k
(L3)
V-15A GND_CH4 : CH3 LINE Signal (L CH)
A 5/5 (CL3)
Q4206 CH4_ASEL_OUT (C3)
LTC114EUB 5:8C
(P4)
C4246
0.1u/16
: CH4 PHONO Signal (L CH) F

(CL4)
(C4)
GND_CH4
A 2/5
DJM-850-K 101
5 6 7 8
1 2 3 4
INPUT Buffer
B V+15A
C4405
47u/25
C4406 GND_PO
0.01u/50
GND_RET
V+
2 (RET A) (RET A)
8
JA4401 5 (RET A) (RET A) 1
R4403 R4405 R4407
4
2 I C 4 4 0 1 (1/2)
4
100 33k 0 3
L(MONO) 3
7 D
V-
NJM4565MD
1000p/50
8 C4407
R4409
100p/50
C4401
C4403
16k
1
CH
CH
D
XKB3066-A 0.01u/50
C4408 GND_RET
47u/25
C
RETURN GND_RET
V-15A GND_PO
1000p/50
R4410
100p/50
C4402
C4404
V+15A
16k
CH
CH
D
V+
6
JA4402 8
7
DKN1614-A R4404 R4406 R4408
2 I C 4 4 0 1 (2/2)
R 3
1 100 33k
D
0 5
V-
4
NJM4565MD
V-15A
C4409
0.01u/50
CFTLA Pull up Main side
R4401
VA4401
NM
NM
SQ
D R4402
STBY
NM GND_RET
SQ
STBY GND_RET
GND_CH4
A 3/5
102 DJM-850-K
1 2 3 4
5 6 7 8
RETURN_L
T A) (RET A) (RET A)
5:8D
RETURN_L
A 5/5 C
RETURN_R To BOARD IF Block
5:8D
RETURN_R
5:8D
RETURN_IN
NOTES NM is STBY
RS1/10SR***J
RS1/16SS***J
D RS1/10SR****D
RN RN1/16SE****D
CKSRYB
CKSSYB
CKSYB
E
HXS CFHXSQ
CH CCSRCH
CCSSCH
LA CFTLA
+
JQ CEJQ
NP CEANP
CEAT
HAT CEHAT
ZL CEHAZL
(RET A)
: RETURN Audio Signal (L CH)
A 3/5
DJM-850-K 103
5 6 7 8
1 2 3 4
A
MIC/MIDI MIC1 AMP
V+15A
C4614
0.1u/25
0.01u/50
330p/50
R4619
R4621
RN 1 5 0
R4623
C4611
C4612
RN
RN
1.5k
1.5k
MIC1_TRIM_IN
VCC
IC4601 GND_MIC1
6 (MIC1 A)
8 (1/2) R4641 C4617 R4642
7
(MIC1 A) (MIC1 A)
NJM4580MD 0 10u/35 0
4
5 NP
Q4602 Q4603 C4615
R4627
GND
100k
2SK209(BL) 2SK209(BL)
MIC_COLD_1
1 1 0.1u/25
CKS3561-A (MIC1 A)
CN4601 R4638 R4609
2 3 3 2
V-15A
B
CN9001
220 220
(MIC1 A) RN RN GND_MIC1
MIC1_COLD 6 GND_MIC1
R4612
100p/50
C4607
C4625
RN
10k
CH
C4613
MIC1_COLD 5 470p/50
GNDA CH 470p/50
4 CH
GNDA 3 R4615 R4620 R4625
MIC1_HOT 2
B
470p/50
12k 820 12k
C4605
MIC1_HOT RN RN RN
1 GND_MIC1
R4618
R4622
RN
RN
4.7k
4.7k
100p/50
C4626
R4613
CH
RN
10k
2-3
(MIC1 A) (MIC1 A) (MIC1 A)
R4639 R4610
220 220
RN RN
MIC_HOT_1
V-15A
C4610
220p
CH
R4617
C
20k
RN
MIC2 C4628
V+15A MIC2_TRIM_IN
2-3 10u/35
VCC IC4603
JA4601 6 (2/2) (MIC2 A) (MIC2 A)
STBY 8 C4616
DKN1614-A (MIC2 A) (MIC2 A) 7
R4637 R4607 C4604
2
3 4 10u/35
0 220 NM 5 NP
1 RN NJM4580MD
GND
C4606
330p
CH
STBY
R4626
V-15A
100k
(MIC1 A)
CH
D4603
2200p/50
C4601
C4603
R4611
R4614
NM
CH
100k
100k
R4616
680
NM
STBY
C4624 STBY
MIC2 AMP GND_MIC2
NM
CFTLA
C4627
(MIC2 A
1u/25
D EZJZ1V270RM
GND_MIC2
VA4601
GND_CH1 GND_MIC2
V+5D_IN V+5D_MIDI
0
R4636
MIDI OUT JA4602 V+5D_MIDI

DKN1188-A
7 6
GNDD V+5D_MIDI
R4608
3 1
0
R4603 R4605 C4602

5 4
0 220 0.01u/50
2
GNDD STBY
IC4602
R4624
C4609
NM
MIDI_TxD
0.1u/16
5 1
VCC NC
E GNDD
INA 2
4 3
R4604 R4606 OUTY GND
EZJZ1V270RM
EZJZ1V270RM
0 220 2 GNDD
HZU6R2(B3)
HZU6R2(B3)
MIDI_OUT
TC7SET04FUS1
VA4602
VA4603
D4604
D4605
Q4601 3
LTC124EUB GNDD
1
GNDD
GNDD
DNH2736-A / SHIELD CASE(MIDI)
GNDD GNDD
A 4/5
104 DJM-850-K
1 2 3 4
5 6 7 8
V+15A
STBY
MIC1 ADC Driver
C4620
NM
GND_PO
R4632
390
RN
MIC1_TRIM_IN
VCC
I C 4 6 0 1 (1/2)
NJM4580MD MIC1 ADC IN
A 5/5
2 (MIC1 A)
8
1 R4633 (MIC1 A) 5:6C
(MIC1 A) (MIC1 A)
R4642 C4618 MIC1_ADC_IN
4 220
0 10u/35 3 RN
R4630
NP GND
RN
390
R4627
100k
R4628
100k
B
GND_MIC1 GND_MIC1 STBY
GND_MIC1
C4621
NM
GND_PO
V-15A
V+15A
C4622
0.1u/25
R4634
GND_MIC2 MIC2 ADC Driver
390
RN
VCC
I C 4 6 0 3 (2/2)
NJM4580MD MIC2 ADC IN
A 5/5
2 (MIC2A)
8
1 R4635 (MIC2A) 5:6C
(MIC2 A)
C4619 MIC2_ADC_IN
220
4 RN
10u/35 3
R4631
NP GND
C
390
RN
C4623
R4629
100k
0.1u/25
V-15A
RIM_IN GND_MIC2
GND_MIC2
GND_MIC2
CN4602
CKS3561-A
(MIC1 A) (MIC1 A)
CN8801
6 MIC1_TRIM_IN
5 MIC1_TRIM_OUT
(MIC1 A)
(MIC1 A) 4 GND_MIC2
3 GND_MIC1
(MIC2 A) (MIC2 A)
2 MIC2_TRIM_OUT
C
1 MIC2_TRIM_IN
(MIC2 A) (MIC2 A)
D
GND_MIC1 GND_MIC2
NOTES NM is STBY
RS1/10SR***J
RS1/16SS***J
D RS1/10SR****D
RN RN1/16SE****D
A 5/5 CKSRYB
MIDI_TXD
CKSSYB E
5:6C CKSYB
HXS CFHXSQ
CH CCSRCH
CCSSCH
LA CFTLA
+
JQ CEJQ
NP CEANP
CEAT
(MIC1 A) HAT CEHAT

: MIC1 Audio Signal ZL CEHAZL
(MIC2 A)
: MIC2 Audio Signal

: Waveform measuring point F
A 4/5
DJM-850-K 105
5 6 7 8
1 2 3 4
BOARD I/F
STBY
P4801
V+15A
B NM
CN4801
0.01u/50
100u/25
KM200NA4L
C4801
C4803
C4805
15
1u/25
V+15A 1
E 1/2 GND_PO 2
STBY
100u/25
3
GND_PO 0.01u/50
C4802
C4804
C4806
R4801
1u/25
CN2 V-15A 4
16
NM
P4802
V-15A GND_PO GND_CH1
NM
CN1003
STBY
C
GND_PO
D 1/19
STBY
R4804 R4825 R4826
NM NM NM
GND_PO GND_MIC1 GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4806 R4805 R4807
NM NM NM
GND_PO GND_CH2 GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4808 R4810 R4814
NM NM NM
GND_PO GND_CH4 GND_CH1 GND_CH1 GND_CH3 GND_CH3
D R4809 R4811 R4815
NM NM NM
GND_PO GND_RET GND_CH1 GND_CH1 GND_CH3 GND_CH3
R4812 R4816
NM NM
GND_CH2 R4813
GND_CH2 GND_CH4 R4817
GND_CH4
NM NM
GND_CH2 R4823
GND_CH4
NM NM
GND_CH2 R4824
GND_CH4
NM NM
GND_CH2 R4819
GND_CH4
NM NM
E GND_RET GND_RET GND_CH4 GND_CH4
R4820 R4828
NM NM
GND_RET R4821
GND_RET GND_MIC1 R4829
GND_MIC2
NM NM
GND_RET GND_RET GND_MIC1 GND_MIC2
A 5/5
106 DJM-850-K
1 2 3 4
5 6 7 8
V+5D_IN
17
0.01u/50
100u/10
C4807
C4808
C4809
0.1u/16
B
CN4802
VKN1285-A CN4803
VKN1282-A
V+5D 1 GNDIN_CH3 1
4:11G 2:11B
MIDI_TXD 2 MIDI_TXD CH3_L 2 CH3_L
(C3)
GNDD 3 GNDIN_CH3 3
2:7E
GNDIN_MIC2 4 CH3_SEL 4 CH3_ASEL_OUT
GNDIN_MIC2 5 GNDIN_CH3 5
(MIC2 A)
MIC2 6
4:11D
MIC2_ADC_IN A 4/5 CH3_R 6
2:11C
CH3_R
CN1004
A 2/5
CN1003
(MIC1 A) 4:11B
MIC1 9 MIC1_ADC_IN GNDIN_CH4 9
2:11F
GNDIN_CH1 10 CH4_L 1 0 CH4_L
(C4)
GNDIN_CH1 11 GNDIN_CH4 1 1
1:11B 2:7H
CH1_L 12 CH1_L CH4_SEL 1 2 CH4_ASEL_OUT C
D 1/19
(C1)
D 1/19
1:7E 2:11G
CH1_SEL 14 CH1_ASEL_OUT CH4_R 1 4 CH4_R
1:11C
CH1_R 16 CH1_R GNDIN_RET 1 6
GNDIN_CH1 17 GNDIN_RET 1 7 (RET A)

3:10D
GNDIN_CH2
GNDIN_CH2
18
19
A 1/5 RET_L 1 8
GNDIN_RET 1 9 2-4
RETURN_L
3:10E
CH2_L 20
1:11F
CH2_L RET_IN 2 0
R4803
RETURN_IN A 3/5
GNDIN_CH2 (C2) GNDIN_RET 2 1 100
21
1:7H 3:10E
CH2_SEL 22 CH2_ASEL_OUT RET_R 2 2 RETURN_R
GNDIN_CH2 23
1:11G
CH2_R 24 CH2_R
GND_CH3
GNDIN_CH2 25
GNDD GND_CH4 D
GND_MIC2 GND_RET
GND_MIC1
GND_CH1
GND_CH2
R4802
GND_MIC1 GND_MIC2
(C1)
(C2)
E
(C3)
(C4)
(RET A)
(MIC1 A)
: MIC1 Audio Signal
(MIC2 A)
: MIC2 Audio Signal

: Waveform measuring point
A 5/5
DJM-850-K 107
5 6 7 8
1 2 3 4
10.6 MIC1 and MTRM ASSYS
B MIC1 ASSY (DWX3371) C
MIC JACK M
B
MIC SHIELD:DNF1849
MIC1
JA9001
M
CKS3533-A
CN9001
1
(MIC1 A) R9001 R9003 (MIC1 A)
CN4601
2
1 MIC1_HOT
3 0 0
2 MIC1_HOT
C
4
3 GNDA C
5
4 GNDA
(MIC1 A) R9002 R9004 (MIC1 A)
A 4/5
6
5 MIC1_COLD
D9002 D9001
D9004 D9003
7 0 0
6 MIC1_COLD
0.01u/50
0.01u/50
C9007
LA C 9 0 0 1
LA C 9 0 0 2
C9003
C9004
C9005
C9006
C9008
NM
NM
NM
NM
NM
NM
DKB1108-A
RKZ15KG(B2)
C9009
SQ
1u/25
RKZ15KG(B2)
RKZ15KG(B2)
M
RKZ15KG(B2)
D VA9001 NOTES NM is STBY
EZJZ1V270RM
SQ CKSQYB C
VA9002
EZJZ1V270RM LA CFTLA
RS1/10SR****J
GNDF GNDA
(MIC1 A)
: MIC1 Audio Signal
B
108 DJM-850-K
1 2 3 4
5 6 7 8
C MTRM ASSY (DWX3372)
MIC TRIM
B
(MIC1 A)
CN4602
6 MIC1_TRIM_IN
(MIC1 A)
5 MIC1_TRIM_OUT
4 GND_MIC2
MIC1 TRIM
DCS1123-A
2
3
5
6
3 GND_MIC1
VR8801
(MIC2 A)
A 4/5
2 MIC2_TRIM_OUT
(MIC2 A)
1 MIC2_TRIM_IN
CN4601
R8801
CN8801
CKS3533-A C
CHASSIS GND NM
GND_MIC1 GND_MIC1
A 4/5
GND_MIC2
DCS1123-A
2
3
5
6
VR8802
MIC2 TRIM
(MIC1 A)
: MIC1 Audio Signal
1
R8802
(MIC2 A) D
: MIC2 Audio Signal
CHASSIS GND NM
GND_MIC2 NOTES
NM is STBY
RS1/10SR***J
C
DJM-850-K 109
5 6 7 8
1 2 3 4
10.7 MAIN ASSY (1/19)

V+5D_LED
A
BOARD IF CN1002
VKN1421-A
V+34D V+3R3E
CANON SHIELD: DNF1789-
C1001
0.1u/10
PHONE SHIELD: DNF1875-
V+5D_LED 17
GNDD_LED 16
V+5D_LED 15
CN6602 GNDD_LED 14 : Voltage measuring point
V+5D_LED 13
GNDD_LED 12 : Waveform measuring point

V+5D_LED 11
GNDD_LED 10
GNDD 9
V+34D 8
1-69
C1012
0.1u/50
H 1/2
SR
GNDD 7
EFX_ON/OFF
GNDD_34D 6
5
R1011
0
EFX_ON/OFF
10:2C To MAIN_UCOM D 10/19
R1012
MVR_MUTE 4
0
MVR_MUTE
15:2H To OUTPUT IF D 15/19
V+3R3E 3
R1013 STBY_KEY
STBY_KEY 2 10:11A
B STBY_LED 1
R1014 0
STBY_LED From To MAIN_UCOM
0 10:12B
D 10/19
C1009
0.1u/10
GNDD_34D
GNDD_LED
D 8/19,11/19 24M_CLK_
8:11C;8:5
From FPGA 6M_CLK_
GNDD 8:11C;8:5
V+3R3D V+3R3D_REFA
CN1001
VKN1428-A D 11/19 D 13/19 From DSP
From To FPGA
C1011
SUB_UCOM
D 8/19,11/19
0.1u/10
V+3R3D 24
11:15H From FPGA 96k_CLK_
8:11C;8:
GNDD 23
R1007 FPGA_CLK
FPGA_CLK 22
HP-MIC-
GNDD 21
0
From MAIN_UCOM 8:11C;8:
R1041 FPGA_TXD_DAT
FPGA_TX_DAT
FPGA_RX_DAT
20
19
R1008 0
FPGA_RXD_DAT D 8/19,10/19
R1040 0
FPGA_SIGNAL
FPGA_SIGNAL 18
0
CN6601
GNDD 17
R1042 SUB_INT
C SUB_INT 16
0
10:12A
R1009 SUB_CTRL
SUB_CTRL 15 10:12K
R1010 0
SUB_CPU_RESET
SUB_CPU_RESET 14
0 10:12J
GNDD 13
R1038 VR_TRIM4
CH4_TRIM 12 10:12C
0
R1037
D 10/19
H 1/2
VR_FADER4
VR_FADER4 11
R1036 0 10:12C
CH3_TRIM 10 VR_TRIM3
0 10:12C
GND_REFA 9
R1035 VR_TRIM2
From To MAIN_UCOM
CH2_TRIM 8 10:12C
R1034 0
VR_FADER3
VR_FADER3 7
0 10:12C
R1033
6
VR_TRIM1
CH1_TRIM STBY
0 10:12C
GND_REFA 5
R1032 VR_FADER_CRS
CROSS_FADER 4 10:12C
R1031 0 VR_FADER2
VR_FADER2 3
0 10:12C
R1030 VR_FADER1
VR_FADER1 2
0 10:12C
100k
100k
100k
100k
100k
100k
100k
100k
100k
V+3R3D_REFA 1
C1010
0.1u/10
R1005
R1004
R1006
R1029
R1003
R1028
R1026
R1002
R1025
D GNDD
GNDREF_A
GND
A 5/5 CN4802 A 5/5 CN4803

GNDIN_MIC2
GNDIN_MIC2
GNDIN_MIC1
GNDIN_MIC1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH1
GNDIN_CH2
GNDIN_CH2
GNDIN_CH2
GNDIN_CH2
2 5 GNDIN_CH2
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH3
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_CH4
GNDIN_RET
GNDIN_RET
GNDIN_RET
GNDIN_RET
MIDI_TXD
CH1_SEL
CH2_SEL
CH3_SEL
CH4_SEL
RET_IN
CH1_R
CH2_R
CH3_R
CH4_R
RET_R
CH1_L
CH2_L
CH3_L
CH4_L
RET_L
GNDD
VKN1429-A
V+5D
MIC2
MIC1
VKN1426-A
CN1003
CN1004
V+5D
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
10
11
12
13
14
15
16
17
18
19
20
21
22
1
STBY
R1046
(RET A)
NM
E
STBY
STBY
STBY
STBY
R1001
R1048
R1015
R1047
R1016
R1017
R1045
R1018
R1044
R1043
NM
NM
NM
NM
100
0
GNDIN_CH3
(RET A) (RET A
LINE_SEL1
LINE_SEL2
LINE_SEL3
LINE_SEL4
GNDD
GNDIN_MIC GNDIN_CH1 GNDIN_CH2 GNDIN_CH4 GNDIN_RET

(C3)
(C4)
(MIC1 A)
(MIC2 A)
(C2)
(C4) (C4
(C1)
(C3) (C3
(C2) (C2
(C1) (C1
F
(MIC1 A) (MIC1 A
(MIC2 A) (MIC2 A)
D 1/19
110 DJM-850-K
1 2 3 4
5 6 7 8
D 1/19 MAIN ASSY (DWX3360) A
V+5A V+13D_UNREG
D 10/19 V+15A
2
POWER_RESET_A
To MAIN_UCOM 5
220u/25
10:2H
0.1u/25
C1007
C1008
CN1005
SR
MUTE 3 AKP7199-A
From MUTE 15:3F;16:7E;17:2H;1 8:2D;19:4E
V+5A_HP 19 GNDD
D 15/19-19/19 18 GNDD
DCH1201-A
17 POWER_RESET_A B
10u 10V
0.1u/10
C1003
C1004
16 MUTE
15 GNDD
C1005
14 V+13D_UNREG
CN3
/19,11/19 24M_CLK_HP-MIC-RE 1000p/50
13 GND_PO
From FPGA
8:11C;8:5C;11:2L
6M_CLK_HP-MIC-RE
1-83 HP DAC C1006
12 V-15A
8:11C;8:5C;11:2L 1-79 1-82 IC1001

0.01u/16
11 GND_PO
STBY
C1013
E 1/2
(HP D) 10 V+15A
D 13/19 From DSP ADAT_HP
13:15H
R1039
22
R1021
R1022 22
1
MCLK DZFL
16 NM
C1014
9 GNDA
2 15
BICK DZFR 8 V+5A
0 (HP D) 3
From FPGA 96k_CLK_HP-MIC-RE
8:11C;8:5C;11:2L
R1023
R1024 0
SDTI VDD
14 NM
7 GNDA
4 13 (HP O)
LRCK VSS GNDA_HP GNDD 6 HP_L+
R1020 0 5 12 (HP O)
HP-MIC-RE_RESET
AIN_UCOM 8:11C;8:5C;10:15C
1
100
8 6
PDN
AOUTL+
11 (HP O) (HP O)
5 GNDA_HP
CSN 4 HP_L-
9,10/19 1-81 2 7 7
AOUTL-
CCLK
10
3 GNDA_HP
AOUTR+
3 6 8 9
CDTI HP_R-
1-80 4 5
AOUTR-
2
1 HP_R+
0.01u/16
C1002
R1019 AK4382AVT 1-78 4

10k
R1075 C
STBY
0
SR
C1018
C1017
C1016
C1015
NM
NM
NM
NM
GNDD V-15A GNDA GNDA_DA GNDA_HP
GNDD STBY
R1049
NM
R1050
NM
GNDA_AD GNDA_OUT
GND_PO GNDA_AD
STBY
R1051 R1054 R1057 R1059 R1062 R1074 R1076
NM NM NM NM NM NM NM
R1052 R1055 R1058 R1060 R1063 R1077
NM NM NM NM NM NM
GNDA_AD GNDIN_RET
R1053 R1056 R1064 R1061 R1066 R1078 NOTES
NM NM NM NM NM NM
NM is STBY
R1072 R1070 R1065 R1067 R1079
D
NM NM NM NM NM RS1/16SS***J
GNDA_AD GNDIN_CH1
(D) RS1/16SS****D
R1073 R1071 R1068
GNDA_AD GND_PO GNDD GNDD
NM NM NM SR RS1/10SR***J
SR (D) RS1/10SR****D
R1069
GNDA_AD GNDIN_CH4 GNDA_AD GNDIN_CH2
NM SQ RS1/8SQ***J
SA RS1/4SA***J
GNDA_AD GNDIN_CH3
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
(C1) SQ CKSQYB***K F
: CH1 Audio Signal (L CH) CH CCSSCH***J F
(C2) CCSSCH***D
CH (D) F
: CH2 Audio Signal (L CH) SRCH CCSRCH***J F
(C3)
E
RET_R : CH3 Audio Signal (L CH) SQCH CCSQCH***J F
(C4) CFHXSQ***J
(RET A)
8:2B
RET_L
8:2B
To MIC/RET ADC D 8/19 : CH4 Audio Signal (L CH)
CFHXSQ
+
CEVW***M
F
F
(RET A) NP CEVWNP***M F
RETURN_IN : RETURN Audio Signal (L CH) HVW
+
CEHVW***M F
10:2F
CH_SELECT
To MAIN_UCOM D 10/19 (MIC1 A)
: MIC1 Audio Signal HVAW
+
CEHVAW***M F
10:14I (MIC2 A) CEANP CEANP***M F
CH4_R
: MIC2 Audio Signal
(HP D)
(C4) 7:2B
CH4_L
7:2E
To CH4 ADC D 7/19 (HP O)
: HP OUT Digital Signal
CH3_R : HP OUT Signal (L ch)
6:2B
(C3)
CH3_L To CH3 ADC D 6/19
6:2E
CH2_R
(C2)
5:2B
CH2_L
5:2E
To CH2 ADC D 5/19 : Waveform measuring point
CH1_R
4:2B
(C1)
CH1_L
4:2E
To CH1 ADC D 4/19 F
(MIC1 A) MIC1
(MIC2 A)
8:8B
MIC2
8:8B
To MIC/RET ADC D 8/19
MIDI_TXD
10:11A To MAIN_UCOM D 10/19 D 1/19
DJM-850-K 111
5 6 7 8
1 2 3 4
10.8 MAIN ASSY (2/19)
A POWER IF
V+13D_UNREG
!
D1203
1SR154-400 UNREG Voltage 7.2 18V

V+11E_UNREG
Voltage abnormality
CN1201 1-1 1
AKM1274-A V+34D
STBY
P1204
V+11E_UNREG 3
NM
D 10/19
Q JP3001 RELAY_CONT 1
GNDD 2
R1232
RELAY_CONT
10:2K From Main Ucom
CCG1236-A
330 STBY
0.01u/25
C1209
C1212
C1211
C1213
0.1u/25
10u/35
NM
SR
1000p/50
C1201
R1201
160k
B GNDD R1203
GNDD GNDD 0
R1202
39k
V+15A V+15A_O V+15A_IN
GNDD
STBY
P1203
NM
V+5D
1000p/50
1000p/50
C1208
0.01u/25
0.01u/25
C1205
C1203
C1207
P1202
CH
CH
NM
C1202
R1205
0.1u/10
16k
(D)
R1207
GND_PO
C V-15A V-15A_O V-15A_IN
GNDD 0
R1206
43k
(D)
V+5A V+5A_IN V+5A_O V+5A_HP GNDD
V+5A
V+15A
R1228
1000p/50
0.01u/16
C1206
C1204
13
R1210
CH
R1226
47k
(D)
390
R1212
R1229
13
0
R1227
390
R1211
62k
(D)
R1230
GNDA
13
GNDD
D Q1205
D 5/19,7/19,10/19 LSC4081UB(QRS) V+3R3A
24AD_RESET R1225
From MAIN_UCOM 5:10F;7:10F;10:15C 2.2k
Q1204
C1214
R1235
0.1u/10
LSC4081UB(QRS)
24k
(D)
R12
GNDD
0
GNDD
R1236
22k
(D)
V+3R3D_REFA V+3R3E V+5D V+5A_O V+34D
GNDD
C1217
C1218
C1219
C1220
C1221
C1222
C1223
C1224
C1225
C1226
C1227
C1216
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/50
SR
V+34D
E
R1239
47k
(D)
GNDREF_A GNDD GNDD GNDA_DA GNDD_34D R1
V+3R3D V+1R2D
R1240
33k
(D)
1000p/50
1000p/50
1000p/50
1000p/50
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
C1233
C1234
C1235
C1236
C1237
C1238
C1239
C1240
C1241
C1242
C1228
C1229
C1230
C1231
C1232
0.1u/10
R1251
V-15A
GNDD GNDD
KN1202 KN1204 KN1206

CKF1089-A CKF1089-A CKF1089-A
KN1201 KN1203 KN1205
CKF1089-A CKF1089-A CKF1089-A
D 2/19 GNDD
112 DJM-850-K
1 2 3 4
5 6 7 8
Voltage abnormality detect circuit Low value Hi value
V+34D V+5D V+5A V+15A V+34D V+34D 27.63V 44.59V
V+5D 3.70V 7.21V
R1247
V+3R3D 2.37V 4.31V
6.2k
(D)
1SS301
D1205
V+1R2D 2.18V
V+15A 4.92V 19.73V

V+5A
R1215
R1233
V-15A -6.97V -19.30V
V+3R3D
200
33k
(D)
(D)
STBY
V+5A 3.65V 7.21V
1000p/50
C1201
R1201
R1204 R1252
160k
V+3R3A 1.29V 6.22V

NM 82k
R1248
R1234
(D)
750
4.7k
(D)
(D)
R1203 Q1201 R1214 R1231 B
HN1A01FU(YGR) V+3R3E
0 (1/2) 1k 2.7k
GNDD
1000p/50
(D) (D)
R1202
C1210
Q1202 Q1206
39k
R1216
R1249
R1243
HN1A01FU(YGR)
HN1A01FU(YGR)
D 10/19
820
10k
(1/2)
(D)
(2/2)
0
R1246
GNDD D1201 GNDD GNDD

100
VDET
10:14F To MAIN_UCOM
GNDD
0.01u/16
C1215
Q1208 NORMAL
LTC114YUB High
1SS301 ABNORMAL
Low
GNDD GNDD
V+5D V+3R3D
1SS352
D1202
V+3R3A
STBY
C1202
R1205
0.1u/10
R1208
16k
(D)
R1244
NM
12k
(D)
R1207 Q1201
HN1A01FU(YGR)
Q1207
GNDD 0 (2/2)
HN1B04FU(YGR) C
R1206
(2/2)
43k
(D)
R1245
R1253
33k
(D)
100k
(D)
GNDD
V-15A GNDD
V+15A V+5A
R1210
R1213
47k
(D)
10k
(D)
R1212 Q1202
HN1A01FU(YGR)
0 (1/2)
NOTES
R1211
62k
(D)
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
GNDD
SR RS1/10SR***J D
V+3R3A V+1R2D SR (D) RS1/10SR****D
SQ RS1/8SQ***J
SA RS1/4SA***J
STBY
C1214
R1235
0.1u/10
R1238 RN RN1/16SE****D
24k
(D)
NM
R1237 Q1206
HN1A01FU(YGR) RAB4CQ***J
D1204
0 (2/2)
GNDD
R1236
22k
(D)
CKSSYB***K F
1SS301
SR CKSRYB***K F
SQ CKSQYB***K F
GNDD
CH CCSSCH***J F
CH (D) CCSSCH***D F
V+34D V+3R3A SRCH CCSRCH***J F
SQCH CCSQCH***J F
E
R1239
R1242 CFHXSQ CFHXSQ***J F

47k
(D)
+
100k CEVW***M F
(D) CEVWNP***M
R1241 Q1207 NP F
HN1B04FU(YGR) +
HVW CEHVW***M F
0 (1/2)
+
R1240
HVAW CEHVAW***M F
33k
(D)
CEANP CEANP***M F
R1251
V-15A
The > mark found on some component parts
: Voltage measuring point indicates the importance of the safety factor of the part.
Therefore, when replacing, be sure to use parts
: Waveform measuring point of identical designation.
D 2/19
DJM-850-K 113
5 6 7 8
1 2 3 4
10.9 MAIN ASSY (3/19)
A POWER ONLY USB_UCOM(Blackfin) PLL
11V 3.3V(EuP) 3.3V(D) 2.5V(D)

V+11E_UNREG V+3R3E V+3R3D V+2R5D
STBY STBY
D1401 D1404
NM 7 NM 11
DCH1201-A
IC1401 IC1407
1 0 u 10V
C1435
1 5 5 1 A side
VIN
CONTROL VIN VOUT
2 2
A side VSS
GND
DCH1201-A
3 4 4 3
1 0 u 10V
NC VOUT ON/OFF NC
1-2
C1443
C1441
0.1u/10
1000p/50
C1406
C1410
C1408
S-1132B25-U5
0.1u/25
NJM2831F33
1u/10
CH
SR
SR
! !
V+11E_UNREG
B GNDD
GNDD
R1445
10k
IC1409
R1443
11k
1 5
OUT CD
2
VDD
0.01u/16
C1464
3 4
C1465
VSS NC
0.1u/25
R1444
SR
12k
S-80927CNMC-G8X
GNDD
C
5V(A) 3.3V(A) 5V(D) 3.3V(REFA)
V+5A_IN V+3R3D V+5D V+3R3D_REFA_0
V+3R3A
STBY STBY STBY

D1402 R1402 D1405
NM NM NM 10
IC1402 IC1406
5 1 A side 1 5
STBY VIN VOUT CONT VIN
2 8 2
1000p/50
VSS GND
C1411
0.1u/10
C1401
C1402
C1407
C1409
0.1u/10
A side
1u/10
4 3 3 4
NM
CH
SR
SW NC NC VOUT
1000p/50
C1437
C1439
C1438
0.1u/10
S-1132B33
1u/10
NJM2878F3-33
CH
SR
! !
GNDA_AD
GNDD
D
13V 34V (FL)

STBY
V+34D_1 V+34D
R1404
R1405
R1406 C1412 V+13D_U

SQ
SQ
1.5
1.5
NM NM
1-96
A side Q1402
L1401 D1403 LSA1576UB(QRS) A side
DTL1123-A
470uH RB160L-40 13
IC1403 !
R1414
R1417
100k
V+13D_UNREG
47k
15k
15k
15k
15k
15k
R1403 8 1
C1413
10u/35
CD CS
1 . 5 k SR 7 2
SI ES
C1405 STBY
6 3
R1415
R1418
R1421
R1422
R1423
R1424
R1425
1000p/50
V+ CT
100u/50
SR
18k
47k
C1414
R1407
C1417
C1461
C1416
SR (D)
0.1u/50
5 4 100p/50 CH
NM
CH
SR
39k
IN- GND
CCG1236-A
1000p/50
100u/25
C1403
C1404
C1454
C1455
NJM2392M
0.1u/25
10u/35
E
CH
SR
R1408
!
SR (D)
1.5k
V+5A
GNDD
GNDD_34D
Q1406
LTA124EUB
D 10/19 Q1401
LTC124EUB
V+34D_CONT
From MAIN_UCOM 10:12K
Q1405
LTC124EUB
Q1404
LSC4081UB(QRS)
V+34C_CONT V+34D Discharge circuit GNDD
High R1416
Q1403
GNDD LSC4081UB(QRS)
F Low 2.2k
D 3/19 GNDD
114 DJM-850-K
1 2 3 4
5 6 7 8
D 10/19 V+1R2D_CONT
From MAIN_UCOM 10:12K V+1R2D
13V 1.2V(D) A side 1-95

L1404
33u
CTH1527-A-TLB 12
R1438
220
STBY
(D)
V+13D_UNREG IC1408
BD9328EFJ
C1460
NM
R1435 C1436 1 8
R1439
22 0.1u/10 BST FIN SS
2 7
3.3k
9
(D)
DCH1201-A
DCH1201-A
CCH1565-A
VIN EN
1 0 0 u 16V
1 0 u 10V
1 0 u 10V
1000p/50
3 6
C1448
C1447
C1445
C1446
C1449
0.1u/10
CH
SW COMP
CCG1236-A
4 5
1000p/50
C1456
C1457
GND FB
0.1u/25
10u/35
B
C1434
CH
SR
C1440
0.1u/10
C1442
C1444
R1440
0.1u/10
0.1u/10
!
10k
(D)
R1436
4.7k
GNDD
D 10/19
V+3R3D_CONT
From MAIN_UCOM 10:12K V+3R3D
13V 3.3V(D) A side 1-94

L1402
47u 9
ATH7048-A-TLB
R1429
4.7k
STBY
(D)
V+13D_UNREG
IC1405
BD9328EFJ C1458 C
NM
R1413 C1419 1 8
R1430
0.1u/10 BST FIN SS
22 2 7
22k
9
(D)
DCH1201-A
DCH1201-A
VIN EN
1 0 u 10V
1 0 u 10V
1000p/50
3 6
C1431
C1429
C1427
C1425
C1433
HVW
0.1u/10
100u/6.3
CH
SW COMP
CCG1236-A
4 5
1000p/50
C1415
C1450
C1451
FB
0.1u/25
10u/35
GND
CH
SR
0.033u/16
C1421
!
C1423
R1431
0.1u/10
10k
(D)
R1420
18k
GNDD
D 10/19 D
V+5D_CONT
From MAIN_UCOM V+5D V+5D_LED
10:12K
6
13V 5V(D)
L1403 A side
47u NOTES
ATH7048-A-TLB
R1426
STBY
7.5k
NM is STBY
(D)
V+13D_UNREG IC1404
C1459
96 BD9325FJ
NM
RS1/16SS***J
R1412 C1418 1 8 (D) RS1/16SS****D
BST SS
R1427
STBY 22 0.1u/10 2 7
39k
SR RS1/10SR***J
(D)
DCH1201-A
DCH1201-A
VIN EN
1 0 u 10V
1 0 u 10V
1000p/50
3 6
100u/10
D1407
C1430
C1428
C1424
C1426
C1432
HVW
0.1u/10
SW COMP
NM
CH
CCG1236-A
4 5 SQ RS1/8SQ***J
1000p/50
GND FB
C1413
C1452
C1453
0.1u/25
10u/35
CH
SR
SA RS1/4SA***J
0.022u/16
C1420
R1441
STBY RN RN1/16SE****D
!
NM
C1463
C1422
R1428
0.1u/10
CMS03
NM
10k
D1406
(D)
! RAB4CQ***J
C1462
R1419
NM
27k
E
CKSSYB***K F
SR CKSRYB***K F
GNDD SQ CKSQYB***K F
GNDD_LED
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
The > mark found on some component parts +
CEHVW***M
HVW F
indicates the importance of the safety factor of the part. +
: Voltage measuring point Therefore, when replacing, be sure to use parts HVAW CEHVAW***M F
CEANP CEANP***M F
(QRS) of identical designation.
D 3/19
DJM-850-K 115
5 6 7 8
1 2 3 4
10.10 MAIN ASSY (4/19)
A CH1 ADC V+5A_IN
V+15A_IN
D1601
C1605
0.1u/25 1SS302
SR
GNDIN_CH1
R1617
GNDA_AD
2.4k
R-
C1613
100p/50
C 1 6 3 8 RN
CH
R1601 STBY
10k NM STBY
RN C1601
NM 2
8 R1613
1 V+5A_IN
IC1601 220
R1621
R1602 4 RN
2.4k
3
RN
10k NJM4580MD C1620
RN (1/2)
0.1u/10
D 1/19 V-15A_IN R1609
R1623 R1622
2.4k
RN
1.1k 2
RN 8
CH1_R 1
C1609 STBY
1:7H
RN
2.4k
4
B NM R1618 3 IC1603
NJM4565MD
V+15A_IN 2.4k (1/2)
C1614
GNDIN_CH1
100p/50
RN STBY
CH
R1624
C1639
2.4k
RN
R1603 STBY
10k
RN C1602 NM STBY
NM 6
R1629
C1619
8 R1614
7
NM
NM
IC1601 220 GNDA_AD
R1604 4 NJM4580MD RN
5 (2/2)
10k
RN C1610
NM STBY GNDIN_CH1
R1610
1.1k
R+ V+5A_IN
RN
C1606
D1602
0.1u/25
SR
CH1, CH3 common used GNDIN_CH1
1SS302
V-15A_IN
V+15A_IN
GNDA_AD
C
C1617
C1618
47u/25
47u/25
V+5A_IN
GND_PO GND_PO V+15A_IN D1603

V-15A_IN C1607
0.1u/25 1SS302
SR
GNDIN_CH1
R1619
GNDA_AD
2.4k L- (CH1)
100p/50
C1615
RN
CH
R1605 C1640
STBY
10k STBY
(CH1) RN C1603 NM
NM 6
8 R1615 (CH1)
7
IC1602 220 V+5A_IN
R1625
5
RN
2.4k
10k (2/2)
RN
V-15A_IN R1611
D 1/19
R1627 R1626
RN
2.4k
1.1k 6
(CH1) 8
D CH1_L RN
C 1 6 1 1 STBY
7
1:7H
RN
2.4k
NM R1620 4 IC1603
5
NJM4565MD
V+15A_IN 2.4k (2/2)
C1616
GNDIN_CH1
100p/50
RN
CH
R1628
C1641
RN
R1607 STBY
2.4k
10k GNDA_AD
RN C1604 NM STBY
NM 2 (CH1)
8 R1616
1
IC1602 220
R1608 4 NJM4580MD RN (CH1) (CH1) (C
(CH1) 3
10k (1/2)
RN C1612 (CH1) (C
NM STBY
L+ V+5A_IN
R1612
1.1k D1604
RN
C1608
0.1u/25 1SS302
SR
GNDIN_CH1
V-15A_IN GNDA_AD
D 4/19
116 DJM-850-K
1 2 3 4
5 6 7 8
(CH1)
(CH1 D)
: CH1 Digital Signal
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
SR (D) RS1/10SR****D C
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CH1 ADC NP
CEVW***M
CEVWNP***M
F
F
D
C1626 C1629 +
IC1604 HVW CEHVW***M F
10u/16 PCM1804DB 10u/16 +
HVAW CEHVAW***M F
C1622 1 C1634
VREFL 28 CEANP CEANP***M F
0.1u/10 2 VREFR 27 0.1u/10
AGNDL
3 AGNDR 26
VCOML
(CH1)
C1623
0.1u/10 4 VCOMR 25 C1630
VINL+ 0.1u/10
(CH1) 5 VINR+ 24
VINL-
C1624
2700p/50 6 VINR- 23 C1631
2700p/50
FMT0
AGND 22
7
FMT1 1-18
1-18 8
S/M
VCC 21
9
OSR0
OVFL 20 1-26 1-28 1-22
OVFR
10
11
OSR1
RST
19
R1632
100
R1635
13AD_RESET
6:10F;10:13C From MAIN_UCOM D 6/19,10/19
OSR2 18 24M_CLK_13AD
12 SCKI 17 R1633
22
6:10F;11:2H
13
BYPAS
LRCK/DSDBCK 16
DGND 0
R1636
96k_CLK_13AD
6:10F;11:2H
6M_CLK_13AD
From FPGA D 6/19,11/19
14 BCK/DSDL 15 R1634 0
6:10F;11:2H E
VDD
DATA/DSDR 100
ADAT_CH1_ANA
13:5H
To DSP D 13/19
(CH1 D) (CH1 D)
V+5A_IN
0.01u/16
V+3R3A
C1632
1-27 1-29
R1630
R1631
SR
SR
0
GNDD
10u 16V
1000p/50
CCH1998-A
1000p/50
C1621
C1625
C1627
C1628
C1633
C1635
0.1u/10
0.1u/10
10u/16
C1636
1000p/50
C1637
GNDA_AD
0.01u/16
PCM, left-justified, 24-bit
FMT0 Low
FMT1 Low GNDD
Dual rate ( 64 fS slavemode
OSR0 High
OSR1 Low
OSR2 Low
F
D 4/19
DJM-850-K 117
5 6 7 8
1 2 3 4
10.11 MAIN ASSY (5/19)
A
CH2 ADC V+5A_IN
V+15A_IN D1801
C1805
0.1u/25 1SS302
SR
GNDIN_CH2
R1817
GNDA_AD
2.4k R-
C1813
100p/50
C 1 8 3 8 RN
CH
R1801 STBY
10k NM STBY
RN C1801
NM 2
8 R1813
1 V+5A_IN
IC1801 220
R1821
2.4k
3
RN
10k (1/2) C1820
RN
0.1u/10
V-15A_IN R1809
D 1/19
R1823 R1822
2.4k
RN
1.1k 2
RN 8
CH2_R 1
C1809
1:7H STBY
RN
2.4k
4 IC1803
B NM R1818 3 NJM4565MD
V+15A_IN (1/2)
2.4k
C1814
GNDIN_CH2
100p/50
RN STBY
CH
R1824
C1839
2.4k
RN
R1803 STBY
10k
RN C1802 NM STBY
NM 6
R1829
C1819
8 R1814
7
NM
NM
IC1801
220
GNDA_AD
5 (2/2)
10k
RN C1810
NM STBY GNDIN_CH2
R1810
1.1k
R+ V+5A_IN
RN
C1806
D1802
CH2, CH4 common used 0.1u/25
SR
GNDIN_CH2
V+15A_IN 1SS302
V-15A_IN
C1817
C1818
47u/25
47u/25
GNDA_AD
C
V+5A_IN
GND_PO GND_PO
V-15A_IN V+15A_IN D1803
C1807
0.1u/25 1SS302
SR
GNDIN_CH2
R1819
GNDA_AD
2.4k L- (CH2)
C1815
100p/50
RN
CH
R1805 C1840
STBY
10k STBY
(CH2) RN C1803
6 NM
NM 8 (CH2)
7 R1815
IC1802 220 V+5A_IN
R1825
R1806 5
4 NJM4580MD RN
RN
2.4k
10k (2/2)
RN
V-15A_IN R1811
R1827 R1826
D 1/19
RN
2.4k
1.1k 6
(CH2) 8
D CH2_L C1811
RN
STBY
7
1:7H
RN
2.4k
NM R1820 4 IC1803
5 NJM4565MD
V+15A_IN 2.4k (2/2)
C1816
GNDIN_CH2
100p/50
RN
CH
R1828
C1841
RN
R1807 STBY
2.4k
GNDA_AD
10k
RN C1804 NM STBY
NM 2 (CH2)
8 R1816
1
IC1802 220
R1808 4 NJM4580MD RN (CH2) (CH2) (C
(CH2) 3
10k (1/2)
RN C1812 (CH2) (C
NM STBY
L+ V+5A_IN
R1812
1.1k D1804
RN
C1808
0.1u/25 1SS302
SR
GNDIN_CH2
GNDA_AD
V-15A_IN
D 5/19
118 DJM-850-K
1 2 3 4
5 6 7 8
(CH2)
(CH2 D)
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
C
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
CH2 ADC +
CEVW***M
CEVWNP***M
F D
C1826 C1829 NP F
+
10u/16 PCM1804DB 10u/16
+
HVAW CEHVAW***M F
C1822 1 28 C1834
VREFL CEANP CEANP***M F
0.1u/10 2 VREFR 27 0.1u/10
AGNDL
3 AGNDR 26
VCOML
(CH2) C1823
0.1u/10 4 VCOMR 25
C1830
0.1u/10
VINL+
(CH2) 5 VINR+ 24
VINL-
C1824
2700p/50 6 VINR- 23
C1831
2700p/50
FMT0
AGND
7
FMT1 22
1-19
1-19 8
S/M
VCC 21
9
OSR0
OVFL 20 1-26 1-28 1-23 D 2/19,7/19,10/19
10 OVFR 19 R1832 24AD_RESET
OSR1
RST R1835 2:2E;7:10F;10:15C From MAIN_UCOM
11 18 100 24M_CLK_24AD
OSR2
SCKI R1833 7:10F;11:2I
12
13
BYPAS
LRCK/DSDBCK
DGND
17
16 0
100
R1836
96k_CLK_24AD
7:10F;11:2I
6M_CLK_24AD
14 BCK/DSDL R1834 100
7:10F;11:2I E
VDD
DATA/DSDR
15
100
ADAT_CH2_ANA
13:5H
To DSP D 13/19
(CH2 D) (CH2 D)
0.01u/16
V+3R3A V+5A_IN
C1832
1-27 1-29
R1830
R1831
SR
SR
0
GNDD
10u 16V
1000p/50
CCH1998-A
1000p/50
C1821
C1825
C1827
C1828
C1833
C1835
0.1u/10
0.1u/10
10u/16
C1837
1000p/50
C1836
GNDA_AD
FMT0 Low
0.01u/16
FMT1 Low GNDD
OSR0 High
OSR1 Low
OSR2 Low
F
D 5/19
DJM-850-K 119
5 6 7 8
1 2 3 4
10.12 MAIN ASSY (6/19)
A CH3 ADC V+5A_IN
V+15A_IN D2001
C2005
0.1u/25 1SS302
SR
GNDIN_CH3
R2017
2.4k R- GNDA_AD
C2013
100p/50
C 2 0 3 6 RN
CH
R2001 STBY
10k NM STBY
RN C2001
NM 2
8 R2013
1 V+5A_IN
IC2001 220
R2021
2.4k
3
RN
10k (1/2) C2018
RN
V-15A_IN 0.1u/10
R2009
D 1/19
R2023 R2022
2.4k
RN
1.1k 2
RN 8
CH3_R 1
C2009 STBY
1:7G
RN
2.4k
B NM R2018 4
3 IC2003
NJM4565MD
V+15A_IN 2.4k (1/2)
C2014
GNDIN_CH3
100p/50
RN STBY
CH
R2024
C2037
2.4k
RN
R2003 STBY
10k
RN C2002 NM STBY
NM 6
R2029
C2017
8 R2014
7
NM
NM
IC2001 220 GNDA_AD
5
10k (2/2)
RN C2010
NM STBY GNDIN_CH3
R2010
1.1k
R+ V+5A_IN
RN
C2006
D2002
0.1u/25
SR
GNDIN_CH3
V-15A_IN 1SS302
GNDA_AD
C
V+5A_IN
V+15A_IN D2003
C2007
0.1u/25 1SS302
SR
GNDIN_CH3
R2019
GNDA_AD
2.4k L- (CH3)
C2015
100p/50
RN
CH
R2005 C2038
STBY
10k
(CH3) RN C2003
6 N M STBY
NM 8 (CH3)
7 R2015
IC2002 220 V+5A_IN

R2025
R2006 4 RN
5 NJM4580MD
RN
2.4k
10k
RN (2/2)
V-15A_IN R2011
R2027 R2026
D 1/19
RN
2.4k
1.1k 6
(CH3) 8
D CH3_L
RN
C 2 0 1 1 STBY
7
1:7H
RN
2.4k
NM R2020 4 IC2003
5
NJM4565MD
V+15A_IN 2.4k (2/2)
C2016
GNDIN_CH3
100p/50
RN
CH
R2028
C2039
RN
R2007 STBY
2.4k
GNDA_AD
10k
RN C2004 NM STBY
NM 2 (CH3)
8 R2016
1
IC2002 220
R2008 4 RN (CH3) (CH3) (C
(CH3) 10k
3 NJM4580MD
RN (1/2)
C2012 (CH3) (C
NM STBY
L+ V+5A_IN
R2012
1.1k D2004
RN
C2008
0.1u/25 1SS302
SR
GNDIN_CH3
V-15A_IN GNDA_AD
D 6/19
120 DJM-850-K
1 2 3 4
5 6 7 8
(CH3)
(CH3 D)
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ***J F
CFHXSQ
+
CH3 ADC NP
CEVW***M
CEVWNP***M
F
F
D
C2024 C2027 +
HVW CEHVW***M F
IC2004
10u/16 10u/16 +
PCM1804DB HVAW CEHVAW***M F
C2020 1 28 C2032 CEANP***M
VREFL CEANP F
0.1u/10 2 VREFR 27 0.1u/10
AGNDL
3 AGNDR 26
VCOML
(CH3) C2021
0.1u/10 4 VCOMR 25
C2028
VINL+ 0.1u/10
(CH3) 5 VINR+ 24
VINL-
C2022
2700p/50 6 VINR- 23
C2029
2700p/50
FMT0
AGND
7
FMT1 22
1-20
1-20 8
S/M
VCC 21
9
OSR0
OVFL 20 1-26 1-28 1-24
OVFR
10
11
OSR1
RST
19
18
R2032
100
R2035 R2037
13AD_RESET
4:10F;10:13C From MAIN_UCOM D 4/19,10/19
OSR2 24M_CLK_13AD
12 SCKI 17
R2033 22 4:10F;11:2H
13
BYPAS
LRCK/DSDBCK
DGND 16 0
22
R2036
96k_CLK_13AD
4:10F;11:2H
6M_CLK_13AD
14 BCK/DSDL 15 R2034 0
4:10F;11:2H E
VDD
DATA/DSDR
(CH3 D)
100 (CH3 D)
ADAT_CH3_ANA
13:5I
To DSP D 13/19
0.01u/16
V+3R3A V+5A_IN
C2030
1-27 1-29
R2030
R2031
SR
SR
0
GNDD
16V
1000p/50
CCH1998-A
1000p/50
C2019
C2023
C2025
C2026
C2031
C2033
0.1u/10
0.1u/10
10u/16
10u
C2034
1000p/50
GNDA_AD C2035

FMT0 Low
0.01u/16 : Voltage measuring point
FMT1 Low GNDD
OSR0 High
OSR1 Low
OSR2 Low
F
D 6/19
DJM-850-K 121
5 6 7 8
1 2 3 4
10.13 MAIN ASSY (7/19)
A
CH4 ADC V+5A_IN
V+15A_IN D2201
C2205
0.1u/25 1SS302
SR
GNDIN_CH4
R2217
GNDA_AD
2.4k R-
C2213
100p/50
C 2 2 3 6 RN
CH
R2201 STBY
10k NM STBY
RN C2201
NM 2
8 R2213
1 V+5A_IN
IC2201 220
R2221
2.4k
3
RN
10k (1/2) C2218
RN
0.1u/10
V-15A_IN R2209
D 1/19
R2223 R2222
2.4k
RN
1.1k 2
RN 8
1
CH4_R C2209
1:7G STBY
RN
2.4k
B NM R2218 4
3 IC2203
NJM4565MD
V+15A_IN 2.4k (1/2)
C2214
GNDIN_CH4
100p/50
RN STBY
CH
R2224
C2237
2.4k
RN
R2203 STBY
10k
RN C2202 NM STBY
NM 6
R2229
C2217
8 R2214
7
NM
NM
IC2201 220 GNDA_AD
5
10k (2/2)
RN C2210
NM STBY GNDIN_CH4
R2210
1.1k
R+ V+5A_IN
RN
C2206
D2202
0.1u/25
SR
GNDIN_CH4
V-15A_IN 1SS302
GNDA_AD
C
V+5A_IN
V+15A_IN D2203
C2207
0.1u/25 1SS302
SR
GNDIN_CH4
R2219
GNDA_AD
2.4k L- (CH4)
C2215
100p/50
RN
CH
R2205 C2238
STBY
10k
(CH4) RN C2203
6 N M STBY
NM 8 (CH4)
7 R2215
IC2202 220 V+5A_IN

R2225
5
RN
2.4k
10k (2/2)
RN
R2211
V-15A_IN
R2227 R2226
D 1/19
RN
2.4k
1.1k 6
(CH4) 8
D CH4_L C2211
RN 7
1:7G STBY
RN
2.4k
4 IC2203
NM R2220 5
NJM4565MD
V+15A_IN (2/2)
2.4k
C2216
GNDIN_CH4
100p/50
RN
CH
R2228
C2239
RN
R2207 STBY
2.4k
10k GNDA_AD
RN C2204 NM STBY
NM 2 (CH4)
8 R2216
1
IC2202 220
R2208 4 NJM4580MD RN (CH4) (CH4) (C
(CH4) 3
10k (1/2)
RN C2212 (CH4) (C
NM STBY
L+ V+5A_IN
R2212
1.1k D2204
RN
C2208
0.1u/25 1SS302
SR
GNDIN_CH4
V-15A_IN GNDA_AD
D 7/19
122 DJM-850-K
1 2 3 4
5 6 7 8
(CH4)
(CH4 D)
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CH4 ADC NP
CEVW***M
CEVWNP***M
F
F
D
C2224 C2227 +
10u/16 PCM1804DB 10u/16 +
HVAW CEHVAW***M F
C2220 1 28 C2232
VREFL CEANP CEANP***M F
0.1u/10 2 VREFR 27 0.1u/10
AGNDL
3 AGNDR 26
VCOML
(CH4) C2221
0.1u/10 4 VCOMR 25
C2228
0.1u/10
VINL+
(CH4) 5 VINR+ 24
VINL-
C2222
2700p/50 6 VINR- 23
C2229
2700p/50
FMT0
AGND
7
FMT1 22
1-21
1-21 8
S/M
VCC 21
9
OSR0
OVFL 20 1-26 1-28 1-25 D 2/19,5/19,10/19
10 OVFR 19 R2232 24AD_RESET
OSR1
RST R2235 R2237 2:2E;5:10F;10:15C From MAIN_UCOM
11 18 100 24M_CLK_24AD
OSR2
12 SCKI 17
R2233 100 5:10F;11:2I
13
BYPAS
LRCK/DSDBCK
DGND 16 0
100
R2236
96k_CLK_24AD
5:10F;11:2I
6M_CLK_24AD
14 BCK/DSDL 15 R2234 100
5:10F;11:2I E
VDD
DATA/DSDR
(CH4 D)
100 (CH4 D)
ADAT_CH4_ANA
13:5I
To DSP D 13/19
0.01u/16
V+3R3A V+5A_IN
C2230
1-27 1-29
R2230
R2231
SR
SR
0
GNDD
16V
CCH1998-A
1000p/50
1000p/50
C2219
C2223
C2225
C2226
C2231
C2233
0.1u/10
0.1u/10
10u/16
10u
C2234
1000p/50
C2235
GNDA_AD
FMT0 Low
0.01u/16
FMT1 Low GNDD
OSR0 High
OSR1 Low
OSR2 Low
F
D 7/19
DJM-850-K 123
5 6 7 8
1 2 3 4
10.14 MAIN ASSY (8/19)
A MIC/RET ADC
1-42
D 1/19 RET_R
1:7G
C2402
10u/50
From BOAD IF C2401 (RET A) 1-42
RET_L
1:7G 10u/50
RETURN_ADC
RB706F-40
RB706F-40
D2403
D2404
R2413
IC2402 1 8
1 16 2 7
V+5A_IN AINR CKS0
2 15
B AINL CKS2
3 6 1-43
(RET A) 3 14 4 5
V+3R3D CKS1 DIF
4 13 GNDD R 2 4 2 3 HP-
R2426 VCOM PDN
10k
SR
R2417 100
1:6C
0
5 12 6M_
R2408
AGND SCLK
R2418 R2424 1:6C
0
6 11 0
24M
VA MCLK 1:6C
7 10 R2419 22 22
96k_
VD LRCK
0 1:6C
DCH1201-A
DCH1201-A
DCH1201-A
8 9 R2420
10V
10V
10V
DGND SDTO ADA
0.1u/10
C2411
C2413
C2410
C2412
R2410
C2415
C2416
0.1u/10
0.1u/10
100 (RET D) 13:5
10k
0.01u/16
C2424
1-45 1-46 1-44 1-47
10u
AK5358AET
10u
10u
C2422
STBY 1000p/50
C2420
R2411
C2421
NM
SQ
GNDA_AD GNDD
0
0.01u/16
GNDD
C
GNDIN_RET
(MIC1 A)
1-34
(MIC1 A)
D 1/19 MIC1
1:7H
C2404
10u/50
From BOAD IF (MIC2 A)
1-35 (MIC2 A)
C2403
MIC2
D 1:7H
10u/50
MIC_ADC
1SS302
1SS302
D2401
D2402
IC2401 R2412
AK5358AET 1 8
1 16 2 7
AINR CKS0
2 15
V+5A_IN AINL CKS2
3 6 1-36
3 14 4 5
V+3R3D CKS1 DIF
4 13 GNDD R 2 4 2 2 HP-M
R2405
10k
VCOM PDN
SR
R2414 100 1:6C

0
5 12 6M_
R2409
AGND SCLK
SR
R2416 0 R2425 1:6C

0
6 11 24M
VA MCLK
R2415 22 22 1:6C
7 10 96k_
VD LRCK
0 1:6C
DCH1201-A
DCH1201-A
DCH1201-A
8 9 R2421
ADA
10u 10V
10u 10V
10u 10V
DGND SDTO
C2414
C2417
C2406
R2406
C2408
C2407
13:5
0.1u/10
0.1u/10
0.1u/10
C2405
E (MIC D) 100 (MIC D)

10k
0.01u/16
C2423
1-38 1-39 1-37 1-40

C2418
STBY 1000p/50
C2409
R2407
C2419
NM
SQ
GNDA_AD GNDD
0
0.01u/16
GNDD
GNDIN_MIC
D 8/19
124 DJM-850-K
1 2 3 4
5 6 7 8
B
HP-MIC-RE_RESET
1:6C;11C;10:15C From MAIN_UCOM D 1/19,10/19
6M_CLK_HP-MIC-RE
R2424 1:6C;11C;11:2L
22
24M_CLK_HP-MIC-RE
1:6C;11C;11:2L From FPGA D 1/19,11/19
96k_CLK_HP-MIC-RE
1:6C;11C;11:2L
ADAT_RETURN_ANA
13:5H
To DSP D 13/19
(RET D)
C
(RET A)
(RET D)
: RETURN Digital Signal
(MIC1 A)
: MIC1 Audio Signal
(MIC2 A)
: MIC2 Audio Signal
(MIC D)
: MIC Digital Signal
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J D
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
HP-MIC-RE_RESET
1:6C;5C;10:15C From MAIN_UCOM D 1/19,10/19 SR CKSRYB***K F
6M_CLK_HP-MIC-RE
R2425 1:6C;5C;11:2L SQ CKSQYB***K F
22
24M_CLK_HP-MIC-RE
1:6C;5C;11:2L From FPGA D 1/19,11/19 CH CCSSCH***J F
96k_CLK_HP-MIC-RE CCSSCH***D
1:6C;5C;11:2L CH (D) F
ADAT_MIC_ANA
13:5H To DSP D 13/19 SRCH CCSRCH***J F
(MIC D)
SQCH CCSQCH***J F
E
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F

D 8/19
DJM-850-K 125
5 6 7 8
1 2 3 4
10.15 MAIN ASSY (9/19)
USB_UCOM USB UCOM

A V+1R2D Silk print Aside
V+1R2D_USB [V+1R2D_USB]
IC2603
1-14
R2601
ADSP-BF525BBCZ-5A
SQ
F2601
0
DTL1106-A
1 3 G12 A1
VDDINT1 VSS1
G13 A17
VDDINT2 VSS2
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
2
470p/50
0.1u/10
G14 A20
VDDINT3 VSS3
STBY R2630
DCH1201-A
H14 B20 USB_ADRS[1] W20
10u 10V
VDDINT4 VSS4 ADDR1
C2602
C2669
C2606
0.1u/10
J14 H9 USB_ADRS[2] 4 5 W19
NM
VDDINT5 VSS5 ADDR2
3 6
C2608
C2610
C2615
C2617
C2621
C2623
C2625
C2627
C2629
C2634
K14 H10 USB_ADRS[3] Y19
VDDINT6 VSS6 ADDR3
L14 H11 USB_ADRS[4] 2 7 W18
VDDINT7 VSS7 R2627 1 ADDR4
M14 H12 USB_ADRS[5] 8 Y18
1 8 82
VDDINT8 VSS8 ADDR5
N14 H13 USB_ADRS[6] 2 7 W17
VDDINT9 VSS9 ADDR6
J9 USB_ADRS[7] 3 6 Y17
GNDD VSS10 ADDR7
P12 J10 USB_ADRS[8] 4 5 W16
V+3R3D V+3R3D_USB
1-13 P13
VDDINT10
VDDINT11
VSS11
VSS12
J11 82
R2631
Y16
ADDR8
ADDR9
P14 J12 USB_ADRS[9] 1 8 W15
VDDINT12 VSS13 ADDR10
R2604 R2606 F19 J13 USB_ADRS[10] Y15
2 7
VRSEL VDDINT SEL VSS14 ADDR11
0 0 G7 K9 USB_ADRS[12] 3 6 W14
SQ VDDEXT1 VSS15 ADDR12
SR
470p/50
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
G8 K10 4 5 Y14
VDDEXT2 VSS16 ADDR13
C2601
0.1u/10
DCH1201-A
G9 K11 82 W13
10V

100u/16
C2603
C2605
G10 K12 R2632 Y13

Power Suply
C2607
C2609
C2616
C2620
C2622
C2624
C2626
C2628
C2632
C2637
C2639
C2643
C2647
10u
G11 K13 4 5 W12

VDDEXT5 USB_ADRS[18] GNDD
B H7
VDDEXT6
VSS19
VSS20
L9
USB_ADRS[19] 3 6 Y12
ADDR16
ADDR17
H8 L10 2 7 W11
J7 L11 1 8 Y11
V+3R3D_USB_MEM VDDEXT8 VSS22 82 ADDR19
J8 L12 USB_S_CLK R2633 68 K20
VDDEXT9 VSS23 CLKOUT
R2607 R2628
K7 L13 USB_S_CKE P20
VDDEXT10 VSS24 SCKE
0 K8 M9 USB_S_MS 4 5 R19
SR VDDEXT11 VSS25 SMS
3
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
L7 M10 USB_S_WE 6 T19
VDDEXT12 VSS26 SRAS
2 7
DCH1201-A
M11 USB_S_RAS U20

10V
VSS27 SCAS
C2614
L8 M12 1 8 T20
VDDMEM1 VSS28 82 SWE
R2629
C2633
C2638
C2640
C2644
C2648
10u
M7 M13 V19
VDDMEM2 VSS29 USB_S_CAS ABE0/SDQM0
M8 N9 4 5 V20
VDDMEM3 VSS30 USB_S_SA10 ABE1/SDQM1
N7 N10 3 6 U19
VDDMEM4 VSS31 USB_S_ABE[1] SA10
N8 N11 2 7
V+3R3D_USB_IF VDDMEM5 VSS32 USB_S_ABE[0]
P7 N12 1 8
VDDMEM6 VSS33 82
R2608 P8 N13
VDDMEM7 VSS34
CH
CH
CH
0 P9 Y1
SR VDDMEM8 VSS35
C2636 1000p/50
100p/50
100p/50
P10 Y20
VDDMEM9 VSS36
P11
VDDMEM10
C2630
0.1u/10
C2641
C2645
GNDD D19
VDDUSB1 GNDD
G20
VDDUSB2
1-15 V+2R5D V+2R5D_USB_PLL

A16
VDDRTC
C
R2611 R20
VDDOTP
STBY
DCH1201-A
0 L19
1 0 u 10V
C2613
VPPOTP
C2619
C2635
C2642
0.1u/10
0.1u/10
NM
GNDD
V+3R3D
IC2601
1 VCC 5
C2611 Oscillator
96K_CLK_USB
11:2C
R2602
0
2
3 4 R2609
0.1u/10
GNDD 24MHz 1-17

GND
D 11/19 GNDD
TC7SH08FUS1
V+3R3D
22
STBY R2614
NM
From FPGA
R2624
USB UCOM
1k
X2601
IC2602 4 X2 3
GND2
1 C2612
VCC 5
6M_CLK_USB R2603 2 0.1u/10 1 2
GND1
X1
11:2C 0 R2610
IC2603
R2626
3 4 GNDD
C2618
C2631
12p/50
10p/50
GND DSS1203-A
22
CH
CH
D GNDD
22 24MHz
ADSP-BF525BBCZ-5A
TC7SH08FUS1
D 13/19 A11
Clock
(CH1 U OUT) CLKIN

RTC
ADAT_USB1OUT A10 A14 R2636

13:14I GNDD XTAL
(CH2 U OUT) RTXI
From DSP ADAT_USB2OUT
13:14I
C19
CLKBUF RTXO
A15 10k
(USB Audio out signal) ADAT_USB3OUT

(CH3 U OUT) F1
PF0/PPI_D0/DR0PRI_/ND_D0A PH0/ND_D0/HOST_D0
A7
GNDD
13:14I (CH4 U OUT) E1 B7
ADAT_USB4OUT PF1/PPI_D1/RFS0/ND_D1A PH1/ND_D1/HOST_D1
13:14I E2 A8
(CH1 U/D IN) PF2/PPI_D2/RSCLK0/ND_D2A PH2/ND_D2/HOST_D2
ADAT_USBIN1 (CH2 U/D IN) R2616 100 D1 B8
PF3/PPI_D3/DT0PRI/ND_D3A PH3/ND_D3/HOST_D3
To DSP 13:5I
ADAT_USBIN2
(CH3 U/D IN) R 2 6 1 7 100 D2
PF4/PPI_D4/TFS0/ND_D4A/TACLK0 PH4/ND_D4/HOST_D4
A9
(USB Audio input signal) 13:5I

ADAT_USBIN3
R2618 100 C1
PF5/PPI_D5/TSCLK0/ND_D5A/TACLK1 PH5/ND_D5/HOST_D5
B9
13:5I R2619 100 C2 B10
D 13/19
Port H
Port F
ADAT_USBIN4 PF6/PPI_D6/DT0SEC/ND_D6A/TACI0 PH6/ND_D6/HOST_D6

13:5I STBY (CH4 U/D IN) B1 B11
PF7/PPI_D7/DR0SEC/ND_D7A/TACI1 PH7/ND_D7/HOST_D7
5
B2 A12
R2667
PF8/PPI_D8/DR1PRI PH8/xSPISEL4/HOST_D8/TACLK2
NM
A2 B12
PF9/PPI_D9/RSCLK1/xSPISEL6 PH9/xSPISEL5/HOST_D9/TACLK3
4
2
1
B3 A13
V+3R3D_USB PF10/PPI_D10/RFS1/xSPISEL7 PH10/xND_CE/HOST_D10
A3 B13
PF11/PPI_D11/TFS1/CZM PH11/xND_WE/HOST_D11
debug
B5 B14
PF12/PPI_D12/DT1PRI/xSPISEL2/CDG PH12/xND_RE/HOST_D12
STBY A5 B15
GNDD PF13/PPI_D13/TSCLK1/xSPISEL3/CUD PH13/xND_BUSY/HOST_D13
R2612
R2613
D 10/19 B6 B16
NM
10k
PF14/PPI_D14/DT1SEC/UART1TX PH14/ND_CLE/HOST_D14
A6 B17
PF15/PPI_D15/DR1SEC/UART1RX/TACI3 PH15/ND_ALE/HOST_D15
10:14G R2620
To MAIN_UCOM HWAIT
R2
PG0/HWAIT PPI_FS1/TMR0
F2
Port J
47 P1 G2
PG1/xSPISS/xSPISEL1 PPI_CLK/TMRCLK
E USB_SCK P2 A4
From To FPGA 11:12L

USB_MISO
R2621 N1
PG2/SCK
PG3/MISO/DR0SECA
SCL
SDA
B4
D 11/19
11:12L 22 N2 V2
USB_MOSI PG4/MOSI/DT0SECA TCK
11:12L M1 T1
R2605
PG5/TMR1/PPI_FS2 TDO
10k
JTAG
M2 R1
PG6/DT0PRIA/TMR2/PPI_FS3 TDI
D 10/19
Port G
L1 U2
PG7/TMR3/DR0PRIA/UART0TX TMS
MIDI_TXD_USB GNDD L2 U1
10:11A PG8/TMR4/RFS0A/UART0RX/TACI4 TRST
From MAIN_UCOM USB_ERR_MAIN
10:14F
R2622
22
K1
K2
PG9/TMR5/RSCLK0A/TACI5 EMU
T2
J20
PG10/TMR6/TSCLK0A/TACI6 EXT_WAKE0
Regulation
J1
PG11/TMR7/xHOST_WR
Voltage
R2623 J2 H20
USB_SI
10:14F PG12/DMAR1/UART1TXA/HOST_ACK VROUT
22
I/F
USB_SO H1
PG13/DMAR0/UART1RXA/HOST_ADDR/TACI2
D 10/19 10:14F
USB_REQ
10:14F
USB_RCV
R2615
22
H2
G1
PG14/TSCLK0A1/xHOST_RD
PG15/TFS0A/HOST_CE
SS
G19 R2635
10k
GNDD
From To MAIN_UCOM 10:14F V+3R3D_USB
BMODE0
Y10
R2625 B19 W10

NMI BMODE1
R2669 10k B18 Y9
USB_RESET
RESET Mode Control BMODE2
10:14F 100 W9
BMODE3
0.01u/16
1-16
C2646
8
7
6
5
R2634
V+3R3D_
10k
BMODE3-0 : 0100
Boot from SPI host device
2
3
4
1
GNDD
F
GNDD
D 9/19
126 DJM-850-K
1 2 3 4
5 6 7 8
USB UCOM
IC2603 SDRAM 64M

ADSP-BF525BBCZ-5A V+3R3D_USB_MEM
R2630 R2642
W20 Y8 1 8 USB_DATA[0]
ADDR1 DATA0
5 W19 W8 2 7 USB_DATA[1] IC2604
ADDR2 DATA1
6 Y19 Y7 1 54
3 6 USB_DATA[2] C2653
ADDR3 DATA2 R2647 0.01u/16 R2664
7 VDD1 VSS3 53
W18 W7 4 5 USB_DATA[3] USB_DATA[0] 1 8 2 1 8 USB_DATA[15]
ADDR4 DATA3 R2644 DQ0 DQ15
8 Y18 Y6 3 52
82 68 1 8 USB_DATA[4] USB_DATA[1] 2 7 C2654 2 7 USB_DATA[14]
ADDR5 DATA4 0.01u/16 V D D Q 1 VSSQ4
W17 W6 2 7 USB_DATA[5] USB_DATA[2] 3 6 4 51 3 6 USB_DATA[13]
Data Bus
ADDR6 DATA5 DQ1 DQ14
Y17 Y5 5 50
Address Bus
3 6 USB_DATA[6] USB_DATA[3] 4 5 4 5 USB_DATA[12]
W16 W5 4 5 USB_DATA[7] 47 6 49 C2661 47
ADDR8 DATA7 R2643 VSSQ1 VDDQ4 0.01u/16
Y16 Y4 1 8 68 USB_DATA[8] 7 48
R2631 ADDR9 DATA8 R2648 DQ3 DQ12 R2665
8 W15 W4 2 7 USB_DATA[9] USB_DATA[4] 1 8 8 47 1 8 USB_DATA[11]
7 Y15 Y3 3 6 USB_DATA[10] USB_DATA[5] 2 7 C2655 9 46 2 7 USB_DATA[10]
ADDR11 DATA10 0.01u/16 VDDQ2 VSSQ3
6 W14 W3 4 5 USB_DATA[11] USB_DATA[6] 3 6 10 45 3 6 USB_DATA[9]
ADDR12 DATA11 R2645 DQ5 DQ10
5 Y14 Y2 68 1 8 USB_DATA[12] USB_DATA[7] 4 5 11 44 4 5 USB_DATA[ 8]
82 W13 W2 2 7 USB_DATA[13] 47 12 43 C2662 47
ADDR14 DATA13 VSSQ2 VDDQ3 0.01u/16
Y13 W1 3 6 USB_DATA[14] 13 42
W12 V1 4 5 USB_DATA[15] C2656 14 41
GNDD ADDR16 DATA15 VDD2 VSS2
Y12
ADDR17
68 USB_S_ABE[0]
R2651
0.01u/16
R2652
15
LDQM NC2
40 B
W11 47 16 39 R2662
USB_S_WE 1 8 USB_S_ABE[1]
ADDR18 WE UDQM
Y11 USB_S_CAS 2 7 17 38 47 USB_S_CLK
ADDR19 CAS CLK
68 K20 J19 18 37 R2663
USB_S_RAS 3 6 USB_S_CKE
CLKOUT AMS0 RAS CKE
SDRAM Controller
P20 K19 USB_S_MS 4 5 19 36 47

SCKE AMS1 R2650 CS NC1 R2660
5 R19 M19 20 35
USB_ADRS[18] 1 8 47 1 8 USB_ADRS[12]
SMS AMS2 BA0 A11
AMC
6 T19 L20 21 34
USB_ADRS[19] 2 7 2 7 USB_ADRS[10]
SRAS AMS3 BA1 A9
7 U20 N19 22 33
USB_S_SA10 3 6 3 6 USB_ADRS[9]
SCAS AWE A10/AP A8
8 T20 M20 23 32
82 USB_ADRS[1] 4 5 4 5 USB_ADRS[8]
SWE ARE R2649 A0 A7 R2666
R2629 V19 N20 24 31
USB_ADRS[2] 1 8 47 47 1 8 USB_ADRS[7]
ABE0/SDQM0 AOE A1 A6
5 V20 P19 USB_ADRS[3] 2 7 25 30 2 7 USB_ADRS[6]
ABE1/SDQM1 ARDY A2 A5
6 U19 USB_ADRS[4] 3 6 26 29 3 6 USB_ADRS[5]
SA10 A3 A4
7 4 5 C2657 27 28 4 5
VDD3 VSS1
8 47 0.01u/16 47
82 M12L64164A-5TG2M
GNDD GNDD
GNDD
C
V+5VBUS
R2657
0
SR
V+5D
IC2605
5 VCC 1
R2670
R2661
0
2
R2656 4 3 NM
GND
NM
USB UCOM NM
C2666
C2667
C2668
C2650
C2651
C2652
C2658
C2659
C2663
R2659
NM
NM
NM
NM
NM
NM
NM
NM
NM
NM
IC2603 CN2602
ADSP-BF525BBCZ-5A 14 1 GND_USB
F
GNDD
A19 E19 2 GND_USB
USB_XI USB_VBUS
A18 3 D-USB
USB_XO USB_D+ L2601
4 3
E20 4 D+USB
D20
USB_RSET
UDB2.0 HS OTG
USB_DP
USB_DM
F20 USB_D- 1 2 5 V+5VBUS CN3801 D
STBY ATH7015-A STBY
AKM1276-A
1000p/50
0.01u/16
C2671
C2670
D2601
C2664
C2665
H19 C20
1-92
NM
NM
NM
USB_VREF USB_ID
A14 R2636
1-91
C2649
0.1u/10
RTXI
RTXO
A15 10k
STBY 1-93 R2668
A7 0
R2646
HOST_D0 GNDD SQ
NM
B7 GNDD USB_ID use OTG GNDD GNDD GND_USB

HOST_D1
A8
not use then open V+3R3D_USB
HOST_D2 USB_RSET,USB_VREF use test mode
B8
HOST_D3 not use then
HOST_D4
A9
USB_RSET opnen
HOST_D5
B9
USB_VREF 0.1uF(GND)
B10
HOST_D6
B11
HOST_D7
A12
8/TACLK2
B12
9/TACLK3
A13
OST_D10
B13 (CH1 U/D IN)
OST_D11
: CH1 USB/DIGITAL Input Signal NOTES
debug
B14
OST_D12
B15 (CH2 U/D IN) NM is STBY
OST_D13
OST_D14
B16 STBY : CH2 USB/DIGITAL Input Signal (D)
RS1/16SS***J
RS1/16SS****D
B17
OST_D15 V+3R3D_USB (CH3 U/D IN) SR RS1/10SR***J
S1/TMR0
F2
G2
: CH3 USB/DIGITAL Input Signal SR (D) RS1/10SR****D
K/TMRCLK (CH4 U/D IN)
A4
SQ RS1/8SQ***J
E
: CH4 USB/DIGITAL Input Signal
R2638
R2637
R2639
R2640
SCL
NM
NM
NM
NM
B4
SA RS1/4SA***J
SDA
V2 JTAG (CH1 U OUT) RN RN1/16SE****D
TCK
T1
V+3R3D_USB
CN2601
: CH1 USB Output Signal
TDO (CH2 U OUT)
R1 NM
TDI
TMS
U2
1 V+3R3D
: CH2 USB Output Signal RAB4CQ***J
U1 (CH3 U OUT)
TRST
EMU
T2
2
3
V+3R3D
BF_EMU
: CH3 USB Output Signal CKSSYB***K
CKSRYB***K
F
J20 (CH4 U OUT) SR F

BF_TMS
T_WAKE0 4
: CH4 USB Output Signal SQ CKSQYB***K F
R2641
5 BF_TCK
4.7k
CH CCSSCH***J F
H20
VROUT 6 BF_TRST CCSSCH***D
CH (D) F
7 BF_TDI CCSRCH***J
G19 R2635 SRCH F
GNDD
SS 8 BF_TDO CCSQCH***J
10k SQCH F
9 GNDD CFHXSQ***J
GNDD CFHXSQ F
Y10
BMODE0 10 GNDD +
CEVW***M F
W10
BMODE1 CEVWNP***M
Y9
NP F
GNDD +
BMODE2 CEHVW***M
W9
HVW F
BMODE3
: Voltage measuring point HVAW
+
CEHVAW***M F
CEANP CEANP***M F
8

R2634
V+3R3D_USB
10k
2
4
1
F
GNDD
D 9/19
DJM-850-K 127
5 6 7 8
1 2 3 4
10.16 MAIN ASSY (10/19)
MAIN_UCOM R2831
A
0
V+3R3D
R2807
C2812
0.1u/10
10k
IC2802
High LED
1 CS# 8
VCC
Low LED
R2806 2 SO/SIO1 7 GNDD
22 HOLD#
3 WP# 6
SCLK
4 GND 5
SI/SIO0
DYW1807- /J
MX25L4006EM2I-12G-K
GNDD FOR USB UCOM
D 1/19
From BOARD_IF EFX_ON/OFF
1:4B
V+3R3D
R2823
22
V+3R3D
V+3R3E_M
R2879
10k
R2822
10k
R2825
R2817
R2828
22
10k
10k
GNDD
D 11/19
DSP_USB_WP
11:13J
DSP_USB_CS
11:13J
R2878
100
100
DSP_USB_SO
From To FPGA
22
22
STBY
11:13J
DSP_USB_SI
R2819
R2820
R2821
11:13J
22
DSP_USB_CLK
R2829
C
R2826
11:13K
NM
C2814
R2830
1000p/50
22
V+3R3D C2815
1000p/50
D 1/19
R2802
10k
80
79
78
77
76
75
74
73
72
71
From BOARD_IF RETURN_IN
1:7G
STBY DBG_PORT1
81
C2803
NM
82
DBG_PORT0 P120/INTP0/EXLVI
P142/xSCK20/SCL2
P140/PCLBUZ0/INTP6
P141/PCLBUZ1/INTP7
R2812 22 83 P47/INTP2
P46/INTP1/TI05/TO05
R2813 22 84
P45/SO01
V+3R3E_M
CN2801 GNDD 85
P44/SI01
VKN1933-A R2814 22 86
P43/xSCK01
R2810 10k 87
V+3R3D 1 P42/TI04/TO04
debugger
88
RESET_OUT 2 P41/TOOL1
89
RESET_IN 3 P40/TOOL0
R2811 10k
R2872 C2813 90
RxD 4 xRESET
100 91
FLMDO 5 P124/XT2
0.01u/16
92
CLK_IN 6 P123/XT1
FLMD0
L
93
GNDD 7 P122/X2/EXCLK
P121/X1
94
V+3R3E_M REGC
P31/TI03/TO03/INTP4
VSS
95
GNDD EVSS0
D C2809 96
VDD
R2801
EVDD0
1-3
47k
/
Oscillator 1u/10 97
R2803 R2805 SR 98
P60/SCL0
/
P65/xWR0
P66/xWR1
P61/SDA0
P67/ASTB
C2810
P64/xRD
470k NM
RESET IC 1-4 V+3R3E V+3R3E_M
0.1u/10 99
R2804
/
IC2801 100
P62
P63
X1
0
V+3R3E_M GND1
1 5 2 1 R2808 C2811
OUT CD
10
2 0 0.1u/10
0.01u/16
C2802
DCH1201-A
VDD
X2 GND2 STBY
1 0 u 10V
3 4 3 4
C2801
C2808
1u/10
C2806
C2807
VSS NC X2801
NM
NM
SR
CH ( D )
C2804
C2805
CH ( D )
6p/50
6p/50
20MHz
CSS1795-A
S-80927CNMC-G8X
D 11/19
GNDD
GNDD
8
7
6
5
FPGA_XINIT GNDD
R2827
11:13K V+3R3E_M
From FPGA
20MHz MAIN
0
FPGA_DONE
11:13K;15:7B
2
3
4
1
R2816
10k
GNDD
From BOARD_IF POWER_RESET_A
1:9B MCPU_ASTB
D 1/19
1
4
3
2
MCPU_WR0
R2824
MCPU_RD
22
V+3R3D
5
6
7
8
R2818
E 5 4
6 3
7 2
8 1
2.2k
LINE_SEL1
LINE_SEL2
LINE_SEL3
LINE_SEL4
opend Drain
Digi Tr drive , pull up
STBY
V+3R3D
R2809
NM
D2801
NM
V+3R3E
Q2801
NM
D 2/19 Q2804
LTA124EUB
GNDD
F To POWER_IF RELAY_CONT
2:3B
Q2803
LTC124EUB
R2873
10k
D 15/19
D 10/19 To OUTPUT IF CPU_MUTE
15:2F
GNDD
128 DJM-850-K
1 2 3 4
5 6 7 8
D 1/19
STBY_KEY
1:4B
To BOARD_IF
R2831
0
MIDI_TXD
1:7H
MIDI_TXD_USB
9:2J
To USB_UCOM D 9/19 D 10/19 MAIN ASSY (DWX3360) A
SUB_INT
1:4D D 1/19
From BOARD_IF
FPGA_XPGM
D 11/19
11:2B
FPGA_RESET To FPGA
11:13K
STBY_LED
To BOARD_IF
Q2802
LTC124EUB
1:4B
D 1/19
High LED ON
Low LED OFF
GNDD
D 14/19
DIT_RESET
14:2C
DOUT_SRC_RESET To DIGITAL OUT
14:2D
To DSP
DSP_RESET
13:3C
D 13/19
V+3R3D
VR_FADER1
1:4E C2833
VR_FADER2
1:4E
0.1u/10
VR_FADER_CRS
1:4E
VR_TRIM1
1:4D
D 1/19 1-30 IC2804
VR_FADER3
From BOARD_IF B
1:4D
VR_TRIM2
1:4D
VR_TRIM3
D 4/19,6/19 1
2
14
13 D 2/19,5/19,7/19
1:4D
VR_FADER4 To CH1 ADC 13AD_RESET
R2876 3 12
1:4D
VR_TRIM4 CH3 ADC 4:10F;6:10F 100 4 11 R2874
24AD_RESET To CH2 ADC
1:4D 2:2E;5:10F;7:10F
5 10 100 CH4 ADC
R2877 6 9
To OUTPUT IF
330
DA_RESET
8
7
6
5
330
100
560
330
560
560
330
560
To MIC/RET ADC
R2871
15:2C;19:2C 100 7 8 R2875

HP-MIC-RE_RESET
22
V+3R3D
D 15/19,19/19
1:6C;8:11C;8:5C
100
BOARD_IF
2
3
4
1
R2844
R2846
R2847
R2848
R2849
R2851
R2852
R2853
R2854
C2819 470p/50 TC74VHC08FK

R2823
D 1/19,8/19
GNDD
22
C2820 470p/50
1-55 1-41
V+3R3D
V+3R3E_M
C2821 470p/50
R2879
10k
C2822 470p/50
C2823 470p/50
R2822
10k
C2824 470p/50
R2825
R2817
C2825 470p/50
R2828
22
10k
10k
GNDD
C2826 470p/50
C2827 470p/50
R2843 V+3R3D_REFA V+3R3D_REFA_0

R2878
4 5 L2801
100
100
22
22
STBY
3 6 LCTAW330J2520
33u
R2819
R2820
R2821
C2831
C2832
0.1u/10
2 7
DBG_PORT2
NM
22
R2829
R2834
R2862
STBY C
R2826
22
1 8
0
NM
814 10k
R2830
R2832
p/50 GNDD
22
22
815 R2870
0
p/50
GNDREF_A
R2842
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
10k R2865
D 2/19
AVSS
81 50 10k
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
P150/ANI8
P151/ANI9
P152/ANI10
P153/ANI11
P154/ANI12
P155/ANI13
P156/ANI14
P157/ANI15
49 GNDD VDET
82
P120/INTP0/EXLVI
2:11B From POWER_IF
P130
P01/TO00
P04/xSCK10/SCL1
P20/ANI0
P21/ANI1
P22/ANI2
P02/SO10/TxD1
P142/xSCK20/SCL2
P144/SO20/TxD2
P140/PCLBUZ0/INTP6
P141/PCLBUZ1/INTP7
D 9/19
P47/INTP2 48
P00/TI00
83
P145/TI07/TO07
P131/TI06/TO06
P03/SI10/RxD1/SDA1
P143/SI20/RxD2/SDA2
USB_ERR_MAIN
84
P46/INTP1/TI05/TO05
47 R2861 9:2J From USB_UCOM
P45/SO01
46 0 R2866
85 FPGA_SCK
To FPGA
86
87
P44/SI01
P43/xSCK01
AVREF0
P111/ANO1
P110/ANO0
AVREF1
45
44
R2841
R2867
22
22
11:13K
USB_RESET
9:2K
FPGA_SO
To USB_UCOM D 11/19
To FPGA
D 9/19
P42/TI04/TO04 P10/EX24/xSCK00
P11/EX25/Si00/RxD0 22 11:13K
43 R2868
88
89
P41/TOOL1
IC2803 P12/EX26/SO00/TxD0
P13/EX27/TxD3 42 22
USB_SO
9:2J
USB_SI
90
P40/TOOL0
xRESET
DYW1806- /J P14/EX28/RxD3
P15/EX29/RTCDIV/RTCCL
41 R2869 9:2J
USB_RCV
9:2J From To USB_UCOM D 11/19
91 40 22
USB_REQ
UCOM UPD78F1167AGF-GAS-K
D 9/19
P124/XT2 P16/EX30/TI01/TO01/INTP5
39
9:2J
92 HWAIT
P123/XT1
FLMD0
Label VRW1773- P17/EX31/TI02/TO02
9:2I
93 38
P30/INTP3/RTC1HZ
P122/X2/EXCLK P57/EX15
94
P121/X1
REGC MAIN_UCOM P56/EX14
37
P77/EX23/KR7/INTP11
P76/EX22/KR6/INTP10
P31/TI03/TO03/INTP4
VSS
P75/EX21/KR5/INTP9
P74/EX20/KR4/INTP8
95 36
EVSS0 P55/EX13
96
VDD
EVDD0 P54/EX12
35 D
P84/EX4
P85/EX5
P86/EX6
P87/EX7
34
P73/EX19/KR3
P72/EX18/KR2
P71/EX17/KR1
P70/EX16/KR0
97
EVDD1
P05/CLKOUT
P53/EX11
33
P06/xWAIT
98
P60/SCL0
P65/xWR0
P66/xWR1
P61/SDA0
P67/ASTB
P52/EX10
P64/xRD
P80/EX0
P81/EX1
P82/EX2
P83/EX3
99 P51/EX9 32
EVSS1
P50/EX8
100 31
P62
P63
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
C2829
8
7
6
5
8
7
6
5
8
7
6
8
7
6
5
0.1u/10
R2835
R2845
R2863
R2864
1000p/50
22
C2817
0
8
7
6
5
R2827
GNDD
R3E_M
2
3
4
2
3
2
3
4
2
3
4
1
1
0
8
7
6
5
R2856
NOTES
R2850
10k
2
3
4
1
NM is STBY
10k
2
3
4
1
RS1/16SS***J
GNDD
MCPU_DATA[10]
MCPU_DATA[11]
MCPU_DATA[12]
MCPU_DATA[13]
MCPU_DATA[14]
MCPU_DATA[15]
MCPU_DATA[0]
MCPU_DATA[1]
MCPU_DATA[2]
MCPU_DATA[3]
MCPU_DATA[4]
MCPU_DATA[5]
MCPU_DATA[6]
MCPU_DATA[7]
MCPU_DATA[8]
MCPU_DATA[9]
(D) RS1/16SS****D
R2839
MCPU_ASTB
1
4
3
2
MCPU_WR0
SR RS1/10SR***J
R2824
R2833
22
MCPU_RD
22
22
D 11/19
5
6
7
8
SQ RS1/8SQ***J
SA RS1/4SA***J
MCPU_BUS
From To FPGA RN RN1/16SE****D
4 11:2B
E
R2855
22
3
2 STBY
RAB4CQ***J
C2830
1
NM
LINE_SEL1
LINE_SEL2
LINE_SEL3
LINE_SEL4
CKSSYB***K F
GNDD D 1/19 SR
SQ
CKSRYB***K
CKSQYB***K
F
F
opend Drain
CH_SELECT
1:7G
To BOARD_IF CH CCSSCH***J F
Digi Tr drive , pull up CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
3R3D CFHXSQ***J
CFHXSQ F
+
CEVW***M F
NM
NP CEVWNP***M F
+
HVW CEHVW***M F
D2801
NM
SUB_CPU_RESET
D 1/19 HVAW
+
CEHVAW***M
CEANP***M
F
1:4D
To BOARD_IF : Voltage measuring point CEANP F
SUB_CTRL
NDD
1:4D
V+1R2D_CONT
3:9B
V+3R3D_CONT
D 3/19 F
3:9C
V+5D_CONT To POWER
3:9E
V+34D_CONT
3:2H
1-71 D 10/19
DJM-850-K 129
5 6 7 8
1 2 3 4
10.17 MAIN ASSY (11/19)

Silk print Aside Silk print
[V+3R3D_FPGA]
V+3R3D V+3R3D_FPGA
1-5 V+1R2D V+1R2D_FPGA
1-6 [V+1R2D
FPGA R3037
SQ
1
F3001
DTL1106-A
3
CCH1565-A
DCH1201-A
DCH1201-A
A
1 0 0 u 16V
0
10u 10V
10u 10V
C3019
C3020
C3021
C3022
C3024
C3026
C3028
C3030
C3032
C3034
C3035
C3036
C3037
C3038
C3040
C3042
100u/16
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
2
GNDD GNDD
C3039
C3041
C3023
C3025
C3027
C3029
C3031
C3033
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
0.1u/10
STBY
R3065 R3067
D 10/19 NM 0
GNDD
From To MAIN_CPU MCPU_BUS
GNDD
10:14I
MCPU_RD
D 10/19 FPGA_XPGM
R3016
From MAIN_UCOM 10:12B 0
96K_CLK_DSP
D 13/19 To DSP_2
R3008
13:3G 100
6M_CLK_DSP R3009
13:3G 100
D 9/19,14/19 24M_CLK_DIGI
14:2F
6M_CLK_USB
Silk print Aside[24M_CLK_DIGI]
R3019
R3020
0
To DIGITAL_IN_1 9:2G
Silk print Aside[6M_CLK_DIGI]
100
R3021
DIGITAL_OUT 96K_CLK_USB
9:2F 100
B Silk print Aside[96k_CLK_DIGI]
STBY
6M_CLK_DIGI R3099
FPGA
XC3S50A-4FTG256C IC3007
D 14/19 14:2G
96K_CLK_DIGI
R3100
NM
R3034 100
0
14:2G NM
R3035 100
R3102
R3101
GNDD
A1
A2
A3
A4
A5
A6
D 14/19
TMS
R3011
SRC_SCK TDI
14:2F
B1
B2
B3
B4
B5
B6
0
R3036 100
To DIGITAL OUT SRC_TXD R3024
SRC SPI 14:2E

SRC_CS
R3025 0
14:2E 0
D 14/19
C1
C2
C3
C4
C5
C6
R3038
DIT_TXD 8 1
14:2B
DIT_SCK 7 2
To DIGITAL OUT 14:2B 6 3
DIT CONTROL SPI DIT_CS 5 4
D1
D2
D3
D4
D5
D6
14:2B 22
C
MCPU_WR0
D 14/19 GNDD
E1
E2
E3
E4
E5
E6
DOUT_SRC_BCK
14:2C
From DIGTAL OUT DOUT_SRC_DATA
14:2C
Digital SRC out DOUT_SRC_LRCK
14:2C
F1
F2
F3
F4
F5
F6
D 14/19 ADAT_DOUT_FPGASRC
14:2C
R3027
R3098
22
FPGASRC_MCLK
To DIT 14:2B
G1
G2
G3
G4
G5
G6
100
DIGITAL OUT FPGASRC_LRCK
14:2C
R3026 MCPU_ASTB
FPGA SRC FPGASRC_BCK R3023

100
14:2C 100
H1
H2
H3
H4
H5
H6
96k DISTRIBUTION
V+3R3D R3042
MCPU_DATA[0]
C3017 5 4
MCPU_DATA[1]
J1
J2
J3
J4
J5
J6
0.1u/10 6 3
C3018 MCPU_DATA[2]
MCPU_DATA[3] 7 2
1000p/50
C3012 8 1
33
100p/50
K1
K2
K3
K4
K5
K6
D 1-56 IC3006
1A 1 14VCC
1B 2 13 4B
D 4/19,6/19
L1
L2
L3
L4
L5
R3046
L6
R3017 1Y 3 12 4A MCPU_DATA[4]
96k_CLK_13AD
4:10F;6:10F 100 11 4Y R3033 5 4
2A 4 MCPU_DATA[5]
Silk print Aside[24M_CLK_AD/DA]
Silk print Aside[6M_CLK_AD/DA]
To CH1 ADC
Silk print Aside[96k_CLK_AD/DA]
6M_CLK_13AD 10 3B 100 MCPU_DATA[6] 6 3

2B 5
4:10F;6:10F 7 2
CH3 ADC R3018 2Y 6 9 3A MCPU_DATA[7]
M1
M2
M3
M4
M5
M6
24M_CLK_13AD R3053 0
100 8 3Y R3030 8 1
G N D7 33
4:10F;6:10F Configuration mode M[1}
100
High
TC74VHC08FK
GNDD 1-31 R3050
D 5/19,7/19 MCPU_DATA[8]
N1
N2
N3
N4
N5
N6
96k_CLK_24AD 5 4
MCPU_DATA[9]
5:10F;7:10F MCPU_DATA[10] 6 3
To CH2 ADC 6M_CLK_24AD 6M DISTRIBUTION V+3R3D MCPU_DATA[11] 7 2
5:10F;7:10F
CH4 ADC 24M_CLK_24AD C3013 8
33
1
5:10F;7:10F
P1
P2
P3
P4
P5
P6
0.1u/10 Configuration mode M[2} High
C3014
MCPU_DATA[12] R3054 0
1000p/50 MCPU_DATA[13]
C3010
MCPU_DATA[14]
R3063
100p/50
R2
R3
R4
R5
R6
R1
5 4
1-57 1A 1
IC3004
1 4V C C
6 3
2
MCPU_DATA[15] 7
1B 2 1 34 B
8 1
33
T1
T2
T3
T4
T5
T6
R3012 1Y 3 1 24 A
E 100 2A 4 1 14 Y R3031
2B 5 1 03 B 56 M2-0 : 111
R3013 2Y 6 9 3A Configuration Slave Serial Mode
100 G N D7 8 3Y R3028
22
1-32
R3064
TC74VHC08FK
GNDD
0
Configuration mode M[0} High
24.576M DISTRIBUTION V+3R3D

C3015 R3057
FADER_STOP1 8 1
0.1u/10 15:7C
C3016 7 2
FADER_START1
D 15/19,19/19 1000p/50
C3011
D 15/19 15:7C
FADER_STOP2
15:7E
FADER_START2
6
5
3
4
100p/50 15:7D
96k_CLK_DA
15:2B;19:1C
To BOARD IF 100
To OUTPUT IF 6M_CLK_DA
15:2B;19:1C
1-58 IC3005 FADER START CONTROL FADER_STOP4 8
R3058
1
1-99
1A 1 1 4V C C 15:7F
SEND 24M_CLK_DA
15:2C;19:1C 1B 2 1 34 B
FADER_START4
15:7E
7 2
R3014 FADER_STOP3 6 3
1Y 3 1 24 A
15:7G 5 4
22 R3032 FADER_START3
R3069
2A 4 1 14 Y
15:7G
10k
100
D 1/19,8/19 R3015
22
2B 5
2Y 6
1 03 B
9 3A
0
R3029
1-99 R3068
G N D7 8 3Y
96k_CLK_HP-MIC-RE 0 22
1:6C;8:11C;8:5C
F To MIC/RET ADC 6M_CLK_HP-MIC-RE
1:6C;8:11C;8:5C GNDD
TC74VHC08FK 1-33
BOARD IF 24M_CLK_HP-MIC-RE
1:6C;8:11C;8:5C
M
GNDD
D 11/19
130 DJM-850-K
1 2 3 4
5 6 7 8
Silk print Aside

A
1-6 [V+1R2D_FPGA]
D 11/19 MAIN ASSY (DWX3360)

DCH1201-A
A
D 15/19
10u 10V
C3037
C3038
C3040
C3042
R3079
0.1u/10
0.1u/10
0.1u/10
0.1u/10
DA_CDTI
22 15:2D
R3081 DA_CCLK
15:2D
To OUTPUT IF
22
R3080 DA_CSN Multi DAC control SPI
22
15:2D
1-8
STBY
R3065 R3067 24M576_CLK_FPGA
13:3F From DSP
NM 0
GNDD
13:3B
DSP_SPI_CLK
13:3B
DSP_SPI_WP
D 13/19
13:3B
D 12/19
MCPU_RD
R3084
DSP_SPI_SIMO
13:3B
To DSP
DSP_SPI_SOMI DSP Boot SPI
22
13:3B DSP - FPGA Bus From To DSP_1
DSP_SPI_CS
D 13/19 Address 11bit DSP_BUS
Data 16bit 12:12A
DSPA_ADRS[2]
DSPA_ADRS[1]
DSPA_ADRS[6]
DSPA_ADRS[5]
DSPA_ADRS[7]
DSPA_ADRS[4]
DSPA_ADRS[0]
DSPA_ADRS[8]
DSPA_ADRS[9]
DSPA_ADRS[10]
FDSP_DATA[9]
FDSP_DATA[10]
DSPA_ADRS[3]
FDSP_DATA[2]
DSPA_WE
DSPA_OE
FDSP_DATA[0]
FDSP_DATA[8]
DSPA_CS_FPGA
DSPA_WE
DSPA_OE
DSPA_ADRS[3]
DSPA_ADRS[2]
R3070
DSPA_ADRS[1]
B
0
DSPA_ADRS[0]
DSPA_ADRS[7]
DSPA_ADRS[6]
DSPA_ADRS[5]
DSPA_ADRS[4]
TCK
DSPA_ADRS[10]
DSPA_ADRS[9]
A10
A11
A12
A13
A14
A15
A16
A4
A5
A6
A7
A8
A9
DSPA_ADRS[8]
TDO
R3093
FDSP_DATA[9] 8 DSPA_DATA[9]
B10
B11
B12
B13
B14
B15
B16
1
B4
B5
B6
B7
B8
B9
FDSP_DATA[10] 7 2 DSPA_DATA[10]
C10
C11
C12
C13
C14
C15
C16
33
C4
C5
C6
C7
C8
C9
R3094
D10
D11
D12
D13
D14
D15
D16
D4
D5
D6
D7
D8
D9
FDSP_DATA[4] FDSP_DATA[1] 5 4 DSPA_DATA[1]
FDSP_DATA[6] 33
C
R3095
E10
E11
E12
E13
E14
E15
E16
DSPA_DATA[4]
E4
E5
E6
E7
E8
E9
FDSP_DATA[4] 7 2
DSPA_CS_FPGA FDSP_DATA[6] 6 3 DSPA_DATA[6]
33
F10
F11
F12
F13
F14
F15
F16
F4
F5
F6
F7
F8
F9
R3096
G10
G11
G12
G13
G14
G15
G16
G4
G5
G6
G7
G8
G9
33
FDSP_DATA[14]
FDSP_DATA[1]
FDSP_DATA[3]
D 13/19
H10
H11
H12
H13
H14
H15
H16
H4
H5
H6
H7
H8
H9
13:15H
FDSP_DATA[11] ADAT_DOUT_FPGA From DSP
FDSP_DATA[12]
FDSP_DATA[5]
Digital out Audio data
J10
J11
J12
J13
J14
J15
J16
J4
J5
J6
J7
J8
J9
FDSP_DATA[15]
FDSP_DATA[7]
FDSP_DATA[13]
K12
K13
K14
K15
K16
K10
K11
K4
K5
K6
K7
K8
K9
D
L10
L11
L12
L13
L14
L15
L16
L4
L5
L6
L7
L8
L9
D 1/19
M10
M11
M12
M13
M14
M15
M16
1:4C
M4
M5
M6
M7
M8
M9
SUB_UCOM From To BOARD_IF

R3089 0 FPGA_CLK
N10
N11
N12
N13
N14
N15
N16
N4
N5
N6
N7
N8
N9
R3090 100 FPGA_RXD_DAT

R3091 0 FPGA_TXD_DAT
P10
P11
P12
P13
P14
P15
P16
P4
P5
P6
P7
P8
P9
R3092 0 FPGA_SIGNAL NOTES
NM is STBY
RS1/16SS***J
R10
R11
R12
R13
R14
R15
R16
R4
R5
R6
R7
R8
R9
(D) RS1/16SS****D
SR RS1/10SR***J
SQ RS1/8SQ***J
T10
T11
T12
T13
T14
T15
T16
T4
T5
T6
T7
T8
T9
SA RS1/4SA***J
GNDD
RN RN1/16SE****D
E
RAB4CQ***J
10k
R3082
R3083
0.01u/16
R3076
R3097
CKSSYB***K F
C3044
10k
0
22
100
0
SR CKSRYB***K F
R3075
CKSQYB***K
1-7 SQ F
GNDD
10:2E
D 10/19 CH
CH (D)
CCSSCH***J
CCSSCH***D
CCSRCH***J
F
F
DSP_USB_WP SRCH F
R3085 10:2E From To MAIN_UCOM SQCH CCSQCH***J F
DSP_USB_SI
22
10:2E USB_UCOM Boot CFHXSQ CFHXSQ***J F
DSP_USB_SO +
10:2E & CEVW***M F
DSP_USB_CS
10:2E Serial Flash Write NP
+
CEVWNP***M F
DSP_USB_CLK HVW CEHVW***M F
+
V+3R3D FPGA_DONE HVAW CEHVAW***M F
10:2H;15:7B CEAN P CEANP***M F
FPGA_SO
0.1u/10
R3069
C3043
10:14F
R3072
From To MAIN UCOM

10k
IC3008 10:14F
22
Silk print Aside FPGA_SCK

[FPGA_RESET]
1 CS#
VCC
8
FPGA_RESET FPGA Configulation
R3068 2 SO/SIO1 7 10:12B
D 10/19,15/19
HOLD# GNDD FPGA_XINIT
22 3 WP# 6 10:2H
SCLK
4 GND
SI/SIO0
5 R3039
F
MX25L4006EM2I-12G-K
DYW1808- /J
5
6
4
3
R3078 22 USB_MOSI
9:2I D 9/19
GNDD 7 2
FOR DSP
8 1
R3077 22 USB_SCK
9:2I
From To USB UCOM : Voltage measuring point
D 11/19
22
SPI Boot program
USB_MISO
9:2I : Waveform measuring point
DJM-850-K 131
5 6 7 8
1 2 3 4
10.18 MAIN ASSY (12/19)
DSP_1 DSP
A DSP_BUS
11:16B
IC3201
D810K013BZKB400
R3207
DSPA_DATA[2] 1 8 T13 R8
EMA_D[0]/MMCSD_DAT[0]/UHPI_HD[0]/GP0[0]/BOOT[12] EMA_BA[0]/GP1[14] R3211
DSPA_DATA[0] 2 7 R15 P8 1 8 DSPA_ADRS[0]
EMA_D[1]/MMCSD_DAT[1]/UHPI_HD[1]/GP0[1] EMA_BA[1]/UHPI_HHWIL/GP1[13]
DSPA_DATA[10] 3 6 R13 2 7 DSPA_ADRS[3]
EMA_D[2]/MMCSD_DAT[2]/UHPI_HD[2]/GP0[2]
DSPA_DATA[9] 4 5 P15 T9 3 6 DSPA_ADRS[4]
R3204 EMA_D[3]/MMCSD_DAT[3]/UHPI_HD[3]/GP0[3] EMA_A[0]/GP1[0]
DSPA_DATA[5] 1 8 P13 R9 4 5 DSPA_ADRS[7]
33
EMA_D[4]/MMCSD_DAT[4]/UHPI_HD[4]/GP0[4] EMA_A[1]/MMCSD_CLK/UHPI_HCNTL0/GP1[1]
DSPA_DATA[13] 2 7 N15 P9 33
EMA_D[5]/MMCSD_DAT[5]/UHPI_HD[5]/GP0[5] EMA_A[2]/MMCSD_CMD/UHPI_HCNTL1/GP1[2] R3216
DSPA_DATA[7] 3 6 N13 N9 1 8 DSPA_ADRS[5]
EMA_D[6]/MMCSD_DAT[6]/UHPI_HD[6]/GP0[6] EMA_A[3]/GP1[3]
DSPA_DATA[15] 4 5 M15 T10 2 7 DSPA_ADRS[6]
EMA_D[7]/MMCSD_DAT[7]/UHPI_HD[7]/GP0[7]/BOOT[13] EMA_A[4]/GP1[4]
33 R10 3 6 DSPA_ADRS[1]
R3208 EMA_A[5]/GP1[5]
DSPA_DATA[1] 1 8 N12 P10 4 5 DSPA_ADRS[2]
EMA_D[8]/UHPI_HD[8]/GP0[8] EMA_A[6]/GP1[6]
DSPA_DATA[3] 2 7 T14 N10
R3212 33
DSPA_DATA[11] R14 T11 1 8 DSPA_ADRS[8]
3 6
EMIFA
DSPA_DATA[12] P16 R11 2 7 DSPA_ADRS[9]
4 5
R3201 EMA_D[11]/UHPI_HD[11]/GP0[11] EMA_A[9]/GP1[9]
DSPA_DATA[14] 1 P14 N8 3 6 DSPA_ADRS[10]
8 33
DSPA_DATA[4] 4 5 STBY
B DSPA_DATA[6]
2 7 N16
N14
P11
N11 33
3 6
EMA_D[14]/UHPI_HD[14]/GP0[14] EMA_A[12]/GP1[12] V+3R3D_DSP
DSPA_DATA[8] 4 5 M16
EMA_D[15]/UHPI_HD[15]/GP0[15]
R12
R3227
33 GNDD
EMA_CLK/OBSCLK/AHCLKR2/GP1[15]
NM
N6 T12
EMA_WAIT[0]/UHPI_HRDY/GP2[10] EMA_SDCKE/GP2[0]
T8
V+3R3D_DSP EMA_CS[0]/UHPI_HAS/GP2[4]
P7
EMA_CS[2]/UHPI_HCS/GP2[5]/BOOT[15] D320
R3210 T7 R3213 33 DSPA_CS_FPGA NM
EMA_CS[3]/AMUTE2/GP2[6]
10k N7
EMA_RAS/EMA_CS[5]/GP2[2]
L16
Q3201
EMA_CAS/EMA_CS[4]/GP2[1]
NM
M13 R3214 33 DSPA_WE
EMA_WE/UHPI_HRW/AXR0[12]/GP2[3]/BOOT[14]
M14
EMA_WE_DQM[0]/UHPI_HINT/AXR0[15]/GP2[9]
P12
EMA_WE_DQM[1]/UHPI_HDS2/AXR0[14]/GP2[8] GNDD
R7 R3215 33 DSPA_OE
EMA_OE/UHPI_HDS1/AXR0[13]/GP2[7]
C
IC3201 R3217
DSP D810K013BZKB400 1 8 DSPB_RAS
2 7 DSPB_CS_SDRAM
R3205
DSPB_DATA[3] 1 8 F16 C9 3 6 DSPB_BA[0]
EMB_D[0]/GP6[0] EMB_BA[0]/GP7[1]
DSPB_DATA[2] 2 7 G13 B9 4 5 DSPB_BA[1]
EMB_D[1]/GP6[1] EMB_BA[1]/GP7[0] R3221
DSPB_DATA[1] 3 6 G16 82 1 8 DSPB_ADRS[10
EMB_D[2]/GP6[2]
DSPB_DATA[0] 4 5 H13 D10 2 7 DSPB_ADRS[0
R3202 EMB_D[3]/GP6[3] EMB_A[0]/GP7[2]
DSPB_DATA[7] 1 8 68 H16 C10 3 6 DSPB_ADRS[1
EMB_D[4]/GP6[4] EMB_A[1]/GP7[3]
DSPB_DATA[6] 2 7 J13 B10 4 5 DSPB_ADRS[2
EMB_D[5]/GP6[5] EMB_A[2]/GP7[4] R3218
DSPB_DATA[5] 3 6 J15 A10 1 8 82 DSPB_ADRS[3
EMB_D[6]/GP6[6] EMB_A[3]/GP7[5]
DSPB_DATA[4] 4 5 J16 D11 2 7 DSPB_ADRS[4
R3206 EMB_D[7]/GP6[7] EMB_A[4]/GP7[6]
DSPB_DATA[11] 68 1 8 C16 C11 3 6 DSPB_ADRS[5
EMB_D[8]/GP6[8] EMB_A[5]/GP7[7]
DSPB_DATA[10] 2 7 D13 B11 4 5 DSPB_ADRS[6
EMB_D[9]/GP6[9] EMB_A[6]/GP7[8] R3222
DSPB_DATA[9] 3 6 D14 A11 82 1 8 DSPB_ADRS[7
EMB_D[10]/GP6[10] EMB_A[7]/GP7[9]
DSPB_DATA[8] 4 5 D15 D12 2 7 DSPB_ADRS[8
R3203 EMB_D[11]/GP6[11] EMB_A[8]/GP7[10]
DSPB_DATA[15] 1 8 68 D16 C12 3 6 DSPB_ADRS[9
EMB_D[12]/GP6[12] EMB_A[9]/GP7[11]
DSPB_DATA[14] 2 7 E13 A9 4 5 DSPB_ADRS[11
EMIFB
EMB_D[13]/GP6[13] EMB_A[10]/GP7[12]
DSPB_DATA[13] 3 6 E16 B12 82
EMB_D[14]/GP6[14] EMB_A[11]/GP7[13]
DSPB_DATA[12] 4 5 F13 B15
EMB_D[15]/GP6[15] EMB_A[12]/GP3[13]
68 G15
EMB_D[16]
D H14
EMB_D[17] EMB_CLK
C14 R3220
33 R3223
DSPB_BUS_CLK
H15 C13 1 8 DSPB_ADRS[12
EMB_D[18] EMB_SDCKE
J14 D9 2 7
EMB_D[19] EMB_CS[0]
K13 A8 3 6 DSPB_BUS_CKE
EMB_D[20] EMB_RAS
K16 L13 4 5 DSPB_UDQM_SDRAM
EMB_D[21] EMB_CAS R3219
L14 K15 1 8 82 DSPB_LDQM_SDRAM
EMB_D[22] EMB_WE
L15 K14 2 7 DSPB_WE
EMB_D[23] EMB_WE_DQM[0]/GP5[15]
A13 C15 3 6 DSPB_CAS
EMB_D[24] EMB_WE_DQM[1]/GP5[14]
B14 B13 4 5
EMB_D[25] EMB_WE_DQM[2]
A14 A12 82
EMB_D[26] EMB_WE_DQM[3]
E14
EMB_D[27]
E15 GNDD
EMB_D[28]
F14
EMB_D[29]
F15
EMB_D[30]
G14
EMB_D[31]
NOTES
E NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
CKSSYB***K F
SR CKSRYB***K F
SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
F NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
D 12/19
132 DJM-850-K
1 2 3 4
5 6 7 8
DSP_BUS
D 11/19 D 12/19 MAIN ASSY (DWX3360) A
11:16B From To FPGA
DRS[0]
DRS[3]
DRS[4]
DRS[7]
DRS[5]
V+3R3D_DSP V+3R3D_DSP_MEM
SDRAM 256M
DRS[6] R3226
DCH1201-A
DRS[1] STBY 0
10u 10V
C3242
C3241
DRS[2]
NM
DRS[8]
DRS[9]
IC3202
C3243 1 54
RS[10] R3225 0.01u/16 VDD1 VSS3 53 R3228
DSPB_DATA[0] 1 8 2 1 8 DSPB_DATA[15]
DQ0 DQ15
STBY
DSPB_DATA[1] 2 7 C3244
0.01u/16
3
V D D Q 1 VSSQ4
52 2 7 DSPB_DATA[14]
B
DSPB_DATA[2] 3 6 4 51 3 6 DSPB_DATA[13]
V+3R3D_DSP DQ1 DQ14
DQ2 DQ13
6 49
R3227
47 C3248 47
NM
V S S Q 1 VDDQ4
0.01u/16
7 48
R3224 DQ3 DQ12 R3229
DQ4 DQ11
DSPB_DATA[5] 2 7 C3245 9 46 2 7 DSPB_DATA[10]
D3201 0.01u/16 VDDQ2 VSSQ3
FPGA NM 10 45
DSPB_DATA[6] 3 6 3 6 DSPB_DATA[9]
DQ5 DQ10
DQ6 DQ9
Q3201 47 12 43 47
C3249
NM VSSQ2 VDDQ3 0.01u/16
A_WE 13 42
DQ7 DQ8
C3246 14 41
0.01u/16 VDD2 VSS2
DSPB_LDQM_SDRAM 15 40
GNDD LDQM NC
PA_OE DSPB_WE 16 39 DSPB_UDQM_SDRAM
WE UDQM
DSPB_CAS 17 38 DSPB_BUS_CLK
CAS CLK
DSPB_RAS 18 37 DSPB_BUS_CKE
RAS CKE
DSPB_CS_SDRAM 19 36 DSPB_ADRS[12]
CS A12
DSPB_BA[0] 20 35 DSPB_ADRS[11]
BA0 A11
DSPB_BA[1] 21 34 DSPB_ADRS[9]
BA1 A9
DSPB_ADRS[10] 22 33 DSPB_ADRS[8]
A10/AP A8
A0 A7
DSPB_ADRS[1] 24
A1 A6
31 DSPB_ADRS[6] C
A2 A5
DSPB_RAS DSPB_ADRS[3] 26 29 DSPB_ADRS[4]
A3 A4
DSPB_CS_SDRAM C3247 27 28
0.01u/16 VDD3 VSS1
DSPB_BA[0]
M12L2561616A-5TG2A
DSPB_BA[1]
3221
8 DSPB_ADRS[10]
7 DSPB_ADRS[0]
6 DSPB_ADRS[1] GNDD
5 DSPB_ADRS[2]
82 DSPB_ADRS[3]
DSPB_ADRS[4]
DSPB_ADRS[5]
R3222
8
DSPB_ADRS[6]
DSPB_ADRS[7]
DSP
7 DSPB_ADRS[8]
6 DSPB_ADRS[9] IC3201
5 DSPB_ADRS[11] V+3R3D V+3R3D_DSP 1-9 D810K013BZKB400
82 R3209
B16 A1
DVDD1 Vss1
0 E5 A2
SQ DVDD2 Vss2
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
0.01u/16
470p/50
0.1u/10
E8 A3
R3223
DSPB_BUS_CLK
E9
DVDD3
DVDD4
Vss3
A15 D
8 DSPB_ADRS[12] Vss4
C3201
0.1u/10
C3203
47u/6.3
E12 A16
7 DVDD5 Vss5
C3205
C3207
C3262
C3263
C3209
C3210
C3211
C3213
C3215
C3217
C3219
C3221
C3223
C3225
C3227
C3229
C3231
C3233
C3235
C3237
F5 B2
6 DSPB_BUS_CKE DVDD6 Vss6
F11 B3
5 DSPB_UDQM_SDRAM DVDD7 Vss7
F12 E6
DSPB_LDQM_SDRAM DVDD8 Vss8
82
G5 E7
DSPB_WE DVDD9 Vss9
GNDD G12 E10
DSPB_CAS DVDD10 Vss10
K5 E11
DVDD11 Vss11
K12 F8
DVDD12 Vss12
L5 F9
DVDD13 Vss13
L11 F10
DVDD14 Vss14
L12 G8
DVDD15 Vss15
M5 G9
DVDD16 Vss16
M8 H8
DVDD17 Vss17
Power Supply
M9 H9
DVDD18 Vss18
M12 J8
DVDD19 Vss19
R1 J9
V+1R2D V+1R2D_DSP DVDD20 Vss20
F3201
1-10 R16
DVDD21 Vss21
K8
K9
DTL1106-A
Vss22
1 3 F6 L7
CVDD1 Vss23
G6 L8
CVDD2 Vss24
E
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
1000p/50
2
470p/50
0.1u/10
G7 L9
CVDD3 Vss25
G10 L10
CVDD4 Vss26
C3202
0.1u/10
C3204
100u/4
G11 M6
CVDD5 Vss27
C3206
C3208
C3212
C3214
C3216
C3218
C3220
C3222
C3224
C3226
C3228
C3230
C3232
C3234
C3236
H6 M7
CVDD6 Vss28
H7 M10
CVDD7 Vss29
H10 M11
CVDD8 Vss30
H11 T1
CVDD9 Vss31
H12 T2
GNDD CVDD10 Vss32
J6 T15
CVDD11 Vss33
J7 T16
CVDD12 Vss34
J10
CVDD13 GNDD
J11
CVDD14
J12
CVDD15 V+1R2D_DSP
K6
CVDD16 3216size
K7 D1 L3201
CVDD17 PLL0_VDDA
K10 E1 CTF1579-A
CVDD18 PLL0_VSSA BLM31PG601SN1
0.01u/16
100p/50
C3238
C3239
C3240
1u/6.3
K11
CH
CVDD19
L6
CVDD20
F7
RSV1
B1
RSV2
GNDD
F

: Waveform measuring point D 12/19
DJM-850-K 133
5 6 7 8
1 2 3 4
10.19 MAIN ASSY (13/19)

V+3R3D_DSP
DSP_2
A SPI0 SPI1
BOOT0 1 0
7
6
R3240
BOOT1 0 1
R3251
R3278
DSP
1k
1k
1k
BOOT2 1 1
2
3
4
1
BOOT7 0 0
FPGA FLASH 4M IC3201

GNDD
D810K013BZKB400
D 11/19 DSP_SPI_CLK
11:13B
DSP_SPI_WP
R3235
R3236
22
22
T5
R5
SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]
SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3]
UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9]
UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8]
P3
R3
11:13B
R6
From To FPGA DSP_SPI_SOMI
DSP_SPI_SIMO
11:13B
R3238 22 P6
SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]
SPI Master=DSP,Slave=Flash(FPGA) SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]

11:13B N4
R3239 22
DSP_SPI_CS SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4]
11:13B
T6
SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]
R4
1-11 debug port P5

SPI1_ENA/UART2_RXD/GP5[12]
D 10/19 DSP_RESET R3276

N5
SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]
SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]
P4
From MAIN UCOM 10:12B
100
SPI1_SCS[0]/UART2_TXD/GP5[13]
0.01u/16
C3258
C1
NC1
B C2
NC2
STBY F3 G1
NC3 RTC_CVDD
V+3R3D H4
GNDD NC4
JTAG RTC_XI
H1
CN3201 G3 H2
NM
NM
NM
NM
NM
RESET RTC_XO
NM
K1 G2
V+3R3D
R3241
R3242
R3243
R3244
R3252
1 GP7[14] RTC_VSS
V+3R3D 2
J1
DSP_TMS 3 TMS
J2
DSP_TDI 4 TDI
J3
JTAG
DSP_TDO 5 TDO
J4 F2
DSP_TCK 6 TRST OSCIN
H3 F1
DSP_EMU 7 TCK OSCOUT
J5 E2
DSP_TRST 8 EMU[0]/GP7[15] OSCVSS
GNDD 9
R3253 G
GNDD 1 0 V+1R2D
10k
IC3205 C3260
GNDD 0.1u/10
1 VCC 5
C 2
Oscillator 3 4 R3255 GNDD

GND
22
V+3R3D
TC7SG08FU
GNDD
24.576MHz(DSP/FPGA)
R3230
1000p/50
C3257
100p/50
C3255
C3256
0.1u/10
CH
1000p/50
100p/50
C3250
C3251
C3252
0.1u/10
IC3203 IC3204
CH
1 NC 5 1 14
Vcc
2 2 13
3 4 3 12 GNDD
1-12
GND0
4 11 R3234
TC7SHU04FUS1 5 10 22
GNDD
R3231 R3233 6 9
1M 22 7 8
R3232
1k
X3201
4
X2
3 TC74VHC08FK
GND2
GNDD GNDD
1 2
GND1
D X1
DSS1204-A
C3253
C3254
12p/50
12p/50
24.576MHz
CH
CH
GNDD GNDD
D 11/19 To FPGA 24M576_CLK_FPGA

11:13B
6M_CLK_DSP
From FPGA 96K_CLK_DSP

11:2C
11:2C
D 11/19
B5
AHCLKX0/AHCLKX2/USB_RE
C5
ACLKX0/ECAP0/APWM0/GP2
D5
(CH1 D) AFSX0/GP2[13]/BOOT[10]
: CH1 Digital Signal A4

(CH2 D) AHCLKR0/GP2[14]/BOOT[11
: CH2 Digital Signal B4
C4
ACLKR0/ECAP1/APWM1/GP
(CH3 D)
: CH3 Digital Signal D 5/19 (CH2 D) B8
AFSR0/GP3[12]
E (CH4 D) From CH2 ADC Block ADAT_CH2_ANA

5:10F
AXR0[0]/AFSR2/GP3[0]
: CH4 Digital Signal C8

AXR0[1]/ACLKX2/GP3[1]
(MIC D) D 8/19 (RET D)

D8
AXR0[2]/AXR2[3]/GP3[2]
: MIC Digital Signal From MIC/RET ADC

ADAT_RETURN_ANA
8:5C
(MIC D)
A7
B7
AXR0[3]/AXR2[2]/GP3[3]
(RET D) ADAT_MIC_ANA
AXR0[4]/AXR2[1]/GP3[4]
: RETURN Digital Signal 8:11C C7
(CH1 U/D IN) D 4/19 (CH1 D)

D7
AXR0[5]/AFSX2/GP3[5]
AXR0[6]/ACLKR2/GP3[6]
: CH1 USB/DIGITAL Input Signal From CH1 ADC Block

ADAT_CH1_ANA
4:10F
(CH3 D)
A6
AXR0[7]/GP3[7]
(CH2 U/D IN)

: CH2 USB/DIGITAL Input Signal
D 6/19 From CH3 ADC Block
From CH4 ADC Block
ADAT_CH3_ANA
6:10F
ADAT_CH4_ANA
(CH4 D)
B6
C6
AXR0[8]/GP3[8]
UART1_RXD/AXR0[9]/GP3[9
7:10F D6
(CH3 U/D IN) UART1_TXD/AXR0[10]/GP3[
: CH3 USB/DIGITAL Input Signal D 7/19 A5

AXR0[11]/AXR2[0]/GP3[11]
(CH4 U/D IN) (CH1 U/D IN) L4

ADAT_USBIN1
: CH4 USB/DIGITAL Input Signal ADAT_USBIN2
9:2H
(CH2 U/D IN)
AMUTE0/RESETOUT
From USB ADAT_USBIN3

9:2H (CH3 U/D IN)
9:2H
D 9/19 ADAT_USBIN4
9:2H
(CH4 U/D IN)
D 13/19
134 DJM-850-K
1 2 3 4
5 6 7 8
P3
64P0_OUT12/GP5[9]/BOOT[9]
R3
M64P0_IN12/GP5[8]/BOOT[8]
NOTES
NM is STBY
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
V+1R2D_DSP
SQ RS1/8SQ***J
SA RS1/4SA***J
B
G1 RN RN1/16SE****D
C3261
R3263
0.1u/10
RTC_CVDD
10k
H1
RTC_XI RAB4CQ***J
H2
RTC_XO
G2 CKSSYB***K F
RTC_VSS
SR CKSRYB***K F
SQ CKSQYB***K F
GNDD
CH CCSSCH***J F
CH (D) CCSSCH***D F
F2 SRCH CCSRCH***J F
OSCIN
F1 SQCH CCSQCH***J F
OSCOUT
E2 CFHXSQ***J F
CFHXSQ
OSCVSS +
CEVW***M F
NP CEVWNP***M F
GNDD +
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
60
10
C
GNDD
DSP
IC3201
D810K013BZKB400
D3 (HP D)
USB0_VBUS
USB0_DRVVBUS/GP4[15]
E4 : HP OUT Digital Signal
H5
(MA D)
E3
USB0_VDDA33
F4 : MASTER OUT Digital Signal
C3
USB0_VDDA18
USB2.0 USB0_DP
G4
(BO D)
STBY USB0_VDDA12 USB0_DM
: BOOTH OUT Digital Signal
C3259
NM
(SEND D)
D2
USB0_ID : SEND OUT Digital Signal
GNDD
(REC D)
: REC OUT Digital Signal
(DIG OUT)
: DIGITAL OUT Signal
(CH1 U OUT)
: CH1 USB Output Signal D
(CH2 U OUT)
(CH3 U OUT)
(CH4 U OUT)
DSP IC3201
D810K013BZKB400
D 1/19
B5 K2
AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11] AHCLKX1/EPWM0B/GP3[14]
C5 K3
ACLKX0/ECAP0/APWM0/GP2[12] ACLKX1/EPWM0A/GP3[15]
D5 K4
(HP D)
ADAT_HP
AFSX0/GP2[13]/BOOT[10] AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10]
STBY 1:6C To BOARD_IF
R3274
(DIG OUT)
A4
B4
AHCLKR0/GP2[14]/BOOT[11] AHCLKR1/GP4[11]
L1
L2 NM
ADAT_DOUT
14:2G To DIGITAL OUT
ACLKR0/ECAP1/APWM1/GP2[15] ACLKR1/ECAP2/APWM2/GP4[12]
D 14/19
R3277
C4 L3
0
AFSR0/GP3[12] AFSR1/GP4[13]
McASP1
B8 T3 R3247
AXR0[0]/AFSR2/GP3[0] AXR1[0]/GP4[0]
C8 R2 100 E
D8
AXR0[1]/ACLKX2/GP3[1] AXR1[1]/GP4[1]
P2 (DIG OUT) R3246 100
GNDD
ADAT_DOUT_FPGA D 11/19,15/19
McASP0
AXR0[2]/AXR2[3]/GP3[2] AXR1[2]/GP4[2] 11:15G

A7 P1 R3245 100 (BO D)
B7
AXR0[3]/AXR2[2]/GP3[3] AXR1[3]/EQEP1A/GP4[3]
N2
ADAT_BOOTH
15:2B To FPGA
AXR0[4]/AXR2[1]/GP3[4] AXR1[4]/EQEP1B/GP4[4]
C7 N1
AXR0[5]/AFSX2/GP3[5] AXR1[5]/EPWM2B/GP4[5] R3264
D7 M4 8
(REC D) ADAT_REC
1
AXR0[6]/ACLKR2/GP3[6] AXR1[6]/EPWM2A/GP4[6]
A6
B6
AXR0[7]/GP3[7] AXR1[7]/EPWM1B/GP4[7]
M3
M2
2
3
7
6 (MA D)
15:2C
ADAT_MASTER_R
15:2C
ADAT_MASTER_L
D 15/19,19/19
AXR0[8]/GP3[8] AXR1[8]/EPWM1A/GP4[8]
C6
UART1_RXD/AXR0[9]/GP3[9] AXR1[9]/GP4[9]
M1 4 5 (SEND D) 15:2C
ADAT_SEND
To OUTPUT IF
D6 N3 19:2C
100
UART1_TXD/AXR0[10]/GP3[10] AXR1[10]/GP5[10]
A5 T4
AXR0[11]/AXR2[0]/GP3[11] AXR1[11]/GP5[11]
R3265
L4 D4 1 8 (CH3 U OUT) ADAT_USB3OUT
AMUTE0/RESETOUT AMUTE1/EPWMTZ/GP4[14]
D 9/19
9:2H
2 7 (CH4 U OUT) ADAT_USB4OUT
9:2H
3 6 (CH2 U OUT) ADAT_USB2OUT
4 5 (CH1 U OUT) 9:2H

ADAT_USB1OUT To USB_UCOM
9:2H
100

DJM-850-K 135
5 6 7 8
1 2 3 4
10.20 MAIN ASSY (14/19)
A DIGITAL OUT
FPGASRC_MCLK
11:3F
DIT_RESET
10:12B
DIT_TXD
D 10/19,11/19 11:3E
DIT_SCK
11:3E
From FPGA DIT_CS

11:3E
FPGASRC_LRCK
11:3F
FPGASRC_BCK
11:3F
ADAT_DOUT_FPGASRC
11:3F
D 11/19 DOUT_SRC_LRCK
11:3F
R3414
0
R3415 0
To FPGA DOUT_SRC_BCK
11:3F
DOUT_SRC_DATA
R3416
0
(DIG OUT)
11:3F R3411
0
R3412
24bit SRC R3413

0
D 10/19 STBY
From MAIN_UCOM R3410

1 8
(DIG OUT)
R3435
DOUT_SRC_RESET 2 7
C 10:12B 0
3 6
0.01u/16
C3405
4 5
29
27
32
31
30
28
26
25
NM
SDOUT1
OLRCK1
RMCK
RST
OSCLK1
TDM_IN
GPO3/SRC_UNLOCK
GNDD
OLRCK2
1 24
RX0/RXP0 OSCLK2 V+3R3D
2 23
RX1/RXN0 SDOUT2
DCH1201-A
1 0 u 10V
C3406
C3408
0.1u/10
3 22
VA IC3404 VL
NM
C3404
0.1u/10
4 21
AGND 33 DGND
DCH1201-A
THERMAL_PAD
1 0 u 10V
R3408
C3407
C3409
0.1u/10
SDA/CDOUT/V/AUDIO
5 20
1 8
SCL/CCLK/NV/RERR
RX2/RXP1 VD_FILT
2 7
6 19
3 6
D RX3/RXN1 V_REG
ILRCK/MCLK_OUT
4 5 GPO2/TX/U GNDD
7 GPO1/C 18
ISCLK/TX_SEL
NM
SDIN/RX_SEL
SRC_CS
AD0/CS/SAOF
GPO0/RCBL
11:3E
XTI
8 17
SRC_TXD
AD1/CDIN/MS_SEL
11:3E
XTO
9
10
11
12
13
14
15
16
D 11/19 SRC_SCK
11:3D
From FPGA
(DIG OUT)
GNDD
24M_CLK_DIGI
11:2C
E 96K_CLK_DIGI
11:2D
6M_CLK_DIGI
11:2C
(DIG OUT)
(DIG OUT)
From DSP ADAT_DOUT
13:15H
17pin C
R3436
D 13/19
0
Software mode non pull up
Hardware mode 20k pull up
GNDD
D 14/19
136 DJM-850-K
1 2 3 4
5 6 7 8

1-86
R3434
100
0.01u/16
C3412
GNDD
R3422
B
0
R3421
0
R3420
1-90
0
STBY 1-89
R3417
R3418 NM 1-87
R3419 NM (DIG OUT) 1-88
V+3R3D_DIT V+3R3D
NM
R3427
DCH1201-A
0
1 0 u 10V
36
35
34
33
32
31
30
29
28
27
26
25
C3415
1-85 V+5D
CM0/CDTO/CAD1
PDN
XTO
CM1/CDTI/SDA
XTI
INT1 LRCK
OCLS1/CCLK/SCL
OCKS0/CSN/CAD0
INT0
C3411 37 24
AVDD MCKO1
BICK
STBY
SDTO
DAUX
MCKO2
0.1u/10
DCH1201-A
38 23
10V
R DVSS
C
C3416
C3417
C3419
R3423 18k RN 39 22 C3413
NM
0.01u/16
VCOM DVDD
SR
DIGITAL OUT
C3410 0.47u/10 40 21
10u
0.1u/10
41
AVSS
DOUT DIT VOUT
20
R3429
RX0 UOUT
1.8k
GNDD
42
NC_AVSS3
RX1
IC3405 COUT
19
1-84
V+3R3D
43
44
TEST1
RX2
AK4114VQ BOUT
TX1
18
17 (DIG OUT) R3426 R3428

GNDD
NC_AVSS4 TX0 Q3401
RX3 NC_DVSS1 2SC2412K(RS)
45 16 22 2.7k STBY DKB1089-A
NC_AVSS1
NC_AVSS2
TVDD JA3401
IPS0/RX4
DIF0/RX5
DIF1/RX6
DIF2/RX7
DCH1201-A
R3432 C3418 L3401

IPS1/IIC
46 15
2
1 0 u 10V
TEST2
C3406
C3408
0.1u/10
XTL0
XTL1
NM
P/SN
47 14 C3414 68 0.1u/10 (DIG OUT)

R3431
R3433
1
VIN
R3430
100k
220
3.9k
48 13 0.1u/10
2
9
1
10
11
12
DCH1201-A
R3425
1 0 u 10V
C3407
C3409
0.1u/10
10k
GNDD
R3424
10k
D
GNDD
XTAL:24.576MHz GNDD
NOTES
(DIG OUT)
NM is STBY
: DIGITAL OUT Signal
RS1/16SS***J
(D) RS1/16SS****D
SR RS1/10SR***J
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
E
RAB4CQ***J
n C CKSSYB***K F
up SR CKSRYB***K F
ull up SQ CKSQYB***K F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
SQCH CCSQCH***J F
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F F
+
HVAW CEHVAW***M F
CEANP CEANP***M F : Voltage measuring point
DJM-850-K 137
5 6 7 8
1 2 3 4
10.21 MAIN ASSY (15/19)

V+5A_O
IC201
OUTPUT IF MASTER / REC/ BOOTH DAC PCM1691DCA
R213
SR
A
0
1 RSV2_1 48
RSV2_13
2 RSV1_2 47
TEST MODE FORMAT MCLK SCLK LRCK VCC2
3 RSV2_2 46
1000p/50
10u/16
C214
C216
C218
I2S 256fs 64fs AGND2
1u/10
SPI
1-52
SR
OPEN Left-Justified 96kHz 4 RSV1_1 45
I2S
32bits 24.576MHz 6.144MHz RSV2_12
5 RSV2_3 44
1-53
D 11/19,19/19 96k_CLK_DA
11:2K;19:1C
6 LRCK
RSV2_11
VOUT1
43 BOOTH_L
18:1C
D 18/19
1-49 From FPGA 6M_CLK_DA
11:2K;19:1C
7 BCK
RSV2_10
42 (BO)
To BOOTH
ADAT_BOOTH
(BO D) 8 DIN1 41 BOOTH_R
V+3R3D 13:15H VOUT2 18:1F
(REC D) 9 DIN2 40
From DSP ADAT_REC
ADAT_MASTER_L
13:15H
(MA D) 10 DIN3
RSV2_14
39
(REC)
REC_L D 17/19
D 13/19
R201
SR
13:15I VOUT3 17:2E

0
11 DIN4 38
ADAT_MASTER_R
13:15H RSV2_9 To MASTER2
12 VDD GND 37 REC_R
CCH1998-A 49 VOUT4 17:2G
13 DGND 36
16V
1000p/50
RSV2_8 (MA)
0.1u/10
C202
C203
C204
14 SCKI 35 MASTER_L+
VOUT5 16:1C
10u
15 RST 34
16 ZERO1
RSV2_7
VOUT6
33
(MA)
MASTER_L-
16:1D
D 16/19
B 1-50 17 ZERO2 32
To MASTER1
RSV2_6
R212 18 31
AMUTEI MASTER_R+
1-54 VOUT7 16:1G
D 11/19,19/19 24M_CLK_DA
0
MD/SDA/DEMP 20
19 AMUTEO
RSV2_5
30
29 MASTER_R-
From FPGA 11:2K;19:1C
R204
MC/SCL/FMT 21
VOUT8
28
16:1G
DA_RESET
From MAIN_UCOM 10:13C;19:2C 100 MS/ADR0/RSV 22
RSV2_4
27
AGND1
D 10/19,19/19 DA_CDTI
11:12A TEST/ADR1/RSV
23
VCOM
26
24 25
From FPGA DA_CCLK
11:12A R211
MODE
VCC1
DA_CSN
D 11/19 10k
1000p/50
10u/16
10u/16
11:12B
C213
C215
C217
C219
C220
1u/10
1u/10
SR
SR
0.01u/16
1-51
C206
C209
1000p/50
STBY C210
GNDD
NM
STBY
R235 R246 R286 R262 R252 R266 R271 C212
0 0 0 0 NM NM NM 0.01u/16
C SR SR SR SR
C211
R236 R247 R256 R263 R253 R267 R272
0 0 0 0 NM NM NM 0.01u/16
SR SR SR SR
R237 R248 R257 R278 R254 R268 R273 C249
0 0 0 0 NM NM NM 1000p/50
SR SR SR SR
R238 R249 R258 R279 R255 R269 R274
GNDA_DA GNDD
0 0 0 0 NM NM NM
SR SR SR SR
R239 R250 R259 R280 R270 R275
0 0 0 0 NM NM
SR SR SR SR GNDA_DA GNDA_AD
R240 R251 R260 R281
GND_PO GNDA_OUT GND_PO GNDA_OUT
0 0 0 0
SR SR SR SR
R241 R282 R261
GNDA_AD GNDA_OUT
0 0 0
SR SR (MA D)
R242 R283
GNDA_AD GNDA_OUT KN201 : MASTER OUT Digital Signal
0 0 1 3 (BO D)
SR SR
R243 R284 R264 R265 : BOOTH OUT Digital Signal
(REC D)
0 0 0 0
D SR SR SR SR
2 4
: REC OUT Digital Signal
R244 R285 (BO)
VNE1948-A
0
SR
0
SR GNDA_AD GNDA_OUT
: BOOTH OUT Signal (L ch)
R245
(REC)
0
GNDA_DA GNDA_OUT
: REC OUT Signal (L ch)
SR GNDD (MA)
GNDA_DA GNDA_OUT
: MASTER OUT Signal (L ch)
V+11E_UNREG
R205
22k
MUTE Q205
LSA1576UB(QRS) D 1/19,16/19-19/19
To BOARD_IF
R202
MASTER1
47k
MUTE
R206
MASTER2/REC
22k
1:9B;16:7E;17:2H;18:2D;19:4E
R209
BOOTH
0.01u/25
47k
C208
1-70 SEND
R203
47k
E Q202
LSC4081UB(QRS)
R210
47k
D 10/19 Q201
LTC124EUB
GNDD
CPU_MUTE
From MAIN_UCOM 10:2K
GNDD
C201
V-15A_O
NM
STBY V+11E_UNREG
MASTER VR MUTE
R207
22k
GNDD
Q204
Audio LSA1576UB(QRS)
Q201 Q202 Q115 OUT
R208
MUTE ON L H Z H
22k
MASTER_MUT
MUTE OFF H L H V-15A 16:7E
STBY
C207
NM
Q203
STBY
LTC124EUB 1-68
From BOARD IF MVR_MUTE
1:4B
C205
NM
F D 1/19 GNDD
Audio
Q203 Q204 OUT
D 15/19 GNDD MUTE ON H Z H
MUTE OFF L H V-15A
138 DJM-850-K
1 2 3 4
5 6 7 8

CONTROL NOTES
NM is STBY
RS1/16SS***J
V+5D V+5D_CONTROL
H_L D 18/19 1-48 R214 L201
(D)
SR
RS1/16SS****D
RS1/10SR***J
To BOOTH 0
SR
VTF1093-A SR (D) RS1/10SR****D
H_R STBY
0.1u/10
C222
SQ RS1/8SQ***J
SA RS1/4SA***J
D 17/19 V+3R3D Q207
NM RN RN1/16SE****D
R217
NM
To MASTER2/REC C221 GNDD
R
NM
RAB4CQ***J
IC202 GNDD
R218
NM
ER_L+
1 VCC 5
FPGA_DONE CKSSYB***K F
ER_L- D 16/19 10:2H;11:13K
2
3 4 R215 Q206 SR CKSRYB***K F

To MASTER1
GND
NM
NM
SQ CKSQYB***K F
B
R216
NM
ER_R+
NM CH CCSSCH***J F
CH (D) CCSSCH***D F
ER_R-
GNDD
SRCH CCSRCH***J F
SQCH CCSQCH***J F
GNDD
CFHXSQ***J F
CFHXSQ
V+5D_CONTROL +
STBY 1-97 CEVW***M F
R226 R234 L208 NP CEVWNP***M F
+
47k 470 NM HVW CEHVW***M F
+
DZ2S180C
STBY
CEHVAW***M
C230
HVAW F
NM
FADER_STOP1
0.1u/10
C236
D204
11:6J Q215 CEANP CEANP***M F
C209 LTC124EUB
1000p/50
Y C210 GNDD GNDD
NM
C212
V+5D_CONTROL
1-98 STBY 1-97 GNDD GNDD
CONTROL1
R222 R233 L209
0.01u/16 JA201
C211
47k 470 NM
4 VKN1034-A C
6
0.1u/10
C228
C238
STBY
NM
0.01u/16 FADER_START1 5
11:6J Q214 1
C249 3
LTC124EUB 2
1000p/50
GNDD GNDD GNDD
DA_DA GNDD
V+5D_CONTROL
STBY CONTROL2
R223 R228 L202
47k 470 NM
DZ2S180C
STBY
0.1u/10
C226
C231
NM
FADER_STOP2 D201
11:6J Q209
LTC124EUB GNDD
GNDD GNDD
al
V+5D_CONTROL
l STBY
GNDD
R219 R227 L204
NM
47k 470
D
STBY
0.1u/10
C223
C233
NM
FADER_START2
11:6J Q208
LTC124EUB
D 11/19
h) GNDD GNDD GNDD
From FPGA
V+5D_CONTROL STBY
R225 R232 L206
47k 470 NM
DZ2S180C
STBY
0.1u/10
C229
C235
NM
FADER_STOP3
D203
11:6K Q213
LTC124EUB
GNDD GNDD
V+5D_CONTROL
STBY GNDD GNDD
CONTROL3
R221 R231 L207
JA202
47k 470 NM VKN1034-A
4
6
E
0.1u/10
C225
C237
STBY
NM
FADER_START3 5
11:6K Q212 1
3
LTC124EUB 2
GNDD GNDD GNDD
V+5D_CONTROL STBY CONTROL4

R224 R230 L203
47k 470 NM
DZ2S180C
0.1u/10
STBY
C227
C232
NM
4 FADER_STOP4
D202
576UB(QRS) 11:6K Q211

LTC124EUB GNDD
MASTER_MUTE
16:7E
To MASTER1 GNDD GNDD
Y
D 16/19
NM
V+5D_CONTROL
1-68 STBY GNDD
R220 R229 L205
47k 470 NM
NDD F
0.1u/10
STBY
C224
C234
NM
FADER_START4
11:6K Q210
Audio
Q203 Q204 LTC124EUB
OUT
D 15/19
H Z H
L H V-15A GNDD GNDD GNDD : Waveform measuring point
DJM-850-K 139
5 6 7 8
1 2 3 4
10.22 MAIN ASSY (16/19)
MASTER1
A V+15A_O
C317
100u/25
HVAW
C318
GND_PO
0.1u/25
SR
3-order Bessel filter GNDA_OUT
68p/50
R309
R325
C309
RN
RN
CH
24k
24k
R301 R317 R333
(MA)
1-59 C327
3.3k 3k 2.7k 0.047u/16 L+
2200p/50
RN RN RN
470p/50
2
SRCH
SRCH
8 C323 (MA) (MA1)
C301
C305
1
470u/16
4 HVAW
3 I C 3 0 1 (2/2)
R341
R302 R318 R334 (MA)
RN
10k
NJM4580MD
3.3k 3k 2.7k
RN RN RN
68p/50
R310
R326
C310
RN
RN
CH
24k
24k
V-15A_O
D 15/19 MASTER_L+
(MA)
GNDA_OUT
B 15:5C
From OUTPUT IF (MA) MASTER_L_HOT
MASTER_L- GNDA_OUT
15:5C
3-order Bessel filter
68p/50
MASTER_L_COLD
R311
R327
C311
RN
RN
CH
24k
24k
(MA2)
V+15A_O
R303 R319 R335 C328
(MA)
1-59
3.3k 3k 2.7k 0.047u/16 L-
2200p/50
RN RN RN
470p/50
6
SRCH
SRCH
8 C324 (MA)
C302
C306
470u/16
4 I C 3 0 1 (1/2) HVAW
5 (MA1)
NJM4580MD
R344
R304 R320 R336 (MA)
RN
10k
3.3k 3k 2.7k C320
RN RN RN
68p/50
R312
R328
C312
RN
RN
CH
0.1u/25
24k
24k
SR
GNDA_OUT GNDA_OUT
C321
100u/25
HVAW
GNDA_OUT GND_PO
V-15A_O
C
From OUTPUT IF
V+15A_O
1:9B;15:3F
C319
0.1u/25
SR
D 1/19,15/1
GNDA_OUT
68p/50
R313
R329
C313
RN
RN
CH
24k
24k
R305 R321 R337

1-60 C329
2200p/50
3.3k 3k 2.7k 0.047u/16 R+

470p/50
RN RN RN 2
SRCH
SRCH
8 C325
C303
C307
470u/16
4 HVAW
3 I C 3 0 2 (1/2)
R342
R306 R322 R338

RN
10k
NJM4580MD
3.3k 3k 2.7k
RN RN RN
68p/50
R314
R330
C314
D
RN
RN
CH
24k
24k
V-15A_O
GNDA_OUT
D 15/19 MASTER_R+
15:5C MASTER_R_HOT
From OUTPUT IF GNDA_OUT
MASTER_R-
15:5C
68p/50
MASTER_R_COLD
R315
R331
C315
RN
RN
CH
24k
24k
V+15A_O
R307 R323 R339

1-60 C330
2200p/50
3.3k 3k 2.7k 0.047u/16 R-

470p/50
RN RN RN 6
SRCH
SRCH
8 C326
C304
C308
470u/16
4 I C 3 0 2 (2/2) HVAW
5 NJM4580MD
R343
R308 R324 R340

RN
10k
3.3k 3k 2.7k C322

RN RN RN
68p/50
R316
R332
C316
RN
RN
CH
0.1u/25
24k
24k
SR
V-15A_O GNDA_OUT GNDA_OUT
E
GNDA_OUT
MASTER 2R+
M
17
(MA2)
M
17
MASTER 2L+
D 16/19
140 DJM-850-K
1 2 3 4
5 6 7 8
V+15A_O
C335
100u/25
HVAW
C336
NM
GND_PO MASTER1 L
STBY JA301
C337 DKB1093-A
0.1u/25 4
SR
GNDA_OUT 1 2
R354
3
6.8k
RN
C338
(MA1) R345 Q301
100p/50
CH 2SK209(BL)
1-61 MASTER1_L_COLD
COLD
5.6k STBY (MA1)
HOT
RN 6 (MA1)
8 C355
C331
7 R362
NM
I C 3 0 3 (2/2) DCN1200-A 47u/25
4 NJM2114D 330 CEANP (MA1)
5
R346 (MA1) 1/2W
Q305
DZ2S180C
CFHXSQ
INC2002AC1
V-15A_O R355 R378
4700p/16
5.6k
C359
D302
RN
6.8k 18k
RN
B
R382
C349
NM
R367
2.2k
RN
_L_HOT 100p/50
CH
STBY
V+15A_O
R368
2.2k
RN
R383
R356
NM
DZ2S180C
GNDA_OUT
CFHXSQ
_L_COLD
4700p/16
6.8k
C360
D303
RN
C339 R379
R347 100p/50 Q302 18k Q306

5.6k
RN
STBY (MA1)
CH 2SK209(BL)
1-61 INC2002AC1
GNDA_OUT
2 (MA1)
8 C356 P302
C332
1 R363
NM
I C 3 0 3 (1/2) DCN1200-A 47u/25

4 330 (MA1) AEK1073-A
(MA1) 3 NJM2114D CEANP
R348 (MA1) 1/2W
5.6k C350 MASTER1_L_HOT

RN
100p/50
CH
R357
C340 6.8k
RN
0.1u/25 STBY
SR STBY
C341
Canon Shield(DNF1789-A)
C353
NM
NM
C348 GNDA_OUT
C
D 15/19
R374
R376
470k
0
100u/25
HVAW
MASTER_MUTE GND_PO GNDA_OUT
15:3H
V-15A_O
OUTPUT IF MUTE
D301
1:9B;15:3F;17:2H;18 :2D;19:4E 1SS352 STBY

R353
R375
R377
470k
STBY
V+15A_O
47k
C363
C364
0
NM
NM
D 1/19,15/19,17/19-19/19 C342
STBY
MASTER1 R
R386
47k
NM STBY
JA302
GNDD GNDD
C343 DKB1093-A
C354
NM
0.1u/25
SR 4
1 2
V-15A_O GNDA_OUT
R358
3
6.8k
RN GNDA_OUT
C344
R349 100p/50 Q303

CH 2SK209(BL)
1-62
COLD
MASTER1_R_COLD
HOT
5.6k STBY
RN 6
8 C357
C333
7 R364
NM
I C 3 0 4 (2/2) DCN1200-A 47u/25

4 330 CEANP
5 NJM2114D
R350 1/2W
Q307 D
DZ2S180C
CFHXSQ
INC2002AC1
R359 R380
4700p/16
5.6k V-15A_O
C361
D304
RN
6.8k 18k
RN
R384
C351
NM
R371
2.2k
RN
_R_HOT 100p/50
CH
STBY
V+15A_O
R372
2.2k
RN
R385
R360
NM
GNDA_OUT
DZ2S180C
CFHXSQ
_R_COLD
4700p/16
6.8k
C362
D305
RN
C345 R381
R351 100p/50 Q304 18k

Q308
5.6k
RN
STBY
CH 2SK209(BL)
1-62 INC2002AC1
GNDA_OUT
2
8 C358 P301
C334
1 R365
NM
DCN1200-A 47u/25
4 I C 3 0 4 (1/2) 330 CEANP AEK1073-A
3 NJM2114D
R352 1/2W
5.6k C352 MASTER1_R_HOT

RN
100p/50
CH
R361 NOTES
C346 6.8k
RN NM is STBY
0.1u/25
SR
C347
RS1/16SS***J E
STBY (D) RS1/16SS****D
NM
SR RS1/10SR***J
GNDA_OUT SR (D) RS1/10SR****D
V-15A_O SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
RAB4CQ***J
(MA) CKSSYB***K F
: MASTER OUT Signal (L ch) SR CKSRYB***K F

2R+
MASTER_2R+
D 17/19 (MA1)
: MASTER1 OUT Signal (L ch)
SQ
CH
CKSQYB***K
CCSSCH***J
F
F
17:2D
To MASTER2/REC (MA2) CH (D) CCSSCH***D F
MASTER2_L+
17:2B : MASTER2 OUT Signal (L ch) SRCH CCSRCH***J F
SQCH CCSQCH***J F
2L+ CFHXSQ***J F
CFHXSQ
+
CEVW***M F F
: Voltage measuring point NP CEVWNP***M F
+
HVW CEHVW***M F
: Waveform measuring point HVAW
+
CEHVAW***M F
CEANP CEANP***M F
D 16/19
DJM-850-K 141
5 6 7 8
1 2 3 4
10.23 MAIN ASSY (17/19)
A
MASTER2,REC
D 16/19
(MA2) R404 (MA2)
MASTER2_L+
16:7J 10k
RN
Q401
INC2002AC1
R411
47k
B
GNDA_OUT
D 16/19 R403
MASTER_2R+
16:7J 10k
RN
Q402
INC2002AC1
R412
C 47k
GNDA_OUT
From OUTPUT IF
R405
R409
22k
22k
(D)
(D)
D 15/19 (REC) C402 (REC) R402 R407 R413 (REC)

REC_L
15:5C 10u/16 3.3k 2.7k 2.4k
(D) (D) (D)
4700p/50
STBY
SQCH
820p/50
SRCH
C403
C405
R437
Q409
NM
NM
GNDA_OUT GNDA_
E
R406
R410
22k
22k
(D)
(D)
D 15/19 C401
R401 R408 R414
REC_R
15:5C 10u/16 3.3k 2.7k 2.4k
(D) (D) (D)
4700p/50
STBY
820p/50
SQCH
SRCH
C404
C406
R438
Q410
NM
NM
GNDA_OUT GNDA_
F D 1/19,15/19,16/19,18/19,19/19
MUTE
From OUTPUT IF 1:9B;15:3F;16:7E;18:2D;19:4E
D 17/19
142 DJM-850-K
1 2 3 4
5 6 7 8
V+15A_O
C417
10u/35
CCG1236-A
C418 STBY
GND_PO
NM (MA2)
C419 : MASTER2 OUT Signal (L ch) MASTER2/REC
(REC)
0.1u/25
SR
: REC OUT Signal (L ch)
GNDA_OUT R 4 2 3 JA401
DKB1083-A
(REC)
33k 1
REC L
R420
RN
RN
12k
1-63 GNDA_OUT 2 REC R
2
8 R427 C425 (MA2) (MA2)
1 3
MA2) (MA2) MASTER2 L
IC402 DCN1200-A 10u/35 4
4
STBY 5
3 NJM4580MD 330 NP MASTER2 R
(2/2) 1/2W
CFHXSQ
6
4700p/16
R436
C427
D401
470k
NM
V-15A_O Q407
R431 INC2002AC1
18k
GNDA_OUT
R433
B
NM
STBY
GNDA_OUT
R434
NM
GNDA_OUT
Q408
V+15A_O INC2002AC1
R432
R424 18k
33k
R421
RN
RN
12k
1-63 GNDA_OUT
6
8 R428 C426
7
IC402 DCN1200-A 10u/35 STBY
4 NJM4580MD 330 NP
5
(1/2) 1/2W
CFHXSQ
4700p/16
R435
C428
C420
470k
D402
NM
0.1u/25
SR
C421 STBY C
NM
C422 GNDA_OUT
10u/35
CCG1236-A
GNDA_OUT
GND_PO
V-15A_O
C414
56p/50
Q403
CH 2SK209(BL)
C408
NOTES
V+15A_O 0.33u/10
SR NM is STBY
C409
RS1/16SS***J D
0.1u/25
SR (D) RS1/16SS****D
C410 GNDA_OUT
SR RS1/10SR***J
(REC) 2
10u/35
CCG1236-A
1-64 SR (D) RS1/10SR****D
8 R422 R425 C423 (REC)
1 GND_PO
SQ RS1/8SQ***J
IC401 DCN1200-A 10 10u/35 STBY
4 NJM4565MD
3 330 NP SA RS1/4SA***J
(1/2) R415 1/2W
4700p/16
RN RN1/16SE****D
CFHXSQ
C411
R429
C429
1M
100k
D403
NM
1000p/50
0.1u/25
C415
SR
SR
C 4 1 2 GNDA_OUT RAB4CQ***J
GNDA_OUT
10u/35
CCG1236-A
GND_PO GNDA_OUT CKSSYB***K F
V-15A_O R418 Q405
GNDA_OUT CKSRYB***K
INC2002AC1 SR F
18k
SQ CKSQYB***K F
CH CCSSCH***J F
C413
56p/50
CH (D) CCSSCH***D F E
Q404 GNDA_OUT
CH 2SK209(BL) SRCH CCSRCH***J F
C407
SQCH CCSQCH***J F
0.33u/10
V+15A_O SR CFHXSQ CFHXSQ***J F
+
IC401 CEVW***M F
NJM4565MD 1-64 CEVWNP***M
6
8
(2/2)
R419 R426 C424 NP F
7 +
HVW CEHVW***M F
DCN1200-A 10 10u/35 STBY +
4 330 CEHVAW***M
5 NP HVAW F
R416 1/2W
CEANP***M
4700p/16
CEANP F
CFHXSQ
R430
C430
D404
1M
100k
NM
V-15A_O
1000p/50
C416
SR
GNDA_OUT
GNDA_OUT
GNDA_OUT
F
R417 Q406
18k
INC2002AC1 : Voltage measuring point
GNDA_OUT
D 17/19
DJM-850-K 143
5 6 7 8
1 2 3 4
10.24 MAIN ASSY (18/19)
A BOOTH
V+15A_O
C527
(BO) (BO
10u/35 R533
CCG1236-A
3.3k
GND_PO RN
C528
0.1u/25 R534
SR
3.3k Q513
GNDA_OUT RN INC2002AC1
R581
27p/50
R523
R527
C525
47k
RN
RN
CH
51k
51k
B
D 15/19 1-65
(BO) C566 (BO)
R521 R525 R529 2 (BO) GNDA_OUT
From OUTPUT IF BOOTH_L
15:5B 10u/16 5.1k 4.7k 3.9k
8
1
IC502
RN RN RN
2700p/50
SRCH
SRCH
470p/50
4 NJM4565MD
C521
C523
3
(1/2)
V-15A_O
R535
3.3k
GNDA_OUT RN
(BO) R536
(BO
NOTES 3.3k
RN
NM is STBY
RS1/16SS***J
C (D) RS1/16SS****D Q514

INC2002AC1
R582
SR RS1/10SR***J
47k
SQ RS1/8SQ***J
SA RS1/4SA***J
GNDA_OUT
RN RN1/16SE****D
D 1/19,15/19-17/19,19/19
RAB4CQ***J D503
From OUTPUT IF 1:9B;15:3F;16:7E;17:2H;19:4E
MUTE
1SS352
CKSSYB***K F
@NoteComp
CKSRYB***K STBY
SR F
R569
C565
NM
CKSQYB***K
47k
SQ F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
D SQCH CCSQCH***J F V-15A_O
CFHXSQ CFHXSQ***J F
+
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+ R537
HVAW CEHVAW***M F
3.3k
CEANP CEANP***M F RN
R538
3.3k
RN Q515
INC2002AC1
R583
V+15A_O
27p/50
R524
R528
C526
47k
RN
RN
CH
51k
51k
D 15/19 1-65
C567
R522 R526 R530 6 GNDA_OUT
From OUTPUT IF BOOTH_R
15:5B 10u/16 5.1k 4.7k 3.9k
8
7
IC502
RN RN RN
E 4 NJM4565MD
2700p/50
5
SRCH
SRCH
470p/50
C522
C524
(2/2)
C529 R539
0.1u/25 3.3k
GNDA_OUT SR RN
GNDA_OUT
C530 R540
10u/35 3.3k
CCG1236-A RN
GND_PO
V-15A_O Q516
INC2002AC1
R584
47k
F
GNDA_OUT
D 18/19
144 DJM-850-K
1 2 3 4
5 6 7 8
V+15A_O
C535
10u/35
CCG1236-A
GND_PO
C561
(BO)
0.1u/25
SR : BOOTH OUT Signal (L ch)
GNDA_OUT R 5 4 1
11k
RN
C531
(BO) 100p/50 Q505

CH 2SK209(BL) BOOTH_L_HOT
2 1-66
470p/50
8 (BO) C553 (BO)

C557
R542
CH
1
4 NJM4580D 330 NP
3
CFHXSQ
(1/2) Q509
1/2W
4700p/16
INC2002AC1
4700p
C549
D504
R563
NM
Q513
INC2002AC1
V-15A_O R543 18k
11k
STBY
BOOTH L
R570
RN
NM
C543 JA502 B
R554
2.2k
RN
(BO) DKN1622-A
100p/50
CH 3
A_OUT
V+15A_O 2
(BO)
R555
1
2.2k
RN
R544 GNDA_OUT
11k
RN
C532
100p/50 Q506
CH 2SK209(BL) BOOTH_L_COLD
6 1-66
470p/50
8 (BO) C554 (BO)

C558
R545
CH
7
(BO) 4 330
5 NJM4580D NP
CFHXSQ
Q510
1/2W
4700p/16
(2/2) INC2002AC1
4700p
C550
D505
R564
NM
C544 18k
STBY
100p/50
R578
CH
NM
R546
Q514
INC2002AC1
C
C562 11k
RN
0.1u/25 STBY
SR
GNDA_OUT
C547
NM
C541
GNDA_OUT
A_OUT 10u/35
R561
CCG1236-A
470k
GND_PO
V-15A_O GNDA_OUT
R562
470k
V+15A_O
STBY
C548
NM
C563
0.1u/25 D
SR
GNDA_OUT R547
11k
GNDA_OUT
RN
C533
100p/50 Q507
CH 2SK209(BL) BOOTH_R_HOT
2 1-67
470p/50
8 C555
C559
1 R548
CH

4 NJM4580D 330 NP
3
CFHXSQ
Q511
1/2W
4700p/16
(1/2) INC2002AC1
4700p
C551
D506
R565
NM
Q515
INC2002AC1
V-15A_O R549 18k
STBY
11k
BOOTH R
R579
RN
NM
C545 JA503
R558
2.2k
RN
100p/50
DKN1622-A
CH 3
A_OUT
V+15A_O 2
E
R559
1
2.2k
RN
R550 GNDA_OUT
11k
RN
C534
100p/50 Q508
CH 2SK209(BL) BOOTH_R_COLD
6 1-67
470p/50
8 C556
C560
7 R551
CH

4 NJM4580D 330 NP
5
CFHXSQ
Q512
1/2W
4700p/16
(2/2) INC2002AC1
4700p
C552
D507
R566
NM
C546 18k
STBY
100p/50
R580
CH
NM
R552
Q516
INC2002AC1
11k
RN
C564
0.1u/25
SR F
GNDA_OUT GNDA_OUT
A_OUT
V-15A_O : Voltage measuring point
D 18/19
DJM-850-K 145
5 6 7 8
1 2 3 4
10.25 MAIN ASSY (19/19)
A SEND
V+5A_O
C608 R61
SEND_DAC R610
(SEND)
10u/16 3.3k
D 11/19,15/19 1-76 1-77 1-73 IC601 10 (D)
DCH1201-A
24M_CLK_DA R601 R608 1 MCLK 16
10V
From FPGA 11:2K;15:2C 0 DZF
0.1u/10
0.1u/10
0
C603
C604
C607
R604 2 BICK 15
6M_CLK_DA
11:2K;15:2B 0 DVDD
R605
10u
(SEND D) 3 SDTI 14
D 13/19 From DSP ADAT_SEND
13:15I R609 0
AVDD
4 LRCK 13
From FPGA 96k_CLK_DA
11:2K;15:2B R606 0 5 RSTN
VSS
12 C602
C DA_RESET
From MAIN_UCOM 10:13C;15:2C 1-75 1-74 1 8 100 6 CSN
VCOM
11
10u
DCH1201-A
10V (SEND)
AOUTL
D 10/19,15/19 2 7 7 CCLK
AOUTR
10
3 6 8 CDTI 9
NC
4 5 1-72 C605
0.01u/16
C601
AK4387ET 1000p/50
R607
10k C606
0.01u/16
NOTES GNDD GNDD GNDD GNDA_DA
C609 R612
NM is STBY
10u/16 3.3k
RS1/16SS***J (D)
D (D) RS1/16SS****D
SR RS1/10SR***J
SQ RS1/8SQ***J
SA RS1/4SA***J
RN RN1/16SE****D
D 1/19,15/19-18/19
RAB4CQ***J
MUTE
From OUTPUT IF 1:9B;15:3F;16:7E;17:2H;18:2D
CKSSYB***K F
SR CKSRYB***K F
E CKSQYB***K
SQ F
CH CCSSCH***J F
CH (D) CCSSCH***D F
SRCH CCSRCH***J F
(SEND D)
SQCH CCSQCH***J F : SEND OUT Digital Signal
CFHXSQ***J (SEND)
CFHXSQ F
+ : SEND OUT Signal (L ch)
CEVW***M F
NP CEVWNP***M F
+
HVW CEHVW***M F
+
HVAW CEHVAW***M F
CEANP CEANP***M F
D 19/19
146 DJM-850-K
1 2 3 4
5 6 7 8
V+15A_O
C615
10u/35
CCG1236-A
C616
GND_PO
0.1u/25
SR
GNDA_OUT
B
Q601
C617 2SK209(BL)
DNF1875-A
R613
R617
0.33u/10
PHONE SHIELD 2
30k
30k
(D)
(D)
SR
C618
08 R611 R615 (SEND) R619

82p/50
CH
1-72 JA601
2
8 (SEND) R621 C624 (SEND) DKN1614-A
1
16 3.3k 3k 2.7k 2
(D) (D) (D) 820 10u/35 3
4 I C 6 0 2 (1/2) 1/4W NP 1
8200p/50
2700p/50
3
SQCH
SRCH
CFHXSQ
C610
C612
NJM4565MD
4700p/16
R627
C626
100k
C619
SEND L
1000p/50
C623
R624
0.1u/25
SR
1M
SR
C 6 2 1 GNDA_OUT
10u/35 R625
C
CCG1236-A
18k
GNDA_OUT V-15A_O
Q603
V+15A_O
GND_PO GNDA_OUT
INC2002AC1
SEND
Q602
2SK209(BL) GNDA_OUT
C614
0.33u/10
SR
R614
R618
C620
30k
30k
(D)
(D)
82p/50
CH
09 R612 R616 R620
1-72 JA602
6
8 R622 C625 DKN1614-A
7
3.3k 3k 2.7k 2
16 3
(D) (D) (D) I C 6 0 2 (2/2) 820 10u/35
4 NP 1
8200p/50
2700p/50
5 1/4W
SQCH
SRCH
CFHXSQ
NJM4565MD D
C611
C613
4700p/16
R628
C627
100k
1000p/50
SEND R
C622
R623
SR
1M
V-15A_O
R626
18k
GNDA_OUT
Q604
INC2002AC1
GNDA_OUT
GNDA_OUT

F
D 19/19
DJM-850-K 147
5 6 7 8
1 2 3 4
10.26 SEC/HP ASSY (1/2)
A SECONDARY V+15_AC POW
C19 C23
V+5
1000p/50 1000p/50
CH CH
! !
D5 D9 V+15A_UNREG
1SR154-400 1SR154-400
18
STBY
3300u/35
0.01u/50
POWER ! !
NM
C31
C33
C37
D6 D10
1SR154-400 1SR154-400
CN1
B13B-EH
C13 C20
B STBY
3300u/35
V+15_AC 1 3
0.01u/50
C1
NM
1000p/50 1000p/50
C32
C34
C38
0.047u
NC 12 CH CH
V+5_AC1 1 1 C2
GNDA_UNREG
0.047u 19
V+5_AC2 1 0
CN3101
C3
0.047u
NC 9
V-15_AC 8 C4 V-15A_UNREG
V-15_AC
0.047u
GNDA 7
C5
0.047u
V+13D_AC1 6
C6
0.047u
P
V+13D_AC2 5
C7
0.047u V+5_AC1
GNDD 4
C8
0.047u C14
GNDHP 3 C9
0.047u V+5A_UNREG
V+HP_AC 2 1000p/50
C10 CH
0.047u
V-HP_AC 1 C11 D3
0.047u !
20
AKF7002-A
RB160L-40
KN2
D4
C !
6800u/16
0.01u/50
NM
C26
KN1
C24
C27
V+5_AC2 RB160L-40 1
J35 J17
1
STBY J22
AKF7002-A C15
1000p/50
CH
GNDF
C12
GND5A
NM GND5A_UNREG (from REG)
STBY
! D1 J2 GNDF
NM (to CHASSIS)
RB060L-40 V+13D_UNREG
R21
0
SQ
! D2 21
GND_P
6800u/25
1000p/50
0.01u/50
(from REG)
0.1u/25
RB060L-40
C28
C25
C29
C30
C16
NM
D STBY
V+HP_AC
GNDD
R25
0
SQ
C17 C21
R24
SQ
0
1000p/50 1000p/50
CH CH
STBY
R26
! D7 D11 !
NM V+HP_UNREG
SQ RB160L-40 RB160L-40
STBY
22
! D8 !
RB160L-40 D12
1000u/25
RB160L-40
C39
NM
R22
C35
C41
NM
4.7k
E C18 C22
1000p/50 1000p/50
CH CH
1000u/25
GNDHP
C40
NM
C36
C42
NM
R23
4.7k
24
V-HP_UNREG
E 1/2
148 DJM-850-K
1 2 3 4
5 6 7 8
POWER DOWN
E 1/2 SEC/HP ASSY (DWR1511) A
POWER_RESET_A
V+5A_UNREG 10C
IC1
13k
R5
D
1 5 V+5A V+15A V+13D_UNREG
OUT CD
CN3
2 AKM7077-A
VDD
0.01u/50
3 4
C52
0.01u/50
VSS NC
C51
11k
R4
19 GNDD
S-80927CNMC-G8X 18 GNDD
8C
POWER_RESET_A 17 POWER_RESET_A
MUTE 16 MUTE
2:1F
CN1005
15 GNDD
GNDD
E 2/2 14 V+13D_UNREG B
13 GND_PO
NREG 12 V-15A
11 GND_PO
10 V+15A
D 1/19
9 GNDA
8 V+5A
7 GNDA
(HP O)
2:1D
HP_L+ 6 HP_L+
5 GNDA_HP
(HP O)
2:1D
4 HP_L-
HP_L-
E 2/2 2:1D
3 GNDA_HP
HP_R- 2 HP_R-
2:1D
AKF7002-A
1 HP_R+
HP_R+
C
GNDA_HP GND_PO GNDD GND5A
J22
V-15A
(HP O)
GND5A : HP OUT Signal (L ch)
(from REG)
F
SIS)
V+15A V+15A_UNREG V+5A V+5A_UNREG
R21
0
SQ
GND_PO 25 27 CN4
(from REG) 52147-1010
1 V+5A_UNREG
R20
GND5A_UNREG
2
D
CN5001
0 SA
3 GND5A
0.01u/50
100u/25
4 V+5A
C45
C47
5 V-15A
6 V-15A_UNREG
R18
GNDA_UNREG
O
7
N M SA STBY
8 GND_PO
9 V+15A_UNREG
0.01u/50
100u/25
C46
C48
10 V+15A
P_UNREG
GND_PO
100u/16
26
0.01u/50
C49
C50
GNDA_UNREG
22 V-15A
V-15A_UNREG
GND5A GND5A_UNREG
CN2
E
CN4801
V+15A
! KM200NA4
TH1
1 V+15A
PTGL05AS3R9K2B51
2 GND_PO
3 GND_PO
PTGL05AS3R9K2B51 TH2
A 5/5
4 V-15A
GNDHP
V-15A
!
Notes
GND_PO
NM is STBY
24
RS1/10SR***J
SQ RS1/8SQ***J
indicates the importance of the safety factor of the part.
SA RS1/4SA***J
NREG Therefore, when replacing, be sure to use parts : Voltage measuring point
D RS1/10SR****D of identical designation.
RN RN1/16SE****D : Waveform measuring point
CH CCSRCH***J F
F
CKSRYB***K F
NP CEANP F
E 1/2
CEAT F
DJM-850-K 149
5 6 7 8
1 2 3 4
10.27 SEC/HP ASSY (2/2)
A HP OUT
POST Filter AMP
C112
B 470p/50
CH
R120
3k
RN
V+15A
STBY
100p/50
V+15A TH103
R105
C103
RN
CH
15k
NM
Q101
C114 2SK209(BL)-TLB
R101 R109 C107 10u/50 STBY
3.9k 3.3k V+ 0 . 1 u / 2 5 C115 GND_PO R142
RN (HP O) 6
RN 8
470p/50
C109 R114 V+ 0 . 1 u / 2 5 NM
7 GNDA_HP (HP O)
C101
CH
2
I C 1 0 1 (2/2) 8 R126 (HP O)
4 10u/35 5.6k
R116
1 GNDA_HP
(HP O) 5 NJM4565MD NP RN
V- 470
R102 R110 0 4 I C 1 0 2 (1/2)
3 VM
V- NJM4580D
C STBY V-15A
3.9k 3.3k
RN RN V-15A R117
100p/50
R106
C104
RN
CH
15k
NM R122
STBY
1M
E 1/2 GNDA_HP
C118
NM
GNDHP
(HP O)
HP_L+
GNDA_HP
1:10D
HP_L- GNDA_HP
1:10D R125
(HP O)
C113 15k
INC2002
Q103
HP_R+ 470p/50
1:10D CH
HP_R- GNDA_HP
1:10D R121
3k
RN
100p/50
R107
C105
RN
CH
15k
D Q102
V+15A 2SK209(BL)-TLB
R103 R111
STBY
3.9k 3.3k V+ R143
RN RN 2 V+15A
8
470p/50
1 C110 R115 V+ I C 1 0 2 (2/2) NM

C102
NJM4580D
CH
6
I C 1 0 1 (1/2) 10u/35 5.6k 8 R127
7
4 NP RN R118
3 NJM4565MD
V- 470
R104 R112 4
0 5 VM
C108 V- C116
3.9k 3.3k
RN RN 0.1u/25 0.1u/25
100p/50
R108
C106
RN
CH
15k
C117 GNDA_HP
V-15A GNDA_HP STBY
TH104 10u/50
GNDA_HP NM
GND_PO
V-15A
GNDA_HP R123
STBY
1M
C119
NM
E 1/2 4-2 GNDA_HP

R124
MUTE
1:10C STBY INC2002
15k
Q104
C111
NM
GNDA_HP
R119
GNDA_HP
0
GNDHP GNDA_HP
E 2/2
150 DJM-850-K
1 2 3 4
5 6 7 8
E 2/2 SEC/HP ASSY (DWR1511) A
V+HP_UNREG V+HP_UNREG_1
STBY
P101 P102
1 2
23 1 2
RXEF075P NM
! V-HP_UNREG V-HP_UNREG_1
V+HP_UNREG_1
C120
DCH1165-A
10u 16V
Q105
C121 GNDHP
KTC3209(Y)-T
Q101 0.1u/16
2SK209(BL)-TLB
GNDHP
STBY
R142
NM
2W LMF
R128 R130
HP_L (HP O)
R126 (HP O) (HP O) C126
470 1k 33 220u/16
RN
R136
R138
VM R137 NP
SQ
SQ
C
0
R134
NM
1k
SQ
STBY
R131
C122 33
Q106 2W LMF GNDHP
KTA1281(Y)-T 0.1u/16
C125
GNDHP
125 DCH1165-A
10u 16V
15k
INC2002AC1-TLB
GNDHP
Q103 4-1 CN101
V-HP_UNREG_1 KM200NA4
(HP O)
1 HP_L_OUT
GNDA_HP
2 GNDHP G
3 GNDHP
V+HP_UNREG_1
GNDHP 4 HP_R_OUT
CN9201
Q107
KTC3209(Y)-T
C123 4-1
Q102
0.1u/16
D
2SK209(BL)-TLB
GNDHP
STBY
R143
NM
2W LMF
R129 R132 C127 HP_R
R127
470 1k 33 220u/16
RN NP
R139
R141
VM R140
SQ
SQ
0
R135
NM
1k
SQ
STBY R 1 3 3
33
C124
Q108 2W LMF
KTA1281(Y)-T
GNDHP
0.1u/16
GNDHP
E
to CHASSIS
AKF7002-A
KN101
INC2002AC1-TLB
Q104 1
V-HP_UNREG_1
GNDA_HP
Notes
NM is STBY
GNDHP
RS1/10SR***J
2W(LMF) RS2LMF***J
D RS1/10SR****D (HP O)
RN RN1/16SE****D of identical designation.
: HP OUT Signal (L ch)
SQ RS1/8SQ***J
CKSRYB***K F F
CH CCSRCH***J F : Waveform measuring point
NP CEANP F
CEAT F
E 2/2
DJM-850-K 151
5 6 7 8
1 2 3 4
10.28 USBI and HPJK ASSYS
F USBI ASSY (DWX3361) G

B
USB2.0 High speed
JA3801 V+5VBUS CN3801
DKN1237-A KM200NA5L
1 GND_USB
STBY 2 GND_USB
1
2
V+5_SUB L3801
3 D-USB
D 9/19
D-USB
3
4 D+USB CN2602
D+USB
4 NM 5 V+5VBUS
DCH1201-A
GND_USB
10V
SRCH
SRCH
100p/50
C3801
C3802
C3803
C3805
7p/50
7p/50
CH
10u
C
STBY
STBY
VA3802 NM
VA3803 NM
NM
GND_USB
C3807
100p/50
C3806
VA3801
NM
CH
GNDF KN3801
CKF1089-A
NOTES
NM is STBY
RS1/16SS***J
CKSSYB***K F
CH CCSSCH***J F
SRCH CCSRCH***J F
F
152 DJM-850-K
1 2 3 4
5 6 7 8
G HPJK ASSY (DWX3363)

B
GND_F GND_F
PHONE SHIELD:DNF1875-
HP
CN9201
KM200NA4L JA9201
DKN1622-A
(HP O) R9205 (HP O)
HP_L_OUT 1 3
E 2/2 GNDHP 2
R9204
0
0 2
GNDHP 3 1
CN101
0.22u/25
0.22u/25
C9203
C9204
4
C
HP_R_OUT
R9209
0
STBY
R9203
NM
0
VA9201
GNDHP
R9208
NM
D
(HP O)
: HP OUT Signal (L ch) C9205
0.01u/50
LA
NOTES NM is STBY
RS1/10SR***J
CKSRYB***K F
LA CFTLA***J F
GNDF
G
DJM-850-K 153
5 6 7 8
1 2 3 4
10.29 PNLA ASSY (1/2)

3-11 FL FILAMENT VOLTAGE
R6884
R6896
R6897
R6898
R6899
R6900
NM
V+3R3E
10
10
10
10
10
A
LTA114EUB
DEL1071-B V6601
FL HOLDER : DNF1869-
Q6604
PGND
FL
LGND
C6622 CH
R6901
R6902
R6903
R6904
R6905
R6906
VDD
CLK
1000p
LAT
NM
VH
BK
10
10
10
10
10
F+
V+5D_LED_PA
3-10
SI
32 F-
C6623
0.01u/50
STBY KEY
21
22
23
24
25
26
27
28
V+5D_LED_PA
SETUP(STBY) LED
C6624
(UTILITY)
R6701
0.1u/16
3-9
1u/10
V+34D_PA
R6876
NM
470
R6913 C6620 CCG1205-A RS1/4SA100J-T
F
R6616
S6601 S6602
2.2u/10 TAP
V+34D_PA
NM C6621 1/4W
12k
R6604 R6605 CCG1205-A
DSG1079-A
C6626
DSG1079-A
D6617 2.2u/10
10 10 GNDD C6646 C6647
GNDD_34D NM
(RED)
R6622
D6624
CH
SLI-343U8RC(HJKL)
NM NM
0.01u/50
10 GNDD
C6610
C6606
C6607
C6613
C6605
GNDD
0.1u/50
Q6601
NM
NM
1000p
LSA1576UB(QRS)
S6603
V+3R3D_PA GNDD
Q6602
BEAT UP
R6617
2SC5712
3-13 DSG1079-A
8.2k
D
C6648
R6610
3-12
C6619
0.1u/16
GNDD_34D
GNDD_34D NM
3-14 100p
C6614 V+3R3D_PA GNDD
S6604
3-15 100k CH GNDD
R6623
R6626
R6630
R6633
R6638
R6644
R6649
R6657
R6663
R6666
V+5D_LED V+5D_LED_PA V+3R3D V+3R3D_PA BEAT DOWN
15
15
15
15
15
15
15
15
15
15
C6615 DSG1079-A
GNDD_LED_PA C6649
100p CH
3-16
100u/16
C6616
C6602
100u/16
C6604
C6608
0.1u/16
NM
0.1u/16
C6611
34 36 100p CH
C6617
GNDD
GNDD_LED GNDD_LED_PA GNDD

100p CH
GNDD H 2/2
KEY_PNLA
V+3R3D_REFA V+3R3D_REFA_PA V+34D V+34D_PA 2:1A
B
KEY_IN0
KEY_IN1
KEY_IN2
KEY_IN3
KEY_IN4
KEY_IN5
KEY_IN6
KEY_IN7
STBY_KEY
STBY_LED
FL_SCK
C6601
FL_TXD
100u/16
FL_LAT
C6603
C6612
0.1u/16
1.0u/50
0.1u/50
FL_BK
C6728
38 37
CCG1255-A
SUB_INT
FL_SCK
FL_TXD
FL_BK
GNDD_REFA GNDD_REFA_PA
CN6601
VKN1255-A
GNDD_34D
V+3R3D
H 2/2
V+3R3D 2 4
VR_BUS
GNDD 23 2:6A
FPGA_CLK
FPGA_CLK 2 2 D6767
NM
CFX2_SW
CFX1_SW
CFX4_SW
CFX3_SW
GNDD 21
VR_IN1
VR_IN2
VR_IN4
VR_IN3
VR_IN5
VR_IN6
FPGA_TX_DAT
FPGA_TX_DAT 2 0
CN1001
D6768
NM FPGA_RX_DAT
FPGA_RX_DAT 1 9 D6769
NM FPGA_SIGNAL
FPGA_SIGNAL 1 8
VR_SEL_1_1
VR_SEL_1_0
D6770
GNDD 17 NM
SUB_INT
SUB_INT 1 6
SUB_CTRL 1 5
NM
D6766
SUB_CTRL V+3R3D_PA 3-1 V+3R3D_PA
22
1k
1k
1k
1k
1k
1k
D6765
0
NM SUB_CPU_RESET
NM
100
SUB_CPU_RESET 1 4
22
D6764
R6643
R6656
NM
GNDD 13 R6615
DCH1201-A
R6912
R6883
R6870
R6871
R6872
R6873
R6874
R6875
VR_TRIM4
C6625
C6627
R6659
CH4_TRIM 1 2 V+3R3D_REFB_PA V+3R3D_PA
10u/10
22
GNDD
0.1u/16
VR_FADER4
10k
D 1/19
VR_FADER4 1 1
VR_TRIM3
R6650
CH3_TRIM 1 0
R6637
LCTAW330J2520-T
10k
10k
10k
GNDD GNDD
0.1u/16
GND_REFA 9 L6601
VR_TRIM2
8 33u
C CH2_TRIM
R6645
R6632
R6642
VR_FADER3
10k
C6640
C6720
C6721
C6722
C6723
C6724
C6725
VR_FADER3 7
0.01u/50
0.01u/50
100u/16
C6643
0.01u/50
0.01u/50
0.01u/50
0.01u/50
0.01u/50
0.1u/16
C6644
C6645
VR_TRIM1
R6664
R6670
R6689
R6690
R6691
R6693
R6694
R6696
R6697
R6699
CH1_TRIM 6
100k
100k
100k
100k
100k
100k
100k
100k
100k
100k
GND_REFA 5 0
CROSS_FADER
77 R6651
CROSS_FADER 4
R6713
100k
VR_FADER2
VR_FADER2 3
VR_FADER1
VR_FADER1 2 GNDD
80
79
78
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
V+3R3D_REFA EFX_CH_SEL GNDD_REFB_PA V+3R3D_PA
V+3R3D_REFA 1 10k
P131/TI06/TO06
AVSS
P03/SI10/RxD1/SDA1
P20/ANI0
P21/ANI1
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P27/ANI7
P04/xSCK10/SCL1
P150/ANI8
P151/ANI9
P140/PCLBUZ0/INTP6
P130
P142/xSCK20/SCL2
P143/SI20/RxD2/SDA2
P152/ANI10
P153/ANI11
P154/ANI12
P155/ANI13
P156/ANI14
P157/ANI15
R6911
P144/SO20/TxD2
P141/PCLBUZ1/INTP7
P02/SO10/TxD1
P145/TI07/TO07
P00/TI00
P01/TO00
FPGA_SIGNAL 81 50 R6703
22 82 49
GNDD_REFA R6612
FL_LAT 83 48
V+5D_LED R6704
FPGA_TX_DAT R6613 22 R6625 47
84 10k
R6665 220 100k 46 R6705
V+5D_LED 1 7 FPGA_RX_DAT 85 AVREF0 100k KEY_MTX_SEL7
P10/EX24/xSCK00
P111/ANO1 R6706
FPGA_CLK R6614 45 KEY_MTX_SEL6
CN1002
GNDD_LED 1 6 100 86 100k

P110/ANO0 P11/EX25/Si00/RxD0
R6667 220 R6707
V+5D_LED 1 5 SUB_CTRL R6618 87 P120/INTP0/EXLVI AVREF1 44
100k KEY_MTX_SEL5
P47/INTP2 P12/EX26/SO00/TxD0
V+3R3D_PA 10k 43 R6708
GNDD_LED 1 4 100 88 KEY_MTX_SEL4
3-2 P46/INTP1/TI05/TO05 100k
P41/TOOL1 P13/EX27/TxD3
R6619 P45/SO01 R6709
STBY
V+5D_LED 1 3 10k 89 42 KEY_MTX_SEL3

100k
R6608
C6629 P40/TOOL0 P44/SI01 P14/EX28/RxD3

R6710
R6611
IC6601
NM
GNDD_LED 1 2 0.01u/50 90 P43/xSCK01 41 KEY_MTX_SEL2

100k
xRESET P15/EX29/RTCDIV/RTCCL
R6620 10k P42/TI04/TO04 R6711
V+5D_LED 1 1 100 91 40 KEY_MTX_SEL1
100k
P124/XT2 EVSS0 P16/EX30/TI01/TO01/INTP5
GNDD_LED R6621 39 R6712
GNDD_LED 1 0 92 KEY_MTX_SEL0
GNDD 9 V+34D
10k
R6609 10k
93
P123/XT1
FLMD0
VDD
EVDD0
SUB uCOM P17/EX31/TI02/TO02
P57/EX15
38
100k
P56/EX14 37
V+34D 8 94 LED_O
P122/X2/EXCLK DYW1809- /J P55/EX13
D 1/19
P77/EX23/KR7/INTP11
P76/EX22/KR6/INTP10
SUB_CPU_RESET
P31/TI03/TO03/INTP4
R6629
P75/EX21/KR5/INTP9
P74/EX20/KR4/INTP8
GNDD 7 95 P54/EX12 36 LED_O

UPD78F1162AGF-GAS-K
P30/INTP3/RTC1HZ
H 2/2
P121/X1
P53/EX11
GNDD_34D 6 NM 96 35 LED_O
R6624
3-3
C6631 REGC P52/EX10
GNDD EFX_ON/OFF 1u/10
0
P51/EX9 34
P73/EX19/KR3
P72/EX18/KR2
P71/EX17/KR1
P70/EX16/KR0
EFX_ON/OFF 5 97 LED_O
20MHz
P05/CLKOUT
VSS P50/EX8
MVR_MUTE 33
P06/xWAIT
MVR_MUTE 4 98 LED_O
P65/xWR0
P66/xWR1
P61/SDA0
P67/ASTB
2:12H
P60/SCL0
X6601
P64/xRD
P80/EX0
P81/EX1
P82/EX2
P83/EX3
P84/EX4
P85/EX5
P86/EX6
P87/EX7
V+3R3E 3 V+3R3E 99 32 LED_O
D
EVDD1
EVSS1
STBY_KEY VSS1167-A
STBY_KEY 2 100 31 LED_
P62
P63
STBY_LED CH CH
STBY_LED 1 C6634 C6635
ENC1_1
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
6p/50 6p/50
CN6602
VKN1248-A
35 ENC1_0
V+3R3D_PA
GNDD_34D GNDD
R6652
R6601
R6672
R6606
10k
10k
10k
10k
C6642
0.1u/16
C6628
0.1u/16
V+3R3D
100k
100k
STBY VKN1933-A
RESET_OUT
RESET_IN
R6684
R6686
CFX_BEAT_SW1
CFX_BEAT_SW2
CFX_BEAT_SW3
CFX_BEAT_SW4
RxD
FLMDO
CLK_IN
LED_MTX_SEL0
LED_MTX_SEL1
LED_MTX_SEL2
LED_MTX_SEL3
LED_MTX_SEL4
LED_MTX_SEL5
LED_MTX_SEL6
LED_MTX_SEL7
GNDD GNDD
VR_SEL_0_1
VR_SEL_0_0
Debugger GNDD
LED_OUT8
LED_OUT7
LED_OUT6
LED_OUT5
LED_OUT4
LED_OUT3
LED_OUT2
LED_OUT1
LED_OUT0
Connector
CN6603
VKN1258-A
V+5D_LED_PA
S6605
LED_OUT15 2 7
LED_OUT15
H 2/2 CFX1_SW
R6909
NM
LED_MTX_SEL7A DSG1
LED_MTX_SEL7A 2 6 C6
VR_SEL_0_1
GND_LED 2 5 2:6F
E GNDD_LED_PA N
R6910
CH_FADER_LED 2 4 VR_SEL_0_0
NM
2:6F S6606
NM
GNDD 2 3
Q6660
CFX2_SW
EFX_CH_SEL
H 2/2
C6729
NM
EFX_CH_SEL 2 2 DSG1
KEY_IN3 C6
KEY_IN3 2 1
R6602 ENC1_1
Q6659
ENC1_1 2 0 CH1 TRIM CH2 TRIM CH3 TRIM CH4 TRIM N

NM
CN7001
22
KEY_IN4
KEY_IN4 1 9 V+3R3D_REFA_PA V+3R3D_REFA_PA V+3R3D_REFA_PA V+3R3D_REFA_PA S6607
R6603 ENC1_0 GNDD_LED_PA CFX3_SW
ENC1_0 1 8
22 DSG1
KEY_IN5 C6609 C6654 C6655 C6632
KEY_IN5 1 7 VR6621 VR6622 VR6623 VR6624 C6
KEY_MTX_SEL3
KEY_MTX3 1 6 CH FADER LED 2 0.1u/16
3 1
2 0.1u/16
3 1
2 0.1u/16
3 1
2 0.1u/16
3 1 N
KEY_IN6 1 5
KEY_IN6 DRIVE CIRCUIT 5 5 5 5
KEY_MTX_SEL4 S6608
6 4 6 4 6 4 6 4 CFX4_SW
KEY_MTX4 1 4
KEY_IN7
(STBY)
VR_TRIM2
VR_TRIM1
VR_TRIM3
VR_TRIM4
DCS1086-A DCS1086-A DCS1086-A DCS1086-A DSG1

KEY_IN7 1 3
KEY_MTX_SEL5 C6
KEY_MTX5 1 2
EFX_ON/OFF GNDD_REFA_PA GNDD_REFA_PA GNDD_REFA_PA GNDD_REFA_PA N
I
EFX_ON/OFF 1 1
GNDD_REFB_PA 1 0
GNDD_REFB_PA S6631
VR_FADER2
VR_FADER3
VR_FADER4
VR_FADER1
GNDD 9
CFX_BEAT_SW1
GNDD HP_MIX 2:6H
HP_MIX 8 HP_MIX DSG1
CROSS_FADER
7 C6
CROSS_FADER V+3R3D_REFA_PA V+3R3D_REFA_PA
2:7H V+3R3D_REFA_PA V+3R3D_REFA_PA
HP_LEVEL 6 N
HP_LEVEL
V+3R3D_REFA_PA
V+3R3_REFA_PA
LEVEL_DEPTH
5
4
2:7H H 2/2 Conn.coler:WHITE Conn.coler:RED Conn.coler:BLUE Conn.coler:YELLOW
CFX_BEAT_SW2
S6632
D6615
D6618
D6620
D6622
LEVEL/DEPTH
NM
NM
NM
NM
DSG1
GNDD_REFA_PA 3 GNDD_REFA_PA 3 GNDD_REFA 3 V+3R3D_REFA 3 GNDD_REFA 3 V+3R3D_REFA C6
2:6H
BOOTH_LEVEL 2 2 VR_FADER1 2 VR_FADER2 2 VR_FADER3 2 VR_FADER4
BOOTH_LEVEL N
C6618
V+3R3D_REFB_PA
D6616
C6630
D6619
C6633
D6621
C6641
D6623
0.1u/16
0.1u/16
0.1u/16
0.1u/16
NM
NM
NM
1
NM
V+3R3_REFB_PA 1 V+3R3D_REFA 1 GNDD_REFA 1 V+3R3D_REFA 1 GNDD_REFA

S6633
CFX_BEAT_SW3
CN6611 CN6610 CN6612 CN6609
F KM200NA3 KM200NA3R KM200NA3E KM200NA3Y
DSG1
C6
GNDD_REFA_PA GNDD_REFA_PA GNDD_REFA_PA GNDD_REFA_PA
N
S6634
CFX_BEAT_SW4
DSG1
H 1/2
C6
K CN7201 L CN7401 M CN7601 N CN7801 N
154 DJM-850-K
1 2 3 4
5 6 7 8
V+5D_LED_PA
H 1/2 PNLA ASSY (DWX3359) A
V+5D_LED_PA
C6656
V+5D_LED_PA
0.1u/16
V+5D_LED_PA
V+5D_LED_PA
C6657
V+5D_LED_PA
0.1u/16
R6765
22k
V+5D_LED_PA
2SB1689
Q6623
C6658
V+5D_LED_PA
0.1u/16
R6771
22k
R6766
V+5D_LED_PA
390
2SB1689
Q6625
S6602
TAP
LTC143EUB
C6659
V+5D_LED_PA
0.1u/16
R6777
22k
R6772
Q6622
V+5D_LED_PA
390
DSG1079-A LED_MTX_SEL1
2SB1689
Q6627
C6647
2SB1689 C6660
V+5D_LED_PA
0.1u/16
LTC143EUB
R6786
22k
R6778
Q6624
NM
390
LED_MTX_SEL2
2SB1689
GNDD
Q6629
C6661
LTC143EUB
R6794
C6662
C6663
0.1u/16
0.1u/16
0.1u/16
22k
R6787
S6603
Q6626
Q6628 390
LED_MTX_SEL3
BEAT UP
Q6631
LTC143EUB
R6821
R6826
DSG1079-A
R6802
22k
22k
22k
R6795
C6648
2SB1689
2SB1689
390
2SB1689
LED_MTX_SEL4
Q6635
Q6637
Q6633
LTC143EUB
NM
R6803
GNDD
R6822
R6827
Q6630
Q6632 390
390
390
LED_MTX_SEL5
S6604
LTC143EUB
BEAT DOWN
LTC143EUB
SLR343BC4T(JK)
LTC143EUB
Q6634
Q6636
DSG1079-A LED_MTX_SEL6
C6649
Q6644
LSA1576UB(QRS)
NM LED_MTX_SEL7
GNDD
R6829
R6841
R6847
R6859
NM
NM
47
12
LSA1576UB(QRS)
LED_MTX_SEL0
Q6638
NOISE
(BLUE)
R6830
B
D6736
R6768 R6774 R6781 R6792 R6800 R6804 R6885 R6886
470
GNDD_LED_PA CFX1
56k 56k 56k 56k 56k 56k 56k 56k R6853
LED_MTX_SEL7A 0
LSA1576UB(QRS)
GNDD_LED_PA
R6831
R6842
R6848
R6860
NM
NM
LSA1576UB(QRS)
47
12
(RED)
LEVEL METER INDICATORS
SLI-343U8RC(HJKL)
CH1 CH2 CH3 CH4 MST L MST R SLI-343U8R(HJK) (RED)
TALK OVER
Q6639
NM Q6645
R6823 GATE
D6626
D6643
D6659
D6678
D6696
D6711
D6735
OVER (BLUE)
R6832
R6750 R6824
D6737
470
CFX2
LED_OUT0 R6729 680 220
Q6607 R6854
LSC4081UB(QRS)
3k
R6733
30k
LSA1576UB(QRS) 0
D6627
D6644
D6660
D6679
D6697
D6712
10
R6833
R6843
R6849
R6861
NM
NM
LSA1576UB(QRS)
R6751
47
12
R6715 680
LED_OUT1 Q6608
Q6640
LSC4081UB(QRS) Q6646
3k CRUSH
30k
LED_OUT1A
R6734
D6628
D6645
D6680
D6661
D6698
D6713
(BLUE)
7
R6834
470
D6738
R6752
CFX3
R6716 560 R6855
LED_OUT2 Q6605
LSC4081UB(QRS)
3k LED_OUT2A 0
30k
R6731
D6629
D6646
D6662
D6681
D6699
D6714
V+3R3D_PA
4
R6835
R6844
R6850
R6862
LSA1576UB(QRS)
NM
NM
47
12
R6753
560
Q6641
0J2520-T LED_OUT3 R6717
Q6606 Q6647
L6601 LSC4081UB(QRS)
3k LED_OUT3A FILTER
30k
R6732
33u
C
D6630
D6647
D6663
D6682
D6700
D6715
(AMBER)
2 (BLUE)
R6836
SLI-343YYW(TUV)
D6739
470
100u/16
(AMBER) CFX4
C6645
R6754
LED_OUT4 R6714 560 MIDI ON/OFF R6856

0 Q6609
LSC4081UB(QRS) SLI-343YYW(TUV)
R6735
D6648
LED_OUT4A LSA1576UB(QRS) 0
3k
30k
R6713 R6818 R6810

D6631
D6664
D6683
D6701
D6716
D6731
D6727
GNDD_LED_PA
1 NM NM FADER START1
GNDD R6764 R6815 R6811
V+3R3D_PA (AMBER)
R6718 560 68 82
LED_OUT5 Q6610
LSC4081UB(QRS)
3k
30k
R6806
R6736
D6632
D6649
D6665
D6684
D6702
D6717
D6728
FADER START2
R6755
0 NM
R6812 (AMBER)
R6705
100k KEY_MTX_SEL7 LED_OUT6 R6719 68 82
Q6611
R6706
100k KEY_MTX_SEL6 LSC4081UB(QRS)
30k
R6707 3k R6817
R6737
KEY_MTX_SEL5
D6633
D6650
D6666
D6685
D6703
D6718
D6729
100k
R6708
100k KEY_MTX_SEL4
R6756
-1 NM
R6813
FADER START3
R6709
KEY_MTX_SEL3 (AMBER)
100k
R6710 LED_OUT7 R6720 68 82
100k KEY_MTX_SEL2 Q6612 R6807
D6730
LSC4081UB(QRS)
R6738
R6711
KEY_MTX_SEL1 3k FADER START4
30k
100k NM
D6634
D6651
D6667
D6686
D6704
D6719
R6712
100k KEY_MTX_SEL0
R6757
-2 R6814
82
(AMBER)
LED_OUT15 68
LED_OUT8 R6721
Q6613
LED_OUT14 LSC4081UB(QRS)
3k
30k
D6635
D6652
D6668
D6687
D6705
D6720
LED_OUT13
R6739
LED_OUT12
R6758
-3 LED_MTX_SEL7A
R6837
R6845
R6851
R6863
LED_OUT11
NM
NM
47
12
LSA1576UB(QRS)
R6722 68
LED_OUT10 LED_OUT9 Q6614
LSC4081UB(QRS) D
Q6642
LED_OUT9
30k
3k
Q6648
R6740
D6636
D6653
D6669
D6688
D6706
D6721
(GREEN) LSA1576UB(QRS)
R6759
-5 SLR-343MC(NPQ)
BEAT1
R6838
D6740
470
68 SLR343BC4T(JK)
R6723 (BLUE)
LED_OUT10 Q6615
R6857
LSC4081UB(QRS)
30k
3k
R6741
D6637
D6654
D6670
D6689
D6707
D6722
R6760
-7
R6839
R6846
R6852
R6864
NM
NM
47
12
LSA1576UB(QRS)
68
R6724
LED_OUT11 Q6616
Q6649
30k
3k
D6638
D6655
D6671
D6690
D6708
D6723
LSA1576UB(QRS)
R6742
R6761
-10
R6840
D6741
470
GNDD 68
SLR343BC4T(JK) BEAT2
LED_OUT12 R6725
Q6617 R6858 (BLUE)
LSC4081UB(QRS) R6816
3k
30k
TAP
D6639
D6656
D6672
D6709
D6691
D6724
0
R6743
-15 NM
D6732
R6805 (E-GREEN)
R6634
R6631
R6635
R6636
R6762
NM
NM
47
12
LSA1576UB(QRS)
82
68
LED_OUT13 R6726
Q6618 SLR343EC4T(LMN)
Q6655
30k
R6744
3k LSA1576UB(QRS)
D6640
D6657
D6673
D6692
D6710
D6725
-24 D6726
R6639
R6763
470
SLR343BC4T(JK)
68
BEAT3
S6605 LED_OUT14 R6727 R6819
Q6619
CFX1_SW (BLUE)
CFX1 LSC4081UB(QRS)
R6745
D6677
3k
30k
DSG1079-A 0
D6625
D6641
D6642
D6658
D6674
D6676
D6693
D6695
D6675
D6694
D6601
C6650
NOISE
R6647
R6640
R6641
R6646
NM
NM
E
47
12
R6767
R6775
R6782
R6793
NM
LSA1576UB(QRS)
S6606 GNDD
82
82
82
82
82
82
82
82
82
82
82
82
R6783
NM R6791
R6797
R6628
Q6656
R6627
R6769
R6770
NM R6773
R6776
R6779
NM R6780
R6784
R6788
NM R6790
R6796
R6798
NM R6801
R6785
R6789
R6799
CFX2_SW Q6658
CFX2 LSA1576UB(QRS)
DSG1079-A
NM
NM
NM
C6651
NM
NM
NM
NM
GATE BEAT4
R6648
D6734
470
NM
SLR343BC4T(JK) (BLUE)
S6607
GNDD LSC4081UB(QRS)
R6808
CFX3_SW Q6621
CFX3 CH1 CUE CH2 CUE CH3 CUE CH4 CUE MAS CUE EFX CUE
R6749
R6730
LED_OUT15
LED_OUT1A
LED_OUT2A
LED_OUT3A
0
LED_OUT4A
DSG1079-A
1k
C6652 (AMBER) (AMBER) (AMBER) (AMBER) (AMBER) (AMBER)

CRUSH
30k
R6747
3k
NM
GNDD
S6608 DIMLY LIGHTS (AMBER) GNDD_LED_PA
CFX4_SW
CFX4 SLI-343YYW(TUV)
DSG1079-A
C6653
FILTER GNDD_LED_PA
NM
GNDD
S6631
CFX_BEAT_SW1
DSG1079-A CFX_BEAT1
C6636
NM
ELLOW S6632
GNDD NOTES
CFX_BEAT_SW2
CFX_BEAT2
DSG1079-A NM is STBY
3D_REFA C6637
ADER4 RS1/10SR***J
NM
D_REFA GNDD D
CFX_BEAT_SW3
S6633
CFX_BEAT3 F
RS1/10SR****D
DSG1079-A
C6638
RS1/10SR****F
F
NM
CKSRYB : Waveform measuring point
S6634
GNDD CH
CCSRCH
CFX_BEAT_SW4
DSG1079-A CFX_BEAT4
CEAT
H 1/2
C6639
7801 NM
GNDD
DJM-850-K 155
5 6 7 8
1 2 3 4
10.30 PNLA ASSY (2/2)
H 1/2
A
1:4C
KEY_PNLA H 1/2
VR_BUS
1:9D
KEY_MTX_SEL7
KEY_MTX_SEL6
KEY_MTX_SEL2
VR_SEL_1_0
KEY_MTX_SEL1
VR_SEL_1_1
KEY_MTX_SEL0
IN4 SELECT IN2 SELECT
USB(7/8) S6613 S6615 USB(3/4)
7 6 5
7 6 5
3 2 1
3 2 1
B MIDI
PHONO LINE
ON/OFF AUTO
8
8
4
4
CD/LINE S6623 S6625
CD/LINE DSK1026-A DSK1026-A
DSG1079-A DSG1079-A
1SS352 VR_IN2
1SS352
D6745
D6771
D6746
D6772
1SS352
1SS352
1SS352
1SS352
D6757
D6760
470p
470p
470p
KEY_IN0
C6668
C6671
C6673
MIC ON/OFF
/TALKOVER
G
TALK OVER S6612 VR_IN1

7 6 5
3 2 1
ON MIDI
START/STOP EFX CUE
C
8
S6624 S6627
OFF DSK1026-A DSG1079-A DSG1079-A
1SS352
D6744
1SS352
D6743
1SS352
1SS352
D6758
D6762
KEY_IN1
IN3 SELECT IN1 SELECT

S6614 S6616
USB(5/6) USB(1/2)
7 6 5
7 6 5
3 2 1
3 2 1
LINE PHONO VR_IN4

8
8
4
CD/LINE
CD/LINE DSK1026-A DSK1026-A
470p
470p
470p
1SS352
1SS352
D6773
D6774
D6747
D6775
1SS352
1SS352
C6667
C6670
C6672
KEY_IN2 BEAT EFX
SELECT VR_IN3
S6622
DSX1068-A
S6644 S6617
DSG1079-A DSG1079-A
CH4 FADER START CH4 CUE V

H 1/2
1SS352
D6778
1SS352
D6752
1 2 3 4 5 V
1 2 3 4 5
KEY_IN3
S6643 S6618
D6756
DSG1079-A DSG1079-A
1SS352
CH3 FADER START CH3 CUE
1SS352
D6777
1SS352
D6753
VO
E SE
KEY_IN4 D6751
S6642 1SS352
DSG1079-A S6619
DSG1079-A
CH2 FADER START VR_IN6

CH2 CUE
1SS352
D6776
1SS352
D6754
470p
470p
470p
470p
KEY_IN5 D6750
S6641 1SS352
DSG1079-A S6620
C6664
C6665
C6666
C6669
CH1 FADER START CH1 CUE DSG1079-A

1SS352
D6742
1SS352
D6755
KEY_IN6 D6749 GNDD_R

VR_IN5
S6621 1SS352
S6628
DSH1066-A DSG1079-A
F MASTER
1 C2 3
MONO/ST
1SS352
1SS352
MASTER CUE
D6759
D6763
MONO STEREO
H 2/2 KEY_IN7
156 DJM-850-K
1 2 3 4
5 6 7 8
NOTES
NM is STBY
RS1/10SR***J
H 2/2 PNLA ASSY (DWX3359) A
D
RS1/10SR***D
F
RS1/10SR***F
CH2 EQ MID CH2 EQ HI CH1 EQ HI CH1 EQ MID
CKSRYB
V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA
CH
CCSRCH
C6699 C6704 C6709 C6716
VR6603 VR6608 VR6611 VR6618
CEAT
0.1u/16 0.1u/16 0.1u/16 0.1u/16
EL_1_0 2 2 2 2
3 1 3 1 3 1 3 1
SEL_1_1 5 5 5 5
6 4 6 4 6 4 6 4
DCS1100-A DCS1100-A DCS1100-A DCS1100-A

GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA
V+3R3D_REFB_PA
VOLUME
SELECT 0.1u/16
MIC EQ HI MIC EQ LOW CH1 CFX CH1 EQ LOW
C6680
V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA

IC6604 B
1 16
0Y VCC C6701 C6710 C6719 C6714
VR6605 VR6612 VR6620 VR6616
2 15 GNDD_REFB_PA
2Y 2X 0.1u/16 0.1u/16 0.1u/16 0.1u/16
N2 3 14
2 2 2 2
Y_COM 1X 3 1 3 1 3 1 3 1
4 13 5 5 5 5
3Y X_COM 6 4 6 4 6 4 6 4
5 12
1Y 0X DCS1095-A DCS1100-A
DCS1100-A DCS1100-A
6 11
470p
470p
470p
470p
INH 3X GNDD_REFB_PA
7 10
GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA
470p/50
470p/50
470p/50
470p/50
VEE A
8 9
C6668
C6671
C6673
C6675
GND B
C6689
C6696
C6692
C6694
C6682
C6684
NM
NM
TC74HC4052AF
GNDD_REFB_PA MASTER LEVEL CH4 EQ HI CH3 EQ HI CH3 EQ MID

GNDD_REFB_PA GNDD_REFB_PA
N1 V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA
V+3R3D_REFB_PA
DCS1096-A
C6702 C6707 C6715

VR6607
C6703 VR6606 VR6609 VR6617

0.1u/16 0.1u/16 0.1u/16 0.1u/16
2 2 2
3
3 1 3 1 3 1
C
2
5 5 5
6 4 6 4 6 4
1
DCS1100-A DCS1100-A DCS1100-A
GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA GNDD_REFB_PA
V+3R3D_REFB_PA
VOLUME
SELECT
CH3 EQ LOW CH2 EQ LOW CH2 CFX CH3 CFX
0.1u/16
C6679
IC6603 V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA V+3R3D_REFB_PA
1 16
0Y VCC C6712 C6700 C6708 C6718
VR6614 VR6604 VR6610 VR6619
2 15 GNDD_REFB_PA
2Y 2X 0.1u/16 0.1u/16 0.1u/16 0.1u/16
N4 2 2 2 2
3 14
Y_COM 1X 3 1 3 1 3 1 3 1
4 13 5 5 5 5
3Y X_COM 6 4 6 4 6 4 6 4
5 12
1Y 0X DCS1095-A
DCS1100-A DCS1100-A DCS1095-A
6 11
470p
470p
470p
470p
INH 3X GNDD_REFB_PA GNDD_REFB_PA

7 10
470p/50
VEE A
470p/50
470p/50
D
470p/50
8 9
C6667
C6670
C6672
C6674
GND B
C6687
C6690
C6695
C6693
C6681
C6683
NM
NM
TC74HC4052AF
GNDD_REFB_PA MASTER BALANCE CH4 CFX CH4 EQ LOW

GNDD_REFB_PA GNDD_REFB_PA CH4 EQ MID
N3
V+3R3D_REFB_PA V+3R3D_REFB_PA
V+3R3D_REFB_PA
V+3R3D_REFB_PA
C6713 C6711
C6698
DCS1097-A
VR6615 C6697 VR6613

0.1u/16 VR6601 0.1u/16
VR6602
VR_SEL_0_0 0.1u/16
3
2 0.1u/16 2
H 1/2 3 1 3 1
2
1:7J 2
5 3 1 5
VR_SEL_0_1
1
6 4 5 6 4
1:7J
6 4
DCS1095-A DCS1100-A
GNDD_REFB_PA DCS1100-A
GNDD_REFB_PA
V+3R3D_REFB_PA
V+5D_LED_PA V+3R3D_REFB_PA
VOLUME
SELECT R6869 MASTER VOLUME MUTE E
0.1u/16
C6676
10k
IC6602
R6865
R6866
R6868
V+5D_LED_PA
1. OUTPUT1 8. V
NM
1M
22k
1 16 IC6605
0Y VCC 2. -INPUT1 7. OUTPUT2
R6683
2
2Y 2X
15 GNDD_REFB_PA 1 8 3. +INPUT1 6. -INPUT2
N6 3 14 0
R6682
2 7 4. GND 5. +INPUT2
Y_COM 1X Q6650
C6717
0.1u/16
4 13 0 LTA143EUB 3 6
3Y X_COM
R6681
5 12 4 5
1Y 0X
R6867
C6705
C6706
0.1u/16
0.1u/16
R6680
6 11
470p
470p
470p
470p
0
1k
INH 3X
7 10 0 NJM2903M
VEE A
470p/50
470p/50
470p/50
470p/50
8 9
C6664
C6665
C6666
C6669
GND B
H 1/2
C6685
C6686
C6688
C6691
C6677
C6678
NM
NM
TC74HC4052AF GNDD_REFB_PA GNDD_LED_PA

MVR_MUTE
1:2F
GNDD_REFB_PA
N5 GNDD_REFB_PA GNDD_REFB_PA
1:2K
BOOTH_LEVEL
1:2K
F
LEVEL/DEPTH
H 1/2 1:2K
HP_LEVEL
1:2K
HP_MIX
H 2/2
DJM-850-K 157
5 6 7 8
1 2 3 4
10.31 PNLB and FADC ASSYS
HP_MIX
A I PNLB ASSY (DWX3365) HP_LEVEL
V+3R3_REFB_PB
LEVEL DEPTH BOOTH
DCS1096-A
V+3R3_REFB_PB V+3R3_REFB_PB
V+3R3
DCS1096-A
VR7001
C7008 C7010
DCS1097-A
C7012
VR7004
VR7003 C7
VR7002
0.1u/16 0.1u/16
3
0.1u/16
3
DCS1100-A 0.1u/1
3
2
2
3 1
1
1
5
1
6 4
BOOTH_LEVEL
LEVEL_DEPTH
GNDD_REFB_PB GNDD_REFB_PB
GNDD_REFB_PB
HP_LEVEL
HP_MIX
V+3R3_RE
B
CH SELECTOR C7016
0.1u/1
EFX_CH_SEL
R7021 R7020
220
330
R7027 R7026 R7025 R7024 R7023 R7022
S7002
390
TIME 2
3
S7001
510
DSX1064-A 4
3 COM
ENC1_1
2 B
1 5
750
10 6
ENC1_0
1 A
R7013
7
2.2k
0.01u/50
0.01u/50
C7007
C7009
8
1.1k
9
DSG1098-A
C CN7001
1.8k
GNDD_REFB_PB
VKN1258-A
LED_OUT15 GNDD
3.6k
LED_OUT15 2 7
LED_MTX_SEL7_A
LED_MTX_SEL7A 2 6
SLI-
GND_LED 2 5 LED_MTX_SEL7_A
CH_FADER_LED
CH_FADER_LED 2 4 EFFE
GNDD 2 3
D7005
D7007
EFX_CH_SEL
EFX_CH_SEL 2 2
KEY_IN3
KEY_IN3 2 1
ENC1_1
ENC1_1 2 0
R7018
R7019
R7028
R7029
150
150
150
KEY_IN4
KEY_IN4 1 9
ENC1_0
ENC1_0 1 8
KEY_IN5
CN6603
KEY_IN5 1 7
KEY_MTX_SEL3
KEY_MTX3 1 6
KEY_IN6
KEY_IN6 1 5
KEY_MTX_SEL4
KEY_MTX4 1 4
KEY_IN7
D KEY_IN7 1 3
KEY_MTX_SEL5
LED_OUT15 R7002
Q7002
KEY_MTX5 1 2 LSC4081UB(QRS)
H 1/2
3k
EFX_ON/OFF
R7004
EXF_ON/OFF 1 1
30k
GNDD_REFB_PA 1 0
GNDD 9
HP_MIX
HP_MIX 8
CROSS_FADER
CROSS_FADER 7 GNDD_LED
HP_LEVEL
HP_LEVEL 6
V+3R3_REFA
V+3R3_REFA_PA 5
LEVEL_DEPTH
LEVEL_DEPTH 4
V+3R3_REFB
GNDD_REFA_PA 3
BOOTH_LEVEL Q7011 Q7012 Q7013 Q7014
BOOTH_LEVEL 2 NM NM NM
CH_FADER_LED NM
V+3R3_REFB_PA 1
R7039
R7032
R7033
R7030
R7031
R7037
R7034
R7038
R7035
R7036
NM
NM
NM
NM
NM
NM
NM
NM
NM
0
GNDD GNDD_LED
Q7001
GNDD_REFB
NM
E
GNDD_REFA
R7040
D7001 D7002 D7003 D7004

NM NM NM NM
R7041
V+3R3_REFA V+3R3_REFA_PB V+3R3_REFB V+3R3_REFB_PB
FADER LED1 FADER LED2 FADER LED3 FADER LED4 GNDD_LED

40 39
C7005
C7004
C7006
47u/25
C7002
47u/25
CH FADER LED CIRCUIT (STBY)

0.1u/16
0.1u/16
GNDD_REFA GNDD_REFA_PB GNDD_REFB GNDD_REFB_PB
I
158 DJM-850-K
1 2 3 4
5 6 7 8
TH BOOTH LEVEL
A
DCS1096-A V+3R3_REFB_PB
VR7004
C7015
0.1u/16
3
2
1
BOOTH_LEVEL
B_PB
GNDD_REFB_PB
KEY_MTX_SEL5
V+3R3_REFB_PB KEY_MTX_SEL4
B
LECTOR C7016
0.1u/16 KEY_MTX_SEL3
HP MONO/ST
R7021 R7020
S7014
220
S7008 DSH1066-A
DSH1066-A EQ/ISO
GNDD_REFB_PB
330
1SS352
D7016
R7027 R7026 R7025 R7024 R7023 R7022
2 1 C2 3
390
1SS352
D7027
1 C2 3
ISOLATOR EQ
MONO STEREO
510
4
KEY_IN3
KEY_IN7
5
750
6 CRFD ASSIGN CRFD ASSIGN CRFD ASSIGN

7 CH3 CH4 CH1
S7010 S7012 S7009
1.1k
1
D7017 D7021 D7014
1098-A A A A
C
2
1.8k
1SS352 THRU 1SS352 1SS352

THRU THRU
3
3
D7018 D7022 D7015
B B B
4
3.6k
1SS352 1SS352 1SS352
5
DSH1058-A DSH1058-A DSH1058-A
SLI-343YYW(TUV)-TS KEY_IN6
EFFECT ON/OFF
(AMBER)
D7005
D7007
R7018
R7019
R7028
R7029
150
150
150
150
KEY_IN5
CRFD ASSIGN CRFD CURVE

CH2 CHFD CURVE D
S7015
S7011 S7013
1
1
1
1SS352 D7025
D7023
2
A
2
1SS352
D7019 1SS352
THRU
3
3
1SS352 D7026
D7024
4
B
4
1SS352
D7020 1SS352
5
5
DSH1058-A DSH1058-A DSH1058-A

KEY_IN4
S7007
DSG1079-A
EFX_ON/OFF EFFECT ON/OFF
J FADC ASSY (DWX3370)

R7038
NM
C7017
NM
GNDD
R8001
E
V+3R3_REFA_PB
7004 0
NM
STBY
P8001
R7041
R7042
P7001
NM
NM
0
0
CN7002 CN8001
KM200NA3 KM200NA3L VR8001
ER LED4
1SS352 1SS352
D7012
GNDD_LED GNDD_LED DCV1006-A

CROSS_FADER 3 V+3R3REF2 V+3R3REF2 3 2
1 3
2 VR_CFD VR_CFD 2 5
C7018
D7013
4 6
0.1u/16
1 GNDREF2
GNDREF2 1
D8001
GNDD_REFA_PB
NM
STBY
NOTES NM is STBY GNDF

F
RS1/10SR****J
CKSRYB
CEAT***

I J
DJM-850-K 159
5 6 7 8
1 2 3 4
10.32 FAD1 to FAD4 ASSYS
A
K FAD1 ASSY (DWX3366)
CN7201
KM200NA3
GNDREF2 3 2
H 1/2 VR_FD1 2
1 3
5
CN6611 V+3R3REF2 1
4 6
VR7201
DCV1027-A
B
White
L FAD2 ASSY (DWX3367)
CN7401
KM200NA3R
C V+3R3REF2 3 2
H 1/2 VR_FD2 2
1 3
5
CN6610 GNDREF2 1
4 6
VR7401
DCV1027-A
Red
M FAD3 ASSY (DWX3368)

D
CN7601
KM200NA3E
V+3R3REF2 1
H 1/2 VR_FD3 2
2
3 1
CN6612 GNDREF2 3 5
6 4
VR7601
Blue DCV1027-A
E
N FAD4 ASSY (DWX3369)
CN7801
KM200NA3Y
GNDREF2 1
H 1/2 VR_FD4 2
2
3 1
CN6609 V+3R3REF2 3 5
6 4
VR7801
F Yellow DCV1027-A
K L M N
160 DJM-850-K
1 2 3 4
5 6 7 8
10.33 REG ASSY
O REG ASSY (DWR1510)

STBY
D5003 B
NM
V+15A_UNREG ! IC5002 V+15A

NJM7815FA
IN 1
OUT
3 COM
RB501V-40
0.01u/50
C5002
1000p/50
0.01u/50
C5005
C5008
C5010
C5013
D5004
0.1u/16
1u/25
SQ
V+15A_UNREG
V+15A
V+5A
V+5A_UNREG
CN5001
33 30
RB501V-40
GND_PO 31 52147-1010
1000p/50
0.01u/50
0.01u/50
C5003
C5009
C5011
C5014
D5005
0.1u/16
1u/25
C5006
C
SQ
GNDA_UNREG 28 STBY 1 V+5A_UNREG
2 GND5A_UNREG
R5001
3
3 GND5A
2 NM
COM
IN OUT 1 4 V+5A
V-15A_UNREG
! IC5003
NJM7915FA V-15A
5
6
V-15A
V-15A_UNREG
E 1/2
D5001
7 GNDA_UNREG
CN4
NM 8 GND_PO
STBY
9 V+15A_UNREG
STBY
10 V+15A
D5002
32 29
NM
V+5A_UNREG V+5A
GND5A_UNREG
! IC5001
BA05T
V-15A GND_PO
D
1 OUT GND5A
VCC
GND 3
V-15A_UNREG
CCG1205-A
2 STBY
10V
0.01u/50
C5001
GNDA_UNREG
1000p/50
0.01u/50
C5004
C5015
C5007
C5012
C5016
0.1u/16
NM
2.2u
GND5A_UNREG GND5A


indicates the importance of the safety factor of the part. Notes
Therefore, when replacing, be sure to use parts NM is STBY
of identical designation.
CH CCSRCH***J F
SQ CKSQYB***K F
CKSRYB***K F
O
DJM-850-K 161
5 6 7 8
1 2 3 4
10.34 TRANS, PRIMARY and ACSW ASSYS
A
Q PRIMARY ASSY
(DWR1519: SYXJ8,KXJ5,XJCN5)
AC POWER CORD AC INLET
ADG7062: SYXJ8,LXJ DKP3916: SYXJ8, KXJ5, XJCN5, LXJ (DWR1520: UXJCB)
ADG7115: KXJ5
ADG7105:
DDG1108:
XJCN5
UXJCB
DKP3915: UXJCB
(DWR1509: LXJ)
! ! AC IN FILTER
! ! !
AC POWER CODE AC INLET CN3001 C3001 ! L3001
C3003
RKP1751-A ACE7027-A ACG7030-A
DTL1131-A
4 3
NEUTRAL 2
LIVE 1
H3002
AKR1004-A 1 2
H3001
AKR1004-A
FU1
B ! AEK1052- 5-1
J3009 OTHERS
R ACSW ASSY (DWR1515) J3008 LXJ ONLY
4
VOLTAGE SELECTOR
LX
STBY !
POWER SW C3002
S3001
AKX7020-A
! ! NM
1
1
JP9401 CN3002 V+11E_UNREG
B2P3-VH AC220V-240V AC
! RY3001
VIOLET ASR7029-A
1
C9401
S9401
DSA1037-A ACG7030-A
2
RELAY 3
J3007
! 3300p BLUE
2
OTHERS
! 4 1
2
D3002
Board in Cable
C DKP3847-A
1SS352
R3002
33
STBY
R3001
! NM
Q3001
KTC3209(Y)
COVER FOR "C9401":DEC3212- D3001
STBY
R3003
NM
1SS302
R3004
(F)
10
GNDD
R3005
12
(F)
D GNDD
• NOTE FOR FUSE REPLACEMENT

CAUTION - FOR CONTINUED PROTECTION AGAINST RISK OF FIRE,
REPLACE ONLY WITH SAME TYPE NO. 218.630 MFD. BY
LITTELFUSE INC. FOR FU1.

of identical designation. LXJ ONLY
E JP3101 !
DDX1285-A
VIOLE
NEUTRAL
BROW
110V~120V
BLUE
220V~240V
: Waveform measuring point JP3102
DDX1284-A
VIOLE
NEUTRAL
F
NOTES !
NM is STBY LIVE
BLUE
CKSRYB
P Q R OTHERS
162 DJM-850-K
1 2 3 4
5 6 7 8
SUB TRANS
T3001
DTT1245: SYXJ8, KXJ5, XJCN5
DTT1255: UXJCB STBY C3010 C3008 STBY
DTT1242: LXJ
NM NM
! 11
D3005 STBY V+11E_UNREG
1 10 D3003
1SR154-400 1SR154-400 P3001 5-2 JP3001
9 PF03PG-Q07
2 ! ! NM
8
3 7
3 V+11E_UNREG
D 2/19
CEAT222M25-F
! ! 2 GNDD
D3004
2200u/25
6 D3006
0.01u/50
C3006
C3007
4
5 1SR154-400 1SR154-400
1 RELAY_CONT
CN1201 B
0.047u/50
0.047u/50
C3004
C3005
C3011 C3009
J3009 OTHERS
NM NM
STBY STBY
J3008 LXJ ONLY KN3001
AKF7002-A
6
LXJ ONLY GNDD

1
! J3005
S3001 (USE)
AKX7020-A
3
AC220V-240V AC110V-120V
GNDF
J3007
OTHERS
LXJ ONLY
!
NOTES
CN3003 NM is STBY C
B3P5-VH
RS1/10SR***J
3 220 240V
(F)
2 110 120V RS1/10SR****F
1 NEUTRAL
CKSRYB
Y)
!
CN3004
B2P3-VH
2 LIVE
1 NEUTRAL
OTHERS
P TRANS ASSY
(DWR1516: SYXJ8,KXJ5,XJCN5)
(DWR1517: UXJCB)
(DWR1512: LXJ)
T3101
DTT1256: SYXJ8, KXJ5, XJCN5 S13B-EH
!
DTT1257: UXJCB
DTT1256: LXJ
CN3101
20 P3100
V+15_AC
C3101 13 V+15_AC
6 19
NM V+5A_AC1 0.1u/50
12 NC
18
V+5A_AC2
ONLY P3101 NM
C3102 11 V+5A_AC1
17
JP3101
0.1u/50
10 V+5A_AC2
E
! 16
P3102
C3103
X1285-A NM 0.1u/50
9 NC
5 15 V-15_AC
VIOLET
EUTRAL
P3103 NM
C3104
0.1u/50
8
7
V-15_AC
GNDA
E 1/2
13 C3105
3
V+13D_AC1 NM
C3106 6 V+13D_AC1 CN1
BROWN 0.1u/50
0V~120V C3107 5 V+13D_AC2
14
V+13D_AC2 0.1u/50
4 GNDD
11 C3108
NM
3 GNDHP
2 C3109
BLUE V+HP_AC NM
0V~240V C3110 2 V+HP_AC
12 NM
P3104 0.1u/50
1 V-HP_AC
C3111
P3102 0.1u/50
X1284-A 10 V-HP_AC
VIOLET JP3105
EUTRAL P3105 NM DE007WF0
GNDHP
! GNDA GNDD
F
LIVE
BLUE MAIN TRANS GNDF
ERS P Q
DJM-850-K 163
5 6 7 8
1 2 3 4
10.35 WAVEFORMS
Measurement Conditoion
A
IN or OUT Measure CH IN CH IN LEVEL IN FREQUENCY RL Other Settings Other Settings
IN CD CH1/2/3/4 0 dB 1K − TRIM LEVEL VR Center −
IN LINE CH2/3 0 dB 1K − TRIM LEVEL VR Center −
IN PHONO CH1/4 -40 dB 1K − TRIM LEVEL VR Center −
IN MIC MIC -40 dB 1K − TRIM LEVEL VR MAX Center all EQs
IN RETURN RETURN 0 dB 1K − Level depth VR Center −
IN USB USB1/2/3/4 0 dB 1K − TRIM LEVEL VR Center −
OUT MASTER1/2 CH1/CD 0 dB 1K 10 kΩ MASTER LEVEL VR Center Center all EQs/FADER Max
OUT BOOTH CH1/CD 0 dB 1K 10 kΩ BOOTH LEVEL VR Center Center all EQs/FADER Max
OUT REC CH1/CD 0 dB 1K 10 kΩ − Center all EQs/FADER Max
OUT SEND CH1/CD 0 dB 1K 10 kΩ − Center all EQs/FADER Max
B OUT HP CH1/CD 0 dB 1K 32 Ω HP LEVEL Center Center all EQs/FADER Max
OUT DIG OUT CH1/CD 0 dB 1K 75 Ω − Center all EQs/FADER Max
Measure the output waveforms at the CH1 CD input.
Switch Type Setting
MASTER ATT : 0 dB
MONO/ST (HP) : ST
MON/ST (MASTER) : ST
CH FADER CURVE : Right side (linear)
CROSS FADER CURVE : Center
CROSS FADER ASSIGN : THRU
MIC SW : ON
C
MASTER CUE : ON
FILTER : MIN
ISOLATOR : EQ
NOTE: The following waveforms were measured at the point of the corresponding
balloon number in the schematic diagram and PCB diagram.
D
A INPUT ASSY
2-1 INPUT SELECT (CD) 2-1 INPUT SELECT (PHONO) 2-2 CH1_L, R (CD, LINE) 2-3 CH1_L, R (PHONO)
V: 5 V/div. H: 200 μs/div. V: 5 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div. V: 20 mV/div. H: 200 μs/div.
164 DJM-850-K
1 2 3 4
5 6 7 8
D MAIN ASSY A
1-4 P122/X2/EXCLK 1-26 96k_CLK_13AD 1-42 RET_L, R 1-59 MASTER_L+, -
V: 1 V/div. H: 20 ns/div. V: 1 V/div. H: 2 μs/div. V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-60
B
1-8 24M576_CLK_FPGA 1-27 6M_CLK_13AD 1-48 BOOTH_L, R 1-61 MASTER_L+, -
V: 1 V/div. H: 10 ns/div. V: 1 V/div. H: 20 ns/div. V: 5 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-62
1-12 AHCLKR1/GP4[11] 1-28 24M_CLK_13AD 1-48 MASTER_L, R 1-63 MASTER2_L, R C

V: 1 V/div. H: 10 ns/div. V: 1 V/div. H: 10 ns/div. V: 5 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div.
1-17 XTAL (24 MHz) 1-29 ADAT_CH1_ANA 1-48 REC_L, R 1-64 REC_L, R
V: 1 V/div. H: 20 ns/div. V: 5 V/div. H: 2 μs/div. V: 5 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div. D
1-18 VINR+, - 1-34 MIC1, MIC2 1-49 ADAT_BOOTH, REC, MASTER_L, R 1-65 BOOTH_L, R
V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 200 μs/div. V: 5 V/div. H: 2 μs/div. V: 1 V/div. H: 200 μs/div. E
1-35
DJM-850-K 165
5 6 7 8
1 2 3 4
A
D MAIN ASSY
1-66 BOOTH_L, R 1-87 DOUT_SRC_LRCK 1-93 D-USB
V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 2 μs/div. V: 200 mV/div. H: 100 ns/div.
1-67
B
1-72 SEND_L (SENDDAC output) 1-88 DOUT_SRC_BCK 1-97 FADER_START1, FADER_STOP1
V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 50 ns/div. V: 1 V/div. H: 100 ms/div.
C 1-72 SEND_L (SEND output) 1-89 DOUT_SRC_DATA 1-99 R3057, R3058

V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 500 ns/div. V: 1 V/div. H: 100 ms/div.
1-78 HP_L+, -, HP_R+, - 1-90 FPGASRC_MCLK

D V: 1 V/div. H: 200 μs/div. V: 1 V/div. H: 10 ns/div.
1-84 DIGITAL OUT 1-92 D+USB

E V: 1 V/div. H: 500 ns/div. V: 200 mV/div. H: 100 ns/div.
166 DJM-850-K
1 2 3 4
5 6 7 8
E SEC/HP ASSY
A
4-1 HP_L, R_OUT
V: 1 V/div. H: 200 μs/div.
H PNLA ASSY
3-13 FL_TXD 3-14 FL_SCK 3-16 FL_LAT 3-16 FL_BK
V: 1 V/div. H: 500 μs/div. V: 1 V/div. H: 500 μs/div. V: 1 V/div. H: 500 μs/div. V: 1 V/div. H: 500 μs/div.
DJM-850-K 167
5 6 7 8
1 2 3 4
11. PCB CONNECTION DIAGRAM

11.1 INPUT, MIC1 and MTRM ASSYS
A
SIDE A
CN8801 C MTRM ASSY

CN9001
CN8801
MTRM
DWX3372-
[[ G ]] DWX3371- MIC1
5 1
C7
C7
C9002
[[ G ]]
C9001
5 1
MIC1 TRIM
MIC2 TRIM
VR8801
VR8802
5 5
1
6 CN9001 1
1 1
B
(DNP2685-C)
5
B MIC1 ASSY
JA9001
(DNP2685-C)
IC4001
A INPUT ASSY 2-1 2-2 2-3 2-1
C 1
5
1 1 1 1
L R L R L R L R
C4624
JA4001 CH1 JA4002 CH2

MIDI OUT JA4602
C4022
C4024
17
V+5D_MIDI
J4042
MIC2 JA4601
DWX3362-
J4044 J4028
J4065 V-15A
GNDD
J4108
5
GND_CH2
J4098
GND_CH2
IC4001
V+5D_MIDI
J4107
J4001
2-3
1
C4026
CN4601
C4028
D
CN4601
J4079
J4102
J4043
J4056
5 1
5 1
J4063
J4072 V+15A
6 2 V+15A
J4020
V-15A
J4083
V-15A J4041
C4031
GND_MIC1
C4032
C4040
J4068
J4059
J4011
V-15A
GND_MIC1
C4604 GND_CH2
J4090
J4009
C4043
GND_CH1
J4013 J4105
GND_CH2
J4021
J4100
GND_CH1
C4037
C4
6
J4008 C4047 C4050

J4035
J4015
CN4602
C4617 J4030
GND_PO
V-15A
5
J4058 GND_MIC1
V-15A
J4088
J4029
J4031 J4074
V+15A
J4017
J4070
V+15A C4049 GND_PO

CN4602
GND_MIC2
1
J4006 V+15A J4069

GND_CH1
C4616
GND_MIC1
J4092
J4024
V+15A
J4077
E
J4097
2
J4023
J4076
GND_MIC1
GND_CH1
GND_MIC2
J4053
J4106
J4016
J4045 GND_CH1
J4010
J4051
GND_MIC2
C4619
J4084
J4057 J4075 C4048

C4801 C4802
J4082
V-15A
C4618
CN4801
J4085
J4037 CON
C4807
1
1 4
2
GND_PO
1
J4096
J4003 GND_MIC2 1
2
1 5
15 16
CN4801
F
E CN2
A B C
168 DJM-850-K
1 2 3 4
5 6 7 8
A
SIDE A
: Voltage measuring point NOTE FOR PCB DIAGRAMS :
ASSY : Waveform measuring point 1. The parts mounted on this PCB include all
necessary parts for several destinations.
For further information for respective desti-
nations, be sure to check with the sche-
matic diagram.
2. View point of PCB diagrams.

Connector Capacitor
C) B
SIDE A
SIDE B
P.C.Board Chip Part
IC4201
2-1 2-1
1
C
1
1 1 1 1 5
R L R L R L R L R
JA4201 CH3 JA4202 CH4
C4409
C4222
WX3362- INPUT C4224
JA4401
L RETURN R JA4402
J4027 J4050
J4095 J4049
V-15A
GND_CH2
GND_CH3
GND_CH2
GND_CH3
J4040
5
J4001
J4018
IC4201
J4080
D
J4101
J4079
J4055
J4102
J4043
J4019
J4033
1
C4226
C4228
J4062
C4408
V-15A
J4061
J4025 V+15A
V-15A
V-15A
J4002
J4048 V+15A
J4032 V+15A
C4231
C4237
C4232
J4014
C4040
V-15A
J4059 J4038
GND_CH2 GND_CH3
J4071 V-15A
GND_CH4
05 J4103 J4104 J4039

C4405
H2 GND_CH3
J4054
J4093 GND_CH4
J4047
C4047 C4050 C4044 C4243
C4244
C4247 C4249
GND_CH2
J4094
J4078
J4004
V+15A
J4086
GND_PO J4012 C4240
J4091
V+15A J4069 J4066 J4046

J4099 V-15A GND_CH4 E
GND_PO
C4248
V-15A
J4067
J4064 V+15A
GND_CH1 GND_CH3 GND_CH4 C4250

J4052
GND_CH2
J4087
GND_RET PC
J4089 J4005 J4073
J4081
J4022
J4082
J4007 J4036 J4026 J4060 J4034

[[ G ]]
CONTACT UPPER SIDE C7
C4807
CN4803
10 CN4802 20 10 20
2
1
1 5 15 25
24
25 1
2
1 5 15
22
21 3
CONTACT UPPER SIDE
2-4
CN4802 CN4803 (DNP2683-C) F
D CN1003 D CN1004
A
DJM-850-K 169
5 6 7 8
F
E
B
A
D
C
170
A
SIDE B
1
1
22.RET_R R4803
21.GNDIN_RET C4407
20.RET_IN
19.GNDIN_RET R4410 R4404
LF
18.RET_L
IC4401
C4402
R
17.GNDIN_RET
INPUT
16.GNDIN_RET
1
R4408
IC4401
15.GNDIN_CH4 C4404
14.CH4_R R4406
13.GNDIN_CH4 VA4401
R4409
RETURN
12.CH4_SEL
DWX3362-
C4406
11.GNDIN_CH4
R4809
L
10.CH4_L R4407 R4405
9.GNDIN_CH4 C4403
8.GNDIN_CH4 R4403
A INPUT ASSY
7.GNDIN_CH3 C4401
6.CH3_R
5.GNDIN_CH3 R4820 R4229
4.CH3_SEL R4821 R4230 R4401
3.GNDIN_CH3 Q4202
2
2
1
2.CH3_L C4236
1.GNDIN_CH3 R4819 Q4204
IC4205
R4252 R4240 R4237 R4402
1
R4238 R4212
5
R4232
R4248 R4242 R4234
Q4202 Q4204
R
C4218
C4220
1
IC4205
C4223 R4220
R4244
C4216 C4208
C4235 C4242
PHONO4
R4251 R4257 C4230 R4219 C4215 C4207
5
C4229 C4221
C4219 R4236
22
R4243 R4211
21
R4246 R4228 R4210
IC4204
Q4206 R4241
E
ADD
C4217
DJM-850-K
R4827 C4241 C4246
SOLDER
C4206
IC4204 Q4206
Q4203 C4214
CD4
R4816 R4255
L
R4235
1
R4817 R4256 R4239
R4226
Q4201
1
C4205
CN4803
R4209
Q4203 Q4201
R4822 R4808 R4233

R4818 R4231
R4227
3
3
R4225
R4203
1
C4213
2
C4234 R4204
IC4203
R4250
5
R4807 R4208
R
R4815 R4224
1
R4247
IC4203
LINE3
C4212 C4204
24
C4239 C4211 C4203
C4233
25
R4249
R4223
L
5
R4207
R4826
R
R4206
1
R4823 25.GNDIN_CH2 R4814 R4245
ADD
24.CH2_R Q4205
E
23.GNDIN_CH2 C4245
R4222 C4210 C4202
IC4202
SOLDER
CD3
R4812 C4238 R4221 C4209 C4201

IC4202 Q4205
22.CH2_SEL R4253 R4254

L
21.GNDIN_CH2
CN4802
R4811 R4205
20.CH2_L
19.GNDIN_CH2
R4805 18.GNDIN_CH2 C4036
4
4
R4202
1
2
17.GNDIN_CH1 R4050
R4802 16.CH1_R IC4005 R4201
15.GNDIN_CH1 5
C4809 14.CH1_SEL
C4808 13.GNDIN_CH1
1
R4046 R4008
IC4005
12.CH1_L
11.GNDIN_CH1 R4806 C4042
10.GNDIN_CH1 C4035
R4049
R4024 C4016 C4006
LINE2
9.MIC1 R4023 C4015 C4005

8.GNDIN_MIC1 R4824
7.GNDIN_MIC1
1
L
6.MIC2 R4813 R4044

5.GNDIN_MIC2 Q4006 R4007
E
C4046 R4006
R
4.GNDIN_MIC2
IC4004
ADD
3.GNDD C4041
2.MIDI_TXD
IC4004 Q4006
1.V+5D R4053 R4054 R4022 C4014 C4004

SOLDER
CD2
R4021 C4013 C4003

_
11.GNDIN_CH1 R4806 C4042
10.GNDIN_CH1 C4035
R4049
R4024 C4016 C4006
LINE2
5
9.MIC1 R4023 C4015 C4005
8.GNDIN_MIC1 R4824
7.GNDIN_MIC1
1
L
6.MIC2 R4813 R4044
5.GNDIN_MIC2 Q4006 R4007
E
C4046 R4006
R
4.GNDIN_MIC2
IC4004
ADD
3.GNDD C4041
2.MIDI_TXD
IC4004 Q4006
1.V+5D R4053 R4054 R4022 C4014 C4004
SOLDER
CD2
R4021 C4013 C4003
P4802
L
C4804 1
C4806 R4005
MTRM
4
R4027
5
5
DWX3372-
C4805 R4028 Q4002
1 R4002
1
P4801
CN4801
C4803 Q4004 R4001 R8802
R4038 R4035
1
C4034
R
CN8801
R4801 R4030 C4020 R4036
IC4003
Q4002 Q4004
R4032 R4010
R4048 C4018
CN8801
5
4.V-15A R4040 C4023 R4020
3.GND_PO R4045
2.GND_PO C4012 C4008
1
PHONO1
IC4003
1.V+15A C4033 R4042 C4030 R4019 C4011 C4007
C MTRM ASSY
LF
R4055 C4021 R4034

R4047 C4039 C4029 C4019 R8801
L
R4009
5
(DNP2685-C)
R4825 R4026
R
R4041 R4004
ADD
R4810
1
IC4002
R4043
C4038 Q4005 C4017 C4002
SOLDER
E
CD1
C4045 R4039 Q4003 C4010
R4033
1
R4037
IC4002
Q4005
R4051 R4018
1
C4001
L
C4620 R4625 R4052
C4621
Q4003 Q4001
Q4001 R4003
6
6
C4613 R4031
R4804 C4612 R4029 C4009
C4614 R4025 R4017 C4627
R4633 R4618
R4622
1
R4632 R4620 VA4601
R4630 C4607
5
IC4601
IC4601
R4628 R4615
C4615 C4611
R4828
Q4603
MIC2
LF
1
C4605
1
2-3
C9007
R4635 Q4602
1
R4637 D4603
Q4603 Q4602
R4634 R4621 C4601

CN9001
R4619
5
R4607
1
6
IC4603
R4631 R4611
CN9001
R9004
R4639
2
C4603
DJM-850-K
R4629 R4610
R9003
R4613 R4829
IC4603
C4623 C9008
C4626 R4604 R9002
R4612 R4606 C9009
MIDI OUT
D4604
5
R4609 C9004 C9006
MIC1
6
R4623 C4625 VA9001
ADD
R4641
E
C4622 R4642 R4638 C9005
R4617 Q4601 VA4602
Q4601
7
COLD
7
C4610 C4609 D9003
R4614 1 R4627 VA4603
D9004
C4606 IC4602 R9001
1
5
R4626 5
C4628
R4616 R4608 VA9002 C9003
DWX3371-
2 R4624 R4605
IC4602
6 D4605
HOT
R4636 R4603 D9002 D9001

C4602
(DNP2683-C)
SOLDER
B MIC1 ASSY
(DNP2685-C)
CN4602 CN4601
8
8
A B C
SIDE B
171
F
E
B
A
D
C
4 3 2 1
DJM-850-K 172
D
E
KN1205
V+13D
19 15 5 1 C1413
1 C1452
L1402 IC1404
C1008
1
D1407
CN1005
2
1
F
CN3
10
IC1404
1
C1415
C1450
18
C1432
1 CN1005
5
1
P1202 C1434
1 C1427
C1456
IC1405
C1007
C1425 1.V+3R3D_REFA
10
3
H
P1203 2.VR_FADER1
1
5
4 VDET 6.HP_L+ IC1405 L1403 3.VR_FADER2
1.HP_R+
IC1408
D1406
C1424
C1426
IC1408
2.HP_R- 4.CROSS_FADER
15
7.GNDA 3.GNDA_HP
5
11.GND_PO 8.V+5A 4.HP_L- V+5D 5.GND_REFA

12.V-15A 9.GNDA 5.GNDA_HP 6.CH1_TRIM
13.GND_PO 10.V+15A
1
V+2R5D R2649 R2652 R2648 R2647 7.VR_FADER3
CN1001
1 1 1 1 1
L1404
C1433 8.CH2_TRIM
20
V+13D_UNREC D1404 9.GND_REFA

GNDD C1004 C1449 V+3R3D 5.V+5VBUS
4.D+USB R2650 10.CH3_TRIM
16.MUTE 16 15 10 3.D-USB 25 20 15 10 5 1 11.VR_FADER4
CN6601
C1445 2.GND_USB
R1075
IC1001 12.CH4_TRIM
27
24
R_RESET_A C1446 CN2602 1.GND_USB 13.GNDD

R2601
IC1001
ER_RESET_HP
CN1001
C2666 5 1 14.SUB_CPU_RESET
IC2604
V+1R2D 15.SUB_CTRL IC2604

.GNDD 1 5 CONTACT SIDE 16.SUB_INT
1
1
8 17.GNDD
18.FPGA_SIGNAL
V+5A 1 19.FPGA_RX_DAT
F2601
22.FPGA_CLK
R1019
IC2605
23.GNDD 20.FPGA_TX_DAT IC2605

ADAT_HP 5 C2606 30
1 1
35 40 45 50 54 24.V+3R3D 21.GNDD
1 1
D2404
R2666
R2668
E
1.STBY_LED
1
R2413
D2601 R2657
IC2402
C2664
C2665
C2669 2.STBY_KEY
1
C2650 CN2601
L2601 1
1
R2660 R2634 R2665 R2664
1
1 5
16
411 3.V+3R3E
5
1 1 1
R2630 R2632
1
4.MVR_MUTE
15
CN3201
C2415
R2645
10
5.EFX_ON/OFF
1
IC2402
5
D2403
1 R3224 R3225
5
1 1
1 1 1
10
R2642 R2644 R2643 10 6.GNDD_34D

H
D2402
8
7.GNDD
V+1R2D_USB
8.V+34D
R2629
9.GNDD
10
C2411
CN1002
R2628
25 20 15 10
C2410
5 1
1 1
27 10.GNDD_LED
11.V+5D_LED
R2408
12.GNDD_LED
IC2603
R2412
CN1002
15
IC3202 13.V+5D_LED
16
IC2401
C2408
R2426
D2401
14.GNDD_LED
1
V+3R3D_USB
15
IC3202
1 R2604
15.V+5D_LED
V+2R5D_UPLL
17
5
16.GNDD_LED
IC2401
CN6602
10 17.V+5D_LED
8
30 35 40 45 50 54 1
A R2606 CONTACT SIDE
C2414 V+3R3D_USB
C2405
1 1
R2405
24M_CLK_USB
1 R2409 9.MIC1 D3201 IC2603

F
8.GNDIN_MIC1 R3228 C2603

1 7.GNDIN_MIC1 Q3201 R2614
C2605
15.GNDIN_CH1 R3229
1 1 R3205 R3219 1 1
14.CH1_SEL 6.MIC2
R254
13.GNDIN_CH1 5.GNDIN_MIC2
4.GNDIN_MIC2 E IC2602
12.CH1_L R3203 R3202 1
1
X2601 1
5 5
R3223
1
11.GNDIN_CH1 3.GNDD R3206

F3001
CN2602
16.CH1_R
10.GNDIN_CH1 2.MIDI_TXD
1
IC2602 IC2601
IC2601
17.GNDIN_CH1
1
1.V+5D
1
R3222
19.GNDIN_CH2
1 1
R3208 R3204
USB_RST
1
ADAT_CH1_ANA
R3218
D
1
CN3801
R3207
1
IC3201
R3209
1
1
R3221
V+1R2D_FPGA
C3036
20.CH2_L
R3093 1 1 R3094 1 1
C3035
C3021
R3217
1
R1601
R3216
25.GNDIN_CH2
24.CH2_R
21.GNDIN_CH2
22.CH2_SEL
R3212
23.GNDIN_CH2 18.GNDIN_CH2
V+3R3D_DSP R3095 R3096
C3203 V+1R2D_DSP
V+3R3D_FPGA
1
1
R3037
A
1 IC3201
1
C3259 IC3007
D1602
R3240
R253 R3264 1 1
C3204
C3020
IC3007
L3201
1
96k_CLK_AD/DA IC3008
14 10 V+1R2D_DSP
R3039
1
_PLL
IC3008
KN1202 DSP_RESET 6M_CLK_AD/DA
24AD_RESET
1
5
5 IC3205
IC2804
24M_CLK_AD/DA
IC3205
F3201
1 5 7
7
14
HP-MIC-RE_RESET
10 10 10 R3058 1 1
5
AUDIO
10
R3046
IC3006 IC3204
R3063
IC3204
_CLK R3038
1 1 1 1 KN1206
1
1 IC3005
1
14
R3057
IC3004
7
13AD_RESET
1
5 7 1 5 7 R3042 R3050
1 5 1 5
DA_RESET
R201
AD_DA_RESET
IC3203
R3230
1 X3201 IC3005
24 20 15 10 5 1 1 IC3004 IC3006
C202
IC3203
R3231
1
IC201
C
C567
IC1406 IC201
R522
C522
V+3R3D_REFA
IC1406
C566 5
LF
R267
48
2
24M_CLK_DIGI
6M_CLK_DIGI
96k_CLK_DIGI
25 30 35 40 45
C219
C530 L2801
C213 C216
C521
C218 R530
R521 C1438
C524
D1405
C215
R526
C529
C523
R525
5
PC
R523
R284
R285
R266
IC502
R524
R283
C401 C402
1
FPGA_RESET
C541
R527
GNDREF_A
V+3R3D_REFA
C535
MAIN
DWX3360-
R529
E
R528
C528
SUB_CPU_RESET
C527
R536
IC502
R533
Q514
C564 R537
R540
C562
R2843
Q514
5
5
E
Q516
Q409
E
Q410
1
Q516
R538
CPU_MUTE
C403
R534
RESET_OUT
1
C404
R2871
IC504
R539 IC2801
C405 5
IC502
C2801
C412 D2801
R535
IC2801
C411
1
C406
1
1
1
Q513
CN2801
IC2802 Q515
5
IC503
C563
IC504
C408 Q513
Q515
E C561 E
IC2802
5
1
1
R2808
R2803
R551
IC401
V+3R3E_M
15 10
C409
R542
R548
R545
IC3404
R3408
20
C556
C555
C554
[[ G ]]
IC3404
A30C5/C7
B
C410
1
1
CONTACT SIDE
C553
1
25 30
R422
R268
C3408 C3409
C2808
R3423 C2807
C552 R3410
C551 C3410
R426
R425
D507 D506 C550 C549
C424
45 40
36
D505
48
D504
C3419
35
Q212 Q213 Q210 Q211 Q208 Q209 Q214 Q215
E E E E E E E E
C423
30
IC3405
JA502
JA503
10
D201
L209
L208
L207
L206
D203
L205
L203
D202
L204
L202
25
C3417 FPGASRC
_BCK1
15 20
C429 Q3401
Q3401
24
IC3405 FPGASRC
D204
D404 D403 E _LRCK1 KN201
1 JA3401
R3432 JA202 JA201
JA401
L3401
1 1 1
A
D MAIN ASSY
SIDE A
11.2 MAIN ASSY
4 3 2 1
C
D
A
173
SIDE A
D
IC303 IC304 IC602
IC301 IC302
Q302 Q304
Q301 Q303
IC1802 IC2202
IC1801 IC2201
IC1804 IC2204
IC1401
IC1402
IC1601 IC2001
IC1602 IC2002
IC1604 IC2004
Q307
Q308
8
8
IC1403
IC2804
Q1402
Q1405
Q1406
IC401
IC402
IC601
Q305
Q306
Q409
Q410
R622
C625
C613
1
(DNP2682-C)
C611 C619
5
C609
CN4802 A CN4803 A JP3001 Q

C615
JA602
C627
C616
7
7
C626
R275 C621
IC602
1
JA601 C624
R621
CN1003 CN1004 CN1201

C612
MUTE R265
C610 MASTER_MUTE
1
C317 C321 1.GNDIN_CH3 6.CH3_R 10.CH4_L 16.GNDIN_RET 22.RET_R

2.CH3_L 7.GNDIN_CH3 11.GNDIN_CH4 17.GNDIN_RET
3.GNDIN_CH3 8.GNDIN_CH4 12.CH4_SEL 18.RET_L
KN1204
DJM-850-K
ADAT_CH4_ANA
4.CH3_SEL 9.GNDIN_CH4 13.GNDIN_CH4 19.GNDIN_RET
V-15A R1049
C608 5.GNDIN_CH3 14.CH4_R 20.RET_IN
1
C335 C348 R2201 15.GNDIN_CH4 21.GNDIN_RET

JA302 R2202 V+15A
R2213 IC1402
C2206
1
C1409
1
R2231
1
CONTACT SIDE
R1052
C304
R323
R264
1
R1050
R315
CN1201
C2205
D1402
R307 D2201
D2202 C2233
C326
C308
R286 1
KN1203
R331 IC2201
V+3R3A
Q307 C361
R358
R2204
Q303
5
R339
E
R308
R1402
R364 C342
CN1004
C357 C2019 R2005 R2214 28
6
25 20 15
C319
R350 D2003
R324 R316
R2006
R2015
1
C1211
D2004
1
IC2204
1 C2227
R371
1.RELAY_CONT
2.GNDD
1
3.V+11E_UNREG
5
C1209
5 R2203 R2207
C343
R1060
C2024
R2030
IC302 IC2002 5
R332 C322 R330

1 R1051
R340
R343
D304
R351 R338 R278
22
R2208 R2216
C2008
P1204
R361 R342 C307
1
1
V+11E
C362
1 5 10
C2007
C325
C2208
14
C2207
C346
C347
R359
10 5 1
20
1 14
D305
D2204 C1406
IC2004
R314
R279 R2016 1
R372
IC1401
IC2202
1
6
R2008 C2224
6
5
1
R337
R2230
C358 1 D1203
15
R322 C2027 5 R2215 1
D1401
Q308 IC304 R1059
R306
Q304
C1818 C1817
R1053
R2004
E
R2014 D2203
R360
R365 R349 15 20 25
C1408
R2206
R329 R281 28
1
10
C303
R321
R352
V+3R3E
P301 C337 R313 5 R2205
R305 C2219
ADAT_CH3_ANA
C2005
Q301
C353 C2033 IC2001

D301 R354 R311 L1401
C354 R280
D2001
E
R362 C336
D2002
R1801 C1835
Q305
R1061
5
R346 1
D1403
R1831
C2006
R1403
R1802
R2031
R319 C306 R336
C302 R320
R327
R1406
1 D1802
CONTACT SIDE
1
1
R1813
R367
5 R303
R1404
1
R1405
C1806
R2013 1 1
IC1403
1
1
R312
D1801
D302
R1055
R347
C1805
5
R335
R304
1
R2001 R2002
C359
C1454
R328
ADAT_CH2_ANA
C355 R357
C1412
C318
R355 C324
C320
D303
IC303 R344 R1605

IC1801 C1404
5
R1615
R1606
R341 C1621 5 28
R368
C341
IC301 25 20 15 C1461
R1804
R1814
R326
R310
C1617
R1063
1 1
C360
C340
IC1804
R334 C1618 5 C1829
D1603
R333
C356 R363
1 R1816
C1607
C305 R318 R1803 R1807 R1054
25
E
R345
R356
R1630
1 R1808
R317
R302
R325 C301
25
R348 IC1602
JA301 R309
D1604
Q302
Q306
P302 R301 R1616 1 1 5 10 14
E
IC1802
C1608
R1830
Q1402
C426
R249
1
C1808
10 5 1
C1403
C428
C602
R424
20
R428 R421 R607 14
R1415
1
R250 R1608 C1826
1
IC601
C1626
D1803
C323
Q1406
R1062
R1056
R403 C1416
C1807
C417
5 IC1604
C2401
V+34D
D402
C607
IC402 C1629 D1804
E Q1405
5
15
8
R1614
5
R1604
C421
C418
C420
R269
E
10
C427
C2404
15 20 25 C1821
C419
R270
5
5
R1806
28
R1805
5
R1815
C2402
5 IC1601
D401
15
10
CN1003
1
C1605
C1606
1
R2407
R404 C1635
16
R1631
17.POWE R_RESET_A
KN1201
1
R251 D1601
18.POWER_RESET_HP
C2403
C422
R427 R423
1
R1613
E
5
C430
C407
C425 R420 C220
14.V+13D_UNREC
15.GNDD
R419
R2411
4
1 R1602
19.GNDD
C202 13AD_RESET 1
D1602
C401
R1601
11.GND_PO
12.V-15A
13.GND_PO 10.V+15A
24AD_RESET
D404
V+5A
R426
1
Q410 DA_RESET
C404
IC401
D2401
R285
1
14
R253
C406
1
R268
16.MUTE
5 25.GNDIN_CH2
D2404
C403
D2402
VDET 6.HP_L+
C2405 D2403
1
24.CH2_R 19.GNDIN_CH2
1
C405
C424 R201 23.GNDIN_CH2 18.GNDIN_CH2 C2410
C410 C2408
V+13D
E
10
5
D403
22.CH2_SEL R254 R2405 C2415
C409
C215 21.GNDIN_CH2
IC201
C219 17.GNDIN_CH1
9.GNDA
8.V+5A
7.GNDA
7
R2426
5 1
IC2804 20.CH2_L R1075
C402
R425 AD_DA_RESET
C429
16.CH1_R
16
8
IC2401
R422 5 1
1
C2414
R2409
IC2402
Q409 HP-MIC-RE_RESET
15.GNDIN_CH1
R2408 8
12.CH1_L
11.GNDIN_CH1 3
10.GNDIN_CH1 2
14.CH1_SEL
13.GNDIN_CH1
JA401
C2411
24
15
25
C411
C412
Q516
C408
C1008
C3203
C535
E
C213
R539
C423
C1004
R284
20
5
C1007
C552
16
30
10 15
R551
10
D507
R3209
5.GNDA_
4.HP_L-
3.GNDA_
2.HP_R-
1.HP_R+
16
8
1
1
ADAT_C
15
R2412
10
15
IC504
IC100
19
35
R283
18
1
5 R1019
C216
C21
10
R2413
40
P
1
P
4 3 2 1
DJM-850-K 174
D
KN1205
V+13D
19 15 5 1 C1413
1 C1452
L1402 IC1404
C1008
1
D1407
2
1
F
2 10
1
C1415
C1450
18
C1432
1 CN1005
5
1
P1202 C1434
1 C1427
C1456
C1007
C1425 1.V+3R3D_REFA
10
P1203
3 2.VR_FADER1
1
5
4 VDET 6.HP_L+ IC1405 L1403 3.VR_FADER2
1.HP_R+
6
D1406
C1424
C1426
IC1408
2.HP_R- 4.CROSS_FADER
15
7.GNDA 3.GNDA_HP
5
11.GND_PO 8.V+5A 5.GND_REFA

9
4.HP_L- V+5D 6.CH1_TRIM
12.V-15A 9.GNDA 5.GNDA_HP
13.GND_PO 10.V+15A
1 1-94 V+2R5D R2649
1 1 R2652 1 R2648 1 R2647 1 7.VR_FADER3
L1404
C1433
1-78
8.CH2_TRIM
20
V+13D_UNREC D1404
1-95
GNDD C1004 C1449 5.V+5VBUS 9.GND_REFA
V+3R3D 4.D+USB 10.CH3_TRIM
R2650
11
16.MUTE 16 15 10 3.D-USB 25 20 15 10 5 1 11.VR_FADER4
C1445 2.GND_USB
R1075
IC1001
1-93 1-92 1-15
27 12.CH4_TRIM
24
R_RESET_A C1446 CN2602 1.GND_USB 13.GNDD

R2601
ER_RESET_HP
CN1001
C2666 5 1 14.SUB_CPU_RESET
IC2604
V+1R2D 15.SUB_CTRL
.GNDD 16.SUB_INT
1-83
1 5 CONTACT SIDE
1
1
8 1-91 14 17.GNDD
1-82 18.FPGA_SIGNAL
1 19.FPGA_RX_DAT
12
V+5A
F2601
22.FPGA_CLK
R1019
IC2605
1-80
23.GNDD 20.FPGA_TX_DAT
ADAT_HP C2606 30
1 1
35 40 45 50 54 24.V+3R3D 21.GNDD
1-14
5
1-81 1-79 1 1
D2404
R2666
5
R2668
E
1.STBY_LED
1
R2413
D2601 R2657
IC2402
C2664
C2665
2.STBY_KEY
1-69
C2669
1-42
1
C2650 CN2601
L2601 1
1
R2660 R2634 R2665 R2664
1
1 5
16
411 3.V+3R3E
5
1 1 1
R2630 R2632
1
4.MVR_MUTE
15
1-43
CN3201
C2415
R2645
10
5.EFX_ON/OFF
1
D2403
1 R3224 R3225
5
1 1
1 1 1
10
R2642 R2644 R2643 10 6.GNDD_34D

1
D2402
1-45
8
7.GNDD
V+1R2D_USB
8.V+34D
R2629
9.GNDD
10
C2411
CN1002
1-46
R2628
25 20 15 10
C2410
5 1
1 1
27 10.GNDD_LED
1-47
1-34 11.V+5D_LED
R2408
12.GNDD_LED
1-44
R2412
15
IC3202 13.V+5D_LED
16
IC2401
C2408
R2426
D2401
14.GNDD_LED
1
V+3R3D_USB
15
1-36
1 R2604
15.V+5D_LED
V+2R5D_UPLL
17
5
1-35
16.GNDD_LED
10
1-38 1-13 17.V+5D_LED
8
1-39 30 35 40 45 50 54 1
A R2606 CONTACT SIDE
C2414 V+3R3D_USB
C2405
1 1
R2405
24M_CLK_USB
1 R2409 9.MIC1 D3201 IC2603

1-40
8.GNDIN_MIC1 R3228 C2603
1 7.GNDIN_MIC1 Q3201 R2614
C2605
15.GNDIN_CH1 R3229
1 1 R3205 R3219 1 1
1-37 1-16
14.CH1_SEL 6.MIC2
R254
1-17
13.GNDIN_CH1 5.GNDIN_MIC2
4.GNDIN_MIC2 E IC2602
12.CH1_L R3203 R3202 1
1
X2601 1
5 5
R3223
1
11.GNDIN_CH1 3.GNDD R3206

F3001
16.CH1_R
10.GNDIN_CH1 2.MIDI_TXD
1
IC2601
17.GNDIN_CH1
1
1-9
1.V+5D
1
R3222
19.GNDIN_CH2
1 1
R3208 R3204
USB_RST
1-6
1
ADAT_CH1_ANA
R3218
D
1
R3207
1
R3209
1
1
R3221
V+1R2D_FPGA
C3036
20.CH2_L
R3093 1 1 R3094 1 1
C3035
C3021
R3217
1
R1601
R3216
25.GNDIN_CH2
24.CH2_R
21.GNDIN_CH2
22.CH2_SEL
R3212
23.GNDIN_CH2 18.GNDIN_CH2
V+3R3D_DSP
1-7
R3095 R3096
C3203 V+1R2D_DSP
V+3R3D_FPGA
1
1
R3037
A
1-41
1 IC3201
1
C3259 IC3007
D1602
R3240
R253 R3264 1 1
C3204
1-5
C3020
L3201
1
1-10 96k_CLK_AD/DA
14 10 V+1R2D_DSP
R3039
1-11
1
_PLL
IC3008
1-8
KN1202 DSP_RESET 6M_CLK_AD/DA
24AD_RESET
1
5
5
IC2804
24M_CLK_AD/DA
IC3205
F3201
1-30
1 5
1-99
7
1-31 1-32 1-33
7
14
HP-MIC-RE_RESET
1-12
10 10 10 R3058 1 1
5
AUDIO
10
R3046 R3063
IC3204
_CLK R3038
1 1 1 1 KN1206
1
1-53 1-54 1-51 1
1
14
7 R3057
13AD_RESET
1
5 7 1 5 7 R3042 R3050
1 5 1 5
DA_RESET
R201
AD_DA_RESET
1-52 1-49 1-50 1-55
R3230
1 X3201 IC3005
24 20 15 10 5 1 1 IC3004 IC3006
C202
IC3203
R3231
1-56 1-57 1-58 10
1
IC201
C
C567
R522
C522
V+3R3D_REFA
IC1406
C566 5
LF
R267
48
2
24M_CLK_DIGI
6M_CLK_DIGI
96k_CLK_DIGI
25 30 35 40 45
C219
C530 L2801
C213 C216
C521
1-48
C218 R530
R521 C1438
C524
D1405
C215
R526
C529
C523
R525
5
PC
R523
R284
R285
R266
R524
R283
C401 C402
1
FPGA_RESET
C541
R527
GNDREF_A
V+3R3D_REFA
C535
MAIN
DWX3360-
R529
E
R528
C528
SUB_CPU_RESET
C527
R536
IC502
R533
C564 R537
R540
C562
R2843
Q514
5
5
E
Q409
E
Q410
1
Q516
R538
CPU_MUTE
C403
R534
RESET_OUT
1
1-65
C404
R2871
R539 IC2801
1-71
C405 5
C2801
C412 D2801
R535
C411
1
C406
1
1
1
Q513
CN2801
5
IC503
C563
IC504
C408
Q515
E C561 E
IC2802
5
1
1
1-67 1-66
R2808
R2803
R551
IC401
V+3R3E_M
15 10
C409
R542
R548
R545
IC3404
R3408
20
C556
1-3
C555
C554
[[ G ]]
A30C5/C7
B
C410
1-64
1
CONTACT SIDE
C553
1
25 30
R422
R268
C3408 C3409
C2808
R3423 C2807
C552 R3410
1-85
C551 C3410
R426
R425
D507 D506 C550 C549
C424
45 40
36
D505
48
D504
1-86
C3419
35
Q212 Q213 Q210 Q211 Q208 Q209 Q214 Q215
E E E E E E E E
C423
1-90
30
JA502
JA503
10
D201
L209
L208
L207
L206
D203
L205
L203
D202
L204
L202
25
C3417 FPGASRC
_BCK1
15 20
1-98
C429 Q3401
24
IC3405 FPGASRC
1-89
D204
D404 D403 E _LRCK1 KN201
1 JA3401
R3432 JA202 JA201
JA401 1-87 1-88 1-97 1-97
L3401 1-84
1 1 1
: Voltage measuring point A
Measuring points of waveforms and voltages SIDE A
4 3 2 1
C
D
A
175
SIDE A
D
D MAIN ASSY
8
8
R622
C625
1-72
C613
1
(DNP2682-C)
C611 C619
5
C609
C615
JA602
C627
C616
7
7
C626
R275 C621
IC602
1
JA601
1-72
C624
R621
C612
1-70
MUTE R265
C610 MASTER_MUTE
1
C317 C321 1.GNDIN_CH3 6.CH3_R 10.CH4_L 16.GNDIN_RET 22.RET_R

2.CH3_L 7.GNDIN_CH3 11.GNDIN_CH4 17.GNDIN_RET
4
8.GNDIN_CH4 12.CH4_SEL 18.RET_L
1-68
3.GNDIN_CH3
KN1204
DJM-850-K
ADAT_CH4_ANA
4.CH3_SEL 9.GNDIN_CH4 13.GNDIN_CH4 19.GNDIN_RET
V-15A R1049
C608 14.CH4_R
1-26 1-28
5.GNDIN_CH3 20.RET_IN
1
R2201 15.GNDIN_CH4
1-25
C335 C348 R2202 21.GNDIN_RET V+15A
JA302 R2213 IC1402
C2206
1
C1409
1
R2231
1
CONTACT SIDE
R1052
C304
R323
R264
1
R1050
R315
CN1201
C2205
D1402
D2201
3
R307 D2202
C326 C2233
C308
1
1-20
R286
KN1203
R331 IC2201
1-21
V+3R3A
Q307 C361
R358
R2204
Q303
5
R339
E
R308
R1402
R364 C342
CN1004
C357 R2005 R2214 28
1-27
C2019
6
25 20 15
C319
R350 D2003
R324 R316
8
R2006
R2015
1
C1211
D2004
1
IC2204
1 C2227
R371
1.RELAY_CONT
2.GNDD
1
1-29
3.V+11E_UNREG
5
C1209
5 R2203 R2207
C343
R1060
C2024
R2030
IC302 IC2002 5
R332 C322 R330

1 R1051
R340
R343
D304
R351 R338
1-60
R278
22
R2208 R2216
C2008
P1204
R342
1-62
R361 C307
1
1
V+11E
C362
1 5 10
C2007
C325
C2208
14
C2207
C346
C347
R359
10 5 1
20
1-1
1 14
D305
D2204 C1406
IC2004
R314
R279 R2016 1
R372
IC1401
IC2202
1
6
R2008 C2224
6
1-21
5
1
R337
R2230
C358 1 D1203
15
R322 C2027 5 R2215 1
D1401
Q308 IC304 R1059
R306
Q304
C1818 C1817
R1053
R2004
E
R2014 D2203
R360
R365 R349 15 20 25
C1408
R2206
R329 28
1-20
R281
1-2
1
10
C303
R321
R352
V+3R3E
P301 C337 R313 5 R2205
R305 C2219
ADAT_CH3_ANA
C2005
Q301
C353 C2033 IC2001

D301 R354 R311 L1401
7
C354 R280
D2001
1-24
E
R362 C336
D2002
R1801 C1835
Q305
1-23
R1061
5
R346 1

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ORDER NO.

DJM-850-K, DJM-850-S SYXJ8 AC 220 V to 240 V

DJM-850-K, DJM-850-S LXJ AC 110 V to 120 V or 220 V to 240 V

DJM-850-K, DJM-850-S KXJ5 AC 220 V

PIONEER CORPORATION 1-1, Shin-ogura, Saiwai-ku, Kawasaki-shi, Kanagawa 212-0031, Japan

(FOR USA MODEL ONLY)

10.17 MAIN ASSY (11/19) ................................................................................................................................................130

Do NOT use a soldering iron whose tip temperature cannot be controlled.

The following lead-free solders are available as service parts:

1.2 NOTES ON REPLACING

1.3 NOTES ON SERVICING

A General Rated output level / Load impedance

• The specifications and design of this product are subject to

3. BASIC ITEMS FOR SERVICE

3.2 JIGS LIST

Lubricants and Glues List

Name Part No. Remarks

3.3 PCB LOCATIONS

MTRM ASSY C F USBI ASSY A INPUT ASSY R ACSW ASSY

G HPJK ASSY O REG ASSY P TRANS ASSY

FAD2 ASSY L M FAD3 ASSY

1..PNLA ASSY DWX3359

and PARTS LIST" or "PCB PARTS LIST". L

FAD1 ASSY FAD2 ASSY FAD3 ASSY FAD4 ASSY CH1

(DWX3366) (DWX3367) (DWX3368) (DWX3369)

PNLA ASSY FPGA_RX_DAT 19 19 FPGA_RX_DAT

CH1 CH2 CH3 CH4 RETURN A

L L L L AC POWER CORD AC POWER CORD

L=70mm P=1.0mm 22P FFC

OTHERS LXJ ONLY

19P BRIDGE CONNECTOR PF13EE-S17

SEC/HP ASSY CN4

4.2 AUDIO SYSTEM BLOCK DIAGRAM

MX25L4006EM2I- 12G Serial F LA SH (4Mbit) SPI

FL H PNLA ASSY A nalog A udio

SPI EMIF A C O NT ROL 1ch

4.3 DSP BLOCK DIAGRAM

BEAT EFFECT (SEND/RETURN) BEAT EFFECT (Others)

Cable Check Effect_C

BPM Detect Master REC out

Level meter Master

Mono Split / Stereo SWITCH & MIXING

4.4 POWER BLOCK DIAGRAM

V+5A (for ADC/DAC)

Canceling reset of MAIN Flash

Fail-safe state acquisition

Starting power supply to the peripheral ICs

FPGA_xPGM setting to HIGH

FPGA_xINIT setting to HIGH

Loading data into FPGA

FPGA_DONE setting to HIGH

Starting power supply to FL

NEC_B_CTRL setting to LOW

Loading of setup data

power supply, voltage check

Obtaining KEY data

Operation mode judgment

Notifying of operation mode

Canceling reset of DSP FLASH

MAIN UCOM -DSP

Loading of USB UCOM firmware

Process for main communication start

USB_REQ setting to LOW