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• Quartz sand is reduced in large arc furnaces by carbon (in the form of a mixture of
wood chips, coke and coal) to produce silicon according to the following reaction
• SiO2(s)+C(s)-----------Si(l)+CO2 (g)
• Then silicon is periodically poured from the furnace and blown with O/chlorine
mixture to further purify it.
• Next poured into shallow troughs, where it solidifies and is subsequently broken
into chunks
• Electric arc produces melt
• Very energy consuming process: 14kWh/kg
Characteristics
• 1 million metric tons of this MG-si are produce globally each year (large
production).
• MG-Si is used in the steel and aluminum industries.
• The total processing energy requirement are acceptable. The result of the MG-Si is
inexpensive.
• purity of metallurgical grade Si is 98 to 99%
• the major impurities are iron and aluminum
• Typical concentrations of impurities in MG Si
2. MGS to SGS
2. MG-silicon to semiconductor-grade silicon
• For use in solar cells, silicon must be much purer than MG-Si.
• Powdered MG-Si is reacted with anhydrous HCl at 300°C in a fluidized bed reactor
to form Trichlorosilane, SiHCl3 in presence of cu catalyst
• MG-Si(s) +3HCl(g) --SiHCl3(g) +H2(g)
• During this reaction impurities such as Fe, Al, and B react to form their halides (e.g.
FeCl3, AlCl3, and BCl3) with different boiling points
• The SiHCl3 has a low boiling point of 31.8 °C and distillation is used to purify the
SiHCl3 from the impurity halides.
• The resulting SiHCl3 now has electrically active impurities (such as Al, P, B, Fe, Cu or
Au) of less than 1 Parts per billion atomic (ppba= 5 × 1013 𝑎𝑡𝑜𝑚𝑠⁄𝑐𝑚3 )
The gases emitted are passed through a condenser and the resulting liquid subjected to
multiple fractional distillation to produce SeG-SiHCl3 (trichlorosilane), the source material
for the silicon industry.
MG-Si(s) +3HCl(l) --SiHCl3(g) +H2(g)
Characteristics
• The production of semiconductor grade silicon requires a lot of energy.
• Energy consumption 75-130kWh/kg silicon
• Low yield ~37%
• The high cost of this stage.
• Reach to purity 99.9999%
Ingot to wafer
• Once an ingot has been grown it is then sliced up into wafers.
• The large single crystal is sliced up into wafers which are as thin as possible
• Silicon solar cells need only be 300μm or so thick to absorb most of the appropriate
wavelength in sunlight
characteristic
• The present wafering technology its difficult to cut wafers from the large crystals
which are any thinner than 300μm and still retain reasonable yields.
• More than half the silicon is wasted as kerfs or cutting loss in the process
• This step lowers the overall yields of single-crystal
• Cutting silicon into wafers leaves the surface covered with cutting slurry and the
surface is damaged due to the action of the saw.
• After cutting the silicon substrates needs to be etched off by several microns on both
sides. Usually aqueous alkali solution of NaOH or KOH at 80-90 °C are used for the
first removal of 10 µm of damaged silicon, for the as-cut wafer (as-cut wafers are
silicon wafers which are produced as slicing).
• The overall chemical reaction generally accepted are
• The etching rate of silicon depends on the product of hydroxide ions ([OH]-) and
free water concentration ([H2O]).
• Recently ingot cutting technology has been significantly improved which reduced
the importance of having an etching process.
• After the etching process, the surface of produced solar cells becomes shiny and the
average reflectance factor is more than 35 %
• To minimize reflection from the flat surface solar cell wafers are textured, this
means a creating a roughened surface, so that incident light will have a larger
probability of being absorbed into the solar cell.
• The absorption of incident light by the solar cell is increased by applying a
geometrical surface texture to the front surface which reduces average reflection to
less than 10 %
• For mono c-Si solar cells, an anisotropic texturization is applied using dilute alkaline
solution, KOH/NaOH, at 70-80°C and 1-2 wt % with isopropanol as a wetting agent.
• The surface morphology of the textured wafer is presented in Figs. 2a and 2b, where
the pyramid height is 3-5 μm.
• The average reflection factor is decreased from 35 % to ~10 %.
4. Single crystal wafers to solar cells
4. single-crystal wafers to solar cells
• After etching the silicon wafers and cleaning them, additional impurities are
introduced into the cell in controlled manner by a high-temperature impurities
diffusion process.
• The emitter diffusion process is performed in a variety of ways.
• In this case of p type wafer a phosphorous containing coating is applied to the
surface. The wafers are then put in a belt furnace to diffuse a small amount of
phosphorous into the silicon surface.
• The flow rate of carrier gas directly influences the production.
• Carrier gas must be dry (RH less than 40%), free of oxygen and chemically
inert. Helium is most commonly used because it is safer than, but comparable
to hydrogen in efficiency, has a larger range of flow rates and is compatible
with many detectors. Nitrogen, argon, and hydrogen are also used.
• A carrier gas is bubbled through phosphorus oxychloride (POCl 3), mixed with a
small a mount of oxygen, and passed down a heated furnace tube in which the
wafers are stacked, this grows an oxide layer on the surface of the wafers
• At the temp involved (800—1100) °C the phosphorus diffuses from the oxide into
the silicon
• After about 20min the P impurities override the B impurities in the region near the
surface of the wafers to give a thin, heavily doped n-type region
• The optimum refractive index for the ARC film to provide minimum reflection can
be calculated as,
• For the adhesive and pottant layers, silicones have been widely used.
• Pottant is the material, usually some form of silicone, like ethylene vinyl acetate
copolymer that holds crystalline solar cells in place inside their modules
• They have good UV stability, low light absorption and are appropriately elastic to
alleviate thermal stresses in the module, but they are expensive. Polyvinyl butyral
(PVB) and ethylene/vinyl acetate (EVA) have been used by several manufacturers
for the corresponding layers in the laminated approach.
we will connect many cells to make module and connect more than two modules to
make panel and the many panel to make array show below:
Disadvantages
❖ One of the main disadvantages of Cz crystallisation of silicon is the fact that square
cells are best suited to built a highly efficient solar module, whereas Cz ingots have a
round cross section.
❖ In order to use both the crystal and the module area in the best manner, the ingots
are usually cut into a pseudosquare cross section before they are cut into wafers.
❖ Additionally, the tops and tails of the ingots cannot be used for wafer production.
❖ The cropped and slapped materials, that is, tops and tails and so on, are then fed
back into the growth process again.
❖ The single-crystal growth methods, float-zoning (FZ) 20% and Czochralski growth
(CZ), 80%
❖ There are two principal technological advantages of the FZ method for PV Si growth.
• The first is that large lifetime values are obtained as a result of higher purity
and better microdefect control, resulting in 10% to 20% higher solar cell
efficiencies.
• The second is that faster growth rates and heat-up/cool-down times, along
with absences of a crucible and consumable hot-zone parts, provide a
substantial economic advantage.
❖ The main technological disadvantage of the FZ method is the requirement for a
uniform, crack-free cylindrical feed rod. A cost premium (100% or more) is
associated with such poly rods.
❖ At the present time, FZ Si is used for premium high-efficiency cell applications and
CZ Si is used for higher-volume, lower-cost applications.
❖ Electrical power requirements for these two methods 35-40kWh/kg for CZ growth
and on the order of 18 kWh/kg by Float Zone FZ
❖ Not only were energy requirements reduced, but also argon consumption was
reduced from 3 m3/kg of Si to 1 m3/kg of Si.
❖ Also, oxygen content in the crystals was reduced by 20%, the crystal growth rate
was increased from 1.28 kg/hr to 1.56 kg/hr, and relative solar cell efficiency
increased by 5%.
Bulk multi-crystalline silicon
❖ Multi-crystalline silicon offers advantages over monocrystalline silicon with respect
to manufacturing cost and feedstock tolerance, however slightly reduced
efficiencies.
❖ Another inherent advantage of multi-crystalline silicon is the rectangular or square
wafer shape
❖ Two different fabrication technologies for multi-crystalline silicon,
• the Bridgman and
• The block-casting process are employed.
❖ In both processes the solidification of high-quality multi-crystalline silicon ingots
with weights of 250 to 300 kg, dimensions of up to 70 × 70 cm2 and heights of more
than 30 cm have been successfully realized.
❖ The Bridgman technology is a quite commonly used technique,
❖ The only two companies mainly employing the casting technology are Kyocera
(Japan) and Deutsche Solar GmbH (Germany)
❖ The main difference between both the techniques is that
❖ for the melting and crystallization process only one crucible (Bridgman) is used,
❖ whereas for the crystallization process a second crucible (block casting) is used.
f. Procedure, advantage and disadvantages of Bridgman and the block-casting process for
poly crystalline silicon production
Bridgman process
❖ In the case of the Bridgman
process, a silicon nitride (Si3N4)-
coated quartz crucible is usually
employed for melting of the silicon
raw material and subsequent
solidification of the multi-
crystalline ingot.
❖ The Si3N4 coating thereby serves as
an anti-sticking layer preventing
the adhesion of the silicon ingot to
the quartz crucible walls
❖ Usually, crystallization starts at the
bottom of the crucible by lowering
the temperature below the melting
temperature (1410◦C) of silicon.
❖ Within the Bridgman process the
temperature reduction is achieved by simply
descending the liquid silicon-containing
crucible out of the hot area of the
crystallization furnace.
❖ This process is also known as Gradient freeze
technique
Block-casting process
❖ In the block-casting process, the melting is performed in a quartz crucible without a
coating,
❖ Usually, crystallisation starts at the bottom of the crucible by lowering the
temperature below the melting temperature (1410◦C) of silicon.
❖ After pouring the molten silicon into
a second crucible – for the
crystallisation also a Si3N4-coated
one is used.
❖ The temperature control during the
block-casting process is achieved by
a corresponding adjustment of the
heaters, whereas the crucible itself
is not moved during solidification.
❖ After solidification starts in the
bottom region, the crystallisation
front, that is, the liquid–solid
interphase, moves in a vertical
direction upwards through the
crystallization crucible.
❖ The directional solidification results in a columnar crystal growth and consequently
adjacent wafers fabricated out of the ingots show nearly identical defect structures
(grain boundaries and dislocations).
❖ Common crystallisation speeds used for the Bridgman technology are in a range of
about 1 cm/h (corresponding to a weight of approximately 10 kg/h for large ingots).
❖ Too high process speeds cause large thermal gradients within the solidified silicon
that may result in cracks or even destruction of the ingot.
❖ For the block-casting technology, however, owing to the more versatile and
sophisticated heater system, considerably higher crystallisation speeds can be
achieved.
Block casting: industrial furnaces
❖ The ribbon technologies may be grouped into two basic approaches: “vertical” and
“horizontal” growth (pulling) methods.
❖ The EFG, WEB and STR methods are examples of the vertical method category,
❖ while both the RGS foil and the SF methods grow crystals in a horizontal-pulling
configuration with the aid of a substrate.
g. Procedure, advantage and disadvantages of edge defined film fed growth (EFG) method
Edge-Defined Film-Fed Growth (EFG)
❖ In this technique, the geometry of the ribbon is controlled by a slotted graphite die
through which silicon is fed via capillary action
❖ A seed crystal is lowered until it contacts the liquid in the capillary.
❖ The liquid spreads out over the top of the die to
the edges where it is pinned by surface tension.
❖ The seed is withdrawn, pulling the liquid up
while more liquid flows upward through the
capillary.
❖ As the ribbon is withdrawn, the liquid freezes on
the solid crystal.
❖ The die and the crucible are integral, that is,
made of the same piece of graphite.
❖ Temperature control of a few degrees along the
interface is sufficient to prevent ribbon pull-out
or freezing of a growing ribbon to the die top.
❖ Ribbons with thicknesses from 400 μm to as
little as 100 μm have been grown.
❖ The growth rate is controlled by how fast heat
can be conducted away from the interface and
lost by radiation or convection from the solid
crystal.
❖ Very high production rates of silicon can be obtained by pulling several ribbons
simultaneously from the same melt
❖ There are several problems associated with edge defined film-fed growth.
❖ The die must be of a highly refined material that has the proper capillary
characteristics and does not contaminate the silicon.
❖ So far, carbon has been the best die material, but it still introduces some impurities.
This problem is exacerbated because there is very little volume (between the die
and the single-crystal product) in which contaminants can dissipate
❖ To avoid contamination, a highly pure silicon melt must be provided as starting
material.
❖ Additionally, repeated use tends to erode the die.
❖ EFG does not produce single-crystal silicon because of impurities and stress
resulting from process geometry, the ribbon has crystal lattice defects.
❖ For this reason, PV performance of cells made from EFG ribbon has not been as high
as, for instance, with Czochralski-grown wafers.
❖ Cells from laboratory grown ribbons have attained 12% efficiency.
❖ Projections (Backus, 1976, p. 395) are that EFG can be reduced in cost 10-100 fold,
which is the amount needed to support overall goals for making PV generally cost-
competitive.
EFG – Properties
❖ locally high dislocation densities
❖ twin boundaries
❖ a twin boundaries is a symmetric grain boundaries
❖ the red line (the twin grain boundary) is like a mirror
❖ In the String Ribbon technique, two high temperature strings are pulled vertically
through a shallow silicon melt, and the molten silicon spans and freezes between the
strings.
❖ The process is continuous: long strings are unwound from spools; the melt is
replenished; and the silicon ribbon is cut to length for further processing, without
interrupting growth.
❖ This advantage in material efficiency means String Ribbon yields over twice as many
solar cells per pound of silicon as conventional methods.
❖ Additionally, the resulting distinctive shape of the solar cell allows for a high
packing density.
j. Procedure, advantage and disadvantages of RGS
Ribbon Growth on Substrate (RGS)
❖ In this growth technique, the silicon melt reservoir and die are placed in close
proximity to the top surface of a substrate, on which the ribbon/foil grows.
❖ The substrate may be graphite or ceramic
❖ The principle is to have a large wedge-shaped crystallisation front.
❖ The die contains the melt and acts to fix the width of the foil.
❖ The thickness of the foil is controlled by the heat-removal capacity of the substrate,
pull rate and surface tension.
❖ The direction of crystallisation and growth are nearly perpendicular.
❖ The area of the growth interface now can be very large compared to the foil
thickness.
❖ The latent heat is extracted by conduction into the substrate.
❖ Growth rates from 4 to 9 m/min have been demonstrated.
❖ Kerf losses due to ingot and wafer sawing can be avoided by solidifying the silicon
wafers directly from the melt by the Ribbon Growth on Substrate (RGS) process,
thus significantly reducing the wafer cost.
❖ However, up to now solar cells made from standard RGS material suffered from
shunting problems due to current collecting structures.
❖ This resulted in lower fill factor values and hence in lower efficiencies compared to
solar cells made from block-cast multicrystalline silicon (mc-Si) materials.