Load Pull Simulation Speeds Design

of Wideband High-Efficiency PAs

■ Ray Pengelly and Mark Saffian

f
or decades, load pull A Brief Overview of
testing, which involves Load Pull Testing
varying the load imped- To obtain the best gain and
ance presented to a device efficiency from a device, the
under test (DUT) to monitor most important design task
a single performance param- involves the output matching
eter or set of parameters, has network and requires infor-
been an essential tool for mation about device behavior
characterizing RF and micro- under a range of load condi-
wave power devices. The tions. Among the first genera-
advantage of such a method tion of load pull testing tools
lies in the relative simplic- were calibrated tuners that
ity of the test system com- placed a known load (R ! jX)
ponents, including a power at the device output, allowing
meter and a single tuner that image licensed by ingram publishing
the user to add load imped-
can be easily and inexpensively assembled. The disadvan- ance to a set of iterative measurements—typically, these
tage of a traditional load pull system for designing wideband include voltage, current, and input and output power—
high-efficiency power amplifiers (PAs) lies in the limited taken over a range of operating frequencies and power lev-
information provided by scalar measurement instruments. els. Similar tuners can be used to perform the same role at
Vector-based parameters cannot be measured without intro- the device input to evaluate device behavior over a range of
ducing a dedicated network analyzer. Additionally, mea- input impedances. From these measurements, an engineer
surement accuracy requires reliable de-embedding of the can identify the specific load and source impedances that
data measured through the passive components between the deliver optimal device performance. Figure 1 diagrams a
power meter and load tuner, as well as through the output typical load pull tuner test system [2], [3].
tuner to the DUT reference plane. Cripps [1] offers a more This type of calibrated tuner system remains an essential
detailed discussion of load pull measurements and contours. tool for accurate device characterization. Its advantages are

Ray Pengelly (raypengelly@gmail.com) is with Prism Consulting, Hillsborough, North Carolina, United States. Mark Saffian (mark.saffian@
ni.com) is with the AWR Group, National Instruments, Ottsville, Pennsylvania, United States.

Digital Object Identifier 10.1109/MMM.2015.2505698

Date of publication: 5 February 2016

42 1527-3342/16©2016IEEE March 2016

 Source Input Tuning Fixture with DUT Bias Tee Calibrated Load Tuner

Lumped Elements (L/C)

or
Coaxial Line with
Stub, Slug, or RL
Sliding Tuners
CLoad

VCC/VDD Control/Data Interface

Power Meter Power Meter

Figure 1. A functional diagram of a load pull tuner test system.

its simplicity and the ability it allows for operating at high
power levels. Nearly any passive network can be presented
to the device, although calibration becomes increasingly dif-
ficult as the network becomes more complex.
Active load pull was developed as an all-electronic al-
ternative to the substitution method provided by load pull
tuners. It is easy to see that input impedance measurements
can be made directly with a vector network analyzer (VNA).
Although it is not obvious, the same type of measurement
may be done at the output, looking “backward” into the de-
vice to determine the output impedances. A signal genera-
tor injects the test signal through a directional coupler, with
the reflected signal’s magnitude and phase determined by a
detector, such as a VNA. Instruments and couplers exist for
an extremely wide range of frequencies, which allows active
load pull to obtain data over wide bandwidths. Techniques
using multiple tuners and/or couplers provide a means of
obtaining reflection coefficient measurements at harmonic
frequencies. Because instruments are readily automated, ac-
tive load pull is especially valuable for production testing.
Harmonic Load Pull
Load pull test systems with independent control of imped-
ance at fundamental and harmonic frequencies allow the
characterization of devices for the high-efficiency and wide-
bandwidth classes of operation used for today’s radar and
wireless communication systems. The highest-efficiency PAs
use switched modes of operation (class-E, class-F, inverse

Triplexer
Power Meter

Tuner
F0

RL
F0
LPF

Source Input Tuning Fixture with DUT Bias Tee Power Meter

F2 Tuner
BPF F2

RL
CLoad
F3
HPF
Power Meter VCC/VDD Power Meter

Tuner
F3

RL

Control/Data Interface

Figure 2. A harmonic load pull test system using a triplexer with independent tuners at fundamental and harmonic frequencies.

March 2016 43
To obtain the best gain and efficiency
from a device, the most important
design task involves the output
matching network and requires
information about device behavior
under a range of load conditions.
class-F, and others) [4], where the class of operation is deter-
mined by the behavior of the input and output matching net-
works at harmonic frequencies. For these PAs, the designer
must simultaneously find the most efficient impedance
match at the fundamental while properly terminating each
harmonic with the necessary short or open circuit.
Load pull techniques are available to examine this simul-
taneous fundamental and harmonic matching problem. Mul-
tiple tuners can be placed at the output of the DUT in three
main ways. First, tuners may be cascaded, achieving an ex-
panded range of tuning that includes multiple settings for
the same fundamental ^F0 h impedance, while changing the
harmonic ^F2, F3h impedances. Second, tunable stubs may be
added for the harmonics because the optimum load at the
harmonics will be either a short or an open circuit. Finally,
F0, F2, and F3 can be separated in a band-splitting filter (or tri-
plexer) and presented to three independent tuners (Figure 2).
This last is the most flexible and high-performance option: the
wide separation of frequencies simplifies the design of filters
that achieve high isolation between the bands [5], [6].
Active techniques may also be applied to harmonic load
pull. Figure 3 shows an active test system using the triplexer
method [7]. Note that the triplexers shown at the coupler
Source Input Tuning Coupler Fixture with DUT Coupler Bias Tee
CLoad
Triplexer
F0 F2F3 F0 F2F3
Control, Measurement (VNA), and Data Analysis
Figure 3. An active harmonic load pull test system using the triplexer method. BPF: bandpass filter; LPF: lowpass filter;
HPF: highpass filter.
44 March 2016
sampling ports are only required if the measurement system
is configured for separate detectors at each frequency. They
are not required if a tunable detector such as a VNA is used
to observe the fundamental and harmonic responses.
Figures 1–3 are simplified block diagrams of typical load
pull test systems. Alternate architectures have been devel-
oped for both commercial and lab-built systems, and there
are many variations in the features and details of their im-
plementation. In commercial equipment, coupler and tuner
designs are often patent-protected, and the analysis algo-
rithms may be proprietary.
PA Design Example Using Load Pull Simulation
The next stage in the development load pull testing is load
pull simulation. Manufacturers of high-performance power
transistors have invested many hours in research, measure-
ment, and testing to have accurate, scalable models. In most
cases, this work has been done in collaboration with the major
design and simulation software developers. Using these accu-
rate models, load pull data can be obtained through simula-
tion, giving PA designers a software tool to obtain a device’s
proper voltage and current waveforms for the desired class
of operation. Unlike measurements, load pull simulation can
be integrated into the overall design process, greatly reducing
the time required to explore design options for optimal PA
performance.
In the following discussion, we illustrate how PA design
may be accomplished using the load pull scripts in the Micro-
wave Office circuit design software for the National Instru-
ments (NI) AWR Design Environment. The design example
we describe uses a Cree CGH40010F gallium nitride (GaN)
high-electron-mobility transistor (HEMT) in a class-F PA at
F2 Load
F2 Source
Triplexer
z
F0 Load
F0 Source
BPF
LPF z
HPF
F3 Load
F3 Source
VCC/VDD z
Triplexer
F2 and F3 Sources
Phase Locked
to F0 Source
 The 2016 IEEE MTT-S
International Microwave Symposium

Discover New Technologies. Gain Fresh Insights.

Connect with Your Community!

Get the entire pulse of the Microwave and RF industry in just a few days:
• Thousands of the world’s top microwave and wireless experts
• Technical sessions, interactive forums, plenary and panel sessions, workshops,
short courses, application seminars, and a wide variety of other technical activities
• The world’s largest Microwave/RF component, test & measurement, software and
semiconductor exhibition featuring over 600 companies

Attend IMS2016 and see what’s new, improve your technical knowledge and network with
colleagues, customers and vendors face-to-face in one efficient trip. No other event in the
industry offers access to as many technical experts and leading products. IMS is the ideal
forum to exchange ideas and meet the people who truly move our industry forward.

Turbocharge your productivity and boost your career at IMS2016!

Join us in San Francisco!

22-27 MAY 2016 • IMS.MTT.ORG

MOSCONE CENTER, SAN FRANCISCO, CA

Digital Object Identifier 10.1109/MMM.2016.2514663

 know, a perfect square wave
contains an infinite number

Z = 50 X

Figure 4. The operational diagram of the Load Pull Wizard in Microwave Office. HB: highband; SRL: series resistor–inductor; IND: inductor; DCVS: dc
of odd harmonics. In prac-

P=2
tice, only a small number of

F0 = 2,000 MHz Port

harmonics can be accommo-

V = 40 V
2
dated within the operating

ID = V2
DCVS
3:Bias
bandwidth of the device and
Mag1 = 0.5

Mag2 = 0.5

Mag3 = 0.5
HB Tuner 2

Z0 = 50 X
Ang1 = 0°

Ang2 = 0°

Ang3 = 0°
its surrounding circuitry. De-
ID = TU2

-
signers rarely consider more
than five harmonics and typ-
1 ically limit rigorous design
to three harmonics. With a
square wave approximation
using five harmonics, a class-
L = 0.3 nH

F PA would have a maximum

ID = L1

PAE in the 90% range. The

IND

example in this article is de-

VA

signed using the second and

third harmonics.
CGH40010F R6

Figure 4 shows the basic set

2

up of the NI AWR software

1 Tbase = 25
Tr

load pull simulation: a source

6

ID = Q1

Rth = 8

pull tuner is located at the in-

Ii
I

put (left), and a load pull tuner

Vi
V

ID = AMP1
I_METER is located at the output (right),
4

with bias tees integrated into

those tuners. The CGH40010F
GaN HEMT device is a bare
I
L = 0.3 nH
R = 2.3 X

die, so wire bonds have been

ID = RL1

V_METER
ID = VM1

included to show the effect of

SRL

additional parasitics on the

waveforms generated by the
+

-
V

simulation.
The first step in this de-
sign is to do a source pull
simulation for power gain
and PAE at the fundamental
V = –3.1 V
1

voltage source; HB: harmonic balance.

frequency, where we make

F0 = 2,000 MHz

ID = V1
DCVS

the assumption that the out-

Mag1 = 0.5

Mag2 = 0.5

Mag3 = 0.5
HB Tuner 2

Z0 = 50 X
Ang1 = 0°

Ang2 = 0°

Ang3 = 0°

put of the transistor is direct-

ID = TU1

ly connected to a 50-Ω load.

3:Bias

The fundamental source pull

results for PAE are shown in
Power = 28 dBm

Figure  5(a), along with the

optimum impedance points
Z = 50 X

for gain and power output. It

Port 1
P=1

is important to keep in mind,

2000 MHz, and shows how power-added efficiency (PAE) is
maximized by optimizing source pull and load pull at the
fundamental frequency, plus second and third harmonics
^F2 and F3 h .
An ideal class-F power amplifier will have a square volt-
age waveform between the drain and source terminals, along
with a corresponding half-sine current waveform. As we
however, that the output of
the device is loaded directly
into 50 Ωs, so although there
is quite good power gain of 15.3 dB at the optimum point,
the gain decreases away from that optimum point (shown
in green).
The results for output power (shown in orange) are quite
close to those obtained for power gain, even though the out-
put of the device is loaded into 50 Ωs. To some extent, this is
due to the fact that the intrinsic load line of the device is not

46 March 2016
 Fundamental Source Pull for PAE Fundamental Load Pull for PAE
SWP Max SWP Max
Result for 330 330
Gain Result for
15.298 Gain 71.965
Mag 0.8399 60.531 13.154 Mag 0.403
Ang 166° Mag 0.8082 Mag 0.3513 Ang 114.5°
Ang 162° Ang 133.3°
Result for
Power Result for
43.501 Power
Mag 0.8399 41.28
Ang 166° Mag 0.4048
Ang 136.5°

PAE_PORT_1_PORT_2 PAE_PORT_1_PORT_2
PAE_PORT_1_PORT_2 Max SWP Min PAE_PORT_1_PORT_2 Max SWP Min
Converged Points 0 Converged Points 0
(a) (b)

Figure 5. The fundamental frequency (a) source pull and (b) load pull results for PAE, along with the optimum impedances for gain
and power. Mag: magnitude; Ang: angle; SWP: sweep; Max: maximum; Min: minimum.

Second Harmonic Load Pull for PAE Third Harmonic Load Pull for PAE
SWP Max SWP Max
330 330
81.597
80.253 Mag 0.9191
Mag 0.9565 Ang 26.02°
Ang 80.49°

PAE_PORT_1_PORT_2 PAE_PORT_1_PORT_2
PAE_PORT_1_PORT_2 Max SWP Min PAE_PORT_1_PORT_2 Max SWP Min
Converged Points 0 Converged Points 0

81.597
Mag 0.9191
Ang 26.02°

80.253
Mag 0.9565
Ang 80.49°

(a) (b)

Figure 6. Here, both ports are loaded for optimal PAE, which improves to (a) >80% when the second harmonic is properly terminated
and (b) only slightly more for the third harmonic.

March 2016 47
 S(11) of Input Network S(11) of Output Network
SWP Max SWP Max
6,000 MHz 6,000 MHz

2,000 MHz 6,000 MHz

Mag 0.9215 2,000 MHz Mag 0.7467
Ang 163.5° Mag 0.6171 Ang 63.36°
Ang 106.2°

4,000 MHz 4,000 MHz

Mag 0.7446 Mag 0.9282
Ang -152° Ang -6.806°
6,000 MHz
Mag 0.8765
Ang -150.2°

S(1,1) S(1,1)
Ideal_F_Input SWP Min Ideal_F_Input SWP Min
2,000 MHz 2,000 MHz

(a) (b)

Figure 7. The S11 of (a) the input network with terminations based on load pull analysis and (b) the output network.

that far from 50 Ωs, as will be apparent when we describe how
the fundamental load pull is performed. The optimum point
for PAE also has an impedance that is close to the maximum
for both gain and power, which minimizes the need for a trad-
eoff among the three parameters. Even though the device is
terminated directly into 50 Ωs, the power added efficiency is
already over 60% at this point.
With the input match established, the next step is to per-
form load pull at F0 . Again, the goals are power gain and
PAE. Due to the feedback effect, the optimum fundamental
second and third harmonic terminations for the source pull
measurements also play a significant role for high efficien-
cy. Therefore, second and third harmonic source pull and
load pull simulations must be performed to further improve
power gain and PAE, ensuring that the best performance is
obtained from the device. Of course, when the harmonic ter-
minations are included, their impedances will have a small
effect on the fundamental impedance. Consequently, it will
be necessary to iterate the load pull process at least twice to
reach that optimum point.

TLINP
ID = TL3
Z0 = 11.1 X
L = 17.74 mm
Eeff = 1
Loss = 0
TLINP F0 = 0 MHz
ID = TL1
Z0 = 64.3 X TLINP TLINP
L = 22.46 mm ID = TL2 ID = TL4
Eeff = 1 Z0 = 35.94 X Z0 = 40 X
Loss = 0 L = 28.05 mm L = 2.81e-6 mm
F0 = 0 MHz Eeff = 1 Eeff = 1
Loss = 0 Loss = 0
F0 = 0 MHz F0 = 0 MHz

PORT PORT
P=2 P=1
Z = 50 X Z = 50 X

Figure 8. A schematic of the input matching network based on an ideal transmission line, with open and shorted stubs to replicate the
harmonic source impedance requirements determined through source pull simulations. TLINP: physical transmission line length.

48 March 2016
  

 
The 2016 Asia Pacific Microwave Conference (APMC2016) will be held in Delhi, India, during 5-9 December 2016.
APMC2016 is supported by the IEEE MTT Society. Papers submitted to APMC2016 will be peer reviewed for novelty,
technical correctness and significance of the work.
The conference will cover the entire scope of microwave engineering, including RF/microwave, antennas & propagation and
EMC/EMI. Prospective authors are invited to submit original papers on their latest research results. Accepted papers will be
submitted for publication in IEEE Explore. Proposals for special sessions, workshops and tutorials are also solicited.
Suggested Topics (not exhaustive):
•Solid States Devices and Circuits • Computer Aided Design and Design • Communication Systems
•Low-Noise Devices and Techniques Automation • High Speed Digital Circuits and SI
•High-Power Devices and Techniques • Instrumentation and Measurement • Submillimeter Wave Techniques
•Monolithic Integrated Circuits Techniques • EMI and EMC
•Passive Devices and Circuits • Electromagnetic Field Theory • Photonics and Optics
•Packaging, Interconnects, and MCMs • Computational Electromagnetics • Wireless and RF Components and
•Ferrite and SAW Components • Microwave and Millimeter Wave Systems Systems
•Superconducting Components and • Emerging Microwave Technologies • Wide Band Gap Semiconductor
Technology • Microwave and Millimeter Wave Antennas Devices
• Microwave-Optical Design • Microwave Remote Sensing and Sensors • Radar and Broadband Communication
• Smart Antennas, Phased and Active Systems
Arrays • MEMS
• Scattering and Propagation • EBG, PBG, Metamaterials and other
novel materials

* Some specialized topics not listed above will be covered in the collocated conference IMaRC-2016. Submitted papers in these areas may
be shifted to IMaRC-2016 if felt desirable.

Microwave Exhibition: Manufacturers and distributors of microwave components, systems, measurement equipment and
design software are invited to exhibit their products and services. Prospective exhibiters should contact Dr. Mahesh P.
Abegaonkar (mpjosh@care.iitd.ac.in, +91-9891079034) to obtain a prospectus.

APMC2016 Prize: Outstanding papers APMC2016 Student Prizes: Outstanding students papers
presented at APMC2016 will be awarded the presented at APMC2016 will be awarded APMC2016 Student
APMC2016 Prize. Prizes.

Submission Guidelines: Please refer to the conference website for templates and instruction for submitting papers and
proposals for special sessions, workshops and tutorials: http://www.apmc2016.org

Important Dates:
Proposals for special sessions, workshops and tutorials: June 10, 2016
Preliminary paper submissions (3-4 pages in PDF form): June 24, 2016
Notification of acceptance: September 02, 2016
Final paper submissions: October 07, 2016

CONTACT For further information please visit the Asia Pacific Microwave Conference 2016 website,
http://www.apmc2016.org or contact the Conference Office: Foundation for Innovation and Technology Transfer
(FITT), IIT Delhi, Hauz Khas, New Delhi 110 016. INDIA

 
   
SPONSORED  BY:      
 
 

      ASIA  PACIFIC  MICROWAVE  CONFERENCE  OFFICE:    FITT,  IIT  Delhi,  New  Delhi  –  110  016.  
 

Digital Object Identifier 10.1109/MMM.2016.2514664

 TLINP
ID = TL1
Z0 = 105.3 X
L = 42.91 mm
Eeff = 1
Loss = 0
F0 = 0 MHz

TLINP
IND
ID = TL2
ID = L1
Z0 = 44.15 X
L = 0.3 nH
L = 27.63 mm
IND Eeff = 1 CAP PORT
PORTT
ID = L2 Loss = 0 ID = C1 P=2
P=1
L = 0.3 nH F0 = 0 MHz C = 4.505 pF Z = 50 X
Z = 50 X

V_PROBE TLINP
ID = VP1 ID = TL3
Z0 = 33.75 X
L = 16.45 mm
Eeff = 1
Loss = 0
F0 = 0 MHz

Figure 9. The terminations based on load pull analysis. The m/4 shunt transmission line, also used for the
drain bias, is high Z for odd harmonics and low Z for even harmonics.

Figure 5(b) shows the contours and optimum results for PAE,
along with the optimum impedance points determined by load
pull for gain and power at F0 . The result for power is similar to
the impedance point for gain, with a small difference seen for
the optimal PAE result. At this point, PAE has improved to 72%
with both ports matched for PAE at F0 only. Also, we see that
the optimum impedance on the load side of the device is not far
removed from 50 Ωs—about a 2:1 voltage standing-wave ratio.
We will consider the impact on the output matching circuit in
the discussion of design details that follows.

PAE
90

80
PAE (%)

70

60

50
PAE(PORT_1, PORT_2)[X, 21]
Ideal_Amp
40
0

0
80

90

00

10

20
1,

1,

2,

2,

2,

Frequency (MHz)

Figure 10. The PAE versus frequency. The PAE remains

relatively constant over 150 MHz but drops off quickly below
1.9 GHz and above 2.05 GHz. Figure 11. A photo of the constructed PA.

50 March 2016
 lamc 2016
puerto
vallarta

IEEE MTT-S LATIN AMERICA

MICROWAVE CONFERENCE

International Advisory Committee The IEEE MTT-S Administrative Committee recently approved an initiative to create the IEEE MTT-S Latin America
Microwave Conference (LAMC), to be held in the second week of December, every two years, starting in 2016. LAMC
IEEE MTT-S President
will have a general scope on RF and microwave engineering and technologies. This international conference is
Tim Lee
expected to move around to different locations in the region (Argentina, Brazil, Chile, Colombia, Mexico, Peru, etc.).
IEEE MTT-S President Elect It will aim to achieve a high technical quality and will be technically and financially sponsored by IEEE MTT-S.
Ke Wu
The IEEE MTT-S Latin America Microwave Conference has the following general goals:
IEEE MTT-S M&S Chair
• To encourage technological, scientific and academic • To increase MTT-S membership in Latin America
Thomas Brazil
development in Latin American countries
• To increase local interest and perception of relevance
IEEE MTT-S Administrator
• To promote participation in global MTT-S events of MTT-S with respect to the local needs (cf. MTT-S
Mike Golio
Humanitarian Initiative)
• To encourage the development of local MTT-S activities
IEEE MTT-S R9 Coordinators
Silvio E. Barbin
José E. Rayas-Sánchez The first edition of LAMC will take place in Puerto Vallarta, Mexico, on December 12-14, 2016
www.visitpuertovallarta.com
Organizational Committee
The Technical Program Committee of the 2016 IEEE MTT-S Latin America Microwave Conference (LAMC) wishes to
General Chair
invite original contributions to this event. The conference includes, but is not limited to, the following topics:
José E. Rayas-Sánchez
ITESO, Guadalajara, Mexico 1. Passive components, circuits and devices (planar and non- 5. Active antennas (phase arrays, integrated antennas,
planar components and circuits, filters and multiplexers, smart antennas, digital-beam forming and MIMO)
General Co-Chair
tunable devices, metamaterials, FSSs and EBGs)
George E. Ponchak 6. Signal-power integrity and high-speed digital
NASA Glenn Research Center, Cleve, USA 2. Active devices, circuits and subsystems (RFICs & MMICs techniques (EM interference and compatibility,
design, power amplifiers, linearization techniques, low-noise high-speed interconnects, post-silicon validation
Technical Program Chair
circuits, signal generation, conversion & control modules, techniques, power delivery networks, computer
Roberto S. Murphy
linear and non-linear modeling and characterization) simulations and measurements)
INAOE, Puebla, Mexico
3. RF systems and applications (microwave systems and 7. CAD techniques for RF and microwave engineering
Technical Program Co-Chair
front-ends, industrial, scientific and medical applications, (surrogate-based modeling and optimization, space
Vicente E. Boria-Esbert
navigation systems, intelligent transportation systems, mapping-based methods, model order reduction
UPV, Valencia, Spain
RFID, mm-wave and THz technologies and systems, techniques, statistical analysis and design, EM-based
Website Administrator imaging, sensors, wireless power transmission) and multiphysics design optimization, EM field theory,
Luis Eduardo Pérez-Bernal time and frequency-domain numerical techniques)
ITESO, Guadalajara, Mexico 4. Communication systems (terrestrial, vehicular, satellite
and indoor applications, wireless and cellular
Publicity and Public Relations Chair communication systems)
Diana Valadez
IEEE Guadalajara Section Chair
Two special sessions will be encouraged for LAMC:  Special Session on SIGHT (Special Interest Group on
Publications Chair Humanitarian Technology); and  Special Session on RF and Microwave Applications for Smart Cities.
José Raúl Loo-Yau
CINVESTAV Guadalajara, Mexico Papers submitted to LAMC 2016 will be peer reviewed and evaluated based on originality, quantitative contents,
clarity, and interest to the audience. The review process will be single-blind. LAMC will use IEEE TPMS as the
Industrial Exhibition Co-Chairs
electronic paper management system. All accepted and presented papers will be published in the LAMC Conference
Emmanuel Mercado
Proceedings and submitted for inclusion in the IEEE Xplore Digital Library.
Averna Guadalajara
Jose Raul Loo-Yau English will be the official language of the conference. Prospective authors are cordially invited to submit a three-
CINVESTAV Guadalajara, Mexico
page two-column manuscript, following the instructions available at the conference website (http://lamc-ieee.org).
Students Coordinator
Jorge Luis Urbina Martinez
CINVESTAV Guadalajara, Mexico Important Dates
Financial Chair
Proposals for special sessions and Notification of acceptance: September 5, 2016
Zabdiel Brito-Brito
ITESO, Guadalajara, Mexico tutorials: July 1, 2016 Accepted papers submission: October 3, 2016
Papers submission: August 1, 2016 Conference dates: December 12-14, 2016

www.lamc-ieee.org
Digital Object Identifier 10.1109/MMM.2016.2514665
Using accurate models, load pull data
can be obtained through simulation,
giving PA designers a software tool to
obtain a device’s proper voltage and
current waveforms for the desired
class of operation.
There are several options for source and load pull optimi-
zation at the second and third harmonics. Figure 6(a) shows
the result with the fundamental source and load impedances
set to previous values, then allowing the Microwave Office
Load Pull Wizard’s optimization routine to find the opti-
mum second harmonic load pull for maximum PAE. In this
case, the PAE has improved to over 80%. Adding the third
harmonic load pull, as shown in Figure 6(b), has a smaller
effect, improving PAE by one or two percentage points.
The ability to perform source pull and load pull for the
device at the second and third harmonics aids in meeting
other performance goals, such as maximizing power gain or
output power.
Using the Load Pull Data
Now that the optimum, fundamental second and third har-
monic terminations have been identified, the PA design
can be implemented. The example presented here is for a
relatively narrow-band design centered at 2 GHz, using the
CGH40010F transistor. Matching networks will be synthe-
sized that transform as closely as possible the 50-Ω input and
output to the required device impedances over the entire fre-
quency range.
The ideal input network for a class-F PA consists of trans-
mission lines, plus a shorted stub on one side and an open
stub on the other. The impedance transformations and har-
monic terminations of this network closely approximate
the values determined by the previous series of source pull
optimizations at the fundamental and harmonic frequen-
cies using this combination of open-stub and series trans-
mission lines.
Power, Gain, PAE, DCRF Versus Input Power
20
Power (W) and Gain (dB)
18
16
14
12
10
8 40
Power
6 Gain
4 DCRF
2 PAE
0 0
14 16 18 20 22 24 26 28 30 32
Input Power (dBm)
Figure 12. The measured performance of the constructed PA.
52 March 2016
The S11 of that input network is plotted in Figure 7(a),
showing the results at 2, 4, and 6 GHz. Comparing these im-
pedance points with the ones predicted by the Load Pull Wiz-
ard, we find that they are not exactly the same. The limitations
of physical implementation do not always permit precise real-
ization of the ideal network design.
An ideal class-F output has a quarter-wave line that is
also used to provide drain bias for the transistor. In addition
there is an open circuit stub along with some transmission
line transformation, providing an open at the second har-
monic and a short at the third harmonic.
Looking into the input of the network from the location
of the device drain, Figure 7(b) shows the fundamental,
second, and third harmonic impedances presented by the
network. Again, going back to the Load Pull Wizard re-
sults, we can see that there are some differences between
the practical transmission-line-based network and the
ideal impedances.
With the networks placed at the input and output of the
GaN HEMT device, a simulation of the complete amplifier is
run. The results show that PAE reaches a maximum of 84%,
which is slightly better than the result predicted by the Load
Pull Wizard. Figures 8 and 9 show the “ideal” input and out-
put networks for the class-F PA. Some adjustment is needed to
these circuits to include transmission line losses, non ideal ele-
ments and discontinuities.
Recall what was noted earlier—when source and load
pull are done with the Load Pull Wizard, users will get some
degree of waveform engineering. If they tell the Wizard that
they want to have maximum PAE, the Wizard’s optimization
algorithms will try to produce voltage and current wave-
forms at the transistor that are not only the right shape but
are also ideal and antiphase.
The waveform plot approximates a square voltage wave-
form—or as closely to one as we can get by engineering only
two harmonics. The half-sinusoid current waveform is a much
better approximation. These waveforms are obtained at the de-
vice junction, so we do not have to worry about the effects of
parasitics between the device and the model pins. Recently de-
veloped Cree GaN HEMT models have additional pins that al-
low measurement directly at the junction to show the transistor
waveforms [8].
Another feature of this design is in the harmonic content
seen at the output of the amplifier. This information is ex-
100 tracted not at the drain of the amplifier, but also at the out-
put. From this data, we see that the harmonic terminations
90
PAE (%) and DCRF (%)
80 are doing their job well (at the output, there is >23-dB worst-
70
case harmonic rejection, confirming that the terminations
60
50 are working properly) as there is very little harmonic con-
tent coming through the output of the amplifier. A practical
30 realization of this class-F PA was successfully demonstrated
20 by Schmelzer and Long [15].
10
Moreover, output power varies by 1 or 2 dBm across 200
MHz, so it is an inherently narrowband design—as are most
class-F PAs. Figure 10 shows the PAE versus frequency, and
we can see that it is in the range of 80+% over about 150 MHz
but drops off quickly on either side at 1.9 and 2.05 GHz.
 Figure 11 shows a photo of the constructed PA using the
CGH40010F device, while Figure 12 shows its measured
performance.
Switching modes of operation for PAs such as class-F
and inverse class-F are becoming more and more popu-
lar as designers focus on improving PAE. This is true for
a range of applications anywhere from radar to wireless
telecommunicaitons. PA designers can perform load pull
and obtain optimum matching in simulation, using tools
such as the NI AWR Design Environment. Further, they
can inspect transistor voltage and current waveforms, as
required for the process of waveform-engineered PA de-
sign. These capabilities increase designer’s confidence in
the high performance of their designs; they also save time
in the design process.
References
[1] S. C. Cripps, RF Power Amplifies for Wireless Communications. Norwood,
MA: Artech House, 1999.
[2] Basics on Load Pull and Noise Measurements, Applications Note 8, Quebec,
Canada: Focus Microwaves, Inc., June 1994.
[3] A Load Pull Setup. Quebec, Canada: Focus Microwaves, Inc. [Online].
Available: www.focus-microwaves.com
[4] A. Grebennikov and N. O. Sokal, Switchmode RF Power Amplifiers, Newton,
MA: Newnes, 2007.
[5] M. Marchetti, “Mixed-signal instrumentation for large-signal device char-
acterization and modelling,” Ch. 3, Source and load-pull architectures,
Ph.D dissertation, Dept. Microelectronics, Technical Univ. Delft, 2013.
[6] G. Simpson, “A Comparison of Harmonic Tuning Methods for Load Pull
Systems,” Application Note 5C-043, Maury Microwave Corp., July 1999.
[7] G. Simpson, “Device Characterization with Harmonic Source and Load
Pull,” Application Note 5C-044, Maury Microwave Corp., Dec. 2000.
[8] M. Marchetti, M. J. Pelk, K. Buisman, W. Neo, M. Spirito, L. C. N. de
Vreede, “Active harmonic load–pull with realistic wideband communica-
tions signals,” IEEE Trans. MTT, vol. 56, no. 12, pp. 2979–2988, Dec. 2008.
[9] P. Colantonio, F. Giannini, and E. Limiti, High Efficiency RF and Microwave
Solid State Power Amplifiers. Hoboken, NJ: Wiley, 2009.
[10] V. A. Borisov and V. V. Voronovich, “Analysis of switched-mode transis-
tor amplifier with parallel forming transmission line,” Radiotekhnika Elek-
tronika, vol. 31, pp. 1590–1597, Aug. 1986.
[11] M. K. Kazimierczuk, “A new concept of Class F tuned power amplifier,”
in Proc. 27th Midwest Circuits Systems Symp., Nov. 1997, pp. 2007–2012.
[12] T. He. Design of radio frequency power amplifiers for high efficiency and
high linearity. M.S. thesis. Electrical and Computer Eng. Electronic Eng.
Option, California State Univ., Chico, 2009. [Online]. Available: http://
csuchico-dspace.calstate.edu/xmlui/bitstream/handle/10211.4/168/
10%2019%202009%20Tien%20He.pdf?sequence=1
[13] A. Grebennikov, “Load network design technique for Class F and inverse
Class F PAs,” High Freq. Electron., vol. 10, no. 5, pp. 58–76, May 2011.
[14] R. Pengelly, W. Pribble, T. Smith, “Inverse Class-F design using dynamic
loadline GaN HEMT models to help designers optimize PA efficiency,”
IEEE Microwave Mag., vol. 15, no. 6, pp. 134–147, Sept.–Oct. 2014.
[15] D. Schmelzer and S. Long, “A GaN HEMT class F amplifier at 2 GHz with
>80% PAE,” IEEE J. Solid State Circuits, vol. 42, no. 10, Oct. 2007.


w
Best Ne
in
Journal 5
1
STM 20

Become a published author in 4 to 6 weeks.

IEEE Access is a multidisciplinary journal that allows you to:
• Publish articles in 4 to 6 weeks
• Expect the IEEE trusted peer review with a typical one-third acceptance rate
• Reach millions of global users through the IEEE Xplore® digital library with free access to all
• Submit multidisciplinary articles that do not fit neatly in traditional journals
• Integrate multimedia and track usage and citation data for each published article
• Connect with readers through commenting
• Publish without a page limit for only $1,750 per article

IEEE Access... a multidisciplinary open access journal that’s worthy of the IEEE.

Learn more about this

14-PUB-246 11/15

award-winning journal at:

www.ieee.org/ieee-access

March 2016 53