SJSU EE120

Lab 5 - General Purpose Input/Output (GPIO)

General Purpose In/Output Port Overview

SAMD20J18 microcontroller has two 32-bit general purpose input/output ports: port A
and port B. The LSB of port A pin, for example, is identified by PA00 and the MSB of port B pin
is PB31. These I/O pins can be configured and controlled individually or as a group. Each pin
may either be used for general-purpose I/O under direct user program control or assigned to an
on-chip peripheral (such as ADC, Timer, etc.). In EE120 lab, these pins are used for general-
purpose I/O. Each pin can be configured as input or output, with high or low sink/source current
capability and with a pull-up or pull-down resistor option.

Seven-segment display circuit

Figure 5-1 shows the 7-segment display logic. There are 4 ‘upper’ switches that enable
(when is turned on) or disable a corresponding 7-segment display. The cathode of each
segment LED of all four 7-segment displays are tied together and connected to ground through
a lower switch. There are 7 lower switches (one for each segment). To display a number on one
of the digits, the corresponding upper switch should be turned on (by a logic LOW from the
SAMD20) and the LED segments that form the pattern of the number should be turned on ) by
turning on the corresponding lower switches.

As shown in the figure, Digit ‘A’ to Digit ‘D’ are connected to pins PA04 to PA07
respectively. The decimal point and three extra dots in the display are also connected but not
used in this lab. For example, to display the number ‘0’ on the first digit (left most digit), we set
the following output pattern:

Upper switches: PA07, PA06, PA05, PA04 = 0 1 1 1 (0 = ON)

Lower switches: PB06, PB05, PB04, PB03, PB02, PB01, PB00 = 1 0 0 0 0 0 0 (0 = ON)

In other words, for displaying the digit ‘0’, all 7 segments should be turned on except the middle
bar (segment g) which is controlled by PB06.

The upper switches in Figure 5-1 are implemented by using four PNP bipolar transistors. The
lower switches are internal transistors of the SAMD20. The actual circuit diagram is shown in
the appendix of this lab manual.
 3.3V

PA07 PA06 PA05

PA04

To
Keypad

a
b g f
c e a f g a f g a f g a f g
d

PB00 PB01 PB02 PB03 PB04 PB05 PB06 PA07 PA04

PA06 PA05
a b c d e f g
PB00 PB01 PB02 PB03 PB04 PB05 PB06

(Low Logic => ON)

SAMD20

Figure 5-1: Seven-segment display circuit (connections for b,c,d,e segments are not shown).

Keypad circuit

Figure 5-2 shows the keypad circuit. There are 16 witches in the keypad. Each switch
corresponds to a key. The switches are organized into a 4x4 matrix. When a button is pressed,
a specific row and column are connected together. Think about a button as a light switch. When
you turn a switch on, two wires are connected.

One side of the switches in one row are connected to the same upper switch in the 7-
segment display circuit. When one of the upper switches is turned on, the corresponding row of
the keypad is energized (and also the corresponding display digit). At this point, if one of the 4
keys on the energized row is pressed, a high is output to the corresponding column output. In
this case all three other column outputs are pulled down to 0 by the resistors. To read all 4 rows,
the rows most be sequentially energized (similar to displaying a 4-digit number on the 7-
segment display). In the keypad/display program, the turning on of the upper switches should be
synchronized with the output 7-segment pattern and with the reading of the column input from
the keypad.

3.3V

PA07 PA06 PA05

PA04

To 7-seg
Display

Keypad

PA07 PA04
PA19 PA18 PA17 PA16 PA06 PA05

SAMD20

Figure 5-2: Keypad circuit connections

General-purpose I/O Configuration Registers

Each of the port (A and B) is configured by 24 32-bit configuration registers. For this lab, we
only need to use the first 9 of the 24 configuration register registers. For port A, these 9
configuration registers starts at address 0x41004400 are described below. For port B, these 9
register starts at address 0x41004480. These 9 registers are described below:
DIR: 32-bit, offset address: 0x00. Each bit in this register sets the direction of the
corresponding pin. 1 for output and 0 for input.

DIRCLR: 32-bit, offset address: 0x04. A ‘1’ in this register clears the corresponding bit in
DIR to zero, i.e., sets the direction of the corresponding pin to input.

DIRSET: 32-bit, offset address: 0x08. A ‘1’ in this register sets the corresponding bit in DIR
to one, i.e., sets the direction of the corresponding pin to output.

DIRTGL: 32-bit, offset address: 0x0C. A ‘1’ in this register toggles the corresponding bit in
DIR, i.e., reverse the direction of the corresponding pin.

OUT: 32-bit, offset address: 0x10. Each bit in this register sets the value of the
corresponding output pin (if it is configured as an output pin). If the pin is
configured as input, the each bit in this register determines is the pin is pull-up
(for 1) or pull-down (for 0), if the ‘pull’ function is enabled (as described later).

OUTCLR: 32-bit, offset address: 0x14. A ‘1’ in this register clear the corresponding bit in
OUT to zero, i.e., set output value of the corresponding pin to zero.

OUTSET: 32-bit, offset address: 0x18. A ‘1’ in this register sets the corresponding bit in
OUT to one, i.e., set output value of the corresponding pin to one.

OUTTGL: 32-bit, offset address: 0x1C. A ‘1’ in this register toggles the corresponding bit in
OUT, i.e., toggle the value of the corresponding pin.

IN: 32-bit, offset address: 0x20. Each bit in this register is set or cleared by an input
level sampler according to the logical level of the corresponding pin.

PINCFG[x]:
8-bit, offset address: 0x40. There are 32 of these ‘pin configuration’ registers –
one for each pin. In each of these 8-bit register, only 4 bits are used. The ‘x’
symbolizes the pin number that is being configured.
 Figure 5-3

DRVSTR: Output Driver Strength Selection

0: Pin drive strength is set to normal drive strength. Sourcing: 2mA, Sinking: 2.5mA
1: Pin drive strength is set to stronger drive strength. Sourcing: 7mA, Sinking: 10mA
PULLEN: Pull Resistor Enable. The pull resistor is typically 40k. (See Table 32-11).
0: Internal pull resistor is disabled.
1: Internal pull resistor is enabled, and the input is pulled to the value (high or low) of the
corresponding bit in OUT register in the absence of external input.
INEN: Input Enable
0: Input buffer for the 1/0 pin is disabled, preventing reading of the logic level of the pin.
1: Input buffer for the 1/0 pin is enabled, and the input value will be sampled when
required.
To configure a pin to an input pin, it is not enough just set its direction; INEN must also
be enabled.

Example:
Standard input Input with pull (high or low Totem-Pole output with input
depending on the bit in OUT) disabled
PULLEN=0, INEN=1, DIR=0 PULLEN=1, INEN=1, DIR=0 PULLEN=0, INEN=0, DIR=1
 Totem-pole output with input Output via a pull resistor After reset or when the pin is
enabled used as analog I/O.
PULLEN=0, INEN=1, DIR=1 PULLEN=1, INEN=0, DIR=0 PULLEN=0, INEN=0, DIR=0

Figure 5-4: Taken From SAMD20 Datasheet

At reset, all PORT lines are configured as inputs with input buffers, output buffers and pull
disabled

PMUXEN: Peripheral Multiplexer Enable

0: The peripheral multiplexer selection is disabled. The pin is used as GPIO and is
configured by the registers described above.
1: The peripheral multiplexer selection is enabled. The selected peripheral determines
the configuration of the pin. The state (0 or 1) of the pin may still be read from the IN
register if PINCFGy.INEN is set.

Understanding Atmel Studio C++ Syntax/Origin: (refer to Lab 3 sample code)

Upon looking at the sample code, one may notice that there are many unfamiliar lines
and syntax written in varying portions of the code. In this section, we will explain what some of
those lines represent, its purpose, and its origins. The point of this section is for you to have a
basic grasp of what you are looking at.

When creating a new project for the SAMD20J18, header files called “asf.h” is always
included at the start of the base code. The header files acts as a library that contains all the
operations and syntax used to communicate to the microcontroller. Without this line of code, the
program will not build/compile using the sample code and your future labs involving Atmel
Studio.

Figure 5-5: Header Files

In the “asf.h” header files, it holds a long list of definitions and configurations set for the
user to utilize. Those files include setups for other microcontrollers in the Atmel microcontroller
family, hence a portions of the “asf.h” files can be considered irrelevant when dealing with only
the SAMD20J18.
 After including the header file, you will start noticing unfamiliar syntax as you read further
down into the code. Questions such as what is “Port”, “Group[0]”, “PORT_PA14”, and many
more will come up in your mind. The syntax is actually defined from the header files that you
called from the top of the code.

Figure 5-6: Definitions

Line 24: Port *ports = PORT_INSTS;

*Note that “ports” is a pointer name designated by you, the coder. You can name the pointer to
anything reasonable that may not conflict with other Atmel syntax.

In figure 5-6, we dive into a portion of a header file called “samd20j18.h” and see that
“PORT_INSTS” is defined as a definition that points to the address number 0x4100440UL (UL =
unsigned long). This address number is the location where the definition “PORT” is saved and
references location of structure “Port”.

Figure 5-7: Port Structure

In figure 5-7, a structure is created and defined as “Port” using typedef. This section of
code is located in a header file called “port.h”. In the structure, contains another structure called
“PortGroup” which is separated into two groups, “Group[0]” and “Group[1]”. The two groups are
designated for port group “A” and group “B” respectively and are designated with a specified
offset from the base “PORT_INSTS” address. When calling a specified group, an offset is added
onto the base address and the user will be able to communicate to a specified group of ports.

Line 28: PortGroup *porA = &(ports->Group[0]);

Or

PortGroup *porB = &(ports->Group[1]);

*Note that “porA” and “porB” are pointer names designated by you, the coder. You can name
the pointer to anything reasonable that may not conflict with other Atmel syntax.
 Figure 5-8: PortGroup Structure

However what is “PortGroup”? In the same header file, “PortGroup” is a structure name
that contains all the registers that will be used for GPIO statements. Figure 5-8 displays what
registers are contained in the structure as well as the offset that will be added onto the base
address (PORT_INSTS or 0x41004400).

Figure 5-9: More Definitions

When all pointers are pointing to the correct address, the registers can be utilized to the
specified peripheral (GPIO for Group A in this case). Each register is can vary in size and have
different functionality, hence it is important to read what the register do in the sections above or
in the datasheet. The registers can be assigned a value or read from. In the lines below are an
example of registers being written to or read respectively.

Line 32: porA->DIRSET.reg = PORT_PA14;

Line 43: if(!( porA->IN.reg & PORT_PA15)){}

 In figure 5-9, the header file called “samd20j18.h” defines the bit location in the register
that will affect a specified port on the microcontroller. Line 32 shows that “PORT_PA14” is being
set as an output. Alternatively, you can replace “PORT_PA14” with (1<<14) for the same
results. Assuming that “DIRSET.reg” (32 bit register) previously contained the value of 0x0000
0000, assigning “PORT_PA14” to “DIRSET.reg” will result with the register to contain 0x0000
4000.

Alternatively, when reading from a register, like in line 43, we check the “IN.reg” at bit 15
for a “1” or a “0”. If the result is “0”, the “if” statement will execute. The reason why it executes
“0” instead of “1” is due to the exclamation point which is a logical “not” operator.

To see and understand how the microcontroller reacts to the provided sample code, it is
recommended that for you to build and program the SAMD20J18 microcontroller to see the
results. For further questions, ask the instructor for additional help or information.

References:

Atmel SAMD20 Datasheet

http://www.atmel.com/images/atmel-42129-sam-d20_datasheet.pdf
- Section 5: I/O Multiplexing and Considerations
- Section 8: Product Mapping (address locations)
- Section 13: Clock System
- Section 21: PORT
7-segment Display Data Sheet
http://media.digikey.com/pdf/Data%20Sheets/Lite-On%20PDFs/LTC-4627JR.pdf
Keypad Data Sheet
http://www.grayhill.com/assets/1/7/Keypads_96.pdf
 Appendix

Actual circuit diagram of the display and keypad circuit.

 3.3v

3.3v
R1
R2 PA07

SAM D20
PA19

7-seg display R4

Keypad circuit (only one row is shown).