High-Efficiency Single-Phase Three-Level

Bidirectional Inverter
Woo-Young Choi
Division of Electronics Engineering
Chonbuk National University
Jeon-Ju, South Korea
wychoi@jbnu.ac.kr

Abstract—This paper proposes a high-efficiency single-phase

three-level bidirectional inverter. The proposed inverter has a
three-level power switching circuit. It can reduce switch voltage
stresses with low harmonic components. It has common-mode
capacitors at the ac-filter to suppress the ground leakage current
for high power quality. Its circuit operation and control strategy
are described. Its common-mode circuit model is discussed. A 1.0
kW prototype has been designed and experimentally tested to
verify the performance of the proposed inverter.

Keywords—three-level, single-phase, bidirectional inverter,

equivalent common-mode circuit

I. INTRODUCTION
Grid-tied energy storage systems require a bidirectional
inverter to transfer the electrical power between the grid and
the energy storage devices [1], [2]. The bidirectional inverter
controls the bidirectional power flow and improves the power
quality of the system. To design a high-efficiency system with
high power density, a transformerless bidirectional inverter
should be considered.
Up to now various transformerless inverters have been
studied for single-phase applications [3]. Popular inverters are
H5, HERIC, and parallel buck inverters [4]. They have shown
high performance for low ground leakage current. However,
they adopt a two-level switching power switching circuit,
which results in high switch voltage stresses. In order to reduce
switch voltage stresses and to improve power efficiency, half-
bridge-based three-level inverters have been studied [5].
Although switch voltage stresses are reduced, they require
doubling the dc-link voltage, compared to the full-bridge
inverter.
To address this drawback, this paper suggests a single-
phase three-level bidirectional inverter. The proposed inverter
has a three-level power switching circuit based on a full-bridge
inverter topology. It reduces switch voltage stresses, not
requiring doubling the dc-link voltage. It uses common-mode
capacitors at the ac-filter to suppress the ground leakage
current. The proposed inverter is described by introducing its
circuit operation, control strategy, and common-mode circuit
model. Experimental results for a 1.0 kW prototype are also
discussed to verify the performance of the proposed inverter.
The proposed inverter achieves the efficiencies of 98.2 % and
97.8 % for the inverter and rectifier modes, respectively.
Fig.1 . Circuit diagram of the proposed inverter.
II. PROPOSED INVERTER
A. Circuit Configuration
Fig. 1 shows the circuit diagram of the proposed inverter. It
has two dc-link capacitors (Cd1, Cd2), two diodes (D1, D2), six
MOSFETs (S1 ~ S6), and ac-filter circuit (Lf1, Lf2, Cf1, Cf2). S1 ~
S4 operate as a high-frequency switching leg. A sinusoidal
pulse-width modulation is applied to S1 ~ S4 according to the
switching states. S1 (S2) and S3 (S4) operate complementarily
each other, respectively. S5 and S6 operate as a line-frequency
switching leg. The common-mode point of Cf1 and Cf2 is
connected to the negative terminal N of the total dc-link
voltage Vdc. It is assumed that Vd1 = Vd2 and Vdc =Vd1 + Vd2. vg is
the grid voltage as vg = Vgsinwt where Vg and w are the peak
value and the angular frequency of vg, respectively.
B. Circuit Operation
The proposed inverter has two operation modes: rectifier
mode and inverter mode. When it operates in the rectifier
mode, it transfers the electrical power from vg to Vdc. When it
operates in the inverter mode, it transfers the electrical power
from Vdc to vg. Because both operation modes can be similarly
explained, the circuit operation for the rectifier mode is only
described for one switching period Ts. The proposed inverter
has six switching states which results in five voltage levels

‹,(((
(Vdc, Vdc/2, 0, –Vdc/2, –Vdc) for vAB. Then, the switching states Vdc ǻi g
can be determined by the five voltage levels because vg can be (v g ‫ ڈ‬Vdc ) DS 1 + (v g ‫ڈ‬ )(1 ‫ ڈ‬DS 1 ) = ( L f 1 + L f 2 ) (7)
divided into four sections as state 1 (Vdc/2 < vg < Vdc), state 2 (0 2 Ts
< vg < Vdc/2), state 3 (–Vdc/2 < vg < 0), and state 4 (–Vdc < vg < –
Vdc/2). Because S1 (S2) and S3 (S4) operate complementarily where DS1 is the final duty cycle of S1. ¨ig is the variation of
each other, respectively, two duty cycles are needed to control the grid current ig. By rearranging (7) for switching state 1,
the proposed inverter. DS1_SS is the steady-state duty cycle of S1.
DS2_SS is the steady-state duty cycle of S2. In switching state 1,
S1 and S3 operate with a high-frequency. S2 is turned on and S4 2v g 2( L f 1 + L f 2 )ǻi g
is turned off. When S1 is turned on, iLf1 flows through S1 and S2. DS 1 = DS 1 _ SS + DS 1 _ TR = ( ‫ ڈ‬1) ‫ڈ‬ , (8)
Vdc VdcTs
It results in a negative voltage vg – Vdc across Lf1 and Lf2. When
S1 is turned off, iLf1 flows through S3. It results in a positive
voltage vg – Vdc/2 across Lf1 and Lf2. By applying the volt- where DS1_TR is the transient duty cycle of of S1 as
second balance rule to Lf1 and Lf2 for Ts, the steady-state duty
cycle DS1_SS of S1 can be obtained as 2( L f 1 + L f 2 )ǻi g
DS 1 _ TR = ‫ڈ‬ , for switching state 1. (9)
VdcTs
Vdc
(v g ‫ ڈ‬Vdc ) DS 1 _ SS + (v g ‫ڈ‬ )(1 ‫ ڈ‬DS 1 _ SS ) = 0 . (1)
2 DS1_SS provides a fast tracking of the fundamental component
of the grid current ig. DS1_TR makes the grid current track the
By rearranging (1), grid current reference ig*. For the rest of the switching states,
the transient duty cycle can be derived for each switch. The
proposed inverter performs the bidirectional power control
2v g between vg and Vdc. As Vdc varies when a power difference
DS 1 _ SS = ‫ ڈ‬1 , for switching state 1 (2) occurs, Vdc can be regulated by controlling the transferred
Vdc
power reflected by ig. A PI controller regulates Vdc, which
generates the grid current reference ig*. By changing the sign of
On the other hand, the steady-state duty cycle DS2_SS of S2 can ig*, the proposed inverter controls the bidirectional power flow
be represented as between vg and Vdc.

DS 2 _ SS = 1 , for switching state 1 (3) D. Common-Mode Circuit Model

Fig. 2 shows the equivalent common-mode circuit diagram
of the inverter considering the parasitic circuit components. Cg
For the rest of the switching states, the volt-second balance rule
is modeled as the capacitance between the terminal N and the
can be applied to Lf1 and Lf2 for Ts, which results in the
grid voltage ground. Rg is modeled as the ac ground resistance.
following steady-state duty cycles as
Cg is charged or discharged by the high-frequency common-
mode voltage vCm as vCm = (vAn + vAn)/2. vAN and vBN are A and B
2v g terminal switching voltages with respect to N, respectively.
DS1 _ SS = 0 , DS 2 _ SS = , for switching state 2 (4) Then, the common-mode current iCm is represented as
Vdc
v Cm v cm
iCm = = (10)
2v g Z Cm ( Z Rg + Z Cg ) // Z Cf + Z Lf
DS 1 _ SS = + 1 , DS 2 _ SS = 1 , for switching state 3 (5)
Vdc
where ZCm is the equivalent common-mode impedance. ZCm
consists of the output filter inductor impedance ZLf for Lf, the

2v g
DS1 _ SS = 0 , DS 2 _ SS = + 2 , for switching state 4. (6)
Vdc

C. Control Strategy
For the grid-tied bidirectional operation of the proposed
inverter, the grid current ig should be controlled
instantaneously. For each switching state, a transient duty cycle
should be added to the steady-state duty cycle. In case of the
switching state 1, the average voltage equation for Lf1 and Lf2
during Ts can be represented as Fig. 2. Equivalent common-mode circuit diagram of the proposed inverter

Fig. 3. Experiment waveforms for the ground leakage current.
Fig. 4. Measured power efficiency curves.
output filter capacitor impedance ZCf for Cf, the parasitic
capacitor impedance ZCg for Cg, and the ground impedance ZRg
for Rg. Then, the ground leakage current iRg is represented as iRg
= iCmZCf /(ZRg + ZCg + ZCf). If ZCf is much lower than ZRg + ZCg,
iRg could be close to zero so that iCm should be prevented from
flowing through Cg.
III. EXPERIMENT RESULTS
A 1.0 kW prototype has been designed and experimentally
tested to verify the performance of the proposed inverter. vg is
60 Hz/220 Vrms. Vdc is 380 V. Ts is 50 ȝsec. IXFK120N30P3
(IXYS) has been used for S1 ~ S6. DPG30C300PB (IXYS) has
been used for D1 and D2. The passive circuit components are
selected as Lf1 = Lf2 = 0.5 mH, Cf1 = Cf2 = 1.0 ȝF, and Cd1 = Cd2
= 440 ȝF. Fig. 3 shows the grid voltage, the dc-link voltage,
and the ground leakage current. Fig. 4 shows the measured
power efficiency curves for different output load conditions.
The proposed inverter achieves the efficiencies of 98.2 % and
97.8 % for the inverter and rectifier modes, respectively.
IV. CONCLUDING REMARKS
A high-efficiency single-phase three-level bidirectional
inverter has been suggested for grid-tied energy storage
systems. It has a three-level power switching circuit, reducing
switch voltage stresses and suppressing the ground leakage
current. The proposed inverter has been described by
introducing its circuit operation, control strategy, and common-
mode circuit model.
ACKNOWLEDGMENT
This study has been supported by the grants of National
Research Foundation of Korea (NRF-6R1D1A3B03932350)
and Small and Medium Business Administration of Korea
(C0445037).
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