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MIC4423/4424/4425
Dual 3A-Peak Low-Side MOSFET Driver
Bipolar/CMOS/DMOS Process
Functional Diagram VS
OUTA
INA 2kΩ
NONINVERTING
0.6mA IN V E R T I N G
0.1mA
OUTB
INB 2kΩ
NONINVERTING
GND
Ground Unused Inputs
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
Ordering Information
Part Number Temperatre
Standard Pb-Free Range Package Configuration
14 OUTA
INA 2 A 7 OUTA INA 2 A
NC 1 16 N C 15 OUTA
INA 2 15 OUTA 10 OUTB
INB 4 B 5 OUTB INB 7 B
NC 3 14 OUTA 11 OUTB
GND 4 13 V S
GND 5 12 V S MIC4425xN/M MIC4423xWM
NC 6 11 O U T B 14 OUTA
INA 2 A 7 OUTA INA 2 A
INB 7 10 O U T B
15 OUTA
NC 8 9 NC
10 OUTB
INB 4 B 5 OUTB INB 7 B
11 OUTB
16-pin Wide SOIC (WM)
Pin Description
Pin Number Pin Number Pin Name Pin Function
DIP, SOIC Wide SOIC
2/4 2/7 INA/B Control Input
3 4, 5 GND Ground: Duplicate pins must be externally connected together.
6 12, 13 VS Supply Input: Duplicate pins must be externally connected together.
7/5 14, 15 / 10, 11 OUTA/B Output: Duplicate pins must be externally connected together.
1, 8 1, 3, 6, 8, 9, 16 NC not connected
Test Circuit
VS = 18V VS = 18V
5V 5V
2.5V 2.5V
90% 90%
INPUT tP W ≥ 0.5µs INPUT tP W ≥ 0.5µs
10% 10%
0V 0V
tP W tP W
tD1 tF tD2 tR tD1 tR tD2 tF
VS VS
90% 90%
O U TPU T O U TPU T
10% 10%
0V 0V
Figure 1a. Inverting Driver Switching Time Figure 1b. Noninverting Driver Switching Time
TRISE (ns)
TFALL (ns)
60 60
TRISE (ns)
1000pF 60 12V
2200pF 2200pF
40 40 40
20 20 20 18V
470pF 470pF
0 0 0
4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18 100 1000 10000
VSUPPLY (V) VSUPPLY (V) CLOAD (pF)
Fall Time vs. Rise and Fall Time Propagation Delay vs.
Capacitive Load vs. Temperature Input Amplitude
100 40 50
VS = 18V VS = 18V
CLOAD = 1800pF CLOAD = 1800pF
80 5V 40
30 TF
TD2
TFALL (ns)
TIME (ns)
60 12V 30
T (ns)
20
T TD1
40 R 20
10
20 18V 10
0 0 0
100 1000 10000 -75 -30 15 60 105 150 0 2 4 6 8 10 12
CLOAD (pF) JUNCTION TEMPERATURE (˚C) INPUT (V)
ISUPPLY (mA)
ISUPPLY (mA)
60 60 60
500kHz 500kHz
50 50 1000pF 3300pF 50
40 40 40
20kHz
30 30 100pF 30
100kHz 20kHz
20 20 20
100kHz
10 10 10
0 0 0
100 1000 10000 10 100 1000 100 1000 10000
CLOAD (pF) FREQUENCY (kHz) CLOAD (pF)
ISUPPLY (mA)
ISUPPLY (mA)
60 60 60 4700pF
50 1000pF 50 2MHz 50 2200pF
40 40 40 1000pF
100pF
30 3300pF 30 100kHz 30
500kHz 100pF
20 20 20
10 10 10
0 0 0
10 100 1000 100 1000 10000 10 100 1000
FREQUENCY (kHz) CLOAD (pF) FREQUENCY (kHz)
IQUIESCENT (mA)
40 40 1
TD2 TD2
T (ns)
T (ns)
30 30
TD1 TD1 BOTH INPUTS = 0
20 20 0.1
10 10
0 0 0.01
4 6 8 10 12 14 16 18 -55 -25 5 35 65 95 125 4 6 8 10 12 14 16 18
VSUPPLY (V) TEMPERATURE (˚C) VSUPPLY (V)
INPUTS = 1 4 4
RDS(ON) (Ω)
RDS(ON) (Ω)
125˚C
0.8
25˚C
3 3
0.6 25˚C
2 2
0.4
0.2 INPUTS = 0 1 1
0 0 0
-55 -25 5 35 65 95 125 4 6 8 10 12 14 16 18 4 6 8 10 12 14 16 18
TEMPERATURE (˚C) VSUPPLY (V) VSUPPLY (V)
Application Information requires attention to the ground path. Two things other than
the driver affect the rate at which it is possible to turn a load
Although the MIC4423/24/25 drivers have been specifically
off: The adequacy of the grounding available for the driver,
constructed to operate reliably under any practical circum-
and the inductance of the leads from the driver to the load.
stances, there are nonetheless details of usage which will
The latter will be discussed in a separate section.
provide better operation of the device.
Best practice for a ground path is obviously a well laid out
Supply Bypassing
ground plane. However, this is not always practical, and a
Charging and discharging large capacitive loads quickly poorly-laid out ground plane can be worse than none. Attention
requires large currents. For example, charging 2000pF from to the paths taken by return currents even in a ground plane
0 to 15 volts in 20ns requires a constant current of 1.5A. In is essential. In general, the leads from the driver to its load,
practice, the charging current is not constant, and will usually the driver to the power supply, and the driver to whatever is
peak at around 3A. In order to charge the capacitor, the driver driving it should all be as low in resistance and inductance
must be capable of drawing this much current, this quickly, as possible. Of the three paths, the ground lead from the
from the system power supply. In turn, this means that as far driver to the logic driving it is most sensitive to resistance or
as the driver is concerned, the system power supply, as seen inductance, and ground current from the load are what is most
by the driver, must have a VERY low impedance. likely to cause disruption. Thus, these ground paths should
As a practical matter, this means that the power supply bus be arranged so that they never share a land, or do so for as
must be capacitively bypassed at the driver with at least short a distance as is practical.
100X the load capacitance in order to achieve optimum To illustrate what can happen, consider the following: The
driving speed. It also implies that the bypassing capacitor inductance of a 2cm long land, 1.59mm (0.062") wide on a
must have very low internal inductance and resistance at PCB with no ground plane is approximately 45nH. Assum-
all frequencies of interest. Generally, this means using two ing a dl/dt of 0.3A/ns (which will allow a current of 3A to flow
capacitors, one a high-performance low ESR film, the other after 10ns, and is thus slightly slow for our purposes) a volt-
a low internal resistance ceramic, as together the valleys in age of 13.5 Volts will develop along this land in response to
their two impedance curves allow adequate performance over our postulated ∆Ι. For a 1cm land, (approximately 15nH) 4.5
a broad enough band to get the job done. PLEASE NOTE Volts is developed. Either way, anyone using TTL-level input
that many film capacitors can be sufficiently inductive as to signals to the driver will find that the response of their driver
be useless for this service. Likewise, many multilayer ceramic has been seriously degraded by a common ground path for
capacitors have unacceptably high internal resistance. Use input to and output from the driver of the given dimensions.
capacitors intended for high pulse current service (in-house Note that this is before accounting for any resistive drops in
we use WIMA™ film capacitors and AVX Ramguard™ ceram- the circuit. The resistive drop in a 1.59mm (0.062") land of
ics; several other manufacturers of equivalent devices also 2oz. Copper carrying 3A will be about 4mV/cm (10mV/in) at
exist). The high pulse current demands of capacitive drivers DC, and the resistance will increase with frequency as skin
also mean that the bypass capacitors must be mounted effect comes into play.
very close to the driver in order to prevent the effects of lead
inductance or PCB land inductance from nullifying what you The problem is most obvious in inverting drivers where the
are trying to accomplish. For optimum results the sum of the input and output currents are in phase so that any attempt
lengths of the leads and the lands from the capacitor body to to raise the driver’s input voltage (in order to turn the driver’s
the driver body should total 2.5cm or less. load off) is countered by the voltage developed on the com-
mon ground path as the driver attempts to do what it was
Bypass capacitance, and its close mounting to the driver serves supposed to. It takes very little common ground path, under
two purposes. Not only does it allow optimum performance these circumstances, to alter circuit operation drastically.
from the driver, it minimizes the amount of lead length radiat-
ing at high frequency during switching, (due to the large Δ I) Output Lead Inductance
thus minimizing the amount of EMI later available for system The same descriptions just given for PCB land inductance
disruption and subsequent cleanup. It should also be noted apply equally well for the output leads from a driver to its load,
that the actual frequency of the EMI produced by a driver is except that commonly the load is located much further away
not the clock frequency at which it is driven, but is related to from the driver than the driver’s ground bus.
the highest rate of change of current produced during switch-
ing, a frequency generally one or two orders of magnitude Generally, the best way to treat the output lead inductance
higher, and thus more difficult to filter if you let it permeate your problem, when distances greater than 4cm (2") are involved,
system. Good bypassing practice is essential to proper requires treating the output leads as a transmission line. Un-
operation of high speed driver ICs. fortunately, as both the output impedance of the driver and the
input impedance of the MOSFET gate are at least an order of
Grounding magnitude lower than the impedance of common coax, using
Both proper bypassing and proper grounding are necessary coax is seldom a cost-effective solution. A twisted pair works
for optimum driver operation. Bypassing capacitance only about as well, is generally lower in cost, and allows use of a
allows a driver to turn the load ON. Eventually (except in rare wider variety of connectors. The second wire of the twisted
circumstances) it is also necessary to turn the load OFF. This pair should carry common from as close as possible to the
EXAMPLE 2: A MIC4424 operating on a 15V input, with one D = Duty Cycle expressed as the fraction of time the input
driver driving a 50Ω resistive load at 1MHz, with a duty cycle to the driver is high.
of 67%, and the other driver quiescent, in a maximum ambi- f = Operating Frequency of the driver in Hertz
ent temperature of 40°C:
IH = Power supply current drawn by a driver when both
PL = I2 x RO x D inputs are high and neither output is loaded.
First, IO must be determined. IL = Power supply current drawn by a driver when both
IO = VS / (RO + RLOAD) inputs are low and neither output is loaded.
Given RO from the characteristic curves then, ID = Output current from a driver in Amps.
(this assumes that the unused side of the driver has its input
grounded, which is more efficient)
= 0.015W
Crossover
Energy Loss
10-8
A•s (Ampere-seconds)
10-9
10-10
0 2 4 6 8 10 12 14 16 18
VIN
NOTE: THE VALUES ON THIS GRAPH REPRESENT THE LOSS SEEN BY BOTH
DRIVERS IN A PACKAGE DURING ONE COMPLETE CYCLE. FOR A SINGLE
DRIVER DIVIDE THE STATED VALUES BY 2. FOR A SINGLE TRANSITION OF A
SINGLE DRIVER, DIVIDE THE STATED VALUE BY 4.
Figure 2.
1250
POWER DISSIPATION (mW)
1000
MAXIMUM PACKAGE
SOIC
750
500 PDIP
250
0
25 50 75 100 125 150
AMBIENT TEMPERATURE (°C)
Package Information
PIN 1
DIMENSIONS:
INCH (MM)
0.013 (0.330)
0.010 (0.254)
PIN 1
DIMENSIONS:
0.301 (7.645) INCHES (MM)
0.297 (7.544)
0.027 (0.686)
0.031 (0.787) 0.103 (2.616) 0.297 (7.544)
0.050 (1.270) 0.016 (0.046) 0.099 (2.515) 0.293 (7.442)
TYP TYP 7 0.022 (0.559)
TYP 0.018 (0.457)
0.015
R
(0.381) 5
0.015 0.330 (8.382) TYP
0.409 (10.389)
0.405 (10.287) (0.381) 0.326 (8.280)
0.094 (2.388) 10 TYP
SEATING MIN 0.032 (0.813) TYP
0.090 (2.286) PLANE
0.408 (10.363)
0.404 (10.262)