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5 4 3 2 1

FILE LIST
01_BLOCK DIAGRAM
CLOCK GEN 02_POWER DIAGRAM

A6G ICS 950815


Page 23
POWER
(IMVP4)
03_CPU-BANIAS(HOST)
04_CPU-BANIAS(PWR)
05_THERMAL SENSOR
D

BLOCK THERMAL CPU


Page 43,44,45,46,47,48,49,50
06_NB-MCHM(DDR)
07_NB-MCHM(HOST)
08_NB-MCHM(VGA)
D

DIAGRAM SENSOR
Page 5
BANIAS
24.5W VGA POWER
09_NB-MCHM(PWR)
10_DUAL DDR SODIMM
Page 3,4
11_DDR TREMINATION
Page 51 12_ATI M11-P(AGP,LVDS)

PSB
13_ATI M11-P(MEMORY IF)
VRAM *4 14_ATI M11-P(PWR)
Page 15,16 15_VRAM(A CHANNEL)
LCD LVDS DDR TERMINATION
16_VRAM(B CHANNEL)
Page 17
NORTH Page 11
17_LVDS & BACKLIGHT
RGB VGA AGP 4X BRIDGE DDR 18_CRT & TV-OUT
CRT DUAL DDR SO-DIMM 19_ICH4-M(HUB_PCI)
Page 18 ATI M11-P 20_ICH4-M(H_U_IDE_PM)
Intel 855GME Page 10
C
Page 12,13,14 3.8W 21_ICH4-M(PWR) C

TV-OUT 22_ICH4-M(PULLUP)
Page 18 Page 6,7,8,9 23_CLOCK-ICS950815
24_LAN-RTL8100CL

HUB
25_MINIPCI
26_CB1394-R5C593 (1)
AUDIO AMP & MIC AC'97 CODEC AC97 IDE 27_CB1394-R5C593 (2)
Page 36,37 Realtek ALC650
PRIMARY IDE 28_PCMCIA SOCKET
Page 29 29_IDE-HDD
Page 35
SOUTH 30_IDE-ODD

MDC BRIDGE SECONDARY IDE


31_KBC-M38857
32_SIO-ITE8705 & FWH
Page 36 Page 30
33_LPT PORT & IR
Intel ICH4-M 34_DISCHARGE CIRCUIT
2.9W
PCI LPC 35_CODEC-ALC650
B
36_AUDIO AMP B

Page 19,20,21,22
37_MIC
38_MDC & RJ45 & RJ11
39_USB
CARDBUS/1394 LAN MINIPCI KBC SIO 40_FAN & AUDIO DJ
SIR
USB 2.0

RICOH R5C593 Realtek RTL8100CL M38857 ITE8705 Page 33


41_FUNCTION KEY
Page 26,27 Page 24 Page 25 Page 31 Page 32
42_PWR & RESET SEQ
43_VCORE
44_1.25V&1.8V
45_2.5V&1.5V&1.2V&1.05V
1394 PCMCIA LAN & Modem Jack USB CCD USB CON *4 PRINTER PORT 46_SYSTEM
Page 26 Page 28 Page 38 Page 33 47_LOAD SWITCH
Page 17 Page 39
48_CHARGER
Card Reader 49_PIC16C54
Page 27 50_BATLOW/SD#
51_VGACORE
A Audio DJ Screw Hole Discharge Circuit 52_SCREW HOLE & EMI CAP
A

Page 40 Page 52 Page 34 53_M/B SETTING


54_REVISION HISTORY
DC FAN EMI Cap. Function Key Title : BLOCK DIAGRAM
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Page 40 Page 52 Page 41 Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 1 of 54
5 4 3 2 1
5 4 3 2 1

System work voltage +V1.25S : JP4,5 page 39


+V2.5 : JP6 page 40
Adapter in : 19.5 ~18.5 V +V1.2S : JP7 page 40
Battery in : 16.8 ~ 11.6V VR_VID0-VR_VID5 +VCCP : JP9 page 40
PM_STPCPU#.,PM_DPRSLPVR.,PCI#.,MCH_OK.,CLK_EN# +V5S : JP13 page 42
CPU_VRON +V5 : JP14 page 42
+VCORE (25A) +V1.5SUS : JP15 page 39
D
+V1.8 : JP16,19 page 39 D

AC_BAT_SYS
MAX1987 +V1.8S : JP17 page42
VRM_PWRGD
+V12 : JP18 page 42
+V1.5S : JP22 page 40
SUSC#. (3V_ON) +V5A : JP24 page 40
+5VO (5A) SUSB# +V5S
+V3.3A : JP26 or 27 page 39
LTC3728 SUSB# +V3S
+V3.3SUS (5A) +V3.3S : JP28 page 42
(Regulator) +V5
+V3.3 : JP29 page 42
+12VO (0.15A) SUSC# +V3
78L12
SUSB# +V12S
+V12
+1.5VO (2A) +V1.5S
SUSB#
+2.5VO (5A) +V2.5 SUSB# +V1.5S
SUSC#
TPS5130
+5VAO +1.2VO (2A) +V1.2S
C SUSB# C
A/D_VIN SHUT_DOWN#

SWITCH
Power
+1.05VO (1A) +VCCP
SUSB# BAT_S Signal BAT_IN#_OC
Circuit
SUSB# TS# ACIN_OC
+V2.5 CM8562 +V1.25S (2A) AC_APR_UC
(Regulator)

SUSC#
+2.5VO MIC37101-1.8 +1.8VO (1A) +V1.8
LDO
SUSB# +V1.8S
TS#
SUSB# CHG EN#
PIC + TL494 BAT AC_APR_UC PIC16C54C CHG LED_UP
(Charge) SMC_BAT PWR LED_UP
B B
SMD_BAT BAT_LLOW

FDS6679

+5VO (20mA)
A/D_VIN 78L05 SWITCH
FD6JK3TP +5VLCM
(Regulator) +5VCHG (100mA) (F02JK2E)

MIC5223MB +3VALWAYS_M +V3.3A LM4040BIM +2.5VREF


(Regulator) (Regulator) (500uA)

+V3.3SUS CM2855 +V1.5SUS


A
(LDO) A

+5VAO +5VALWAYS
Title : POWER DIAGRAM
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 2 of 54
5 4 3 2 1
5 4 3 2 1

H_D#[63:0] 7
U31B U31A
7 H_A#[16:3]
H_A#16 AA2 N2 H_D#15 C25 Y25 H_D#47
A[16]# ADS# H_ADS# 7 D[15]# D[47]#
H_A#15 Y3 A10 H_PRDY# H_D#14 E23 AA26 H_D#46
H_A#14 A[15]# PRDY# H_PREQ# H_D#13 D[14]# D[46]# H_D#45
AA3 A[14]# PREQ# B10 B23 D[13]# D[45]# Y23
ADDR GROUP 0 -> L1 H_A#13 U1 COMMON CLOCK -> L4 H_D#12 C26 V26 H_D#44 DATA GROUP 0,2 -> L1
H_A#12 A[13]# H_D#11 D[12]# D[44]# H_D#43
Y1 L1 H_BNR# 7 E24 U25
ADDR GROUP 1 -> L4 H_A#11 Y4
A[12]# BNR#
J3 WIDTH: 4.5 mils H_D#10 D24
D[11]# D[43]#
V24 H_D#42 DATA GROUP 1,3 -> L4
H_BPRI# 7

ADDRESS GROUP 0
A[11]# BPRI# D[10]# D[42]#

DATA GROUP 0
SPACE >= 1:2 H_A#10 SPACE >= 1:2 H_D#9 H_D#41 SPACE >= 1:2

2
W2 A[10]# B24 D[9]# D[41]# U26
H_A#9 T4 H_D#8 C20 AA23 H_D#40
STROBE SPACE >= 1:2 GROUP SPACE >= 20 mils GROUP SPACE >=20 mils

DATA GROUP
H_A#8 A[9]# T107 TPC28t H_D#7 D[8]# D[40]# H_D#39
D W1 A[8]# DBR# A7 1 B20 D[7]# D[39]# R23 D
GROUP SPACE >= 20 mils H_A#7 V2 A[7]#
LENGTH: 2.2" - 6.5" H_D#6 A21 D[6]# D[38]# R26 H_D#38 LENGTH: 0.5" - 5.5"
H_A#6 R3 H_D#5 B26 R24 H_D#37
LENGTH: 0.5" - 6.5" H_A#5 V3
A[6]# H_D#4 A24
D[5]# D[37]#
V23 H_D#36
H_A#4 A[5]# H_D#3 D[4]# D[36]# H_D#35
U4 A[4]# DEFER# L4 H_DEFER# 7 B21 D[3]# D[35]# U23
H_A#3 P4 H2 H_D#2 A22 T25 H_D#34
A[3]# DRDY# H_DRDY# 7 D[2]# D[34]#
U3 M2 H_D#1 A25 AA24 H_D#33
7 H_ADSTB#0 ADSTB[0]# DBSY# H_DBSY# 7 D[1]# D[33]#
H_REQ#4 T1 H_D#0 A19 Y26 H_D#32
H_REQ#3 REQ[4]# D[0]# D[32]#
P1 REQ[3]# 7 H_DINV#0 D25 DINV[0]# DINV[2]# T24 H_DINV#2 7
H_REQ#2 T2 C23 W25
REQ[2]# 7 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 7
H_REQ#1 P3 C22 W24
REQ[1]# 7 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 7
H_REQ#0 R2 REQ[0]# H_BR0# H_D#31 H_D#63
7 H_REQ#[4:0] N4 H_BR0# 7 K25 AF26

CONTROL
BR0# +VCCP H_D#30 D[31]# D[63]# H_D#62
N25 D[30]# D[62]# AF22
H_D#29 H26 AF25 H_D#61
H_IERR# H_D#28 D[29]# D[61]# H_D#60
IERR# A4 2 1 M25 D[28]# D[60]# AD21
0.5"-12" R271 56Ohm H_D#27 N24 AE21 H_D#59
7 H_A#[31:17] D[27]# D[59]#
H_A#31 AF1 H_D#26 L26 AF20 H_D#58

3
A[31]# D[26]# D[58]#

DATA GROUP 1
H_A#30 AE1 B5 <=10" H_D#25 J25 AD24 H_D#57
A[30]# INIT# H_INIT# 20,32 D[25]# D[57]#
H_A#29 H_D#24 H_D#56

DATA GROUP
AF3 A[29]# M23 D[24]# D[56]# AF23
H_A#28 AD6 H_D#23 J23 AE22 H_D#55

ADDRESS GROUP 1
H_A#27 A[28]# H_D#22 D[23]# D[55]# H_D#54
AE2 A[27]# LOCK# J2 <=10" H_LOCK# 7 G24 D[22]# D[54]# AD23
H_A#26 AD5 H_D#21 F25 AC25 H_D#53
H_A#25 A[26]# H_D#20 D[21]# D[53]# H_D#52
AC6 A[25]# H24 D[20]# D[52]# AC22
H_A#24 AB4 H_D#19 M26 AC20 H_D#51
H_A#23 A[24]# H_D#18 D[19]# D[51]# H_D#50
AD2 A[23]# L23 D[18]# D[50]# AB24
H_A#22 AE4 H_D#17 G25 AC23 H_D#49
H_A#21 A[22]# H_D#16 D[17]# D[49]# H_D#48
AD3 A[21]# RESET# B11 <=3" H_CPURST# 7 H23 D[16]# D[48]# AB25
H_A#20 AC3 L2 H_RS#2 J26 AD20
A[20]# RS[2]# 7 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 7
H_A#19 AC7 K1 H_RS#1 K24 AE24
A[19]# RS[1]# 7 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 7
H_A#18 AC4 H1 H_RS#0 L24 AE25
C A[18]# RS[0]# 7 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 7 C
H_A#17 AF4 A[17]# H_RS#[2:0] 7
AE5 M3 SOCKET479P
7 H_ADSTB#1 ADSTB[1]# TRDY# H_TRDY# 7

HIT# K3 H_HIT# 7
8 H_DPWR# 1"-6.5" C19 DPWR# HITM# K4 H_HITM# 7
TOPOLOGY 1B: TOPOLOGY 2A:
SOCKET479P +VCCP +VCCP
CPU-ICH-R R-CPU-ICH Y-FORK +VCCP
H_VID5 CPU-ICH: 0.5" - 12" CPU-ICH: 0.5" - 12"
VR_VID5 43 H_GTLREF0: Close to

1
H_VID4
VR_VID4 43 ICH-R <= 3" R - CPU <= 3" LENGTH <=0.5" Pin AD26

1
H_VID3
H_VID2 VR_VID3 43
VR_VID2 43
R239 R73 WIDTH = 5.5 mils of CPU
T92 TPC28t 1_CLK_CPU_BCLK H_VID1 56Ohm 332Ohm R224
T95 TPC28t 1_CLK_CPU_BCLK# H_VID0 VR_VID1 43 SPACE >= 25 mils 1KOhm
CPU PLL CIRCUITS VR_VID0 43 H_THRMTRIP_S# H_PWRGD

2
1.71V - 1.89V(+/- 5%) H_GTLREF0

2
U31C
S0-S1M: 0.3A

1
23 _CLK_CPU_BCLK 2"-8" B15 BCLK[0] Same Side
2"-8" B14 TOPOLOGY 1B: TOPOLOGY 2B:
HOSTCLK

R223 w/ CPU
23 _CLK_CPU_BCLK# BCLK[1] CPU_COMP3
+V1.8S_PROC T94 TPC28t 1 A16 AB1 +VCCP
T96 TPC28t 1 A15
ITP_CLK[0] COMP[3]
AB2 CPU_COMP2 CPU-ICH-R MCH-CPU-ICH4 2KOhm
+V1.8S_F26 ITP_CLK[1] COMP[2] CPU_COMP1
COMP[1] P26 CPU-ICH: 0.5" - 12" MCH-CPU:0.5"-6.5"

1
<=10" CPU_COMP0

2
C2 P25
20 H_A20M# A20M# COMP[0] ICH-R <= 3" CPU-ICH4:0.5"-12"
1

C26 C24 0.5"-12" D3


20 H_FERR# FERR#
LEGACY CPU

<=10" A3 R71
20 H_IGNNE# IGNNE# H_BPM#3
0.01UF/10V 10UF/6.3V <=10" B7 C9 1 T103TPC28t 56Ohm
8,20 H_DPSLP# DPSLP# BPM[3]# H_BPM#2
<=10" T20 TPC28t
2

20 H_CPUSLP# A6 SLP# BPM[2]# A9 1


<=10" H_BPM#1 T106TPC28t H_FERR# H_DPSLP#

2
20 H_INTR D1 LINT0 BPM[1]# B8 1
<=10" D4 C8 H_BPM#0 1 T105TPC28t
20 H_NMI LINT1 BPM[0]#
B
20 H_SMI# <=10" B4 SMI# CPU_COMP2 : CPU_COMP0 : B

20 H_STPCLK# <=10" C6
+V1.8S_VCCA STPCLK#
TOPOLOGY 1C: TOPOLOGY 3: Length <= 0.5" Length <= 0.5"
<=10" E4 AC1 +VCCP Width = 18 mils(L1/L6) Width = 18 mils(L1/L6)
+V1.8S_AC26 20 H_PWRGD PWRGOOD GTLREF[3] CPU-R-LSC-ICH CPU-ICH-R-LSC-FWH
G1
H_VID5 H4
GTLREF[2]
E26 CPU-R: 0.5" - 12" CPU-ICH:0.5" - 12" Space>= 20 mils Space>= 20 mils
VID[5] GTLREF[1]
1

1
C325 C322 H_VID4 G4 AD26 H_GTLREF0
H_VID3 G3
VID[4] GTLREF[0] R - LSC<= 3" R - LSC <= 3"
VID[3]
0.01UF/10V 10UF/6.3V H_VID2 F3 VID[2]
LSC-ICH:0.5"-12" R244 LSC-FWH:0.5"-6"
H_VID1 56Ohm R75 R221
2

F2 VID[1]
H_VID0 E2 C5 1 T21 TPC28t 27.4Ohm 27.4Ohm
VID[0] TEST1 T88 TPC28t H_PROCHOT# H_INIT# CPU_COMP2 1 CPU_COMP0 1

2
TEST2 F23 1 2 2
MISC

+V1.8S_AC26 AC26
+V1.8S_N1 +V1.8S_N1 VCCA[3]
N1 VCCA[2]
+V1.8S_B1 H_TCK +VCCP
B1 VCCA[1] TCK A13 CPU DEBUG PORT
1

C104 C100 +V1.8S_F26 F26 C12 H_TDI


VCCA[0] TDI H_TDO
TDO A12
0.01UF/10V 10UF/6.3V B18 C11 H_TMS Close to Pin H_PREQ# R261 2 1 200Ohm /
5 H_THERMDA THERMDA TMS H_TRST# H_PRDY# R260 2 1 56Ohm CPU_COMP3 : CPU_COMP1 :
2

A18 B13
5 H_THERMDC
C17
THERMDC TRST# A8 of CPU
20 H_THRMTRIP_S# H_PROCHOT# THERMTRIP# Length <= 0.5" Length <= 0.5"
B17 PROCHOT#
VCCSENSE AE7 Width = 5.5 mils(L1/L6) Width = 5.5 mils(L1/L6)
E1
+V1.8S_B1 43 PM_PSI#
T93 TPC28t 1 C16
RSVD5 Space>= 20 mils Space>= 20 mils
RSVD4 +VCCP
C3 RSVD3 Close to Pin A12 of CPU CPU JTAG
1

C98 C103 T98 TPC28t 1 C14


AF7
RSVD2 Width= 5 mils H_TMS R250 2 1 39Ohm R76 R222
RSVD1
0.01UF/10V 10UF/6.3V B2 RSVD0 VSSSENSE AF6 Length <= 2" H_TDO R247 2 1 56Ohm 56Ohm 56Ohm
H_TDI R248 150Ohm CPU_COMP3 1 CPU_COMP1 1
2

2 1 2 2
SOCKET479P H_TCK R246 1 2 27.4Ohm
A H_TRST# A
R245 1 2 680Ohm

Dothan Dothan
Celeron Banias (400) (533)
Frequency 100 100 100 133
VCCA[1:3] 1.8V 1.8V 1.8V NC Title : CPU-BANIAS(HOST)
VCCA[0] 1.8V 1.8V 1.8V 1.5V ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
U54 switch to Pin 3,4 Pin 1,2
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 3 of 54
5 4 3 2 1
5 4 3 2 1

HFM(1.3GHz-1.7GHz): 1.468V
LFM( 600MHz): 0.956V
0.745V - 1.356V(+/- 1.5%)
+VCORE C0: 25 A
C3: 7.59A
C4: 0.9A

AC24
AC21
AC18
AC16
AC14
AC12
AC10

AB26
AB23
AB21
AB19
AB17
AB15
AB13
AB11

AA25
AA22
AA20
AA18
AA16
AA14
AA12
AA10
D D

W26
W23
W22
AC8
AC5
AC2

AB9
AB7
AB5
AB3

AA8
AA6
AA4
AA1

U24
U22

R25
R22
Y24
Y21

V25
V21

P24
P21
T26
T23
T21
W6
W3
U31E

U6
U2

R6
R4
R1
Y5
Y2

V5
V4
V1

T5
T3
SOCKET479P

AC11
AC13
AC15
AC17
AC19

AD10
AD12
AD14
AD16
AD18
AA11
AA13
AA15
AA17
AA19
AA21

AB10
AB12
AB14
AB16
AB18
AB20
AB22
W21

VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
AC9

AD8
G21

AA5
AA7
AA9

AB6
AB8
D18
D20
D22

H22
E17
E19
E21

K22

V22

Y22
F18
F20
F22

J21

W5
G5
D6
D8

H6

U5
U31D
E5
E7
E9

V6

Y6
F6
F8

J5
SOCKET479P
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
AD1 VSS161 VSS96 P5

VCC
AD4 VSS162 VSS95 P2
VCC61 AE9 AD7 VSS163 VSS94 N26
VCC62 AE11 AD9 VSS164 VSS93 N23
VCC63 AE13 AD11 VSS165 VSS92 N22
VCC64 AE15 AD13 VSS166 VSS91 N6
VCC65 AE17 AD15 VSS167 VSS90 N3
VCC66 AE19 AD17 VSS168 VSS89 M24
VCC67 AF8 AD19 VSS169 VSS88 M21
VCC68 AF10 AD22 VSS170 VSS87 M5
VCC69 AF12 AD25 VSS171 VSS86 M4
VCC70 AF14 AE3 VSS172 VSS85 M1

GND
W4 VCCQ[1]
P23 VCCQ[0]

VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
AF16 AE6 L25
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9

VCC71 VSS173 VSS84


VCC72 AF18 AE8 VSS174 VSS83 L22
AE10 VSS175 VSS82 L6
AE12 VSS176 VSS81 L3
M22
D10
D12
D14
D16

N21

R21

U21
E11
E13
E15

P22
F10
F12
F14
F16

T22
L21

AE14 K26
M6

N5

R5
K6

P6

T6
L5

VSS177 VSS80
AE16 VSS178 VSS79 K23
AE18 VSS179 VSS78 K21
AE20 VSS180 VSS77 K5
AE23 VSS181 VSS76 K2
+VCCP +VCCP AE26 J24
VSS182 VSS75
C 1.0V - 1.1V(+/- 5%) AF2 VSS183 VSS74 J22 C
AF5 J6
S0-S1M: 2.5 A(CPU,MCH,ICH) AF9
VSS184 VSS73
J4
VSS185 VSS72
AF11 VSS186 VSS71 J1
AF13 VSS187 VSS70 H25
AF15 VSS188 VSS69 H21
1

C35 C89 AF17 H5


VSS189 VSS68
AF19 VSS190 VSS67 H3
0.1uF/10V 0.1uF/10V AF21 G26
VSS191 VSS66
2

AF24 VSS192 VSS65 G23

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

G22
C10
C13
C15
C18
C21
C24

D11
D13
D15
D17
D19
D21
D23
D26
A11
A14
A17
A20
A23
A26

B12
B16
B19
B22
B25

E10
E12
E14
E16
E18
E20
E22
E25

F11
F13
F15
F17
F19
F21
F24
G2
G6
C1
C4
C7

D2
D5
D7
D9
A2
A5
A8

B3
B6
B9

E3
E6
E8

F1
F4
F5
F7
F9
+VCORE CPU VCORE Decoupling Capacitor +VCCP (CPU) Decoupling Capacitor
+VCCP
(Place near CPU)
Mid Frequency
1

B B
Decoupling (Place

1
C359 C338 C368 C369 C51 + CE1 C34 C42 C336 C344 C337 C340 C360 C335 C41 C59
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V around Processor)
150U/4.0V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
2

2
2
1

C70 C358 C57 C351 C352 High Frequency


10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
Decoupling (Place
2

underneath
Processor) 1 2
For 855GM /855GME /852GM /852GME:
+V1.8S +V1.8S_PROC
using 10uF/6.3V X5R Load R397
1

R397 0Ohm
C357 C346 C69 C39 C355 C343
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V +V3.3S Vref=1.215V +V1.8S_PROC
2

U53 /
1 5
For 852GMV:
IN OUT
2 GND 1 2 Load C537, C538, Q93, R398, R399,
3 4
EN ADJ R400, R404, U53
1

1
+VCORE Bulk R398 /
C353 SI9183DT 4.7KOhm
Decoupling
1

10UF/6.3V C538 R400 / R399 /

1
4.7U 18.7KOhm 20KOhm C537
2

/ 4.7U
/
2

2
6
A A
+V3.3S R404 /
10KOhm Q93A
UM6K1N
M3N : Four 200 uF are located in IMVP4 1 2 2
/
A3N : Delete 10uF/6.3V from 35pcs to 17pcs
3

Q93B 1
5 UM6K1N
8,23 FREQ_SEL
/
Title : CPU-BANIAS(PWR)
4

ASUSTek COMPUTER INC. NB1 Engineer: John Hung


Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 4 of 54
5 4 3 2 1
5 4 3 2 1

D D

C Route H_THERMDA and H_THERMDC C


on the same layer

------------------OTHER SIGNALS
12 mils
===============GND
10 mils
=========H_THERMDA(10 mils)
10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
12 mils
---------------------OTHER SIGNALS

Avoid BPSB,Power

B B

+V3.3S +V3.3S_THM
Standby Mode: 3uA(Max. 10uA)
Full Active: 0.5mA(Max. 1mA)
1 2 +V3.3S_THM

1
R243
200Ohm C349
0.1uF/10V OS#_OC

1
U33

2
(Pull-Up 10K

VCC
in Page 35)
SCL_3S 8 4 OS#_OC
10,22,23 SCL_3S SMBCLK OVERT OS#_OC 40
SDA_3S 7 2 H_THERMDA 4"-8"
10,22,23 SDA_3S SMBDATA DXP H_THERMDA 3

1
6 3 C354
20,40 PM_THRM# ALERT# DXN

GND
PM_THRM# 2200P

2
(Pull-Up 10K Close to Pin A18 MAX6657 H_THERMDC 4"-8" H_THERMDC 3
in Page 35)

5
& B18 of CPU

A A

Title : THERMAL SENSOR


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 5 of 54
5 4 3 2 1
5 4 3 2 1

_DDR_DATA[63:0] 10,11
_DDR_DM[7:0] 10,11
_DDR_DQS[7:0] 10,11
Thermal Power: ~ 3.8W
LxWxH=37.5x37.5x2.58
U32B (MCH-Sighting041)
DDR_DATA0
DDR_DATA1
AF2 SDQ[0] SDQS[0] AG2 DDR_DQS0
DDR_DQS1
M-GM system memory interface generates
AE3 AH5
DDR_DATA2 AF4
SDQ[1]
SDQ[2]
SDQS[1]
SDQS[2] AH8 DDR_DQS2 single pulse CKE events which may cause
DDR_DATA3 DDR_DQS3
D
DDR_DATA4
AH2
AD3
SDQ[3] SDQS[3] AE12
AH17 DDR_DQS4 Intermittent hangs and display corruptions D

SDQ[4] SDQS[4]
DDR_DATA5 AE2 AE21 DDR_DQS5 when using Micron and Infineon
DDR Serial Termination DDR_DATA6
DDR_DATA7
AG4
AH3
SDQ[5]
SDQ[6]
SDQS[5]
SDQS[6] AH24
AH27
DDR_DQS6
DDR_DQS7 S0-DIMMs.
DDR_DATA8 SDQ[7] SDQS[7] T111 TPC28t
AD6 SDQ[8] SDQS[8] AD15 1
_DDR_DM0 1 10Ohm 16 RN48A DDR_DM0 _DDR_DATA34 1 10Ohm 16 RN43A DDR_DATA34 DDR_DATA9 AG5
_DDR_DATA7 DDR_DATA7 _DDR_DATA38 DDR_DATA38 DDR_DATA10 SDQ[9] DDR_AA0 DDR_AA[12:0] 10,11
2 10Ohm 15 RN48B 2 10Ohm 15 RN43B AG7 AC18
_DDR_DATA1 10Ohm RN48C DDR_DATA1 _DDR_DM4 10Ohm RN43C DDR_DM4 DDR_DATA11 SDQ[10] SMA[0] DDR_AA1
3 14 3 14 AE8 SDQ[11] SMA[1] AD14
_DDR_DATA3 4 10Ohm 13 RN48D DDR_DATA3 _DDR_DQS4 4 10Ohm 13 RN43D DDR_DQS4 DDR_DATA12 AF5 AD13 DDR_AA2
SDQ[12] SMA[2]

TERMINATION
_DDR_DQS0 5 10Ohm 12 RN48E DDR_DQS0 _DDR_DATA33 5 10Ohm 12 RN43E DDR_DATA33 DDR_DATA13 AH4 AD17 DDR_AA3
_DDR_DATA4 10Ohm RN48F DDR_DATA4 _DDR_DATA32 10Ohm RN43F DDR_DATA32 DDR_DATA14 SDQ[13] SMA[3] DDR_AA4
6 11 6 11 AF7 SDQ[14] SMA[4] AD11
_DDR_DATA0 10Ohm RN48G DDR_DATA0 _DDR_DATA37 10Ohm RN43G DDR_DATA37 DDR_DATA15 DDR_AA5
_DDR_DATA5
7
8 10Ohm
10
9 RN48H DDR_DATA5 _DDR_DATA36
7
8 10Ohm
10
9 RN43H DDR_DATA36 DDR_DATA16
AH6
AF8
SDQ[15] SMA[5] AC13
AD8 DDR_AA6 MCH-M
Dual DDR
SDQ[16] SMA[6]
DDR_DATA17 AG8 SDQ[17] SMA[7] AD7 DDR_AA7 SO-DIMM
DDR_DATA18 AH9 AC6 DDR_AA8
DDR_DATA19 SDQ[18] SMA[8] DDR_AA9

DDR SYSTEM MEMORY


AG10 SDQ[19] SMA[9] AC5
_DDR_DATA9 1 10Ohm 16 RN47A DDR_DATA9 _DDR_DATA46 1 10Ohm 16 RN42A DDR_DATA46 DDR_DATA20 AH7 AC19 DDR_AA10
_DDR_DATA14 10Ohm RN47B DDR_DATA14 _DDR_DQS5 10Ohm RN42B DDR_DQS5 DDR_DATA21 SDQ[20] SMA[10] DDR_AA11
2 15 2 15 AD9 SDQ[21] SMA[11] AD5
_DDR_DATA12 3 10Ohm 14 RN47C DDR_DATA12 _DDR_DATA35 7 10Ohm 10 RN42G DDR_DATA35 DDR_DATA22 AF10 AB5 DDR_AA12 Route for COMMAND
_DDR_DM1 10Ohm RN47D DDR_DM1 _DDR_DATA39 10Ohm RN42H DDR_DATA39 DDR_DATA23 SDQ[22] SMA[12]
4 13 8 9 AE11 DDR_AB[2:1] 10,11
_DDR_DATA11 5 10Ohm 12 RN47E DDR_DATA11 _DDR_DATA40 4 10Ohm 13 RN42D DDR_DATA40 DDR_DATA24 AH10
SDQ[23]
AD16 DDR_AB1 1. DDR_AA[12:6],DDR_AA3,DDR_AA0
_DDR_DATA8 10Ohm RN47F DDR_DATA8 _DDR_DATA44 10Ohm RN42C DDR_DATA44 DDR_DATA25 SDQ[24] SMAB[1] DDR_AB2
6 11 3 14 AH11 SDQ[25] SMAB[2] AC12 DDR_AB[5:4] 10,11 2. DDR_WE#
_DDR_DATA2 7 10Ohm 10 RN47G DDR_DATA2 _DDR_DATA41 5 10Ohm 12 RN42E DDR_DATA41 DDR_DATA26 AG13 AF11 DDR_AB4
_DDR_DATA6 8 10Ohm 9 RN47H DDR_DATA6 _DDR_DATA45 6 10Ohm 11 RN42F DDR_DATA45 DDR_DATA27 AF14
SDQ[26] SMAB[4]
AD10 DDR_AB5 3. DDR_RAS#
DDR_DATA28 SDQ[27] SMAB[5]
AG11 SDQ[28] 4. DDR_CAS#
DDR_DATA29 AD12 AC7
DDR_DATA30 AF13
SDQ[29] SCKE[0]
AB7
DDR_CKE0 10,11 5. DDR_BS0#,DDR_BS1#
_DDR_DATA17 DDR_DATA17 _DDR_DQS6 DDR_DQS6 DDR_DATA31 SDQ[30] SCKE[1] DDR_CKE1 10,11
1 10Ohm 16 RN46A 1 10Ohm 16 RN41A AH13 AC9
_DDR_DATA16 DDR_DATA16 _DDR_DATA53 DDR_DATA53 DDR_DATA32 SDQ[31] SCKE[2] DDR_CKE2 10,11
2 10Ohm 15 RN46B 2 10Ohm 15 RN41B AH16 AC10
_DDR_DATA20 DDR_DATA20 _DDR_DATA52 DDR_DATA52 DDR_DATA33 SDQ[32] SCKE[3] DDR_CKE3 10,11
3 10Ohm 14 RN46C 3 10Ohm 14 RN41C AG17
C _DDR_DATA21 10Ohm RN46D DDR_DATA21 _DDR_DATA49 10Ohm RN41D DDR_DATA49 DDR_DATA34 SDQ[33] C
4 13 4 13 AF19 SDQ[34] SCS[0]# AD23 DDR_CS0# 10,11
_DDR_DATA10 5 10Ohm 12 RN46E DDR_DATA10 _DDR_DATA42 5 10Ohm 12 RN41E DDR_DATA42 DDR_DATA35 AE20 AD26
_DDR_DATA15 DDR_DATA15 _DDR_DATA47 DDR_DATA47 DDR_DATA36 SDQ[35] SCS[1]# DDR_CS1# 10,11
6 10Ohm 11 RN46F 6 10Ohm 11 RN41F AD18 AC22
_DDR_DQS1 DDR_DQS1 _DDR_DATA43 DDR_DATA43 DDR_DATA37 SDQ[36] SCS[2]# DDR_CS2# 10,11
7 10Ohm 10 RN46G 7 10Ohm 10 RN41G AE18 AC25 Route for CPC
_DDR_DATA13 DDR_DATA13 _DDR_DM5 DDR_DM5 DDR_DATA38 SDQ[37] SCS[3]# DDR_CS3# 10,11
8 10Ohm 9 RN46H 8 10Ohm 9 RN41H AH18
DDR_DATA39 AG19
SDQ[38]
AD22
1. DDR_AA[5:4],DDR_AA[2:1]
SDQ[39] SBA[0] DDR_BS0# 10,11

TERMINATION
DDR_DATA40 AH20 AD20
DDR_DATA41 SDQ[40] SBA[1] DDR_BS1# 10,11
AG20 SDQ[41]
_DDR_DATA29 10Ohm RN45A DDR_DATA29 _DDR_DATA56 10Ohm RN40A DDR_DATA56 DDR_DATA42
_DDR_DATA24
1
2 10Ohm
16
15 RN45B DDR_DATA24 _DDR_DATA60
1
2 10Ohm
16
15 RN40B DDR_DATA60 DDR_DATA43
AF22
AH22
SDQ[42] SRAS# AC21
AC24
DDR_RAS# 10,11
MCH-M
Dual DDR
SDQ[43] SCAS# DDR_CAS# 10,11
_DDR_DATA19 3 10Ohm 14 RN45C DDR_DATA19 _DDR_DATA48 3 10Ohm 14 RN40C DDR_DATA48 DDR_DATA44 AF20 SDQ[44] SWE# AD25 DDR_WE# 10,11 SO-DIMM
_DDR_DATA23 4 10Ohm 13 RN45D DDR_DATA23 _DDR_DATA54 4 10Ohm 13 RN40D DDR_DATA54 DDR_DATA45 AH19
_DDR_DATA18 10Ohm RN45E DDR_DATA18 _DDR_DATA50 10Ohm RN40E DDR_DATA50 DDR_DATA46 SDQ[45]
5 12 5 12 AH21 SDQ[46] SCK[0] AB2 CLK_DDR0 10
_DDR_DATA22 6 10Ohm 11 RN45F DDR_DATA22 _DDR_DATA55 6 10Ohm 11 RN40F DDR_DATA55 DDR_DATA47 AG22 AA2
_DDR_DM2 DDR_DM2 _DDR_DATA51 DDR_DATA51 DDR_DATA48 SDQ[47] SCK[0]# CLK_DDR0# 10
7 10Ohm 10 RN45G 7 10Ohm 10 RN40G AE23 AC26 Route for CPC
_DDR_DQS2 DDR_DQS2 _DDR_DM6 DDR_DM6 DDR_DATA49 SDQ[48] SCK[1] CLK_DDR1 10
8 10Ohm 9 RN45H 8 10Ohm 9 RN40H AH23 AB25
DDR_DATA50 AE24
SDQ[49] SCK[1]#
AC3
CLK_DDR1# 10 1. DDR_AB[5:4],DDR_AB[2:1]
DDR_DATA51 SDQ[50] SCK[2] CLK_DDR2 10
AH25 SDQ[51] SCK[2]# AD4 CLK_DDR2# 10
DDR_DATA52 AG23 AC2
_DDR_DATA31 DDR_DATA31 _DDR_DATA63 DDR_DATA63 DDR_DATA53 SDQ[52] SCK[3] CLK_DDR3 10
1 10Ohm 16 RN44A 1 10Ohm 16 RN39A AF23 AD2
_DDR_DATA27 DDR_DATA27 _DDR_DATA59 DDR_DATA59 DDR_DATA54 SDQ[53] SCK[3]# CLK_DDR3# 10
2 10Ohm 15 RN44B 2 10Ohm 15 RN39B AF25 AB23
_DDR_DATA26 DDR_DATA26 _DDR_DATA58 DDR_DATA58 DDR_DATA55 SDQ[54] SCK[4] CLK_DDR4 10
3 10Ohm 14 RN44C 3 10Ohm 14 RN39C AG25 AB24
_DDR_DATA30 DDR_DATA30 DDR_DM7 DDR_DATA56 SDQ[55] SCK[4]# CLK_DDR4# 10
4 10Ohm 13 RN44D _DDR_DM7 4 10Ohm 13 RN39D AH26 AA3
_DDR_DQS3 DDR_DQS3 _DDR_DATA62 DDR_DATA62 DDR_DATA57 SDQ[56] SCK[5] CLK_DDR5 10
5 10Ohm 12 RN44E 5 10Ohm 12 RN39E AE26 AB4
_DDR_DM3 DDR_DM3 _DDR_DQS7 DDR_DQS7 DDR_DATA58 SDQ[57] SCK[5]# CLK_DDR5# 10
6 10Ohm 11 RN44F 6 10Ohm 11 RN39F AG28 Route for CONTROL
_DDR_DATA28 10Ohm RN44G DDR_DATA28 _DDR_DATA57 10Ohm RN39G DDR_DATA57 DDR_DATA59 SDQ[58] DDR_DM0
7 10 7 10 AF28 AE5
_DDR_DATA25 8 10Ohm 9 RN44H DDR_DATA25 _DDR_DATA61 8 10Ohm 9 RN39H DDR_DATA61 DDR_DATA60 AG26
SDQ[59] SDM[0]
AE6 DDR_DM1 1. DDR_CKE[1:0],DDR_CS[1:0]#
SDQ[60] SDM[1]

TERMINATION
DDR_DATA61 AF26 AE9 DDR_DM2
DDR_DATA62 SDQ[61] SDM[2] DDR_DM3
AE27 SDQ[62] SDM[3] AH12
DDR_DATA63 DDR_DM4
B
AD27
AG14
SDQ[63] SDM[4] AD19
AD21 DDR_DM5 MCH-M
Dual DDR B
SDQ[64] SDM[5]
AE14 SDQ[65] SDM[6] AD24 DDR_DM6 SO-DIMM
AE17 AH28 DDR_DM7
SDQ[66] SDM[7] T112 TPC28t
AG16 SDQ[67] SDM[8] AH15 1
AH14 SDQ[68]
AE15 AC15 DDR_RCVENOUT# 1 T110 TPC28t Route for CONTROL
SDQ[69] RCVENOUT# DDR_RCVENIN# T109 TPC28t
AF16 AC16 1
AF17
SDQ[70] RCVENIN# 1. DDR_CKE[3:2],DDR_CS[3:2]#
DDR_VREF SDQ[71] DDR_SMRCOMP
SMRCOMP AB1

AJ24 AJ22 DDR_SMVSWINGL


SMVREF_0 SMVSWINGL DDR_SMVSWINGH
SMVSWINGH AJ19
1

C114
0.1uF/10V RG82855GME
Intel suggested that DDR_VREF should be turned 11-01 Route for CLOCK
2

off in S3-S5. But measure the leakage because 1. CLK_DDR[2:0],CLK_DDR[2:0]#


there is no +V2.5S.
+V5
+V2.5 MCH-M
Dual DDR
+V2.5_GMCH_SM +V2.5_GMCH_SM +V2.5_GMCH_SM SO-DIMM
1

C116
1

1
R89 1.23125V-1.26875V
0.1uF/10V R273 R279 R278 Route for CLOCK
10KOhm S0-S1M:Max. 80 mA 60.4Ohm
2

TP12 S3: 0 mA 0.2 VCCSM +/- 2% 604Ohm 0.8 VCCSM +/- 2% 150Ohm 1. CLK_DDR[5:3],CLK_DDR[5:3]#
5

U8 DDR_VREF TPC28t C380


2

V+ DDR_SMRCOMP DDR_SMVSWINGL DDR_SMVSWINGH


2

2
A
1 + A
1

4
1

1
0.1uF/10V
2

3 -
1

1
R90 C118 V- 1.225V-1.275V R272 C401 R277 C400 R280
LMV321 60.4Ohm 0.1uF/10V 0.1uF/10V
10KOhm 0.1uF/10V S0-S1M:10 mA 150Ohm 604Ohm
2

(Max. 50 mA) Close to Close to


2

2
2

2
Pin AJ22 Pin AJ19
Title : NB-MCHM(DDR)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 6 of 54
5 4 3 2 1
5 4 3 2 1

U32A
MCH_COMP Signals 3 H_A#[31:3]
H_A#3
H_A#4
P23
T25
HA[3]# HD[0]# K22
H27
H_D#0
H_D#1
H_D#[63:0] 3

H_A#5 HA[4]# HD[1]# H_D#2


T28 HA[5]# HD[2]# K25
MCH_HLZCOMP : H_A#6 R27 L24 H_D#3
H_A#7 HA[6]# HD[3]# H_D#4
U23 J27
Length <= 0.5" H_A#8 U24
HA[7]# HD[4]#
G28 H_D#5
H_A#9 HA[8]# HD[5]# H_D#6
Width = 18 mils(L1/L6) R24 HA[9]# HD[6]# L27
H_A#10 U28 L23 H_D#7
Space>= 20 mils H_A#11 V28
HA[10]# HD[7]#
L25 H_D#8
H_A#12 HA[11]# HD[8]# H_D#9
U27 HA[12]# HD[9]# J24
H_A#13 T27 H25 H_D#10
MCH_HLZCOMP H_A#14 HA[13]# HD[10]# H_D#11
D V27 HA[14]# HD[11]# K23 D
H_A#15 U25 G27 H_D#12
H_A#16 HA[15]# HD[12]# H_D#13
V26 HA[16]# HD[13]# K26
H_A#17 Y24 J23 H_D#14
H_A#18 HA[17]# HD[14]# H_D#15
V25 HA[18]# HD[15]# H26
H_A#19 V23 F25 H_D#16
H_A#20 HA[19]# HD[16]# H_D#17
W25 HA[20]# HD[17]# F26
H_A#21 Y25 B27 H_D#18
H_A#22 HA[21]# HD[18]# H_D#19
AA27 HA[22]# HD[19]# H23
MCH_HYRCOMP : H_A#23 W24 E27 H_D#20
H_A#24 HA[23]# HD[20]# H_D#21
W23 G25
Length <= 0.5" H_A#25 W27
HA[24]# HD[21]#
F28 H_D#22
H_A#26 HA[25]# HD[22]# H_D#23
Width = 18 mils(L1/L6) Y27 HA[26]# HD[23]# D27
H_A#27 AA28 G24 H_D#24
Space>= 20 mils H_A#28
H_A#29
W28
AB27
HA[27]#
HA[28]#
HD[24]#
HD[25]# C28
B26
H_D#25
H_D#26
MCH_VREF Signals
R235 H_A#30 HA[29]# HD[26]# H_D#27
Y26 HA[30]# HD[27]# G22
MCH_HYRCOMP 1 2 H_A#31 AB28 C26 H_D#28 MCH_HAVREF:
HA[31]# HD[28]# H_D#29 +VCCP
3 H_REQ#[4:0] E26
27.4Ohm H_REQ#0 R28
HD[29]#
G23 H_D#30 Length <= 0.5"
H_REQ#1 HREQ[0]# HD[30]# H_D#31
P25 HREQ[1]# HD[31]# B28 Width = 11 mils
H_REQ#2 R23 B21 H_D#32
HREQ[2]# HD[32]# Space>= 20 mils

1
H_REQ#3 R25 G21 H_D#33
H_REQ#4 HREQ[3]# HD[33]# H_D#34 R67
T23 HREQ[4]# HD[34]# C24
T26 C23 H_D#35
3 H_ADSTB#0 HADSTB[0]# HD[35]# H_D#36
AA26 D22 2/3(+VCCP) +/- 2% 49.9Ohm
MCH_HXRCOMP :
3 H_ADSTB#1 HADSTB[1]#
HOST HD[36]#
HD[37]# C25 H_D#37
H_D#38 MCH_HAVREF

2
23 _CLK_MCH_BCLK# AD29 E24
Length <= 0.5" AE29
BCLK# HD[38]#
D24 H_D#39
23 _CLK_MCH_BCLK BCLK HD[39]#

1
Width =18 mils(L1/L6) MCH_HYRCOMP H28 G20 H_D#40
HYRCOMP HD[40]#

1
MCH_HYSWING K28 E23 H_D#41 C81 C79 R66
C Space>= 20 mils MCH_HXRCOMP B20
HYSWING HD[41]#
B22 H_D#42 C
MCH_HXSWING HXRCOMP HD[42]# H_D#43 0.1uF/10V 1uF/6.3V 100Ohm
B18 HXSWING HD[43]# B23
R226 H_D#44

2
HD[44]# F23
MCH_HXRCOMP H_D#45

2
1 2 3 H_DSTBN#0 J28 HDSTBN[0]# HD[45]# F21
C27 C20 H_D#46
3 H_DSTBN#1 HDSTBN[1]# HD[46]# H_D#47
27.4Ohm E22 C21
3 H_DSTBN#2 HDSTBN[2]# HD[47]# H_D#48
3 H_DSTBN#3 D18 HDSTBN[3]# HD[48]# G18
K27 E19 H_D#49
3 H_DSTBP#0 HDSTBP[0]# HD[49]# H_D#50
3 H_DSTBP#1 D26 HDSTBP[1]# HD[50]# E20
E21 G17 H_D#51
3 H_DSTBP#2 HDSTBP[2]# HD[51]# H_D#52
3 H_DSTBP#3 E18 HDSTBP[3]# HD[52]# D20
J25 F19 H_D#53 MCH_HCCVREF:
3 H_DINV#0 DINV[0]# HD[53]# H_D#54
E25 C19 +VCCP
MCH_SWING Signals 3
3
H_DINV#1
H_DINV#2 B25
G19
DINV[1]#
DINV[2]#
HD[54]#
HD[55]# C17
F17
H_D#55
H_D#56
Length <= 0.5"
Width = 10 mils
3 H_DINV#3 DINV[3]# HD[56]# H_D#57
B19
HD[57]# Space>= 20 mils

1
MCH_HYSWING : F15 G16 H_D#58
3 H_CPURST# CPURST# HD[58]# H_D#59
+VCCP E16 R270
Length <= 0.5" MCH_HDVREF K21
HD[59]#
C16 H_D#60
HDVREF[0] HD[60]# H_D#61 49.9Ohm
Width = 18 mils J21 HDVREF[1] HD[61]# E17 2/3(+VCCP) +/- 2%
J17 D16 H_D#62
Space>= 20 mils HDVREF[2] HD[62]#
1

MCH_HCCVREF H_D#63 MCH_HCCVREF

2
Y28 HCCVREF HD[63]# C18
R240 MCH_HAVREF Y22
19 HUB_PD[10:0] HAVREF

1
ADS# L28 H_ADS# 3

1
1/3(+VCCP) +/- 2% 301Ohm HUB_PD0 <=6" U7 M25 C376 C377 R269
HUB_PD1 HL[0] HTRDY# H_TRDY# 3
<=6" U4 HL[1] DRDY# N24 H_DRDY# 3
MCH_HYSWING HUB_PD2 <=6" 0.1uF/10V 1uF/6.3V 100Ohm
2

U3 HL[2] DEFER# M28 H_DEFER# 3


HUB_PD3 <=6"

2
V3 HL[3] HITM# N28 H_HITM# 3
2

+V1.2S_GMCH_HI HUB_PD4 <=6"

2
W2 HL[4] HIT# N27 H_HIT# 3
1

C345 R241 HUB_PD5 <=6" W6 P27


HUB_PD6 HL[5] HLOCK# H_LOCK# 3
B 0.1uF/10V <=6" V6 M23 B

HUB I/F
HL[6] BREQ0# H_BR0# 3
1

150Ohm HUB_PD7 <=6" W7 N25


HUB_PD8 HL[7] BNR# H_BNR# 3
Close to R249 <=6"
2

T3 HL[8] BPRI# P28 H_BPRI# 3


37.4Ohm HUB_PD9 <=6"
1

V5 M26
Pin H28 HUB_PD10 <=6" V4
HL[9] DBSY#
N23 H_RS#0 H_DBSY# 3
HUB_PSTRB HL[10] RS#0 H_RS#1
19 HUB_PSTRB W3 HLSTB RS#1 P26
HUB_PSTRB# H_RS#2 MCH_HDVREF:
2

19 HUB_PSTRB# V2 HLSTB# RS#2 M27


11-07
MCH_HLZCOMP T2 +VCCP
HLRCOMP H_RS#[2:0] 3 Length <= 0.5"
U2 PSWING
W1 HLVREF Width = 11 mils
Space>= 20 mils

1
MCH_HXSWING : RG82855GME

11-07
+VCCP R44
Length <= 0.5"
Width = 18 mils +V1.2S_GMCH_HI 2/3(+VCCP) +/- 2% 49.9Ohm
+VCCP
Space>= 20 mils
1

MCH_HDVREF

2
1

R225
2

2
R251

1
1/3(+VCCP) +/- 2% 301Ohm R49 +V1.2S_GMCH_HI C48 C44 C46 C52 R46
56Ohm 68.1Ohm
MCH_HXSWING / 0.8V +/- 2% 0.343V- 0.357V(Typ. 0.35V) 0.1uF/10V 0.1uF/10V 0.1uF/10V 1uF/6.3V 100Ohm
2

2
2

11-07
HUB_VSWING_MCH HUB_VREF_MCH
1

1
2 1
1

C328 R228 H_CPURST# R252 287Ohm


2

0.1uF/10V
1

11-07
150Ohm R253 C356 C362 C363 R262
Close to
2

100Ohm 0.1uF/10V 0.01UF/10V 0.1uF/10V 100Ohm


1

Pin B20
2

2
1

A A

R249: R251: R252:


27.4 ohm (10-003412704) for 855GM/852GM 49.9 ohm (10-003414909) for 855GM/852GM 240 ohm (10-003412410) for 855GM/852GM Title : NB-MCHM(HOST)
37.4 ohm (10-003413704) for 855GME 68.1 ohm (10-003416801) for 855GME 287 ohm (10-003412817) for 855GME ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
48.7 ohm (10-003414807) for 852GME/852GMV 86.6 ohm (10-003418606) for 852GME/852GMV 324 ohm (10-003413214) for 852GME/852GMV
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 7 of 54
5 4 3 2 1
5 4 3 2 1

Only 855GME & 852GME can U32C

C1
U32D
VSS0 VSS84 T16
support AGP function! AGP_AD3
AGP_AD2
R3
R5
DVOBD[0]
DVOBD[1]
BLUE
BLUE#
C9
D9
G1 AA16 AGP_AD5 R6 C8
VSS1 VSS85 AGP_AD4 DVOBD[2] GREEN
L1 VSS2 VSS86 AE16 R4 DVOBD[3] GREEN# D8
U1 A17 AGP_AD7 P6 A7
VSS3 VSS87 AGP_AD6 DVOBD[4] RED
AA1 VSS4 VSS88 D17 P5 DVOBD[5] RED# A8
AGP_AD8

DAC
AE1 VSS5 VSS89 H17 12 AGP_AD[31:0] N5 DVOBD[6] HSYNC H10
R2 N17 AGP_C/BE#0 P2 J9
VSS6 VSS90 12 AGP_C/BE#0 AGP_AD10 DVOBD[7] VSYNC
AG3 VSS7 VSS91 R17 12 AGP_SBA[7:0] N2 DVOBD[8]
AJ3 U17 AGP_AD9 N3 E8 CRT_REFSET R40 1 2 137Ohm 1%
VSS8 VSS92 AGP_AD12 DVOBD[9] REFSET
D D4 VSS9 VSS93 AB17 M1 DVOBD[10]
D
G4 AC17 AGP_AD11 M5 B6
VSS10 VSS94 DVOBD[11] DDCACLK
K4 VSS11 VSS95 F18 DDCADATA G9
N4 J18 AGP_ADSTB0 P3
VSS12 VSS96 12 AGP_ADSTB0 AGP_ADSTB0# DVOBCLK
T4 VSS13 VSS97 AA18 12 AGP_ADSTB0# P4 DVOBCLK# IYAM[0] G14
W4 AG18 AGP_AD0 T6 E15
VSS14 VSS98 AGP_AD1 DVOBHSYNC IYAM[1]
AA4 VSS15 VSS99 A19 T5 DVOBVSYNC IYAM[2] C15
AC4 D19 AGP_C/BE#1 L2 C13
VSS16 VSS100 12 AGP_C/BE#1 AGP_AD14 DVOBBLANK# IYAM[3]
AE4 VSS17 VSS101 H19 3 4 M2 DVOBFLDSTL IYAP[0] F14
B5 AB19 RN34B 100KOHM / E14 +V3.3S_GMCH_GPIO
VSS18 VSS102 AGP_AD30 IYAP[1]
U5 VSS19 VSS103 AE19 +V1.5S_GMCH_DVO 1 2 G2 DVOBCINTR# IYAP[2] C14
Y5 F20 R41 1 2 100KOhm / AGP_AD13 M3 B13
VSS20 VSS105 RN34A 100KOHM / DVOBCCLKINT IYAP[3]
Y6 VSS21 VSS106 J20 IYBM[0] H12
AG6 AA20 AGP_AD19 K5 E12
VSS22 VSS107 +V1.5S_GMCH_DVO AGP_AD20 DVOCD[0] IYBM[1]
C7 VSS23 VSS108 AC20 K1 DVOCD[1] IYBM[2] C12

2.2KOhm 2
2.2KOhm 4
E7 A21 AGP_AD21 K3 G11
VSS24 VSS109 AGP_AD22 DVOCD[2] IYBM[3]
G7 VSS25 VSS110 D21 K2 DVOCD[3] IYBP[0] G12

/
AGP_AD23

/
/
/
/

/
J7 VSS26 VSS111 H21 J6 DVOCD[4] IYBP[1] E11
AGP_C/BE#3

2.2KOhm
2.2KOhm
2.2KOhm
2.2KOhm
2.2KOhm
2.2KOhm
M7 VSS27 VSS112 M21 12 AGP_C/BE#3 J5 DVOCD[5] IYBP[2] C11

LVDS
R7 P21 AGP_AD25 H2 G10
VSS28 VSS113 AGP_AD24 DVOCD[6] IYBP[3]

DVO
AA7 VSS29 VSS114 T21 H1 DVOCD[7] ICLKAM D14
AGP_AD27

1
3
AE7 V21 H3 E13
AJ7
VSS30
VSS31
VSS VSS115
VSS116 Y21 AGP_AD26 H4
DVOCD[8]
DVOCD[9]
ICLKAP
ICLKBM E10

1
1
3
5
7
1
AGP_AD29

RN33A
RN33B
H8 VSS32 VSS117 AA21 H6 DVOCD[10] ICLKBP F10
K8 AB21 AGP_AD28 G3
VSS33 VSS118 DVOCD[11] LVDS_DDC2BC
P8 VSS34 VSS119 AG21 DDCPCLK B4
T8 B24 AGP_ADSTB1 J3 C5 LVDS_DDC2BD
VSS35 VSS120 12 AGP_ADSTB1 AGP_ADSTB1# DVOCCLK DDCPDATA
V8 VSS36 VSS121 F22 12 AGP_ADSTB1# J2 DVOCCLK#
AGP_AD17 LVDS_BACK_ADJ TPC28t T198

2
Y8 VSS37 VSS122 J22 K6 DVOCHSYNC PANELBKLTCTL G8 1
R43 / AGP_AD16

2
4
6
8
AC8 VSS38 VSS123 L22 L5 DVOCVSYNC PANELBKLTEN F8
AGP_AD18

RN11A
RN11B
100KOhm

RN11C
RN11D
C
E9 VSS39 VSS124 N22 L3 DVOCBLANK# PANELVDDEN A5 C
AGP_AD31

R45

R50
L9 VSS40 VSS125 R22 1 2 H5 DVOCFLDSTL
N9 U22 C4 GST0
VSS41 VSS126 AGP_IRDY# GST[0] GST1 AGP_ST0 12
R9 VSS42 VSS127 W22 12 AGP_IRDY# K7 MI2CCLK GST[1] C3 AGP_ST1 12
U9 AE22 AGP_DEVSEL# N6 C2 GST2
VSS43 VSS128 12 AGP_DEVSEL# AGP_TRDY# MI2CDATA GST[2] AGP_ST2 12
W9 VSS44 VSS129 A23 12 AGP_TRDY# N7 MDVICLK
AB9 D23 AGP_FRAME# M6 A10 R227 1 2 1.5KOhm
VSS45 VSS130 12 AGP_FRAME# AGP_STOP# MDVIDATA LIBG
AG9 VSS46 VSS131 AA23 12 AGP_STOP# P7 MDDCCLK
C10 AC23 AGP_AD15 T7 B7 R492 1 2 10KOhm
VSS47 VSS132 MDDCDATA DREFCLK R493 1
J10 VSS48 VSS133 AJ23 DREFSSCLK B17 2 10KOhm

CLKS
AA10 F24 +V1.5S_GMCH_DVO AGP_SBA0 E5 H9 1
VSS49 VSS134 AGP_SBA1 ADDID[0] LCLKCTLA TPC28t T91 +V3.3S_GMCH_GPIO
AE10 VSS50 VSS135 H24 F5 ADDID[1] LCLKCTLB C6
D11 K24 AGP_SBA2 E3 M_LCLKCTLB
VSS51 VSS136 ADDID[2]

2
F11 M24 AGP_SBA3 E2 AA22
VSS52 VSS137 ADDID[3] DPWR# H_DPWR# 3

2
H11 P24 R234 AGP_SBA4 G5 Y23
VSS53 VSS138 20 PM_SUSCLK AGP_SBA5 ADDID[4] DPSLP# H_DPSLP# 3,20
AB11 T24 1KOhm R35 / F4 AD28 R34
VSS54 VSS139 AGP_SBA6 ADDID[5] RSTIN# PCI_RST# 19,29,34
AC11 V24 / 1KOhm G6 10KOhm
VSS55 VSS140 ADDID[6]
1

AGP_SBA7
1

AJ11 VSS56 VSS141 AA24 2 1 F6 ADDID[7] PWROK J11 IMVP4_PWRGD 42,43


G

MISC
J12 AG24 1 ADDDETECT L7
VSS57 VSS142 12 AGP_PAR AGP_PIPE DVODETECT

1
2 S

AA12 VSS58 VSS143 A25 2 3 D5 DPMS EXTTS_0 D6


D

AG12 VSS59 VSS144 D25 VSS AJ1


A13 AA25 Q54 F1
VSS60 VSS145 12 AGP_VREF GVREF
D13 AE25 2N7002
VSS61 VSS146 /
F13 VSS62 VSS147 G26 F7 AGPBUSY#
H13 VSS63 VSS148 J26 NC0 B1
N13 L26 MCH_GRCOMP D1 AH1
VSS64 VSS149 DVORCOMP NC1
R13 VSS65 VSS150 N26 23 _CLK_MCH66 Y3 GCLKIN NC2 A2
U13 R26 AJ2 +V3.3S
VSS66 VSS151 NC3
1

AB13 U26 C374 T108 TPC28t 1 AA5 A28 Width= 10 mils


VSS67 VSS152 5P AGP_SBSTB RSVD0 NC4
AE13 W26 F2 AJ28
J14
VSS68 VSS153
AB26 /
12 AGP_SBSTB AGP_SBSTB# F3
RSVD1 NC5
A29
Space>=20 mils
VSS69 VSS154 12 AGP_SBSTB# RSVD2 NC6

2
AGP_GNT#
2

B P14 VSS70 VSS155 A27 12 AGP_GNT# B2 RSVD3 NC7 B29 B


T14 F27 AGP_REQ# B3 AH29 MCH_GRCOMP R33
VSS71 VSS156 12 AGP_REQ# RSVD4 NC8
AA14 AC27 D2 AJ29 10KOhm
VSS72 VSS157 12 AGP_WBF# RSVD5 NC9

1
AC14 AG27 D3 AA9 /

NC
VSS73 VSS158 12 AGP_RBF# RSVD6 NC10
D15 AJ27 D7 AJ4 R233
VSS74 VSS159 RSVD7 NC11 40.2Ohm M_LCLKCTLB

1
H15 VSS75 VSS160 AC28 12 AGP_C/BE#2 L4 RSVD8
N15 AE28 TPC28t T86 1 B12 1%
VSS76 VSS161 TPC28t T90 RSVD9
R15 VSS77 VSS162 C29 1 F12 RSVD10
TPC28t T87

2
U15 VSS78 VSS163 E29 1 D12 RSVD11
AB15 VSS79 VSS164 G29
AG15 VSS80 VSS165 J29
RG82855GME
AJ26 VSS181
T9 VSS180
L6 VSS179
E28 VSS178
D28 VSS177
C22 VSS176
AJ20 VSS174
AJ18 VSS173
AJ12 VSS172
AJ10 VSS171
AA29 VSS170
W29 VSS169

F16 VSS81 VSS166 L29


J16
P16
VSS82 VSS167 N29
U29 11-07
VSS83 VSS168
RG82855GME +V1.5S_GMCH_DVO System GFX core GFX core +V1.5S_GMCH_DVO +V1.5S_GMCH_DVO

11-07 R407 1 2 1KOhm / GST1


GST FSB Memory Clock Clock
[2:0] Freq.

2
R408 1 2 1KOhm / GST0 Freq. -Low -High

2
R237
000 400 MHz 266 MHz 133 MHz 200 MHz 1KOhm R48
0.5 VCCDVO +/- 2% 1KOhm
+V3.3S +V1.5S_GMCH_DVO
001 400 MHz 200 MHz 100 MHz 200 MHz AGP_VREF

1
010 400 MHz 200 MHz 100 MHz 133 MHz ADDDETECT

1
2
1

2
011 400 MHz 266 MHz 133 MHz 266 MHz Close to C333 R236
1

0.1uF/10V 1KOhm R47


RN91A RN91B 100 533 MHz 266 MHz 133 MHz 200 MHz Pin F1 1KOhm
1KOhm 1KOhm /

2
/ / 101 533 MHz 266 MHz 133 MHz 266 MHz

1
A A

1
110 533 MHz 333 MHz 166 MHz 266 MHz
2

111 400 MHz 333 MHz 166 MHz 250 MHz


1 2 GST2
Q94A Q94B
*GST[2:0] are internal pulled-low.
6

UM6K1N UM6K1N R409


/
2
/
5
1KOhm
/ *Current: 852GME/852GMV may still Title : NB-MCHM(VGA)
4,23 FREQ_SEL
use the GST configurations. ASUSTek COMPUTER INC. NB1 Engineer: John Hung
1

*Future: 852GME/852GMV only need Size Project Name Rev


GST2 to strap FSB frequency. Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 8 of 54
5 4 3 2 1
5 4 3 2 1

+V1.2S +V1.2S_GMCH_CORE

1.14V - 1.26V(+/- 5%) (MCH-Sighting041)


S0-S1M:Max. 1.4 A

1
+ The core supply (1.2V) should be

1
CE21 C375 C49 C75 C74 C77
150U/4.0V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V powered up a minimum of 1ms
10uF/10V
before the DVO and GPIO IO

2
(1.5V and 3.3V) voltage rails.
+VCCP
D U32E 1.0V - 1.1V(+/- 5%) D
J15 G15
P13
VCC0 VTTLF0
H16
S0-S1M: 2.5 A(CPU,MCH,ICH)
VCC1 VTTLF1

1
T13 VCC2 VTTLF2 H18 + S0-S1M: Max. 0.72A

1
+V1.2S_GMCH_CORE +V1.2S_GMCH_HI N14 J19 C58 C67 C71 CE20
VCC3 VTTLF3
R14 VCC4 VTTLF4 H20
1.14V - 1.26V(+/- 5%) U14 L21 0.1uF/10V 0.1uF/10V 0.1uF/10V 150U/4.0V
VCC5 VTTLF5

2
P15 N21
S0-S1M:Max. 90 mA VCC6 VTTLF6

1
C63 T15 R21
C50 C73 VCC7 VTTLF7
AA15 VCC8 VTTLF8 U21
10uF/10V 0.1uF/10V 0.1uF/10V N16 H22
VCC9 VTTLF9

2
R16 VCC10 VTTLF10 M22
+V1.2S_GMCH_CORE U16 P22
+V1.2S_GMCH_DPLLA VCC11 VTTLF11
P17 VCC12 VTTLF12 T22
L16 +V1.2S_GMCH_CORE
1.14V - 1.26V(+/- 5%) T17 VCC13 VTTLF13 V22
1 2 AA17 Y29
S0-S1M: 0.3 A 1.14V - 1.26V(+/- 5%) AA19
VCC14 VTTLF14
K29
VCC15 VTTLF15
1

80Ohm/100MHz + W21 F29


S0-S1M: 0.3 A VCC16 VTTLF16

1
C327 C36 H14 AB29
CE16 0.1uF/10V 0.1uF/10V VCC17 VTTLF17
VTTLF18 A26
150U/4.0V +V1.2S_GMCH_HI V1 A20
VCCHL0 VTTLF19
2

2
Y1 A18
1.14V - 1.26V(+/- 5%) W5
U6
VCCHL1
VCCHL2
POWER VTTLF20
A22 M_PWR_VTTF0 C27 1 2 0.1uF/10V
S0-S1M: 0.3 A C83 VCCHL3 VTTHF0

1
U8 A24 M_PWR_VTTF1 C25 1 2 0.1uF/10V
+V1.2S_GMCH_CORE +V1.2S_GMCH_DPLLB 0.1uF/10V VCCHL4 VTTHF1 M_PWR_VTTF2 C334 0.1uF/10V
W8 VCCHL5 VTTHF2 H29 1 2
L38 V7 M29 M_PWR_VTTF3 C350 1 2 0.1uF/10V
VCCHL6 VTTHF3 M_PWR_VTTF4 C364 0.1uF/10V
1.14V - 1.26V(+/- 5%)

2
1 2 V9 VCCHL7 VTTHF4 V29 1 2
S0-S1M: 0.3 A
1

80Ohm/100MHz + D29 AC1


VCCAHPLL VCCSM0
1

C326 Y2 AG1 +V2.5_GMCH_SM +V2.5


C
CE14 0.1uF/10V VCCAGPLL VCCSM1 C
VCCSM2 AB3 2.375V - 2.625V(+/- 5%)
150U/4.0V A6 AF3
+V1.5S +V1.5S_GMCH_DVO VCCADPLLA VCCSM3 S0-S1M: Max. 2.07A
2

B16 VCCADPLLB VCCSM4 Y4

1
VCCSM5 AJ5 + S3: Max. 25 mA
1.425V - 1.575V(+/- 5%) E1 AA6 CE23
VCCDVO_0 VCCSM6
J1 AB6
S0-S1M: Max. 90 mA 1 VCCDVO_1 VCCSM7 150U/4.0V
+ N1 VCCDVO_2 VCCSM8 AF6

1
CE17 C347 C47 C60

2
E4 VCCDVO_3 VCCSM9 Y7
150U/4.0V 0.1uF/10V 0.1uF/10V J4 AA8
10uF/10V VCCDVO_4 VCCSM10
M4 VCCDVO_5 VCCSM11 AB8
2

2
E6 VCCDVO_6 VCCSM12 Y9
H7 VCCDVO_7 VCCSM13 AF9

1
+V1.5S +V1.5S_GMCH_ADAC J8 AJ9 C405 C406
VCCDVO_8 VCCSM14
L8 VCCDVO_9 VCCSM15 AB10
1.425V - 1.575V(+/- 5%) M8 AA11 0.1uF/10V 0.1uF/10V
VCCDVO_10 VCCSM16

2
N8 VCCDVO_11 VCCSM17 AB12
1

C330 C324 R8 AF12


VCCDVO_12 VCCSM18
K9 VCCDVO_13 VCCSM19 AA13
0.1uF/10V 0.01UF/10V M9 AJ13
VCCDVO_14 VCCSM20
2

P9 VCCDVO_15 VCCSM21 AB14


VCCSM22 AF15

1
+V1.5S +V1.5S_GMCH_ALVDS A9 AB16 C86 C408 C90
VCCADAC0 VCCSM23
B9 VCCADAC1 VCCSM24 AJ17
1.425V - 1.575V(+/- 5%) B8 AB18 0.1uF/10V 0.1uF/10V 0.1uF/10V
VSSADAC VCCSM25

2
AF18
S0-S1M: Max. 70 mA C323 VCCSM26
1

1
C329 A11 AB20
0.1uF/10V 0.01UF/10V VCCALVDS VCCSM27
B11 VSSALVDS VCCSM28 AF21
VCCSM29 AJ21
2

G13 VCCDLVDS0 VCCSM30 AB22

1
B14 AF24 C99 C102 C85 C87
VCCDLVDS1 VCCSM31
B J13 VCCDLVDS2 VCCSM32 AJ25 B
1.425V - 1.575V(+/- 5%) B15 AF27 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
+V1.5S +V1.5S_GMCH_DLVDS VCCDLVDS3 VCCSM33

2
AC29
S0-S1M: Max. 70 mA F9
VCCSM34
AF29
VCCTXLVDS0 VCCSM35 +V2.5_GMCHQSM +V2.5_GMCH_SM
B10 VCCTXLVDS1 VCCSM36 AG29
D10 VCCTXLVDS2
1

+ C56 A12 AJ6


CE18 VCCTXLVDS3 VCCQSM0
VCCQSM1 AJ8

1
22uF/6.3V 0.1uF/10V A3 C407 C117
VCCGPIO_0 0.1uF/10V
2

A4 VCCGPIO_1 VCCASM0 AD1


R98 4.7U
2

VCCASM1 AF1

2
1 2
11-08
RG82855GME

11-08 11-07
+V2.5 +V2.5_GMCH_TXLVDS 1Ohm
L37
+V1.2S_GMCH_ASM +V1.2S_GMCH_HI
2.375V - 2.625V(+/- 5%) 1 2
L42
S0-S3: Max. 50 mA
1

80Ohm/100MHz + 1 2 1.14V - 1.26V(+/- 5%)


1

C320 C38 C321


CE15 80Ohm/100MHz S0-S1M: 0.4 A

1
22uF/6.3V 0.1uF/10V 0.1uF/10V 0.1uF/10V +

1
CE22
2

C95
0.1uF/10V 100UF
+V3.3S +V3.3S_GMCH_GPIO

2
3.135V - 3.465V(+/- 5%)
NB
1

C30 C29
0.1uF/10V
A
10uF/10V VCC, VCCASM, VCCHL, VCCAGPLL, A

VCCADPLLA, VCCADPLLB:
2

855GM/852GM: 1.2V
855GME: 1.35V
852GME/852GMV: 1.5V
Title : NB-MCHM(PWR)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 9 of 54
5 4 3 2 1
5 4 3 2 1

6,11 _DDR_DATA[63:0]
+V2.5 +V2.5

DDR_VREF DDR_VREF
CON14A CON14B
1 VREF0 VREF1 2 6 CLK_DDR3 35 B:CK0 B:CKE0 96B DDR_CKE2 6,11
3 4 37 100B DDR_AA11
_DDR_DATA5 VSS0 VSS1 _DDR_DATA4 6 CLK_DDR3# B:CK0# B:A11 DDR_AA8 DDR_AA11 6,11
5 DQ0 DQ4 6 6 CLK_DDR5 89 B:CK2 B:A8 102B DDR_AA8 6,11
D _DDR_DATA0 7 8 _DDR_DATA1 91 106B DDR_AA6 D
DQ1 DQ5 6 CLK_DDR5# B:CK2# B:A6 DDR_AB4 DDR_AA6 6,11
9 VDD0 VDD1 10 6,11 DDR_CKE3 95 B:CKE1 B:A4 108B DDR_AB4 6,11
11 12 97 110B DDR_AB2
6,11 _DDR_DQS0 _DDR_DATA3 DQS0 DM0 _DDR_DATA6 _DDR_DM0 6,11 DDR_AA12 B:DU/A13 B:A2 DDR_AA0 DDR_AB2 6,11
13 DQ2 DQ6 14 6,11 DDR_AA12 99 B:A12 B:A0 112B DDR_AA0 6,11
15 16 DDR_AA9 101 116B DDR_BS1#
_DDR_DATA7 VSS2 VSS3 _DDR_DATA2 6,11 DDR_AA9 DDR_AA7 B:A9 B:BA1 DDR_RAS# DDR_BS1# 6,11
17 DQ3 DQ7 18 6,11 DDR_AA7 105 B:A7 B:RAS# 118B DDR_RAS# 6,11
_DDR_DATA8 19 20 _DDR_DATA12 DDR_AB5 107 120B DDR_CAS#
DQ8 DQ12 6,11 DDR_AB5 DDR_AA3 B:A5 B:CAS# DDR_CAS# 6,11
21 VDD2 VDD3 22 6,11 DDR_AA3 109 B:A3 B:S1# 122B DDR_CS3# 6,11
_DDR_DATA13 23 24 _DDR_DATA11 DDR_AB1 111 158B
DQ9 DQ13 6,11 DDR_AB1 DDR_AA10 B:A1 B:CK1# CLK_DDR4# 6
6,11 _DDR_DQS1 25 DQS1 DM1 26 _DDR_DM1 6,11 6,11 DDR_AA10 115 B:A10/AP B:CK1 160B CLK_DDR4 6
27 28 DDR_BS0# 117 194B 2 1
_DDR_DATA15 VSS4 VSS5 _DDR_DATA14 6,11 DDR_BS0# DDR_WE# B:BA0 B:SA0 +V3.3S
29 30 119 196B R122 10KOhm
_DDR_DATA10 DQ10 DQ14 _DDR_DATA9 6,11 DDR_WE# B:WE# B:SA1
31 DQ11 DQ15 32 6,11 DDR_CS2# 121 B:S0# B:SA2 198B
33 VDD4 VDD5 34
6 CLK_DDR0 35A A:CK0 VDD6 36
6 CLK_DDR0# 37A A:CK0# VSS6 38 201 NC0 NP_NC7 208
39 VSS7 VSS8 40 202 NC1 NP_NC6 207
_DDR_DATA20 41 42 _DDR_DATA17 203 206
_DDR_DATA21 DQ16 DQ20 _DDR_DATA16 NC2 NP_NC5
43 DQ17 DQ21 44 204 NC3 NP_NC4 205
45 VDD7 VDD8 46
47 48 Dual_DDR_SODIMM_218P
6,11 _DDR_DQS2 _DDR_DATA19 DQS2 DM2 _DDR_DATA18 _DDR_DM2 6,11
49 DQ18 DQ22 50
51 VSS9 VSS10 52
_DDR_DATA23 53 54 _DDR_DATA22
_DDR_DATA25 DQ19 DQ23 _DDR_DATA24
55 DQ24 DQ28 56
57 VDD9 VDD10 58
_DDR_DATA28 59 60 _DDR_DATA29
DQ25 DQ29
6,11 _DDR_DQS3 61 DQS3 DM3 62 _DDR_DM3 6,11
63 VSS11 VSS12 64
_DDR_DATA27 65 66 _DDR_DATA26
_DDR_DATA31 DQ26 DQ30 _DDR_DATA30
C
67 DQ27 DQ31 68 C
69 VDD11 VDD12 70

FOR +V2.5 DECOUPLING


85 DU_0 DU/RESET# 86
87 VSS13 VSS14 88 2.375V - 2.625V(+/- 5%)
89A 90 +V2.5 +V2.5
6 CLK_DDR2
91A
A:CK2 VSS15
92
S0-S3: 8.12 A
6 CLK_DDR2# A:CK2# VDD13
93 VDD14 VDD15 94 1 2 CN2A
0.1U
6,11 DDR_CKE1 95A A:CKE1 A:CKE0 96 DDR_CKE0 6,11 3 4 CN2B
0.1U

1
97A A:DU/A13 DU/BA2 98 + + 5 6 CN2C
DDR_AA12 DDR_AA11 0.1U
6,11 DDR_AA12 99A A:A12 A:A11 100 DDR_AA11 6,11 CE26 CE25 7 8 CN2D
DDR_AA9 DDR_AA8 0.1U
6,11 DDR_AA9 101A A:A9 A:A8 102 DDR_AA8 6,11
103 VSS16 VSS17 104 150U/4.0V 150U/4.0V
DDR_AA7 105A 106 DDR_AA6

2
6,11 DDR_AA7 A:A7 A:A6 DDR_AA6 6,11
6,11 DDR_AA5 107A A:A5 A:A4 108 DDR_AA4 6,11 1 2 CN4A
DDR_AA3 0.1U
6,11 DDR_AA3 109A A:A3 A:A2 110 DDR_AA2 6,11 3 4 CN4B
DDR_AA0 0.1U
6,11 DDR_AA1 111A A:A1 A:A0 112 DDR_AA0 6,11 5 6 CN4C
0.1U
113 VDD16 VDD17 114 7 8 CN4D
DDR_AA10 DDR_BS1# 0.1U
6,11 DDR_AA10 115A A:A10/AP A:BA1 116 DDR_BS1# 6,11
DDR_BS0# 117A 118 DDR_RAS#
6,11 DDR_BS0# DDR_WE# A:BA0 A:RAS# DDR_CAS# DDR_RAS# 6,11
6,11 DDR_WE# 119A A:WE# A:CAS# 120 DDR_CAS# 6,11
6,11 DDR_CS0# 121A A:S0# A:S1# 122 DDR_CS1# 6,11 +V2.5 1 2 CN5A
0.1U
123 DU_1 DU_3 124 3 4 CN5B
0.1U
125 VSS18 VSS19 126 5 6 CN5C
_DDR_DATA37 _DDR_DATA32 0.1U
127 DQ32 DQ36 128 7 8 CN5D
0.1U

1
B _DDR_DATA36 129 130 _DDR_DATA33 B
DQ33 DQ37 + +
131 VDD18 VDD19 132 CE24 CE27
6,11 _DDR_DQS4 133 DQS4 DM4 134 _DDR_DM4 6,11
_DDR_DATA34 135 136 _DDR_DATA35 150U/4.0V 150U/4.0V CN3A
DQ34 DQ38 1 0.1U 2
137 138 CN3B

2
VSS20 VSS21 3 0.1U 4
_DDR_DATA38 139 140 _DDR_DATA39 CN3C
DQ35 DQ39 5 0.1U 6
_DDR_DATA45 141 142 _DDR_DATA44 CN3D
DQ40 DQ44 7 0.1U 8
143 VDD20 VDD21 144
_DDR_DATA41 145 146 _DDR_DATA40
DQ41 DQ45
6,11 _DDR_DQS5 147 DQS5 DM5 148 _DDR_DM5 6,11
149 VSS22 VSS23 150
_DDR_DATA46 151 152 _DDR_DATA42
_DDR_DATA43 DQ42 DQ46 _DDR_DATA47
153 DQ43 DQ47 154
155 156 +V2.5 DDR_VREF
VDD22 VDD23
157 VDD24 A:CK1# 158 CLK_DDR1# 6
159 VSS24 A:CK1 160 CLK_DDR1 6

1
161 162 C531 C150
_DDR_DATA53 VSS25 VSS26 _DDR_DATA49 0.1uF/10V
163 DQ48 DQ52 164
_DDR_DATA52 165 166 _DDR_DATA51 0.1uF/10V
DQ49 DQ53
167 168 EMI : Close to DDR

2
VDD25 VDD26
169 170
6,11 _DDR_DQS6 _DDR_DATA54 171
DQS6 DM6
172 _DDR_DATA50 _DDR_DM6 6,11 socket power plane
DQ50 DQ54
173 VSS27 VSS28 174 of +V2.5
_DDR_DATA48 175 176 _DDR_DATA55
_DDR_DATA60 DQ51 DQ55 _DDR_DATA56
177 DQ56 DQ60 178
179 VDD27 VDD28 180
_DDR_DATA57 181 182 _DDR_DATA61
DQ57 DQ61
6,11 _DDR_DQS7 183 DQS7 DM7 184 _DDR_DM7 6,11
185 VSS29 VSS30 186
_DDR_DATA62 187 188 _DDR_DATA63
_DDR_DATA58 DQ58 DQ62 _DDR_DATA59
A
189 DQ59 DQ63 190 A
191 VDD29 VDD30 192
5,22,23 SDA_3S 193 SDA A:SA0 194
5,22,23 SCL_3S 195 SCL A:SA1 196
+V3.3S 197 VDDSPD A:SA2 198
199 VDDID DU_2 200
1

C168 Dual_DDR_SODIMM_218P
0.1uF/10V
Title : DUAL DDR SODIMM
2

ASUSTek COMPUTER INC. NB1 Engineer: John Hung


Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 10 of 54
5 4 3 2 1
5 4 3 2 1

6,10 _DDR_DATA[63:0]
6,10 _DDR_DM[8:0]
6,10 _DDR_DQS[8:0]
6,10 DDR_AA[12:0]
6,10 DDR_AB[2:1]
6,10 DDR_AB[5:4]
D D

DDR TERMINATION FOR +V1.25S DECOUPLING

+V1.25S +V1.25S +V1.25S +V1.25S

_DDR_DATA7 1 56Ohm 16 RN58A DDR_AB2 1 56Ohm 16 RN62A


_DDR_DATA2 2 56Ohm 15 RN58B DDR_AB4 2 56Ohm 15 RN62B 1 0.1U 2 CN24A 3 0.1U 4 CN24B
_DDR_DATA3 3 56Ohm 14 RN58C DDR_AA5 3 56Ohm 14 RN62C 5 0.1U 6 CN24C 7 0.1U 8 CN24D
_DDR_DQS0 4 56Ohm 13 RN58D DDR_AA1 4 56Ohm 13 RN62D
_DDR_DATA0 5 56Ohm 12 RN58E DDR_CKE3 5 56Ohm 12 RN62E
_DDR_DATA5 6,10 DDR_CKE3 DDR_CKE1
6 56Ohm 11 RN58F 6 56Ohm 11 RN62F 1 2 CN19A 3 4 CN19B
_DDR_DATA4 6,10 DDR_CKE1 DDR_BS1# 0.1U 0.1U
7 56Ohm 10 RN58G 7 56Ohm 10 RN62G 5 6 CN19C 7 8 CN19D
_DDR_DATA1 6,10 DDR_BS1# DDR_CS3# 0.1U 0.1U
8 56Ohm 9 RN58H 8 56Ohm 9 RN62H 1 2 CN22A 3 4 CN22B
6,10 DDR_CS3# 0.1U 0.1U
5 6 CN22C 7 8 CN22D
0.1U 0.1U

_DDR_DATA12 1 56Ohm 16 RN57A DDR_AA0 1 56Ohm 16 RN52A 1 2 CN23A 3 4 CN23B


_DDR_DATA10 DDR_RAS# 0.1U 0.1U
2 56Ohm 15 RN57B 2 56Ohm 15 RN52B 5 6 CN23C 7 8 CN23D
_DDR_DATA15 6,10 DDR_RAS# DDR_CAS# 0.1U 0.1U
3 56Ohm 14 RN57C 3 56Ohm 14 RN52C 1 2 CN27A 3 4 CN27B
_DDR_DQS1 6,10 DDR_CAS# DDR_CS0# 0.1U 0.1U
4 56Ohm 13 RN57D 4 56Ohm 13 RN52D 5 6 CN27C 7 8 CN27D
C _DDR_DATA13 6,10 DDR_CS0# DDR_CS2# 0.1U 0.1U C
5 56Ohm 12 RN57E 5 56Ohm 12 RN52E
_DDR_DATA8 6,10 DDR_CS2# DDR_CS1#
6 56Ohm 11 RN57F 6 56Ohm 11 RN52F
_DDR_DM0 6,10 DDR_CS1# _DDR_DATA32
7 56Ohm 10 RN57G 7 56Ohm 10 RN52G 1 2 CN26A 3 4 CN26B
_DDR_DATA6 _DDR_DATA33 0.1U 0.1U
8 56Ohm 9 RN57H 8 56Ohm 9 RN52H 5 6 CN26C 7 8 CN26D
0.1U 0.1U
1 2 CN25A 3 4 CN25B
0.1U 0.1U
5 6 CN25C 7 8 CN25D
0.1U 0.1U
_DDR_DATA22 1 56Ohm 16 RN56A _DDR_DATA38 1 56Ohm 16 RN61A
_DDR_DM2 2 56Ohm 15 RN56B _DDR_DATA34 2 56Ohm 15 RN61B 1 2 CN20A 3 4 CN20B
_DDR_DATA17 _DDR_DQS4 0.1U 0.1U
3 56Ohm 14 RN56C 3 56Ohm 14 RN61C 5 6 CN20C 7 8 CN20D
_DDR_DATA16 _DDR_DATA39 0.1U 0.1U
4 56Ohm 13 RN56D 4 56Ohm 13 RN61D 1 2 CN28A 3 4 CN28B
_DDR_DATA14 _DDR_DATA36 0.1U 0.1U
5 56Ohm 12 RN56E 5 56Ohm 12 RN61E 5 6 CN28C 7 8 CN28D
_DDR_DATA9 _DDR_DATA35 0.1U 0.1U
6 56Ohm 11 RN56F 6 56Ohm 11 RN61F
_DDR_DM1 7 56Ohm 10 RN56G _DDR_DM4 7 56Ohm 10 RN61G
_DDR_DATA11 8 56Ohm 9 RN56H _DDR_DATA37 8 56Ohm 9 RN61H 1 2 CN21A 3 4 CN21B
0.1U 0.1U
5 6 CN21C 7 8 CN21D
0.1U 0.1U
1 2 CN16A 3 4 CN16B
0.1U 0.1U
5 6 CN16C 7 8 CN16D
_DDR_DATA29 _DDR_DATA42 0.1U 0.1U
1 56Ohm 16 RN55A 1 56Ohm 16 RN51A
_DDR_DATA18 2 56Ohm 15 RN55B _DDR_DATA47 2 56Ohm 15 RN51B
_DDR_DATA25 3 56Ohm 14 RN55C _DDR_DQS5 3 56Ohm 14 RN51C 1 2 CN17A 3 4 CN17B
_DDR_DATA23 _DDR_DATA41 0.1U 0.1U
4 56Ohm 13 RN55D 4 56Ohm 13 RN51D 5 6 CN17C 7 8 CN17D
_DDR_DATA19 _DDR_DATA45 0.1U 0.1U
5 56Ohm 12 RN55E 5 56Ohm 12 RN51E 1 2 CN18A 3 4 CN18B
_DDR_DQS2 _DDR_DATA40 0.1U 0.1U
6 56Ohm 11 RN55F 6 56Ohm 11 RN51F 5 6 CN18C 7 8 CN18D
_DDR_DATA21 _DDR_DATA44 0.1U 0.1U
7 56Ohm 10 RN55G 7 56Ohm 10 RN51G
_DDR_DATA20 8 56Ohm 9 RN55H _DDR_DM5 8 56Ohm 9 RN51H
1 2 CN15A 3 4 CN15B
0.1U 0.1U
5 6 CN15C 7 8 CN15D
0.1U 0.1U
1 2 CN14A 3 4 CN14B
_DDR_DATA31 _DDR_DATA55 0.1U 0.1U
1 56Ohm 16 RN54A 1 56Ohm 16 RN60A 5 6 CN14C 7 8 CN14D
_DDR_DATA30 _DDR_DATA50 0.1U 0.1U
B 2 56Ohm 15 RN54B 2 56Ohm 15 RN60B B
_DDR_DATA26 3 56Ohm 14 RN54C _DDR_DATA53 3 56Ohm 14 RN60C
_DDR_DATA27 4 56Ohm 13 RN54D _DDR_DATA49 4 56Ohm 13 RN60D
_DDR_DQS3 5 56Ohm 12 RN54E _DDR_DM6 5 56Ohm 12 RN60E
_DDR_DM3 6 56Ohm 11 RN54F _DDR_DATA51 6 56Ohm 11 RN60F
_DDR_DATA24 7 56Ohm 10 RN54G _DDR_DATA43 7 56Ohm 10 RN60G
_DDR_DATA28 8 56Ohm 9 RN54H _DDR_DATA46 8 56Ohm 9 RN60H

DDR_AA12 1 56Ohm 16 RN63A _DDR_DATA57 1 56Ohm 16 RN50A


DDR_AA6 2 56Ohm 15 RN63B _DDR_DATA56 2 56Ohm 15 RN50B
DDR_AA8 3 56Ohm 14 RN63C _DDR_DATA60 3 56Ohm 14 RN50C
DDR_AA11 4 56Ohm 13 RN63D _DDR_DATA61 4 56Ohm 13 RN50D
DDR_CKE2 5 56Ohm 12 RN63E _DDR_DATA48 5 56Ohm 12 RN50E
6,10 DDR_CKE2 DDR_CKE0 _DDR_DATA54
6 56Ohm 11 RN63F 6 56Ohm 11 RN50F
6,10 DDR_CKE0 DDR_AA4 _DDR_DQS6
7 56Ohm 10 RN63G 7 56Ohm 10 RN50G
DDR_AA2 8 56Ohm 9 RN63H _DDR_DATA52 8 56Ohm 9 RN50H

DDR_WE# 1 56Ohm 16 RN53A _DDR_DATA59 1 56Ohm 16 RN59A


6,10 DDR_WE# DDR_BS0# _DDR_DATA63
2 56Ohm 15 RN53B 2 56Ohm 15 RN59B
6,10 DDR_BS0# DDR_AA10 _DDR_DM7
3 56Ohm 14 RN53C 3 56Ohm 14 RN59C
DDR_AB1 4 56Ohm 13 RN53D _DDR_DATA58 4 56Ohm 13 RN59D
DDR_AA3 5 56Ohm 12 RN53E _DDR_DATA62 5 56Ohm 12 RN59E
DDR_AB5 6 56Ohm 11 RN53F _DDR_DQS7 6 56Ohm 11 RN59F
DDR_AA7 7 56Ohm 10 RN53G 7 56Ohm 10 RN59G
DDR_AA9 8 56Ohm 9 RN53H 8 56Ohm 9 RN59H
A A

Title : DDR TERMINATION


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 11 of 54
5 4 3 2 1
5 4 3 2 1

U56A
8 AGP_AD[31:0] AGP_AD0 H29 AJ5 GPIO0
AGP_AD1 AD0 Part 1 of 7 GPIO0 GPIO1
H28 AD1 GPIO1 AH5
AGP_AD2 J29 AJ4 +V5
AGP_AD3 AD2 GPIO2
J28 AK4
A6G uses M11-CL as AGP_AD4 K29
AD3
AD4
GPIO3
GPIO4 AH4

1
AGP_AD5 K28 AF4
external AGP Graphics. AGP_AD6
AGP_AD7
L29
L28
AD5
AD6
AD7
GPIO5
GPIO6
GPIO7
AJ3
AK3 GPIO7
R475

AGP_AD8 8.2KOhm
(M11-CL and M11-P are pin-to-pin compatible!) AGP_AD9
N28
P29
AD8 GPIO8 AH3
AJ2
AGP_AD10 AD9 GPIO9 GPIO10 T236 TPC28t

2
P28 AD10 GPIO10 AH2 1 PWR_PLY 51
D AGP_AD11 R29 AH1 D
AD11 GPIO11

3
AGP_AD12 3

DVO / EXT TMDS / GPIO


R28 AD12 GPIO12 AG3 D
AGP_AD13 T29 AG1
AGP_AD14 AD13 GPIO13 GPIO14 Q102
T28 AG2
AGP_AD15
AGP_AD16
U29
N25
AD14
AD15
GPIO14
GPIO15 AF3
AF2
GPIO15
GPIO16 1 T237 TPC28t
11
G
2N7002
/
Strap Option
AGP_AD17 R26
AD16 GPIO16 2 S
AGP_AD18 AD17 DVOMODE RN93B 3 GPIO1

2
P25 AD18 DVOMODE AE10 +V3.3S 10KOhm 4
AGP_AD19 R27 RN93A 1 GPIO0
AGP_AD20 AD19 10KOhm 2
R25 AD20 ZV_LCDDATA0 AH6
AGP_AD21
AGP_AD22
T25
T26
AD21 ZV_LCDDATA1 AJ6
AK6
GPIO[1,0] = [1,1] : REFCLK 2 TAPS EARLIER
AD22 ZV_LCDDATA2
AGP_AD23 U25 AD23 ZV_LCDDATA3 AH7 THAN FEEDBACK
AGP_AD24 V27 AK7
AGP_AD25 AD24 ZV_LCDDATA4
W26 AD25 ZV_LCDDATA5 AJ7
AGP_AD26 W25 AH8
AD26 ZV_LCDDATA6

PCI / AGP
AGP_AD27
AGP_AD28
Y26
Y25
AD27 ZV_LCDDATA7 AJ8
AH9
GPIO[3,2] = [0,0] : X1CLK & X2CLK ALIGNED
AGP_AD29 AD28 ZV_LCDDATA8
AA26 AD29 ZV_LCDDATA9 AJ9
AGP_AD30 AA25 AK9
AGP_AD31 AD30 ZV_LCDDATA10
AA27 AD31 ZV_LCDDATA11 AH10
8 AGP_C/BE#[3:0] AGP_C/BE#0 N29
ZV_LCDDATA12 AE6
AG6
GPIO[6,5,4] = [0,0,0] & AGP8X_DET#=1: 1.5V
C/BE#0 ZV_LCDDATA13
AGP_C/BE#1 U28 C/BE#1 ZV_LCDDATA14 AF6 , AGP4X , AD16
AGP_C/BE#2 P26 AE7
AGP_C/BE#3 C/BE#2 ZV_LCDDATA15 ZV_D16
U26 C/BE#3 ZV_LCDDATA16 AF7
AE8 ZV_D17
ZV_LCDDATA17 EDID_DAT RN94C 6
23 _CLK_AGP66 AG30 PCICLK ZV_LCDDATA18 AG8 5 4.7KOhm +V3.3S GPIO[8] = 0 : NORMAL OPERATION
AG28 AF8 EDID_CLK RN94D 8 7 4.7KOhm
18,19,24,25,26,31,32 BUF_PCI_RST# RST# ZV_LCDDATA19 ZV_D20
8 AGP_REQ# AF28 REQ# ZV_LCDDATA20 AE9
1

C659 AD26 AF9


C 8 AGP_GNT# GNT# ZV_LCDDATA21 C
5P M25 AG10 +V3.3S
8 AGP_PAR ATI_STOP# PAR ZV_LCDDATA22
/ R478 0Ohm
8 AGP_STOP#
R479
1 2
0Ohm ATI_DEVSEL#
N26 STOP# ZV_LCDDATA23 AF10 GPIO[9,13,12,11] = [0,0,0,0] : NO EXT ROM
2

8 AGP_DEVSEL# 1 2 V29 DEVSEL#

1
R480 1 2 0Ohm ATI_TRDY# V28 AJ10
8 AGP_TRDY# ATI_IRDY# TRDY# ZV_LCDCNTL0
R481 1 2 0Ohm W29 AK10 R469
8 AGP_IRDY# IRDY# ZV_LCDCNTL1
11-12
R482 1 2 0Ohm ATI_FRAME# W28 AJ11
8 AGP_FRAME# FRAME# ZV_LCDCNTL2 DVOMODE
AE26 AH11 1KOhm R471 2 1 0Ohm
20,22,27 PCI_INTA# INTA# ZV_LCDCNTL3
R483 1 2 0Ohm ATI_WBF# VREF_GPIO

2
8 AGP_WBF# AC26 WBF# (NC)VREFG AG4
DVOMODE = 0 : 3.3V ZV SIGNAL

1
R484
1 2 0Ohm ATI_RBF# AE29
8 AGP_RBF# ATI_ADSTB0 RBF#
R485
1 2 0Ohm M28 AK16 R470
8 AGP_ADSTB0 AD_STBF_0 TXOUT_L0N LVDS_YA0M 17

AGP2X
R486
1 2 0Ohm ATI_ADSTB1 V25 AH16
8 AGP_ADSTB1 ATI_SBSTB AD_STBF_1 TXOUT_L0P LVDS_YA0P 17
R487
1 2 0Ohm AB29 AH17 1KOhm RN94B 3 ZV_D17
8 AGP_SBSTB SB_STBF TXOUT_L1N LVDS_YA1M 17 4.7KOhm4
AJ16 RN94A 1 ZV_D16
8 AGP_SBA[7:0] AGP_SBA0 TXOUT_L1P LVDS_YA1P 17 4.7KOhm2

2
AD28 SBA0 TXOUT_L2N AH18 LVDS_YA2M 17
AGP_SBA1
AGP_SBA2
AD29
AC28
SBA1 TXOUT_L2P AJ17
AK19
LVDS_YA2P 17 ZV_LCDDATA[17,16] = [0,0] : SINGLE
SBA2 TXOUT_L3N
AGP_SBA3 AC29 SBA3 TXOUT_L3P AH19 FUNCTION DEVICE
AGP_SBA4 AA28 AK18
AGP_SBA5 SBA4 TXCLK_LN LVDS_CLKAM 17

LVDS
AA29 SBA5 TXCLK_LP AJ18 LVDS_CLKAP 17
AGP_SBA6 Y28 AG16
AGP_SBA7 SBA6 TXOUT_U0N LVDS_YB0M 17 ZV_D20
Y29 AF16 R468 2 1 8.2KOhm
SBA7 TXOUT_U0P LVDS_YB0P 17 +V3.3S
TXOUT_U1N AG17 LVDS_YB1M 17
8 AGP_ST0 AF29 ST0 TXOUT_U1P AF17 LVDS_YB1P 17
8 AGP_ST1 AD27
AE28
ST1 TXOUT_U2N AF18
AE18
LVDS_YB2M 17 ZV_LCDDATA[20] = 1 : NO SLAVE VIP HOST
8 AGP_ST2 ST2 TXOUT_U2P LVDS_YB2P 17
TXOUT_U3N AH20
R488 1 2 0Ohm ATI_SBSTB# AB28 AG20
8 AGP_SBSTB# ATI_ADSTB0# SB_STBS TXOUT_U3P
R489 1 2 0Ohm M29 AF19
8 AGP_ADSTB0# ATI_ADSTB1# ADSTBS_0 TXCLK_UN LVDS_CLKBM 17
B R490 1 2 0Ohm V26 AG19 B
8 AGP_ADSTB1# ADSTBS_1 TXCLK_UP LVDS_CLKBP 17

4X
M26 AE12
8 AGP_VREF
+V1.5S 1 2 AGPTEST M27
AGPREF
AGPTEST
DIGON
BLON AG12
LVDS_VDD_EN 17
LVDS_BACK_EN 17 Use GPIO to choose VRAM
1

C650 R452 47Ohm 1% AGP


type

1
AGP_DBI_LO AB26 AJ13
0.1UF AGP_DBI_HI DBI_LO TX0M R491
AB25 DBI_HI 8X TX0P AH14
2

+V3.3S 1 2 AC25 AGP8X_DET# TX1M AJ14


R477 8.2KOhm AH15 8.2KOhm R472 1 2 8.2KOhm / GPIO7
R2SET TX1P +V3.3S
2 1 AK21 R2SET TX2M AJ15
R453 715 Ohm 1%

2
TX2P AK15
AJ23 AH13 GPIO[7] = 0 : Samsung 4M*32 VRAM
TMDS
18 TV_C C_R_Pr TXCM
18 TV_Y AJ22 Y_G_Y TXCP AK13
18 TV_CVBS AK22 COMP_B_Pb
XTALIN 1 2 XTALOUT AE13
DDC2CLK
AJ24 H2SYNC DDC2DATA AE14
X8 27Mhz AK24 R473 1 2 8.2KOhm / GPIO14
V2SYNC DVI_HP +V3.3S
AF12 R458 1 2 100KOhm
CLK SS DAC2

HPD1
1 2 AG23 DDC3CLK
C651 R467 C652
AG24 DDC3DATA R AK27
AJ27
CRT_RED 18 RESERVE GPIO10 FOR OTHER USE
G CRT_GREEN 18
1

12P 1MOhm 12P 1 2 SSC_IN AK25 AJ26


SSIN B CRT_BLUE 18
11-13
R454 8.2KOhm
1 2 SSC_OUT AJ25 AG25
SSOUT HSYNC CRT_HSYNC 18
R455 8.2KOhm /
2

VSYNC AH25 CRT_VSYNC 18


XTALIN AH28 XTALIN RSET R459 1 2 499Ohm
DAC1

RSET AH26
XTALOUT AJ29 XTALOUT
DDC1DATA AF25 CRT_DDC2BD 18
2 1 AH27 TESTEN DDC1CLK AF24 CRT_DDC2BC 18
R456 1KOhm E8
A TEST_YCLK(NC) AUXWIN R460 1 A
B6 TEST_MCLK(NC) AUXWIN AF26 2 8.2KOhm +V3.3S
+V3.3S AE25 PLLTEST(NC)
RN95B 3 SUS_STAT# T238 TPC28t
10KOhm 4 20 SUS_STAT# AG26 SUS_STAT# DPLUS AF11 1
MAN

RN95A 1 PM_C3_STAT# T239 TPC28t


THERM

10KOhm 2 20 PM_C3_STAT# AH30 STP_AGP# DMINUS AE11 1


20,22 AGP_BUSY# AH29 AGP_BUSY#
PWR

RESET_MASK AG29 RSTB_MSK(NC)


2
R457
1
1KOhm
Title : ATI M11-P(AGP,LVDS)
M11_P ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 12 of 54
5 4 3 2 1
5 4 3 2 1

D D

To A CHANNEL VRAM To B CHANNEL VRAM


15 VMA_D[0:63] VMA_A[0:13] 15 16 VMB_D[0:63] VMB_A[0:13] 16
U56B U56C
VMA_D0 L25 E22 VMA_A0 VMB_D0 D7 N5 VMB_A0
VMA_D1 DQA0 Part 2 of 7 MAA0 VMA_A1 VMB_D1 DQB0 Part 3 of 7 MAB0 VMB_A1
L26 DQA1 MAA1 B22 F7 DQB1 MAB1 M1
VMA_D2 K25 B23 VMA_A2 VMB_D2 E7 M3 VMB_A2
VMA_D3 DQA2 MAA2 VMA_A3 VMB_D3 DQB2 MAB2 VMB_A3
K26 DQA3 MAA3 B24 G6 DQB3 MAB3 L3
VMA_D4 J26 C23 VMA_A4 VMB_D4 G5 L2 VMB_A4
VMA_D5 DQA4 MAA4 VMA_A5 VMB_D5 DQB4 MAB4 VMB_A5
H25 DQA5 MAA5 C22 F5 DQB5 MAB5 M2
VMA_D6 H26 F22 VMA_A6 VMB_D6 E5 M5 VMB_A6
VMA_D7 DQA6 MAA6 VMA_A7 VMB_D7 DQB6 MAB6 VMB_A7
G26 DQA7 MAA7 F21 C4 DQB7 MAB7 P6
VMA_D8 G30 C21 VMA_A8 VMB_D8 B5 N3 VMB_A8
VMA_D9 DQA8 MAA8 VMA_A9 VMB_D9 DQB8 MAB8 VMB_A9
D29 DQA9 MAA9 A24 C5 DQB9 MAB9 K2
VMA_D10 D28 C24 VMA_A10 VMB_D10 A4 K3 VMB_A10
VMA_D11 DQA10 MAA10 VMA_A11 VMB_D11 DQB10 MAB10 VMB_A11
E28 DQA11 MAA11 A25 B4 DQB11 MAB11 J2
VMA_D12 E29 E21 VMA_A12 VMB_D12 C2 P5 VMB_A12
VMA_D13 DQA12 (MAA13)MAA12 VMA_A13 VMB_D13 DQB12 (MAB13)MAB12 VMB_A13
G29 DQA13 (MAA12)MAA13 B20 D3 DQB13 (MAB12)MAB13 P3
VMA_D14 G28 C19 VMB_D14 D1 P2
VMA_D15 DQA14 (NC)MAA14 DQM_A[0:7] 15 VMB_D15 DQB14 (NC)MAB14 DQM_B[0:7] 16
F28 DQA15 D2 DQB15
VMA_D16 G25 J25 DQM_A0 VMB_D16 G4 E6 DQM_B0
VMA_D17 DQA16 DQMA#0 DQM_A1 VMB_D17 DQB16 DQMB#0 DQM_B1
F26 DQA17 DQMA#1 F29 H6 DQB17 DQMB#1 B2
VMA_D18 E26 E25 DQM_A2 VMB_D18 H5 J5 DQM_B2
VMA_D19 DQA18 DQMA#2 DQM_A3 VMB_D19 DQB18 DQMB#2 DQM_B3
F25 DQA19 DQMA#3 A27 J6 DQB19 DQMB#3 G3
VMA_D20 E24 F15 DQM_A4 VMB_D20 K5 W6 DQM_B4
DQA20 DQMA#4 DQB20 DQMB#4

MEMORY INTERFACE
VMA_D21 F23 C15 DQM_A5 VMB_D21 K4 W2 DQM_B5
VMA_D22 DQA21 DQMA#5 DQM_A6 VMB_D22 DQB21 DQMB#5 DQM_B6
E23 DQA22 DQMA#6 C11 L6 DQB22 DQMB#6 AC6
VMA_D23 D22 E11 DQM_A7 VMB_D23 L5 AD2 DQM_B7
VMA_D24 DQA23 DQMA#7 DQS_A[0:7] 15 DQB23 DQMB#7 DQS_B[0:7] 16
B29 VMB_D24 G2
VMA_D25 DQA24 DQS_A0 VMB_D25 DQB24 DQS_B0
C
C29 DQA25 QSA0 J27 F3 DQB25 QSB0 F6 C
VMA_D26 C25 F30 DQS_A1 VMB_D26 H2 B3 DQS_B1
VMA_D27 DQA26 QSA1 DQS_A2 VMB_D27 DQB26 QSB1 DQS_B2
C27 DQA27 QSA2 F24 E2 DQB27 QSB2 K6
VMA_D28 B28 B27 DQS_A3 VMB_D28 F2 G1 DQS_B3
DQA28 QSA3 DQB28 QSB3
MEMORY INTERFACE

VMA_D29 B25 E16 DQS_A4 VMB_D29 J3 V5 DQS_B4


VMA_D30 DQA29 QSA4 DQS_A5 VMB_D30 DQB29 QSB4 DQS_B5
C26 DQA30 QSA5 B16 F1 DQB30 QSB5 W1
VMA_D31 B26 B11 DQS_A6 VMB_D31 H3 AC5 DQS_B6
VMA_D32 DQA31 QSA6 DQS_A7 VMB_D32 DQB31 QSB6 DQS_B7
F17 DQA32 QSA7 F10 U6 DQB32 QSB7 AD1
VMA_D33 E17 VMB_D33 U5
VMA_D34 DQA33 VMB_D34 DQB33
D16 DQA34 RASA# A19 RAS_A# 15 U3 DQB34 RASB# R2 RAS_B# 16
VMA_D35 F16 VMB_D35 V6
VMA_D36 DQA35 VMB_D36 DQB35
E15 DQA36 CASA# E18 CAS_A# 15 W5 DQB36 CASB# T5 CAS_B# 16
VMA_D37 VMB_D37

B
F14 DQA37 W4 DQB37
VMA_D38 E14 E19 VMB_D38 Y6 T6
VMA_D39 DQA38 WEA# WE_A# 15 VMB_D39 DQB38 WEB# WE_B# 16
F13 DQA39 Y5 DQB39
VMA_D40 C17 E20 VMB_D40 U2 R5
VMA_D41 DQA40 CSA0# CS_A0# 15 VMB_D41 DQB40 CSB0# CS_B0# 16
B18 DQA41 V2 DQB41
VMA_D42 B17 F20 VMB_D42 V1 R6
VMA_D43 DQA42 CSA1# CS_A1# 15 VMB_D43 DQB42 CSB1# CS_B1# 16
B15 DQA43 V3 DQB43
VMA_D44 C13 B19 VMB_D44 W3 R3
VMA_D45 DQA44 CKEA CKE_A 15 VMB_D45 DQB44 CKEB CKE_B 16
A

B14 DQA45 Y2 DQB45


VMA_D46 C14 VMB_D46 Y3 N1
VMA_D47 DQA46 DQB46 CLKB0 MEMCLKB0 16
C16 B21 VMB_D47 AA2 N2
VMA_D48 DQA47 CLKA0 MEMCLKA0 15 DQB47 CLKB0# MEMCLKB0# 16
A13 C20 VMB_D48 AA6
VMA_D49 DQA48 CLKA0# MEMCLKA0# 15 DQB48
A12 VMB_D49 AA5 T2
VMA_D50 DQA49 DQB49 CLKB1 MEMCLKB1 16
C12 C18 VMB_D50 AB6 T3
VMA_D51 DQA50 CLKA1 MEMCLKA1 15 DQB50 CLKB1# MEMCLKB1# 16
B12 A18 VMB_D51 AB5
VMA_D52 DQA51 CLKA1# MEMCLKA1# 15 DQB51
C10 VMB_D52 AD6
VMA_D53 DQA52 VMB_D53 DQB52
C9 DQA53 AD5 DQB53 DIMB_0 E3
VMA_D54 B9 VMB_D54 AE5 AA3
VMA_D55 DQA54 MEM_VREF_DATA VMB_D55 DQB54 DIMB_1
B10 DQA55 MVREFD B7 AE4 DQB55
B VMA_D56 E13 VMB_D56 AB2 B
VMA_D57 DQA56 MEM_VREF_STROBE VMB_D57 DQB56
E12 DQA57 (NC)MVREFS B8 AB3 DQB57 ROMCS# AF5
VMA_D58 E10 VMB_D58 AC2
VMA_D59 DQA58 VMB_D59 DQB58 MEM_MODE0
F12 DQA59 AC3 DQB59 MEMVMODE_0 C6
VMA_D60 F11 D30 VMB_D60 AD3 C7 MEM_MODE1
VMA_D61 DQA60 DIMA_0 VMB_D61 DQB60 MEMVMODE_1
E9 DQA61 DIMA_1 B13 AE1 DQB61
VMA_D62 F9 VMB_D62 AE2 C8 MEMTEST 1 2
VMA_D63 DQA62 VMB_D63 DQB62 MEMTEST R451 47Ohm 1%
F8 DQA63 AE3 DQB63
M11_P M11_P

+V1.8S

+VDD_VRAM +VDD_VRAM

1
1

R447 R449
R443 R445 8.2KOhm 8.2KOhm
1KOhm 1KOhm /
1% 1%

2
MEM_VREF_DATA MEM_VREF_STROBE MEM_MODE0
2

MEM_MODE1
1

1
1

1
C646 C647 R444 C648 C649 R446
1KOhm 1KOhm R448 R450
0.1UF 10UF/6.3V 1% 0.1UF 10UF/6.3V 1% 8.2KOhm 8.2KOhm
A A
/
2

2
2

2
MEMVMODE[1:0]=01 for VDDR 2.5V
MEMVMODE[1:0]=10 for VDDR 1.8V Title : ATI M11-P(MEMORY IF)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 13 of 54
5 4 3 2 1
5 4 3 2 1

+VDD_VRAM +VGACORE

<MEMORY I/O> <VGA CORE>


U56D U56F
181.7mA T7
8236.3mA P17 M16
VDDR1_1 Part 4 of 7 VDDC_1 Part 6 of 7 VSS_101
R4 VDDR1_2(CLKBFB) P18 VDDC_2 VSS_102 N16
R1 VDDR1_3 P19 VDDC_3 VSS_103 N15

1
C591 C592 C593 C594 C595 N8 C602 C603 C604 C605 C606 C607 C608 C609 C610 C611 U12 P15
10UF/6.3V 10UF/6.3V VDDR1_4 VDDC_4 VSS_104
X5R X5R 0.1UF 0.1UF 0.1UF
N7
M4
VDDR1_5 0.01U 0.01U 0.1UF 0.1UF 10UF/6.3V 10UF/6.3V 0.1UF 0.1UF 0.01U 0.01U
U13
U14
VDDC_5 M10-P VSS_105 P16
R18
VDDR1_6 VDDC_6 VSS_106

2
L27
L8
VDDR1_7 U17
U18
VDDC_7 (708 BGA) VSS_107 R17
R16
VDDR1_8 VDDC_8 VSS_108
D J24 VDDR1_9 VDDC_63 AC13 U19 VDDC_9 VSS_109 R15 D
J23 VDDR1_10 VDDC_64 AD13 V19 VDDC_10 VSS_110 R14
J8 VDDR1_11 VDDC_65 AD15 V18 VDDC_11 M9+X VSS_111 R13
J7 VDDR1_12 VDDC_66 AC15
<CORE to I/O> L80 ATI recommands to V17 VDDC_12 VSS_112 R12
J4
J1
VDDR1_13 VDDC_67 AC17
120Ohm/100MHz have a cleaner Power!
V14
V13
VDDC_13 (708 BGA) VSS_113 T13
T14
VDDR1_14 39.3mA VDDC_14 VSS_114
1

1
C596 C597 C598 C599 C600 C601 H10 P8 1 2 V12 T15
VDDR1_15 (VDDC18)VDD15_1 +V1.5S VDDC_15 VSS_115
0.01U 0.01U 0.01U 1000P 1000P 1000P
H13
H15
VDDR1_16 (VDDC18)VDD15_2 Y8
AC11
N18
N17
VDDC_16 CENTER VSS_116 W15
V16
VDDR1_17 (VDDC18)VDD15_3 VDDC_17 VSS_117

1
C628 C629 C630
2

2
H17
T8
VDDR1_18 (VDDC18)VDD15_4 AC20
Y23
N14
W17
VDDC_18 ARRAY VSS_118 V15
U15
VDDR1_19 (VDDC18)VDD15_5 0.1UF 0.1UF 10UF/6.3V VDDC_19 VSS_119
V4 VDDR1_20 (VDDC18)VDD15_6 L23 W18 VDDC_20 VSS_120 U16

2
V7 VDDR1_21 (VDDC18)VDD15_7 H20 W12 VDDC_21 VSS_121 T19
D59 <GPIO>
SS0540 To solve ATI M10 & M11 V8
AA1
VDDR1_22 (VDDC18)VDD15_8 H11 W13
W14
VDDC_22 VSS_122 T18
T17
1 / 2 LVDS output DPM issue. AA4
VDDR1_23
AD7
2.7mA N13
VDDC_23 VSS_123
T16
+V3.3S VDDR1_24 VDDR3_1 +V3.3S VDDC_24 VSS_124
AA7 VDDR1_25 VDDR3_2 AD19 N19 VDDC_25
<LVDS I/O> AA8 VDDR1_26 VDDR3_3 AD21 M19 VDDC_26

1
L68 A3 AD22 C631 C632 C633 C634 C635 M18
120Ohm/100MHz 122.7mA A9
VDDR1_27 VDDR3_4
AC22 M12
VDDC_27
+VDDR25 VDDR1_28 VDDR3_5 0.01U 0.01U 0.1UF 0.1UF 10UF/6.3V VDDC_28
+V2.5S 1 2 A15 VDDR1_29 VDDR3_6 AC21 N12 VDDC_29

2
A21 VDDR1_30 VDDR3_7 AC19 M13 VDDC_30
1

C612 C613 A28 AC8 M14 W16


10UF/6.3V VDDR1_31 VDDR3_8 VDDC_31 VDDCI_1
B1 VDDR1_32 P12 VDDC_32 VDDCI_2 M15
X5R 0.1UF B30 AG7 P13 R19
VDDR1_33 VDDR4_1 VDDC_33 VDDCI_3
2

D26 VDDR1_34 VDDR4_2 AD9 P14 VDDC_34 VDDCI_4 T12


D23 VDDR1_35 VDDR4_3 AC9 <DVO> M17 VDDC_35
<LVDS Logic> D20 VDDR1_36 VDDR4_4 AC10
2.0mA W19 VDDC_36
D17 AD10
L69 <TMDS I/O> D14
VDDR1_37 VDDR4_5 +V3.3S
M11_P
VDDR1_38
C
120Ohm/100MHz 30.0mA D11 VDDR1_39 VDDP_1 J30 C
1 2 +VDDR18 D8 AF27 <AGP BUS>
+V1.8S VDDR1_40 VDDP_2
D5 AE30 L76 <Isolated CORE Power>
VDDR1_41 VDDP_3 65.3mA
1

C614 C615 E27 AC27 60Ohm/100MHz


VDDR1_42 VDDP_4 +V1.5S
10UF/6.3V F4 AC23 1 2 +VDDCI
X5R 0.1UF VDDR1_43 VDDP_5
G7 VDDR1_44 VDDP_6 AB30

1
C636 C637 C638 C639 C640 C641 C642 C643 C644 C645
2

G10 VDDR1_45 VDDP_7 AA24


G13 VDDR1_46 VDDP_8 AA23
<LVDS PLL> G15 Y27 0.01U 0.01U 0.1UF 0.1UF 10UF/6.3V 10UF/6.3V 10UF/6.3V 0.1UF 0.01U 1000P
VDDR1_47 VDDP_9 X5R

2
G19 W30
L70 <TMDS PLL> G22
VDDR1_48 VDDP_10
V23
VDDR1_49 VDDP_11
120Ohm/100MHz 6.0mA G27 VDDR1_50 VDDP_12 V24
1 2 +LPVDD H22 M23
+V1.8S VDDR1_51 VDDP_13
H19 VDDR1_52 VDDP_14 M24
1

C616 C617 AD4 N30


10UF/6.3V VDDR1_53 VDDP_15
T4 VDDR1_54 VDDP_16 P23
X5R 0.1UF N4 P27
VDDR1_55 VDDP_17
2

D19 VDDR1_56(CLKAFB) VDDP_18 T23


D13 VDDR1_57 VDDP_19 T24 U56G
T30 U56E
VDDP_20 Part 7 of 7
VDDP_21 U27 A2 VSS_1 VSS_51 K8 J10 VDDC_37
L71 <MEMORY CLOCK> A10 Part 5 of 7 K7 J12
120Ohm/100MHz VSS_2 VSS_52 VDDC_38
1 2 +VDDRH AVSSQ AD24 A16
A22
VSS_3 VSS_53 K1
L4
J14
J15
VDDC_39 M9+X
+VDD_VRAM +VDDR25 VSS_4 VSS_54 VDDC_40
AE17 LVDDR_25(LVDDR18_25)_1 LVSSR_1 AF20 A29 VSS_5 VSS_55 M30 J16 VDDC_41 (708
1

C618 C619 AE20 AE19 C1 M8 J17


10UF/6.3V +VDDR18 LVDDR_25(LVDDR18_25)_2 LVSSR_2 VSS_6 VSS_56 VDDC_42
X5R 0.1UF
AE15
AF21
LVDDR_18_1 LVSSR_3 AE16
AF15
C3
C28
VSS_7 VSS_57 M7
N23
J19
J21
VDDC_43 BGA)
LVDDR_18_2 LVSSR_4 VSS_8 VSS_58 VDDC_44
2

+LPVDD AJ20 AJ19


C30
D27
VSS_9 VSS_59 N24
N27
K9
K22
VDDC_45 INNER
LPVDD LPVSS VSS_10 VSS_60 VDDC_46
B <DAC2>
AK12 TPVDD TPVSS AJ12 D24
D21
VSS_11 VSS_61 P4
R7
M9
M22
VDDC_47 ROWS B
L72 +VDDR18 VSS_12 VSS_62 VDDC_48
AF13 AH12 D18 R8 P9 J9
78.7mA TXVDDR_1 TXVSSR_1 VSS_13 VSS_63 VDDC_49 VSS_125
POWER

120Ohm/100MHz AF14 AG13 D15 R23 P22 J11


+A2VDD TXVDDR_2 TXVSSR_2 VSS_14 VSS_64 VDDC_50 VSS_126
+V2.5S 1 2 TXVSSR_3 AG14 D12
D9
VSS_15 CORE GND VSS_65 R24
R30
R9
R22
VDDC_51 VSS_127 J13
J18
VSS_16 VSS_66 VDDC_52 VSS_128
1

C620 C621 D6 T27 T9 J20


10UF/6.3V +VDDRH VSS_17 VSS_67 VDDC_53 VSS_129
I/O

F18 VDDRH0 VSSRH0 F19 D4 VSS_18 VSS_68 T1 T22 VDDC_54 VSS_130 J22
X5R 0.1UF N6 M6 F27 U4 U9 L9
VDDRH1 VSSRH1 VSS_19 VSS_69 VDDC_55 VSS_131
2

G9 VSS_20 VSS_70 U8 U22 VDDC_56 VSS_132 L22


+A2VDD AG21 AH22 G12 U23 V9 N9
A2VDD_1 A2VSSN_1 VSS_21 VSS_71 VDDC_57 VSS_133
AH21 A2VDD_2 A2VSSN_2 AJ21 G16 VSS_22 VSS_72 V30 V22 VDDC_58 VSS_134 N22
<DAC> +AVDD
G18 VSS_23 VSS_73 W7 Y9 VDDC_59 VSS_135 W9
L73 AF22 AF23 G21 W8 Y22 W22
120Ohm/100MHz 73.8mA A2VDDQ A2VSSQ
G24
VSS_24 VSS_74
W23 AB9
VDDC_60 VSS_136
AA9
+AVDD VSS_25 VSS_75 VDDC_61 VSS_137
+V1.8S 1 2 AH24 AVDD AVSSN AH23 H27 VSS_26 VSS_76 W24 AB22 VDDC_62 VSS_138 AA22
H23 VSS_27 VSS_77 W27
1

C622 C623 H21 Y4 M11_P


10UF/6.3V VSS_28 VSS_78
AE24 VDD1DI VSS1DI AE23 H18 VSS_29 VSS_79 AA30
X5R 0.1UF AE22 H16 AB27
VDD2DI VSS_30 VSS_80
2

VSS2DI AE21 H14 VSS_31 VSS_81 AB24


H12 VSS_32 VSS_82 AB23
+PVDD AK28 AJ28 H9 AB8
PVDD PVSS VSS_33 VSS_83
<PLL> +MPVDD
H8 VSS_34 VSS_84 AB7
L74 A7 A6 H4 AB1
120Ohm/100MHz 28.1mA MPVDD MPVSS
K30
VSS_35 VSS_85
AC4
+PVDD VSS_36 VSS_86
+V1.8S 1 2 K27 VSS_37 VSS_87 AC12
M11_P K24 VSS_38 VSS_88 AC14
1

C624 C625 K23 AD16


10UF/6.3V VSS_39 VSS_89
AG15 VSS_40 VSS_90 AC16
X5R 0.1UF AD12 AC18
VSS_41 VSS_91
2

A
AE27 VSS_42 VSS_92 AD30 A
AG5 VSS_43 VSS_93 AD25
AG9 VSS_44 VSS_94 AD18
<MEMORY PLL> AG11 VSS_45 VSS_95 AK2
L75 AG18 AK29
120Ohm/100MHz 5.8mA AG22
VSS_46 VSS_96
AJ30
+MPVDD VSS_47 VSS_97
+V1.8S 1 2 AG27 VSS_48 VSS_98 AJ1
E4 VSS_49 VSS_99 D10
1

C626
10UF/6.3V
C627 AB4 VSS_50 VSS_100 D25 Title : ATI M11-P(PWR)
X5R 0.1UF M11_P Engineer: John Hung
ASUSTek COMPUTER INC. NB1
2

Size Project Name Rev


Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 14 of 54
5 4 3 2 1
5 4 3 2 1

13 VMA_A[13:0]

13 VMA_D[0:63]

U57 U58
D VMA_A12 N4 B8 VMA_D29 VMA_A12 N4 B8 VMA_D39 D
VMA_A13 BA0 DQ31 VMA_D31 VMA_A13 BA0 DQ31 VMA_D37
M5 BA1 DQ30 C9 M5 BA1 DQ30 C9
B9 VMA_D26 B9 VMA_D38
VMA_A11 DQ29 VMA_D30 VMA_A11 DQ29 VMA_D36
13 MEMCLKA0 M7 A11 DQ28 B10 13 MEMCLKA1 M7 A11 DQ28 B10
VMA_A10 L6 C13 VMA_D27 VMA_A10 L6 C13 VMA_D35
VMA_A9 A10 DQ27 VMA_D28 VMA_A9 A10 DQ27 VMA_D34
1 M8 A9 DQ26 D12 M8 A9 DQ26 D12

1
VMA_A8 N11 D13 VMA_D24 VMA_A8 N11 D13 VMA_D32
R427 VMA_A7 A8/AP DQ25 VMA_D25 R429 VMA_A7 A8/AP DQ25 VMA_D33
N10 A7 DQ24 E13 N10 A7 DQ24 E13
56.2Ohm VMA_A6 N9 K3 VMA_D21 56.2Ohm VMA_A6 N9 K3 VMA_D53
1% VMA_A5 A6 DQ23 VMA_D22 1% VMA_A5 A6 DQ23 VMA_D54
M9 A5 DQ22 K2 M9 A5 DQ22 K2
VMA_A4 N8 J2 VMA_D23 VMA_A4 N8 J2 VMA_D55
VMA_A3 A4 DQ21 VMA_D20 VMA_A3 A4 DQ21 VMA_D52
2

2
N7 A3 DQ20 J3 N7 A3 DQ20 J3
VMA_A2 M6 G2 VMA_D19 VMA_A2 M6 G2 VMA_D51
A2 DQ19 A2 DQ19
1

1
C563 VMA_A1 N6 G3 VMA_D18 C564 VMA_A1 N6 G3 VMA_D49
R428 VMA_A0 A1 DQ18 VMA_D17 R430 VMA_A0 A1 DQ18 VMA_D50
N5 A0 DQ17 F2 N5 A0 DQ17 F2
56.2Ohm 0.01U F3 VMA_D16 56.2Ohm 0.01U F3 VMA_D48 SWAP
1% DQ16 VMA_D9 1% DQ16 VMA_D44
2

2
DQ15 F12 DQ15 F12
M11 F13 VMA_D10 M11 F13 VMA_D45
CLK DQ14 VMA_D12 CLK DQ14 VMA_D46
2

2
DQ13 G12 DQ13 G12
M12 G13 VMA_D11 M12 G13 VMA_D43
13 MEMCLKA0# CLK# DQ12 VMA_D8 13 MEMCLKA1# CLK# DQ12 VMA_D47
DQ11 J12 DQ11 J12
N12 J13 VMA_D15 N12 J13 VMA_D42
13 CKE_A CKE DQ10 VMA_D14 13 CKE_A CKE DQ10 VMA_D41
DQ9 K12 DQ9 K12
N2 K13 VMA_D13 N2 K13 VMA_D40
13 CS_A0# CS# DQ8 VMA_D0 13 CS_A0# CS# DQ8 VMA_D63
DQ7 E2 DQ7 E2
M2 D2 VMA_D1 M2 D2 VMA_D62
13 RAS_A# RAS# DQ6 VMA_D2 13 RAS_A# RAS# DQ6 VMA_D61
DQ5 D3 DQ5 D3
L2 C2 VMA_D3 L2 C2 VMA_D58
13 CAS_A# CAS# DQ4 VMA_D5 13 CAS_A# CAS# DQ4 VMA_D60
DQ3 B5 DQ3 B5
L3 B6 VMA_D7 L3 B6 VMA_D59
13 WE_A# WE# DQ2 +VDD_VRAM 13 WE_A# WE# DQ2
C6 VMA_D6 C6 VMA_D57
C DQ1 DQ1 +VDD_VRAM C
B7 VMA_D4 B7 VMA_D56
DQ0 DQ0

13 DQS_A3 B13 DQS3 VDDQ1 C3 13 DQS_A4 B13 DQS3 VDDQ1 C3


VDDQ2 C5 VDDQ2 C5
13 DQS_A2 H2 DQS2 VDDQ3 C7 13 DQS_A6 H2 DQS2 VDDQ3 C7

1
C8 C571 C572 C573 C574 C575 SWAP C8 C576 C577 C578 C579 C580
VDDQ4 VDDQ4
13 DQS_A1 H13 DQS1 VDDQ5 C10 13 DQS_A5 H13 DQS1 VDDQ5 C10
C12 0.1UF 0.1UF 0.1UF 0.1UF 10UF/6.3V C12 0.1UF 0.1UF 0.1UF 0.1UF 10UF/6.3V
VDDQ6 VDDQ6

2
13 DQS_A0 B2 DQS0 VDDQ7 E3 13 DQS_A7 B2 DQS0 VDDQ7 E3
VDDQ8 E12 VDDQ8 E12
VDDQ9 F4 VDDQ9 F4
13 DQM_A3 B12 DM3 VDDQ10 F11 +VDD_VRAM 13 DQM_A4 B12 DM3 VDDQ10 F11
+VDD_VRAM VDDQ11 G4 VDDQ11 G4
13 DQM_A2 H3 DM2 VDDQ12 G11 13 DQM_A6 H3 DM2 VDDQ12 G11
VDDQ13 J4 SWAP VDDQ13 J4

1
13 DQM_A1 H12 DM1 VDDQ14 J11 13 DQM_A5 H12 DM1 VDDQ14 J11
1

K4 R437 K4
R435 VDDQ15 1KOhm VDDQ15
13 DQM_A0 B3 DM0 VDDQ16 K11 13 DQM_A7 B3 DM0 VDDQ16 K11
1KOhm 1%
1% D7 D7
VREF_A1 VDD1 VREF_A2 VDD1

2
N13 VREF VDD2 D8 N13 VREF VDD2 D8
2

VDD3 E4 VDD3 E4

1
M13 MCL VDD4 E11 M13 MCL VDD4 E11
1

L4 R438 L4

1
VDD5 C568 VDD5
1

R436 C567 L9 L7 1KOhm L9 L7


1KOhm RFU1 VDD6 1% RFU1 VDD6
VDD7 L8 0.1UF VDD7 L8
1% 0.1UF M10 L11 M10 L11
RFU2 VDD8 RFU2 VDD8

2
2

2
2

C4 NC1 VSSQ1 B4 C4 NC1 VSSQ1 B4


C11 NC2 VSSQ2 B11 C11 NC2 VSSQ2 B11
B H4 NC3 VSSQ3 D4 H4 NC3 VSSQ3 D4 B
H11 NC4 VSSQ4 D5 H11 NC4 VSSQ4 D5
L12 NC5 VSSQ5 D6 L12 NC5 VSSQ5 D6
L13 NC6 VSSQ6 D9 L13 NC6 VSSQ6 D9
M3 NC7 VSSQ7 D10 M3 NC7 VSSQ7 D10
M4 D11 CS_A1# M4 D11
13 CS_A1# NC8 VSSQ8 NC8 VSSQ8
N3 NC9 VSSQ9 E6 N3 NC9 VSSQ9 E6
VSSQ10 E9 VSSQ10 E9
VSSQ11 F5 VSSQ11 F5
VSSQ12 F10 VSSQ12 F10
VSSQ13 G5 VSSQ13 G5
VSSQ14 G10 VSSQ14 G10
VSSQ15 H5 VSSQ15 H5
F6 VSS TH1 VSSQ16 H10 F6 VSS TH1 VSSQ16 H10
F7 VSS TH2 VSSQ17 J5 F7 VSS TH2 VSSQ17 J5
F8 VSS TH3 VSSQ18 J10 F8 VSS TH3 VSSQ18 J10
F9 VSS TH4 VSSQ19 K5 F9 VSS TH4 VSSQ19 K5
G6 VSS TH5 VSSQ20 K10 G6 VSS TH5 VSSQ20 K10
G7 VSS TH6 G7 VSS TH6
G8 VSS TH7 VSS1 E5 G8 VSS TH7 VSS1 E5
G9 VSS TH8 VSS2 E7 G9 VSS TH8 VSS2 E7
H6 VSS TH9 VSS3 E8 H6 VSS TH9 VSS3 E8
H7 VSS TH10 VSS4 E10 H7 VSS TH10 VSS4 E10
H8 VSS TH11 VSS5 K6 H8 VSS TH11 VSS5 K6
H9 VSS TH12 VSS6 K7 H9 VSS TH12 VSS6 K7
J6 VSS TH13 VSS7 K8 J6 VSS TH13 VSS7 K8
J7 VSS TH14 VSS8 K9 J7 VSS TH14 VSS8 K9
J8 VSS TH15 VSS9 L5 J8 VSS TH15 VSS9 L5
J9 VSS TH16 VSS10 L10 J9 VSS TH16 VSS10 L10

A K4D263238E_GC33 K4D263238E_GC33 A

Title : VRAM(A CHANNEL)


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 15 of 54
5 4 3 2 1
5 4 3 2 1

13 VMB_A[13:0]

13 VMB_D[0:63] B_D[0:63]

U59 U60
D VMB_A12 N4 B8 VMB_D31 VMB_A12 N4 B8 VMB_D38 D
VMB_A13 BA0 DQ31 VMB_D26 VMB_A13 BA0 DQ31 VMB_D39
M5 BA1 DQ30 C9 M5 BA1 DQ30 C9
B9 VMB_D29 B9 VMB_D36
VMB_A11 DQ29 VMB_D30 VMB_A11 DQ29 VMB_D35
13 MEMCLKB0 M7 A11 DQ28 B10 13 MEMCLKB1 M7 A11 DQ28 B10
VMB_A10 L6 C13 VMB_D24 VMB_A10 L6 C13 VMB_D34
VMB_A9 A10 DQ27 VMB_D28 VMB_A9 A10 DQ27 VMB_D37
1 M8 A9 DQ26 D12 M8 A9 DQ26 D12

1
VMB_A8 N11 D13 VMB_D27 VMB_A8 N11 D13 VMB_D33
R431 VMB_A7 A8/AP DQ25 VMB_D25 R433 VMB_A7 A8/AP DQ25 VMB_D32
N10 A7 DQ24 E13 N10 A7 DQ24 E13
56.2Ohm VMB_A6 N9 K3 VMB_D23 56.2Ohm VMB_A6 N9 K3 VMB_D55
1% VMB_A5 A6 DQ23 VMB_D22 1% VMB_A5 A6 DQ23 VMB_D54
M9 A5 DQ22 K2 M9 A5 DQ22 K2
VMB_A4 N8 J2 VMB_D21 VMB_A4 N8 J2 VMB_D53
VMB_A3 A4 DQ21 VMB_D20 VMB_A3 A4 DQ21 VMB_D52
2

2
N7 A3 DQ20 J3 N7 A3 DQ20 J3
VMB_A2 M6 G2 VMB_D19 VMB_A2 M6 G2 VMB_D51
A2 DQ19 A2 DQ19
1

1
C565 VMB_A1 N6 G3 VMB_D18 C566 VMB_A1 N6 G3 VMB_D50
R432 VMB_A0 A1 DQ18 VMB_D17 R434 VMB_A0 A1 DQ18 VMB_D49
N5 A0 DQ17 F2 N5 A0 DQ17 F2
56.2Ohm 0.01U F3 VMB_D16 56.2Ohm 0.01U F3 VMB_D48 SWAP
1% DQ16 VMB_D15 1% DQ16 VMB_D47
2

2
DQ15 F12 DQ15 F12
M11 F13 VMB_D14 M11 F13 VMB_D46
CLK DQ14 VMB_D13 CLK DQ14 VMB_D45
2

2
DQ13 G12 DQ13 G12
M12 G13 VMB_D12 M12 G13 VMB_D44
13 MEMCLKB0# CLK# DQ12 VMB_D11 13 MEMCLKB1# CLK# DQ12 VMB_D43
DQ11 J12 DQ11 J12
N12 J13 VMB_D10 N12 J13 VMB_D42
13 CKE_B CKE DQ10 VMB_D9 13 CKE_B CKE DQ10 VMB_D41
DQ9 K12 DQ9 K12
N2 K13 VMB_D8 N2 K13 VMB_D40
13 CS_B0# CS# DQ8 VMB_D1 13 CS_B0# CS# DQ8 VMB_D63
DQ7 E2 DQ7 E2
M2 D2 VMB_D3 M2 D2 VMB_D62
13 RAS_B# RAS# DQ6 VMB_D4 13 RAS_B# RAS# DQ6 VMB_D60
DQ5 D3 DQ5 D3
L2 C2 VMB_D5 L2 C2 VMB_D61
13 CAS_B# CAS# DQ4 VMB_D6 13 CAS_B# CAS# DQ4 VMB_D56
DQ3 B5 DQ3 B5
L3 B6 VMB_D2 L3 B6 VMB_D58
13 WE_B# WE# DQ2 VMB_D7 13 WE_B# WE# DQ2 VMB_D59
C DQ1 C6 +VDD_VRAM DQ1 C6 +VDD_VRAM C
B7 VMB_D0 B7 VMB_D57
DQ0 DQ0

13 DQS_B3 B13 DQS3 VDDQ1 C3 13 DQS_B4 B13 DQS3 VDDQ1 C3


VDDQ2 C5 VDDQ2 C5
13 DQS_B2 H2 DQS2 VDDQ3 C7 13 DQS_B6 H2 DQS2 VDDQ3 C7

1
C8 C581 C582 C583 C584 C585 SWAP C8 C586 C587 C588 C589 C590
VDDQ4 VDDQ4
13 DQS_B1 H13 DQS1 VDDQ5 C10 13 DQS_B5 H13 DQS1 VDDQ5 C10
C12 0.1UF 0.1UF 0.1UF 0.1UF 10UF/6.3V C12 0.1UF 0.1UF 0.1UF 0.1UF 10UF/6.3V
VDDQ6 VDDQ6

2
13 DQS_B0 B2 DQS0 VDDQ7 E3 13 DQS_B7 B2 DQS0 VDDQ7 E3
VDDQ8 E12 VDDQ8 E12
VDDQ9 F4 VDDQ9 F4
+VDD_VRAM 13 DQM_B3 B12 DM3 VDDQ10 F11 +VDD_VRAM 13 DQM_B4 B12 DM3 VDDQ10 F11
VDDQ11 G4 VDDQ11 G4
13 DQM_B2 H3 DM2 VDDQ12 G11 13 DQM_B6 H3 DM2 VDDQ12 G11
VDDQ13 J4 SWAP VDDQ13 J4
1

1
13 DQM_B1 H12 DM1 VDDQ14 J11 13 DQM_B5 H12 DM1 VDDQ14 J11
R439 K4 R441 K4
1KOhm VDDQ15 1KOhm VDDQ15
13 DQM_B0 B3 DM0 VDDQ16 K11 13 DQM_B7 B3 DM0 VDDQ16 K11
1% 1%
VDD1 D7 VDD1 D7
VREF_B1 VREF_B2
2

2
N13 VREF VDD2 D8 N13 VREF VDD2 D8
VDD3 E4 VDD3 E4
1

1
M13 MCL VDD4 E11 M13 MCL VDD4 E11
1

1
R440 C569 L4 R442 C570 L4
1KOhm VDD5 1KOhm VDD5
L9 RFU1 VDD6 L7 L9 RFU1 VDD6 L7
1% 0.1UF L8 1% 0.1UF L8
VDD7 VDD7
2

2
M10 RFU2 VDD8 L11 M10 RFU2 VDD8 L11
2

2
C4 NC1 VSSQ1 B4 C4 NC1 VSSQ1 B4
C11 NC2 VSSQ2 B11 C11 NC2 VSSQ2 B11
B H4 NC3 VSSQ3 D4 H4 NC3 VSSQ3 D4 B
H11 NC4 VSSQ4 D5 H11 NC4 VSSQ4 D5
L12 NC5 VSSQ5 D6 L12 NC5 VSSQ5 D6
L13 NC6 VSSQ6 D9 L13 NC6 VSSQ6 D9
M3 NC7 VSSQ7 D10 M3 NC7 VSSQ7 D10
M4 D11 CS_B1# M4 D11
13 CS_B1# NC8 VSSQ8 NC8 VSSQ8
N3 NC9 VSSQ9 E6 N3 NC9 VSSQ9 E6
VSSQ10 E9 VSSQ10 E9
VSSQ11 F5 VSSQ11 F5
VSSQ12 F10 VSSQ12 F10
VSSQ13 G5 VSSQ13 G5
VSSQ14 G10 VSSQ14 G10
VSSQ15 H5 VSSQ15 H5
F6 VSS TH1 VSSQ16 H10 F6 VSS TH1 VSSQ16 H10
F7 VSS TH2 VSSQ17 J5 F7 VSS TH2 VSSQ17 J5
F8 VSS TH3 VSSQ18 J10 F8 VSS TH3 VSSQ18 J10
F9 VSS TH4 VSSQ19 K5 F9 VSS TH4 VSSQ19 K5
G6 VSS TH5 VSSQ20 K10 G6 VSS TH5 VSSQ20 K10
G7 VSS TH6 G7 VSS TH6
G8 VSS TH7 VSS1 E5 G8 VSS TH7 VSS1 E5
G9 VSS TH8 VSS2 E7 G9 VSS TH8 VSS2 E7
H6 VSS TH9 VSS3 E8 H6 VSS TH9 VSS3 E8
H7 VSS TH10 VSS4 E10 H7 VSS TH10 VSS4 E10
H8 VSS TH11 VSS5 K6 H8 VSS TH11 VSS5 K6
H9 VSS TH12 VSS6 K7 H9 VSS TH12 VSS6 K7
J6 VSS TH13 VSS7 K8 J6 VSS TH13 VSS7 K8
J7 VSS TH14 VSS8 K9 J7 VSS TH14 VSS8 K9
J8 VSS TH15 VSS9 L5 J8 VSS TH15 VSS9 L5
J9 VSS TH16 VSS10 L10 J9 VSS TH16 VSS10 L10

A K4D263238E_GC33 K4D263238E_GC33 A

Title : VRAM(B CHANNEL)


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 16 of 54
5 4 3 2 1
A B C D E

+V5 +V5 +V5_USB5


L50 C12
BIOS 80Ohm/100MHz 0.1U
BACK_OFF#: When user +V3.3S AC_BAT_SYS +V3.3A 2 1 1 2 /USB

1
+
pushs "Fn+F7" button, CE29
20 USB_PN5
USB_P5- /USB

1
BIOS activate this pin to R217 L30 L35 100UF/6.3V

3
turn off back light. D26 /USB

2
1 RB751V_40 10KOhm 80Ohm/100MHz 80Ohm/100MHz L51 1

11-10
90Ohm/100MHz

2
20 BACK_OFF# 2 1
/USB

2
12 LVDS_BACK_EN 1
3 USB_P5+
20 USB_PP5
42 LID_SW# 2

1
C516 C517

1
D27 L34
RB717F 0.1U 0.1U
120Ohm/100MHz CON1 /USB_EMI /USB_EMI

2
BIOS AC_INV 2 1 1 T240 TPC28t
2 1
BACK_ADJ: KBC

2
4 4 3 3 +V5_USB5
L31 120Ohm/100MHz 6 5
output D/A signal 1 2 8
6 5
7
8 7
(adjust voltage level) 10 9

to adjust Back light. L33


12
14
10
12
9
11 11
13 USB_P5-
USB PORT 5 for USB CAMERA
14 13 USB_P5+
31 BACK_ADJ 1 2 16 16 15 15
18 18 17 17
120Ohm/100MHz L29 120Ohm/100MHz
1 2 INTMIC_A_GND_CON
20
22
20 19 19
21
Pin 19 : Add a USB 2.0
SIDE2 SIDE1
37 INTMIC_A 1 2 INTMIC_A_CON Shielding GND cable to
2 L1 120Ohm/100MHz WTOB_CON_20P USB module. 2
1

1
C1 C291 C293 C290 C295 C292 C294

0.001uF/50V 1UF/10V 0.1uF/10V A6G doesn't support


USB WLAN function!
2

2
0.001uF/50V 0.001uF/50V 0.1uF/10V 0.001uF/50V

A6G uses D1 R:1.0


Inverter Board
GND_MIC

3
LCD Power 3
31

CON2
SIDE1

LVDS_ACLKP 1 2 LVDS_CLKBP R11


12 LVDS_CLKAP LVDS_ACLKN 1 2 LVDS_CLKBM LVDS_CLKBP 12
12 LVDS_CLKAM 3 3 4 4 LVDS_CLKBM 12 2 1 1 2
5 5 6 6
LVDS_YA2P 7 8 LVDS_YB2P D2 100Ohm
12 LVDS_YA2P LVDS_YA2N 7 8 LVDS_YB2M LVDS_YB2P 12
9 10 1N4148W-A2
12 LVDS_YA2M 9 10 LVDS_YB2M 12
11 11 12 12
LVDS_YA1P 13 14 LVDS_YB1P
12 LVDS_YA1P LVDS_YA1N 13 14 LVDS_YB1M LVDS_YB1P 12
12 LVDS_YA1M 15 15 16 16 LVDS_YB1M 12
17 17 18 18
LVDS_YA0P 19 20 LVDS_YB0P
12 LVDS_YA0P LVDS_YA0N 19 20 LVDS_YB0M LVDS_YB0P 12
12 LVDS_YA0M 21 21 22 22 LVDS_YB0M 12
23 24 +V3.3S +V12S +V3.3S
+V3.3S_LCD ID0 23 24 ID1 +V3.3S_LCD
25 25 26 26
ID2 27 28 ID3 +V3.3S_LCD_C
27 28

2
SIDE2

29 29 30 30 3-3.6V
R219 R12 SI3456DV
S0-S1M:410 mA
1

4 C296 Q52 4
WTOB_2X15P 10KOhm 1MOhm 1 6 T199 (500 mA Max.)
32

0.1UF/25V 2 D 5 TPC28t
S 4 +V3.3S_LCD
2

1
3
G
L2

1
6
Q53A 1 2
UM6K1N
2 80Ohm/100MHz

1
PID_0 20

1
C302 C10 C298 C2 C7
PID_1 20

3
Q53B
UM6K1N 47pF/50V 0.1uF/10V 0.1uF/10V 1UF/10V 10uF/10V
+V3.3S

2
LCD CABLE ID: PID3 PID2 PID1 PID0 12 LVDS_VDD_EN 5
ID0 RN6A

4
1 10KOhm 2

2
ID1 3 RN6B
15.1 XGA 1 1 0 1 10KOhm 4
ID2 5 RN6C R218
ID3 10KOhm 6
RN6D 47KOhm
15.1 SXGA+ 1 0 1 1 7 10KOhm 8
15.4 WXGA 1 1 1 0
1

5
15.4 WSXGA+ 0 1 1 1 PID_2 20 5
PID_3 20

Title : LVDS & BACKLIGHT


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 17 of 54
A B C D E
A B C D E

Guarded by GND (Space>= 20mils)


Place Pi-Filter close to CRT CRT TV-OUT
(<= 200 mils)
Length Matching (+/- 100 mils)
L8
70Ohm/100Mhz
CRT_Q_RED 1 2 CRT_L_RED
D5 12 CRT_RED
1 37.5 ohm 75 ohm 75 ohm CON18 1
2 6PX2
+V3.3S

9
3 CON9

1
1 C20 C309 D_SUB_15P CVBS_CON 2

HC2
RN4A CVBS1
1 RED VCC 9 7 CVBS2
BAV99 15PF/50V 15PF/50V
75Ohm Y_CON

2
4 Y
C_CON 6 C

2
5 NC
1

HC1
GND0
3 GND1
L7
70Ohm/100Mhz

8
CRT_Q_GREEN 1 2 CRT_L_GREEN 2 4
D4 12 CRT_GREEN GREEN NC1 12-141011072
37.5 ohm 75 ohm 75 ohm NC2 11
+V3.3S 2
3

1
1 C19 C308
RN4C
2 BAV99 15PF/50V 15PF/50V 2
75Ohm

2
6
3 BLUE
Place Pi-Filter close to CRT
L6
70Ohm/100Mhz (<= 200 mils)
CRT_Q_BLUE 1 2 CRT_L_BLUE
D3 12 CRT_BLUE
37.5 ohm 75 ohm 75 ohm L77
2 70Ohm/100Mhz
+V3.3S

1
3 C17 1 2 CVBS_CON
12 TV_CVBS

1
1 C307 37.5 ohm 75 ohm 75 ohm
RN4D 15PF/50V

1
BAV99 15PF/50V C653 C654

3
75Ohm D56 82P 82P

2
2 RN92B
+V3.3S
15 75Ohm

2
8 13 HSYNC 3
1
3 +V12S 3
BAV99

4
CRT
+V3.3SUS PIN
1

Q3A R14
RN3A UM6K1N 39Ohm
1 6 CRT_Q_HSYNC 1 2 CRT_L_HSYNC
12 CRT_HSYNC
100KOHM L78
3

70Ohm/100Mhz

1
RN3B C305 14 1 1 2 Y_CON
VSYNC 12 TV_Y
37.5 ohm 75 ohm 75 ohm
2

100KOHM 33PF/50V

1
C655 C656

5
D57 82P 82P
6

RN92C
4

+V3.3S 2

2
3
5

2 R13 1 75Ohm
Q4A 39Ohm
UM6K1N CRT_Q_VSYNC CRT_L_VSYNC BAV99
1

12 CRT_VSYNC 4 3 1 2
3

6
Q3B

1
5 UM6K1N C304
12,19,24,25,26,31,32 BUF_PCI_RST#
4 Q4B 4
UM6K1N 33PF/50V
4

12 DATA L79
2

70Ohm/100Mhz
RN5A 16 1 2 C_CON
SIDE_G16 12 TV_C
2.2KOhm 17 37.5 ohm 75 ohm 75 ohm
SIDE_G17
+V5S 1 2

1
C657 C658

1
Q89A L5 D58 82P 82P
UM6K1N 75Ohm/100MHz 2 RN92A
+V3.3S
6 CRT_Q_DDC2BD CRT_L_DDC2BD

2
12 CRT_DDC2BD 1 1 2 3
1 75Ohm
1

C306 BAV99
5P
2

2
GND5
GND4
GND3
GND2
GND1
2

15 DCLK 10
8
7
6
5
5

11-17
L4 8 7
75Ohm/100MHz
3 4 12 CRT_DDC2BC 4 3 CRT_Q_DDC2BC 1 2 CRT_L_DDC2BC RN92D
5 75Ohm 5
1

RN4B Q89B
75Ohm UM6K1N C303
RN5B 5P
2.2KOhm Title : CRT & TV-OUT
2

+V5S 3 4
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 18 of 54
A B C D E
5 4 3 2 1

Strap Option +V1.5S_ICH

Default: Pull-Down

1
Pull-High for Hub Interface
R310
1.5 Buffer Mode 48.7Ohm

2
D D
HUB_RCOMP_ICH4
LxWxH=31x31x2.38
24,25,26,27 PCI_AD[31:0] U20A
PCI_AD0 HUB_PD0 HUB_PD[10:0] 7 R-ICH4 <= 0.5"
Use Daisy-Chain Topology H5 AD0 HI0 L19 <=6"
PCI_AD1 J3 L20 HUB_PD1 <=6"
PCI_AD2 AD1 HI1 HUB_PD2
H3 AD2 HI2 M19 <=6"
PCI_AD3 K1 M21 HUB_PD3 <=6"
PCI_AD4 AD3 HI3 HUB_PD4
G5 AD4 HI4 P19 <=6"
PCI_AD5 J4 R19 HUB_PD5 <=6"
PCI_AD6 AD5 HI5 HUB_PD6 +V1.5S_ICH
H4 AD6 HI6 T20 <=6"
PCI_AD7 HUB_PD7 <=6"
CB&1394 PCI_REQ#0 PCI_AD8
J5
K2
AD7 HI7 R20
P23 HUB_PD8 <=6"
AD8 HI8

1
PCI_AD9 G2 L22 HUB_PD9 <=6"
PCI_AD10 AD9 HI9 HUB_PD10 R314 56Ohm
MINIPCI PCI_REQ#1 L1 AD10 HI10 N22 <=6" Caution:
PCI_AD11 G4 K21 HUB_PD11 1 2 R132
AD11 HI11
PCI_AD12
PCI_AD13
L2 AD12 The VREF of HUB 0.8V +/- 2% 130Ohm
LAN PCI_REQ#2 PCI_AD14
H2 AD13 HI_STB#/HI_STBF N20 HUB_PSTRB# 7 interface is 0.35V HUB_VSWING_ICH4

2
L3 AD14 HI_STB/HI_STBS P21 HUB_PSTRB 7
PCI_AD15 HUB_RCOMP_ICH4 <=3"
F5 AD15 HICOMP R23 The VSWING of HUB

1
PCI_AD16 F4 R22 HUB_VSWING_ICH4
AD16 HI_VSWING

1
PCI_AD17
PCI_AD18
N1 AD17 interace is 0.8V C436 C439 R133
CB&1394 PCI_AD21 PCI_AD19
E5
N2
AD18 EE_CS D10
D11 But in Intel CRB, their 0.01UF/10V 0.1uF/10V 150Ohm
PCI_AD20 AD19 EE_DIN

2
E3 A8
PCI_AD21 AD20 EE_DOUT naming convention will

2
MINIPCI PCI_AD20 N3 AD21 EE_SHCLK C12
PCI_AD22
PCI_AD23
E4 AD22 make people confused.
M5 AD23 LAD0/FWH0 T2 LPC_AD0 25,31,32
PCI_AD24
LAN PCI_AD16 PCI_AD25
E2
P1
AD24 LAD1/FWH1 R4
T4
LPC_AD1 25,31,32
PCI_AD26 AD25 LAD2/FWH2 LPC_AD2 25,31,32
C
E1 AD26 LAD3/FWH3 U2 LPC_AD3 25,31,32 C
PCI_AD27 P2 T5
PCI_AD28 AD27 LFRAME#/FWH4 LPC_FRAME# 25,31,32
D3 AD28 LDRQ1# U4 1
PCI_AD29 R1 U3 T48 TPC28t
PCI_AD30 AD29 LDRQ0#
D2 AD30 LPC_DRQ#0 32
PCI_AD31 P4 AD31

24,25,26 PCI_C/BE#0 J2 C/BE0#


24,25,26 PCI_C/BE#1 K4 C/BE1#
24,25,26 PCI_C/BE#2 M4 C/BE2# DEVSEL# M3 PCI_DEVSEL# 22,24,25,26
24,25,26 PCI_C/BE#3 N4 C/BE3# FRAME# F1 PCI_FRAME# 22,24,25,26
IRDY# L5 PCI_IRDY# 22,24,25,26
22,26 PCI_REQ#0 B1 REQ0# TRDY# F2 PCI_TRDY# 22,24,25,26
+V3.3S A2 F3
22,25 PCI_REQ#1 REQ1# STOP# PCI_STOP# 22,24,25,26
22,24 PCI_REQ#2 B3 REQ2# PAR G1 PCI_PAR 24,25,26
22 PCI_REQ#3 C7 REQ3# PERR# L4 PCI_PERR# 22,24,25,26
22 PCI_REQ#4 B6 REQ4#
RN28A 1 2 A6
10KOhm REQB#/REQ5#/GPIO1
RN28B 3
10KOhm 4 B5 REQA#/GPIO0 SERR# K5
PME_SB# PCI_SERR# 22,24,25,26
PME# W2
26 PCI_GNT#0 C1 GNT0# PLOCK# M2 PCI_LOCK# 22
25 PCI_GNT#1 E6 GNT1# PCIRST# U5 PCI_RST# 8,29,34
24 PCI_GNT#2 A7 GNT2# PCICLK P5 4"-8.5" _CLK_ICHPCI 23
1 B7 GNT3# CLKRUN#/GPIO24 AC2 PM_CLKRUN# 25,26,31
T43 TPC28t 1 D6 GNT4#

1
T49 TPC28t 1 C5 C455
T46 TPC28t GNTB#/GNT5#GPIO17 5P
1 E8 GNTA#/GPIO16
T150 TPC28t /

2
FW82801DBM

B Strap Option B

ICH4-M pin E8
Default: Pull-High 20K +V3.3
Pull-Down for BIOS TOP-BLOCK SWAP
5 RN30C
10KOhm 6 +V3.3

1
RN30A
+V3.3S
10KOhm

3
RN30B
+V3.3

2
7

10KOhm
RN30D

10KOhm pull up to VccSus3_3 by

1 B
1

Q36 internal pull-up resistor


C178 PMBS3904
0.1uF/10V PME_SB#
8

25,26,32 PCI_PME#

C
U17

2
E

3
2

PCI_RST# 1 A 5
VCC
2 B 24 PME_SB#

A
3 GND 4 BUF_PCI_RST# 12,18,24,25,26,31,32 A
Y
NC7SZ08P5X

Meet LPC reset >= 60 us


(Add Buffer)
Title : ICH4-M(HUB_PCI)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 19 of 54
5 4 3 2 1
5 4 3 2 1

+V3.3S_ICH +V3.3SUS_ICH
29 IDE_PDD[15:0] IDE_SDD[15:0] 30
USB SIGNALS U20B

RN31A

RN31B
RN31D
| USB+ - USB- |<= 50 mils IDE_PDD0 AB11 W17 IDE_SDD0
PDD0 SDD0
Pair Width/Space: 5.5/5 mils (L1/L6) IDE_PDD1 AC11 PDD1 SDD1 AB17 IDE_SDD1
IDE_PDD2 Y10 W16 IDE_SDD2
4.5/5 mils (L3/L4) PDD2 SDD2

4
Primary IDE I/F: IDE_PDD3 AA10 AC16 IDE_SDD3 Secondary IDE I/F:
PDD3 SDD3

10KOhm

10KOhm

10KOhm
Impedence: 90 ohm(differential) IDE_PDD4 AA7 W15 IDE_SDD4
W/S: 5.5/11 mils (L1/L6) IDE_PDD5 AB8
PDD4 SDD4
AB15 IDE_SDD5 W/S: 5.5/11 mils (L1/L6)
Other Signals Space: >= 20 mils 4.5/9 mils (L3/L4) IDE_PDD6 Y8
PDD5 SDD5
W14 IDE_SDD6 4.5/9 mils (L3/L4)
PDD6 SDD6
Clock Signals Sapce:>= 50 mils Length<= 8"
IDE_PDD7 AA8 PDD7 SDD7 AA14 IDE_SDD7
Length<= 8"
D IDE_PDD8 AB9 Y14 IDE_SDD8 D
U20C PDD8 SDD8
Match: <= 500 mils IDE_PDD9 IDE_SDD9 Match: <= 500 mils

3
Y9 PDD9 SDD9 AC15
D20 R3 IDE_PDD10 AC9 AA15 IDE_SDD10
39 USB_PN0 USBP0N GPIO7 PDD10 SDD10
C20 V4 IDE_PDD11 W9 Y15 IDE_SDD11
39 USB_PP0 USBP0P GPIO8 EXTSMI#_3A 31 PDD11 SDD11
B21 V5 IDE_PDD12 AB10 AB16 IDE_SDD12
39 USB_PN1 USBP1N GPIO12 KBDSCI_3A 31 PDD12 SDD12
A21 W3 IDE_PDD13 W10 Y16 IDE_SDD13
39 USB_PP1 USBP1P GPIO13 CB_SD# SIO_SMI# 32 PDD13 SDD13
D18 V2 IDE_PDD14 W11 AA17 IDE_SDD14
39 USB_PN2 USBP2N GPIO25 CB_SD# 26 PDD14 SDD14
C18 W1 IDE_PDD15 Y11 Y17 IDE_SDD15
39 USB_PP2 USBP2P GPIO27 WLAN_ON# 25 PDD15 SDD15
39 USB_PN3 B19 USBP3N GPIO28 W4 802_LED_EN# 41
39 USB_PP3 A19 USBP3P GPIO32 J20 BACK_OFF# 17 29 IDE_PDA0 AA13 PDA0 SDA0 AA20 IDE_SDA0 30
D16 G22 PID_0_ICH4 AB13 AC20
USBP4N GPIO33 PID_1_ICH4 29 IDE_PDA1 PDA1 SDA1 IDE_SDA1 30
C16 USBP4P GPIO34 F20 29 IDE_PDA2 W13 PDA2 SDA2 AC21 IDE_SDA2 30
B17 G20 CG_FS0
17 USB_PN5 USBP5N GPIO35 CG_FS1 CG_FS0 23
USBRBIAS: 17 USB_PP5 A17 USBP5P GPIO36 F21
CG_FS2 CG_FS1 23 29 IDE_PDCS1# Y13 PDCS1# SDCS1# AB21 IDE_SDCS1# 30
H20 AB14 AC22
W/S: 5/5 mils 1 2 USBRBIAS A23
GPIO37
F23 CG_FS5 CG_FS2 23 29 IDE_PDCS3# PDCS3# SDCS3# IDE_SDCS3# 30
USBRBIAS GPIO38 CG_FS5 23
Length: <= 0.5" R138 22.6Ohm B23 USBRBIAS# GPIO39 H22 CG_FS6
CG_FS6 23 29 IDE_PIORDY AB12 PIORDY SIORDY AC19 IDE_SIORDY 30
G23 PID_2_ICH4 W12 AA18
GPIO40 PID_3_ICH4 29 IDE_PDIOW# PDIOW# SDIOW# IDE_SDIOW# 30
39 USB_OC#01 B15 OC0# GPIO41 H21 29 IDE_PDIOR# AC12 PDIOR# SDIOR# Y18 IDE_SDIOR# 30
C14 OC1# GPIO42 F22 CPUFAN_SPD_A 40 29 IDE_PDDACK# Y12 PDDACK# SDDACK# AB19 IDE_SDDACK# 30
39 USB_OC#23 A15 OC2# GPIO43 E23 FWH_WP# 32 29 IDE_PDDREQ AA11 PDDREQ SDDREQ AB18 IDE_SDDREQ 30
B14 OC3#
22 USB_OC#4 A14 OC4# A20GATE Y22 HA20GATE 31 C11 LAN_CLK AC_RST# C13 AC97_RST# 35,38
D14 AB23 A10 C9 AC97_SYNC
22 USB_OC#5 OC5# A20M# H_A20M# 3 LAN_RXD0 AC_SYNC
CPUPWRGD Y23 H_PWRGD 3 A9 LAN_RXD1 AC_BIT_CLK B8 AC97_BCLK_ICH4 35
AC97_SDOUT
12,22 AGP_BUSY# R2
T3
AGPBUSY#/GPIO6 CPUSLP# U21
U23
H_CPUSLP# 3 A11
B10
LAN_RXD2 AC_SDOUT D9
D13
CODEC AC97_SDIN0
12 PM_C3_STAT# C3_STAT#/GPIO21 DPSLP# H_DPSLP# 3,8 LAN_TXD0 AC_SDIN0 AC97_SDIN0 35
1 Y20 CPUPERF#/GPIO22 FERR# AA21 1 2 H_FERR# 3 C10 LAN_TXD1 AC_SDIN1 A13 AC97_SDIN1 38
T138TPC28t W21 R139 56Ohm
43 PM_DPRSLPVR V20
Y5
DPRSLPVR IGNNE#
V22
H_IGNNE# 3 A12
B11
LAN_TXD2 AC_SDIN2 B13 MDC AC97_SDIN1
LAN_RST# INIT# H_INIT# 3,32 LAN_RSTSYNC
C 42 PM_PWRBTN# AA1 PWRBTN# INTR AB22 H_INTR 3 INTRUDER# W6 SM_INTRUDER# 22 C
42,43 ICH4_PWROK AB6 PWROK NMI V21 H_NMI 3 22,25,26,31,32 INT_SERIRQ J22 SERIRQ SMLINK0 AC3 SM_LINK0 22
26 PM_RI# Y1 RI# SMI# W23 H_SMI# 3 12,22,27 PCI_INTA# D5 PIRQA# SMLINK1 AB1 SM_LINK1 22
5

42 PM_RSMRST# AA6 RSMRST# STPCLK# V23 H_STPCLK# 3 22,27 PCI_INTB# C2 PIRQB#


RN31C SLP_S1# W18 U22 B4 T21
SLP_S1#/GPIO19 RCIN# KBDCPURST 31 22,24,25 PCI_INTC# PIRQC# CLK66 _CLK_ICH66 23
24,26,42,47 PM_SLP_S3# Y4 SLP_S3# 22,25,27 PCI_INTD# A3 PIRQD# CLK48 F19 _CLK_ICH48 23
10KOhm Y2 C8 J23
40,42,47 PM_SLP_S4# SLP_S4# 22 ICH4_GPI2 PIRQE#/GPIO2 CLK14 _CLK_ICH14 23
T166TPC28t 1 AA2 D7
SLP_S5# 22 ICH4_GPI3 PIRQF#/GPIO3 RTC_RST#
23 PM_STPPCI# Y21 STP_PCI#/GPIO18 GPIO[32:43] default: 22 ICH4_GPI4 C3 PIRQG#/GPIO4 RTCRST# W7

1
C191 C186 C184
6

23,43 PM_STPCPU# W19 STP_CPU#/GPIO20 22 ICH4_GPI5 C4 PIRQH#/GPIO5


J21 SSMUXSEL/GPIO23 Output High 22,29 INT_IRQ14 AC13 IRQ14
5P 5P 5P
Measure AA4 AA19 H23 / / /
8 PM_SUSCLK SUSCLK ICH4 EDS R:1.0 page 22,30 INT_IRQ15 IRQ15 SPKR ICH4_SPKR 35

2
12 SUS_STAT# AB3 J19
duty-cycle SUS_STAT#/LPCPD# RN68A APICCLK
22 PM_SYSRST# Y3 SYS_RESET# 10-94 10.10.8, 10.10.9 1 10KOhm 2
RN68B
H19 APICD0 BATLOW#/TP[0] AB2 PM_BATLOW# 22
of SUSCLK 5,40 PM_THRM# V1 THRM# 3 10KOhm 4 K20 APICD1
1 2 <=3" W20 AA5
(Pin AA4) 3 H_THRMTRIP_S#
R313 56Ohm V19
THRMTRIP# RTC_X2 AC6
SMBALERT#/GPIO11
AC4
LID_ICH4#_3A 42
42 PM_VGATE VGATE/VRMPWRGD RTC_X1 RTCX2 SMBCLK SCL_3A 22
must be in AC7 RTCX1 SMBDATA AB4 SDA_3A 22
30-70% FW82801DBM

1
FW82801DBM C694 C695
150PF/50V 150PF/50V
/ /

2
G3: 5 uA T200 +V3.3A +V_RTC
RTC T201 TPC28t RC time delay AC97 SDIN
TPC28t RTC_BAT D18 should be 10-20 ms AMC Outer Layer: 5.5 mils
CIRCUITRY 1
2 RTC_RST#
ICH4 R2
AC97 W/S= 1:1
1

3 1
ICH4-R2: 0.9"- 13.6"
INTEL REQUEST +V3.3
1

1 2 2
R156
B R383 RB715F 180KOhm AC97-R2: 0.1"-0.4" B
1

1KOhm AC97_SDIN0

1
BAT1 C212 C213 AC97_SDIN1
1UF/10V 0.1uF/10V U38 C472
BATT PM_SLP_S3# 1 A 0.1uF/10V
2

VCC 5
2

2
SLP_S1# 2 B

RTC_RST#, RTC_VBIAS,
AC97 SDOUT & SYNC 3 GND
Y
4 PM_SLP_S1# 23,40
1 2 RTC_VBIAS T type routing, place R at branch point. NC7SZ08P5X
RTC_X1, RTC_X2 RTC_VBIAS 21
Width= 5.5 mils C225 Outer Layer: 5.5 mils
1

0.047UF/10V ICH4 T R2 AMC


Length<=1" W/S= 1:1
Need GND Guard R170 R1 ICH4-(T): 1"- 8"
10MOhm

RTC_X1 AC97
R1-(T): 0.1"- 0.4"
AC97-R1: <=5.6"
Strap Option
2

2 1

C216 Vpeak-peak of RTC_X1 < 1V


R2-(T): 0.1"- 0.4"
18P AMC-R2: 0.9"-5.6" +V3.3S_ICH Default: Pull-Down 20K
X2 Pull-High for Not
1 AC97_SYNC R143 1 2 33Ohm
1 AC97_SYNC_MDC 38 Supported
1

A2.1 PCB uses 3 SIDE


2 R141 1 2 33Ohm
PM_DPRSLPVR 43
2 AC97_SYNC_CODEC 35
"xtal_3p_319x108" footprint, R166
32.768KHZ 10MOhm
but the SMT recommended AC97_SDOUT R144 1 2 33Ohm AC97_SDOUT_MDC 38
1st source part uses
2

2 1 RTC_X2 1 to 8 R142 1 2 33Ohm


Default: Pull-Down 20K
AC97_SDOUT_CODEC 35
A
"xtal_3p_335x110" footprint. inches
+V3.3S_ICH Pull-High for CPU A

C220 0.1 to 0.4 0.9 to 5.6


18P SAFE_MODE
AC97_SDOUT
inches inches

PID_0_ICH4
PID_1_ICH4
3
1
2.2KOhm4
RN89B
RN89A
PID_0 17 Title : ICH4-M(H_U_IDE_PM)
PID_2_ICH4 2.2KOhm2 PID_1 17
5 RN89C Engineer: John Hung
PID_3_ICH4 2.2KOhm6 PID_2 17 ASUSTek COMPUTER INC. NB1
7 RN89D
2.2KOhm8 PID_3 17
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 20 of 54
5 4 3 2 1
5 4 3 2 1

D D
U20E +V3.3S +V3.3S_ICH +V3.3SUS_ICH +V3.3SUS
3.135V - 3.465V(+/- 5%) U20D 3.135V - 3.465V(+/- 5%)
A1 G21
A16
VSS_1 VSS_52
G3
S0-S1M:0.42A A5 E11
S0-S5: 14 mA
VSS_2 VSS_53 VCC3_3_1 VCCSUS3_3_1
A18 VSS_3 VSS_54 G6 AC17 VCC3_3_2 VCCSUS3_3_2 F10
A20 VSS_4 VSS_55 H1 AC8 VCC3_3_3 VCCSUS3_3_3 F15

1
A22 J6 C246 C459 C198 B2 F16 C454 C446
VSS_5 VSS_56 VCC3_3_4 VCCSUS3_3_4
A4 VSS_6 VSS_57 K11 H18 VCC3_3_5 VCCSUS3_3_5 F17
AA12 K13 0.1uF/10V 0.1uF/10V 0.1uF/10V H6 F18 0.1uF/10V 0.1uF/10V
VSS_7 VSS_58 VCC3_3_6 VCCSUS3_3_6

2
AA16 VSS_8 VSS_59 K19 J1 VCC3_3_7 VCCSUS3_3_7 K14
AA22 VSS_9 VSS_60 K23 J18 VCC3_3_8 VCCSUS3_3_8 V7
AA3 VSS_10 VSS_61 K3 K6 VCC3_3_9 VCCSUS3_3_9 V8
AA9 VSS_11 VSS_62 L10 M10 VCC3_3_10 VCCSUS3_3_10 V9
AB20 VSS_12 VSS_63 L11 P12 VCC3_3_11
AB7 VSS_13 VSS_64 L12 P6 VCC3_3_12 VCCSUS1_5_1 E12
AC1 L13 U1 E13 +V1.5SUS_ICH 1.425V - 1.575V(+/- 5%) +V1.5SUS
VSS_14 VSS_65 VCC3_3_13 VCCSUS1_5_2
AC10 L14 V10 E20
AC14
VSS_15 VSS_66
L21 V16
VCC3_3_14 VCCSUS1_5_3
F14
S0-S1M: 64 mA
VSS_16 VSS_67 +V1.5S +V1.5S_ICH VCC3_3_15 VCCSUS1_5_4
AC18 VSS_17 VSS_68 M1 1.425V - 1.575V(+/- 5%) V18 VCC3_3_16 VCCSUS1_5_5 G18

1
AC23 M11 R6 C458 C447
AC5
VSS_18 VSS_69
M12
S0-S1M: 0.5A K10
VCCSUS1_5_6
T6
VSS_19 VSS_70 VCC1_5_1 VCCSUS1_5_7 +V5REF_SUS_ICH 0.1uF/10V 0.1uF/10V
B12 VSS_20 VSS_71 M13 K12 VCC1_5_2 VCCSUS1_5_8 U6

2
B16 VSS_21 VSS_72 M20 K18 VCC1_5_3

1
B18 M22 C443 C452 K22 E15 +V_RTC +V_RTC
VSS_22 VSS_73 VCC1_5_4 V5REF_SUS
B20 VSS_23 VSS_74 N10 P10 VCC1_5_5
B22 N11 0.1uF/10V 0.1uF/10V T18 AB5 +V1.5S_ICHPLL +V1.5S
VSS_24 VSS_75 VCC1_5_6 VCCRTC

2
B9 VSS_25 VSS_76 N12 U19 VCC1_5_7

1
C15 N13 V14 C22 C222
VSS_26 VSS_77 VCC1_5_8 VCCPLL
C17 VSS_27 VSS_78 N14

1
C19 N19 L23 Y6 RTC_VBIAS C451 0.1uF/10V
VSS_28 VSS_79 +V1.5S_ICH VCCHI_1 VBIAS RTC_VBIAS 20
1.425V - 1.575V(+/- 5%) +V1.5_ICHHUB C190

2
C
C21 VSS_29 VSS_80 N21 M14 VCCHI_2 C
C23 N23 P18 M23 HUB_VREF_ICH4 0.01UF/10V 0.1uF/10V
VSS_30 VSS_81 S0-S1M:0.5A VCCHI_3 HIREF +VCCP

2
C6 VSS_31 VSS_82 N5 T22 VCCHI_4
D1 VSS_32 VSS_83 P11 V_CPU_IO_2 U18 1.0V - 1.1V(+/- 5%)
D12 P13 E7 P14
VSS_33 VSS_84 V5REF_1 V_CPU_IO_1 S0-S1M: 2.5 A(CPU,MCH,ICH)

1
D15 P20 C189 C187 T202 V6 AA23
VSS_34 VSS_85 TPC28t V5REF_2 V_CPU_IO_0
D17 VSS_35 VSS_86 P22
0.1uF/10V 0.1uF/10V
D19 VSS_36 VSS_87 P3 V5REF VCCLAN1_5/VCCSUS1_5_1 F6 +V1.5S

1
2

2
D21 VSS_37 VSS_88 R18 VCCLAN1_5/VCCSUS1_5_2 F7
+V3.3S_ICH SEQUENCE +V5REF_ICH C440 C442

1
D23 VSS_38 VSS_89 R21 VCCLAN3_3/VCCSUS3_3_1 E9
D4 R5 (200mA max.) F9 0.1uF/10V 1UF/10V
VSS_39 VSS_90 VCCLAN3_3/VCCSUS3_3_2 +V3.3S

2
D8 VSS_40 VSS_91 T1 1 2
D22 VSS_41 VSS_92 T19
E10 T23 D19 FW82801DBM
VSS_42 VSS_93

1
E14 U20 1N4148W-A2 C460
VSS_43 VSS_94 +V1.5S
E16 VSS_44 VSS_95 V15
E17 V17 +V5S 0.1uF/10V 3.135V - 3.465V(+/- 5%) 1.425V - 1.575V(+/- 5%)
VSS_45 VSS_96

2
E18 V3
E19
VSS_46 VSS_97
W22 1 2
S0-S1M:12mA S0-S1M:30mA
VSS_47 VSS_98
E21 VSS_48 VSS_99 W5
E22 W8 R159
VSS_49 VSS_100

1
F8 Y19 1KOhm
VSS_50 VSS_101 C453 C445 C457 C441
G19 VSS_51 VSS_102 Y7
0.1uF/10V 0.1uF/10V 0.1uF/10V 0.01UF/10V

2
FW82801DBM

B B

+V3.3SUS_ICH +V5SUS
+V1.5S_ICH

1
V5REFSUS D16
R131 SEQUENCE T203 R145
0.343V- 0.357V(Typ. 0.35V) 487Ohm TPC28t 1N4148W-A2 1KOhm
+V5REF_SUS_ICH
HUB_VREF_ICH4

2
1
1
+V5REF_SUS_ICH
1

C438 C437 R134


Caution:

1
0.1uF/10V 0.1uF/10V 150Ohm
The VREF of HUB C199
2

0.1uF/10V
2

interface is 0.35V

2
The VSWING of HUB
interace is 0.8V
But in Intel CRB, their
naming convention will
make people confused.

A A

Title : ICH4-M(PWR)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 21 of 54
5 4 3 2 1
5 4 3 2 1

+V3.3S_ICH +V3.3SUS_ICH
USB
19,24,25,26 PCI_FRAME# 1
RP4A
8.2KOhm5
Over-Current
2
RP4B
10
Pull-Up
19,24,25,26 PCI_IRDY# 8.2KOhm5
10
RP4C +V3.3S_ICH +V3.3SUS_ICH
19,24,25,26 PCI_TRDY# 3 8.2KOhm5
D 10 D
RP4D
4 RN26D
19,24,25,26 PCI_STOP# 8.2KOhm5 20 USB_OC#4 7 10KOhm 8

1
10
RP4E RN29C RN29A
6 RN26B +V5S
19,24,25,26 PCI_SERR# 8.2KOhm5 20 USB_OC#5 3 10KOhm 4
10 1KOhm 1KOhm
RP4F
19,24,25,26 PCI_DEVSEL# 7 8.2KOhm5

2
R183

2
10 SCL_3A 20
RP4G 1 2
20 PM_SYSRST#
19 PCI_LOCK# 8 8.2KOhm5 5,10,23 SCL_3S 1 6
10
RP4H 100KOhm
SM_LINK0 20
9 Q32A
19,24,25,26 PCI_PERR# 8.2KOhm5
10 UM6K1N
+V3.3S_ICH +V3.3SUS_ICH

ICH4 SMLink & SMbus

3
RN29D RN29B must be tied together
+V5S
1KOhm 1KOhm

5
8

4
SM_LINK1 20
+V3.3S
5,10,23 SDA_3S 4 3
RP3A
C C
1 Q32B
20,29 INT_IRQ14 8.2KOhm5 SDA_3A 20
10 UM6K1N
RP3B
2 +V_RTC
20,30 INT_IRQ15 8.2KOhm5
10
RP3C
19,26 PCI_REQ#0 3 8.2KOhm5

1
10
RP3D R172
19,25 PCI_REQ#1 4 8.2KOhm5
10 100KOhm
RP3E

2
19,24 PCI_REQ#2 6 8.2KOhm5
10
RP3F
20 SM_INTRUDER#
19 PCI_REQ#3 7 8.2KOhm5
10
RP3G
19 PCI_REQ#4 8 8.2KOhm5
10
RP3H
20,25,26,31,32 INT_SERIRQ 9 8.2KOhm5
10

B B
+V3.3SUS_ICH

RP2A BATTERY

6
1 8.2KOhm5
20 ICH4_GPI4
RP2C
10 LOW RN26C

3 10KOhm
20 ICH4_GPI3 8.2KOhm5
10
RP2B
+V3.3S

5
20 ICH4_GPI5 2 8.2KOhm5
10
RP2D
20 ICH4_GPI2 4 8.2KOhm5
10 20 PM_BATLOW#

2
RP2E
6 RN26A
20,25,27 PCI_INTD# 8.2KOhm5
10
RP2F 10KOhm
12,20,27 PCI_INTA# 7 8.2KOhm5
10
RP2G
1

20,24,25 PCI_INTC# 8 8.2KOhm5


10 12,20 AGP_BUSY#
RP2H
20,27 PCI_INTB# 9 8.2KOhm5
10
A A

Title : ICH4-M(PULLUP)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 22 of 54
5 4 3 2 1
5 4 3 2 1

+V1.8S +V1.8S_VCCA CLK_EN# is OD


for MAX1987 1
X6
2
1 2 2 1 CLK_X1 CLK_X2 1 2
43 CLK_EN# <=0.5" <=0.5"
R403 0Ohm C96 14.318Mhz C93
33PF/50V 30ppm/20PF 33PF/50V
+V3.3S_CLK L20 +V3.3S
+V3.3S_CLK +V3.3S_CLK 120Ohm/100MHz

3
+V3.3S R274 U5 2 1
1 2 18 1 I2C address: D2H

X1

X2
Vtt_PWRGD# VDDREF
D 8 D
VDDPCI1 3.3V+/-5%

1
10KOhm 14
VDDPCI2
1

40 23 S1M: 40 mA C514 C515 C385 C384 C383 C381 C92


R402 VID5 VDD3V66 0.01UF/10V 0.01UF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 10uF/10V
FS4 FS3 FUNCTION 39 VID4 VDDCPU1 50
S0: 360 mA
10KOhm

2
38 46
/ 0 0 100MHz 37
VID3 VDDCPU2
+V1.8S_VCCA VID2
0 1 133MHz (D) 36 VID1
2

35
1 0 200MHz VID0 +V3.3S_CLKA
FREQ_SEL 4,8 1 1 166MHz +V3.3S_CLK48 L19 +V3.3S_CLK +V3.3S_CLKA L21 +V3.3S
20 120Ohm/100MHz 120Ohm/100MHz
VDDA
1 2 5 FS3/PCICLK_F0 2 1 2 1

1
R401 +V3.3S_CLK48
1KOhm R368 C76 C72 C107 C111
1

/ 34 0.1uF/10V 1UF/10V 0.1uF/10V 1UF/10V


1KOhm VDD48

2
U54

11-20
SWITCH_4P R79

2
/ 33.2Ohm
1 2 CLK_ICHPCI 6
19 _CLK_ICHPCI FS4/PCICLK_F1
4"-8.5" <=0.5"

1
CLK_MCH_BCLK <=0.2" 2"- 8"
4

CPUCLKT2 45 1 2 _CLK_MCH_BCLK 7
C389 <=0.5" R59 33.2Ohm HOST_CLK GROUP
10P <=0.5"
For 852GMV: / In L4 or L6

2
+V1.8S 1 2
Load R401, R402, U54 R265 49.9Ohm Pair W/S: 5/12 mils (L4)
7 ASEL/PCICLK_F2 6/11 mils (L6)
For 855GM/ 855GME/ 44 CLK_MCH_BCLK# 1 2 <=0.2" 2"- 8" Group Space:>= 20 mils
CPUCLKC2 _CLK_MCH_BCLK# 7
C 1(H): FSB Freq=133MHz 852GM/ 852GME: <=0.5" R60 33.2Ohm
Length Match: +/- 10 mils C

& VCCA[0]=1.5V Load R403, R368 R80 11-21 <=0.5"


1 2
33.2Ohm R266 49.9Ohm
4(L): FSB Freq=100MHz 32 _CLK_SIOPCI 1 2 CLK_SIOPCI 10 49 CLK_CPU_BCLK 1 2 <=0.2" 2"- 8" _CLK_CPU_BCLK 3
MULTSEL0/PCICLK0 CPUCLKT1 R57 33.2Ohm
& VCCA[0]=1.8V 4"-8.5" <=0.5" <=0.5"
1

<=0.5"
C390
10P
1
R51
2
49.9Ohm CLK_CPU_BCLK/#
2: Dothan(533) CPU / R81 must be low in C3
2

3: Celeron/Banias 33.2Ohm
1 2 CLK_MINIPCI 11 48 CLK_CPU_BCLK# 1 2 <=0.2" 2"- 8"
/Dothan(400) CPU 25 _CLK_MINIPCI
4"-8.5" <=0.5"
MODE/PCICLK1 CPUCLKC1
<=0.5" R58 33.2Ohm
_CLK_CPU_BCLK# 3
1

<=0.5"
C391
U54 switch to 1: pin1 & 4 open CPUCLKT0/(FS6) 52 CG_FS6 20 1 2
11-21
10P R52 49.9Ohm
U54 switch to 4: pin1 & 4 short / R82
2

CPUCLKC0/(FS5) 51 CG_FS5 20
33.2Ohm
1 2 CLK_CBPCI 12
26 _CLK_CBPCI PCICLK2
4"-8.5" <=0.5"
1

C392
CLK33 GROUP: 10P

11-20
/ R83
2

In L4 or L6 33.2Ohm
W/S: 5.5/16.5 mils (L4) 1 2 CLK_KBCPCI 13
31 _CLK_KBCPCI PCICLK3 CLK_ICH14
4"-8.5" <=0.5" 56 1 2 4"-8.5"
4.5/13.5 mils (L6) REF0 _CLK_ICH14 20
1

1
<=0.5" R68 33.2Ohm
Group Space >= 20 mils C393 C88
10P 10P
Length Match: same as CLK66 / R84 /
2

2
B 33.2Ohm B
1 2 CLK_FWHPCI 16
32 _CLK_FWHPCI PCICLK4 CLK_ICH48
4"-8.5" <=0.5" 48MHz_1 31 1 2 3"-12" _CLK_ICH48 20
1

1
<=0.5" R63 33.2Ohm
C394 C371
10P 10P
/ R85 /
2

2
33.2Ohm
1 2 CLK_LANPCI 17 32 CLK_SIO_48M 1 2 3"-12"
24 _CLK_LANPCI PCICLK5 48MHz_0 _CLK_SIO_48M 32

1
4"-8.5" <=0.5" <=0.5" R62 33.2Ohm
1

30 C370
SDATA SDA_3S 5,10,22
C395 28 10P
SCLK SCL_3S 5,10,22
10P /

2
CPU_STOP# 53 PM_STPCPU# 20,43
/ R86
2

PCI_STOP# 22 PM_STPPCI# 20
33.2Ohm 19
CLK_ICH66 PD# PM_SLP_S1# 20,40
20 _CLK_ICH66 1 2 25 3V66_0 IREF 43 1 2
4"-8.5" <=0.5" R61
1

+V3.3S_CLK 475Ohm
C396
1

CLK66 GROUP: 10P


/ R263
2

In L4 or L6 R87 10KOhm R264 /


W/S: 5.5/16.5 mils (L4) 33.2Ohm 1KOhm
1 2 CLK_MCH66 26 41 1 2
4.5/13.5 mils (L6) 8 _CLK_MCH66
4"-8.5" <=0.5"
3V66_1 FS2 CG_FS2 20
12

FS1 55 CG_FS1 20
1

Group Space >= 20 mils FS1 FS0 FUNCTION


C397
Length Match: +/- 100 mils 10P R55 0 0 66 MHz
/ R476 CLK_AGP66 10KOhm 0 1 100MHz
2

27 3V66_2
33.2Ohm <=0.5"
1 0 200MHz
2

A 12 _CLK_AGP66 1 2 A
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1

4"-8.5" 1 1 133MHz
29 3V66_3/48MHz_2 FS0 54 CG_FS0 20
1

C660
47
42
33
24
21
15

10P ICS950815 R56


9
4

/ 10KOhm
2

Title : CLOCK-ICS950815
2

11-12 Engineer: John Hung


ASUSTek COMPUTER INC. NB1
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 23 of 54
5 4 3 2 1
5 4 3 2 1

PCI_AD[31:0] 19,25,26,27
19,25,26 PCI_C/BE#0

PCI_C/BE#1 19,25,26
PCI_PAR 19,25,26
PCI_SERR# 19,22,25,26

PCI_AD10
PCI_AD11
PCI_AD12

PCI_AD13
PCI_AD14

PCI_AD15
+V3.3SUS

PCI_AD2

PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6

PCI_AD7

PCI_AD8
PCI_AD9
PCI_PERR# 19,22,25,26
+V3.3SUS_LAN PCI_STOP# 19,22,25,26
PCI_DEVSEL# 19,22,25,26
1

X5
XTAL1 XTAL2 PCI_TRDY# 19,22,25,26
D R70 1 4 D
+V3.3SUS_LAN X1 GND2
3.6KOhm 2 3
U34 GND1 x2

1
EECS C84 25MHZ C82
2

1 CS VCC 8
EESK 2 7
SK DC

102
101
100
EEDI/AUX 27P 27P U3

99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
3 DI ORG 6
EEDO C382 RTL8100CL

2
4 DO GND 5
0.1uF/10V

AD2
GND12
GND11

AD3
AD4
AD5
AD6

AD7

AD8
AD9
VDD25_3

VDD33_5

CBEB0
GND10

CBEB1
NC18
AD10
AD11
AD12
VDD33_4
AD13
AD14
GND9
GND8
AD15
VDD25_2

SERRB

STOPB

GND7
PAR

NC17
NC16
NC15
VDD33_3
PERRB

DEVSELB
TRDYB

CLKRUNB
PCI_AD1

2
AT93C46 103 64
PCI_AD0 AD1 NC14
104 AD0 IRDYB 63 PCI_IRDY# 19,22,25,26
105 LANWAKE NC13 62
EECS 106 61
EECS FRAMEB PCI_FRAME# 19,22,25,26
107 VDD33_6 CBEB2 60 PCI_C/BE#2 19,25,26
EEDO 108 59 PCI_AD16
EEDI/AUX EEDO AD16 PCI_AD17
109 AUX/EEDI AD17 58
110 57 PCI_AD18
EESK NC19 AD18
111 EESK VDD33_2 56
112 55 PCI_AD19
NC20 AD19
113 NC21 VDD25_1 54
114 53 PCI_AD20
LED2 AD20
115 LED1 GND6 52
116 NC22 GND5 51
117 50 PCI_AD21
LED0 AD21 PCI_AD22
118 NC23 AD22 49
119 GND13 NC12 48
120 47 PCI_AD23
NC24 AD23 LAN_IDSEL
XTAL1 121 XTAL1 IDSEL 46 2 1 PCI_AD16
XTAL2 122 45 R69 33Ohm
XTAL2 NC11
All termination resistors 123 GND14 CBEB3 44 PCI_C/BE#3 19,25,26
124 43 PCI_AD24
C
C367 0.01UF/10V should be near chip 125
GND15 AD24
42 PCI_AD25 C
R54 NC25 AD25
2 1 2 1 L_TDP 38 126 NC26 VDD33_1 41

AVDD33_0

AVDD33_1

AVDD33_2
1 LAN_RSET

ISOLATEB
R257 2 1 49.9Ohm 2 127 40 PCI_AD26

PCIRSTB
VDD33_0

VDD25_0
L_TDN 38 RSET AD26

AVDD25
CTRL25
C366 0.01UF/10V R256 49.9Ohm PCI_AD27

PCICLK
128 GND16 AD27 39

INTAB

REQB
PMEB
GND0

GND1

GND2

GND3

GND4
GNTB
5.9KOhm

NC10

AD31
AD30

AD29
AD28
2 1 2 1 L_RDP 38

NC0
NC1
NC2

NC3
NC4
NC5
NC6

NC7
NC8

NC9
RX+
TX+

RX-
TX-
R255 2 1 49.9Ohm 1%
L_RDN 38
R254 49.9Ohm

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
1
2
3
4
5
6
7
8
9
AVDD25 DVDD
+V3.3SUS_LAN
AVDDL

PCI_AD31
PCI_AD30

PCI_AD29
PCI_AD28
1
L_TDP C361
L_TDN
+V3.3SUS_LAN L18 AVDDL L_RDP 0.1uF/10V
120Ohm/100Mhz 20 mil L_RDN

2
1 2 CTRL25

ISOLATEB
20,26,42,47 PM_SLP_S3#
1

C66 C365
20,22,25 PCI_INTC# PME_SB# 19
0.1uF/10V 0.1uF/10V
12,18,19,25,26,31,32 BUF_PCI_RST# PCI_REQ#2 19,22
2

23 _CLK_LANPCI PCI_GNT#2 19

1
C62
10P
B B

2
CTRL25

DVDD +V3.3SUS +V3.3SUS_LAN


+V3.3SUS_LAN TP13
Q10 TPC28t 30 mil 30 mil
1 B

HM772
20 mil
1

C97

1
3
E

C
2

C101 C94 C80 C108 C64


0.1uF/10V
1

C55 C65 C91 C386 C61 10uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
2

2
10uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V 0.1uF/10V
2

A A

Title : LAN-RTL8100CL
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 24 of 54
5 4 3 2 1
5 4 3 2 1

19,24,26,27 PCI_AD[31:0]

D D

+V3.3S_MPCI +V3.3S

125
126
+V3.3S_MPCI CON17 +V3.3S_MPCI

1
C487 C485 C469
1 2

SIDE1
SIDE2
TIP RING 0.1uF/10V 0.1uF/10V 0.1uF/10V
3 LAN_RESERV1 LAN_RESERV2 4

2
19,31,32 LPC_AD0 5 LAN_RESERV3 LAN_RESERV5 6
19,31,32 LPC_AD2 7 LAN_RESERV4 LAN_RESERV7 8 LPC_AD1 19,31,32
41 802_LINKLED 9 LAN_RESERV6 LAN_RESERV10 10 LPC_AD3 19,31,32
11 LAN_RESERV8 LAN_RESERV12 12 802_ACTLED 41
MPCI_WLAN_ON/OFF# 13 14
LAN_RESERV9 LAN_RESERV13
15 LAN_RESERV11 LAN_RESERV14 16 LPC_FRAME# 19,31,32
20,22,27 PCI_INTD# 17 INTB# 5V_1 18 +V5S_MPCI
19 3.3V_7 INTA# 20 PCI_INTC# 20,22,24
21 RESERVED9 RESERVED3 22 DIS_SYSBIOS 32
23 GROUND15 3.3VAUX1 24 +V3.3_MPCI
4"-6" 25 26 +V5S_MPCI +V5S
23 _CLK_MINIPCI CLK RST# BUF_PCI_RST# 12,18,19,24,26,31,32
27 GROUND4 3.3V_3 28
1

C262 29 30
19,22 PCI_REQ#1 REQ# GNT# PCI_GNT#1 19
10P 31 32
/ PCI_AD31 3.3V_4 GROUND7
33 AD[31] PME# 34 PCI_PME# 19,26,32
PCI_AD29
2

35 AD[29] RESERVED6 36

1
37 38 PCI_AD30 C486
C PCI_AD27 GROUND8 AD[30] C
39 AD[27] 3.3V_5 40
PCI_AD25 41 42 PCI_AD28 0.1uF/10V
AD[25] AD[28] PCI_AD26

2
43 RESERVED8 AD[26] 44
45 46 PCI_AD24
19,24,26 PCI_C/BE#3 PCI_AD23 C/BE[3]# AD[24] PCI_AD20
47 AD[23] IDSEL 48 2 1
49 50 R332 100Ohm
PCI_AD21 GROUND11 GROUND9 PCI_AD22
51 AD[21] AD[22] 52
PCI_AD19 53 54 PCI_AD20
AD[19] AD[20]
55 GROUND13 PAR 56 PCI_PAR 19,24,26
PCI_AD17 57 58 PCI_AD18
AD[17] AD[18] PCI_AD16 +V3.3_MPCI +V3.3
19,24,26 PCI_C/BE#2 59 C/BE[2]# AD[16] 60
19,22,24,26 PCI_IRDY# 61 IRDY# GROUND10 62 Intel Calexico(802.11a+802.11b)
63 64 PCI_FRAME# 19,22,24,26
65
3.3V_8 FRAME#
66 802.11b 802.11a
19,26,31 PM_CLKRUN# CLKRUN# TRDY# PCI_TRDY# 19,22,24,26
19,22,24,26 PCI_SERR# 67 SERR# STOP# 68 PCI_STOP# 19,22,24,26 Tx: 500-526 mA Tx: 435-475 mA
69 70
GROUND14 3.3V_6 Rx: 280-299 mA Rx:310-327 mA

1
71 72 C470
19,22,24,26 PCI_PERR# PERR# DEVSEL# PCI_DEVSEL# 19,22,24,26
19,24,26 PCI_C/BE#1 73 C/BE[1]# GROUND12 74 Sleep: 30 mA Sleep: 30 mA
PCI_AD14 75 76 PCI_AD15 0.1uF/10V
AD[14] AD[15] PCI_AD13

2
77 GROUND16 AD[13] 78
PCI_AD12 79 80 PCI_AD11
PCI_AD10 AD[12] AD[11]
81 AD[10] GROUND1 82
83 84 PCI_AD9
PCI_AD8 GROUND2 AD[09]
85 AD[08] C/BE[0]# 86 PCI_C/BE#0 19,24,26
PCI_AD7 87 88
AD[07] 3.3V_1 PCI_AD6
89 3.3V_2 AD[06] 90
PCI_AD5 91 92 PCI_AD4 +V3.3SUS_ICH +V3.3_MPCI
AD[05] AD[04] PCI_AD2
93 RESERVED4 AD[02] 94
PCI_AD3 95 96 PCI_AD0
AD[03] AD[00]
+V5S_MPCI 97 5V_2 RESERVED1 98
B PCI_AD1 99 100 B
AD[01] RESERVED2 INT_SERIRQ 20,22,26,31,32

3
101 GROUND6 GROUND3 102
103 104 RN86A RN86B
AC_SYNC M66EN 10KOhm 10KOhm
105 AC_SDATA_IN AC_SDATA_OUT 106
107 AC_BIT_CLK AC_CODEC_ID0# 108
109 AC_CODEC_ID1# AC_RESET# 110
111 MOD_AUDIO_MON RESERVED5 112

4
113 AUDIO_GND2 GROUND5 114
115 S_AUDIO_OUT S_AUDIO_IN 116
117 S_AUDIO_OGND S_AUDIO_I GND 118
119 120 MPCI_WLAN_ON/OFF#
127 POST1
128 POST2

AUDIO_GND1 AUDIO_GND
121 RESERVED7 MCPIACT# 122
123 VCC5A 3.3VAUX2 124 +V3.3_MPCI

3
3
D
MINI_PCI Q88
20 WLAN_ON# 11 2N7002
G
2 S

2
A A

Title : MINIPCI
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 25 of 54
5 4 3 2 1
5 4 3 2 1

+V1.8

1
C463
C237
0.1uF/10V 10uF/10V

2
D D
35 SPKRCB
+V3.3S

1
R171

1
100KOhm U37B C450
N1 H8 C226
27 MCVCC3EN# MCVCC3EN#VCC_CORE18V_1
P2 M8 0.1uF/10V 10uF/10V
CB_RI#_OC SPKROUT VCC_CORE18V_2

2
P1 RI_OUT# VCC_CORE18V_3 H12
CB_SUSPEND# R4 M12
HWSPND# VCC_CORE18V_4
19,25,32 PCI_PME# R1 PME# VCC_PCI3V_1 P8
CB_GBRST# T2 P9
GBRST# VCC_PCI3V_2 +V3.3
19,25,31 PM_CLKRUN# W4 CLKRUN# VCC_PCI3V_3 P10
12,18,19,24,25,31,32 BUF_PCI_RST# R5 PCIRST# VCC_PCI3V_4 P11
23 _CLK_CBPCI 4"-8.5" T5 PCICLK VCC_3V_1 J6
19 PCI_GNT#0 V5 GNT# VCC_3V_2 J14

1
C202 W5 K6 C233 C232 C464
19,22 PCI_REQ#0 CB_IDSEL REQ# VCC_3V_3
W7 IDSEL VCC_3V_4 K14
5P T10 F10 0.1uF/10V 0.1uF/10V 10uF/10V
19,22,24,25 PCI_FRAME# FRAME# VCC_3V_5
/
2

2
19,22,24,25 PCI_IRDY# V10 IRDY# VCC_3V_6 P12
19,22,24,25 PCI_TRDY# W10 TRDY# AVCC_PHY3V_1 A8
19,22,24,25 PCI_DEVSEL# R11 DEVSEL# AVCC_PHY3V_2 B8
19,22,24,25 PCI_STOP# T11 STOP# AVCC_PHY3V_3 A15
19,22,24,25 PCI_PERR# V11 PERR# AVCC_PHY3V_4 B15
W11 A9 L47
19,22,24,25 PCI_SERR# SERR# AGND1
R323 R12 B9 +V3.3_1394 75Ohm/100MHz +V3.3
CB_IDSEL 19,24,25 PCI_PAR PAR AGND2
1 2 V7 D9 Irat=200mA
19,24,25,27 PCI_AD21 19,24,25 PCI_C/BE#3 C/BE3# AGND3
19,24,25 PCI_C/BE#2 R10 C/BE2# AGND4 E9 1 2
C 100Ohm T12 E10 C
19,24,25 PCI_C/BE#1 C/BE1# AGND5

1
T14 D11 C247 C476 C477
19,24,25 PCI_C/BE#0 C/BE0# AGND6
AGND7 E11
J8 E12 0.01UF/10V 0.1uF/10V 10uF/10V
GND1 AGND8

2
K8 GND2 AGND9 D13
+V3.3 L8 E13
GND3 AGND10
H9 GND4 AGND11 E14
J9 GND5 AGND12 E15 Based on Ricoh's suggestion,
1

K9 D16
R153 L9
GND6 AGND13
E16
remove CB_AGND and connect
GND7 AGND14
D17 M9 GND8 AGND15 A17 all AGND to generic GND. PCB_VID[2:0]=000 for R:1.0
1N4148W-A2 10KOhm H10 B17
GND9 AGND16
20 CB_SD# 2 1 J10 GND10 RSVD1 R2
+V3.3
2

K10 GND11 RSVD2 G14


CB_SUSPEND# L10 H14
GND12 RSVD3
M10 GND13 RSVD4 M14
20,24,42,47 PM_SLP_S3# 2 1 H11 GND14 RSVD5 H15
J11 GND15 RSVD6 J15

1
D39 K11 F16
GND16 RSVD7

R5S593
1N4148W-A2 L11 G16 R317 R319 R316
/ GND17 RSVD8 10KOhm 10KOhm 10KOhm
M11 GND18 RSVD9 M16
J12 N16 / / /
GND19 RSVD10
K12 GND20 RSVD11 T16
+V3.3

2
L12 GND21 RSVD12 H18
F15 N18 PCB_VID2
GND22 RSVD13 PCB_VID1
B18 GND23 RSVD14 U18
C18 B19 PCB_VID0
GND24 RSVD15
1

D18 GND25 RSVD16 C19

1
R318 E18 D19
B GND26 RSVD17 B
F18 E19 R321 R322 R320
100KOhm GND27 RSVD18 10KOhm 10KOhm 10KOhm
H19 GND28 RSVD19 F19
M19 GND29 RSVD20 G19
2

N2 NC1 RSVD21 J19


CB_GBRST#

2
P4 NC2 RSVD22 N19
P5 NC3 RSVD23 P19
GND D8 NC4
1

E8 T1 PCB_VID0
C449 NC5 IRQ3 PCB_VID1
F8 NC6 IRQ4 U2
0.1uF/10V F9 U1 PCB_VID2
NC7 IRQ5
2

F11 NC8 IRQ7 V1


F12 NC9 IRQ9/SRIRQ# V2 INT_SERIRQ 20,22,25,31,32
F13 W2 1 T42 TPC28t
NC10 IRQ10 T160 TPC28t
F14 NC11 IRQ11 V3 1
N15 W3 1394_SCL
NC12 IRQ12 1394_SDA
A18 NC13 IRQ14 T4
U19 V4 1 T159 TPC28t
NC14 IRQ15 +V3.3
H16 NC15
28 AVPPEN1 M1 VPPEN1 VCC5EN# N4 AVCC5EN# 28
+V3.3SUS_ICH +V3.3 N6 N5 1394_SCL 1 RN69A
28 AVPPEN0 VPPEN0 VCC3EN# AVCC3EN# 28 10KOhm2
1394_SDA 3 RN69B
10KOhm4
R5C593
5

RN69C RN69D
+V5
10KOhm 10KOhm +V3.3
A A
11
6

U36
G

3 2 CB_RI#_OC 1 8 C444
3

S 2

20 PM_RI# A0 VCC 0.1uF/10V


D

2 A1 WP 7
Q60 1394_SCL Title : CB1394-R5C593(1)
2

3 A2 SCL 6
2N7002 4 5 1394_SDA
GND SDA
AT24C02N ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 26 of 54
5 4 3 2 1
5 4 3 2 1

U37A
28 AD19/A25 G1 CADR25 IORD# B2 AD13/IORD# 28
28 AD17/A24 G4 CADR24 IOWR# C2 AD15/IOWR# 28
28 CFRAME#/A23 G6 CADR23 OE# A3 AD11/OE# 28
28 CTRDY#/A22 F2 CADR22 WE# E2 CGNT#/WE# 28
28 CDEVSEL#/A21 F5 CADR21 CE2# A4 AD10/CE2# 28
E1 B5 TPA0+_1
28 CSTOP#/A20 CADR20 CE1# CBE0#/CE1# 28
28 CBLOCK#/A19 E4 CADR19 REG# K5 CBE3#/REG# 28
D1 H2 TPA0-_1
28 RFU/A18 CADR18 RESET CRST#/RESET 28
28 AD16/A17 D4 CADR17 WAIT# J5 CSERR#/WAIT# 28
R_CCLK/A16_D3 F4 M4
28 CCLK/A16_D3 CADR16 WP/BIOIS16# CLKRUN#/IOIS16# 28

1
D F1 F6 D
28 CIRDY#/A15 CADR15 RDY/IREQ# CINT#/IREQ# 28
E5 K2 R334 R335
28 CPERR#/A14 CADR14 BVD2 CAUDIO/SPKR_IN#/BVD2 28
28 CPAR/A13 D2 CADR13 BVD1 L6 CSTSCHG/STSCHG#/BVD1 28
G5 H5 56Ohm 56Ohm
28 CBE2#/A12 CADR12 VS2# CVS2 28
28 AD12/A11 A2 CADR11 VS1# B3 CVS1 28

2
28 AD9/A10 B4 CADR10 CD2# M2 CCD2# 28
+V3.3 B1 F7 TPBIAS0
28 AD14/A9 CADR9 CD1# CCD1# 28
28 CBE1#/A8 C1 CADR8 INPACK# J2 CREQ#/INPACK# 28
1 RN70A MC_CD# PCI_AD31
10KOhm2 28 AD18/A7 G2 CADR7 AD31 P6

1
3 RN70B FUN0_SD_CD# PCI_AD30 C480
10KOhm4 FUN1_SM_CD# 28 AD20/A6 H6 CADR6 AD30 R6
5 RN70C PCI_AD29 C478
10KOhm6 28 AD21/A5 H4 CADR5 AD29 T6
7 RN70D PCI_AD28 0.01UF/10V 0.33U
10KOhm8 28 AD22/A4 H1 CADR4 AD28 V6
PCI_AD27

2
28 AD23/A3 J4 CADR3 AD27 W6
J1 P7 PCI_AD26
28 AD24/A2 CADR2 AD26
K4 R7 PCI_AD25
28 AD25/A1 CADR1 AD25
K1 T7 PCI_AD24
28 AD26/A0 CADR0 AD24
A5 R8 PCI_AD23
28 AD8/D15 CDATA15 AD23 TPB0+_1
D5 T8 PCI_AD22
28 RFU/D14 CDATA14 AD22
B6 V8 PCI_AD21
28 AD6/D13 CDATA13 AD21 TPB0-_1
E6 W8 PCI_AD20
28 AD4/D12 CDATA12 AD20
B7 R9 PCI_AD19
28 AD2/D11 CDATA11 AD19

1
M5 T9 PCI_AD18
28 AD31/D10 CDATA10 AD18
L1 V9 PCI_AD17 R336 R337
28 AD30/D9 CDATA9 AD17
L4 W9 PCI_AD16
28 AD28/D8 CDATA8 AD16
A6 V12 PCI_AD15 56Ohm 56Ohm
28 AD7/D7 CDATA7 AD15
D6 W12 PCI_AD14
28 AD5/D6 CDATA6 AD14 PCI_AD13

2
28 AD3/D5 A7 CDATA5 AD13 P13
D7 R13 PCI_AD12
28 AD1/D4 CDATA4 AD12

1
R5S593
C E7 T13 PCI_AD11 C
28 AD0/D3 CDATA3 AD11

1
M6 V13 PCI_AD10 R339 C479
28 RFU/D2 CDATA2 AD10
L2 W13 PCI_AD9
28 AD29/D1 CDATA1 AD9
L5 R14 PCI_AD8 5.11KOhm 270PF/50V
28 AD27/D0 CDATA0 AD8 PCI_AD7

2
AD7 V14
PCI_AD6

2
20,22 PCI_INTB# W17 INTA# AD6 W14
W18 T15 PCI_AD5
12,20,22 PCI_INTA# INTB# AD5
V18 V15 PCI_AD4
20,22,25 PCI_INTD# INTC# AD4
V19 W15 PCI_AD3
TEST AD3 PCI_AD2
P14 SMCD7 AD2 V16
R18 W16 PCI_AD1
SMCD6 AD1 PCI_AD0
R15 SMCD5 AD0 V17
Q43 T18
+V3.3 SI2301DS +V3.3_MC_VCC MS_BS SMCD4 TPBIAS0
T19 MSCBS/SMCD3 TPBIAS0 D12 PCI_AD[31:0] 19,24,25,26
MS_SDIO R16 D10
SMCD1 MSCSDIO/SMCD2 TPBIAS1 TPA0+_1
2 3 R19 B12
S

3 D

SMCD0 SMCD1 TPAP0


2

P15 SMCD0 TPAP1 B10


1

C270 C255 P16 A12 TPA0-_1


G

SMCLVD TPAN0
P18 A10
11

0.1uF/10V 0.1uF/10V SMCWP# TPAN1 TPB0+_1


N14 SMCR/B# TPBP0 B13
+V3.3_1394
2

26 MCVCC3EN# M15 SMCRE# TPBP1 B11


M18 A13 TPB0-_1
SD_D3 SMCWE# TPBN0
L19 SDCDATA3 TPBN1 A11 REXT/VREF/FIL0:
SD_D2 K15 B14 REXT_1394 R333 1 2 10KOhm 1%
SD_D1 L14
SDCDATA2 REXT
D14 VREF_1394 C467 1 2 0.01UF/10V
To implement as close as possible to R5C593
SD_D0 SDCDATA1 VREF CPS_1394
L15 SDCDATA0 CPS D15 To apply shield GND
L16 A14 FIL0_1394 C473 1 2 0.01UF/10V
SD_CMD SMCALE FIL0 XOUT_1394
L18 SDCCMD XO B16
SD/MS_CLK K16 A16 XIN_1394
B SDCCLK/MSCCLK XI B
MC_CD# K18 G18 FUN1_SM_CD#
MC_WP# MCCCD# FUNCSEL1 FUN0_SD_CD# X3
K19 MCCWP# FUNCSEL0 G15
+V3.3_MC_VCC 1 2
J16 SMCCLE SMCCE# J18 Based on Ricoh's
suggestion, remove

1
R5C593 C244 24.576Mhz C238
1

MC_WP# CB_AGND and


Q40 R185 24P 24P
connect all AGND to

2
3

D
3
SI2304DS 10KOhm generic GND.
2

11 FUN0_SD_CD#
G L22
S 2 TPA0-_1 JP21
Memory Card Detect 4 5
TPB0-
2

1
SWP1
GND2

GND1

1
SCD1

FUNSEL1 FUNSEL0 TPA0+_1 3 6 TPB0+ 2


+V3.3_MC_VCC 2
Choke TPA0- 3
CON8 +V3.3_MC_VCC TPB0+_1
Common
TPA0+ 3
0 0 Not Support 2 7 4 4
5
SD_CD_DETECT
GND2
SD_WP_PROTECT

GND1

TPB0-_1 5
NP_NC1 1 0 1 SmartMedia 1 8 6 6
SD_D1 S8 M1
SD_D0 SD_DAT1 MS_VSS1 MS_BS IEEE_1394
S7 SD_DAT0 MS_BS M2 1 0 MMC/SD
S6 SD_VSS1 MS_VCC1 M3
SD/MS_CLK S5 M4 MS_SDIO 1 1 Memory Stick
SD_CLK MS_SDIO SMCD1
S4 SD_VCC MS_RESERVED1 M5
S3 M6 MS_CD# MC_CD# : Memory Card Detect
SD_CMD SD_VSS2 MS_INS SMCD0
S2 M7
SD_D3 S1
SD_CMD MS_RESERVED2
M8 SD/MS_CLK Turn-on voltage: 0.37 V
A SD_D2 SD_DAT3 MS_SCLK A
S9 SD_DAT2 MS_VCC2 M9
M10
1

C260 MS_VSS2
5P NP_NC2 2
/ SD_CARD_19P D22
2

2 MS_CD#
MC_CD# 3
1 FUN0_SD_CD#
Title : CB1394-R5C593(2)
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
RB717F Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 27 of 54
5 4 3 2 1
5 4 3 2 1

CB POWER SWITCH CB SOCKET

D +AVCC +AVPP D

26 AVCC5EN#

1
C245 C248 C240 C243
+V3.3 10uF/10V 0.1UF/25V 10uF/10V 0.1UF/25V

2
AVPPEN1 26
U49
AVPPEN0 26
1 VCCD0 SHDN 16
26 AVCC3EN# 2 VCCD1 VPPD0 15 GND GND
3 3.3V_1 VPPD1 14 S0-S3: (Max. 1 A)
+V3.3 4 3.3V_2 AVCC_3 13 +AVCC
5 5V_1 AVCC_2 12
1

1
S0-S3: (Max. 1.25 A) C505 C504 6 11 C499 C503 CON16
5V_2 AVCC_1 +AVCC
7 GND AVPP 10
10uF/10V 0.1uF/10V 8 9 0.1uF/10V 0.1uF/10V 56
OC 12V 27 AD19/A25 A25
2

2
27 AD17/A24 55 A24 VCC1 17
G571 54 51
27 CFRAME#/A23 A23 VCC2
S0-S3: (Max. 1 A) 53 +AVPP
27 CTRDY#/A22 A22
+V5 +AVPP 27 CDEVSEL#/A21 50 A21
27 CSTOP#/A20 49 A20 VPP1 18
1

1
C507 C508 C511 48 52
27 CBLOCK#/A19 A19 VPP2
27 RFU/A18 47 A18
10uF/10V 0.1uF/10V 0.1UF/25V 46
27 AD16/A17 A17
2

2
27 CCLK/A16_D3 19 A16
C 27 CIRDY#/A15 20 A15 C

1
27 CPERR#/A14 14 A14 GND_POWER1 69
C466 13 70
+V12 27 CPAR/A13 A13 GND_POWER2
5P 21 71
27 CBE2#/A12 A12 GND_POWER3
1

C509 C510 /

2
S0-S3: (Max. 0.25 A) 27 AD12/A11 10 A11 GND_POWER4 72
27 AD9/A10 8 A10 GND_POWER5 73
0.1UF/25V 0.01uF/25V 11 74
27 AD14/A9 A9 GND_POWER6
2

27 CBE1#/A8 12 A8 GND_POWER7 75
27 AD18/A7 22 A7 GND_POWER8 76
27 AD20/A6 23 A6 GND_POWER9 77
27 AD21/A5 24 A5 GND_POWER10 78
27 AD22/A4 25 A4 GND_POWER11 79
27 AD23/A3 26 A3 GND_POWER12 80
27 AD24/A2 27 A2 GND_POWER13 81
27 AD25/A1 28 A1 GND_POWER14 82
27 AD26/A0 29 A0 GND_POWER15 83
27 AD8/D15 41 D15 GND_POWER16 84
27 RFU/D14 40 D14
27 AD6/D13 39 D13
27 AD4/D12 38 D12
27 AD2/D11 37 D11 GND
27 AD31/D10 66 D10
27 AD30/D9 65 D9
27 AD28/D8 64 D8
27 AD7/D7 6 D7 NP_NC1 85
27 AD5/D6 5 D6 NP_NC2 86
27 AD3/D5 4 D5
27 AD1/D4 3 D4
B 27 AD0/D3 2 D3 B
27 RFU/D2 32 D2
+AVCC 31
27 AD29/D1 D1
27 AD27/D0 30 D0
27 AD13/IORD# 44 IORD#

1
27 AD15/IOWR# 45 IOWR#
R178 9
27 AD11/OE# OE#
27 CGNT#/WE# 15 WE#
47KOhm 42 87
27 AD10/CE2# CE2# P_GND1
27 CBE0#/CE1# 7 CE1# P_GND2 88

2
61 89
CB DE-BOUNCE 27 CRST#/RESET
27 CBE3#/REG#
58
59
REG#
RESET
P_GND3
P_GND4 90
27 CSERR#/WAIT# WAIT#

1
C236 33
27 CLKRUN#/IOIS16# WP
27 CINT#/IREQ# 16 READY
0.01UF/10V 62
27 CAUDIO/SPKR_IN#/BVD2 BVD2

2
27 CSTSCHG/STSCHG#/BVD1 63 BVD1
27 CVS2 57 VS2#
C490 43 1
27 CVS1 VS1# GND1
270PF/50V GND 67 34
27 CCD2# CD2# GND2
27 CCD1# 1 2 27 CCD1# 36 CD1# GND3 35
27 CREQ#/INPACK# 60 INPACK# GND4 68

C448 PCMCIA_CON_84P
270PF/50V
1 2 GND
27 CCD2#

A A

Title : PCMCIA SOCKET


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 28 of 54
5 4 3 2 1
A B C D E

1 1

CON12
+V5S_IDE IDE_RST# 1 1
2 2 NP_NC3 47
20 IDE_PDD7 3 3 NP_NC1 45
20 IDE_PDD8 4 4 GND1 49
1

20 IDE_PDD6 5 5
R26 6
20 IDE_PDD9 6
1KOhm 7
20 IDE_PDD5 7
/ 8
20 IDE_PDD10 8
20 IDE_PDD4 9 9
2

20 IDE_PDD11 10 10
IDE_PCSEL
2 20 IDE_PDD3 11 11 2
20 IDE_PDD12 12 12
20 IDE_PDD2 13 13
1

+V3.3S 14
20 IDE_PDD13 14
R25 15
20 IDE_PDD1 15
20 IDE_PDD14 16 16
470Ohm 17
20 IDE_PDD0 17
20 IDE_PDD15 18 18

7
2

19 19
RN8D 20 20
10KOhm 20 IDE_PDDREQ 21 21
22 22
20 IDE_PDIOW# 23 23
24 24

8
20 IDE_PDIOR# 25 25
26 26
20 IDE_PIORDY 27 27
IDE_PCSEL 28 28
20 IDE_PDDACK# 29 29
30 30
20,22 INT_IRQ14 31 31
IDE_PIOCS16# 32 32
20 IDE_PDA1 33 33
3
IDE_PPDIAG# 34 3
+V3.3S 34
20 IDE_PDA0 35 35
20 IDE_PDA2 36 36
20 IDE_PDCS1# 37 37
20 IDE_PDCS3# 38 38
1 RN8A +V5S +V5S_IDE IDE_PDASP#
10KOhm 2 IDE_PIOCS16# IDE_PDASP# 31 39 39
3 RN8B
10KOhm 4 40 40
5 RN8C IDE_PPDIAG#
10KOhm 6 41 41 GND2 50
42 42 NP_NC2 46

1
+ 43 43 NP_NC4 48
CE13 44 44
47UF/6.3V HDD_CON_44P

+V5S_IDE +V5S_IDE
4 4
1

RN7A RN7B

10KOhm 10KOhm
2

IDE_RST# 30
3

Q8B
5 UM6K1N
6

Q8A
2 UM6K1N
8,19,34 PCI_RST#
5 5
1

Title : IDE-HDD
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 29 of 54
A B C D E
A B C D E

1 1

+V5S_IDE

1
R127
1KOhm Reverse type

NP_NC1

P_GND1
2 CON15 High: Master 2

51
53
Low : Slave

2
+V3.3S 1 2 IDE_SCSEL
35 CD_L_A CD_R_A 35
35 CD_GND_A 3 4 CD_GND_A 35
29 IDE_RST# 5 6 IDE_SDD8 20 Normal type

1
20 IDE_SDD7 7 8 IDE_SDD9 20
20 IDE_SDD6 9 10 IDE_SDD10 20
R126 High: Slave
1

11 12 470Ohm
RN18A
20 IDE_SDD5
13 14
IDE_SDD11 20
/ Low : Master
20 IDE_SDD4 IDE_SDD12 20
20 IDE_SDD3 15 16 IDE_SDD13 20
10KOhm

2
20 IDE_SDD2 17 18 IDE_SDD14 20
20 IDE_SDD1 19 20 IDE_SDD15 20
20 IDE_SDD0 21 22 IDE_SDDREQ 20
2

23 24 IDE_SDIOR# 20
20 IDE_SDIOW# 25 26
20 IDE_SIORDY 27 28 IDE_SDDACK# 20
29 30 IDE_SIOCS16#
20,22 INT_IRQ15 IDE_SPDIAG#
20 IDE_SDA1 31 32
20 IDE_SDA0 33 34 IDE_SDA2 20
20 IDE_SDCS1# 35 36 IDE_SDCS3# 20
IDE_SDASP# 37 38
39 40 +V5S_IDE
3 +V5S_IDE 41 42 3

1
43 44 +
45 46 CE5 +V3.3S
IDE_SCSEL 47 48
49 50 47UF/6.3V
RN18D IDE_SDASP#

2
7 10KOhm 8

NP_NC2

P_GND2
52
54
3 RN18B IDE_SIOCS16#
10KOhm 4 IDE_SPDIAG#
5 RN18C
10KOhm 6
cd_rom_50p

4 4

5 5

Title : IDE-ODD
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 30 of 54
A B C D E
5 4 3 2 1

_CLK_KBCPCI CON6
+V3.3

1
C181 S0-S3: (2.5 mA Typ, 7 mA Max.) 30 +V3.3
5P +V3.3 SIDE2 KSI7
28 28
/ KSI6
LxWxH=14x14x1.7 27 27

1
U16 KSI5 KSI0 RP1A

2
26 26 1 1KOhm 5
63 C183 C182 25 KSO0 10
20,22,25,26,32 INT_SERIRQ P87/SERIRQ 25 KSI1
64 0.1uF/10V 0.1uF/10V 24 KSO1 2 RP1B
GND 23 _CLK_KBCPCI P86/LCLK 24 1KOhm 5

5
KSO2

2
12,18,19,24,25,26,32 BUF_PCI_RST# 65 P85/LRESET# VCC 71 23 23 10
RN88C 66 22 KSI4 KSI2 3 RP1C
19,25,32 LPC_FRAME# P84/LFRAME# 22 1KOhm 5
67 21 KSO3 10
19,25,32 LPC_AD3 P83/LAD3 21 KSI3
10KOhm 68 72 20 KSO4 4 RP1D
19,25,32 LPC_AD2 P82/LAD2 VREF 20 1KOhm 5
69 19 KSO5 +V3.3S_ICH 10
19,25,32 LPC_AD1 P81/LAD1 19 KSI4
70 18 KSO6 6 RP1E
D
19,25,32 LPC_AD0 P80/LAD0 SCROLLOCK# 18 1KOhm 5 D
KSO7

6
P27 31 17 17 10
NUM_LED# KSO8 KSI5 RP1F
35
P54,P55,P43,P50 are P26 32
33 CAP_LED# 16 16
15 KSI3
7 1KOhm 5
10
49 CHG_FULL_OC P23 P25 15
BAT_LEARN KBC_P21
36 P22 wake-up event P24 34 SET_PCIRSTNS# 34 14 14 KSO9 KSI6 8 1KOhm 5
RP1G
37 13 KSI2 10
P21 inputs when KBC in 13 KSI1 KSI7 RP1H
P21: Power button 42 KBCRSM 38 P20 12 12 9 1KOhm 5

3
standby mode P17/KSO15 39 KSO15
11 11 KSO10 10
overwrite disable. Only P16/KOS14 40 KSO14
KSO13 10 10 KSI0 RN23A RN23B
23 41 9 KSO11
can be pulled down as 40
36
WATCHDOG
OP_SD# 22
P42/INT0 P15/KSO13
42 KSO12 9
8 KSO12 10KOhm 10KOhm
KBCPURST_3Q 21 P43/INT1* P14/KSO12 KSO11 8 KSO13
default value than can KBC_GA20 20
P44/RXD P13/KSO11 43
44 KSO10 A3 and A6 series follow 7 7
6 KSO14
P45/TXD P12/KSO10 6
be used as a input. KBSCI_3Q KSO9 M6N Keyboard Matrix KSO15

4
19 P46/SCLK1 P11/KSO9 45 5 5
18 46 KSO8 4
19,25,26 PM_CLKRUN# P47/SRDY1#/CLKRUN# P10/KSO8 KSO7 4 KEYDETECT1
KBC_BATLOW# 17 P07/KSO7 47
48 KSO6 3 3
2
K/B US UK JP
49 KBC_BATLOW# P50/INT5* P06/KSO6 2
49 BAT_LLOW#_OC
KEYDETECT1 16 P51/INT20 P05/KSO5 49 KSO5
1 1 KEYDETECT2 KEYDETECT1 H L L
KEYDETECT2 15 50 KSO4 29
P52/INT30/1-WIRE1 P04/KSO4 KSO3 SIDE1 KEYDETECT2 H H H
P54,P55,P43,P50 40 CLR_DJ# BAT_SEL#
14
13
P53/INT40/1-WIRE2 P03/KSO3 51
52 KSO2
P54/CNTR0* P02/KSO2
are wake-up event 50 BAT_IN#_OC 12 P55/CNTR1* P01/KSO1 53 KSO1
KSO0 KSO1 40
ZIF_CON_28P GND
11 54
inputs when KBC 40
17
FAN_DA1
BACK_ADJ 10
P56/DA1/PWM01 P00/KSO0
P57/DA2/PWM11 KSI7
in standby mode 74
P37/KSI8 55
56 KSI6 Audio DJ pin depends
41 DJ_LED# P67/AN7 P36/KSI7
40 SWDJ_EN# 75 P66/AN6 P35/KSI6 57 KSI5
KSI5 41 on Keyboard Matrix.
76 58 KSI4
+VCORE P65/AN5 P34/KSI5 KSI3 KSI4 41
77 59 +V3.3SUS_ICH +V3.3
50 ACIN_OC P64/AN4 P33/KSI4 KSI2 KSI3 41
41 DISTP# 78 P63/AN3 P32/KSI3 60 KSI2 41
79 61 KSI1
C 41 MARATHON# P62/AN2 P31/PWM10/KSI2 KSI0 C
41 INTERNET# 80 P61/AN1 P30/PWM00/KSI0 62
41 EMAIL# 1 P60/AN0

3
28 KBC_X1
XIN KBC_X2 RN64A RN64B
XOUT 29
KBDCLK_5S 4
MOUSECLK_5S P75/INT41 KBC_EXTSMI +V5 10KOhm 10KOhm +V5S
5 P74/INT31 P40/XCOUT 27
INTCLK_Q3 6 26
41 INTCLK_Q3 KBDDATA_5S P73/INT21 P41/XCIN EMAIL_LED# 41
7 Q19A
P72

5
MOUSEDATA_5S UM6K1N Q19B

4
8 P71
INTDATA_Q3 9 25 UM6K1N
41 INTDATA_Q3 P70 RESET# PCI_RSTNS# 34 KBSCI_3Q 1 6 KBC_GA20 3 4
+V3.3 SCL_BAT KBDSCI_3A 20 HA20GATE 20
2 P77/SCL CNVSS 24
SDA_BAT 3 30
P76/SDA VSS
AVSS 73

M38857
1

7
+V3.3SUS_ICH +V5S
RN88A RN88D
RN25D
10KOhm 10KOhm 7 10KOhm 8 EXTSMI#_3A 20

5
Q20B
UM6K1N
KBCPURST_3Q
2

8
3 4 KBDCPURST 20

6
BAT_SEL# Q20A
KBC_EXTSMI UM6K1N
BAT_SEL# 2
3

Q81B High: 8 Cell X1 GND

1
5 8MHZ
48,49 BAT_SEL
UM6K1N Low: 4Cell KBC_X1 1 2 KBC_X2
4

B B
+V3.3S
3

4 Cell battery mode:


1.Banias CPU run 600MHz 2 1
2.Celeron CPU throttling 50%
1

R125 +V3.3

1
C172 1MOhm C173
5PF / 5PF R36 R37 R38 R39
RN25A KBCPURST_3Q
2

1 10KOhm 2
RN25B 3 EMAIL_LED# 220Ohm 220Ohm 220Ohm 220Ohm
10KOhm 4 KBC_EXTSMI
+V5 RN25C 5 10KOhm 6

2
2

1
LED1 LED2 LED3 LED4

+
6 1 SCL_BAT
49 SMC_BAT
+V3.3
Q80A 3 4 BAT_IN#_OC YELLOW&GREEN YELLOW&GREEN YELLOW&GREEN YELLOW&GREEN
+V3.3
UM6K1N RN88B 10KOhm

2
RN65A 1 SCROLLOCK#
10KOhm 2

SCROLLOCK#
RN65B 3 NUM_LED#
10KOhm 4 CAP_LED#
+V5 RN65C

NUM_LED#
5 10KOhm 6

CAP_LED#
1 RN19A ACIN_OC RN65D SET_PCIRSTNS#
+V3.3 10KOhm 2 KBCRSM
7 10KOhm 8
3 RN19B
+V3.3 10KOhm 4
5

5 RN19C KBC_BATLOW#
+V3.3 10KOhm 6 PM_CLKRUN#
7 8 RN19D
SDA_BAT +V3.3S_ICH 10KOhm 29 IDE_PDASP#
49 SMD_BAT 3 4
IDE NUM CAP SCR
A A
Q80B
UM6K1N +V5S

5 RN24C KBDCLK_5S RN64C BAT_LEARN


4.7KOhm6 MOUSECLK_5S
5 10KOhm 6
7 RN24D RN64D KBC_P21
+V3.3 4.7KOhm8 KBDDATA_5S
7 10KOhm 8
3 RN22B
4.7KOhm4
+V3.3S
5 4.7KOhm6
RN22C MOUSEDATA_5S
Title : KBC-M38857
RN24A SCL_BAT
1 4.7KOhm2
RN24B SDA_BAT ASUSTek COMPUTER INC. NB1 Engineer: John Hung
3 4.7KOhm4
1 RN22A INTCLK_Q3 Size Project Name Rev
4.7KOhm2
7 4.7KOhm8
RN22D INTDATA_Q3
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 31 of 54
5 4 3 2 1
5 4 3 2 1

Super I/O

+V3.3 +V5
+VREF_SIO

1
C146 C143 IRTX
IRRX IRTX 33
IRRX 33
0.1uF/10V 0.1uF/10V

1
C434
2

2
D D
5P +V3.3S
FWH /

2
GNDA_SIO

1
C171

91
92
93
94
95
96
97
98

90

89
87
88

73
74
75

78
79
80

82
83
84
85
U11 ITEIT8705F
0.1uF/10V

VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0

TMPIN1
TMPIN3
TMPIN2

FAN_TAC1/GP55
FAN_TAC2/GP56

CIRTX/MIDI_OUT/GP66
VREF

FAN_TAC3/FA18/GP57

FAN_CTL1/GP60
FAN_CTL2/GP61
FAN_CTL3/GP62/SCPFET#

IRTX/GP64
IRRX/GP65

CIRRX/MIDI_IN/GP67

2
JSACX/GP40 49
19,25,26 PCI_PME# 81 PME#/GP63/SCPRES# JSACY/GP41 50 23 _CLK_FWHPCI
19,25,31 LPC_FRAME# 46 LFRAME# JSAB1/GP42 51
12,18,19,24,25,26,31 BUF_PCI_RST# 45 LRESET# JSAB2/GP43 52 12,18,19,24,25,26,31 BUF_PCI_RST#
23 _CLK_SIOPCI 42 PCICLK JSBCX/GP44 53
JSBCY/GP45 54
19,25,31 LPC_AD3 41 LAD3 JSBB1/GP46 55
1

C421 40 56
19,25,31 LPC_AD2 LAD2 JSBB2/GP47
10P +V3.3S

32
31
30
19,25,31 LPC_AD1 39 LAD1

4
3
2
1
/ RN16C
19,25,31 LPC_AD0 38 LAD0 RN16A
2

118 5 6

A8
A9
RST#

VCC2

A10
VPP

R/C#/CLK
DCD1#
20,22,25,26,31 INT_SERIRQ 37 SERIRQ RI1# 119 5 A7 IC 29 1 2
36 120 2.7KOhm 6 28
19 LPC_DRQ#0 LDRQ# CTS1# A6 GNDA
121 7 27 2.7KOhm
DTR1#/JP1 A5 VCCA
RTS1#/JP2 122 20 FWH_WP# 8 A4/TBL# GND2 26
+V5S 4 VCC0 DSR1# 123 9 A3 VCC1 25
35 124 10 WHUB 24 FWHHINIT#
+V5S VCC1 SOUT1/JP3 A2 INIT#/OE#
99 VCC2 SIN1 125 11 A1 WE# 23 LPC_FRAME# 19,25,31
CLOSE TO ITE8705 25 DIS_SYSBIOS 12 A0 RY/BY# 22
+V3.3 76 VBAT 13 DQ0 DQ7 21

GND1
126

DQ1
DQ2

DQ3
DQ4
DQ5
DQ6
DCD2#
1

C127 C151 77 127


C +V5 VCCH RI2# C
CTS2# 128
10uF/10V 0.1uF/10V 15 1 U15

14
15
16
17
18
19
20
GNDD0 DTR2#/JP4
2

43 GNDD1 RTS2#/JP6 2
67 3 R103
GND GNDD2 DSR2#
117 GNDD3 SOUT2/JP5 5 1 2
SIN2 6 19,25,31 LPC_AD0
86 2.7KOhm LPT
GNDA_SIO GNDA 19,25,31 LPC_AD1
19,25,31 LPC_AD2
44 100 LPT_SLCT
23 _CLK_SIO_48M CLKIN SLCT LPT_SLCT 33 19,25,31 LPC_AD3
101 SLCT_PE
PE SLCT_PE 33
48 102 SLCT_BUSY
SIOSMI# FWE#/GP54 BUSY SLCT_BUSY 33
47 103 SLCT_ACK#
FCS#/GP53/SCIO ACK# SLCT_ACK# 33
1

34 104 SLCT_SLIN#
FRD#/GP52 SLIN# SLCT_SLIN# 33
C162 33 105 SLCT_INIT#
FA17/GP51 INIT# SLCT_INIT# 33
10P 32 106 SLCT_ERROR#
FA16/GP50 ERR# SLCT_ERROR# 33 +VCORE
/ SLCT_AFD# +V3.3S
2

AFD# 107 SLCT_AFD# 33


31 108 SLCT_STB#
FA15/GP37 STB# SLCT_STB# 33
30 FA14/GP36
29 109 LPT_PD0
FA13/GP35 PD0 LPT_PD0 33

7
28 110 LPT_PD1
FA12/GP34 PD1 LPT_PD2 LPT_PD1 33
27 111 RN16B RN16D
FA11/GP33 PD2 LPT_PD3 LPT_PD2 33
26 FA10/GP32 PD3 112 LPT_PD3 33
113 LPT_PD4 2.7KOhm 2.7KOhm
PD4 LPT_PD5 LPT_PD4 33
PD5 114 LPT_PD5 33
115 LPT_PD6
PD6 LPT_PD6 33
FA9/VID_O4/GP31
FA8/VID_O3/GP30

FA7/VID_O2/GP27
FA6/VID_O1/GP26
FA5/VID_O0/GP25

FD7/IRQIN3/GP17
FD6/IRQIN2/GP16
FD5/IRQIN1/GP15
FD4/IRQIN0/GP14

LPT_PD7

8
FA4/VID_I4/GP24
FA3/VID_I3/GP23
FA2/VID_I2/GP22
FA1/VID_I1/GP21
FA0/VID_I0/GP20

PD7 116 LPT_PD7 33

MTRB#/SCRST
DRVB#/SCCLK

1 B
DSKCHG#

Q18
FD3/GP13
FD2/GP12
FD1/GP11
FD0/GP10

DENSEL#
WGATE#

WDATA#
RDATA#

HDSEL#

PMBS3904
INDEX#

MTRA#
DRVA#
STEP#
TRK0#
WPT#

B FWHHINIT# B
DIR#

3,20 H_INIT#

C
2
E

3
25
24

23
22
21

20
19
18
17
16

14
13
12
11

10

72
71
70
69
68
66
65
64
63
62
61
60
59
58
57
9
8
7

+V3.3S

+VREF_SIO

+V5S
1

RN17A

1
C136
10KOhm
3

1UF/10V JP3
RN17B

2
1 2
2

10KOhm SHORTPIN
GNDA_SIO /
1 B

Q16 CLOSE TO ITE8705


4

PMBS3904
SIOSMI#
A SIO_SMI# 20 A
C
2
E

Pull Up to +V3.3SUS @ ICH4-M

Title : SIO-ITE8705 & FWH


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 32 of 54
5 4 3 2 1
A B C D E

LN2 LN4
120Ohm/100MHz 120Ohm/100MHz

2 1 SLCT_L_SLIN# 1 2 LPT_L_PD7
32 SLCT_SLIN# LPT_L_PD2 32 LPT_PD7 SLCT_L_ACK#
32 LPT_PD2 4 3 32 SLCT_ACK# 3 4
6 5 SLCT_L_INIT# 5 6 SLCT_L_BUSY
32 SLCT_INIT# 32 SLCT_BUSY
8 7 LPT_L_PD1 7 8 SLCT_L_PE
32 LPT_PD1 32 SLCT_PE

PRINT PORT

CN11A
CN11B
CN11C
CN11D
1 1

CN9D
CN9C
CN9B
CN9A

27
CN7

1
3
5
7
7
5
3
1
SLCT_L_STB#

150PF
150PF
150PF
150PF
1
SLCT_L_AFD#

150PF
150PF
150PF
150PF
14
LPT_L_PD0 2
15 SLCT_L_ERROR#
LPT_L_PD1

2
4
6
8
3
SLCT_L_INIT#

8
6
4
2
16
LPT_L_PD2 4
17 SLCT_L_SLIN#
LPT_L_PD3 5
18
LPT_L_PD4 6
19
LPT_L_PD5 7
LN3 LN1 20
120Ohm/100MHz 120Ohm/100MHz LPT_L_PD6 8
21
1 2 LPT_L_PD3 2 1 SLCT_L_ERROR# LPT_L_PD7 9
32 LPT_PD3 32 SLCT_ERROR# LPT_L_PD0
3 4 LPT_L_PD4 4 3 22
32 LPT_PD4 LPT_L_PD5 32 LPT_PD0 SLCT_L_AFD# SLCT_L_ACK#
2 32 LPT_PD5 5 6 32 SLCT_AFD# 6 5 10 2
7 8 LPT_L_PD6 8 7 SLCT_L_STB# 23
32 LPT_PD6 32 SLCT_STB# SLCT_L_BUSY 11
24
SLCT_L_PE
CN10A
CN10B L36
CN10C
CN10D
12

CN8D
CN8C
120Ohm/100MHz

CN8B
CN8A
25
1 2 SLCT_L_SLCT 13
32 LPT_SLCT
1
3
5
7

1
7
5
3
1
150PF
150PF
150PF
150PF

C300 D_SUB_25P

26
150PF
150PF
150PF
150PF
150PF/50V

2
11-17
2
4
6
8

8
6
4
2
3 3

IR

R129
+V3.3 10Ohm +V3.3_VCC1 8 GND
W=20mil 7 SC
1 2 +V3.3_VCC1 6 VCC1/SD
5 NC
IRRX 4
32 IRRX Rxd
1

C174 C180 C185 IRTX 3


32 IRTX Txd
0.1uF/10V 4.7U 0.1uF/10V 2
+V3.3_IRED IRED_Cathode
1 IRED_Anode
2

4 4
U35
TFDU4100_TR3

W=35mil
1 2 RN67A
+V3.3 33Ohm
3 4 RN67B
33Ohm
5 6 RN67C
33Ohm
7 8 RN67D
33Ohm
1 2 RN66A
33Ohm
3 4 RN66B
33Ohm
5 6 RN66C
33Ohm
7 8 RN66D
33Ohm
1 2 RN21A
33Ohm
3 4 RN21B
33Ohm
5 6 RN21C
33Ohm +V3.3_IRED
5 7 8 RN21D W=35mil 5
33Ohm

Title : LPT PORT & IR


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 33 of 54
A B C D E
5 4 3 2 1

A6G follows A3 to NOT support


PCMCIA DEBUG Card Function

D D

+V3.3

DISCHARGE
CIRCUIT

3
RN72B +V5
C C

100Ohm

1
4
RN72A

6
Q62A
UM6K1N 100Ohm
42 PM_SLP_S4 2

2
3
Q62B
UM6K1N
5

4
+V5S

DISCHARGE

1
RN73A +V3.3S

B
CIRCUIT 100Ohm RN72C B
5 6

PCI_RSTNS# Gen Circuit

3
2
RN73B +V1.5S 100Ohm

6
Q68A
UM6K1N 100Ohm
+V3.3 2
42 PM_SLP_S3

7
1

4
RN73D +V1.2S
1

3
C177 Q68B
UM6K1N 100Ohm
0.1uF/10V 5
+V1.8S
2
5

5
U18

8
VCC 1 RN73C
PCI_RST# 8,19,29

6
4 Q67A
31 PCI_RSTNS#
2 2 1 UM6K1N 100Ohm
SET_PCIRSTNS# 31

7
GND R128 1KOhm 2
7ST32 RN72D
1

C179
3

6
100Ohm

3
0.1uF/10V Q67B
UM6K1N
2

8
5
Q64

3
3
D 2N7002

4
A
11 A
G
2 S

2
Title : DISCHARGE CIRCUIT
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 34 of 54
5 4 3 2 1
5 4 3 2 1

R123
0Ohm +V3.3S +V5_AUDIO
AC97_BCLK 1 2 BITCLK

1
C166 +V3S

1
R307 1 2 33Ohm AC97_BCLK C170 C165
20 AC97_BCLK_ICH4
0.1"-6" 10P
R305 2 33Ohm / 0.1uF/10V 0.1uF/10V

2
38 AC97_BCLK_MDC 1

2
0.9" ~ 5.6" 0.1"-0.4"
GND_AUDIO

25
38
1
9
T type routing, place R at branch point. U14
ACXI 2 35 XTSEL

VDD1
VDD2

AVDD1
AVDD2
ACXO XTL_IN FRONT_OUT_L EAR_L 36
3 XTL_OUT FRONT_OUT_R 36 EAR_R 36
D
MONO_OUT 37 0: 14.318MHz D
1: 24.576MHz
AC97_RST# 11 27 AVREF C426 1 2 10uF/10V
20,38 AC97_RST# BITCLK RESET# VREF VREFOUT
6 BITCLK VREFOUT 28 VREFOUT 37
AC97_SYNC_CODEC 10
20 AC97_SYNC_CODEC AC97_SDOUT_CODEC SYNC AFILT1
5 29 C427 1 2 0.001uF/50V
20 AC97_SDOUT_CODEC SDOUT AFILT1
20 AC97_SDIN0 1 2 AC97_SDIN_CODEC 8 SDIN AFILT2 30 AFILT2
R306 33Ohm C428 1 2 0.001uF/50V GND
31 VRAD
X7 PC_BEEP VRAD VRDA C430 1
12 PC_BEEP VRDA 32 2 1UF/10V
24.576Mhz PHONE 13 33
ACXI 1 2 ACXO PHONE NC1 C431 1
14 AUX_L Front_MIC 34 2 1UF/10V
15 AUX_R CENTER_OUT 43
ECERA 18PF/30PPM 16 44
VIDEO_L LFE_OUT
1

1
C432 C429 17 45
CD_L VIDEO_R GPIO0 XTSEL 1 T126 TPC28t GND_AUDIO
18 CD_L XTLSEL 46
20P 20P CD_R 20 47 EAPD 1 T127 TPC28t
MIC_CEN CD_R EAPD/SPDIFI
2

2 21 48 S/PDIF 36

CD_GND
MIC_BAS MIC1 SPDIFO
22 39

AGND1
AGND2
MIC2 SURR_OUT_L

GND1
GND2
LINEIN_L 23 40
LINEIN_R LINE_L NC2
24 LINE_R SURR_OUT_R 41

ALC650

CD_GND 19

26
42
+V3.3

4
7
SB_SPKR_R_D

14
SB_SPKR_R

SN74LV14
CODEC AC97_SDIN0 VCC
C164 EAPD 5 6 EAPD# 36
D15 0.1uF/10V
1 RN15A 2 PC_BEEP
MDC AC97_SDIN1 JP33 GND
C 20 ICH4_SPKR 4.7KOhm2 1 2 1 C
1 2 U52C
1N4148W-A2

7
3 RN15B SHORTPIN
4.7KOhm4
5 RN15C /
4.7KOhm6
7 RN15D
4.7KOhm8
GND_AUDIO

C149
GND_AUDIO 0.1uF/10V

38 MDC_MONO 1 2

M_MONO_SPKRCB_D
M_MONO_SPKRCB
+V5_AUDIO
C148
C158 0.1uF/10V C160
R116 1U 10V/X7R 0805 D14 0.1uF/10V
30 CD_L_A 1 2 CD_L_C 1 2 CD_L 1 2 1 2 1 2 PHONE

1
33KOhm RN13A 1N4148W-A2
R117 R120
1

2.7KOhm
RN49A 33KOhm 33KOhm
68KOhm

RN13D

2
7 2.7KOhm8
B R301 B
SPKRCB_Q

1 2 SPKRCB_Q_R GND_AUDIO
2

1KOhm
+V12
5

1
C145 U12
GND_AUDIO 3 RN13C 3 A+ + VCC 8
RN13B C 1UF/10V 1
C157 1 B Q14 2.7KOhm 2 A- - AO

2
26 SPKRCB 3 2.7KOhm4
R115 1U 10V/X7R 0805 PMBS3904 +V5S
1 2 CD_GND_C1 2 CD_GND E +V5_AUDIO 5 B+ +
30 CD_GND_A 2 +V5 BO 7
6

33KOhm GND_AUDIO 6 B- - GND 4

1
C138
68KOhm 3

1
LM358MX
RN49B GND_AUDIO R300 1UF/10V
Q13

2
1KOhm C417 2SB1424 3
1% E
GND T204
TPC28t

2
1 2 B 1
4

1
C +V5_AUDIO
R299 0.1uF/10V 2

1
GND_AUDIO 19.6KOhm

1
1% C131 C137 C130
C156

2
R114 1U 10V/X7R 0805 LINEIN_L C155 1 2 1U 10V/X7R 0805 LINEIN_L_C 3 RN14B 1UF/10V 0.1uF/10V 10uF/10V
1KOhm 4 LINE_L 36
2 CD_R_C CD_R JP34

2
30 CD_R_A 1 1 2
LINEIN_R C154 1 2 1U 10V/X7R 0805 LINEIN_R_C 1 RN14A
1KOhm 2 LINE_R 36 1 2
33KOhm
A A
SHORTPIN
5

/ GND_AUDIO
RN49C MIC_BAS C526 1 2 1U 10V/X7R 0805 MIC_BASS_C RN87A
68KOhm

1 1KOhm 2 MIC_BASS 37
MIC_CEN C527 1 2 1U 10V/X7R 0805 MIC_CENTER_C 3 RN87B
1KOhm 4 MIC_CENTER 37

Title : CODEC-ALC650
6

ASUSTek COMPUTER INC. NB1 Engineer: John Hung


GND_AUDIO Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 35 of 54
5 4 3 2 1
5 4 3 2 1

+VAMP

11-19
11-09
L55

1
1KOhm/100MHz
1 2 R121 L81 Noise occurred during EAR_R_C
1KOhm/100MHz system resume from S1.

6
CE30 10KOhm 1 2
47UF/6.3V L56 The timing of +V12S Q82A
EAR_L_C JACK_IN# J3

+
GND_AUDIO 1KOhm/100MHz UM6K1N

2
35 EAR_L 1 2
EAR_L_Q 1 2 EAR_L_CON
5
4
DLY_OP_SD# and 2

CE31 AC97_RST# still can not

1
2
47UF/6.3V EAR_R_Q 1 2 EAR_R_CON 3 +V5
prevent the pop noise.

4
EAR_R_C

+
35 EAR_R 1 2 1 5
D L57 RN85A Q82B D
Realtek recommands to

1
1KOhm/100MHz UM6K1N
+V3.3S
C425 C422 use pin47 EAPD to 10KOhm

3
JP35 100PF 100PF EAR_R_Q

3
RN84B RN84A substitute AC97_RST#. RN85B

2
1 2 f(highpass)=1/(2*3.14*R*C)=73 11

2
EAR_L_C

2
12
SHORTPIN 1KOhm 1KOhm This pin can be R392 10KOhm

6
AMP_RST#
GND_AUDIO
/
R=32 Ohm for Headphone, so C=68uF. controlled by codec 10KOhm Q83A
driver to meet our

6
But in order to reduce component type,

4
2 UM6K1N
+V5S Q84A

1
use 100uF/6.3V(11-041210721). timing request. UM6K1N

1
R304 2
0Ohm
But 100uF is too big for A3N, so change

4
/

1
8 5
1 2 to 47uF. GND_AUDIO
35 S/PDIF 7 35 EAPD# 2 Q84B Q83B
3 5 UM6K1N
UM6K1N

1
C161 DLY_OP_SD# 1

10
D54 EAR_L_Q

6
9

3
GND_AUDIO 0.1uF/10V DAP202K

2
Pop noise can be heard
+VAMP via headphone when
+V5S
system boot, restart and
resume from S3. Add +VAMP
1

C115 C120
CN12
OP_SD# to control the
10uF/10V 10uF/10V L58 5 turn-on timing.
1KOhm/100MHz
2

4 7

5
LINE_R_CON
C 35 LINE_R 1 2 3
6
R 8
9
But when system resume RN85C C

35 LINE_L 1 2 LINE_L_CON 2
L
10 from S3, pop noise is
GND_AUDIO 1 10KOhm
L59 AUDIO JACK behind OP_SD# pull high.
1KOhm/100MHz
Add a delay circuit to

1
+V3.3 PHONE_5P

6
OP_SD_DLY 40
RN38A RN38B C112 C121 prevent it.
100PF 100PF SE/BTL#
1

+V3.3 +V3.3 100KOHM 100KOHM

3
R390 Q85B
14

14

D53 10MOhm SN74LV14 SN74LV14

4
5 UM6K1N
1N4148W-A2 VCC VCC
DLY_OP_SD#
2

4
31 OP_SD# 2 1 13 12 11 10
1

C530 GND GND


1

U52F U52E GND_AUDIO


R396 0.1uF/10V
7

10KOhm C(FR)
2

C128 1 2 68P /
2

R105 1 2 10KOhm

For reduce "POP" R(FR)


noise when system AMP_MUTE 11-16
C414
enter S3 (suspend to 0.047U RN35A U7
EAR_R AMP_R_C CAMPIN_R SPKR+
RAM) or resume from 1 2 1 10KOhm 2 21 RLINEIN ROUT+ 22
3

B B
S3. Net "OP_SD#" RN35B C(IR) R(IR)
CAP 1UF/10V (0805) X7R (105)
20 RHPIN ROUT- 15 SPKR-

should be pull low by 10KOhm C124 1 2 1U 19 RBYPASS RVDD 18 +VAMP


KBC controller when

1
C119
system at S3 mode. 1U CN29B CN29A
4

GND_AUDIO 2 CAP 1UF/10V (0805) X7R (105) U29


AMP_MUTE NC1 150PF 150PF

2
11 MUTE_IN NC1 5
14 SE/BTL# / / 1
GND_AUDIO SE/BTL# GND_AUDIO 1

2
9 MUTE_OUT 2 2
HP/LINE# 16 3 3
+VAMP AMP_SHDN 8 4
SHUTDOWN 4
LVDD 7 NC2 6
6 LBYPASS
+V3.3S 17 WtoB_CON_4P
NC2
NC3 23
7

RN35D C413 5 3 SPKL+


LHPIN LOUT+
7

0.047U RN35C
10KOhm EAR_L 1 2 AMP_L_C 5 CAMPIN_L SPKL-
10KOhm 6 4 LLINEIN LOUT- 10

RN85D C(IL) R(IL)


GND/HS1
GND/HS2

GND/HS3
GND/HS4
10KOhm
8

5
AMP_SHDN CN29D CN29C
8

D49
BTL Gain=-2*[R(FL)/R(IL)]
6

1N4148W-A2 TPA0102 150PF 150PF


12

13
24

JACK_IN# Q85A =-2*(10K/10K) / /


1

2 1
UM6K1N

6
2
A =V A
1

R(FL)
Speaker W= (V*V)/R
If using "OP_SD#" to switch GND_AUDIO f(highpass) = 1/[2*3.14*C(IL)*R(IL)] GND_AUDIO = (2*2)/ 4ohm
AMP_SHDN, speaker will f(lowpass) = 1/[2*3.14*C(FL)*R(FL)] R97 1 2 10KOhm
=1W
have "POP" noise after logo C125 1 2 68P /
Title : AUDIO AMP
display when turn on system. So can use 1W(4ohm) speaker
C(FL) ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 36 of 54
5 4 3 2 1
A B C D E

E E

D D

C C

MIC JACK
B B

CN13
5
7 4 MIC_BASS_CON L60 1 2 1KOhm/100MHz MIC_BASS 35
8 R 3
9 6 INTMIC_LE L61 1 2 1KOhm/100MHz INTMIC_A
INTMIC_A 17
10 2
L 1 MIC_CENTER_CON L62 1 2 1KOhm/100MHz MIC_CENTER 35
AUDIO JACK JP31
2 1 VREFOUT 35 1 2
PHONE_5P R296 4.7KOhm
1

C144 C525 SHORTPIN


/
100PF 100PF GND_AUDIO GND_MIC
2

INTMIC_A & GND_AUDIO :


W/P/X = 12/5/15mils

A GND A

Title : MIC
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 37 of 54
A B C D E
A B C D E

RJ45 & RJ11


L17
LAN_TDN 4 5 LAN_TXN
CON5 J2
LAN_TDP 3 6 LAN_TXP 4 1KOhm/100MHz 1 17
SIDE2 RJ11_RING_CON L63 1 RJ11_RING 1 SIDE1
2 2 2 15
Choke
LAN_RDN
Common
LAN_RXN 2 RJ11_TIP_CON L64 1 RJ11_TIP 2 P_GND1
1 2 7 1 1 2 3 3 NP_NC1 13 1
SIDE1 3 4 4
LAN_RDP 1 8 LAN_RXP 1KOhm/100MHz LAN_TXP 5
U2 LAN_TXN 5
6 6
1 16 LAN_RDP 857CM_0009 WtoB_CON_2P LAN_RXP 7
24 L_RDP RD+ RX+ LAN_RDN 7
2 15 / 8
24 L_RDN RD- RX- RXCT LAN_CON8/9 8
3 RDCT RXCT 14 9 9
LAN_RXN 10 14
TXCT 10 NP_NC2
6 PTCT/TDCTTXCT 11 11 11 P_GND2 16
7 10 LAN_TDP LAN_CON5/6 12 18
24 L_TDP TD+ TX+ LAN_TDN 12 SIDE2
24 L_TDN 8 TD- TX- 9

4 12 RN10D PHONE_JACK_12P
NC1 NC3
1

5 13 LAN_TDN 7 8 LAN_TXN
NC2 NC4 0Ohm
C342
0.1uF/10V LF8423 RN10C
LAN_TDP LAN_TXP
2

5 0Ohm 6
RN77A 75Ohm
RN10B TXCT 1 2 GND_LAN
LAN_RDN 3 4 LAN_RXN
0Ohm
RN77B 75Ohm
RN10A RXCT 3 4
LAN_RDP 1 2 LAN_RXP
0Ohm
2 RN77C 75Ohm 2
LAN_CON8/9 5 6

RN77D 75Ohm
R & L Co-Layout LAN_CON5/6 7 8

1
C348
0.1uF/10V

2
3 3

MDC

CODEC AC97_SDIN0
+V3.3_MDC

33
31
+V3.3S_MDC +V3.3S MDC AC97_SDIN1 1 2 MASTER

NP_NC1
SIDE1
1 2

2
3 3 4 4 MDC_MONO 35
5 6 R190
5 6 10KOhm
7 7 8 8
9 9 10 10 +V5S_MDC
11 11 12 12

1
13 13 14 14
15 15 16 16
+V3.3_MDC 17 17 18 18 SLAVE

1
19 19 20 20
4 21 22 AC97_SYNC_MDC R194 4
+V3.3S_MDC 21 22 AC97_SYNC_MDC 20
23 24 1 T174 TPC28t 10KOhm
20 AC97_SDOUT_MDC 23 24

NP_NC2
25 26 AC97_SDIN1_MDC1 /
20,35 AC97_RST# 25 26

SIDE2
27 27 28 28

2
29 29 30 30 AC97_BCLK_MDC 35
CN6

34
32
BTOB_CON_30P
+V3.3_MDC +V3.3

R186 1 2 47Ohm AC97_SDIN1_MDC1


20 AC97_SDIN1

5 5

+V5S_MDC +V5S
Title : MDC &RJ45 & RJ11
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 38 of 54
A B C D E
5 4 3 2 1

USB PORT 0 & PORT 1 USB PORT 4

D +V5USB01 D
+V5 +V5USB01 L10 +V5_USB01 +V5_USB01
F2 80Ohm/100MHz
1 2 +V5USB01 2 1

1
+

1
1.5A/6V CE12 C21
R28 4.7KOhm R27 8.2KOhm
1 2 1 2 100UF/6.3V 0.1U

2
20 USB_OC#01
11-10

USB_PP0 USB_P0+
20 USB_PP0

2
L15 +V5_USB01

90Ohm/100MHz
9
CON11
4

USB_PN0 3 USB_P0-
20 USB_PN0 GND3
1 VCC1
USB_P0- 2
USB_P0+ 1P-
3 1P+
USB_PP1 USB_P1+ 4
20 USB_PP1 GND1
5 VCC2
1

C USB_P1- C
6 0P-
L14 USB_P1+ 7 0P+
90Ohm/100MHz 8 GND2

1
C319 C318 C317 C316
GND4
4

USB_PN1 USB_P1- 0.1U 0.1U 0.1U 0.1U USB_CON_2X4P


20 USB_PN1 10
/ / / /

2
USB PORT 2 & PORT 3 USB PORT 5 for USB CEMERA
(Move to Page 17)

B +V5USB23 B
+V5 +V5USB23 L11 +V5_USB23 +V5_USB23
F1 80Ohm/100MHz
1 2 +V5USB23 2 1
1

+
1

1.5A/6V CE11 C22


R29 4.7KOhm R32 8.2KOhm
1 2 1 2 100UF/6.3V 0.1U
2

20 USB_OC#23
11-10

USB_PP2 USB_P2+
20 USB_PP2
1

L12 +V5_USB23
90Ohm/100MHz
9
CON10
4

USB_PN2 USB_P2-
20 USB_PN2 GND3
1 VCC1
USB_P2- 2
USB_P2+ 1P-
3 1P+
USB_PP3 USB_P3+ 4
20 USB_PP3 GND1
5 VCC2
1

USB_P3- 6
A
L13 USB_P3+ 0P- A
7 0P+
90Ohm/100MHz 8 GND2
1

C313 C312 C315 C314


GND4
4

USB_PN3 USB_P3- 0.1U 0.1U 0.1U 0.1U USB_CON_2X4P


20 USB_PN3 10
/ / / /
2

Title : USB
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 39 of 54
5 4 3 2 1
5 4 3 2 1

DC FAN Using a OP AMP and


fine-tuning the level,
we can improve the fan
ON/OFF detection.
+V5S_FAN +V5S Q55 +V5S_FAN
SI2301DS
C404
+V5S 1000P 2 3

3 D
2
D 2 1 D

2
RN37D + +V3.3S

11
1

1
C109 CE32 D50
10KOhm R385
+V12 0.1uF/10V 47UF/6.3V 1N4148W-A2
KBC will issue a analog 10KOhm

2
signal (voltage level). When fan speed is very slow,

1
/FAN_SPD U6

1
R382 3 A+ + VCC 8 after RC integrator the level RN37A

2
4.7KOhm 1 1 2
31 FAN_DA1 1 2 FAN_DA1_R 2 A- - AO of FANSP1 will be very low 10KOhm
R275 +V5S_FAN
that may make south bridge

1
5 B+ + 330Ohm
1

4
C398 R282 BO 7 CPUFAN_SPD do the wrong detection.

2
SW: FAN_DA1 must

1
FAN_SPD 6 B- - HOLD1 CON13
GND 4 1
be low during S3 0.1uF/10V 15KOhm R386
LM358MX
FAN_SPD 1 2 1 2 FANSP1 2 WTOB_CON_3P
2

1
10KOhm +V3.3S +V3.3S R291 D31 C412

2
HOLD2
/FAN_SPD C411 100KOhm RB751V_40 100PF/16V
1UF/10V /FAN_SPD /FAN_SPD /

5
+V3.3S /FAN_SPD

2
3

3
Q92 3
D
2N7002 RN37C RN37B

1
36 OP_SD_DLY 11 10KOhm 10KOhm R387
G
2 S 10KOhm

6
/FAN_SPD
2

4
Q86A

2
2 UM6K1N
C CPUFAN_SPD_A 20 +V3.3S C
D32

3
DAP202K 3

1
D
Q86B Q90 RN36D OS#_OC
CPU FAN will be forced on: 5 OS#_OC 2
3 5 UM6K1N 2N7002
7
5
10KOhm 8
RN36C PM_THRM#
10KOhm 6
1) Thermal Sensor Over-temperture 5,20 PM_THRM# 1 CPUFAN_SPD 11 /FAN_SPD 3 10KOhm 4
RN36B FAN_DA1
WATCHDOG
RN36A

4
G 1 2
2) PROCHOT asserted(CPU) 2 S 10KOhm

3
3
3) WATCHDOG asserted(KBC)

2
D

31 WATCHDOG 11 Q57
G 2N7002
2 S U6 output maximum will be
10.5V (VCC-1.5V) which will
2

damage sourth bridge. Add a


MOS to tansfer it to +3V level.

AUDIO DJ SWDJ_EN# function :


1.Push DJ_SW#, turn on Audio DJ.
2.PM_SLP_S4# will keep high.
+V5S 3.Push DJ_SW# again, KBC will receive SWDJ_EN#. KBC
can't issue SUSC# (PM_SLP_S4#) immediately. If KBC do it,
B Q65A PM_SLP_S4# (page 42) will go low, DJ_SW# low signal will B
2

UM6K1N +V3.3S
go to PM_PWRBTN#, then system will restart. KBC need
1 6
31 CLR_DJ# trigger the righting edge of SWDJ_EN#, for make sure end +V5S
+V3.3 user already push than remove DJ Switch button than issue

5
+V3.3A
SUSC#, DJ_SW# won't initial low to PM_PWRBTN# (page RN74C
42), can turn off Audio DJ and won't restart.
2

7
+V5 10KOhm
R346 R345 RN74D
Q65B 8.2KOhm
PM_SLP_S1#: To prevent
5

UM6K1N 100KOhm 10KOhm

6
system be wake up by
RN74A +V3.3A
1

4 3 1 10KOhm 2 1 2
20,42,47 PM_SLP_S4#
C493 0.1uF/10V Audio DJ Key when system

8
SWDJ_EN# 31

2
POWER OFF GND
enter S1 or S3.
1

U44A 1 6
20,23 PM_SLP_S1#
3

Q66B

10
3 6
CLR

41,42 DJ_SW# CK Q# U44B


Q71A

5
2 5 3 RN74B UM6K1N
10KOhm 4 5 12 9

PR
+V3.3A D Q D Q
UM6K1N
4

7 GND VCC 14 +V3.3A 11 CK Q# 8 41 DJ_SCAN 3 4 KSO1 31


PR

+V3.3A 7 14 Q71B

CLR
GND 74LV74A GND GND VCC
4

UM6K1N
1

C484 GND 74LV74A

0.1uF/10V 13
A A
2

GND

When power on, BIOS will set CLR_DJ# low.


2 1
74LV74 will be cleared always. Title : FAN & AUDIO DJ
41,42 DJ_SW# SWDJ_EN# 31 Use D42 to Enable AudioDJ in OS. Engineer: John Hung
D42 ASUSTek COMPUTER INC. NB1
1N4148W-A2
Use D42 to Turn off AudioDJ when system be turned on in DJ mode. Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 40 of 54
5 4 3 2 1
5 4 3 2 1

FUNCTION KEY
1 PWR_SW# 42
T205 TPC28t

HOTKEY5# HOTKEY4# HOTKEY3# HOTKEY2# HOTKEY1#

D D

1
SW5 SW1 SW2 SW3 SW4
1 2 D7 1 2 D10 1 2 D11 1 2 D9 A6G uses 5-pin 1 2 D8
1 2 1 2 1 2 1 2 1 2
switch to improve
3 4 3 4 3 4 3 4 3 4
3 4
5 181K 3 4
5 181K 3 4
5 181K 3 4
5 181K ESD margin. 3 4
5 181K
5 / 5 / 5 / 5 / 5 /

2
SWITCH_5P SWITCH_5P SWITCH_5P SWITCH_5P SWITCH_5P

11-14 11-14 11-14 11-14 11-14


Power4 Gear E-Mail Internet Touchpad Disable Power Switch

R406
1 HOTKEY1# 1 2 PWR_SW#
T206 TPC28t 1
DC POWER T207
T208
TPC28t
TPC28t
1
1 +V3.3
330Ohm

JACK T209 TPC28t


7 10KOhm 8
RN9D
MARATHON# 31
J1
+V_DCJACK A/D_DOCK_IN HOTKEY5# 7 RN90D 4 CN1B
330Ohm 8 3 0.1U
7 4
L3 5 RN9C
10KOhm 6 EMAIL# 31
1
5 4532 HOTKEY4# 5 RN90C 2 CN1A
C 330Ohm 6 1 0.1U C
2 680 Ohm/ 100MHz
1

6 3 C13 3 RN9B
10KOhm 4 INTERNET# 31

1
C14 C15 C16
0.1UF/25V HOTKEY3# 3 RN90B 8 CN1D
330Ohm 4 7 0.1U
DC_PWR_JACK_4P 10UF/25V 1U 0.1UF/25V
2

L9 RN9A

2
1 10KOhm 2 DISTP# 31
GND_DCJACK
4532 HOTKEY2# 1 RN90A 6 CN1C
330Ohm 2 5 0.1U
1 680 Ohm/ 100MHz
T210 TPC28t 1
T211 TPC28t 1
T212 TPC28t 1
T213 TPC28t

+V5 +V5 +V5

20 802_LED_EN#
11-23

7
Q59A Q59B LED5

+
6

UM6K1N UM6K1N YELLOW&ORANGE RN80B RN80D


/ /
2 5 10KOhm 10KOhm
25 802_ACTLED 802_LINKLED 25
R140
1KOhm
1

2
R309 EMAIL_LED#_R R312

8
1 2
1

220Ohm 1 2 802_LED_EN#_R
B RN81A RN81B 1 2 PWR_LED#_R B
680Ohm

3
10KOhm 10KOhm
/ / Q77B Q79B
5 UM6K1N 5 UM6K1N
2

6
4

4
RN80A Q58A Q77A Q79A
1 2 2 2 UM6K1N 802_LED_EN# 2 UM6K1N
49 PWR_LED_UP UM6K1N 31 EMAIL_LED#
1

1
10KOhm
3

Q91 3
CON7 D
2N7002
22 +V5 +V5
GND2 DJ_LED
+V5S 20 20 11
802_LED_EN#_R 19 G
18
19 2 S
+V5 EMAIL_LED#_R 18
2

17 17

5
CHG_LED#_R 16 16 RN80C
+5VLCM 15 15
PWR_LED#_R 14
DJPLAY# 14 10KOhm
31 KSI3 13 13
DJSTOP# 12
31 KSI5 DJFWARD# 12
31 KSI2 11 11

3
DJBWARD#

6
31 KSI4 10 10
DJ_SCAN 9 Q78B
40 DJ_SCAN DJ_LED_R 9
+V5S +V5S_TP 8 5 UM6K1N

DJ_LED
DJ_SW# 8
L43
40,42 DJ_SW# 7 7 1 2 CHG_LED#_R
80Ohm/100MHz R374

4
A
6 6 A
1 2 5 R311 470Ohm
5 1KOhm DJ_LED_R
4 4 1 2
1

C435 INTDATA_Q3 3
31 INTDATA_Q3 3

6
INTCLK_Q3 2
31 INTCLK_Q3 2
3

0.1uF/10V 1 Q78A
1 Q58B UM6K1N
2

GND1 21 31 DJ_LED# 2
49 CHG_LED_UP 5 UM6K1N
Title : FUNCTION KEY
1

FPC_CON_20P
4

ASUSTek COMPUTER INC. NB1 Engineer: John Hung


Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 41 of 54
5 4 3 2 1
5 4 3 2 1

+V3.3
+V3.3SUS +V3.3SUS
+V3.3

14
SN74LV14

14

14
VCC SN74LV14 SN74LV14
9 8 +V3.3SUS VCC VCC
5 6 11 10

3
GND

1
U52D RN71B +V3.3SUS +V3.3SUS GND GND
R375 U51C U51E

7
10KOhm

7
15KOhm

14

14
+V3.3 SN74LV14 SN74LV14
VCC VCC +V3.3SUS +V3.3SUS

2
RN71D U43
D 1 2 3 4 PM_RSMRST# 20 D
1 A

14

14
8 7 8,43 IMVP4_PWRGD VCC 5

1
C481 GND GND SN74LV14 SN74LV14
DLYS3_CPUON 2 B 1uF/6.3V U51A U51B VCC VCC
10KOhm

7
9 8 13 12

2
3 GND 4
Y GND GND
NC7SZ08P5X U51D U51F

7
8,43 VRM_PWRGD IMVP4_PWRGD 8,43

+V5A
CPU_VRON 20,43
+V3.3 +V3.3 +V3.3
ICH4_PWROK 20,43 RN75B
3 4
RN75A
1 2
1

1
C474 10KOhm
RN71A
0.1uF/10V D47 +V5A 10KOhm
10KOhm RB715F
2

49,50 AC_APR_UC 1
U52B U52A
14

14
3
SN74LV14 SN74LV14 D37 U48

2
20,40,47 PM_SLP_S4# 2 3V_ON 46
VCC VCC 1N4148W-A2 1 5
NC Vcc
20 PM_VGATE 4 3 2 1 1 2

6
PM_PWRBTN 1 2 2 RN75D Q66A
A

1
GND GND 10KOhm UM6K1N
C C
C475 D44 3 4 7 8 2
GND Y

1
0.1uF/10V 1N4148W-A2
7

1
NC7SZ14P5X PWR_SW#

1
2
C500 R359 3
1UF/10V 100KOhm DJ_SW# 1

2
D45

2
System Power Sequence DAP202K

POWER ON/OFF SEQUENCE +VCCRTC -> RTCRST# ->V5REFSUS ->3.3/1.8VSUS ->


RSMRST#->SLPS4#->SLPS3#->VCCLAN->LANPWROK FORCE_OFF# 46,49
->V5REF->VCC->VCORE->PWROK->VGATE
SUSSTAT#->PCIRST# (Set FORCE_OFF#
as Force System
CPU : +VCORE, +VCCP,+V1.8S T214 PM_SLP_S3# +V3.3A +V3.3A
TPC28t 1 Off function)
NB : +V1.2S, +V1.5S, +2.5V, +VCCP

2
Shutdown +V3.3SUS Q63B
SB :+V1.5SUS, +V3.3SUS, +VCCP, +V1.5S, +V3.3S UM6K1N
if PWROK failed R338

1
SW6 /
DDR :+V2.5, +V1.25,+V1.25S

5
+V3.3 1 2 C497 1MOhm
+V3.3SUS 1 2 0.1uF/10V / RN76A RN75C
/ +V3.3SUS 100KOhm 10KOhm

1
3 3 4 4 5
5 5

4
1

6
C495

1
RN76D SWITCH_5P C482

6
3
0.1uF/10V 100KOhm 2
20 PM_VGATE
11-18
+V3.3SUS 1UF/10V RN76B
2

PM_SLP_S4# 20,40,47
Q63A / 100KOhm Q72

11
U45A U45B +V3.3SUS UM6K1N 2N7002
14

14

B B
SN74LV14 SN74LV14 /

G
8

VCC VCC 3 2

S 2
DLYS3_CPUON

D
2 1 4 3

2
D41

5
GND GND 1N4148W-A2
1

C483 RN76C 1 2 6 1 DJ_SW# 40,41

1
D38 +V3.3SUS +V3.3SUS
7

1UF/10V 100KOhm Q69A C491


1N4148W-A2 U45D U45E UM6K1N 0.1uF/10V
2

14

14
SN74LV14 SN74LV14 Q70A

2
VCC VCC UM6K1N
2

6
+V3.3SUS 8 9 PM_PWRBTN 10 11 6 1 1 2
20 PM_PWRBTN# PWR_SW# 41

1
GND GND D46 +V3.3SUS

1
U45C C494 1N4148W-A2 C32
14

SN74LV14 0.1uF/10V
7

2
To Discharge circuit

1
VCC 0.1uF/10V

2
JP32 +V3.3SUS

2
6 5

1
34 PM_SLP_S3 PM_SLP_S3# 20,24,26,47

5
2
GND 1MM_OPEN_5MIL RN71C
/ +V5S 10KOhm

2
+V3.3SUS T215 R351 Q69B
7

2
TPC28t UM6K1N

5
U45F 1MOhm
14

SN74LV14 Q70B

6
To Discharge circuits

3
VCC UM6K1N

1
4 3 LID_ICH4#_3A 20

1
34 PM_SLP_S4 12 13 PM_SLP_S4# 20,40,47
To POWER GND
5 KBCRSM 31
1 2
LID SWITCH
LID_SW# 17
4
20,24,26,47 PM_SLPDLY_S3#

1
A A
C489 D60
7

1N4148W-A2
0.1uF/10V

2
KBCRSM will issue low when system on & BIOS work normally.
Issue high when system on & BIOS don't work, then system will off Title : PWR & RESET SEQ
after 4 seconds to protect system. ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name
Issue a high pulse to wake up system from S3 state by push any key. Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 42 of 54
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS

AC_BAT_SYS AC_BAT_SYS

10UF/25V

10UF/25V
1

1
C54

C43
2

2
D D
+5VO

5
6
7
8
R110 10Ohm
2 1 +5VO Q9

D
VID 0 1 2 3 4 5 IRF7413Z

S
C132 C387
1.468V 1 1 1 1 0 0
4.7u 4.7u

4
3
2
1
0.956V 1 1 1 1 0 1
T114 T116 T119 +VCORE
TPC28t TPC28t TPC28t T11 T97 T100 T19 T99
TPC28t TPC28t TPC28t TPC28t TPC28t
T118 T115 T117 L39 R42

1
TPC28t TPC28t TPC28t

1
1 2 1 2
T25 T24 T41 U9 0.56UH 3mOhm
1

EC31QS04
R284 100KOhm TPC28t
TPC28t
TPC28t 12 36 C113
VCC VDD

5
6
7
8

1
+5VO 1 2 +
42 0.1UF Q7 CE2

D
V+

2
MCH_OK 470UF/2.5V

2
45 MCH_OK 22 SYSOK IRF7832
CLK_EN#

G
23 CLK_EN# 24 32 1 2

S
VRM_PWRGD CLKEN# BSTM R88 2.7Ohm

2
8,42 VRM_PWRGD 23 IMVPOK

D6
DHM 34 2
VR_VID0

4
3
2
1
3 VR_VID0 30 D0 3
VR_VID1 T27 T57 T13 T22 T12

1
3 VR_VID1 29 D1 LXM 33 1
VR_VID2 28 RB717F D13 TPC28t TPC28t TPC28t TPC28t TPC28t
3 VR_VID2 VR_VID3 D2
3 VR_VID3 27 D3 DLM 35
VR_VID4

1
3 VR_VID4 26 D4
VR_VID5 25 37
C 3 VR_VID5 D5 PGND CMP C
GND1 13
6 S0 GND2 49
7 S1 CMN 46
8 45 T104 T15 T18 T17
S2 CMP CSP TPC28t TPC28t TPC28t TPC28t
OAIN+ 20 1 2
3 19 R286 511Ohm
B0 OAIN- AC_BAT_SYS

1
4 B1 1 2
5 18 R288 511Ohm
TPC28t B2 FB
T121 STPCPU# R106 1 2 0Ohm DPRSLPVR

C331 0.001uF/50V
1 20 PM_DPRSLPVR 43 SUS NEG 16

10UF/25V

10UF/25V
TPC28t STPCPU#

1MOhm
20,23 PM_STPCPU# 44 DPSLP#

2
T123 1 DPRSLPVR 21 PSI#

1
1U
TPC28t R93 1 2 1KOhm / 17
VRON 3 PM_PSI# CCI
T122 1 R94 1 2 1KOhm 9
+5VO SHDN#

5
6
7
8
TPC28t 15
PM_PSI# POS

R95

C37

C31

C68
T217 R496 1 2 0Ohm VRON Q11

2
1 2 1 2

D
20,42 CPU_VRON TON
11-02

1
C122 470PF/50V IRF7413Z

G
14 48

S
CCV CSP
10 47 T23 T102 T101
REF CSN
R109 100KOhm

TPC28t TPC28t TPC28t

4
3
2
1
C106 L41 R53
1

+VCORE

1
11 ILIM BSTS 41 1 2 1 2 1 2 1 2
R77 2.7Ohm
0.1UF 0.56UH 3mOhm

470UF/2.5V
DHS 39 (25A)

5
6
7
8
DPRSLPVR
47pF/50V

1 TIME LXS 40

1
Q12
0.47U

+ +

D
1

1
31 38 CE19 C373
DD0# DLS IRF7832
1

75KOhm

56KOhm

R410 0.1UF/25V

G
330UF/2V

S
1

CE3
B B
C129

C133

C139 100PF

1MOhm MAX1987ETM

2
1

R96 360Ohm R287 1KOhm D12


2

4
3
2
1
EC31QS04 T147 T195 T171 T144 T81
2

1
1 2 1 2
R108

R107

TPC28t TPC28t TPC28t TPC28t TPC28t


R99 R101 R102 C126 R289 1KOhm
2

1
1 2 1 2 1 2 1 2 1 2

100KOhm 1.21KOhm 4.7KOhm


4700P

A A

Title : VCORE
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 43 of 54
5 4 3 2 1
5 4 3 2 1

+3VALWAYS_M
AC_BAT_SYS +V3.3 +V2.5
U39
1 5 T125 T129 T128
IN OUT

2
TPC28tTPC28tTPC28t R119
2 JP4 2MM_OPEN_5MIL 100KOhm +V3.3SUS
GND R342 TP2 / U13

1
3 4 1 2 TPC28t 1 1 2 2 1 8 TP7
EN LEAA ADJ +V2.5 VIN PGND

1
2 7 TPC28t
VFB AGND

1
MIC5233BM5 16.9KOhm C488

1
3 VOUT0 VCCA 6
1
R344 R113

1
1U 1 2 4 5

GND
+V1.25S 1 2 VOUT1 REFEN
C123 Vref = 1.24V 10KOhm

100KOhm
D 1U JP5 2MM_OPEN_5MIL 100KOhm D

6
/ CM8562 Q15A
2

1
10UF/10V

10UF/10V
CE4 UM6K1N

2
C159

C169
100U/2V 2

R118
C152
0.1UF/25V

3
Q15B

1
TP14 TP15 UM6K1N
TPC28t TPC28t 5 SUSB#_PWR 45,47,49,51
JP27 1MM_OPEN_5MIL
/

4
+3VALWAYS_M 1 1 2 2 +V3.3A

JP26 1MM_OPEN_5MIL
/
+3VALWAYS_T 1 1 2 2
+3VALWAYS_T

T29 +V2.5
TPC28t

1
JP16 1MM_OPEN_5MIL

1
/

2
TPC28t
T142 +V1.5SUS

2
C C

1
T45
TPC28t TP10

1
T162 TPC28t TP8
JP15 TPC28t +1.8VO TPC28t

1
1
R157 100KOhm U22

1
1MM_OPEN_5MIL

1
/ 45,46,47 SUSC#_PWR 1 2 1 EN GND4 8
2 IN GND3 7
2 1 2 3 6
+V1.8 1 2 OUT GND2
(0.6A) 4 FLG GND1 5
TPC28t 1MM_OPEN_5MIL
T26 TPC28t JP19
+V3.3SUS T151 / MIC37101
+15VOSUS
U21
1

1 IN OUT 5

1
10UF/10V

10UF/10V
2 GND
1

C234

C208
3 4 C217
EN ADJ
R154

2.4KOhm

0.1UF/25V
SI9183DT

2
1

Vref=1.215V C200
1

C207 4.7u
1

1U
R158
2

10KOhm
2

B B

A A

Title : 1.25V&1.8V
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 44 of 54
5 4 3 2 1
5 4 3 2 1

T39
TP9 +V5A TPC28t AC_BAT_SYS
TPC28t TP5
TPC28t

C193 10UF/25V
JP24

1
VREF5 1 1 2 2

1
1MM_OPEN_5MIL

4
/ C465

D1_1

S1/D2_3 D1_2

G2

S2
JP10

2
2 1
+1.5VO +2.5VO +2.5VGND 1 2

S1/D2_2

S1/D2_1
0.1UF
+2.5VO SHORT_PIN T164 T34 T32 TP1
/ TPC28tTPC28t TPC28t +V2.5 TPC28t

G1
JP6

1
VREF5

R169 8.06KOhm
100KOhm
D C218 L46 (5A) D
C227 2 +2.5VO

1
1 1 1 2 2

1
0.001uF/50V
ON_1.5 3900P Q22 SI4814DY 5.2UH 3MM_OPEN_5MIL

2
1

10UF/10V
+ /

C176
R176 T75 T120 T84 CE6

2
R150 R167 20.5KOhm R182 12.7KOhm TPC28t TPC28t TPC28t 120UF/4V

1
1% D35

2
1 2
330Ohm R174

2
6
Q28A 1N4148W-A2
2

2
330Ohm

1
UM6K1N C210

2
R326 +V1.5S TP3

1
2 2 1
Q28B 0.01UF/10V AC_BAT_SYS (1.5A) TPC28t

2
1 2
3

UM6K1N 1 C241

2
0.1UF/25V
10KOhm R327 AC_BAT_SYS

1
/
SUSB#_PWR_15 5 1 2 T135
TPC28t

0.01UF/10V

R179 2.7Ohm
1 2

2
10KOhm
4

11-03

VREF5

C195 10UF/25V
R181 5.36KOhm JP22

2
2 1 Q25 2MM_OPEN_5MIL

1
C461 0.1UF
C239 0.1UF/25V /
/ 1 8

1
D1_1 G1

C242
+2.5VGND T33

1
D61 1N4148W-A2 C230 +1.5VGND TPC28t +1.5VO

2
0.1UF/25V
2 7

1
D1_2 S1/D2_3
2 1 3300P C235 L45

1
C221 2 +1.5VO

1
3 G2 S1/D2_2 6 1
D34

48
47
46
45
44
43
42
41
40
39
38
37
5600P

2
R497 267KOhm U23 10UH (2.0A)

2
1 2 4 S2 S1/D2_1 5
SUSB#_PWR_15 R175

2
1 2

INV1
FLT
LH1

LL1

OUTGND1
TRIP1
VIN_SENSE12
TRIP2
OUTGND2
OUT1_U

OUT1_D

OUT2_D
44,47,49,51 SUSB#_PWR

1
2.7KOhm 1N4148W-A2 SI4814DY +
1
T145 CE28
1

C C
C662 R173 JP12 TPC28t 100U/2V
+1.5VGND

1
1 FB1 LL2 36 1 2
0.1UF 1.8KOhm ON_2.5

2
2 SS_STBY1 OUT2_U 35
SHORT_PIN MCH_OK 43
2

3 INV2 LH2 34
/
2

4 FB2 VIN 33 +3VALWAYS_T


ON_1.5 5 32 parallel
SS_STBY2 VREF3.3 +5VO
11-03 6 31 VREF5 VREF5
PWM_SEL VREF5

100KOhm
7 CT REG5V_IN 30
8 GND LDO_IN 29 2 1 C462 0.1UF/25V R130 20mOHM R177

1
C22347pF/50V

9 28 / 1 2
REF LDO_CUR
1

3
R165 1 100KOhm2 +VCCP TP4 3
0.1UF/25V

10 STBY_VREF5 LDO_GATE 27 D
1

1 2 11 26 (1A) TPC28t
STBY_VREF3.3 LDO_OUT JP9

VIN_SENSE3
R164 100KOhm 12 25 Q35

PG_DELAY
STBY_LDO INV_LDO

SS_STBY3

OUTGND3
/ 11
2

1
1 1 2 2

1
OUT3_U

OUT3_D
2N7002

4.7uC215
1U
2

2
G

PGOUT
2 S

TRIP3
AC_BAT_SYS 1MM_OPEN_5MIL

INV3

5
6
7
8
FB3

LH3

LL3
C219

2
C229
Q24

D
SUSB#_PWR TPS5130 / TP11 3

13
14
15
16
17
18
19
20
21
22
23
24
SI4800DY TPC28t R393 C

S
VREF5 +1.2VGND C456 0.1UF/25V 1 2 1 B
100KOhm

/ Q34

1
VREF5 2 1
1

T140 10KOhm E
2.7KOhm

4
3
2
1
TPC28t 2 PMBS3904
R149 2 1 R324 18.7KOhm R325
6

Q27A +1.05VO

1
1 2 1 2
1

1
UM6K1N C209 C204 D33

C192 0.1UF/25V
1

1
R155

100U/2V
1N4148W-A2 4.7KOhm R394
2

2 2 1 +

CE8
0.01UF/10V T136 T73
7.5KOhm
C203 0.1UF/25V

33KOhm
3

Q27B TPC28t AC_BAT_SYS TPC28t


1

C205 0.1UF/25V

0.1UF
1

2
2200P

UM6K1N /
1

2
B B
1

SUSB#_PWR

C194 10UF/25V
1

2
5
1

1
R152

R146
4

2
C201

1 2
Q23
2

49.9KOhm T36 T35 TP6

2
1 8 TPC28t TPC28t +V1.2S TPC28t
D1_1 G1
L44 JP7
2

VREF5
100KOhm

R147 +1.2VO

1
2 D1_2 S1/D2_3 7 1 2 1 1 2 2

ON_2.5 680Ohm 3 6 3.3UH (2+1A) 2MM_OPEN_5MIL (2A)

1
G2 S1/D2_2
+ /
1

4 5 CE7
S2 S1/D2_1
T79 T83
1

R151 SI4814DY TPC28t TPC28t 220UF/2V


1

C206

2
Change R148 for choosing 852 or 855 platform
6

Q29A 0.001uF/50V R148

1
UM6K1N 22K (10-003412230):1.2V for 855GM/852GM
2

C211 30KOhm JP11


2

2
30K (10-003413030):1.35V for 855GME +1.2VGND 1 2
Q29B 0.01UF/10V
39.2K(10-003413932):1.518V for 852GME/852GMV
1

1
3

UM6K1N SHORT_PIN
2

/
SUSC#_PWR_25 5
4

11-03 NB JP23

D62 / VCC,VCCASM,VCCHL,VCCAGPLL,VCCADPLLA,VCCADPLLB: +V5A 1 2 +V5SUS


A A
1N4148W-A2 855GM/852GM: 1.2V SHORT_PIN
/
2 1
855GME: 1.35V
R498 0Ohm 852GME/852GMV: 1.5V
1 2 SUSC#_PWR_25
44,46,47 SUSC#_PWR

Title : 2.5V&1.5V&1.2V&1.05V
1

C663
0.1UF Engineer: Adams Lin
/ ASUSTek COMPUTER INC. NB1
Size Project Name
2

Rev
Custom A6G 1.0
11-03 Date: Friday, October 15, 2004 Sheet 45 of 54
5 4 3 2 1
5 4 3 2 1

6
Q37A
UM6K1N R330
2 1 2 VREF5
100KOhm

3
Q37B
UM6K1N
D 5 SUSC#_PWR 44,45,47 D

1
4
R328
100KOhm
T55
TPC28t

2
1
3V_ON
42 3V_ON
T54
TPC28t
AC_BAT_SYS

1
C261 AC_BAT_SYS

1
1 2

C254 10UF/25V
0.001uF/50VC250 R184 10Ohm
(BAT LOW)

1
D36

2
1

1
3 1UF C252
50 SHUT_DOWN#

2
2 0.1UF/25V

0.01uF/25V

0.01uF/25V

2
RB715F

2
1

1
D52 1
42,49 FORCE_OFF# 3
C259

C258
2 T52
T163 TPC28t
2

2
RB715F TPC28t +12VO
C Q33 C

D20

1
VOUT 1

1
+5VO 1 2 3 VIN
GND 2
SI4814DY FS05J10TP
R192 107KOhm

Q38

4
L78L12ACUTR
U25 +5VAO will be
1

1
D1_1

S1/D2_3 D1_2

G2

S2
180P

32
31
30
29
28
27
26
25
1

LTC3728LX shutdown when

1
C231 T152 T156 T149

S1/D2_2

S1/D2_1
SENSE1-
SENSE1+

TG1
SW1
NC_3

RUN/SS1
NC

PGOOD

shutdown T58 TPC28t TPC28t TPC28t C228


C267

TPC28t 4.7u +5VO

G1
LTC3728LX
2

4.7u
C253 0.1UF R160
2

2
1

1
1 VOSENSE1 BOOST1 24 1 2 1 2
2 PLLFLTR VIN 23
1

20KOhm

3 22 +5VAO D21 L23 4.7UH 10mOhm (4.5A)


PLLIN BG1 +5VO
4 FCB EXTVCC 21 1
5 20 +5VAO 3
ITH1 INTVCC

1
6 SGND PGND 19 2 +

1
7 18 C257 0.1UF CE9 C214
3.3VOUT BG2
R195

RB717F T131 T153 T168 T169


2

8 17 1 2
VOSENSE2

ITH2 BOOST2 100UF/6.3V 1UF/10V TPC28t TPC28tTPC28t TPC28t


SENSE2+
RUN/SS2
SENSE2-

AC_BAT_SYS

2
TPC28t T172
NC_1

NC_2
C268 0.001uF/50V

33 1
SW2
TG2

SIDE1
1

C272 10UF/25V

C289 10UF/25V

1
1
C251
C269 0.001uF/50V

1
4.7u C275
10
11
12
13
14
15
16
9

1U
1

2
2

2
220PF/16V

B B
C265 220PF/16V
2

2
1

4
1

D1_1

S1/D2_3 D1_2
C266

G2

S2
Q47
R196 150KOhm

R197 150KOhm

C263
2

SI4814DY
1

S1/D2_2

S1/D2_1
0.001uF/50V
T62 T59 T38 T155
2

TPC28t TPC28t TPC28t TPC28t

G1
C264 180P +V3.3SUS
L49 R213

5
2 1
2

1
1 2 1 2
R198 R193
1 2 1 2 +V3.3SUS 5.2UH 10mOhm (4.5A)

1
20KOhm 64.9KOhm +

1
CE10 C281
Vref = 0.8 V 120UF/4V 1UF/10V

2
T28 T134 T132
TPC28t TPC28t TPC28t

1
A A

Title : SYSTEM
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 46 of 54
5 4 3 2 1
5 4 3 2 1

T241 T242
Q103 TPC28t TPC28t
SI2304DS
JP44

1
3 2 1 2

2 S
D
+2.5VO 1 2 +V2.5S

1
C661 1MM_OPEN_5MIL (0.5A)

G
/

1 1
0.1UF/25V

2
D D

11-01
T161 T40
Q31 TPC28t TPC28t
SI2304DS
JP17

1
3 2 1 2

2 S
D
+1.8VO 1 2 +V1.8S

3
1MM_OPEN_5MIL (0.3A)

1
C224 /

1 1
0.1UF/25V

2
T216 T60
TPC28t TPC28t

6
5
4
Q75
PMN45EN JP29

1
1 1 2 2 +V3.3

D
T185 T157 2MM_OPEN_5MIL (1.5A)

G
TPC28t TPC28t /

1
2
3
1

+V3.3SUS
T63 T64 T14

6
5
4
TPC28t TPC28t TPC28t
Q74

S
C C
PMN45EN JP28

1
1 1 2 2 +V3.3S

G
2MM_OPEN_5MIL (1.8A)

1
/

1
2
3
C496
0.1UF/25V
T113 T148 T139

2
TPC28t TPC28t TPC28t

JP14
1

1
+5VO 1 1 2 2 +V5
3MM_OPEN_5MIL (3.75A)
1

/
R315

100KOhm
6

Q61A T143 T141 T130

6
5
4
UM6K1N TPC28t TPC28t TPC28t
2

Q26

S
2
PMN45EN JP13
1

1
1 1 2 2 +V5S
3

D
Q61B

G
UM6K1N 3MM_OPEN_5MIL (2.5A)
SUSB#_PWR /

1
2
3
5
4

0.1UF
1

1
B T176 T167 B

1
TPC28t TPC28t C197
20,40,42 PM_SLP_S4#

C196
R205 0.1UF/25V
JP39

2
100KOhm
1

20,40,42 SUSC#_3 1 2
T175 T124
TPC28t SHORTPIN TPC28t

2
/
JP18
1

1
+12VO 1 1 2 2 +V12
T47
TPC28t 1MM_OPEN_5MIL
1

/
R161 T85
44,45,46 SUSC#_PWR
TPC28t
1

100KOhm
T146 Q30
TPC28t
2

1
+V12S
C

4
3

E
47K

44,45,49,51 SUSB#_PWR
1

1
1

T53 R162 R203


TPC28t
47K
2

10K
B

100KOhm 100KOhm
47K

JP40
1

2
1

1 2
C

20,24,26,42 SUSB#_3
SHORTPIN UMC4N
/
20,24,26,42 PM_SLPDLY_S3#

A A

Title : LOAD SYWITCH


ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 47 of 54
5 4 3 2 1
5 4 3 2 1

T8 T80
TPC28tTPC28t

R376

1
1 2 +2.5VREF
4.7KOhm
A/D_VIN
T67
TPC28t 1 2 AC_BAT_SYS
R199
CI 3.3KOhm 3

1
12-01
D C Q44 D

1
T65 1 B 2SC2411K
TPC28t C278 47pF/50V R212 T190 T180
C279 0.01UF/25V 1 2 / E TPC28t TPC28t
D51 R388 2 1 10Ohm 2
U28

1
C277

1
1 2 1 2
R208 10KOhm C276 0.01uF/25V CS+ VFEB R206 10KOhm C280 0.01uF/25V Q45

1
1 EA1+ EA2+ 16

4
3
2
1
F01J2E 1KOhm 1 2 1 2 CS- 2 15 1 2 1 2 Q46 2 SI4835BDY 10UF/25V CC+ CC-
R210 EA1- EA2-

2
E
3 14

S
C.I VREF

G
49 CHG_EN# 1 2 4 D.T O.C 13
5 12 VCC_AD B 1 T187 T179
CT VCC

D
C
100KOhm 6 11 TPC28t TPC28t
RT C2 2SA1036K
3
7 GND E2 10
L48 R209

5
6
7
8
8 C1 E1 9

1
1 2 1 2 BAT

1
TL494CD

1
C287 R214 22UH 50mOhm
C529

2
0.1uF/10V 9.1KOhm

0.001uF/50V

1
2

5750
7343
D25 + C271

2
EC31QS04 15UF/25V

2
1
C288 T154 T30
TPC28t TPC28t
1U
JP20

1
1 2

SHORT_PIN
C C
/

A/D_VIN A/D_VIN_O
1

R201 R204

10KOhm 10KOhm I1
2

C273
CS- CS+ 1 2 CS- +2.5VREF

0.01uF/25V
1

1
BAT_S
R200 R352 R361
R365 10KOhm
100KOhm 100KOhm I2 10KOhm 1%
C513 0.01uF/25V 1%
1

C520 C521 CI TP16


2

2
RC 1 2 1 2
97.6KOhm

220PF/16V

B R355 TPC28t B
1
R202

C274

1UF/25V 1UF/25V +2.5VREF TP17 C512 0.1UF


V1 1 2
TPC28t BAT_SEL
2

1
2 1 1 2
681Ohm High: 4S1P/1.4A(4 Cell)
1

R378 Q81A
1

Low : 4S2P/2.5A(8 Cell)

6
R353 VFEB 8.45KOhm UM6K1N
I3
I4 1KOhm R360 2 BAT_SEL 31,49
1

20KOhm
21KOhm

90.9KOhm
2

1
R356

R357

R379

2
TP18 D48 1 2
TPC28t 1N4148W-A2 U50
VCC_AD 1MOhm
2

2 1 1 VOUT1 VCC 8
1

Current sharing = 3.1A 2


3
VIN1- VOUT2 7
6
VIN1+ VIN2- CC+
4 GND VIN2+ 5 1 2
1

1
C528 C506 R366
A/D_VIN=19V R362
LM358ADR
7.5KOhm
0.01uF/25V 0.1UF/25V R367
A/D_VIN_O=19V-3.1A*50mohm=18.845V 10KOhm 2 100KOhm

2
TP19 1%
CS+=CS-=19*(100/110)=17.272727V TPC28t
2

2
I1=(18.845V-17.272727V)/10K=0.15723mA
1

V1=17.272727V-(0.15723mA*100K)=1.5497V
CC-
I4=1.5497V/1K=1.5497mA 1 2 1 2

R363 R364
A I3=1.5497mA-0.15723mA=1.39247mA 100KOhm 7.5KOhm A

RC=(2.5V-1.5497V)/1.39247mA=681 ohm

Title : CHARGER
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 48 of 54
5 4 3 2 1
5 4 3 2 1

TP20
+5VLCM
TPC28t
U27

2
R207 SOT23_S5_NB

1
5 VCC NC 1
C256 2
100KOhm SUB T173 T182 T1
1U 4 VOUT GND 3
T183 T184 T31 T137 T37 TPC28t TPC28t TPC28t

2
TPC28t TPC28tTPC28tTPC28t TPC28t
PST9142

1
U26

1
1

1
D
41 CHG_LED_UP 1 RA2 RA1 18 AC_APR_UC 42,50 D

48 CHG_EN# 2 RA3 RA0 17 TS# 50


3 T0CKL OSC1/CLKIN 16
1 2 4 15 TP21
31 CHG_FULL_OC MCLR#/Vpp OSC2/CLKOUT
5 14 TPC28t
D23 RB751V_40 Vss Vdd BAT_LLOW
31 SMC_BAT 6 RB0 RB7 13

1
31 SMD_BAT 7 RB1 RB6 12 BAT_SEL 31,48
PWR_LED_UP 8 11
41 PWR_LED_UP RB2 RB5
44,45,47,51 SUSB#_PWR 9 RB3 RB4 10

PIC16C54C
3 RN78B T177 T178 TP22
10KOhm 4
TPC28t TPC28t TPC28t
1 RN78A
+V3.3SUS 10KOhm 2

1
BAT_LLOW#_OC 31
X4

1
4MHz

1
1 2 C284

3
3
D

1
+/-30PPM/20pF C523 1UF/10V
C522 Q39

2
15PF/50V 15PF/50V BAT_LLOW 11
2N7002

2
G
2 S

2
C C

T74
T197 T188 T196 T194 TPC28t
TPC28t TPC28t TPC28t TPC28t
THERMAL PROTECTION

1
L27 1KOhm/100MHz +V5A
Place under CPU
1

1 2 BAT_S

2
R354
L28 150Ohm/100Mhz
1 2 33.2KOhm
BAT
T186 /
TPC28t R358

1
T189 T192 T193 2 2 1 1
J4 TPC28t TPC28t TPC28t

1
1 1 100KOhm
B
2 2 / B
L26 1KOhm/100MHz 1KOhm/100MHz
1

3 3
L25 SMC_BAT C502
4 4 1 2
5 1 2 SMD_BAT 2 1
5 TS#
6 6 1 2
7 7 0.001uF/50V
8 L24 1KOhm/100MHz / T181
8 U47 TPC28t
1

1
C286 100PF

C285 100PF

C282 1 5
BATT_CON_8P 0.1UF/25V NC VCC
0.1UF/25V

2 SUB
1

1
3 GND VOUT 4 FORCE_OFF# 42,46
T170 T56
2

TPC28t TPC28t PST9013


/
2

C283

A A

Title : PIC16C54
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 49 of 54
5 4 3 2 1
5 4 3 2 1

AC_BAT_SYS

1
+5VLCM

470KOhm
R5 R6
(H/W Battery low

1
T4
shutdown is 11.6V)

R2
47KOhm 100KOhm TPC28t

T5

2
TPC28t

1N4148W-A2

1
SHUT_DOWN# 46

2
2
1

2
11-04

10KOhm
D +5VCHG 4 5 6 T66 D

1
E

D28
U1 +5VLCM D1 Q2 TPC28t

1
C

BC847BPN

R1
LM393DR RB715F B B

8
C E

1
BAT_IN#_OC 31

1
3 2 1

V+
OUTA

OUTB
R215

2
47KOhm +5VLCM

3
3 Q49
D

1
4.7u
(9.66V) 2N7002

1
C5

1
AC_APR_UC 11 R372 R373

+A

+B

V-
-A

-B

C4
R371 0.1UF/25V

2
G
2 S 100KOhm 100KOhm 100KOhm

6
3

2
Q76A

2
UM6K1N

2
2
T7

3
TPC28t +2.5VREF

1
Q76B
R4 R216 R8 R7 UM6K1N

C3 0.1UF/25V
5

1
1

C9 0.1UF/25V
BAT_S 2 1 1 2 1 2 1 2 A/D_VIN

4
365KOhm 100KOhm 51.1KOhm 143KOhm
1

1
C501

2
C6 C8 0.001uF/50V

2
0.1UF/25V 0.1UF/25V
2

2
T61
TPC28t
C C

1
TS# 49

T68
TPC28t A/D_VIN_O

T10
1

T6 TPC28t
T76 T77 T78 T71 TPC28t T3 T9 T69
AC_BAT_SYS
TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t TPC28t
D30

1
41,48 A/D_DOCK_IN
R220

1
1
A/D_VIN AC_BAT_SYS
1

1
A/D_DOCK_IN 1 2 2
3
50mOhm
T89 FD6JK3TP

11-05
TPC28t
1

R395
1
1

31 ACIN_OC
100KOhm R499
3

3 100KOhm Q41
2

D +5VO
B 8 D S 1 T2 B
BAT
Q48 TPC28t
2

7 2
11 ACIN_OC# 6 3
2N7002 G T70 5 4 +5VCHG D29 +5VLCM
S 2 G
TPC28t A/D_VIN

1
1

1
3 Q51
2

3
C TPC8107 R188 3 1 +5VCHG 2
B 1 INPUT OUTPUT
1

GND

1
22KOhm F02JK2E
7 RN1D E R3
10KOhm 8 2 PMBS3904 RN1C L78L05ACUTR T72

2
1KOhm
5

Q50 10KOhm TPC28t

2
1

+2.5VREF

LM4040BIM3_2.5
1

1
RN1B C301 C310 C311 +2.5VREF

1
3 10KOhm 4

1
R187 C299
2

1
0.1UF/25V 1U 1U

1
11-05
30KOhm 1U
6

2
C297

2
3
2 1UF/10V

2
U30

2
6

Q42A GND
RN1A UM6K1N
+V5 1 10KOhm 2 2
1
3

Q42B
UM6K1N
A A
42,49 AC_APR_UC 5
4

When system turn on by adapter


power, " AC_APR_UC " will issue
high, turn off Q41, to prevent AC Title : BATLOW/SD#
power go into battery.
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 50 of 54
5 4 3 2 1
5 4 3 2 1

6
Q99A Q100A
R413 UM6K1N UM6K1N R415
VREF5 1 2 2 2 1 2 VREF5
100KOhm 100KOhm T218

1
N/A TPC28t

3
Q99B Q100B
R414 UM6K1N UM6K1N R416
SUSB#_PWR

1
D 1 2 5 5 1 2 SUSB#_PWR 44,45,47,49 D

4
1

1
100KOhm 100KOhm
C539 C540
0.1UF/25V 0.1UF/25V

2
(2.5A)
AC_BAT_SYS

1
C541 1 2 AC_BAT_SYS

10UF/25V
0.001uF/50V R417 10Ohm

1
C542

1
C556
1UF C557

2
0.1UF/25V
0.01uF/25V

0.01uF/25V

2
2
1

1
C543

C544
(4A)
2

2
C +VDD_VRAM C
3728_INTVCC
JP41
2.5VFO 1 2
1 2
T220 3MM_OPEN_5MIL
1

U55 TPC28t
1

Q95
180P

32
31
30
29
28
27
26
25
1
21.5KOhm

R494 LTC3728LX
R418

100KOhm (4A) T221 T222 T223

1
1 8
SENSE1-
SENSE1+
NC_3

RUN/SS1

TG1
SW1
NC

PGOOD

D1_1 G1
+5VO TPC28t TPC28t TPC28t
C545

2.5VFO
2

2 D1_2 S1/D2_3 7
C554 0.1UF L66 R425
2

1
1 VOSENSE1 BOOST1 24 1 2 3 G2 S1/D2_2 6 1 2 1 2
2 PLLFLTR VIN 23
3 22 D55 4 5 3.3UH 10mOhm
PLLIN BG1 +5VO S2 S1/D2_1
4 FCB EXTVCC 21 1
11-15
5 20 3728_INTVCC 3
ITH1 INTVCC

1
6 19 2 SI4814DY +
SGND PGND

1
7 18 C555 0.1UF CE34 C558
3.3VOUT BG2 RB717F T224 T225 T226
8 17 1 2 120UF/4V
VOSENSE2

ITH2 BOOST2 1UF/10V TPC28t TPC28t TPC28t


SENSE2+
RUN/SS2
SENSE2-

2
TPC28t T219
NC_1

NC_2
C546 0.001uF/50V

33 1
SW2
TG2

SIDE1
1

1
10KOhm

C552 C553
C548 0.001uF/50V
1

4.7u 4.7u AC_BAT_SYS


10
11
12
13
14
15
16
9

2
1

C562 10UF/25V

C560 10UF/25V
5
6
7
8

1
B R495 B
R419

C547 220PF/16V

100KOhm Q96 C561


2

D
/
Vref= 0.8 V SI4800DY 1U
2

2
G

S
1

10KOhm

220PF/16V /

4
3
2
1
JP42
R420 150KOhm

C551
2
1

0.001uF/50V 1 1 2 2
T227 T228 (10A) T229 T230 T231 (10A)
2
1

TPC28t TPC28t TPC28t TPC28t TPC28t 3MM_OPEN_5MIL


C550 180P VGACORE +VGACORE
JP43
R421

C549

2 1 L67 R426
2

1
1 2 1 2 1 1 2 2
R422 R423
2 1 2 1 VGACORE 1.5uH 5mOhm 3MM_OPEN_5MIL

220UF/2V

220UF/2V
5
6
7
8
11-06

1
39.2KOhm 10KOhm Q97 + + C559

D
SI4894DY-TI 1UF/10V

2
T232 T233 T234

2
CE35

CE36
1

TPC28t TPC28t TPC28t


4
3
2
1
R424
22.6KOhm

1
2

T235 PWR_PLY = H , 1.358V


3

A 3 A
D PWR_PLY = L , 1.0V
Q101
11
1

12 PWR_PLY 2N7002
G
2 S
2

Title : VGACORE
ASUSTek COMPUTER INC. NB1 Engineer: Adams Lin
Size Project Name Rev
Custom A6G 1.0
Date: Friday, October 15, 2004 Sheet 51 of 54
5 4 3 2 1
5 4 3 2 1

SCREW HOLE

For MDC module For CPU heat-pipe For VGA heat-sink Screw holes for
H20 H18 H21 PCMCIA socket
D H14 H4 H22 are combined to D
1
2
NP_NC GND8 9
8
1
2
NP_NC GND8 9
8
1
2
NP_NC GND8 9
8
1 1 1
C217D130
PCMCIA socket
GND1 GND7 GND1 GND7 GND1 GND7 c181d47_paste181 C268B178D138
3 GND2 GND6 7 3 GND2 GND6 7 3 GND2 GND6 7 footprint!
4 GND3 GND5 6 4 GND3 GND5 6 4 GND3 GND5 6
5 5 5 H16 H7
GND4 GND4 GND4 H23
1 1
C276D91N C276D91N C276D91N c181d47_paste181 C268B178D138 1
C217D130
H3 H11 H5
1 H24
1 NP_NC GND8 9 1 NP_NC GND8 9 C268B178D138 1
2 GND1 GND7 8 2 GND1 GND7 8 C217D130
3 GND2 GND6 7 3 GND2 GND6 7
4 6 4 6 H6
GND3 GND5 GND3 GND5
GND4 5 GND4 5 1
C268B178D138
C276D91N C276D91N

H8 H19

1 NP_NC GND8 9 1 NP_NC GND8 9


2 GND1 GND7 8 2 GND1 GND7 8
3 GND2 GND6 7 3 GND2 GND6 7
4 GND3 GND5 6 4 GND3 GND5 6
GND4 5 GND4 5

C276D91N C276D91N
C C
H1

1 NP_NC GND8 9
2 GND1 GND7 8
3 GND2 GND6 7
4 GND3 GND5 6
GND4 5

C276D91N

H10 H9

1 NP_NC GND8 9 1 NP_NC GND8 9


2 GND1 GND7 8 2 GND1 GND7 8
3 GND2 GND6 7 3 GND2 GND6 7
4 GND3 GND5 6 4 GND3 GND5 6
GND4 5 GND4 5

C276D91N C276D91N

B EMI CAP. B

+V5 AC_BAT_SYS
1

C696 C697

0.1uF/10V 0.1UF/25V
2

11-19

A A

Title : SCREW HOLE & EMI CAP


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 52 of 54
5 4 3 2 1
5 4 3 2 1

PCB STACK-UP POWER INTERFACE PCI INTERFACE SSID/SVID


PCB THICKNESS: 1.6 mm SIGNALS TYPE POWER PCI_REQ# DEVICE SSID SVID
CLK_EN# I +V3.3S_CLK CB&1394 PCI_REQ#0 LAN 1045 1043
L1 TOP
PM_PSI# O +VCCP MINIPCI PCI_REQ#1 MDC 1826 1043
L2 VCC
VR_VID[5:0] O +VCCP LAN PCI_REQ#2 1394 1897 1043
L3 IN1
D
CPU_VRON O +V3.3SUS Audio 1893 1043 D

L4 IN2
VRM_PWRGD I +V3.3S PCI_GNT# CardBUS 1894 1043
L5 GND
PM_STPCPU# O +V3.3S CB&1394 PCI_REQ#0 VGA (ATI M11-P) 1942 1043
L6 BOT
CHG_LED I +5VLCM MINIPCI PCI_REQ#1 VGA (ATI M11-CL) 1872 1043
RST_BTN# O OD LAN PCI_REQ#2
OTP_RESET# I +V5
SHUT_DOWN# I AC_BAT_SYS IDSEL
+5VLCM PWR +V5 CB&1394 PCI_AD21
IMPEDENCE PM_SLPDLY_S3# O +V3.3 MINIPCI PCI_AD20
Single-Ended PM_SLP_S4# O +V3.3SUS LAN PCI_AD16 Thermal
BAT_LEARN I +V3.3
27.4 OHM WIDTH CPU Throttling( BIOS setting ):
BAT_LLOW#_OC I +V3.3 PCI_INT#
TOP/BOT 18 mils 100 degree C.
BAT_IN#_OC I +V3.3 CB&1394 PCI_INTB/A/D# System shutdown( BIOS setting ):
37.5 OHM WIDTH ACIN_OC I +V3.3 MINIPCI PCI_INTC/D# 110 degree C.
TOP/BOT 11 mils CHG_FULL_OC I +V3.3 LAN PCI_INTC#
C IN1/IN2 9.5 mils PM_DPRSLPVR O +V3.3S C

42 OHM WIDTH AC_APR_UC I +V5A


TOP/BOT 9 mils +V5A PWR VREF5
IN1/IN2 7.5 mils 3V_ON O OD Power Jumper:
50 OHM WIDTH AC_BAT_SYS PWR DC
JP4: +V2.5 --Power In
TOP/BOT 6 mils A/D_DOCK_IN PWR DC
IN1/IN2 5 mils JP5: +V1.25S
SMC_BAT I/O +V3.3
JP6: +V2.5
55 OHM WIDTH SMD_BAT I/O +V3.3
JP7: +V1.2S
TOP/BOT 5.5 mils
IN1/IN2 4.5 mils JP9: +VCCP
JP13: +V5S
75 OHM WIDTH
JP14: +V5
TOP/BOT 4 mils
IN1/IN3 3.5 mils JP15: +V1.5SUS
JP16: +V2.5 --Power IN
POWER PLANE JP17: +V1.8S
Differential
POWER VOLTAGE CURRENT JP18: +V12
B
70 OHM WIDTH/SPACE +VCORE 1.46V 27A JP19: +V1.8 B

TOP/BOT 9 mils/ 4 mils +VCCP 1.05V 3.73A JP22: +V1.5S


IN1/IN2 7.5 mils/ 4 mils +VGACORE 1.36V 10A JP24: VREF-->+V5A
85 OHM WIDTH/SPACE +VDD_VRAM 2.5V/1.8V 6.1A JP26: +3VALWAYS_T-->+V3.3A
TOP/BOT 5.5 mils/ 4 mils +V1.2S 1.2V 3.1A (Don't Short)
IN1/IN2 4.5 mils/ 4 mils +V1.25S 1.25V 3A JP27: +3VALWAYS_M-->+V3.3A
90 OHM WIDTH/SPACE +V1.5S 1.5V 1.58A JP28: +V3.3S
TOP/BOT 5.5 mils/ 5 mils +V1.5SUS 1.5V 0.07A JP29: +V3.3
IN1/IN2 4.5 mils/ 5 mils +V1.8 1.8V 0.14A JP32: KBCRSM
100 OHM WIDTH/SPACE +V1.8S 1.8V 0.445 A JP41: +VDD_VRAM
TOP/BOT 6 mils/ 11 mils +V2.5 2.5V 7.5A JP42: +VGACORE
IN1/IN2 5 mils/ 12 mils +V2.5S 2.5V 0.384A JP43: +VGACORE
110 OHM WIDTH/SPACE +V3.3 3.3V 2.07A JP44: +V2.5S
TOP/BOT 5 mils/ 13 mils +V3.3S 3.3V 3A
IN1/IN2 4 mils/ 12 mils +V3.3SUS 3.3V 0.5A
A +V5 5V 1.01A A

+V5S 5V 8.63A
+V5SUS 5V 0.5A
+V12 12V 0.25A
+V12S 12V 0.25A Title : M/B SETTING
ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 53 of 54
5 4 3 2 1
5 4 3 2 1

Rev Date Description Rev Date Description

R1.0 09/14 '04 First Release! R2.0 1. Power: Change R199 from 3.3K ohm/0603 to 3.3K ohm/0805 (P/N:
Pink 10-002303320). Page 48.
A6G platform is based on A6NE and adds external Graphics (ATI M11-P).
Block
R1.1 10/05 '04 1. Power: Add +V2.5S power plane for VGA chip. Page 47.
D Orange 2. Power: Add a 0 ohm between signal "CPU_VRON" and U9. Page 43. D

Block 3. Power: Add +2.5VO & +1.5VO sequence circuit. Page 45.
4. Power: The original part (P/N:07-003034010) used for Q2 will be EOL.
Change Q2 to new part (P/N:07-003188010). Page 50.
5. Power: When the system temperature rise high due to the system
running at heavy loading. The leak current(IR) of D30 schottky diode
will be increased, the H/W AC detect circuit will make a wrong state.
Net " ACIN_OC " will issue " high". To solve this problem, change RN1B
(10K ohm) to R499 (100K ohm) to make sure it will issue "low" at this
moment. Page 50.
6. Power: Fine-tune R421 & C549 for current compensation. Page 51.
7. Modify U32, R249, R251, R252 to according part. Page 6,7,8,9.
8. Change CE15, CE18 from Tantalum Capacitor to OxiCap. Page 9.
9. Factory finds that 47UF/6.3V Aluminum Electrolytic capacitor CE30,
CE31 will fail at soldering process in A3 model. Change them to
47UF/6.3V OxiCap. Page 36.
10. Factory finds that 100uF/6.3V Aluminum Electrolytic capacitor CE29,
CE11, CE12 will fail at soldering process in A3 model. Change them to
C C
100uF/6.3V OxiCap. Page 17,39.
11. Reserve C694, C695 to fine-tune SMBUS signal quality. Page 20.
12. Change C659 to Page 12, C660 to Page 23 to correspond with their
actual layout location. Page 12,23.
13. Because M11-P and M11-CL have different Chip ID, we don't need the
VGA chip GPIO10 to choose GPU type. Reserve it for other use. Page 12.
14. Change SW1~SW5 pad for SMT Manufacturability Improve. Page 41.
15. Power: Change L66 to 3.3uH (P/N: 09-02X333C00). Page 51.
16. Modify Audio AMP (U7) from GMT G1420 to TI TPA0102 for cost-down.
Page 36.
17. Base on Factory's request : modify D-SUB CN7, CON9 (only for 1.6mm
thickness PCB). Page 18,33.
18. To decrease the part type on M/B, change SW6 to 5-pin switch same
as SW1~SW5. Page 42.
19. EMI: Add L81, C696,C697. Page 36,52.
20. BUG: system cannot be turn-off. The reason is that PCI clock for
ICH4-M should be Free-Running, but in A6G R1.0 we swap it with PCI
clock for KBC. Change it back in A6G R1.0. Page 23.
B 21. Modify net name. Page 23. B

22. Power: Change R199 from 3.3K ohm/0603 to 3.3K ohm/0805 (P/N:
10-002303320). Page 48.
23. Mount LED5 for A6 ID2. Page 41.

A A

Title : REVISION HISTORY


ASUSTek COMPUTER INC. NB1 Engineer: John Hung
Size Project Name Rev
Custom A6G 1.1
Date: Friday, October 15, 2004 Sheet 54 of 54
5 4 3 2 1

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