B na.v0.[A]U[H[1[P[P[O]-[C]OM Question Paper Code : 71725 BEB! ‘Tech. DEGREE EXAMINATION, APRILIMAY 2017. Third Semester Electronics and Communication Engineering EC 6302 — DIGITAL ELECTRONICS (Common to Mechatronics Engineering, Robotics and Automation Engineering) (Regulations 2013) Time : Three hours auhippo.com Maximum : 100 marks Answer ALL questions. PART A — (10 x 2= 20 marks) 1. Convert the given decimal numbers to their binary equivalent 108.364, 268.025, Show how to connect NAND gates to get an AND gate and OR gate? Draw the truth table and the logic circuit of half adder. Compare the function of Decoder and Encoder. Derive the characteristic equation of a D flip flop. What is the primary disadvantage of asynchronous counter? How does ROM retain information? Differentiate between PAL and PLA. the analysis of asynchronous sequential circuit? preraare es What are the steps for 10. What is the significance of state assignment? PART B — (6 x 13 = 65 marks) 11. (@)_Ausing K map find the MSP form of F = (03, 12-16) +d(7, 1), a3) Or () (State and prove De morgon's theorem. © @) Fhidu Mins end BinPOe Be Fe gd+bed+acd+abe+abed inh12, 13, 14, 16. 16. a oR gatesonly. (13) (@) Implement ¥=(A +0) (A+B) (A+B+ 0) using NOS or the use of NOT gates? (3) () (Why does a good logic designer on a Gi) Show that if all the gates ina two-level replaced by NAND gates the output function doe noe a (a) Design and explain the working of a synchronous moc Or (b) Using SR fipflops design a parallel counter which counts in the seavenes 000, 111, 101, 110, 001, 010, 000,... (@) (i) Compare static RAM and Dynamic RAM. “ 2 (i) Implement the switching functions. al=abde+abee+berde 2 auhippo.com Te 23 =be+de+ede+bd and 24=@Te+ce using a5*8*4 PLA. Or (®) (i) Distinguish between Boolean addition and binary addition. @) (i) Design a combinational circuit using a ROM that accepts a 3 bit number and generates an output binary number equal to the square of the given number. (10) (@) @ Summarize the design procedure for a synchronous sequential circuit. (10) Gi) Derive the state table of a serial binary adder. @) Or (©) What is the objective of state assignment in a asynchronous circuit? Give ti leant feos seslitios for fs | Hocker Soneton f(A, B, C, D) = M(G, 2, 6, 7, 8, 10, 12). (13) PART C—(1 x 15 = 15 marks) (@) A sequential machine has one input line where O's incident. The machine has to produ — two'0's are followed by aI’ or exactly tener of and 1’s are being (b) Find an expression for auhippo.com 71725