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    1. The document is a schematic diagram for a laptop computer that includes multiple system components such as the CPU, memory, graphics card, audio, network interfaces, and I/O ports. 2. The diagram shows the connections between the Penryn CPU, Crestline chipset, ATI M92S graphics card, memory, storage, and various peripheral interfaces. 3. Key components include the Penryn and Crestline chips, DDR2 memory, ATI M92S graphics, SATA and USB interfaces, and the ICH8 southbridge that connects the audio, network, and I/O ports.

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    NOT AGAIN

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    1. The document is a schematic diagram for a laptop computer that includes multiple system components such as the CPU, memory, graphics card, audio, network interfaces, and I/O ports. 2. The diagram shows the connections between the Penryn CPU, Crestline chipset, ATI M92S graphics card, memory, storage, and various peripheral interfaces. 3. Key components include the Penryn and Crestline chips, DDR2 memory, ATI M92S graphics, SATA and USB interfaces, and the ICH8 southbridge that connects the audio, network, and I/O ports.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    61 views55 pages

    2757548

    Uploaded by

    Netkom
    1. The document is a schematic diagram for a laptop computer that includes multiple system components such as the CPU, memory, graphics card, audio, network interfaces, and I/O ports. 2. The diagram shows the connections between the Penryn CPU, Crestline chipset, ATI M92S graphics card, memory, storage, and various peripheral interfaces. 3. Key components include the Penryn and Crestline chips, DDR2 memory, ATI M92S graphics, SATA and USB interfaces, and the ICH8 southbridge that connects the audio, network, and I/O ports.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 55

    VULCAIN Discrete

    SI Build
    2008.12.26

    EE DATE POWER DATE


    DRAWER
    DESIGN
    INVENTEC
    CHECK TITLE
    RESPONSIBLE VV Discrete
    SIZE = 3 VER : SIZE CODE DOC. NUMBER REV
    FILE NAME : XXXX-XXXXXX-XX A3 CS 1310A22294-0-MTR A01
    DATE CHANGE NO. REV P/N XXXXXXXXXXXX SHEET 1 OF 54
    TABLE OF CONTENTS

    PAGE PAGE PAGE


    5- DC& BATTERY CHARGER 15- CLOCK_GENERATOR 36- SYSTEM BIOS&ODD Extend/B
    6- SELECT & BATTERY CONN 16- PENRYN-1 37- HDD&ODD CONN
    7- SYSTEM POWER(3V/5V) 17- PENRYN-2 38- USB CONN
    8- SYSTEM POWER(+V1.8/+V1.25S) 18- PENRYN-3 39- KBC
    9- GRAPHIC POWER(+VGFX_CORE) 19- THERMAL&FAN CONTROLLER 40- KB&TP CONN
    10- SYSTEM POWER(+VCCP/+V1.5S) 20- Crestline-1 41- AUDIO CODEC
    11- CPU POWER(VCC_CORE) 21- Crestline-2 42- MDC CONN & AUDIO JACK
    12- DDR TERMINATION VOLTAGE 22- Crestline-3 43- NIC 10/100- CONTROLLER
    13- POWER(SLEEP) 44- NIC 10/100- RJ45 CONN
    23- Crestline-4
    14- POWER(SEQUENCE) 24- Crestline-5 45- MINICARD CONN & BLUETOOTH
    46- NEW CARD & SD/MMC
    25- Crestline-6 47- LED & BUTTON
    26- DDR2-DIMM0 48- SCREW
    27- DDR2-DIMM1
    28- DDR2-DAMPING 49- ATI M92S-1
    29- VGA CONN 50- ATI M92S-2
    30- LCM CONN 51- ATI M92S-3
    31- ICH8-1 52- ATI M92S-4
    32- ICH8-2 53- VIDEO RAM-1
    33- ICH8-3 54- VIDEO RAM-2
    34- ICH8-4
    35- ICH8-5

    INVENTEC
    TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 30-Nov-2008 SHEET 2 OF 54
    Penryn
    (478 uFCPGA)
    P.16

    V-RAM DDR2
    P.53 FSB

    LCM P.30 LVDS


    Crestline DDR2 DDR II _SODIMM0
    ATI PCI_EXPRESS P.26
    CRT M92S 965PM
    VGA P.49 DDR2 DDR II _SODIMM1
    P.29 (1299 PCBGA)
    P.20 P.27

    Clock Generator DMI


    ICS9LPRS355 SYSTEM SPI SATA HDD
    P.15 FIXED ODD BIOS
    P.37 P.36 P.37

    SATA

    USB2.0
    BLUETOOTH
    CNTR
    ICH8-M PCI_EXPRESS
    MAIN BATT
    P.45
    676 BGA
    USB0 P.31 LAN
    CNTR P.38
    MINI CARD New Card NIC 10/100
    USB1 CONN MARVEL
    Web CAM CONN
    CNTR P.38 CNTR (USB7) 88E8042
    System Charger & (USB4) P.30 P.46
    (WLAN) P.43
    DC/DC System power USB2
    P.45

    CNTR P.38

    SD/MMC CARD READER RJ45


    CNTR ALCOR AU6433 P.44
    P.46 (USB3) P.46
    HDA LPC

    MDC V1.5 AUDIO CODEC KBC


    CONNECTOR AD_1984A SMSC KBC1070

    P.42 P.41 P.39

    RJ11 Mic IN Headphone Speaker Keyboard TouchPad


    P.40 P.40
    P.42 P.41 P.41 P.41
    INVENTEC
    TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 30-Nov-2008 SHEET 3 OF 54
    LIMIT_SIGNAL ADP_EN
    OCP OCP_OC#
    ADP_PS0
    ADP_PS1 +V5A +V5S

    +V3A
    CHGCTRL_3 5/3.3V
    Charger
    Adapter ADP_PRES +V5AL
    (BQ24703) ADP_PRES KBC_PW_ON (TPS51120)
    (90W) +V3S
    +V3AL
    AC_AND_CHG

    +VBDC

    LR +V0.9S
    Main Battery
    BATSELB (G2997)
    +VBATA SLP_S3# M_VREF
    Selector
    AC_AND_CHG (Discrete)
    LR
    +V1.8 +V1.5S
    CHGCTRL_3 (APL5913)
    SLP_S5#_3R V1.8_PG V1.5S_PG
    IO POWER
    BATCON (TPS51124) SLP_S3#
    +VBATR +V1.25S
    SLP_S3#_3R LR +VCCP
    V1.25S_PG
    VCCP_PG

    SLP_S3#

    +VDD_CORE
    ATI
    GPU POWER +VPCIE

    SLP_S3#_5R (TPS51511)
    VGA_PG

    +VCC_CORE
    IMVP VI

    PWR_GOOD_3 (ADP3208)
    PM_DPRSLPVR
    PSI# VR_PWRGD_CK410

    H_DPRSTP#

    INVENTEC
    TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 4 OF 54
    FAIR_LM324AM_SOP_14P FAIR_LM324AM_SOP_14P 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    FAIR_LM324AM_SOP_14P +V5S

    R146 D15
    U503-D 1 2
    1 R123 1 R145
    FAIR_LM324AM_SOP_14P 4 + U503-A 100K_5% 2 1
    + 12 10K_1% 133K_1%
    U503-B +4
    OUT
    3 + 1
    DC JACK 14
    11 - 13 5 +
    +4 OUT
    1
    U503-C 3 BAT54S_30V_0.2A
    SINGA_2DC_G726_I04_4P - 2 OUT 2 +4
    +VADP 1 R533 2 7 2 - 11 1 R531 10 + 3 D506
    R537 - OUT
    JACK500 L505 6 - 11 1 4.7K_5% 8 BAT54C_30V_0.2A
    3.3A_150mil 5-,6- 100K_1% R535 -
    4 NFM60R30T222 3.3A_150mil 1 2 10K_5% 9 - 11
    +VADPTR C532 - R147 1 C402
    1 2 1 2 1 2
    124_1% 2
    2 1 2 2
    Q14 2 383K_1% C530 2 1uF_25v
    3 3 2200pF_50V 1 R148 1
    4 Q13 2
    C573 1 C571 1 C531 1B E 80.6K_1% C85 2 1uF_10v
    G2G1 1 C572 C574 1 1 1B E 1 1 R149 2

    CATHODE
    C

    0.1uF_25v 2 2 10pF_50V 0.1uF_25v 2 10pF_50V 2 2 1 R534


    C 3
    MMBT3906 2 2 36.5K_1% 1 R397
    6800pF_25v

    2
    0.1uF_25v 3
    MMBT3906

    ANODE
    9.1K_1% 10_5%

    3
    5- H_STPCLK

    REF
    2 2

    U504

    1
    Q17 1
    2 G1 S1
    ANPEC_APL431LBAC_SOT23_3P
    6 7-
    1 R538 D1 MAX_LX5
    1 R125 1 R124 47K_5% D2 3 32- OCP_OC#
    5 G2 Place near L19
    +VADP1 0_5% 0_5% 1
    4
    S2
    5- 2
    2 2
    +VBATR R88 2N7002DW
    Kevin sense 2 10K_5%
    +V5S
    1 D4 5-,7-,8-,9-,11-,13-,29-,30-,39-,48-
    1 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    R503 3
    15K_5% 2
    2 PDS540_5A_40V
    Q2 1 R514 2 1 R90
    8 D S 1 1 R7 2 2 220K_5%
    237K_1% 1 R87 2 Q10
    1B E
    7 2
    20K_5% MMBT3906
    6 3 412K_1% Q512 1
    C 2
    1 1 R120
    R512 5 4 3 2 G1 S1
    G 215K_1%
    100K_1% FAIR_FDMC6675BZ_8P 6
    1 R504 2 +VBATR 1 R89 D1 3 5-
    2 2 330K_5% D2 H_STPCLK
    +VADP1 +VADP2 5 G2
    270K_5% 5-,7-,8-,9-,11-,13-,29-,30-,39-,48-
    +V5AL 5- R8 6- R40 1 R122 S2 4
    0.003_1%_1W 0.018_1%_1W 2
    1 UM6K1N
    5-,7- 1 2 1 2 80.6K_1%
    C502
    1 2 2 R121
    8 0.1uF_16v ADP_PRES 6-,7-,39-,43- 2 2
    3 +
    1 Q6 1M_5%
    1 R14 FAIR_FDMC4435BZ_8P +VBDC
    OUT
    2 - R13 100_1% S 1 D 8
    ON_LM393DR2G_SOP_8P 5-,6-
    2 100_1% 2 7 R506

    MMGZ2548B
    4 U500-A 1 3 6 0.015_1%
    1 C6 4 L500
    C522
    2 G 5 1 2 1 2
    1 2 1uF_25v C9493 C9492 C9491 PLFC1045R_10uH C9526 C9525 C9524 C9527
    R9718 1 R5

    D502
    1uF_6.3v C24 1K_5% 3
    R502 +V3AL 10K_5% 1 1 1 1 1 1 1 1

    1
    1K_1%

    1K_1%
    2 1 1
    11M_5%2 1 R9719 2 1 1 R44

    R42

    R43
    6- AC_AND_CHG 6-,7-,14-,31-,39-,40-,47- 2 2 2 2 2 2 2 2
    4.7uF_25v 1 0_5% D2
    1.62K_1% 2 4.7uF_25v 4.7uF_25v
    1

    2 2 SBR3U40P1 4.7uF_25v

    2
    R505 Kevin sense 4.7uF_25v 4.7uF_25v 2 4.7uF_25v 4.7uF_25v
    D1 C23
    8.25K_1% 1 0.033uF_16v
    +V5AL 1 R41 R522 CHENMKO_BAT54_3P
    2

    U2

    2
    5-,7- 4.7K_5% 150K_5% 8
    ACN ACDRV#
    25
    8 ALARM 2 9
    ACP VCC
    22 Kevin sense
    5 + 2
    R9721 26 21
    ACDET PWM#
    7 1 2 5 16
    6 - OUT ENABLE SRP
    ON_LM393DR2G_SOP_8P 1K_5% 28
    ACSEL SRN
    15
    R9717 19 12
    1 4 U500-B ALARM BATP
    1

    C501 Q81 R9720 2 SRSET BATDRV#


    24
    1 100K_5% 100K_5% 3 18
    R511 2 G1 S1 ACSET VS
    1 2 27 20
    14.3K_1% 2 0.022uF_16v 6 ACPRES VHSP
    2 13 BATSET 6
    D1 3 4
    IBAT
    1
    D2 24703VREF VREF BATDEP
    5 G2 7 17
    2

    COMP GND
    S2 4 14 11
    1 R67 2 23
    NC NC
    10
    UM6K1N 1
    NC NC
    29
    1
    100_5% THERMAL
    R9723
    R516 TI_BQ24703_QFN_28P 174K_1%
    CHGCTRL_3
    6-,39- 60.4K_1% 2
    1 R9 Note:
    2
    140K_1%
    1

    2VREF R517
    1

    191K_1% 13.7K_1% high power trace


    R518

    7-,14- C525 1 2
    0.1uF_16v 2 2
    2

    1 R10
    1
    1 300K_0.1% 1 R9640 2 6-
    R26 1N4148 6CELLSEL#
    1 2 R66 1K_5%
    +VADP D500 1 20K_1% 2
    +VBDC 1M_5% R9722
    5-,6- +V5AL 2
    5-,6- 150_5%
    1 R11
    5-,7- C5 2 24K_0.1%
    C27 1 3 D Q3
    1 R6 2 1 2
    1 1 6CELLSEL#=1,Vcharger=12.6V
    0.1uF_16v 1 C29
    C28 3 D Q508 1
    1 R3 2
    100K_1% 2 4.7uF_6.3v 2 2 180pF_50v
    G 1
    2 G
    6CELLSEL#=0,Vcharger=16.8V
    3

    S
    U1

    C524 C26 2 SSM3K7002F


    IN+

    V+

    OUT

    100K_1% 1 1 2 4.7uF_6.3v S

    R4 23.7K_1% 1uF_6.3v 1 R65


    2 SSM3K7002F
    R515 1
    1
    24K_1%
    2
    1
    R25
    43.2K_1%
    2
    2 150pF_50v
    7.87K_1% C25 1
    0402_OPEN
    R12
    8.87K_1% INVENTEC
    IN-

    2
    V-

    2 2 TITLE
    VV Discrete
    4

    2
    DC &BATTERY CHARGER
    MICREL_LMC7101BIM5_SOT23_5P SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Dec-2008 SHEET 5 OF 54
    +VADP2 +VBDC +VBATA +V3AL
    5-,6-,7-,14-,31-,39-,40-,47-
    5- 5-

    +VADP
    5- 1 R16
    10K_5%

    2
    D501
    1 R513 2 1 1 R507
    Q507 2 PAD500 R508 10K_5% 5-
    3K_5% 2 1 6CELLSEL#
    1 S D 8 3 1 10K_5%
    MMGZ2548B 2 7 4 2 2
    3 6
    4 5 POWERPAD_4A
    G
    AM4825P_AP MAIN BATT
    CN501
    1
    39- 1 R9661 2 10_5% 2
    1
    SDA_MAIN 1 2
    2
    SCL_MAIN 39- 3
    3
    4
    R9662 10_5% 1 R17 2 5
    4
    7
    5 7
    6 8
    100_5% 6 8

    1 1 SYN_200046MR006G100ZU_6P

    +V3AL D2006
    D2007
    5-,6-,7-,14-,31-,39-,40-,47- PESD5V0U1BB PESD5V0U1BB 1 C7 C505
    1
    2 47pF_50v
    2 2 2
    0.1uF_25v

    +V3AL
    1 5-,6-,7-,14-,31-,39-,40-,47-
    1 R528
    C527
    0.047uF_10v 2 470K_5%
    1 R9657
    2
    C523 100K_5%
    +V3AL
    1000pF_50v
    2 1 R525 5 5-,6-,7-,14-,31-,39-,40-,47- 2
    CHGCTRL_3 5-,39- 1 2 U502
    1K_5% 2 4
    39-
    THM_MAIN#
    3 TC7S14F

    1 R70
    1
    3 1
    D
    1G 10K_5% R71
    S 220K_5% D2013
    2 Q511 2 2
    PESD5V0U1BB
    1 SSM3K7002F
    1 Q11 2
    R526 SSM3K7002F
    D505 470K_5% 1 R9660 2
    2

    5-
    3 39-
    AC_AND_CHG BATCON
    D
    S

    CHENKO_LL4148_2P 2 2 0_5%
    1G

    ADP_PRES
    5-,7-,39-,43-

    INVENTEC
    TITLE
    VV Discrete
    SELECT & BATTERY CONN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Dec-2008 SHEET 6 OF 54
    +V5AL
    5-,7-

    1 R9842 +VBATP +VBATR


    330K_5% 7- 5-,8-,9-,11-,13-,29-,30-,39-,48-

    Q7013 1 2 PAD2003
    2
    2 G1 S1 3 1
    6 4
    D1 3
    D2 POWERPAD_4A
    Q2022 1 5 G2
    S1 S2 4
    2
    5-,6-,39-,43- G1
    ADP_PRES
    6 2N7002DW
    D1 3
    D2
    39- 5 G2 R9848
    KBC_PW_ON
    S2 4 1 1
    68K_1%
    2N7002DW R9847
    69.8K_1%
    2 2

    1 R9850 2 1
    R9851 2
    1 R9840 2 1 R9841 2 51125GND
    10K_1% 15K_1%
    6.49K_1% 10K_1%
    51125GND
    51125GND

    1 R9845 2

    +VBATP 0_5% 2VREF


    7- 5-,14-
    1 R9846 2 +VBATP
    0_5% C9535 1 7-
    PAD2002
    POWERPAD1x1m
    C9530 1 1uF_6.3v 2
    C9531 C9540
    1 1
    4.7uF_25v 2 C9538 C9539
    1 1

    25
    8 7 6 5 5 6 7 8

    6
    5
    4
    3
    2
    1
    2 4.7uF_25v 2

    U7014
    4.7uF_25v

    TML

    ENTRIP2
    VFB2
    TONSEL
    VREF
    VFB1
    ENTRIP1
    0_5%_OPEN 51125GND
    2 2 +V5A
    D D 4.7uF_25v 4.7uF_25v
    G 1 R9844 2 G 8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    +V3A C9532 7 24
    0.1uF_16v
    VO2 VO1 4.7_5% C9537
    11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- S 8 23 32-,39- S
    1 R9843 2
    VREG3 PGOOD RSMRST# 1 R9849 2 0.1uF_16v
    Q2023 9
    VBST2 VBST1
    22 Q2025
    SI7326DN 1 2 3 4 1 2 4.7_5% 10 21 1 2 4 3 2 1 SI7326DN
    PAD2001 PAD2004
    2 L548 1 2 L549 1
    DRVH2 DRVH1
    11 20
    LL2 LL1
    PCMC063T_4R7MN 8 7 6 5 12 19 PCMC063T_4R7MN
    POWERPAD_2_0610 DRVL2 DRVL1 POWERPAD_2_0610
    SKIPSEL
    Q2024 5 6 7 8

    VREG5
    D 5-

    VCLK
    MAX_LX5
    GND
    EN0

    G VIN TI_TPS51125_QFN_24P D
    +V3AL G 1
    C9542
    13
    14
    15
    16
    17
    C9529
    S
    5-,6-,14-,31-,39-,40-,47- 18
    1 S
    1 2 3 4 +V5AL Q2026 2 220uF_6.3V
    2 220uF_6.3V
    SI7726DN 5-,7- 4 3 2 1 SI7726DN

    1 C9533
    2 4.7uF_6.3V
    1 C9536
    2 4.7uF_6.3V
    C9534
    1
    2 2.2uF_25v

    INVENTEC
    TITLE
    VV Discrete
    SYSTEM POWER(3V/5V/12V)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 7 OF 54
    1 R134 2 1 R135 2 1 R138 2 1 R136 2

    42.2K_1% 30K_1% 30K_1% 20K_1%

    51124GND 51124GND

    +VBATR
    5-,7-,8-,9-,11-,13-,29-,30-,39-,48- V1.8_PG 14-

    12-,32-
    SLP_S4#_3R 9-,10-,12-,13-,14-,32-,39-,43-,46-
    R127 SLP_S3#_3R
    1 2 +VBATR
    0_5%_OPEN 5-,7-,8-,9-,11-,13-,29-,30-,39-,48-
    C42 C43
    1 1 U3

    1
    2 2
    4.7uF_25v 4.7uF_25v 5 6 7 8 C86 1

    VO2

    VFB2

    TONSEL

    GND

    VFB1

    VO1
    1 C87
    8 7 6 5
    25 D +V1.25S
    GND 2 2 4.7uF_25v
    D 7 PGOOD1 24 14- G 4.7uF_25v 10-,20-,24-,34-
    +V1.8 Q12 G
    PGOOD2 V1.25S_PG
    SI7326DN 8 EN1 23 S
    9-,10-,12-,13-,20-,23-,24-,26-,27- EN2 Q22
    S C79
    R91 R132 C78
    0.1uF_16v 1 2 9 VBST2 VBST1 22 1 2 4 3 2 1 SI7326DN
    1 2 3 4 1 2 4.7_5% 4.7_5% 1 2
    PAD501 10
    DRVH2 DRVH1 21 0.1uF_16v
    PAD503
    1 L534 2 11 TI_TPS51124RGER_QFN_24P
    LL2 LL1 20 1 L502 2
    POWERPAD_2_0610
    PCMC063T_1R0MN PCMC063T_2R2MN POWERPAD_2_0610
    12
    DRVL2 DRVL1 19 5 6 7 8
    8 7 6 5

    PGND2

    PGND1
    V5FILT
    1 D 1

    TRIP2

    TRIP1
    V5IN
    C526 D G C555
    G +V5A 220uF_2.5V
    2 390uF_2.5V 7-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-

    13

    14

    15

    16

    17

    18
    S 2
    S
    4 3 2 1 Q19
    FDS6690AS
    Q9 1 2 3 4
    FDS6676AS

    1 R129 2
    10_5%
    C77 C76
    1 1
    1 R131 1 R130 2 2
    1uF_10v 4.7uF_6.3v
    9.09K_1% 15.4K_1%

    2 2

    PAD2008

    POWERPAD1x1m

    51124GND

    INVENTEC
    TITLE
    VV Discrete
    SYSTEM POWER(+V1.8/+V1.25S)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Dec-2008 SHEET 8 OF 54
    POW_SW1 POW_SW0 +VDD_CORE

    0 0 1V
    0 1 0.95V
    1 0 0.9V

    +VPCIE
    +V1.8
    50-,51-
    8-,10-,12-,13-,20-,23-,24-,26-,27-
    +VBATR
    5-,7-,8-,11-,13-,29-,30-,39-,48- +VDD_CORE

    C9551 C9552 51-


    C9553
    4.7uF_25v 4.7uF_25v 4.7uF_25v
    1 R9854 C9545
    9.31K_1% 1 2

    5
    6
    7
    8
    C9548 10uF_6.3v C9544 1 1 1
    1 2 1 R9853 2 0.1uF_16v
    2 2 2

    G
    2 0_5% 1 2 Q2028

    20
    C9550 22uF_6.3v U7015

    1
    1 IRFH3707TRPbF

    VLDOIN

    VBST
    1 R9855
    2

    4
    3
    2
    1
    1uF_10v 20K_1% 2 19 PAD2005 2
    1 L550 2
    NC DRVH
    3 18 1 3
    VLDO LL
    PAD2009 2 4 17 PCMC063T_1R0MN 4
    VLDOFB DRVL
    5 16 +V5A POWERPAD_4A
    GND PGND
    1 R9852 2
    R9863

    6
    5

    7
    8
    9
    1
    6 15
    POWERPAD1x1m ODOFF CS 24.3K_1%

    D
    7 14 10K_1% 7-,8-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    OD V5IN R9858 1 1

    G
    8 13 C95461
    COMP PGOOD Q2027 8.06K_1%
    9 12 2 C9555
    VOSW
    VSWFB

    ENSW
    1 R9860 2
    ENLDO
    VGAP_AGND C9549 FDMS8670S Q2029

    S
    1 R9859 1 2 C9557 C9543
    21
    10K_1% 0402_OPEN 2 SSM3K17FU 2 22uF_6.3V

    4
    3
    2
    1
    TML-PAD 1
    120K_1% DD

    2 1
    2
    TI_TPS51511_RHL_20P 4.7uF_6.3v G 1 R9864 249-
    10

    11

    POW_SW0 49- 2 G
    POW_SW1
    1 1000pF_50V
    2 S 1K_5% 330uF_2v_9mR_Panasonic
    C9547 S
    1 R9857 C9558
    30K_1% 1
    2
    0402_OPEN 2 2
    1000pF_50V

    13- 1 R9862 2 14-


    GATE_3S_R VGA_PG
    0_5% VGAP_AGND VGAP_AGND

    SLP_S3#_3R
    1 R9861 2

    8-,10-,12-,13-,14-,32-,39-,43-,46- 0402_OPEN C9554 0.1uF_16v


    C9556 1 2
    1
    2 0.1uF_16v_OPEN

    INVENTEC
    TITLE
    VV Discrete
    GRAPHIC POWER (+VGFX_CORE)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 9 OF 54
    +V5A +V1.8

    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48- 8-,9-,12-,13-,20-,23-,24-,26-,27-

    +VCCP
    +V1.25S
    Q515 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- C268
    1
    8-,20-,24-,34- AM4410N +V1.5S
    2
    8 D S 1 PAD502 C669 22uF_6.3v 13-,18-,24-,34-,45-,46-
    7 2 1
    C533 6 3 2
    1 5 4 POWERPAD_2_0610 1uF_10v
    G 1 R160 PAD1
    2
    4.7uF_6.3v 113_1%
    POWERPAD_2_0610
    C702 C267
    +V5A 1 1
    2 C535 C534
    1 R158 1 1
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48- R157 47_5% 2 22uF_6.3v 2
    1 2
    2 2 1uF_10v
    0402_OPEN 10uF_6.3v 10uF_6.3v U12
    1 R159 6
    2
    GMT_G9338_ADJTBUf_SOT23_6P 100_1% VCNTL
    1 6 C90 7
    POK
    5
    VCC DRV 1 2
    VIN 1 R276
    C89 1 1 C299
    2 5 2 3 27.4K_1%
    0.1uF_16v GND ADJ VOUT
    2 0.033uF_16v 4
    VOUT 2 39pF_50V
    3 4 2
    1 R9916 2
    PGD EN
    SLP_S3#_3R 8-,9-,10-,12-,13-,14-,32-,39-,43-,46- 8 2
    EN FB
    U6 0_5% VIN GND
    9 1 ANPEC_APL5930KAI_TRL_SOP_8P
    1 R274
    30K_1%
    1 R156 1
    0402_OPEN C88 1
    R153 2
    2 0402_OPEN +VCCP
    2 2
    0402_OPEN
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

    1 R9917 2
    0_5%_OPEN
    14- V1.5S_PG
    VCCP_PG 14-

    8-,9-,10-,12-,13-,14-,32-,39-,43-,46- SLP_S3#_3R

    R579 R576 R578 R577

    G9338 0 ohm OPEN OPEN 0 ohm

    SC339 OPEN 0 ohm 0 ohm OPEN

    INVENTEC
    TITLE
    VV Discrete
    SYSTEM POWER(+VCCP/+V1.5S)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Dec-2008 SHEET 10 OF 54
    7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    +V3A +V3S
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    1 R9898
    1 10K_5%
    R226
    2
    47K_5% 2 15-,32-
    VR_PWRGD +VBATR
    Q2034 3
    D 5-,7-,8-,9-,13-,29-,30-,39-,48-
    VR_PWRGD_CK505#
    11- 1G
    S

    SSM3K7002F 2 PAD2007

    POWERPAD_2_0610

    +V3S 1
    20-,32-,39-
    C9574
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    1 R9876 2 1 R9882 2
    PM_PWROK +V5A 2
    0_5% 0402_OPEN 68uF_25V
    R98772 7-,8-,9-,10-,12-,13-,14-,30-,34-,38-,48-
    20-,32- 1
    PM_DPRSLPVR
    499_1%
    11- 1 R9878 2 1 R9883 2
    VR_PWRGD_CK505# R9892
    0_5% 0402_OPEN
    0_5%
    14-,50- 1 R9879 2 11- 2 1
    +V5S PWR_GOOD_3 CSN1
    0_5%
    5-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    C9586
    11- 1 2
    CSP1
    TP67 0.015uF_10v
    R9893
    1 R9880 2 C9576 C9578 C9580 C9582

    1
    1 1 1 1
    1 124K_1% 0402_OPEN
    2 2 2 2 5 6 7 8 24.9K_1% 220K_5% 48.7K_1%
    R9871
    C9570 4.7uF_25v 4.7uF_25v 4.7uF_25v 0.1uF_25V_OPEN 1 2 1 2 1 2
    0_5%_OPEN
    2 1 2 R9888 R9890 R9894
    2.2uF_6.3v
    PAD2006 TPCA8030_H
    S +VCC_CORE
    Q2033
    POWERPAD1x1m 4 3 2 L551 18-
    1
    AGND_VCORE 1 2
    G
    C9565 C9569 56 7 8 CYNTEC_PCMC104T_R36MN_2P
    R9874
    0.22uF_6.3v
    1 47pF_50v 5.62K_1% D 1
    1 R9865 2 R9872 TPCA8A04_H G
    CSP1 11- 2 R9886
    0_5% 1
    1

    332_1% 1 Q2031 0805_OPEN


    41
    40
    39
    38
    37
    36
    35
    34
    33
    32
    31

    S 2
    C9572
    PwPd
    V5FILT
    ISLEW
    OSRSEL
    TONSEL
    TRIPSEL
    PWRMON
    VR_ON
    CLK_EN#
    DPRSLPVR
    PGOOD

    2 1C9559 2 R9885 43 2 1 1
    2 0.22uF_16V C9584
    2

    C9563 1
    DROOP DRVH1
    30 2.2_5% 2 0603_OPEN
    47pF_50v 47pF_50v AGND_VCORE 2 29 2 1
    1 VREF VBST1
    3 28 2 1 C9573
    GND LL1 1
    2 4 27
    2 CSP1 DRVL1
    1C9560 5 26
    CSN1 U7016 V5IN 2
    47pF_50v 6
    CSN2
    TI_TPS51620RHAR_QFN_40P
    PGND
    25 2.2uF_16v
    11- 1 R9866 2 7 24
    CSN1 CSP2 DRVL2
    8 23
    332_1% GNDSNS LL2
    1 2
    9 22
    VSNS VBST2
    1 R9873 2
    DPRSTP#

    10 21 1 2
    VR_TT#

    THERM DRVH2
    11- 1 R9867 2
    CSN2 20K_1% 5 6 7 8
    VID6
    VID5
    VID4
    VID3
    VID2
    VID1
    VID0
    PSI#

    332_1% R9884 C9571 C9575


    C9577 C9579 C9581 C9583
    2 1C9561 2.2_5% 1 1 1 1 1
    11
    12
    13
    14
    15
    16
    17
    18
    19
    20

    0.22uF_16V
    C9564 2 2 2 2 2 TPCA8030_H
    AGND_VCORE S
    47pF_50v 1 47pF_50v 0.1uF_25V_OPEN 4.7uF_25v 4.7uF_25v 4.7uF_25v 4.7uF_25v Q2032
    4 3 2 L552
    2 1
    2 1C9562 1 2
    G
    47pF_50v 56 7 8 CYNTEC_PCMC104T_R36MN_2P
    +VCCP
    11- 1 R9868 2 C9566 D 1
    CSP2 1 10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    G
    332_1% R9887
    0402_OPEN
    AGND_VCORE
    2 TPCA8A04_H 0805_OPEN
    1
    AGND_VCORE Q2030 S 2
    18- 1 R9869 2 R9881
    VSSSENSE 43 2 1
    0_5% C9567 56_5%
    1 1 1 1 R9889 2 1 R9891 2 1 R9897 2
    2 C9585
    20402_OPEN R9875 2 24.9K_1% 220K_5% 48.7K_1%
    18- 1 R9870 2
    VCCSENSE 0402_OPEN
    0_5% 2 0603_OPEN R9895 0402_OPEN
    C9568
    1 2 1
    2 0402_OPEN
    17-,20-,31- C9587 0.015uF_10v
    H_DPRSTP#
    PSI# 17- 11-
    CSP2
    H_VID6 1 2
    18-
    AGND_VCORE H_VID5 18-
    H_VID4 R9896 0_5%
    18- 11-
    H_VID3 18- CSN2 2 1
    H_VID2 18-
    H_VID1
    H_VID0
    18-
    18-
    INVENTEC
    TITLE
    VV Discrete
    CPU POWER(VCC_CORE)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Oct-2008 SHEET 11 OF 54
    8-,32-
    SLP_S4#_3R

    8-,9-,10-,13-,14-,32-,39-,43-,46- +V5A
    SLP_S3#_3R
    7-,8-,9-,10-,11-,13-,14-,30-,34-,38-,48-

    +V1.8
    8-,9-,10-,13-,20-,23-,24-,26-,27-
    +V0.9S
    28-

    U5
    GMT_G2997F6U_MSOP10_10P
    11 1
    TML VDDQSNS
    10 2
    VIN VLDOIN
    9 3
    S5 VTT
    8 4
    GND PGND
    7 5
    S3 VTTSNS
    6
    VTTREF
    1 C82
    1 C81 1 C47 1 C48
    2 4.7uF_6.3v
    2 1uF_10v 20-,26-,27- 2 2 10uF_6.3v
    M_VREF 10uF_6.3v

    1 C49

    2 0.1uF_16v

    NOTE: DDR2 REGULATOR

    INVENTEC
    TITLE
    VV Discrete
    DDR TERMINATION VOLTAGE
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 12 OF 54
    +V3A +V3S
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 11-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    Added for VGA


    +V5A +V5S +V1.8 +V1.8S
    7-,8-,9-,10-,11-,12-,14-,30-,34-,38-,48- 5-,11-,14-,19-,29-,32-,34-,37-,40-,41-,48- 8-,9-,10-,12-,20-,23-,24-,26-,27- 48-,49-,50-,51-,52-,53-,54-

    Q39 Q36
    6 D S 4 6 D S 4
    5 5
    GATE_3S_R 9-,13- 2 2
    1 3 1 3
    G G +V1.5S
    R430 FDC655BN R435
    120K_1% FDC655BN
    120K_1% Q16 10-,18-,24-,34-,45-,46-

    13-
    1 2
    13-
    1 2 8 D S 1
    GATE_3S GATE_5S
    9-,13- 1 R9665 2 7 2
    GATE_3S_R 3
    C409 0_5% 6
    1 5 4
    G
    C408 2
    1 0.01uF_16v 13- 1 R144 2 FDMC8884
    GATE_3S
    2 0402_OPEN
    0.01uF_16v C84
    1 1
    1 1 C389 1 1 R460
    C390 2
    0603_OPEN C97
    R414 10uF_6.3v 100_5%
    47_5% 2 1 2 10uF_6.3v 1 2 10uF_6.3v
    2
    2 R415 R161
    100_5% 100_5%
    2 2

    Q45 3 Q20 3 Q40 3


    Q41 3 D D D
    D 1G 1G 1G
    1G S S S
    S
    SSM3K7002F 2 SSM3K7002F 2 SSM3K7002F 2
    SSM3K7002F 2

    +VBATR
    +VBATR
    5-,7-,8-,9-,11-,13-,29-,30-,39-,48-
    5-,7-,8-,9-,11-,13-,29-,30-,39-,48-

    1 R463
    1 R462 2.7K_5%
    C437 1 47K_5%
    0.033uF_16v 2 2
    2

    2
    1 B E Q44
    C MMBT3906
    3

    3 1 1 R436
    C
    SLP_S3#_3R 8-,9-,10-,12-,13-,14-,32-,39-,43-,46- 1 B R437 0_5%
    1 D16
    Q47
    E
    0_5%
    2
    MMBT3904 2 2
    2 MMGZ2548B
    13- GATE_5S 13- GATE_3S
    1 R461
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 130K_1%
    +V3A 1 R434 1 R433
    2
    0_5% 0_5%

    2 2
    1 R431
    100K_5% 1 R432 2

    1K_5%
    2
    Q42 3
    D
    1G
    S

    SSM3K7002F 2
    Q43 3
    D

    SLP_S3#_3R 8-,9-,10-,12-,13-,14-,32-,39-,43-,46- 1G
    S

    SSM3K7002F 2

    INVENTEC
    TITLE
    VV Discrete
    POWER(SLEEP)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Nov-2008 SHEET 13 OF 54
    +V3A +V3S
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 11-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    Added for VGA


    +V5A +V5S +V1.8 +V1.8S
    7-,8-,9-,10-,11-,12-,14-,30-,34-,38-,48- 5-,11-,14-,19-,29-,32-,34-,37-,40-,41-,48- 8-,9-,10-,12-,20-,23-,24-,26-,27- 48-,49-,50-,51-,52-,53-,54-

    Q39 Q36
    6 D S 4 6 D S 4
    5 5
    GATE_3S_R 9-,13- 2 2
    1 G 3 1 G 3
    +V1.5S
    R430 FDC655BN R435
    120K_1% FDC655BN
    120K_1% Q16 10-,18-,24-,34-,45-,46-

    13-
    1 2
    13-
    1 2 8 D S 1
    GATE_3S GATE_5S 1 R9665 2 7 2
    GATE_3S_R 9-,13-
    C409 6 3
    1 0_5% 5 4
    G
    C408 2
    1 0.01uF_16v 13- 1 R144 2 FDMC8884
    GATE_3S
    2 0402_OPEN
    0.01uF_16v C84
    1 1
    1 1 C389 1 1 R460
    C390 2
    0603_OPEN C97
    R414 10uF_6.3v 100_5%
    47_5% 2 1 2 10uF_6.3v 1 2 10uF_6.3v
    2
    2 R415 R161
    100_5% 100_5%
    2 2

    Q45 3 Q20 3 Q40 3


    Q41 3 D D D
    D 1G 1G 1G
    1G S S S
    S SSM3K7002F 2 SSM3K7002F 2 SSM3K7002F 2
    SSM3K7002F 2

    +VBATR
    +VBATR
    5-,7-,8-,9-,11-,13-,29-,30-,39-,48-
    5-,7-,8-,9-,11-,13-,29-,30-,39-,48-

    1 R463
    1 R462 2.7K_5%
    C437 1 47K_5%
    0.033uF_16v 2 2
    2

    2
    1 B E Q44
    C MMBT3906
    3

    3 1 1 R436

    SLP_S3#_3R 8-,9-,10-,12-,13-,14-,32-,39-,43-,46- 1 B
    C
    R437 0_5%
    1 D16
    Q47
    E
    0_5%
    2
    MMBT3904 2 2
    2 MMGZ2548B
    13- GATE_5S 13- GATE_3S
    1 R461
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 130K_1%
    +V3A 1 R434 1 R433
    2
    0_5% 0_5%

    2 2
    1 R431
    100K_5% 1 R432 2

    1K_5%
    2
    Q42 3
    D
    1G
    S

    SSM3K7002F 2
    Q43 3
    D

    SLP_S3#_3R 8-,9-,10-,12-,13-,14-,32-,39-,43-,46- 1G
    S

    SSM3K7002F 2

    INVENTEC
    TITLE
    VV Discrete
    POWER(SLEEP)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Nov-2008 SHEET 13 OF 54
    +V3AL +V3AL
    5-,6-,7-,14-,31-,39-,40-,47- 5-,6-,7-,14-,31-,39-,40-,47-

    1 C414
    1 R444
    2 0.1uF_16v
    100K_1%

    2
    5 PHP_74LVC1G17_SOT753_5P
    2 4 39- VCC1_POR#_3
    1 C413 U524 1 R443
    3 100K_5%
    2
    0.1uF_16v
    2

    +V3A
    1 R101 2 7-,11-,13-,30-,32-,33-,34-,36-,43-,45-,47-

    1M_5%
    D6 CHENKO_LL4148_2P +V5A 1 R141

    1 2 7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    10K_5%

    U4-A 2
    8
    11-,14-,50- 1 R143 2 1 R104 2 3 +
    PWR_GOOD_3
    140K_1% 20K_5% 1 39- PWR_GOOD_KBC
    2 - OUT
    1 R105
    C46 C80
    8-,9-,10-,12-,13-,32-,39-,43-,46- 1 2 1 0402_OPEN 4 1
    SLP_S3#_3R ON_LM393DR2G_SOP_8P
    R98 2 2

    1
    1K_5% 0.1uF_16v 2 0.1uF_16v
    D5

    3
    DAP202K
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    2
    9- R102
    1 2
    VGA_PG 2VREF +V3S
    1K_5%
    8- R137 5-,7-
    1 2
    V1.25S_PG
    10K_5%
    10- R97 2 R140
    1 1 2
    V1.5S_PG 1 R139
    10K_5% 100K_5%
    8-
    10K_5%
    1 R93 2 1 R94 2
    V1.8_PG
    10K_5% 1M_5% 2
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- 10-
    1 R95 2
    +V3S VCCP_PG +V5A
    10K_5%
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    8
    1 R99 2 1 R96 2 5 + U4-B
    7 11-,14-,50-
    68.1K_1% 20K_5% OUT PWR_GOOD_3
    6 -
    5-,11-,13-,19-,29-,32-,34-,37-,40-,41-,48- ON_LM393DR2G_SOP_8P
    +V5S 1 4
    1 C45 1 C44
    R100
    R103 49.9K_1% 2 1000pF_50v 2
    1 2 2 0.1uF_16v
    102K_1%

    INVENTEC
    TITLE
    VV Discrete
    POWER(SEQUENCE)
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Nov-2008 SHEET 14 OF 54
    +V3S 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    +V3S
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    Layout note: All decoupling 0.1uF disperse closed to pin
    L517
    BLM18AG471SN1D +V3S
    Layout note: All decoupling 0.1uF disperse closed to pin
    1

    2
    R271
    10K_5%_OPEN
    C714 1 1
    C322
    1
    C321
    1
    C319
    1
    C316
    1
    C318
    1
    C315

    10uF_6.3v 2 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v L518


    BLM18AG471SN1D 1 1 1 1
    R270

    2
    1 C694 1 C695 C323 C325 C324 C320 C317 C326 R654 R268
    1 1 1 1 1 1 10K_5%_OPEN
    10K_5% 10K_5%
    2 10uF_6.3v 2 10uF_6.3v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 2 2 2

    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- 32- PCISTOP#_3


    +VCCP 32-
    +V3S CPUSTOP#_3
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

    1
    U516 21- CLK_R_MCHBCLK
    R352 26 48 21-
    R289 1 2 10K_5% 10K_5%_OPEN VDDSRC_IO NC CLK_R_MCHBCLK#
    CLKREQ_R_SATA# 15-,32- 45
    VDDSRC_IO
    36 38
    PCI_STOP#

    2
    VDDSRC_IO
    17-,20- 1 R356 2 12 37
    CPU_BSEL0 VDD96_IO CPU_STOP#
    2.2K_5% 2 39
    VDDSRC
    61 51 CLK_R_MCHBCLK 16- CLK_R_CPUBCLK
    R357 VDDREF CPUT1_F
    20 50 CLK_R_MCHBCLK# 16- CLK_R_CPUBCLK#
    0402_OPEN VDDPLL3_IO CPUC1_F
    49
    VDDCPU_IO
    1 54 CLK_R_CPUBCLK
    +VCCP CPUT0
    53 CLK_R_CPUBCLK#
    CPUC0
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- CLK_R_XDP
    9 47 19- CLK_R_XDP
    VDD48 CPUT2_ITP_SRCT8
    CLK_R_XDP#
    1 C351
    2 2 46 19- CLK_R_XDP#
    VDDPCI CPUC2_ITP_SRCC8
    CLK_R3S_ICH48 32- R350 1 2 55
    VDDCPU
    10K_5% 2 22_5% 16
    VDD SRCT11_CR#_H
    33 CLK_REQH# 475_1% 2 1 R269 46- CLK_R_REQH#
    R642 22pF_50v SRCC11_CR#_G
    32 CLK_REQG# 475_1% 2 1 R655 45- CLK_R_REQG#
    1 R9682 22_5% CLK_3S_ICH48
    46- 1 2 34 CLK_R_PCIE_NEWCARD 46-
    10K_5% CLK_R3S_CR48 SRCT10 CLK_R_PCIE_NEWCARD
    CPU_BSEL1
    17-,20- R644 10
    SUB_48MHZ_FSLA SRCC10
    35 CLK_R_PCIE_NEWCARD# 46- CLK_R_PCIE_NEWCARD#
    17-,20- 1 2 57
    CPU_BSEL2 FSLB_TEST_MODE
    CLK_3S_REF 15- 62 30 CLK_R_PCIE_MINI2 45- CLK_R_PCIE_MINI2
    CLKREQ_SATA# REF0_FSLC_TEST_SEL SRCT9
    1 2 15-,32- R288 1 2 475_1% 31 CLK_R_PCIE_MINI2# 45-
    CLKREQ_R_SATA# CLKREQ_MCH#
    SRCC9 CLK_R_PCIE_MINI2#
    C693 R646 1
    PCI0_CR#_A
    1 39- R361 1 2 3 44 43-
    10K_5%_OPEN +V3S CLK_R3S_DEBUG PCI1_CR#_B SRCT7_CR#_F CLK_PCIE_LAN
    CLK_3S_DEBUG 4 43 43-
    2 33_5% PCI2_TME SRCC7_CR#_E CLK_PCIE_LAN#
    0402_OPEN 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    CLK_3S_MINICARD 5
    PCI3
    +V3S 41 CLK_R_DREF 50- CLK_R_DREF
    R3621 SRCT6
    56 40 CLK_R_DREF# 50-
    10K_5% 1 C352 CK_PWRGD_PD# SRCC6 CLK_R_DREF#
    R364 1 R360 2 64 6 CLK_3S_KBPCI 33_5% 1 2 R359 39-
    475_1%
    0402_OPEN
    2 SCLK PCI4_27_Select CLK_R3S_KBPCI
    2 63 7 CLK_3S_ICHPCI 33_5% 1 2 R349 33-
    1 2
    10K_5% SDTAT PCI_F5_ITP_EN CLK_R3S_ICHPCI
    CLKREQ_R_MCH# 20-
    CLK_R_PEG_MCH
    45- R353 1 2 33_5% 60 27 20-
    1 R9899 2
    CLK_R3S_MINICARD X1 SRCT4 CLK_R_PEG_MCH
    VR_PWRGD 11-,32- 28 CLK_R_PEG_MCH# 20- CLK_R_PEG_MCH#
    SRCC4
    59
    0_5% X2 CLK_R_PCIE_ICH
    ICH_3S_SMCLK 19-,26-,27-,32-,50- 24 32- CLK_R_PCIE_ICH
    SRCT3_CR#_C
    32- 1 R9900 2 19-,26-,27-,32-,50- 8 25 CLK_R_PCIE_ICH# 32-
    CLK_PWRGD ICH_3S_SMDATA GNDPCI SRCC3_CR#_D CLK_R_PCIE_ICH#
    11
    0_5%_OPEN GND48 CLK_R_SATA1
    15 21 31- CLK_R_SATA1
    GND SRCT2_SATAT
    19 22 CLK_R_SATA1# 31- CLK_R_SATA1#
    GND SRCC2_SATAC
    23
    GNDSRC
    29 17
    GNDSRC 27MHz_NonSS_SRCT1_SE1
    42 18
    FSA FSB FSC FSB CLOCK HOST CLOCK X501 GNDSRC 27MHz_SS_SRCC1_SE2
    14.31818MHZ 58
    FREQUENCY FREQUENCY 52
    GNDREF
    13
    GNDCPU SRCC0_DOTT_96
    1 2 14
    SRCT0_DOTC_96
    1 1 0 667 166 1 1
    C716 C715 ICS_ICS9LPRS355BGLFT_TSSOP_64P
    33pF_50v 2 30PPM
    0 1 0 800 200 2 33pF_50v 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    +V3S +V3S

    2 R351 1 1 R363 2 27_Selet =0


    ITP_EN =0
    Please place close to CLKGEN within 500mils LCD_SST 100MHZ
    Byte6: bit7=0, disable CR#_E; 1,enable CR#_E SRC8/SRC8# 10K_5% 0402_OPEN
    *CLKREQ# pin controls SRC Table. 2R348 1 1 R358 2 27_Selet =1
    CR#_E ITP_EN =1
    0402_OPEN 10K_5% 27MHZ non-spread clock
    ITP/ITP#
    Byte5: bit6 =0(PWD) Byte5: bit6 =1 Byte5: bit4 =0(PWD) Byte5: bit4 =1 SRC6

    CR#_A SRC0 SRC2


    CR#_B SRC1 SRC4 Byte6: bit6=0, disable CR#_F; 1,enable CR#_F 1 2 39- CLK_R3S_KBC14
    R645 22_5%
    CR#_F CLK_3S_REF 15-
    Byte5: bit7=0, disable CR#_A; 1,enable CR#_A Byte5: bit5=0, disable CR#_B; 1,enable CR#_B SRC8 1 2 32- CLK_R3S_ICH14
    R647 22_5%
    Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
    LAYOUT NOTES : THE R684 , R685 , R683 CLOSED TO U21
    CR#_G
    Byte5: bit2 =0(PWD) Byte5: bit2 =1 Byte5: bit0 =0(PWD) Byte5: bit0 =1 SRC9
    INVENTEC
    CR#_C SRC0 SRC2 SRC1 SRC4 Byte6: bit4=0, disable CR#_H; 1,enable CR#_H TITLE
    CR#_D VV Discrete
    CR#_H CLOCK_GENERATOR
    Byte5: bit3=0, disable CR#_C; 1,enable CR#_C Byte5: bit1=0, disable CR#_D; 1,enable CR#_D SRC10 SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 3-Nov-2008 SHEET 15 OF 54
    H_A#(35:3) 21- CN506-1
    H_A#(3) J4
    A3# ADS#
    H1 21- H_ADS#
    H_A#(4) L5 E2 21- +VCCP
    A4# BNR# H_BNR#
    H_A#(5) L4
    A5# BPRI#
    G5 21- H_BPRI# 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    H_A#(6) K5
    A6# 1 R165

    ADDR GROUP 0
    H_A#(7) M3 H5 21- H_DEFER#
    A7# DEFER#
    H_A#(8) N2 F21 21- H_DRDY# 56_5%
    A8# DRDY# CLOSED TO CPU
    H_A#(9) J1
    A9# DBSY#
    E1 21- H_DBSY#
    H_A#(10) N3
    A10# 2

    CONTROL
    H_A#(11) P5
    A11# BR0#
    F1 21- H_BREQ#0
    H_A#(12) P2
    A12#
    H_A#(13) L2
    A13# IERR#
    D20
    H_A#(14) P4
    A14# INIT#
    B3 31- H_INIT#
    H_A#(15) P1
    +VCCP
    A15# 51 ohm +/-1% pull-up to +VCCP
    H_A#(16) R1
    A16# LOCK#
    H4 21- H_LOCK# 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    21- M1 1 R240 2 (VCCP) if ITP is implemented
    H_ADSTB#0 ADSTB0#
    H_REQ#(4:0) 21- C1 19-,21- H_CPURST# 51_5% 21- H_RS#(2:0)
    RESET#
    H_REQ#(0) K3
    REQ0# RS0#
    F3 H_RS#(0)
    H_REQ#(1) H2
    REQ1# RS1#
    F4 H_RS#(1)
    H_REQ#(2) K2 G3 H_RS#(2)
    REQ2# RS2#
    H_REQ#(3) J3
    REQ3# TRDY#
    G2 21- H_TRDY#
    H_REQ#(4) L1
    REQ4#
    G6 21- H_HIT#
    HIT#
    H_A#(17) Y2
    A17# HITM#
    E4 21- H_HITM#
    H_A#(18) U5
    A18#
    H_A#(19) R3
    A19# BPM0#
    AD4 19- H_BPM0_XDP#

    ADDR GROUP 1
    H_A#(20) W6
    A20# BPM1#
    AD3 19- H_BPM1_XDP#
    H_A#(21) U4 AD1 19-

    XDP/ITP SIGNALS
    A21# BPM2# H_BPM2_XDP#
    H_A#(22) Y5
    A22# BPM3#
    AC4 19- H_BPM3_XDP#
    H_A#(23) U1
    A23# PRDY#
    AC2 19- H_BPM4_PRDY#
    H_A#(24) R4 AC1 16-,19-
    A24# PREQ# H_BPM5_PREQ#
    H_A#(25) T5
    A25# TCK
    AC5 16-,19- H_TCK
    H_A#(26) T3
    A26# TDI
    AA6 16-,19- TDI_FLEX
    H_A#(27) W2
    A27# TDO
    AB3 19- H_TDO
    H_A#(28) W5
    A28# TMS
    AB5 16-,19- H_TMS
    H_A#(29) Y4
    A29# TRST#
    AB6 19- H_TRST#
    H_A#(30) U2
    A30# DBR#
    C20 19-,32- XDP_DBRESET#
    H_A#(31) V4
    A31# 1 R233
    H_A#(32) W3
    A32#
    H_A#(33) AA4 +VCCP 51_5%
    A33# THERMAL 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    H_A#(34) AB2
    A34#
    H_A#(35) AA3 D21 R166 1 2 56_5% 2
    A35# PROCHOT# 10mils/10mils
    21- V1 A24 19-
    H_ADSTB#1 ADSTB1# THERMDA H_THERMDA
    B25 19- THERM_MINUS
    THERMDC
    H_A20M# 31- A6
    A20M#
    H_FERR# 31- A5 C7 20-,31- PM_THRMTRIP#
    FERR# THERMTRIP#
    ICH

    H_IGNNE# 31- C4
    IGNNE#

    H_STPCLK# 31- D5
    STPCLK#
    H_INTR 31- C6
    LINT0
    H CLK
    H_NMI 31- B4 A22 15- CLK_R_CPUBCLK
    LINT1 BCLK0
    H_SMI# 31- A3 A21 15- CLK_R_CPUBCLK#
    SMI# BCLK1

    M4
    RSVD01
    N5
    RSVD02
    RESERVED
    T2
    RSVD03 +VCCP
    V3
    RSVD04
    B2 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    RSVD05
    C3
    RSVD06
    D2
    RSVD07 R630
    D22 1 2 16-,19-
    RSVD08 H_BPM5_PREQ#
    D3
    RSVD09 51_5%
    F6
    RSVD010
    1 R234 2 16-,19- TDI_FLEX
    51_5%
    FOX_PZ4782K_274M_41_478P 1 R235 2 16-,19- H_TMS
    51_5%
    1 R639 2 16-,19-
    +VCCP H_TCK
    GMCH CPU ICH8 51_5%

    INVENTEC
    TITLE
    PM_THRMTRIP# should be T at CPU VV Discrete
    MEROM-1
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 3-Nov-2008 SHEET 16 OF 54
    H_D#(63:0) 17-,21- CN506-2 17-,21- H_D#(63:0)
    H_D#(0) E22 Y22 H_D#(32)
    D0# D32#
    H_D#(1) F24 AB24 H_D#(33)
    D1# D33#
    H_D#(2) E26 V24 H_D#(34)
    D2# D34#
    H_D#(3) G22 V26 H_D#(35)
    D3# D35#

    DATA GRP 2
    DATA GRP 0
    H_D#(4) F23 V23 H_D#(36)
    D4# D36#
    H_D#(5) G25 T22 H_D#(37)
    D5# D37#
    H_D#(6) E25 U25 H_D#(38)
    D6# D38#
    H_D#(7) E23 U23 H_D#(39)
    D7# D39#
    H_D#(8) K24 Y25 H_D#(40)
    D8# D40#
    H_D#(9) G24 W22 H_D#(41)
    D9# D41#
    H_D#(10) J24 Y23 H_D#(42)
    D10# D42#
    H_D#(11) J23 W24 H_D#(43)
    D11# D43#
    H_D#(12) H22 W25 H_D#(44)
    D12# D44#
    H_D#(13) F26 AA23 H_D#(45)
    D13# D45#
    H_D#(14) K22 AA24 H_D#(46)
    D14# D46#
    H_D#(15) H23 AB25 H_D#(47)
    D15# D47#
    H_DSTBN#0 21- J26 Y26 21- H_DSTBN#2
    DSTBN0# DSTBN2#
    H_DSTBP#0 21- H26 AA26 21- H_DSTBP#2
    DSTBP0# DSTBP2#
    H_DINV#0 21- H25 U22 21- H_DINV#2
    DINV0# DINV2#

    H_D#(63:0) 17-,21- 17-,21- H_D#(63:0)


    H_D#(16) N22 AE24 H_D#(48)
    D16# D48#
    H_D#(17) K25 AD24 H_D#(49)
    D17# D49#
    H_D#(18) P26 AA21 H_D#(50)
    D18# D50#
    H_D#(19) R23 AB22 H_D#(51)
    D19# D51#
    H_D#(20) L23 AB21 H_D#(52)
    D20# D52#

    DATA GRP 1

    DATA GRP 3
    H_D#(21) M24 AC26 H_D#(53)
    D21# D53#
    H_D#(22) L22 AD20 H_D#(54)
    D22# D54#
    H_D#(23) M23 AE22 H_D#(55)
    D23# D55#
    H_D#(24) P25 AF23 H_D#(56)
    D24# D56#
    H_D#(25) P23 AC25 H_D#(57)
    D25# D57#
    H_D#(26) P22 AE21 H_D#(58)
    D26# D58#
    H_D#(27) T24 AD21 H_D#(59)
    D27# D59#
    H_D#(28) R24 AC22 H_D#(60)
    +VCCP D28# D60#
    H_D#(29) L25 AD23 H_D#(61)
    D29# D61#
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- H_D#(30) T25 AF22 H_D#(62)
    D30# D62#
    H_D#(31) N25 AC23 H_D#(63)
    1 R543 D31# D63#
    H_DSTBN#1 21- L26 AE25 21- H_DSTBN#3
    DSTBN1# DSTBN3#
    1K_1% H_DSTBP#1 21- M26 AF24 21- H_DSTBP#3
    DSTBP1# DSTBP3#
    H_DINV#1 21- N24 AC20 21- H_DINV#3
    DINV1# DINV3#
    2
    GTLREF AD26 R26 R546 1 2 27.4_1%
    GTLREF COMP0
    COMP1
    U26 R545 1 2 54.9_1%
    1 R544
    C23
    TEST1 COMP2
    AA1 R236 1 2 27.4_1%
    2K_1% D25 Y1 R237 1 2 54.9_1%
    Layout note: Zo=55 ohm, TEST2 COMP3
    C24
    AF26
    TEST3 MISC E5 CLOSED TO CPU
    2 0.5" max for GTLREF. TEST4 DPRSTP#
    AF1 B5 11-,20-,31- H_DPRSTP# 31-
    TEST5 DPSLP# H_DPSLP#
    A26 D24 21- H_DPWR#
    TEST6 DPWR#
    D6 31- H_PWRGD
    PWRGOOD
    CPU_BSEL0 15-,20- B22 D7 21- H_CPUSLP#
    BSEL0 SLP#
    CPU_BSEL1 15-,20- B23 AE6 11- PSI#
    BSEL1 PSI# R239
    15-,20- C21 1 2 19-
    CPU_BSEL2 BSEL2 H_PWRGD_XDP
    1 R238 1K_5%
    FOX_PZ4782K_274M_41_478P
    0402_OPEN
    Place series resistor (R211 = 1K ohm) on H_PWRGD_XDP without stub
    2
    +VCCP
    C549 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    1 R164 1 R547 1
    0402_OPEN
    0402_OPEN 2
    0.1uF_16v_OPEN
    2 2

    Place C549(0.1uF_16V) close to the TEST4 pin.


    Make sure TEST4 routing is reference
    to GND and away from other noisy signals.

    INVENTEC
    TITLE
    VV Discrete
    MEROM-2
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 3-Nov-2008 SHEET 17 OF 54
    +VCC_CORE +VCC_CORE
    11-,18- 11-,18-

    CN506-3
    A7 AB20
    VCC001 VCC068
    A9 AB7
    VCC002 VCC069
    PLACE THESE INSIDE SOCKET 1 C171 C173 C129 A10 AC7
    1 1 1 C174 1 C127 A12
    VCC003 VCC070
    AC9
    VCC004 VCC071
    2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v A13 AC12
    CAVITY ON L8 (NORTH SIDE VCC005 VCC072
    A15 AC13
    VCC006 VCC073
    A17 AC15
    SECONDARY) VCC007 VCC074
    A18 AC17
    VCC008 VCC075
    A20 AC18
    VCC009 VCC076
    B7 AD7
    VCC010 VCC077
    B9 AD9
    VCC011 VCC078
    B10 AD10
    VCC012 VCC079
    C580 C172 C222 C170 C128 B12
    VCC013 VCC080
    AD12
    1 1 1 1 1 B14 AD14
    VCC014 VCC081
    2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v B15 AD15
    VCC015 VCC082
    B17 AD17
    VCC016 VCC083
    B18 AD18
    VCC017 VCC084
    B20 AE9
    VCC018 VCC085
    C9 AE10
    VCC019 VCC086
    C10 AE12
    VCC020 VCC087
    C12 AE13
    VCC021 VCC088
    C13 AE15
    VCC022 VCC089
    C165 C576 C169 C168 C126 C15
    VCC023 VCC090
    AE17
    1 1 1 1 1 C17 AE18
    VCC024 VCC091
    2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v C18 AE20
    PLACE THESE INSIDE SOCKET D9
    VCC025 VCC092
    AF9
    VCC026 VCC093
    D10 AF10
    CAVITY ON L8 (SOUTH SIDE VCC027 VCC094
    PLACE THESE INSIDE SOCKET
    D12 AF12
    VCC028 VCC095 +VCCP
    SECONDARY) D14
    VCC029 VCC096
    AF14 CAVITY ON L8 (NORTH SIDE
    D15 AF15 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- SECONDARY)
    VCC030 VCC097
    D17 AF17
    VCC031 VCC098
    D18 AF18
    VCC032 VCC099 +VCCP
    C125 C167 C166 C218 C619 E7
    VCC033 VCC0100
    AF20
    1 1 1 1 1 E9
    VCC034 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v E10 G21
    VCC035 VCCP01
    E12
    VCC036 VCCP02
    V6 C221 C220 C219 C579 C578 C577
    E13 J6
    1 1 1 1 1 1
    VCC037 VCCP03
    E15
    VCC038 VCCP04
    K6
    1 C611 2 2 2 2 2 2
    E17 M6
    VCC039 VCCP05 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v
    E18 J21 2 220uF_2.5v
    VCC040 VCCP06
    E20 K21
    VCC041 VCCP07
    PLACE THESE INSIDE SOCKET F7 M21
    VCC042 VCCP08
    C612 C645 C615 C613 C614 C616 F9
    VCC043 VCCP09
    N21
    1 1 1 1 1 1 F10 N6
    CAVITY ON L1 (NORTH SIDE VCC044 VCCP10
    2 2 2 2 2 2 F12 R21
    VCC045 VCCP11
    PRIMARY) 10uF_6.3v 10uF_6.3v 10uF_6.3v 10uF_6.3v 10uF_6.3v 10uF_6.3v F14
    VCC046 VCCP12
    R6
    F15 T21
    VCC047 VCCP13
    F17 T6 +V1.5S
    VCC048 VCCP14
    F18 V21
    VCC049 VCCP15
    F20 W21 10-,13-,24-,34-,45-,46-
    VCC050 VCCP16
    AA7
    VCC051
    AA9 B26
    VCC052 VCCA01
    AA10 C26
    PLACE THESE INSIDE SOCKET VCC053 VCCA02
    C608 C607 C610 C606 C644 C609 AA12
    VCC054
    1 1 1 1 1 1 AA13 AD6 11-
    CAVITY ON L1 (SOUTH SIDE VCC055 VID0 H_VID0
    2 2 2 2 2 2 AA15 AF5 11- H_VID1
    VCC056 VID1 +VCC_CORE
    PRIMARY) 10uF_6.3v 10uF_6.3v 10uF_6.3v 10uF_6.3v 10uF_6.3v 10uF_6.3v AA17
    VCC057 VID2
    AE5 11- H_VID2
    AA18 AF4 11- H_VID3 11-,18-
    VCC058 VID3 1 1
    AA20
    VCC059 VID4
    AE3 11- H_VID4 C551 C552
    1
    AB9
    VCC060 VID5
    AF3 11- H_VID5 0.01uF_16v 2 2 10uF_6.3v
    AC10
    VCC061 VID6
    AE2 11- H_VID6 R197
    AB10
    VCC062 100_1%
    AB12 2
    1 1 AB14
    VCC063
    AF7 11-
    LAYOUT NOTE:
    C617 C548 VCC064 VCCSENSE VCCSENSE PLACE C2461 NEAR PIN B26
    AB15
    SOUTH SIDE SECONDARY VCC065
    AB17
    2 2 330uF_2v_6mR VCC066
    AB18 AE7 11- VSSSENSE
    330uF_2v_6mR VCC067 VSSSENSE

    FOX_PZ4782K_274M_41_478P

    R200
    100_1%
    2
    1 1
    C605 C618
    NORTH SIDE SECONDARY
    2 2 330uF_2v_6mR
    330uF_2v_6mR
    LAYOUT NOTE:
    ROUTE VCCSENSE AND VSSSENSE TRACE AT
    24.7 OHM WITH 50 MIL SPACEING
    PLACE PU AND PD WITHIN I INCH OF CPU

    INVENTEC
    TITLE
    VV Discrete
    MEROM-3
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 3-Nov-2008 SHEET 18 OF 54
    +V3S 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    CN5
    1 2
    GND0 GND1 +VCCP 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    H_BPM5_PREQ# 16- 3 4
    OBSFN_A0 OBSFN_C0
    H_BPM4_PRDY# 16- 5 6
    OBSFN_A1 OBSFN_C1
    7 8
    GND2 GND3

    2
    1 R231
    H_BPM3_XDP# 16- 9 10
    OBSDATA_A0 OBSDATA_C0
    CN506-4 16- 11 12 1K_5% R232
    H_BPM2_XDP# OBSDATA_A1 OBSDATA_C1
    54.9_1%
    A4 P6 13 14
    VSS001 VSS082 GND4 GND5
    A8 P21 H_BPM1_XDP# 16- 15 16 2
    VSS002 VSS083 OBSDATA_A2 OBSDATA_C2

    1
    A11 P24 H_BPM0_XDP# 16- 17 18
    VSS003 VSS084 OBSDATA_A3 OBSDATA_C3 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    A14 R2 19 20
    VSS004 VSS085 GND6 GND7 +VCCP
    A16 R5 21 22
    VSS005 VSS086 OBSFN_B0 OBSFN_D0
    A19 R22 23 24
    VSS006 VSS087 OBSFN_B1 OBSFN_D1
    A23 R25 25 26
    VSS007 VSS088 GND8 GND9
    AF2
    VSS008 VSS089
    T1 27
    OBSDATA_B0 OBSDATA_D0
    28 C691
    B6 T4 29 30
    1
    VSS009 VSS090 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- OBSDATA_B1 OBSDATA_D1
    B8 T23 31 32 2
    VSS010 VSS091 +VCCP GND10 GND11
    B11
    VSS011 VSS092
    T26 33
    OBSDATA_B2 OBSDATA_D2
    34 0.1uF_16v
    B13 U3 35 36
    VSS012 VSS093 OBSDATA_B3 OBSDATA_D3
    B16 U6 37 38
    VSS013 VSS094 GND12 GND13
    B19 U21 H_PWRGD_XDP 17- 39 40 15- CLK_R_XDP
    VSS014 VSS095 PWRGOOD_HOOK0 ITPCLK_HOOK4
    B21 U24 1 2 41 42 15-
    VSS015 VSS096 HOOK1 ITPCLK#_HOOK5 CLK_R_XDP#
    B24 V2 43 44 1K_5%
    VSS016 VSS097 VCC_OBS_AB VCC_OBS_CD
    C5 V5 R632 45 46 R230 2 1 16-,21-
    VSS017 VSS098 HOOK2 RESET#_HOOK6 H_CPURST#
    C8
    VSS018 VSS099
    V22 C692 54.9_1% 47
    HOOK3 DBR#_HOOK7
    48 16-,32- XDP_DBRESET#
    C11 V25 1 49 50
    VSS019 VSS100 GND14 GND15
    C14 W1 2 51 52 16- H_TDO
    VSS020 VSS101 SDA TDO
    C16
    VSS021 VSS102
    W4 0.1uF_16v 53
    SCL TRSTn
    54 16- H_TRST#
    C19 W23 55 56 16- TDI_FLEX
    VSS022 VSS103 TCK1 TDI
    C2 W26 H_TCK 16- 57 58 16- H_TMS
    VSS023 VSS104 TCK0 TMS
    C22 Y3 59 60
    VSS024 VSS105 GND16 GND17
    C25 Y6
    VSS025 VSS106
    D1
    VSS026 VSS107
    Y21 SAMTEC_BSH_030_01_L_D_A_TR_60P_OPEN
    D4 Y24
    VSS027 VSS108
    D8 AA2
    VSS028 VSS109
    D11
    D13
    D16
    VSS029
    VSS030
    VSS031
    VSS110
    VSS111
    VSS112
    AA5
    AA8
    AA11
    XDP CONNECTOR
    D19 AA14
    VSS032 VSS113
    D23 AA16
    VSS033 VSS114
    D26 AA19
    VSS034 VSS115
    E3 AA22
    VSS035 VSS116
    E6 AA25 +V5S
    VSS036 VSS117 5-,11-,13-,14-,29-,32-,34-,37-,40-,41-,48-
    E8 AB1
    VSS037 VSS118
    E11 AB4
    VSS038 VSS119
    E14 AB8
    VSS039 VSS120
    E16
    VSS040 VSS121
    AB11 +V5S Q504
    E19 AB13 2 3
    VSS041 VSS122 S D
    E21 AB16
    VSS042 VSS123
    E24
    VSS043 VSS124
    AB19 5-,11-,13-,14-,29-,32-,34-,37-,40-,41-,48- CN502
    F5 AB23 AO3409
    G 1 C506 1 1
    VSS044 VSS125 1
    F8 AB26 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- 2 2 G G1
    VSS045 VSS126 5 U501 2 0.01uF_16v 3 3
    F11
    VSS046 VSS127
    AC3 +V3S PWM_3S_FAN# 39- 1 G G2
    F13 AC6 4 1 R520 2
    VSS047 VSS128
    F16
    VSS048 VSS129
    AC8
    THERM_3S_WARN# 19- 2 5.6K_5% ENTERY_3802_B03S_01E_3P
    F19 AC11
    VSS049 VSS130 3
    F2
    VSS050 VSS131
    AC14 TC7SET08F
    F22 AC16
    VSS051 VSS132
    F25
    VSS052 VSS133
    AC19 C7004
    1
    G4
    G1
    G23
    VSS053
    VSS054
    VSS055
    VSS134
    VSS135
    VSS136
    AC21
    AC24
    AD2
    1R9774 2
    0.1uF_16v
    FAN CONN
    G26 AD5 2.2K_5%
    VSS056 VSS137
    H3 AD8 C553
    VSS057 VSS138
    H6 AD11 1000pF_50V 2
    VSS058 VSS139
    H21
    VSS059 VSS140
    AD13 U7002
    H24 AD16 1 8 15-,26-,27-,32-,50-
    VSS060 VSS141 VDD SMCLK ICH_3S_SMCLK
    J2
    VSS061 VSS142
    AD19 1 2
    J5 AD22 16- 2 7 15-,26-,27-,32-,50- ICH_3S_SMDATA
    VSS062 VSS143 H_THERMDA DP SMDATA
    J22 AD25
    VSS063 VSS144
    J25 AE1 THERM_MINUS 16- 3 6 32-,33-,50-
    VSS064 VSS145 DN ALERT THERM_SCI#
    K1 AE4
    VSS065 VSS146
    K4 AE8 4 5
    VSS066 VSS147 THERM_3S_WARN# THERM GND
    K23 AE11 19-
    VSS067 VSS148
    K26
    VSS068 VSS149
    AE14 SMSC_EMC1402_1_ACZL_MSOP_8P
    L3 AE16
    VSS069 VSS150
    L6 AE19
    VSS070 VSS151
    L21 AE23
    VSS071 VSS152
    L24 AE26
    VSS072 VSS153
    M2 A2
    VSS073 VSS154
    M5 AF6
    VSS074 VSS155
    M22 AF8
    VSS075 VSS156
    M25 AF11
    VSS076 VSS157
    N1 AF13
    VSS077 VSS158
    N4 AF16
    VSS078 VSS159
    N23 AF19
    VSS079 VSS160
    N26 AF21
    VSS080 VSS161
    P3 A25
    VSS081 VSS162
    AF25
    VSS163

    FOX_PZ4782K_274M_41_478P

    INVENTEC
    TITLE
    VV Discrete
    THERMAL&FAN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 3-Nov-2008 SHEET 19 OF 54
    LOW=DMIx2 MCH_CFG(9)
    MCH_CFG(5)
    MCH_CFG(7) LOW=RSVD
    PCIE Graphics
    LOW=Reverse Lane NOTE : USE 4K-OHM RESISTOR WHEN INSTALLING MCH_CFG(16) 20-
    20-
    HIGH=DMIx4 (CPU Strap) HIGH=Mobile CPU Lane HIGH=Normal operation PULL-UP/PULL-DOWN RESISTOR ON ANY MCH_CFG(9)
    MCH_CFG(7) 20-
    MCH-CFG CONNECTION/PINS. MCH_CFG(5) 20-

    1 R203 1 R204 1 R201 1 R202


    MCH_CFG(13:12) 00=PARTIAL CLOCK GATING DISABLE MCH_CFG(16) LOW=Dynamic ODT MCH_CFG(11) 0402_OPEN 0402_OPEN 0402_OPEN 0402_OPEN
    Disable LOW=CALISTOGA
    01=XOR MODE ENABLE (FSB Dynamic PSB 4X CLK
    XOR/ALLZ 10=ALL-Z MODE ENABLE HIGH=Dynamic ODT HIGH=RESERVED 2 2 2 2
    ODT) ENABLE
    Enable
    11=NORMAL OPERATION U510-2
    P36 AV29 26- M_CLK_DDR0
    RSVD1 SM_CK_0
    P37 BB23 26- M_CLK_DDR1
    NOTE: CFG[2:0] STRP : 001b : 533 MT/S RSVD2 SM_CK_1
    R35 BA25 27- M_CLK_DDR2
    RSVD3 SM_CK_3
    011b : 667 MT/S N35 AV23 27- M_CLK_DDR3
    RSVD4 SM_CK_4
    AR12
    RSVD5
    AR13 AW30 26- M_CLK_DDR0#
    +V1.8 RSVD6 SM_CK#_0
    AM12 BA23 26- M_CLK_DDR1#
    RSVD7 SM_CK#_1
    8-,9-,10-,12-,13-,20-,23-,24-,26-,27- AN13 AW25 27- M_CLK_DDR2#

    DDR MUXING
    RSVD8 SM_CK#_3
    J12 AW23 27- M_CLK_DDR3#
    RSVD9 SM_CK#_4
    AR37
    RSVD10
    AM36 BE29 26-,28- M_CKE0
    1 R540 RSVD11 SM_CKE_0
    AL36 AY32 26-,28- M_CKE1
    RSVD12 SM_CKE_1
    20_1% AM37 BD39 27-,28-
    RSVD13 SM_CKE_3 M_CKE2
    D20 BG37 27-,28- M_CKE3
    RSVD14 SM_CKE_4
    2
    BG20 26-,28- M_CS0#
    SM_CS#_0
    20- SM_RCOMP BK16 26-,28- M_CS1#
    SM_CS#_1
    BG16 27-,28- M_CS2#
    SM_CS#_2
    20- SM_RCOMP# BE13 27-,28- M_CS3#
    SM_CS#_3
    H10
    RSVD20
    B51 BH18 26-,28- M_ODT0
    1 R554 RSVD21 SM_ODT_0
    BJ20 BJ15 26-,28- M_ODT1
    RSVD22 SM_ODT_1
    20_1% Note: R1351,R1352 BK22 BJ14 27-,28- M_ODT2
    RSVD23 SM_ODT_2
    BF19 BE16 27-,28- M_ODT3
    For Calero : 80.6 ohm RSVD24 SM_ODT_3
    2 BH20
    RSVD25
    For Crestline : 20 ohm BK18
    RSVD26 SM_RCOMP
    BL15 20- SM_RCOMP
    BJ18
    RSVD27 RSVD SM_RCOMP#
    BK14 20- SM_RCOMP#
    BF23
    RSVD28
    BG23 BK31 20- SM_RCOMP_VOH
    RSVD29 SM_RCOMP_VOH
    BC23 BL31 20- SM_RCOMP_VOL
    RSVD30 SM_RCOMP_VOL
    BD24
    RSVD31
    MA_A(14) 26-,28- BJ29 AR49
    RSVD32 SM_VREF_0
    MB_A(14) 27-,28- BE24 AW4 12-,26-,27- M_VREF
    RSVD33 SM_VREF_1
    BH39
    RSVD34
    AW20
    RSVD35
    BK20
    RSVD36 DPLL_REF_CLK
    B42 C145
    C48 C42
    1
    +V3S RSVD37 DPLLREF_CLK#
    CPU_BSEL0 15-,17- D47 H48
    RSVD38 DPLL_REF_SSCLK 2
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- B44
    RSVD39 DPLL_REF_SSCLK#
    H47 0.1uF_16v
    CPU_BSEL2 15-,17- C44
    RSVD40
    1 2 15-,20- A35 K44 15-
    CLKREQ_R_MCH# RSVD41 PEG_CLK CLK_R_PEG_MCH
    R250
    1 2
    10K_5%
    1 1 R173
    B37
    RSVD42 CLK PEG_CLK#
    K45 15- CLK_R_PEG_MCH#
    20-,26- PM_EXTTS#0 B36 32- DMI_TXN(3:0)
    R205 RSVD43 +V1.8
    R246 10K_5% 1K_5% B34 AN47 DMI_TXN(0)
    1K_5% RSVD44 DMI_RXN_0
    1 2 20-,27- C34 AJ38 DMI_TXN(1)
    PM_EXTTS#1 RSVD45 DMI_RXN_1 8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
    R248 10K_5% 2 2 DMI_RXN_2
    AN42 DMI_TXN(2)
    DMI_RXN_3
    AN46 DMI_TXN(3)
    1
    P27 32- DMI_TXP(3:0) R555
    CFG_0
    CPU_BSEL1 15-,17- N27
    CFG_1 DMI_RXP_0
    AM47 DMI_TXP(0)
    +V3S MCH_CFG(17:3) 20- N24 AJ39 DMI_TXP(1) 1K_1%
    CFG_2 DMI_RXP_1
    MCH_CFG(3) C21
    CFG_3 DMI_RXP_2
    AN41 DMI_TXP(2)
    MCH_CFG(4) C23 AN45 DMI_TXP(3) 2 20-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    CFG_4 DMI_RXP_3 SM_RCOMP_VOH
    MCH_CFG(5) F23 32- DMI_RXN(3:0)
    MCH_CFG(6) N23
    CFG_5
    CFG_6
    DMI DMI_TXN_0
    AJ46 DMI_RXN(0)
    1
    C558 1 C536
    MCH_CFG(7) G23 AJ41 DMI_RXN(1) R541 1
    CFG_7 DMI_TXN_1
    MCH_CFG(8) J20 AM40 DMI_RXN(2) 3K_1% 2
    0.01uF_16v 2
    CFG_8 DMI_TXN_2 2.2uF_16V
    R206 1 MCH_CFG(9) C20
    CFG_9 DMI_TXN_3
    AM44 DMI_RXN(3) 2
    1 R244 1 R245
    MCH_CFG(10) R24 32- DMI_RXP(3:0)
    0402_OPEN CFG_10
    0402_OPEN 0402_OPEN MCH_CFG(11) L23 AJ47 DMI_RXP(0)
    MCH_CFG(12) J23
    CFG_11
    CFG_12
    CFG DMI_TXP_0
    DMI_TXP_1
    AJ42 DMI_RXP(1)
    2 2 2 MCH_CFG(13) E23
    CFG_13 DMI_TXP_2
    AM39 DMI_RXP(2)
    MCH_CFG(14) E20
    CFG_14 DMI_TXP_3
    AM43 DMI_RXP(3) 20- SM_RCOMP_VOL
    MCH_CFG(18) 20- MCH_CFG(15) K23
    CFG_15 1
    MCH_CFG(16) M20
    CFG_16 C559 1 C537
    R556 1

    GRAPHICS VID
    MCH_CFG(19) 20- MCH_CFG(17) M24
    CFG_17
    MCH_CFG(18) 20- L32 1K_1% 2 2
    20- 20- N33
    CFG_18
    0.01uF_16v 2.2uF_16V
    MCH_CFG(20) MCH_CFG(19) CFG_19 2
    MCH_CFG(20) 20- L35
    CFG_20
    E35 TP39
    GFX_VID_0
    BM_BUSY# 32- G41 A39 TP40
    PM_BM_BUSY# GFX_VID_1
    H_DPRSTP# 11-,17-,31- L39 C38 TP41
    PM_DPRSTP# GFX_VID_2
    PM_EXTTS#0 20-,26- L36 B39 TP42
    PM_EXT_TS#_0 GFX_VID_3
    PM_EXTTS#1 20-,27- J36 E36 TP43
    11-,20-,32-,39- AW49
    PM_EXT_TS#_1 DFGT_VR_EN +V1.25S
    PM_PWROK PWROK
    PLT_RST# 33-,46- R167 1 2 100_5% AV20 8-,10-,24-,34-
    RSTIN#
    PM_THRMTRIP# 16-,31- N20
    THRMTRIP#
    PM_DPRSLPVR 11-,32- G36
    DPRSLPVR PM AM49 32-
    1 R573
    CL_CLK CL_CLK0
    BJ51
    NC1 CL_DATA
    AK50 32- CL_DATA0 1K_1%
    BK51
    BK50
    NC2 ME CL_PWROK
    AT43
    AN49
    11-,20-,32-,39-
    32-
    PM_PWROK
    NC3 CL_RST# CL_RST#0 2
    BL50 AM50
    NC4 CL_VREF
    BL49
    NC5 C588
    BL3
    1 1 R572
    NC6
    BL2 2 392_1%
    NC7
    BK1 0.1uF_16v
    MCH_CFG(19) LOW=NORMAL BJ1
    NC8 NC H35 2
    MCH_CFG(18) LOW=1.05V NC9 SDVO_CTRL_CLK
    E1 K36
    (DMI LANE A5
    NC10 SDVO_CTRL_DATA
    G39 15-,20-
    VCC SELECT HIGH=1.5V REVERSAL) HIGH=LANES REVERSED NC11 CLK_REQ# CLKREQ_R_MCH#
    C51 G40 32- MCH_ICH_SYNC#
    NC12 ICH_SYNC#

    MCH_CFG(20) LOW=ONLY SDVO OR PCIE X1 IS


    B50
    A50
    A49
    BK2
    NC13
    NC14
    NC15 MISC TEST_1
    TEST_2
    A37
    R32 1 2
    1 R607
    INVENTEC
    OPERATIONAL NC16 R177 TITLE
    (PCIE BACKWARD 0_5% VV Discrete
    HIGH=SDVO AND PCIE X1 ARE 20K_5%
    INTERPOERABILITY ITL_CRESTLINE_DIS_FCBGA_1299P CRESTLINE-1
    OPERATING SIMULTANEOUSLY 2
    MODE SIZE CODE DOC. NUMBER REV
    VIA THE PEG PORT
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 20 OF 54
    +VCC_PEG
    24-
    24.9_1%
    2
    R253

    H_D#(63:0) 17- 16- H_A#(35:3)


    U510-3
    Close to NB
    1

    J40 N43
    L_BKLT_CTRL PEG_COMPI
    H39
    L_BKLT_EN PEG_COMPO
    M43 U510-1
    E39 J13 H_A#(3)
    L_CTRL_CLK C657 0.1uF_16v H_A#_3
    E40 J51 50- 21- 50- H_D#(0) E2 B11 H_A#(4)
    L_CTRL_DATA PEG_RX#_0 PEG_C_RXN0 PEG_TXN0 PEG_C_TXN0 H_D#(1)
    H_D#_0 H_A#_4
    C37 L51 50- 1 2 G2 C11 H_A#(5)
    L_DDC_CLK PEG_RX#_1 PEG_C_RXN1 C274 0.1uF_16v H_D#_1 H_A#_5
    H_A#(6)
    D35
    L_DDC_DATA PEG_RX#_2
    N47 50-
    PEG_C_RXN2 PEG_TXN1 21- 50- PEG_C_TXN1 H_D#(2) G7
    H_D#_2 H_A#_6
    M11
    K40 T45 50-
    PEG_C_RXN3 1 2 H_D#(3) M6 C15 H_A#(7)
    L_VDD_EN PEG_RX#_3 C651 0.1uF_16v H_D#_3 H_A#_7
    T50 50- 21- 50- H_D#(4) H7 F16 H_A#(8)
    PEG_RX#_4 PEG_C_RXN4 PEG_TXN2 PEG_C_TXN2 H_D#_4 H_A#_8
    H_A#(9)
    L41
    LVDS_IBG PEG_RX#_5
    U40 50-
    PEG_C_RXN5 1 2 H_D#(5) H3
    H_D#_5 H_A#_9
    L13
    21- C653 0.1uF_16v H_D#(6) H_A#(10)
    L43 Y44 50- 50- G4 G17
    LVDS_VBG PEG_RX#_6 PEG_C_RXN6 PEG_TXN3 PEG_C_TXN3 H_D#_6 H_A#_10
    N41 Y40 50- 1 2 H_D#(7) F3 C14 H_A#(11)
    LVDS_VREFH PEG_RX#_7 PEG_C_RXN7 C655 0.1uF_16v H_D#_7 H_A#_11
    H_A#(12)
    N40
    LVDS_VREFL PEG_RX#_8
    AB51 50-
    PEG_C_RXN8 PEG_TXN4 21- 50- PEG_C_TXN4 H_D#(8) N8
    H_D#_8 H_A#_12
    K16
    LVDS

    D46 W49 50-


    PEG_C_RXN9 1 2 H_D#(9) H2 B13 H_A#(13)
    LVDSA_CLK# PEG_RX#_9 C227 0.1uF_16v H_D#_9 H_A#_13
    C45 AD44 50- 21- 50- H_D#(10) M10 L16 H_A#(14)
    LVDSA_CLK PEG_RX#_10 PEG_C_RXN10 PEG_TXN5 PEG_C_TXN5 H_D#_10 H_A#_14
    H_A#(15)
    D44
    LVDSB_CLK# PEG_RX#_11
    AD40 50-
    PEG_C_RXN11 1 2 H_D#(11) N12
    H_D#_11 H_A#_15
    J17
    E42 AG46 50- 21- C649 0.1uF_16v 50- H_D#(12) N9 B14 H_A#(16)
    LVDSB_CLK PEG_RX#_12 PEG_C_RXN12 PEG_TXN6 PEG_C_TXN6 H_D#_12 H_A#_16
    AH49 50- 1 2 H_D#(13) H5 K19 H_A#(17)
    PEG_RX#_13 PEG_C_RXN13 C630 0.1uF_16v H_D#_13 H_A#_17
    H_A#(18)
    G51
    LVDSA_DATA#_0 PEG_RX#_14
    AG45 50-
    PEG_C_RXN14 PEG_TXN7 21- 50- PEG_C_TXN7 H_D#(14) P13
    H_D#_14 H_A#_18
    P15
    E51 AG41 50-
    PEG_C_RXN15 1 2 H_D#(15) K9 R17 H_A#(19)
    LVDSA_DATA#_1 PEG_RX#_15 C631 0.1uF_16v H_D#_15 H_A#_19
    F49 21- 50- H_D#(16) M2 B16 H_A#(20)
    LVDSA_DATA#_2 PEG_TXN8 PEG_C_TXN8 H_D#_16 H_A#_20
    H_A#(21)
    J50 50-
    PEG_C_RXP0 1 2 H_D#(17) W10 H20
    PEG_RX_0 H_D#_17 H_A#_21
    L50 50- 21- C183 0.1uF_16v 50- H_D#(18) Y8 L19 H_A#(22)
    PEG_RX_1 PEG_C_RXP1 PEG_TXN9 PEG_C_TXN9 H_D#_18 H_A#_22
    G50 M47 50- 1 2 H_D#(19) V4 D17 H_A#(23)
    LVDSA_DATA_0 PEG_RX_2 PEG_C_RXP2 C623 0.1uF_16v H_D#_19 H_A#_23
    E50 U44 50- PEG_C_RXP3 PEG_TXN10 21- 50- PEG_C_TXN10 H_D#(20) M3 M17 H_A#(24)
    LVDSA_DATA_1 PEG_RX_3 H_D#_20 H_A#_24
    PCI-EXPRESS GRAPHICS

    F48 T49 50- 1 2 H_D#(21) J1 N16 H_A#(25)


    LVDSA_DATA_2 PEG_RX_4 PEG_C_RXP4 C636 0.1uF_16v H_D#_21 H_A#_25
    H_A#(26)
    T41 50- 21- 50- H_D#(22) N5 J19

    HOST
    PEG_RX_5 PEG_C_RXP5 PEG_TXN11 PEG_C_TXN11 H_D#(23)
    H_D#_22 H_A#_26
    W45 50- PEG_C_RXP6 1 2 N3 B18 H_A#(27)
    PEG_RX_6 C629 0.1uF_16v H_D#_23 H_A#_27
    G44 W41 50- 21- 50- H_D#(24) W6 E19 H_A#(28)
    LVDSB_DATA#_0 PEG_RX_7 PEG_C_RXP7 PEG_TXN12 PEG_C_TXN12 H_D#(25)
    H_D#_24 H_A#_28
    H_A#(29)
    B47 AB50 50- PEG_C_RXP8 1 2 W9 B17
    LVDSB_DATA#_1 PEG_RX_8 C147 0.1uF_16v H_D#_25 H_A#_29
    B45 Y48 50- PEG_C_RXP9 PEG_TXN13 21- 50- PEG_C_TXN13 H_D#(26) N2 B15 H_A#(30)
    LVDSB_DATA#_2 PEG_RX_9 H_D#_26 H_A#_30
    AC45 50- 1 2 H_D#(27) Y7 E17 H_A#(31)
    PEG_RX_10 PEG_C_RXP10 C633 0.1uF_16v H_D#_27 H_A#_31
    H_A#(32)
    PEG_RX_11
    AC41 50-
    PEG_C_RXP11 PEG_TXN14 21- 50- PEG_C_TXN14 H_D#(28) Y9
    H_D#_28 H_A#_32
    C18
    E44 AH47 50- PEG_C_RXP12 1 2 H_D#(29) P4 A19 H_A#(33)
    LVDSB_DATA_0 PEG_RX_12 C627 0.1uF_16v H_D#_29 H_A#_33
    A47 AG49 50- 21- 50- H_D#(30) W3 B19 H_A#(34)
    LVDSB_DATA_1 PEG_RX_13 PEG_C_RXP13 PEG_TXN15 PEG_C_TXN15 H_D#_30 H_A#_34
    H_A#(35)
    A45
    LVDSB_DATA_2 PEG_RX_14
    AH45 50- PEG_C_RXP14 1 2 H_D#(31) N1
    H_D#_31 H_A#_35
    N19
    AG42 50- PEG_C_RXP15 H_D#(32) AD12
    PEG_RX_15 H_D#_32
    H_D#(33) AE3
    H_D#_33 H_ADS#
    G12 16- H_ADS#
    PEG_TX#_0
    N45 21- PEG_TXN0 H_D#(34) AD9
    H_D#_34 H_ADSTB#_0
    H17 16- H_ADSTB#0
    U39 21- PEG_TXN1 H_D#(35) AC9 G20 16- H_ADSTB#1
    PEG_TX#_1 H_D#_35 H_ADSTB#_1
    E27
    TVA_DAC PEG_TX#_2
    U47 21- PEG_TXN2 H_D#(36) AC7
    H_D#_36 H_BNR#
    C8 16- H_BNR#
    G27 N51 21- 21- C656 0.1uF_16v 50- H_D#(37) AC14 E8 16-
    TVB_DAC PEG_TX#_3 PEG_TXN3 PEG_TXP0 PEG_C_TXP0 H_D#_37 H_BPRI# H_BPRI#
    K27
    TVC_DAC PEG_TX#_4
    R50 21- PEG_TXN4 1 2 H_D#(38) AD11
    H_D#_38 H_BREQ#
    F12 16- H_BREQ#0
    T42 21- 21- C275 0.1uF_16v 50- H_D#(39) AC11 D6 16-
    PEG_TX#_5 PEG_TXN5 PEG_TXP1 PEG_C_TXP1 H_D#_39 H_DEFER# H_DEFER#
    TV

    F27
    TVA_RTN PEG_TX#_6
    Y43 21- PEG_TXN6 1 2 H_D#(40) AB2
    H_D#_40 H_DBSY#
    C10 16- H_DBSY#
    J27 W46 21- 21- C650 0.1uF_16v 50- H_D#(41) AD7 AM5 15-
    TVB_RTN PEG_TX#_7 PEG_TXN7 PEG_TXP2 PEG_C_TXP2 H_D#_41 HPLL_CLK CLK_R_MCHBCLK
    L27
    TVC_RTN PEG_TX#_8
    W38 21- PEG_TXN8 1 2 H_D#(42) AB1
    H_D#_42 HPLL_CLK#
    AM7 15- CLK_R_MCHBCLK#
    AD39 21- 21- C652 0.1uF_16v 50- H_D#(43) Y3 H8 17-
    PEG_TX#_9 PEG_TXN9 PEG_TXP3 PEG_C_TXP3 H_D#_43 H_DPWR# H_DPWR#
    M35
    TV_DCONSEL0 PEG_TX#_10
    AC46 21- PEG_TXN10 1 2 H_D#(44) AC6
    H_D#_44 H_DRDY#
    K7 16- H_DRDY#
    P33 AC49 21- 21- C654 0.1uF_16v 50- H_D#(45) AE2 E4 16-
    TV_DCONSEL1 PEG_TX#_11 PEG_TXN11 PEG_TXP4 PEG_C_TXP4 H_D#_45 H_HIT# H_HIT#
    PEG_TX#_12
    AC42 21- PEG_TXN12 1 2 H_D#(46) AC5
    H_D#_46 H_HITM#
    C6 16- H_HITM#
    AH39 21- 21- C228 0.1uF_16v 50- H_D#(47) AG3 G10 16-
    PEG_TX#_13 PEG_TXN13 PEG_TXP5 PEG_C_TXP5 H_D#_47 H_LOCK# H_LOCK#
    PEG_TX#_14
    AE49 21-
    PEG_TXN14 1 2 H_D#(48) AJ9
    H_D#_48 H_TRDY#
    B7 16-
    H_TRDY#
    AH44 21- 21- C648 0.1uF_16v 50- H_D#(49) AH8
    PEG_TX#_15 PEG_TXN15 PEG_TXP6 PEG_C_TXP6 H_D#_49
    1 2 H_D#(50) AJ14
    H_D#_50
    H32 M45 21- 21- C628 0.1uF_16v 50- H_D#(51) AE9
    CRT_BLUE PEG_TX_0 PEG_TXP0 PEG_TXP7 PEG_C_TXP7 H_D#_51
    G32 T38 21- PEG_TXP1 1 2 H_D#(52) AE11
    CRT_BLUE# PEG_TX_1 C634 0.1uF_16v H_D#_52
    K29
    CRT_GREEN PEG_TX_2
    T46 21- PEG_TXP2 PEG_TXP8 21- 50- PEG_C_TXP8 H_D#(53) AH12
    H_D#_53 H_DINV#_0
    K5 17- H_DINV#0
    VGA

    J29
    CRT_GREEN# PEG_TX_3
    N50 21- PEG_TXP3 1 2 H_D#(54) AJ5
    H_D#_54 H_DINV#_1
    L2 17- H_DINV#1
    F29 R51 21- 21- C185 0.1uF_16v 50- H_D#(55) AH5 AD13 17-
    CRT_RED PEG_TX_4 PEG_TXP4 PEG_TXP9 PEG_C_TXP9 H_D#_55 H_DINV#_2 H_DINV#2
    E29
    CRT_RED# PEG_TX_5
    U43 21- PEG_TXP5 1 2 H_D#(56) AJ6
    H_D#_56 H_DINV#_3
    AE13 17- H_DINV#3
    W42 21- 21- C624 0.1uF_16v 50- H_D#(57) AE7
    PEG_TX_6 PEG_TXP6 PEG_TXP10 PEG_C_TXP10 H_D#_57
    PEG_TX_7
    Y47 21- PEG_TXP7 1 2 H_D#(58) AJ7
    H_D#_58 H_DSTBN#_0
    M7 17- H_DSTBN#0
    K33 Y39 21- 21- C635 0.1uF_16v 50- H_D#(59) AJ2 K3 17-
    CRT_DDC_CLK PEG_TX_8 PEG_TXP8 PEG_TXP11 PEG_C_TXP11 H_D#_59 H_DSTBN#_1 H_DSTBN#1
    G35
    CRT_DDC_DATA PEG_TX_9
    AC38 21- PEG_TXP9 1 2 H_D#(60) AE5
    H_D#_60 H_DSTBN#_2
    AD2 17- H_DSTBN#2
    F33 AD47 21- 21- C626 0.1uF_16v 50- H_D#(61) AJ3 AH11 17-
    CRT_HSYNC PEG_TX_10 PEG_TXP10 PEG_TXP12 PEG_C_TXP12 H_D#_61 H_DSTBN#_3 H_DSTBN#3
    C32
    CRT_TVO_IREF PEG_TX_11
    AC50 21- PEG_TXP11 1 2 H_D#(62) AH2
    H_D#_62
    E33 AD43 21- 21- C184 0.1uF_16v 50- H_D#(63) AH13 L7 17-
    CRT_VSYNC PEG_TX_12 PEG_TXP12 PEG_TXP13 PEG_C_TXP13 H_D#_63 H_DSTBP#_0 H_DSTBP#0
    AG39 21- PEG_TXP13 1 2 K2 17- H_DSTBP#1
    PEG_TX_13 C632 0.1uF_16v H_DSTBP#_1
    AE50 21- PEG_TXP14 PEG_TXP14 21- 50- PEG_C_TXP14 MCH_HSWING 21- B3 AC2 17- H_DSTBP#2 16- H_REQ#(4:0)
    PEG_TX_14 H_SWING H_DSTBP#_2
    AH43 21- PEG_TXP15 1 2 MCH_HRCOMP 21- C2 AJ10 17- H_DSTBP#3
    PEG_TX_15 C625 0.1uF_16v H_RCOMP H_DSTBP#_3
    PEG_TXP15 21- 50- PEG_C_TXP15
    ITL_CRESTLINE_DIS_FCBGA_1299P 1 2 MCH_HSCOMP 21- W1
    H_SCOMP H_REQ#_0
    M14 H_REQ#(0)
    MCH_HSCOMP# 21- W2 E13 H_REQ#(1)
    H_SCOMP# H_REQ#_1
    H_REQ#_2
    A11 H_REQ#(2)
    H_CPURST# 16-,19- B6
    H_CPURST# H_REQ#_3
    H13 H_REQ#(3) 16- H_RS#(2:0)
    H_CPUSLP# 17- E5 B12 H_REQ#(4)
    H_CPUSLP# H_REQ#_4
    E12 H_RS#(0)
    +VCCP 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- B9
    H_RS#_0
    D7
    H_AVREF H_RS#_1 H_RS#(1)
    A9
    H_DVREF H_RS#_2
    D8 H_RS#(2)
    1 R603 ITL_CRESTLINE_DIS_FCBGA_1299P
    +VCCP 1K_1% Layout notes:
    Trace need be 10 mils wide with 20 mils
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    2
    1 R598
    221_1%
    +VCCP 1 R605 C668
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- 1
    2 2K_1%
    MCH_HSWING 21- R596 MCH_HSCOMP# 21- R582 1 2
    2
    MCH_HRCOMP 21- 1 2 2 0.1uF_16v
    1 R599 54.9_1%
    100_1%1
    C666
    2
    0.1uF_16v

    24.9_1%
    INVENTEC
    2 TITLE
    +VCCP
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- VV Discrete
    21- R581 1 2
    Crestline-2
    MCH_HSCOMP
    54.9_1% SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 21 OF 54
    MB_DATA(63:0)
    MA_DATA(63:0) 27-
    26-
    U510-5
    U510-4 AP49
    SB_DQ0 SB_BS_0
    AY17 27-,28- MB_BS0#
    AR43 BB19 26-,28- MA_BS0# AR51 BG18 27-,28- MB_BS1#
    SA_DQ0 SA_BS_0 SB_DQ1 SB_BS_1
    AW44 BK19 26-,28- MA_BS1# AW50 BG36 27-,28- MB_BS2#
    SA_DQ1 SA_BS_1 SB_DQ2 SB_BS_2
    BA45 BF29 26-,28- MA_BS2# AW51
    SA_DQ2 SA_BS_2 SB_DQ3
    AY46 AN51 BE17 27-,28- MB_CAS#
    SA_DQ3 SB_DQ4 SB_CAS#
    AR41 BL17 26-,28- MA_CAS# AN50 27- MB_DM(7:0)
    SA_DQ4 SA_CAS# SB_DQ5
    AR45 26- MA_DM(7:0) AV50 AR50
    SA_DQ5 SB_DQ6 SB_DM_0
    AT42
    SA_DQ6 SA_DM_0
    AT45 MA_DM(0) AV49
    SB_DQ7 SB_DM_1
    BD49
    AW47
    SA_DQ7 SA_DM_1
    BD44 MA_DM(1) BA50
    SB_DQ8 SB_DM_2
    BK45
    BB45 BD42 MA_DM(2) BB50 BL39
    SA_DQ8 SA_DM_2 SB_DQ9 SB_DM_3
    BF48
    SA_DQ9 SA_DM_3
    AW38 MA_DM(3) BA49
    SB_DQ10 SB_DM_4
    BH12
    BG47
    SA_DQ10 SA_DM_4
    AW13 MA_DM(4) BE50
    SB_DQ11 SB_DM_5
    BJ7
    BJ45 BG8 MA_DM(5) BA51 BF3
    SA_DQ11 SA_DM_5 SB_DQ12 SB_DM_6
    BB47
    SA_DQ12 SA_DM_6
    AY5 MA_DM(6) AY49
    SB_DQ13 SB_DM_7
    AW2
    BG50
    SA_DQ13 SA_DM_7
    AN6 MA_DM(7) BF50
    SB_DQ14
    27- MB_DQS(7:0)
    BH49 26- MA_DQS(7:0) BF49 AT50
    SA_DQ14 SB_DQ15 SB_DQS_0
    BE45
    SA_DQ15 SA_DQS_0
    AT46 MA_DQS(0) BJ50
    SB_DQ16 SB_DQS_1
    BD50
    AW43
    SA_DQ16 SA_DQS_1
    BE48 MA_DQS(1) BJ44
    SB_DQ17 SB_DQS_2
    BK46
    BE44
    SA_DQ17 SA_DQS_2
    BB43 MA_DQS(2) BJ43
    SB_DQ18 SB_DQS_3
    BK39
    BG42
    SA_DQ18 SA_DQS_3
    BC37 MA_DQS(3) BL43
    SB_DQ19 SB_DQS_4
    BJ12
    BE40
    SA_DQ19 SA_DQS_4
    BB16 MA_DQS(4) BK47
    SB_DQ20 SB_DQS_5
    BL7
    BF44
    SA_DQ20 SA_DQS_5
    BH6 MA_DQS(5) BK49
    SB_DQ21 SB_DQS_6
    BE2
    BH45
    SA_DQ21 SA_DQS_6
    BB2 MA_DQS(6) BK43
    SB_DQ22 SB_DQS_7
    AV2 27- MB_DQS#(7:0)

    DDR SYSTEM MEMORY B


    BG40
    SA_DQ22 SA_DQS_7
    AP3 MA_DQS(7) 26- MA_DQS#(7:0) BK42
    SB_DQ23 SB_DQS#_0
    AU50
    DDR SYSTEM MEMORY A

    BF40
    SA_DQ23 SA_DQS#_0
    AT47 MA_DQS#(0) BJ41
    SB_DQ24 SB_DQS#_1
    BC50
    AR40
    SA_DQ24 SA_DQS#_1
    BD47 MA_DQS#(1) BL41
    SB_DQ25 SB_DQS#_2
    BL45
    AW40 BC41 MA_DQS#(2) BJ37 BK38
    SA_DQ25 SA_DQS#_2 SB_DQ26 SB_DQS#_3
    AT39
    SA_DQ26 SA_DQS#_3
    BA37 MA_DQS#(3) BJ36
    SB_DQ27 SB_DQS#_4
    BK12
    AW36
    SA_DQ27 SA_DQS#_4
    BA16 MA_DQS#(4) BK41
    SB_DQ28 SB_DQS#_5
    BK7
    AW41 BH7 MA_DQS#(5) BJ40 BF2
    SA_DQ28 SA_DQS#_5 SB_DQ29 SB_DQS#_6
    AY41
    SA_DQ29 SA_DQS#_6
    BC1 MA_DQS#(6) BL35
    SB_DQ30 SB_DQS#_7
    AV3
    AV38
    SA_DQ30 SA_DQS#_7
    AP2 MA_DQS#(7) 26-,28- MA_A(13:0) BK37
    SB_DQ31
    27-,28- MB_A(13:0)
    AT38
    SA_DQ31
    BK13
    SB_DQ32 SB_MA_0
    BC18 MB_A(0)
    AV13
    SA_DQ32 SA_MA_0
    BJ19 MA_A(0) BE11
    SB_DQ33 SB_MA_1
    BG28 MB_A(1)
    AT13
    SA_DQ33 SA_MA_1
    BD20 MA_A(1) BK11
    SB_DQ34 SB_MA_2
    BG25 MB_A(2)
    AW11
    SA_DQ34 SA_MA_2
    BK27 MA_A(2) BC11
    SB_DQ35 SB_MA_3
    AW17 MB_A(3)
    AV11
    SA_DQ35 SA_MA_3
    BH28 MA_A(3) BC13
    SB_DQ36 SB_MA_4
    BF25 MB_A(4)
    AU15
    SA_DQ36 SA_MA_4
    BL24 MA_A(4) BE12
    SB_DQ37 SB_MA_5
    BE25 MB_A(5)
    AT11
    SA_DQ37 SA_MA_5
    BK28 MA_A(5) BC12
    SB_DQ38 SB_MA_6
    BA29 MB_A(6)
    BA13
    SA_DQ38 SA_MA_6
    BJ27 MA_A(6) BG12
    SB_DQ39 SB_MA_7
    BC28 MB_A(7)
    BA11
    SA_DQ39 SA_MA_7
    BJ25 MA_A(7) BJ10
    SB_DQ40 SB_MA_8
    AY28 MB_A(8)
    BE10
    SA_DQ40 SA_MA_8
    BL28 MA_A(8) BL9
    SB_DQ41 SB_MA_9
    BD37 MB_A(9)
    BD10
    SA_DQ41 SA_MA_9
    BA28 MA_A(9) BK5
    SB_DQ42 SB_MA_10
    BG17 MB_A(10)
    BD8
    SA_DQ42 SA_MA_10
    BC19 MA_A(10) BL5
    SB_DQ43 SB_MA_11
    BE37 MB_A(11)
    AY9
    SA_DQ43 SA_MA_11
    BE28 MA_A(11) BK9
    SB_DQ44 SB_MA_12
    BA39 MB_A(12)
    BG10
    SA_DQ44 SA_MA_12
    BG30 MA_A(12) BK10
    SB_DQ45 SB_MA_13
    BG13 MB_A(13)
    AW9 BJ16 MA_A(13) BJ8
    SA_DQ45 SA_MA_13 SB_DQ46
    BD7 BJ6 AV16 27-,28- MB_RAS#
    SA_DQ46 SB_DQ47 SB_RAS#
    BB9 BE18 26-,28- MA_RAS# BF4 AY18 TP29
    SA_DQ47 SA_RAS# SB_DQ48 SB_RCVEN#
    BB5 AY20 TP28 BH5
    SA_DQ48 SA_RCVEN# SB_DQ49
    AY7 BG1 BC17 27-,28- MB_WE#
    SA_DQ49 SB_DQ50 SB_WE#
    AT5 BA19 26-,28- MA_WE# BC2
    SA_DQ50 SA_WE# SB_DQ51
    AT7 BK3
    SA_DQ51 SB_DQ52
    AY6 BE4
    SA_DQ52 SB_DQ53
    BB7 BD3
    SA_DQ53 SB_DQ54
    AR5 BJ2
    SA_DQ54 SB_DQ55
    AR8 BA3
    SA_DQ55 SB_DQ56
    AR9 BB3
    SA_DQ56 SB_DQ57
    AN3 AR1
    SA_DQ57 SB_DQ58
    AM8 AT3
    SA_DQ58 SB_DQ59
    AN10 AY2
    SA_DQ59 SB_DQ60
    AT9 AY3
    SA_DQ60 SB_DQ61
    AN9 AU2
    SA_DQ61 SB_DQ62
    AM9 AT2
    SA_DQ62 SB_DQ63
    AN11
    SA_DQ63
    ITL_CRESTLINE_DIS_FCBGA_1299P
    ITL_CRESTLINE_DIS_FCBGA_1299P
    INVENTEC
    TITLE
    VV Discrete
    CRESTLINE-3
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 22 OF 54
    +VCCP
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    U510-7
    AT35
    VCC_1
    AT34 T17
    VCC_2 VCC_AXG_NCTF_1
    AH28
    VCC_3 VCC_AXG_NCTF_2
    T18 U510-6
    AC32 T19 AB33
    VCC_4 VCC_AXG_NCTF_3 VCC_NCTF_1
    AC31 T21 AB36
    VCC_5 VCC_AXG_NCTF_4 VCC_NCTF_2
    AK32 T22 AB37
    VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_3
    AJ31 T23 AC33 T27
    VCC_7 VCC_AXG_NCTF_6 VCC_NCTF_4 VSS_NCTF_1
    AJ28 T25 AC35 T37
    VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_5 VSS_NCTF_2
    AH32 U15 AC36 U24
    VCC_9 VCC_AXG_NCTF_8 VCC_NCTF_6 VSS_NCTF_3
    AH31 U16 AD35 U28
    VCC_10 VCC_AXG_NCTF_9 VCC_NCTF_7 VSS_NCTF_4
    AH29 U17 AD36 V31
    VCC_11 VCC_AXG_NCTF_10 VCC_NCTF_8 VSS_NCTF_5
    AF32 U19 AF33 V35
    VCC_12 VCC_AXG_NCTF_11 VCC_NCTF_9 VSS_NCTF_6
    U20 AF36 AA19
    VCC_AXG_NCTF_12 VCC_NCTF_10 VSS_NCTF_7
    U21 AH33 AB17
    VCC_AXG_NCTF_13 VCC_NCTF_11 VSS_NCTF_8
    U23 AH35 AB35
    VCC_AXG_NCTF_14 +VCCP VCC_NCTF_12 VSS_NCTF_9
    R30 U26 AH36 AD19
    VCC_13 VCC_AXG_NCTF_15 VCC_NCTF_13 VSS_NCTF_10
    V16 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- AH37 AD37
    VCC_AXG_NCTF_16 VCC_NCTF_14 VSS_NCTF_11
    V17 AJ33 AF17
    VCC_AXG_NCTF_17 VCC_NCTF_15 VSS_NCTF_12
    V19 AJ35 AF35
    VCC_AXG_NCTF_18 VCC_NCTF_16 VSS_NCTF_13
    V20 AK33 AK17
    VCC_AXG_NCTF_19 VCC_NCTF_17 VSS_NCTF_14
    V21 AK35 AM17
    VCC_AXG_NCTF_20 C620 VCC_NCTF_18 VSS_NCTF_15
    VCC_AXG_NCTF_21
    V23
    1 C137 C179 C139 C142 AK36
    VCC_NCTF_19 VSS_NCTF_16
    AM24
    V24 1 1 1 1 AK37 AP26
    POWER

    +V1.8 VCC_AXG_NCTF_22 VCC_NCTF_20 VSS_NCTF_17


    VCC_AXG_NCTF_23
    Y15 2 220uF_2.5v 2 2 2 2 AD33
    VCC_NCTF_21 VSS_NCTF_18
    AP28
    8-,9-,10-,12-,13-,20-,23-,24-,26-,27- VCC_AXG_NCTF_24
    Y16 22uF_6.3v 0.22uF_10v 0.22uF_10v 0.1uF_16v AJ36
    VCC_NCTF_22 VSS_NCTF_19
    AR15
    Y17 AM35 AR19
    VCC_AXG_NCTF_25 VCC_NCTF_23 VSS_NCTF_20
    AU32 Y19 308 mils from AL33 AR28
    VCC_SM_1 VCC_AXG_NCTF_26 VCC_NCTF_24 VSS_NCTF_21
    AU33 Y20 AL35
    VCC_SM_2 VCC_AXG_NCTF_27 the Edge VCC_NCTF_25
    AU35
    VCC_SM_3 VCC_AXG_NCTF_28
    Y21 Cavity Capacitors AA33
    VCC_NCTF_26
    AV33 Y23 AA35
    VCC_SM_4 VCC_AXG_NCTF_29 VCC_NCTF_27
    AW33 Y24 AA36
    VCC_SM_5 VCC_AXG_NCTF_30 VCC_NCTF_28
    AW35 Y26 AP35
    VCC_SM_6 VCC_AXG_NCTF_31 VCC_NCTF_29
    AY35 Y28 AP36
    VCC_SM_7 VCC_AXG_NCTF_32 VCC_NCTF_30
    BA32 Y29 AR35
    VCC_SM_8 VCC_AXG_NCTF_33 VCC_NCTF_31
    BA33 AA16 AR36
    VCC_SM_9 VCC_AXG_NCTF_34 +V1.8 VCC_NCTF_32
    BA35 AA17 Y32
    VCC_SM_10 VCC_AXG_NCTF_35 VCC_NCTF_33
    BB33 AB16 8-,9-,10-,12-,13-,20-,23-,24-,26-,27- Y33
    VCC_SM_11 VCC_AXG_NCTF_36 VCC_NCTF_34
    BC32 AB19 Y35
    VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_35
    BC33 AC16 Y36
    VCC_SM_13 VCC_AXG_NCTF_38 VCC_NCTF_36
    BC35 AC17 Y37 A3

    POWER
    VCC_SM_14 VCC_AXG_NCTF_39 VCC_NCTF_37 VSS_SCB1
    BD32 AC19 T30 B2
    VCC_SM_15 VCC_AXG_NCTF_40 C560 VCC_NCTF_38 VSS_SCB2
    BD35
    VCC_SM_16 VCC_AXG_NCTF_41
    AD15 C112 1 C95 C96 T34
    VCC_NCTF_39 VSS_SCB3
    C1
    BE32 AD16 1 1 1 T35 BL1
    VCC_SM_17 VCC_AXG_NCTF_42 VCC_NCTF_40 VSS_SCB4
    BE33
    VCC_SM_18 VCC_AXG_NCTF_43
    AD17 2 2 220uF_2.5v 2 2 U29
    VCC_NCTF_41 VSS_SCB5
    BL51
    BE35
    VCC_SM_19 VCC_AXG_NCTF_44
    AF16 0.1uF_16v 22uF_6.3v 22uF_6.3v U31
    VCC_NCTF_42 VSS_SCB6
    A51
    BF33 AF19 U32
    VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_43
    BF34 AH15 U33
    VCC_SM_21 VCC_AXG_NCTF_46 VCC_NCTF_44
    BG32 AH16 U35
    VCC_SM_22 VCC_AXG_NCTF_47 VCC_NCTF_45
    BG33 AH17 U36 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    VCC_SM_23 VCC_AXG_NCTF_48 VCC_NCTF_46
    BG35 AH19 V32
    VCC_SM_24 VCC_AXG_NCTF_49 VCC_NCTF_47 +VCCP
    BH32 AJ16 V33
    VCC_SM_25 VCC_AXG_NCTF_50 VCC_NCTF_48
    BH34 AJ17 V36
    VCC_SM_26 VCC_AXG_NCTF_51 VCC_NCTF_49
    BH35 AJ19 V37
    VCC_SM_27 VCC_AXG_NCTF_52 VCC_NCTF_50
    BJ32 AK16 AT33
    VCC_SM_28 VCC_AXG_NCTF_53 +VCCP VCC_AXM_1
    BJ33 AK19 AT31
    VCC_SM_29 VCC_AXG_NCTF_54 VCC_AXM_2
    BJ34 AL16 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34- AK29
    VCC_SM_30 VCC_AXG_NCTF_55 VCC_AXM_3
    BK32 AL17 AK24
    VCC_SM_31 VCC_AXG_NCTF_56 VCC_AXM_4
    BK33 AL19 AL24 AK23
    VCC_SM_32 VCC_AXG_NCTF_57 VCC_AXM_NCTF_1 VCC_AXM_5
    BK34 AL20 AL26 AJ26
    VCC_SM_33 VCC_AXG_NCTF_58 VCC_AXM_NCTF_2 VCC_AXM_6
    BK35 AL21 AL28 AJ23
    VCC_SM_34 VCC_AXG_NCTF_59 VCC_AXM_NCTF_3 VCC_AXM_7
    BL33
    VCC_SM_35 VCC_AXG_NCTF_60
    AL23 C621 C622 C176 C143 C180 C178 AM26
    VCC_AXM_NCTF_4
    AU30 AM15
    1 1 1 1 1 1 AM28
    VCC_SM_36 VCC_AXG_NCTF_61 VCC_AXM_NCTF_5
    AM16 AM29
    VCC_AXG_NCTF_62 2 2 2 2 2 2 VCC_AXM_NCTF_6
    VCC_AXG_NCTF_63
    AM19 22uF_6.3v 0.22uF_10v 0.22uF_10v 0.1uF_16v 0.1uF_16v 0.1uF_16v AM31
    VCC_AXM_NCTF_7
    AM20 AM32
    VCC_AXG_NCTF_64 VCC_AXM_NCTF_8
    AM21 AM33
    VCC_AXG_NCTF_65 VCC_AXM_NCTF_9
    R20 AM23 Cavity Capacitors AP29
    VCC_AXG_1 VCC_AXG_NCTF_66 PLACE THE EDGE VCC_AXM_NCTF_10
    T14 AP15 AP31
    VCC_AXG_2 VCC_AXG_NCTF_67 VCC_AXM_NCTF_11
    W13 AP16 AP32
    VCC_AXG_3 VCC_AXG_NCTF_68 VCC_AXM_NCTF_12
    W14 AP17 AP33
    VCC_AXG_4 VCC_AXG_NCTF_69 VCC_AXM_NCTF_13
    Y12 AP19 AL29
    VCC_AXG_5 VCC_AXG_NCTF_70 VCC_AXM_NCTF_14
    AA20 AP20 AL31
    VCC_AXG_6 VCC_AXG_NCTF_71 VCC_AXM_NCTF_15
    AA23 AP21 AL32
    VCC_AXG_7 VCC_AXG_NCTF_72 VCC_AXM_NCTF_16
    AA26 AP23 AR31
    VCC_AXG_8 VCC_AXG_NCTF_73 VCC_AXM_NCTF_17
    AA28 AP24 AR32
    VCC_AXG_9 VCC_AXG_NCTF_74 VCC_AXM_NCTF_18
    AB21 AR20 AR33
    VCC_AXG_10 VCC_AXG_NCTF_75 VCC_AXM_NCTF_19
    AB24 AR21
    VCC_AXG_11 VCC_AXG_NCTF_76
    AB29 AR23
    VCC_AXG_12 VCC_AXG_NCTF_77
    AC20 AR24
    VCC_AXG_13 VCC_AXG_NCTF_78
    AC21 AR26
    VCC_AXG_14 VCC_AXG_NCTF_79
    AC23 V26
    VCC_AXG_15 VCC_AXG_NCTF_80
    AC24
    VCC_AXG_16 VCC_AXG_NCTF_81
    V28 ITL_CRESTLINE_DIS_FCBGA_1299P
    AC26 V29
    VCC_AXG_17 VCC_AXG_NCTF_82
    AC28 Y31
    VCC_AXG_18 VCC_AXG_NCTF_83
    AC29
    VCC_AXG_19
    AD20
    VCC_AXG_20
    AD23
    VCC_AXG_21
    AD24 AW45
    VCC_AXG_22 VCC_SM_LF1
    AD28 BC39
    VCC_AXG_23 VCC_SM_LF2
    AF21 BE39
    VCC_AXG_24 VCC_SM_LF3
    AF26 BD17
    VCC_AXG_25 VCC_SM_LF4
    AA31 BD4
    VCC_AXG_26 VCC_SM_LF5
    AH20 AW8
    VCC_AXG_27 VCC_SM_LF6
    AH21 AT6
    VCC_AXG_28 VCC_SM_LF7
    AH23
    VCC_AXG_29
    AH24
    VCC_AXG_30 C130 C131 C108 C109 C144 C141 C146
    AH26
    1 1 1 1 1 1 1
    VCC_AXG_31
    AD31 2 2 2 2 2 2 2
    VCC_AXG_32
    0.1uF_16v 0.1uF_16v 0.22uF_10v 0.47uF_6.3v 0.47uF_6.3v 1uF_10v 1uF_10v
    AJ20
    AN14
    VCC_AXG_33
    VCC_AXG_34 INVENTEC
    TITLE
    VV Discrete
    ITL_CRESTLINE_DIS_FCBGA_1299P CRESTLINE-4
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 23 OF 54
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-

    +VCCP

    1 C177 C181 C646


    1 C140 1 1
    2 4.7uF_6.3v 2 2.2uF_16V 2 2 220uF_2.5v
    0.47uF_6.3v
    U510-8
    J32
    VCCSYNC
    U13
    VTT_1
    A33 U12
    VCCA_CRT_DAC_1 VTT_2 Place on the Edge
    B33 U11
    VCCA_CRT_DAC_2 VTT_3
    U9
    VTT_4
    U8
    VTT_5
    U7
    VTT_6
    U5
    VTT_7
    U3
    +V1.25S
    VTT_8
    A30 U2 8-,10-,20-,24-,34-
    +V1.25S 8-,10-,20-,24-,34-
    VCCA_DAC_BG VTT_9
    U1
    VTT_10
    B32 T13
    L509 VSSA_DAC_BG VTT_11
    VTT_12
    T11 C135 C133
    1 2 B49 T10 1 1
    VCCA_DPLLA VTT_13
    C585 VTT_14
    T9 2 2
    BLM11A121S 1 C583 1 H49 T7 1uF_10v 22uF_6.3v
    VCCA_DPLLB VTT_15
    T6
    2 22uF_6.3v 2 VTT_16
    0.1uF_16v VTT_17
    T5
    AL2 T3
    VCCA_HPLL VTT_18
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- AM2 T2
    L532 VCCA_MPLL VTT_19
    +V3S R3
    VTT_20
    1 2 VTT_21
    R2
    +V1.25S
    C584 A41
    VCCA_LVDS VTT_22
    R1
    BLM11A121S 1 C582 1 B41
    VSSA_LVDS 8-,10-,20-,24-,34-
    2 22uF_6.3v 2 C673
    0.1uF_16v +V1.25S_PEGPLL 1 AT23
    VCC_AXD_1 +V1.25S
    24- 2 K50
    VCCA_PEG_BG VCC_AXD_2
    AU28 C269 C670
    0.1uF_16v 1 1
    L7 K49
    VSSA_PEG_BG VCC_AXD_3
    AU24 8-,10-,20-,24-,34-
    1 2 VCC_AXD_4
    AT29 2 2
    1uF_10v 10uF_6.3v
    1 C270
    AT25
    BLM18PG121SN1 +V1.25S VCC_AXD_5
    U51 AT30
    VCCA_PEG_PLL VCC_AXD_6
    2 8-,10-,20-,24-,34- VCC_AXD_NCTF
    AR29 C587
    0.1uF_16v 1

    POWER
    AW18 B23
    VCCA_SM_1 VCC_AXF_1 2
    AV19
    VCCA_SM_2 VCC_AXF_2
    B21 0.1uF_16v
    1 C93 1 C132 C92 C138 AU19
    VCCA_SM_3 VCC_AXF_3
    A21
    1 1 1 AU18
    C94 VCCA_SM_4
    2 2 4.7uF_6.3v 2 2 AU17
    +V1.25S VCCA_SM_5 +V1.8
    2 47uF_6.3V 22uF_6.3v 22uF_6.3v 1uF_6.3v AJ50
    8-,10-,20-,24-,34- VCC_DMI
    AT22 8-,9-,10-,12-,13-,20-,23-,26-,27-
    VCCA_SM_7
    AT21
    VCCA_SM_8
    AT19 BK24
    VCCA_SM_9 VCC_SM_CK_1
    AT18 BK23
    VCCA_SM_10 VCC_SM_CK_2
    AT17
    VCCA_SM_11 VCC_SM_CK_3
    BJ24 C557 C556
    1 1
    1 C134 C136 C111 C110 VCC_SM_CK_4
    BJ23
    1 1 1 1 AR17
    C91 VCCA_SM_NCTF_1 2 2
    2 2 2 22uF_6.3v 2 AR16
    VCCA_SM_NCTF_2
    0.1uF_16v 22uF_6.3v
    2 47uF_6.3V 1uF_6.3v 1uF_6.3v 0.1uF_16v 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    BC29 A43
    VCCA_SM_CK_1 VCC_TX_LVDS
    BB29 +V3S
    VCCA_SM_CK_2

    C25 C40
    VCCA_TVA_DAC_1 VCC_HV_1
    B25 B40
    VCCA_TVA_DAC_2 VCC_HV_2
    C27
    VCCA_TVB_DAC_1 1 R252
    B27
    VCCA_TVB_DAC_2
    B28 AD51 10_5%
    VCCA_TVC_DAC_1 VCC_PEG_1 C226 1

    CHENMKO_BAT54_3P
    A28 W50
    VCCA_TVC_DAC_2 VCC_PEG_2 0.1uF_16v
    W51 2

    D14
    +V1.5S VCC_PEG_3 2
    V49
    VCC_PEG_4

    3
    M32 V50
    +VCCP
    10-,13-,18-,34-,45-,46- VCCD_CRT VCC_PEG_5
    L29
    VCCD_TVDAC

    1
    C223 C225 C224 VCC_RXR_DMI_1
    AH50
    1 1 1 N28 AH51
    VCCD_QDAC VCC_RXR_DMI_2 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    2 2 2
    10uF_6.3v 0.1uF_16v 0.022uF_16v AN2
    VCCD_HPLL
    A7
    +VCC_PEG +V1.25S
    +V1.25S U48
    VTTLF1
    F2
    VCCD_PEG_PLL VTTLF2 21- 8-,10-,20-,24-,34-
    8-,10-,20-,24-,34- AH1
    VTTLF3 R614
    J41 1 2
    VCCD_LVDS_1
    H42
    VCCD_LVDS_2
    C272 C273 0_5%_OPEN
    C586 C675 1 1
    1 ITL_CRESTLINE_DIS_FCBGA_1299P 1
    10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    2 2 2 220uF_2.5v 2 220uF_2.5v
    0.1uF_16v 10uF_6.3v +VCCP
    C647 C667
    +V1.25S_PEGPLL 1 C175 1 1
    1 R613 2
    24- 2 2 2
    0_5%

    C182
    1
    0.47uF_6.3v 0.47uF_6.3v 0.47uF_6.3v
    2
    0.1uF_16v

    INVENTEC
    TITLE
    VV Discrete
    Cresline-5
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 24 OF 54
    U510-9
    A13 AW24
    VSS_1 VSS_100
    A15 AW29
    VSS_2 VSS_101
    A17
    VSS_3 VSS_102
    AW32 U510-10
    A24 AW5 C46 W11
    VSS_4 VSS_103 VSS_199 VSS_287
    AA21 AW7 C50 W39
    VSS_5 VSS_104 VSS_200 VSS_288
    AA24 AY10 C7 W43
    VSS_6 VSS_105 VSS_201 VSS_289
    AA29 AY24 D13 W47
    VSS_7 VSS_106 VSS_202 VSS_290
    AB20 AY37 D24 W5
    VSS_8 VSS_107 VSS_203 VSS_291
    AB23 AY42 D3 W7
    VSS_9 VSS_108 VSS_204 VSS_292
    AB26 AY43 D32 Y13
    VSS_10 VSS_109 VSS_205 VSS_293
    AB28 AY45 D39 Y2
    VSS_11 VSS_110 VSS_206 VSS_294
    AB31 AY47 D45 Y41
    VSS_12 VSS_111 VSS_207 VSS_295
    AC10 AY50 D49 Y45
    VSS_13 VSS_112 VSS_208 VSS_296
    AC13 B10 E10 Y49
    VSS_14 VSS_113 VSS_209 VSS_297
    AC3 B20 E16 Y5
    VSS_15 VSS_114 VSS_210 VSS_298
    AC39 B24 E24 Y50
    VSS_16 VSS_115 VSS_211 VSS_299
    AC43 B29 E28 Y11
    VSS_17 VSS_116 VSS_212 VSS_300
    AC47 B30 E32 P29
    VSS_18 VSS_117 VSS_213 VSS_301
    AD1 B35 E47 T29
    VSS_19 VSS_118 VSS_214 VSS_302
    AD21 B38 F19 T31
    VSS_20 VSS_119 VSS_215 VSS_303
    AD26 B43 F36 T33
    VSS_21 VSS_120 VSS_216 VSS_304
    AD29 B46 F4 R28
    VSS_22 VSS_121 VSS_217 VSS_305
    AD3 B5 F40
    VSS_23 VSS_122 VSS_218
    AD41 B8 F50
    VSS_24 VSS_123 VSS_219
    AD45 BA1 G1 AA32
    VSS_25 VSS_124 VSS_220 VSS_306
    AD49 BA17 G13 AB32
    VSS_26 VSS_125 VSS_221 VSS_307
    AD5 BA18 G16 AD32
    VSS_27 VSS_126 VSS_222 VSS_308
    AD50 BA2 G19 AF28
    VSS_28 VSS_127 VSS_223 VSS_309
    VSS
    AD8 BA24 G24 AF29
    VSS_29 VSS_128 VSS_224 VSS_310
    AE10 BB12 G28 AT27
    VSS_30 VSS_129 VSS_225 VSS_311
    AE14 BB25 G29 AV25
    VSS_31 VSS_130 VSS_226 VSS_312
    AE6 BB40 G33 H50
    VSS_32 VSS_131 VSS_227 VSS_313

    VSS
    AF20 BB44 G42
    VSS_33 VSS_132 VSS_228
    AF23 BB49 G45
    VSS_34 VSS_133 VSS_229
    AF24 BB8 G48
    VSS_35 VSS_134 VSS_230
    AF31 BC16 G8
    VSS_36 VSS_135 VSS_231
    AG2 BC24 H24
    VSS_37 VSS_136 VSS_232
    AG38 BC25 H28
    VSS_38 VSS_137 VSS_233
    AG43 BC36 H4
    VSS_39 VSS_138 VSS_234
    AG47 BC40 H45
    VSS_40 VSS_139 VSS_235
    AG50 BC51 J11
    VSS_41 VSS_140 VSS_236
    AH3 BD13 J16
    VSS_42 VSS_141 VSS_237
    AH40 BD2 J2
    VSS_43 VSS_142 VSS_238
    AH41 BD28 J24
    VSS_44 VSS_143 VSS_239
    AH7 BD45 J28
    VSS_45 VSS_144 VSS_240
    AH9 BD48 J33
    VSS_46 VSS_145 VSS_241
    AJ11 BD5 J35
    VSS_47 VSS_146 VSS_242
    AJ13 BE1 J39
    VSS_48 VSS_147 VSS_243
    AJ21 BE19
    VSS_49 VSS_148
    AJ24 BE23 K12
    VSS_50 VSS_149 VSS_245
    AJ29 BE30 K47
    VSS_51 VSS_150 VSS_246
    AJ32 BE42 K8
    VSS_52 VSS_151 VSS_247
    AJ43 BE51 L1
    VSS_53 VSS_152 VSS_248
    AJ45 BE8 L17
    VSS_54 VSS_153 VSS_249
    AJ49 BF12 L20
    VSS_55 VSS_154 VSS_250
    AK20 BF16 L24
    VSS_56 VSS_155 VSS_251
    AK21 BF36 L28
    VSS_57 VSS_156 VSS_252
    AK26 BG19 L3
    VSS_58 VSS_157 VSS_253
    AK28 BG2 L33
    VSS_59 VSS_158 VSS_254
    AK31 BG24 L49
    VSS_60 VSS_159 VSS_255
    AK51 BG29 M28
    VSS_61 VSS_160 VSS_256
    AL1 BG39 M42
    VSS_62 VSS_161 VSS_257
    AM11 BG48 M46
    VSS_63 VSS_162 VSS_258
    AM13 BG5 M49
    VSS_64 VSS_163 VSS_259
    AM3 BG51 M5
    VSS_65 VSS_164 VSS_260
    AM4 BH17 M50
    VSS_66 VSS_165 VSS_261
    AM41 BH30 M9
    VSS_67 VSS_166 VSS_262
    AM45 BH44 N11
    VSS_68 VSS_167 VSS_263
    AN1 BH46 N14
    VSS_69 VSS_168 VSS_264
    AN38 BH8 N17
    VSS_70 VSS_169 VSS_265
    AN39 BJ11 N29
    VSS_71 VSS_170 VSS_266
    AN43 BJ13 N32
    VSS_72 VSS_171 VSS_267
    AN5 BJ38 N36
    VSS_73 VSS_172 VSS_268
    AN7 BJ4 N39
    VSS_74 VSS_173 VSS_269
    AP4 BJ42 N44
    VSS_75 VSS_174 VSS_270
    AP48 BJ46 N49
    VSS_76 VSS_175 VSS_271
    AP50 BK15 N7
    VSS_77 VSS_176 VSS_272
    AR11 BK17 P19
    VSS_78 VSS_177 VSS_273
    AR2 BK25 P2
    VSS_79 VSS_178 VSS_274
    AR39 BK29 P23
    VSS_80 VSS_179 VSS_275
    AR44 BK36 P3
    VSS_81 VSS_180 VSS_276
    AR47 BK40 P50
    VSS_82 VSS_181 VSS_277
    AR7 BK44 R49
    VSS_83 VSS_182 VSS_278
    AT10 BK6 T39
    VSS_84 VSS_183 VSS_279
    AT14 BK8 T43
    VSS_85 VSS_184 VSS_280
    AT41 BL11 T47
    VSS_86 VSS_185 VSS_281
    AT49 BL13 U41
    VSS_87 VSS_186 VSS_282
    AU1 BL19 U45
    VSS_88 VSS_187 VSS_283
    AU23 BL22 U50
    VSS_89 VSS_188 VSS_284
    AU29 BL37 V2
    VSS_90 VSS_189 VSS_285
    AU3 BL47 V3
    VSS_91 VSS_190 VSS_286
    AU36 C12
    VSS_92 VSS_191
    AU49
    VSS_93 VSS_192
    C16 ITL_CRESTLINE_DIS_FCBGA_1299P
    AU51 C19
    VSS_94 VSS_193
    AV39 C28
    VSS_95 VSS_194
    AV48 C29
    VSS_96 VSS_195
    AW1 C33
    VSS_97 VSS_196
    AW12
    AW16
    VSS_98
    VSS_99
    VSS_197
    VSS_198
    C36
    C41
    INVENTEC
    ITL_CRESTLINE_DIS_FCBGA_1299P TITLE
    VV Discrete
    CRESTLINE-6
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 25 OF 54
    22-,28- 22- MA_DATA(63:0)
    MA_A(13:0)
    CN503-1
    102 5
    A0 DQ0
    101 7
    A1 DQ1
    100 17
    A2 DQ2 +V1.8
    99 19
    A3 DQ3
    98 4 8-,9-,10-,12-,13-,20-,23-,24-,27-
    A4 DQ4
    97 6
    A5 DQ5
    94 14
    A6 DQ6
    92 16
    A7 DQ7
    93 23
    A8 DQ8
    91 25
    A9 DQ9
    105 35
    A10_AP DQ10
    90 37
    A11 DQ11
    89 20
    A12 DQ12
    116 22
    A13 DQ13
    MA_A(14) 20-,28- 86 36
    A14 DQ14
    84 38 Layout notes: Place these Caps closed So-Dimm0 CN503-2
    A15 DQ15
    22-,28- 85 43 112 18
    MA_BS2# A16_BA2 DQ16
    45 111
    VDD1 VSS16
    24
    DQ17 VDD2 VSS17
    22-,28- 107 55 117 41
    MA_BS0# BA0 DQ18 VDD3 VSS18
    MA_BS1# 22-,28- 106
    BA1 DQ19
    57 C511 C515 C513 C509 1 C512 1 C510 1 C514 1 C516 1 C517 C508 96
    VDD4 VSS19
    53
    20-,28- 110 44
    1 1 1 1 1 95 42
    M_CS0# S0# DQ20 VDD5 VSS20
    M_CS1# 20-,28- 115
    S1# DQ21
    46 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v2 2.2uF_16V2 2.2uF_16V2 2.2uF_16V2 2.2uF_16V2 2.2uF_16V
    2 100uF_6.3v_OPEN 118
    VDD6 VSS21
    54
    20- 30 56 81 59
    M_CLK_DDR0 20- 32
    CK0 DQ22
    58 82
    VDD7 VSS22
    65
    M_CLK_DDR0# 20- 164
    CK0# DQ23
    61 87
    VDD8 VSS23
    60
    M_CLK_DDR1 20- 166
    CK1 DQ24
    63 103
    VDD9 VSS24
    66
    M_CLK_DDR1# CK1# DQ25 +V3S VDD10 VSS25
    20-,28- 79 73 88 127
    M_CKE0 20-,28- 80
    CKE0 DQ26
    75 104
    VDD11 VSS26
    139
    M_CKE1 CKE1 DQ27 11-,13-,14-,15-,19-,20-,24-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- VDD12 VSS27
    MA_CAS# 22-,28- 113 62 128
    CAS# DQ28 VSS28
    MA_RAS# 22-,28- 108 64 199 145
    RAS# DQ29 VDDSPD VSS29
    MA_WE# 22-,28- 109 74 165
    WE# DQ30 VSS30
    198 76 83 171
    SA0 DQ31 NC1 VSS31
    200
    SA1 DQ32
    123 1 C519 120
    NC2 VSS32
    172
    ICH_3S_SMCLK 15-,19-,27-,32-,50- 197 125 C520 1 20- 50 177
    SCL DQ33 M_VREF PM_EXTTS#0 NC3 VSS33
    ICH_3S_SMDATA 15-,19-,27-,32-,50- 195
    SDA DQ34
    135 0.1uF_16v 2 69
    NC4 VSS34
    187
    137 2 2.2uF_16V
    163 178
    1 1 R21 DQ35 12-,20-,27- NCTEST VSS35
    MA_DM(7:0) 22- 20-,28- 114 124 190
    R22 10K_5% M_ODT0 ODT0 DQ36 VSS36
    20-,28- 119 126 1 9
    10K_5% M_ODT1 ODT1 DQ37
    134
    VREF VSS37
    21
    DQ38 VSS38
    2 2 10 136 G1 33
    DM0 DQ39 GND0 VSS39
    26
    DM1 DQ40
    141 1 C32 G2
    GND1 VSS40
    155
    52 143 C33 1 34
    DM2 DQ41 0.1uF_16v VSS41
    67 151 2 132
    DM3 DQ42 2 2.2uF_16V VSS42
    130 153 47 144
    DM4 DQ43 VSS1 VSS43
    147 140 133 156
    DM5 DQ44 VSS2 VSS44
    22- 170 142 183 168
    MA_DQS(7:0) DM6 DQ45 VSS3 VSS45
    185 152 77 2
    DM7 DQ46 VSS4 VSS46
    154 12 3
    DQ47 VSS5 VSS47
    13 157 48 15
    DQS0 DQ48 VSS6 VSS48
    31 159 184 27
    DQS1 DQ49 VSS7 VSS49
    51 173 78 39
    DQS2 DQ50 VSS8 VSS50
    70 175 71 149
    DQS3 DQ51 VSS9 VSS51
    131 158 72 161
    DQS4 DQ52 VSS10 VSS52
    22- 148 160 121 28
    MA_DQS#(7:0) DQS5 DQ53 VSS11 VSS53
    169 174 122 40
    DQS6 DQ54 VSS12 VSS54
    188 176 196 138
    DQS7 DQ55 VSS13 VSS55
    11 179 193 150
    DQS#0 DQ56 VSS14 VSS56
    29 181 8 162
    DQS#1 DQ57 VSS15 VSS57
    49 189
    DQS#2 DQ58
    68
    DQS#3 DQ59
    191 TYCO_292531_4_200P
    129 180
    DQS#4 DQ60
    146 182
    DQS#5 DQ61
    167 192
    DQS#6 DQ62
    186 194
    DQS#7 DQ63

    TYCO_292531_4_200P

    SO DIMM0_9.2mm

    INVENTEC
    TITLE
    VV Discrete
    DDR2-DIMM-0
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 25-Nov-2008 SHEET 26 OF 54
    22-,28- 22-
    MB_A(13:0)
    CN504-1 MB_DATA(63:0)
    102 5
    A0 DQ0
    101 7
    A1 DQ1
    100 17
    A2 DQ2
    99 19
    A3 DQ3
    98 4
    A4 DQ4
    97 6
    A5 DQ5
    94 14
    A6 DQ6 +V1.8
    92 16
    A7 DQ7
    93 23 8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
    A8 DQ8
    91 25
    A9 DQ9
    105 35
    A10_AP DQ10
    90 37
    89
    A11
    A12
    DQ11
    DQ12
    20 Layout note: Place these Caps closed So-Dimm1 CN504-2
    116 22 112 18
    A13 DQ13 VDD1 VSS16
    MB_A(14) 20-,28- 86 36 111 24
    A14 DQ14 VDD2 VSS17
    84 38 117 41
    A15 DQ15 VDD3 VSS18
    MB_BS2#
    22-,28- 85
    A16_BA2 DQ16
    43 C53 C58 C63 C68 1 C51 1 C66 1 C7036 1 C56 1 C61 1C7038
    96
    VDD4 VSS19
    53
    45
    1 1 1 1 95 42
    DQ17 VDD5 VSS20
    MB_BS0# 22-,28- 107
    BA0 DQ18
    55 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v2 2
    2.2uF_16V 2
    2.2uF_16V 2
    2.2uF_16V 2
    2.2uF_16V 2.2uF_16V 2 100uF_6.3v_OPEN 118
    VDD6 VSS21
    54
    22-,28- 106 57 81 59
    MB_BS1# 20-,28- 110
    BA1 DQ19
    44 82
    VDD7 VSS22
    65
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- M_CS2# S0# DQ20 VDD8 VSS23
    M_CS3# 20-,28- 115 46 87 60
    S1# DQ21 VDD9 VSS24
    20- 30 56 +V3S 103 66
    M_CLK_DDR2 20- 32
    CK0 DQ22
    58 88
    VDD10 VSS25
    127
    +V3S M_CLK_DDR2# CK0# DQ23 VDD11 VSS26
    20- 164 61 104 139
    M_CLK_DDR3 20- 166
    CK1 DQ24
    63
    VDD12 VSS27
    128
    M_CLK_DDR3# 20-,28- 79
    CK1# DQ25
    73
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    199
    VSS28
    145
    1 R72 M_CKE2 20-,28- 80
    CKE0 DQ26
    75
    VDDSPD VSS29
    165
    10K_5% M_CKE3 22-,28- 113
    CKE1 DQ27
    62 83
    VSS30
    171
    MB_CAS# CAS# DQ28 NC1 VSS31
    MB_RAS# 22-,28- 108
    RAS# DQ29
    64 1 C30 120
    NC2 VSS32
    172
    2 MB_WE# 22-,28- 109
    WE# DQ30
    74 C31 1 PM_EXTTS#1 20- 50
    NC3 VSS33
    177
    M_VREF
    198
    SA0 DQ31
    76 0.1uF_16v 2 2 2.2uF_16V
    69
    NC4 VSS34
    187
    200 123 12-,20-,26- 163 178
    SA1 DQ32 NCTEST VSS35
    ICH_3S_SMCLK 15-,19-,26-,32-,50- 197 125 190
    SCL DQ33 VSS36
    15-,19-,26-,32-,50- 195 135 1 9
    ICH_3S_SMDATA SDA DQ34 VREF VSS37
    137 21
    1 R73 DQ35 VSS38
    MB_DM(7:0) 22- 20-,28- 114 124 G1 33
    10K_5% M_ODT2 ODT0 DQ36 GND0 VSS39
    M_ODT3 20-,28- 119
    ODT1 DQ37
    126 1 C7037 G2
    GND1 VSS40
    155
    DQ38
    134 C75 1 VSS41
    34
    2 10
    DM0 DQ39
    136 0.1uF_16v 2 2 VSS42
    132
    26 141
    2.2uF_16V 47 144
    DM1 DQ40 VSS1 VSS43
    52 143 133 156
    DM2 DQ41 VSS2 VSS44
    67 151 183 168
    DM3 DQ42 VSS3 VSS45
    130 153 77 2
    DM4 DQ43 VSS4 VSS46
    147 140 12 3
    DM5 DQ44 VSS5 VSS47
    22- 170 142 48 15
    MB_DQS(7:0) DM6 DQ45 VSS6 VSS48
    185 152 184 27
    DM7 DQ46 VSS7 VSS49
    154 78 39
    DQ47 VSS8 VSS50
    13 157 71 149
    DQS0 DQ48 VSS9 VSS51
    31 159 72 161
    DQS1 DQ49 VSS10 VSS52
    51 173 121 28
    DQS2 DQ50 VSS11 VSS53
    70 175 122 40
    DQS3 DQ51 VSS12 VSS54
    131 158 196 138
    DQS4 DQ52 +V1.8 VSS13 VSS55
    22- 148 160 193 150
    MB_DQS#(7:0) DQS5 DQ53 VSS14 VSS56
    169 174 8-,9-,10-,12-,13-,20-,23-,24-,26-,27- 8 162
    DQS6 DQ54 VSS15 VSS57
    188 176
    DQS7 DQ55
    11
    DQS#0 DQ56
    179 FOX_AS0A42X_N2RX_RVS_5.2mm_200P
    29 181
    DQS#1 DQ57
    49 189
    DQS#2 DQ58
    68 191
    DQS#3 DQ59

    C528

    C674

    C529
    129 180

    0.1uF_16V

    0.1uF_16V

    0.1uF_16V

    0.1uF_16V

    0.1uF_16V

    0.1uF_16V
    C37

    C50

    C39
    DQS#4 DQ60
    146 182
    DQS#5 DQ61

    2 1

    2 1

    2 1

    2 1

    2 1

    2 1
    167 192
    DQS#6 DQ62
    186 194
    DQS#7 DQ63

    FOX_AS0A42X_N2RX_RVS_5.2mm_200P

    SO DIMM1 5.2mm
    FOR EMI TEST

    INVENTEC
    TITLE
    VV Discrete
    DDR2-DIMM1
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 18-Nov-2008 SHEET 27 OF 54
    +V0.9S
    12-,28-

    C60 C17 C59 C19 C21 C18 C62 C20 C16 C65 C64 C14 C15
    1 1 1 1 1 1 1 1 1 1 1 1 1
    2 2 2 2 2 2 2 2 2 2 2 2 2
    0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v

    C55 C52 C73 C11 C10 C13 C72 C12 C67 C54 C70 C69 C57
    1 1 1 1 1 1 1 1 1 1 1 1 1
    2 2 2 2 2 2 2 2 2 2 2 2 2
    0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v 0.1uF_16v

    +V0.9S LAYOUT NOTES : PLACE ONE CAP CLOSE TO EVERY 2 PULL UP RESISTOR TERMINATED TO +V0.9S
    12-,28-

    R64 1 2 56_5% 20-,26- M_CKE0


    R39 1 2 56_5% 20-,26- M_CKE1
    R119 1 2 56_5% 20-,27- M_CKE2
    R86 1 2 56_5% 20-,27- M_CKE3

    R28 1 2 56_5% 20-,26-


    +V0.9S
    M_ODT0
    12-,28-
    R9706 1 2 56_5% 20-,26- M_ODT1
    R9707 1 2 56_5% 20-,27- M_ODT2
    R110 1 2 56_5% 22-,27- MB_BS0#
    R106 1 2 56_5% 20-,27- M_ODT3
    R78 1 2 56_5% 22-,27-
    56_5% MB_BS1#
    R9708 1 2 22-,26- MA_BS0#
    R9709 1 2 56_5% 22-,26- R118 1 2 56_5% 22-,27-
    MA_BS1# MB_BS2#
    R63 1 2 56_5% 22-,26- MA_BS2#
    R109 1 2 56_5% 22-,27-
    56_5% MB_WE#
    R54 1 2 22-,26- MA_WE#
    R108 1 2 56_5% 22-,27- MB_CAS#
    R53 1 2 56_5% 22-,26- MA_CAS# R9712 1 2 56_5% 22-,27-
    R30 1 2 56_5% MB_RAS#
    22-,26- MA_RAS#

    R29 1 2 56_5% 20-,26- 22-,27-


    M_CS0# MB_A(13:0)
    R52 1 2 56_5% 20-,26- R79 1 2 56_5% MB_A(0)
    M_CS1#
    R76 1 2 56_5% 20-,27- R112 1 2 56_5% MB_A(1)
    M_CS2#
    R107 1 2 56_5% 20-,27- R80 1 2 56_5% MB_A(2)
    M_CS3#
    R113 1 2 56_5% MB_A(3)

    R81 1 2 56_5% MB_A(4)

    22-,26- R114 1 2 56_5% MB_A(5)


    MA_A(13:0)
    R9710 1 2 56_5% MA_A(0) R82 1 2 56_5% MB_A(6)

    R57 1 2 56_5% MA_A(1) R83 1 2 56_5% MB_A(7)

    R9711 1 2 56_5% MA_A(2) R115 1 2 56_5% MB_A(8)

    R58 1 2 56_5% MA_A(3) R116 1 2 56_5% MB_A(9)

    R34 1 2 56_5% MA_A(4) R111 1 2 56_5% MB_A(10)

    R59 1 2 56_5% MA_A(5) R84 1 2 56_5% MB_A(11)

    R35 1 2 56_5% MA_A(6) R117 1 2 56_5% MB_A(12)

    R36 1 2 56_5% MA_A(7) R74 1 2 56_5% MB_A(13)

    R60 1 2 56_5% MA_A(8) R85 1 2 56_5% 20-,27- MB_A(14)


    R61 1 2 56_5% MA_A(9)

    R56 1 2 56_5% MA_A(10)

    R37

    R62
    1

    1
    2

    2
    56_5%

    56_5%
    MA_A(11)

    MA_A(12)
    INVENTEC
    TITLE
    R27 1 2 56_5%
    VV Discrete
    MA_A(13) DDR2-DAMPING
    R38 1 2 56_5% 20-,26- MA_A(14) SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTRA01
    CHANGE by Chang, Roger 27-Sep-2003 SHEET 28 OF 54
    CLOSE TO CRESTLINE
    49- 1 L9 2 FBMA_11_160808_280T CRT_L2_R
    1 R9757 2 CRT_L_R
    CRT_R

    FBMA_11_160808_280T 1 L513 2 0_5%


    1 R9758 2
    CRT_L2_G CRT_L_G
    49-
    CRT_G

    FBMA_11_160808_280T 1 L12 2 CRT_L2_B 0_5% 1 R9759 2 CRT_L_B


    CRT_B 49-
    0_5%

    C9593 1 1 C9592 1 C9591


    12pF_50V_OPEN 2 2 2 12pF_50V_OPEN
    12pF_50V_OPEN

    +V5S

    +V3S 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48- 1 1 1
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-U512 2 C280 2 C681 2 C281
    +V3S 1 16 12pF_50v 12pF_50v 12pF_50v
    VCC-SYNC SYNC_OUT2
    2 15 49- CRT_VSYNC
    VCC-VIDEO SYNC_IN2
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- 3 14
    VIDEO_1 SYNC_OUT1
    4 13 49- CRT_HSYNC
    VIDEO_2 SYNC_IN1
    5 12
    VIDEO_3 DDC_OUT2 1
    6 11
    GND DDC_IN2 R242 1
    7 10
    VCC-DCC DDC_IN1 R243 VGA_GND SYN_070546FR015S239ZR_15P
    8 9 10K_5%
    BYP DDC_OUT1
    2 10K_5% CN505
    NXP_IP4772CZ16_SSOP_16P 2 1
    C93631 1
    C9362 1 C9361 2
    1
    0.1uF_16v 2
    3
    2 2 2 0.1uF_16v 3
    4
    0.1uF_16v 4
    5
    VGA_GND VGA_GND 5
    6
    6
    7
    1 1 7
    8
    8
    R609 R610 9
    VGA_GND VGA_GND VGA_GND VGA_GND 9
    2.2K_5% 2.2K_5% 10
    10
    2 2 11
    11
    C9364 12 G1
    1 R162 1 2 22_5% 13
    12 G
    G2
    13 G
    2 R539 1 2 22_5% 14
    0.22uF_16V_OPEN 15
    14
    15

    +V3S
    VGA_GND

    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    1 1 VGA_GND VGA_GND
    R608 R612
    2.2K_5% 2.2K_5% R9766 1 2 0_5%
    2 2
    50-
    CRT_DDCDATA
    R9767 1 2 0_5%

    R9768 1 2 0_5%

    50- R9769 1 2 0_5%


    CRT_DDCCLK

    R9770 1 2 0_5%

    VGA_GND

    INVENTEC
    TITLE
    VV Discrete
    VGA CONN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 25-Dec-2008 SHEET 29 OF 54
    +V5A
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    +V3A

    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    1 R500
    47K_5%

    2 Place closed to connector


    1 R501 2 Q1 1
    G
    47K_5% 1 1 +V3S
    C500
    1 S D C1 C2
    Q505 3 2 10uF_6.3v 2 0.1uF_16v
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    D 2 0.01uF_16v 2 3
    1
    LVDS_VDD_EN 49- 1G PMV65XP R9557
    S
    100_5%
    SSM3K7002F 2
    C507 2
    1 1 1
    Q5 3 1
    +V3S 2 100pF_50v D
    R23 R1 C4
    1G 2.2K_5% 2.2K_5% 2 0.1uF_16v
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- S 2 2
    SSM3K7002F 2
    +VBATR
    (20/5) CN6002
    1 1
    2 2
    32-,47- 1 5 U7001 3
    LID_SW#_3 5-,7-,8-,9-,11-,13-,29-,39-,48- 3
    4 1 R7006 2 4 4
    49- 2 5 5
    LCM_BKLTEN 100_5% 6
    3 NC7SZ08M5 6
    49- 7 7
    INV_PWM_3 8 8
    49- 9 9
    LVDS_DDC_CLK 10
    LVDS_DDC_DATA 49- 10
    11 11
    C9 12 12
    1 49- 13 13
    1 R9693 2
    LVDSA_CLK# 49- 14
    2 LVDSA_CLK 14
    1000pF_50v 49- 15 15
    0_5%_OPEN LVDSA_DATA#2 16
    LVDSA_DATA2 49- 16
    49- 17 17
    LVDSA_DATA#1 18
    LVDSA_DATA1 49- 18
    49- 19 19
    LVDSA_DATA#0 20
    LVDSA_DATA0 49- 20
    21 21
    22 22
    49- 23 23
    LVDSB_CLK# 49- 24
    LVDSB_CLK 24
    49- 25 25
    LVDSB_DATA#0 26
    LVDSB_DATA0 49- 26
    49- 27 27 G G1
    LVDSB_DATA#1 28
    LVDSB_DATA1 49- 28 G G2
    49- 29 29
    LVDSB_DATA#2 30
    LVDSB_DATA2 49- 30

    ACES_87223_3001_30P

    1
    C3
    2 0.1uF_25V

    +V5A
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    Q2017 CN6003
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 2 3 1 1
    +V3A
    S D
    32- 2 2
    USB_P4- 3
    USB_P4+ 32- 3 G G1
    1 R9687
    1 PMV65XP
    1 G
    4 4 G G2
    C7032 2 10K_5% 1
    C7033
    1uF_10V 2 ACES_87213_0400_4P
    2 0.1uF_16V 1 1
    1
    R9689 1 R9688 2
    10K_5% D2014 D2015
    47K_5%
    2 PESD5V0U1BB PESD5V0U1BB
    Q2018 3
    D
    32- 1G 2 2
    CAM_DISABLE#
    S

    SSM3K7002F 2
    INVENTEC
    TITLE
    VV Discrete
    LCM CONN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Nov-2008 SHEET 30 OF 54
    +V3AL +V_RTC
    5-,6-,7-,14-,39-,40-,47- 31-,34-,39-

    C740
    1
    2 1 R9636 2
    1uF_6.3v

    2
    0_5%_OPEN
    D515 1 R313 2
    BAT54C

    3
    47K_5%
    C329
    C331

    1
    1 1 2
    2 22pF_50v
    1uF_6.3v
    R704 1 R298

    2
    1

    32.768KHZ
    X1
    RTCBAT 1K_5% 10M_5%

    2 2

    3
    CN514
    1 R312
    2 - + 1
    1M_5% 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    C328
    LOTES_AAA_BAT_032_K01_A_2P +V3S
    2 1 2 U519-1
    22pF_50v AG25
    RXTC1 FWH0_LAD0
    E5 39-,45- LPC_3S_AD(0)
    AF24 F5 39-,45- LPC_3S_AD(1)
    RXTC2 FWH1_LAD1
    G8 39-,45- LPC_3S_AD(2) Close to ICH8
    FWH2_LAD2 1 R408

    LPC
    RTC
    AF23 F6 39-,45- LPC_3S_AD(3)
    RTCRST# FWH3_LAD3
    0402_OPEN
    AD22 C4 39-,45-
    +VCCP
    INTRUDER# FWH4_LFRAME# LPC_3S_FRAME#
    2 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    1 2 AF25 G9
    INTVRMEN LDRQ0#
    R277 332K_1% AD21 E6
    +V_RTC LAN100_SLP LDRQ1#_GPIO23
    1 R278 1 R304
    B24 AF13 39-
    0402_OPEN 0402_OPEN
    31-,34-,39- GLAN_CLK A20GATE EC_3S_A20GATE 1 R281
    AG26 16- H_A20M#
    1 R306 A20M#
    D22 56_5%
    LAN_RSTSYNC
    2 2 332K_1% AF26 11-,17-,20- H_DPRSTP#
    DPRSTP#
    C21 AE26 17- H_DPSLP# 2
    LAN_RXD0 DPSLP#

    LAN / GLAN
    2 B21
    LAN_RXD1
    C22 AD24 16- H_FERR#
    LAN_RXD2 FERR#
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    +V1.5S_PCIE_ICH D21 AG29 17-
    LAN_TXD0 CPUPWRGD_GPIO49 H_PWRGD +V3S
    32-,34- E20
    LAN_TXD1
    C20 AF27 16- H_IGNNE#
    1 R316 LAN_TXD2 IGNNE# R670
    1 2
    24.9_1% TP27 AH21 AE24 16- H_INIT# 10K_5% 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    GLAN_DOCK#_GPIO13 INIT#

    CPU
    AC20 16- H_INTR
    INTR +VCCP
    42- R369 1 2 33_5% 2 D25 AH14 39-
    MDC_3S_BITCLK GLAN_COMPI RCIN# PM_3S_KBCCPURST#
    MDC_3S_SYNC 42- R370 1 2 33_5% C25
    GLAN_COMPO
    MDC_3S_RST# 42- R375 1 2 33_5% NMI
    AD23 16- H_NMI
    41- R665 1 2 33_5% AJ16 AG28 16-
    1 R280
    AZ_3S_BITCLK HDA_BIT_CLK SMI# H_SMI# 56_5%
    AZ_3S_SYNC 41- R664 1 2 33_5% AJ15
    HDA_SYNC
    AA24 16- H_STPCLK#
    STPCLK#
    41- R371 1 2 33_5% AE14 2
    AZ_3S_RST# HDA_RST#
    1 R279 2
    16-,20-
    AE27 PM_THRMTRIP#
    THRMTRIP#
    AZ_3S_SDIN0 41- AJ17 24.9_1%
    HDA_SDIN0

    IHDA
    MDC_3S_SDIN1 42- AH17 AA23
    HDA_SDIN1 TP8
    AH15
    HDA_SDIN2
    AD13 V1
    HDA_SDIN3 DD0
    U2
    DD1
    41- R372 1 2 33_5% AE13 V3
    AZ_3S_SDOUT 33_5% HDA_SDOUT DD2
    MDC_3S_SDOUT 42- R373 1 2
    DD3
    T1
    AE10 V4
    HDA_DOCK_EN#_GPIO33 DD4
    AG14 T5
    HDA_DOCK_RST#_GPIO34 DD5
    AB2
    DD6
    AF10 T6
    SATALED# DD7
    T3
    DD8
    SATA_C_RXN0 37- AF6 R2 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    SATA0RXN DD9
    SATA_C_RXP0 37- AF5 T4 +V3S
    C380 3300pF_50v SATA0RXP DD10
    37- SATA_TXN0 AH5 V6
    SATA_C_TXN0 SATA_TXP0
    SATA0TXN DD11
    SATA_C_TXP0 37- 1 2 AH6
    SATA0TXP DD12
    V5
    C379 1 2 3300pF_50v U1
    CLOSE TO ICH8 DD13

    IDE
    AG3 V2
    SATA1RXN DD14
    AG4 U6 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    SATA1RXP DD15

    SATA
    AJ4 +V3S
    SATA1TXN
    AJ3 AA4
    SATA1TXP DA0
    AA1
    DA1
    SATA_C_RXN2 37- AF2 AB3
    SATA2RXN DA2 1 R9683
    SATA_C_RXP2 37- AF1
    SATA2RXP
    SATA_C_TXN2 37- C7019 3300pF_50v SATA_TXN2 AE4 Y6 8.2K_5%
    SATA2TXN DCS1# 1 R9684
    37- 1 2 SATA_TXP2 AE3 Y5
    SATA_C_TXP2 SATA2TXP DCS3#
    4.7K_5%
    C7020 1 2 3300pF_50v
    CLOSE TO ICH8 2
    CLK_R_SATA1# 15- AB7 W4
    SATA_CLKN DIOR#
    CLK_R_SATA1 15- AC6 W3 2
    SATA_CLKP DIOW#
    Y2
    DDACK#
    AG1 Y3
    SATARBIAS# IDEIRQ
    AG2 Y1
    SATARBIAS IORDY
    W5
    DDREQ

    1 R404 ITL_ICH8_M_BGA_676P
    24.9_1%

    INVENTEC
    TITLE
    VV Discrete
    ICH8-1
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 31 OF 54
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- U519-4
    +V3S +V3A P27 V27 20- DMI_RXN(0)
    PERN1 DMI0RXN
    P26 V26 20- DMI_RXP(0)
    PERP1 DMI0RXP
    5-,11-,13-,14-,19-,29-,34-,37-,40-,41-,48- N29 U29 20-
    PETN1 DMI0TXN DMI_TXN(0)
    +V5S N28 U28 20- DMI_TXP(0)
    PETP1 DMI0TXP
    1 1 R649 1 1 R273 45- M27 Y27 20- DMI_RXN(1)
    R648 PCIE_C_RXN2 PERN2 DMI1RXN
    2.2K_5% R293 10K_5% 45- M26 Y26 20- DMI_RXP(1)
    2.2K_5% PCIE_C_RXP2 PERP2 DMI1RXP
    10K_5% 45- C710 0.1uF_16v PCIE_TXN2 L29 W29 20-
    PCIE_C_TXN2 C711 0.1uF_16v 1 2 PETN2 DMI1TXN DMI_TXN(1)

    Direct Media Interface


    2 2 2 2 45- PCIE_TXP2 L28 W28 20-
    PCIE_C_TXP2 PETP2 DMI1TXP DMI_TXP(1)
    1 2
    ICH_3S_SMCLK 15-,19-,26-,27-,50- K27 AB26 20- DMI_RXN(2)
    PERN3 DMI2RXN
    K26 AB25 20- DMI_RXP(2)
    2 SSM3K7002F PERP3 DMI2RXP

    PCI-Express
    J29 AA29 20- DMI_TXN(2)
    S PETN3 DMI2TXN
    J28 AA28 20- DMI_TXP(2)
    PETP3 DMI2TXP
    D
    G
    1
    3 Q31 H27
    PERN4 DMI3RXN
    AD27 20- DMI_RXN(3)
    ICH_3A_SMCLK 32- R275 33_5% H26 AD26 20- DMI_RXP(3)
    1 2 PERP4 DMI3RXP +V1.5S_PCIE_ICH
    G29 AC29 20- DMI_TXN(3)
    PETN4 DMI3TXN
    ICH_3A_SMDATA 32- R294 33_5% G28 AC28 20- DMI_TXP(3) 31-,34-
    1 2 PETP4 DMI3TXP
    3 D Q30 46- F27 T26 15-
    1 R310
    PCIE_C_RXN5 PERN5 DMI_CLKN CLK_R_PCIE_ICH# 24.9_1%
    G 1 46- F26
    PERP5 DMI_CLKP
    T25 15- CLK_R_PCIE_ICH
    PCIE_C_RXP5 46- C712 0.1uF_16v PCIE_TXN4 E29
    S
    PCIE_C_TXN5 PETN5
    2 SSM3K7002F 46- C713 0.1uF_16v 1 2 PCIE_TXP4 E28 Y23 2
    PCIE_C_TXP5 PETP5 DMI_ZCOMP DMI_IRCOMP_R
    ICH_3S_SMDATA 15-,19-,26-,27-,50- 1 2 DMI_IRCOMP
    Y24
    43- D27
    PCIE_C_RXN6 PERN6_GLAN_RXN
    +V3A 43- D26 G3 38- Close to ICH8
    PCIE_C_RXP6 C9422 PERP6_CLAN_RXP USBP0N USB_P0-
    43- 0.1uF_16v PCIE_TXN6 C29 G2 38- USB_P0+
    PCIE_C_TXN6 PETN6_GLAN_TXN USBP0P
    43- C9423 0.1uF_16v 1 2 PCIE_TXP6 C28 H5 38-
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- PCIE_C_TXP6 PETP6_GLAN_TXP USBP1N USB_P1-
    1 2 USBP1P
    H4 38- USB_P1+
    36-,39- R321 1 2 15_5% C23 H2 38-
    SPI_CLK SPI_CLK USBP2N USB_P2-
    SPI_CE# 36-,39- R320 1 2 15_5% B23
    SPI_CS0# USBP2P
    H1 38- USB_P2+
    1
    SPI_CS1# 32-,39- E22 J3 46- USB_P3-
    SPI_CS1# USBP3N

    SPI
    R295 USBP3P
    J2 46- USB_P3+
    10K_5% 36-,39- R317 1 2 15_5% D23 K5 30-
    SPI_SI SPI_MOSI USBP4N USB_P4-
    2 SPI_SO 36-,39- F21 K4 30- USB_P4+
    SPI_MISO USBP4P
    32- LED_LANLINK# +V3A K2
    USBP5N
    AJ19 K1
    8-,9-,10-,12-,13-,14-,32-,39-,43-,46- Q517 3 OC0# USBP5P
    BT_OFF 45- AG16 L3 45- USB_P6-
    D
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- OC1#_GPIO40 USBP6N
    SLP_S3#_3R 1G CAM_DISABLE# 30- AG15
    OC2#_GPIO41 USBP6P
    L2 45- USB_P6+
    1
    AE15 M5 46- USB_P7-

    USB
    S OC3#_GPIO42 USBP7N
    R388
    SSM3K7002F 2
    AF15 M4 46- USB_P7+
    OC4#_GPIO43 USBP7P
    10K_5% AG17
    OC5#_GPIO29 USBP8N
    M2
    LED_3S_LANLINK# 43-,44- 2 AD12 M1
    OC6#_GPIO30 USBP8P
    AJ18 N3
    OC7#_GPIO31 USBP9N
    AD14 N2
    OC8# USBP9P
    AH18
    OC9# R705
    +V3A F2 1 2
    USBRBIAS#
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- F3 USB_RBIAS_PN
    USBRBIAS 22.6_1%
    +V3S Place within 500 mils of ICH
    WOL_EN 32- R300 1 2 10K_5% ITL_ICH8_M_BGA_676P
    GPIO12 32- R308 1 2 10K_5% 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    SPI_CS1# 32-,39- R314 1 20402_OPEN
    PM_RI# 32- R377 1 2 10K_5%
    32-,45- R303 1 20402_OPEN 1 R663 1 R379 1 R374
    CL_RST#1
    ICH_3A_ALERT_CLK 32- R385 1 2 10K_5% 8.2K_5% 8.2K_5% 8.2K_5%
    ICH_3A_ALERT_DAT 32- R384 1 2 10K_5% 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    PCIE_WAKE# 32-,43-,45- R376 1 2 1K_5% U519-3 2 2 2 +V3A
    32- R659 1 2 0_5%_OPEN 32- AJ26 AJ12
    GPIO10 ICH_3A_SMCLK SMBLCK SATA0GP_GPIO21

    SATA
    32- AD19 AJ10

    GPIO
    ICH_3A_SMDATA SMBDATA SATA1GP_GPIO19

    SMB
    +V3S CL_RST#1 32-,45- AG21 AF11 39- NPCI_RESET#
    LINKALERT# SATA2GP_GPIO36
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- 32- AC17 AG11
    ICH_3A_ALERT_CLK SMLINK0 SATA3GP_GPIO37
    ICH_3A_ALERT_DAT 32- AE19
    SMLINK1
    OCP_OC# 5-,32- R403 1 2 10K_5%
    CLK14
    AG9 15- CLK_R3S_ICH14

    Clocks
    PCI_3S_CLKRUN# 32-,39- R689 1 2 8.2K_5% 32- AF17 G5 15-
    R382 1
    PM_RI# TP24
    RI# CLK48 CLK_R3S_ICH48
    PCI_3S_SERIRQ 32-,39- 2 8.2K_5%
    1 1 R651
    GPIO14 32- R688 2 8.2K_5% F4 D3 TP26
    SUS_STAT#_LPCPD# SUSCLK
    GPIO38 32- R405 1 2 8.2K_5% 16-,19- AD15 10K_5%_OPEN
    XDP_DBRESET# SYS_RESET# 8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- AG23 SLP_S3#_3R
    SLP_S3#
    +V3S BM_BUSY# 20- AG12 AF21 8-,12- SLP_S4#_3R 2
    BMBUSY#_GPIO0 SLP_S4#
    AD18 38- SLP_S5#_3R
    SLP_S5#
    LED_LANLINK# 32- AG22
    SMBALERT#_GPIO11
    AH27
    R406 S4_STATE#_GPIO26
    32-,41- 1 20402_OPEN 15- AE20
    A_3S_ICHSPKR PCISTOP#_3 STP_PCI#_GPIO15
    CPUSTOP#_3 15- AG18 AE23 11-,20-,39- PM_PWROK
    R386 STP_CPU#_GPIO25 PWROK R307
    32- 1 20402_OPEN 1 2
    GPIO48
    PCI_3S_CLKRUN# 32-,39- AH11 AJ14 11-,20- PM_DPRSLPVR
    R668 1 2 10K_5%
    CLKRUN#_GPIO32 DPRSLPVR_GPIO16 10K_5%
    GPIO39 32-
    SYS GPIO
    PCIE_WAKE# 32-,43-,45- AE17 AE21
    R378 WAKE# BATLOW#
    32-,46- 1 20402_OPEN 32-,39- AF12
    NEWCARD_SD# PCI_3S_SERIRQ SERIRQ 1 R669
    THERM_SCI# 19-,33-,50- AC13 C2 47- PWR_SWIN2#_3
    Power MGT
    R658 THRM# PWRBTN#
    32- 1 20402_OPEN 0402_OPEN
    GPIO27 1 R9789 2
    VR_PWRGD 11-,15- AJ20 AH20
    R387 VRMPWRGD LAN_RST#
    32-,43- 1 2 0_5%_OPEN 2
    GPIO20 100K_5%
    R656 1 2 TP22 AJ22 AG27 7-,39- RSMRST# +V3A
    R667 TP7 RSMRST#
    32- 1 20402_OPEN
    GPIO18 100K_5%_OPEN
    5-,32- AJ8 E1 TP52 15- 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    R402 1 2 10K_5%
    OCP_OC# TACH1_GPIO1 CK_PWRGD CLK_PWRGD
    GPIO17 32- RUNSCI0#_3 33-,39- AJ9
    TACH2_GPIO6
    32- AH9 E3 11-,20-,39- R411 0402_OPEN

    2
    R691 1 2 10K_5%
    ISO_PREP# TACH3_GPIO7 CLPWROK PM_PWROK CHENMKO_BAT54_3P D513
    ISO_PREP# 32- LID_SW#_3 30-,47- AE16 39- LOW_BAT#_3
    GPIO8 Signal has integrated pull-up of 18K ohm-42K ohm . 1 3
    GPIO

    GPIO12 32- AC19 AJ25 TP25


    GPIO12 SLP_M#
    GPIO17 32- AG8
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- TACH0_GPIO17
    GPIO18 32- AH12 F23 20- CL_CLK0
    GPIO18 CL_CLK0
    +V3S +V3A GPIO20 32-,43- AE11 AE18 45- CL_CLK1 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    GPIO20 CL_CLK1
    33- AG10 +V3A
    Controller Link

    VGA_RST# SCLOCK_GPIO22
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- GPIO27 32- AH25 F22 20- CL_DATA0
    QRT_SATAE0_GPIO27 CL_DATA0
    NEWCARD_SD# 32-,46- AD16 AF19 45- CL_DATA1
    1 R319 1 QRT_SATA1_GPIO28 CL_DATA1
    CLKREQ_R_SATA# 15- AG13
    3.24K_1% R297 32- AF9
    SATACLKREQ#_GPIO35
    D24 32- ISOLATION 1 R309 2
    GPIO38 SLOAD_GPIO38 CL_VREF0 CL_VREF0
    3.24K_1% GPIO39 32- AJ11
    SDATAOUT0_GPIO39 CL_VREF1
    AH23 32- CL_VREF1 8.2K_5%
    2 2 GPIO48 32- AD10
    SDATAOUT1_GPIO48
    CL_VREF0 32- CL_VREF1 32- AJ23 20- CL_RST#0
    CL_RST#

    1
    C338
    1 R318
    1
    C330
    1 R299 A_3S_ICHSPKR 32-,41- AD9
    SPKR
    MEM_LED_GPIO24
    AJ27 45- XMIT_OFF# INVENTEC
    MISC

    453_1% 453_1% 20- AJ13 AJ24 32-


    MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT_GPIO10 GPIO10
    2 2 AF22 32- GPIO14 TITLE
    EC_ME_ALERT_GPIO14
    0.1uF_16v 2 0.1uF_16v 2 TP23 AJ21
    TP3 WOL_EN_GPIO9
    AG19 32- WOL_EN VV Discrete
    ITL_ICH8_M_BGA_676P
    ICH8-2
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger SHEET 32 OF 54
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    +V3S

    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    +V3S U519-2
    D20 A4 33- PCI_3S_REQ#(0)
    AD0 REQ0#
    E19 D7
    AD1 GNT0#
    R672 1 2 8.2K_5%
    PCI_3S_FRAME# 33- D19
    AD2 REQ1#_GPIO50
    E18 33- PCI_3S_REQ#(1) Boot BIOS from SPI
    A20 C18
    AD3 GNT1#_GPIO51 1 R413
    PCI_3S_IRDY# 33- R412 1 2 8.2K_5% D17
    AD4 REQ2#_GPIO52
    B19 33- PCI_3S_REQ#(2) GNT0# = 0
    A21 F18 1K_5%
    33- R410 1 2 8.2K_5% A19
    AD5 GNT2#_GPIO53
    A11 33-
    SPI_CS1# = 1
    PCI_3S_TRDY# AD6 REQ3#_GPIO54
    1
    PCI_3S_REQ#(3)
    2
    C19 C10 2
    AD7 GNT3#_GPIO55
    33- R395 1 2 8.2K_5% A18
    PCI_3S_STOP# AD8 R39410K_5%
    B16 C17
    AD9 C_BE0#
    33-,39- R390 1 2 8.2K_5% A12 E15
    PCI_3S_SERR# AD10 C_BE1#
    E16 F16
    AD11 C_BE2#
    33- R396 1 2 8.2K_5% A14 E17
    PCI_3S_DEVSEL# AD12 C_BE3#
    G16
    AD13
    PCI_3S_PERR# 33- R697 1 2 8.2K_5% A15 PCI C8 33- PCI_3S_IRDY#
    AD14 IRDY#
    B6 D9
    AD15 PAR
    33- R694 1 2 8.2K_5% C11 G6
    PCI_3S_LOCK# AD16 PCIRST#
    A9 D16 33- PCI_3S_DEVSEL#
    AD17 DEVSEL#
    33- R693 1 2 8.2K_5% D11 A7 33-
    PCI_3S_REQ#(0) AD18 PERR# PCI_3S_PERR#
    B12 B7 33- PCI_3S_LOCK#
    AD19 PLOCK#
    33- R393 1 2 8.2K_5% C12 F10 33-,39-
    PCI_3S_REQ#(1) AD20 SERR# PCI_3S_SERR#
    D10 C16 33- PCI_3S_STOP#
    AD21 STOP#
    33- R671 1 2 8.2K_5% C7 C9 33-
    PCI_3S_REQ#(2) AD22 TRDY#
    33-
    PCI_3S_TRDY#
    F13 A17
    AD23 FRAME# PCI_3S_FRAME#
    33- R674 1 2 8.2K_5% E11
    PCI_3S_REQ#(3) AD24
    E13 AG24 20-,46- PLT_RST#
    AD25 PLTRST#
    33- R391 1 2 8.2K_5% E12 B10 15-
    PCI_3S_INTA# AD26 PCICLK CLK_R3S_ICHPCI
    D8 G7
    AD27 PME#
    33- R696 1 2 8.2K_5% A6
    PCI_3S_INTB# AD28
    E8 +V3A
    AD29
    33- R409 1 2 8.2K_5% D6 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    PCI_3S_INTC# AD30
    A3
    AD31
    33- R673 1 2 8.2K_5%
    PCI_3S_INTD#
    Interrupt I/F 5 U13
    PCI_3S_INTE# 33- R407 1 2 8.2K_5%
    PCI_3S_INTA# 33- F9
    PIRQA# PIRQE#_GPIO2
    F8 33- PCI_3S_INTE# PHP_74LVC1G17_SOT753_5P
    PCI_3S_INTB# 33- B5
    PIRQB# PIRQF#_GPIO3
    G11 33- PCI_3S_INTF# 2 4 39-,43-,45- BUF_PLT_RST#
    33- R392 1 2 8.2K_5% 33- C5 F12 33-
    PCI_3S_INTF# PCI_3S_INTC# PIRQC# PIRQG#_GPIO4 PCI_3S_INTG# 1 R296
    PCI_3S_INTD# 33- A10 B3 33- PCI_3S_INTH#
    33- R389 1 2 8.2K_5%
    PIRQD# PIRQH#_GPIO5 3 100K_5%
    PCI_3S_INTG#
    ITL_ICH8_M_BGA_676P
    32-,39- R690 1 2 8.2K_5% 2
    RUNSCI0#_3 1 R9756 2
    19-,32-,50- R383 1 2 8.2K_5%
    THERM_SCI# 0_5%_OPEN
    33- R695 1 2 8.2K_5%
    PCI_3S_INTH#
    +V3A
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

    U16 5 1
    50- 1 R368 2 4
    PCIE_RST#
    330_5% 2 32- VGA_RST#
    3
    NC7SZ08M5

    INVENTEC
    TITLE
    VV Discrete
    ICH8-3
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 33 OF 54
    +V_RTC +VCCP
    31-,39- U519-6 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    AD25 A13
    VCCRTC VCC1_05_1
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- B13
    1 1 VCC1_05_2
    C703 C704 +V3S A16
    V5REF1 VCC1_05_3
    C13 C361 C360
    T7 C14
    1 1
    2 0.1uF_16v 2 0.1uF_16v V5REF2 VCC1_05_4
    D14
    CHENMKO_BAT54_3P D512 VCC1_05_5 2 2 0.1uF_16v
    +V5S G4
    V5REF_SUS VCC1_05_6
    E14 0.1uF_16v
    1 3 F14
    VCC1_05_7
    AA25 G14 +V1.5S
    R675 VCC1_5_B1 VCC1_05_8
    2 1 AA26 L11
    VCC1_5_B2 VCC1_05_9
    5-,11-,13-,14-,19-,29-,32-,37-,40-,41-,48- AA27 L12
    100_5% VCC1_5_B3 VCC1_05_10 10-,13-,18-,24-,34-,45-,46-
    C726 AB27
    VCC1_5_B4 VCC1_05_11
    L14
    1 AB28 L16
    +V3A VCC1_5_B5 VCC1_05_12
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- AB29 L17

    CORE
    2 VCC1_5_B6 VCC1_05_13
    1uF_10v D28
    VCC1_5_B7 VCC1_05_14
    L18 C709
    CHENMKO_BAT54_3P D514 D29 M11
    1 1C708
    1 3 E25
    VCC1_5_B8 VCC1_05_15
    M18
    +V1.25S
    VCC1_5_B9 VCC1_05_16 2 2 10uF_6.3v
    +V5A E26
    VCC1_5_B10 VCC1_05_17
    P11 8-,10-,20-,24- 0.01uF_16v
    E27 P18
    VCC1_5_B11 VCC1_05_18
    7-,8-,9-,10-,11-,12-,13-,14-,30-,38-,48- F24 T11
    R692 VCC1_5_B12 VCC1_05_19
    2 1 F25 T18 C706
    VCC1_5_B13 VCC1_05_20 1
    G24 U11
    10_1% VCC1_5_B14 VCC1_05_21 +VCCP
    H23 U18 2
    C734 1 VCC1_5_B15 VCC1_05_22
    H24
    VCC1_5_B16 VCC1_05_23
    V11 22uF_6.3v 10-,11-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
    J23 V12
    0.1uF_16v 2 VCC1_5_B17 VCC1_05_24
    J24 V14
    VCC1_5_B18 VCC1_05_25
    K24
    VCC1_5_B19 VCC1_05_26
    V16 C363 C364
    K25 V17
    1 1 1 C707
    VCC1_5_B20 VCC1_05_27
    +V1.5S L23 V18
    +V1.5S_PCIE_ICH VCC1_5_B21 VCC1_05_28 2 0.1uF_16v 2 0.1uF_16v 2 4.7uF_6.3v
    L24
    VCC1_5_B22
    L25 R29

    VCCA3GP
    L19 31-,32-,34- VCC1_5_B23 VCCDMIPLL
    10-,13-,18-,24-,34-,45-,46- M24
    VCC1_5_B24
    1 2 M25
    VCC1_5_B25 VCC_DMI_1
    AE28
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    KC_FBM_11_160808_101_T_2P 1 C333 C332 C336 C337 N23
    VCC1_5_B26 VCC_DMI_2
    AE29
    +V3S
    1 1 1 N24
    VCC1_5_B27
    2 220uF_2.5v 2 2 2 N25
    VCC1_5_B28 V_CPU_IO_1
    AC23
    0.1uF_16v 0.1uF_16v 0.1uF_16v P24
    VCC1_5_B29 V_CPU_IO_2
    AC24
    P25
    VCC1_5_B30
    R24
    VCC1_5_B31 VCC3_3_1
    AF29 C382 C705
    R25
    1 1
    VCC1_5_B32
    R26 AD2 2 2
    VCC1_5_B33 VCC3_3_2
    +V1.5S R27
    VCC1_5_B34
    0.1uF_16v 0.1uF_16v
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    T23 AC8 +V3S
    VCC1_5_B35 VCC3_3_3

    CORE
    VCCP
    10-,13-,18-,24-,34-,45-,46- T24 AD8
    VCC1_5_B36 VCC3_3_4
    T27 AE8
    VCC1_5_B37 VCC3_3_5
    T28 AF8
    L522 VCC1_5_B38 VCC3_3_6
    1 2 T29
    VCC1_5_B39
    BLM11A121S U24 AA3
    VCC1_5_B40 VCC3_3_7
    U25
    VCC1_5_B41 VCC3_3_8
    U7 C385
    1 1 V23 V7
    1
    C732 C733 VCC1_5_B42 VCC3_3_9

    IDE
    2 2 V24 W1 2 0.1uF_16v
    VCC1_5_B43 VCC3_3_10
    10uF_6.3v 1uF_6.3v V25 W6
    VCC1_5_B44 VCC3_3_11
    +V1.5S W25 W7
    VCC1_5_B45 VCC3_3_12
    Y25 Y7
    VCC1_5_B46 VCC3_3_13
    10-,13-,18-,24-,34-,45-,46-
    AJ6 A8
    VCCSATAPLL VCC3_3_14
    B15
    VCC3_3_15
    AE7
    VCC1_5_A1 VCC3_3_16
    B18 C388 C335 C365 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    C381 AF7 B4
    1 1 1
    1 VCC1_5_A2 VCC3_3_17

    ARX
    AG7 B9 2 2 0.1uF_16v 2
    VCC1_5_A3 VCC3_3_18
    0.1uF_16v 0.1uF_16v

    PCI
    2 1uF_6.3v AH7 C15 +V3S
    VCC1_5_A4 VCC3_3_19
    AJ7 D13
    VCC1_5_A5 VCC3_3_20
    D5
    VCC3_3_21
    AC1 E10
    VCC1_5_A6 VCC3_3_22
    AC2
    VCC1_5_A7 VCC3_3_23
    E7 C3840.1uF_16v
    1

    ATX
    AC3 F11
    1 VCC1_5_A8 VCC3_3_24
    AC4 2
    C383 AC5
    VCC1_5_A9
    AC12
    2 1uF_6.3v VCC1_5_A10 VCCHDA +V3A
    +V1.5S
    AC10 AD11 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    VCC1_5_A11 VCCSUSHDA
    10-,13-,18-,24-,34-,45-,46- AC9
    VCC1_5_A12
    J6 TP18
    VCCSUS1_05_1 1
    AA5 AF20
    VCC1_5_A13 VCCSUS1_05_2 C358
    +V1.5S AA6 2 0.1uF_16v
    VCC1_5_A14
    AC16 TP19 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    VCCSUS1_5_1
    10-,13-,18-,24-,34-,45-,46- G12 +V3A
    VCC1_5_A15
    G17 J7 TP20
    VCC1_5_A16 VCCSUS1_5_2
    H7
    C407 1 VCC1_5_A17
    C3
    VCCSUS3_3_1
    0.1uF_16v 2 AC7
    VCC1_5_A18
    +V1.5S AD7
    VCCPSUS
    AC18 1 1
    VCC1_5_A19 VCCSUS3_3_2 C387 C359
    AC21 2 0.1uF_16v 2 0.1uF_16v 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
    VCCSUS3_3_3
    10-,13-,18-,24-,34-,45-,46- D1 AC22
    VCCUSBPLL VCCSUS3_3_4
    AG20 +V3A
    VCCSUS3_3_5
    USB_CORE

    F1 AH28
    VCC1_5_A20 VCCSUS3_3_6
    C386 1 L6
    VCC1_5_A21
    +V1.5S 0.1uF_16v 2 L7
    VCC1_5_A22 VCCSUS3_3_7
    P6
    M6 P7
    VCC1_5_A23 VCCSUS3_3_8
    10-,13-,18-,24-,34-,45-,46- M7 C1
    VCC1_5_A24 VCCSUS3_3_9
    N7 1 C362
    VCCSUS3_3_10
    W23 P1
    VCC1_5_A25
    VCCPUSB

    VCCSUS3_3_11
    +V3_LAN P2 2 4.7uF_6.3v
    VCCSUS3_3_12
    TP16 F17 P3
    VCCLAN1_05_1 VCCSUS3_3_13
    34-,43-,44-,45- TP17 G18 P4
    VCCLAN1_05_2 VCCSUS3_3_14
    P5
    VCCSUS3_3_15
    F19 R1
    VCCLAN3_03_1 VCCSUS3_3_16
    G20 R3
    C334 1 +V1.5S_PCIE_ICH VCCLAN3_03_2 VCCSUS3_3_17
    R5
    VCCSUS3_3_18
    A24 R6
    0.1uF_16v 2 31-,32-,34- L519 VCCGLANPLL VCCSUS3_3_19
    1 2
    GLAN POWER

    +V1.5S BLM11A121S C722 1 C720 A26


    VCCGLAN1_5_1 VCCCL1_05
    G22 TP21
    1
    10-,13-,18-,24-,34-,45-,46- 2
    10uF_6.3v2 2.2uF_16V
    A27
    B26
    B27
    B28
    VCCGLAN1_5_2
    VCCGLAN1_5_3
    VCCGLAN1_5_4
    VCCCL1_5
    A22

    F20
    1
    C721
    1
    2
    C7007
    0.1uF_16v INVENTEC
    VCCGLAN1_5_5 VCCCL3_3_1 TITLE
    1 C719
    B25
    VCCCL3_3_2
    G21
    2 +V3_LAN VV Discrete
    +V3S VCCGLAN3_3 ICH8-4
    2 4.7uF_6.3v 34-,43-,44-,45-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- ITL_ICH8_M_BGA_676P 0.1uF_16v_OPEN SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 34 OF 54
    U519-5
    A23 K7
    VSS001 VSS099
    A5 L1
    VSS002 VSS100
    AA2 L13
    VSS003 VSS101
    AA7 L15
    VSS004 VSS102
    A25 L26
    VSS005 VSS103
    AB1 L27
    VSS006 VSS104
    AB24 L4
    VSS007 VSS105
    AC11 L5
    VSS008 VSS106
    AC14 M12
    VSS009 VSS107
    AC25 M13
    VSS010 VSS108
    AC26 M14
    VSS011 VSS109
    AC27 M15
    VSS012 VSS110
    AD17 M16
    VSS013 VSS111
    AD20 M17
    VSS014 VSS112
    AD28 M23
    VSS015 VSS113
    AD29 M28
    VSS016 VSS114
    AD3 M29
    VSS017 VSS115
    AD4 M3
    VSS018 VSS116
    AD6 N1
    VSS019 VSS117
    AE1 N11
    VSS020 VSS118
    AE12 N12
    VSS021 VSS119
    AE2 N13
    VSS022 VSS120
    AE22 N14
    VSS023 VSS121
    AD1 N15
    VSS024 VSS122
    AE25 N16
    VSS025 VSS123
    AE5 N17
    VSS026 VSS124
    AE6 N18
    VSS027 VSS125
    AE9 N26
    VSS028 VSS126
    AF14 N27
    VSS029 VSS127
    AF16 N4
    VSS030 VSS128
    AF18 N5
    VSS031 VSS129
    AF3 N6
    VSS032 VSS130
    AF4 P12
    VSS033 VSS131
    AG5 P13
    VSS034 VSS132
    AG6 P14
    VSS035 VSS133
    AH10 P15
    VSS036 VSS134
    AH13 P16
    VSS037 VSS135
    AH16 P17
    VSS038 VSS136
    AH19 P23
    VSS039 VSS137
    AH2 P28
    VSS040 VSS138
    AF28 P29
    VSS041 VSS139
    AH22 R11
    VSS042 VSS140
    AH24 R12
    VSS043 VSS141
    AH26 R13
    VSS044 VSS142
    AH3 R14
    VSS045 VSS143
    AH4 R15
    VSS046 VSS144
    AH8 R16
    VSS047 VSS145
    AJ5 R17
    VSS048 VSS146
    B11 R18
    VSS049 VSS147
    B14 R28
    VSS050 VSS148
    B17 R4
    VSS051 VSS149
    B2 T12
    VSS052 VSS150
    B20 T13
    VSS053 VSS151
    B22 T14
    VSS054 VSS152
    B8 T15
    VSS055 VSS153
    C24 T16
    VSS056 VSS154
    C26 T17
    VSS057 VSS155
    C27 T2
    VSS058 VSS156
    C6 U12
    VSS059 VSS157
    D12 U13
    VSS060 VSS158
    D15 U14
    VSS061 VSS159
    D18 U15
    VSS062 VSS160
    D2 U16
    VSS063 VSS161
    D4 U17
    VSS064 VSS162
    E21 U23
    VSS065 VSS163
    E24 U26
    VSS066 VSS164
    E4 U27
    VSS067 VSS165
    E9 U3
    VSS068 VSS166
    F15 U5
    VSS069 VSS167
    E23 V13
    VSS070 VSS168
    F28 V15
    VSS071 VSS169
    F29 V28
    VSS072 VSS170
    F7 V29
    VSS073 VSS171
    G1 W2
    VSS074 VSS172
    E2 W26
    VSS075 VSS173
    G10 W27
    VSS076 VSS174
    G13 Y28
    VSS077 VSS175
    G19 Y29
    VSS078 VSS176
    G23 Y4
    VSS079 VSS177
    G25 AB4
    VSS080 VSS178
    G26 AB23
    VSS081 VSS179
    G27 AB5
    VSS082 VSS180
    H25 AB6
    VSS083 VSS181
    H28 AD5
    VSS084 VSS182
    H29 U4
    VSS085 VSS183
    H3 W24
    VSS086 VSS184
    H6 A1
    VSS087 VSS_NCTF_01
    J1 A2
    VSS088 VSS_NCTF_02
    J25 A28
    VSS089 VSS_NCTF_03
    J26 A29
    VSS090 VSS_NCTF_04
    J27 AH1
    VSS091 VSS_NCTF_05
    J4 AH29
    VSS092 VSS_NCTF_06
    J5 AJ1
    VSS093 VSS_NCTF_07
    K23 AJ2
    VSS094 VSS_NCTF_08
    K28 AJ28
    VSS095 VSS_NCTF_09
    K29 AJ29
    VSS096 VSS_NCTF_010
    K3 B1
    VSS097 VSS_NCTF_011
    K6 B29
    VSS098 VSS_NCTF_012

    ITL_ICH8_M_BGA_676P
    INVENTEC
    TITLE
    VV Discrete
    ICH8-5
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 35 OF 54
    +V3A

    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

    39- SPI_HOLD#
    U523
    +V3A 32-,39- 1 8
    SPI_CE# CE# VDD

    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 32-,39-
    R427 1 2 15_5% 2 7
    R457 1 2 3.3K_5%
    SPI_SO SO HOLD#
    R429 1 0_5%_OPEN
    2 3 6 32-,39-
    WP# SCK SPI_CLK 1 C433
    4 5 32-,39- 0.1uF_16v
    1 VSS SI SPI_SI 2
    R428 SST_25VF080B_SOIC_8P
    3.3K_5%
    2

    CN5000 CN5001
    P6 P6
    GND GND
    P5 P5
    GND GND
    P4 P4
    MD MD
    P3 P3
    +5V +5V
    P2 P2
    +5V +5V
    P1 P1
    DP DP
    S7 S7
    GND GND
    S6 S6
    B+ B+
    S5 S5
    B- B-
    S4 S4
    GND GND
    G1 S3 S3
    G A- A-
    G2 S2 S2 G1
    G A+ A+ G
    G3 S1 S1 G2
    G GND GND G

    ALLTOP_C18601_11305_L_13P SANTA_202001_1_13P

    EX_ODD_GND EX_ODD_GND EX_ODD_GND EX_ODD_GND

    SCREW2.8_7_1P

    S5000
    FIX5001

    FIX_MASK
    EX_ODD_GND
    FIX5002

    FIX_MASK

    FIX5003

    FIX_MASK SCREW2.8_7_1P

    S5001

    EX_ODD_GND

    ODD EXTEND/B
    INVENTEC
    TITLE
    VV Discrete
    SYSTEM BIOS
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 27-Nov-2008 SHEET 36 OF 54
    CN510
    1
    GND
    SATA_C_TXP0 31- 2
    A+
    SATA_C_TXN0 31- 3
    A-
    4
    31-
    C393 3300pF_50v SATA_RXN0 5
    GND
    SATA_C_RXN0 SATA_RXP0 B-
    SATA_C_RXP0 31- 1 2 6
    B+
    C394 1 2 3300pF_50v 7
    GND
    8
    CLOSE TO SATA CONN 9
    V3.3
    V3.3
    +V5S 10
    V3.3
    11
    GND
    5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48- 12
    GND
    13
    GND
    14
    V5
    15
    V5
    16
    V5
    17
    GND
    18
    RESERVED
    19
    GND
    20
    V12
    21 G1
    V12 G1
    22 G2
    V12 G2

    SYN_127043FR022G269ZR_22P

    +V5S
    5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-

    (20/5)

    1 C641
    2 0.1uF_16v CN6007
    P6
    GND
    P5
    GND
    P4
    MD
    CLOSE TO SATA CONN P3
    +5V
    P2
    +5V
    P1
    DP
    C7018 3300pF_50v S7
    SATA_RXP2 GND
    SATA_C_RXP2 31- S6
    31- 1 2 SATA_RXN2 S5
    B+
    SATA_C_RXN2 B-
    C7017 1 2 3300pF_50v S4
    GND G
    G1
    SATA_C_TXN2 31- S3 G2
    A- G
    SATA_C_TXP2 31- S2 G3
    A+ G
    S1 G4
    GND G

    SYN_127382FR013S530ZR_13P

    INVENTEC
    TITLE
    VV Discrete
    HDD & ODD CONN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 18-Nov-2008 SHEET 37 OF 54
    +V5A_USB_0
    38-

    C370
    1 1 C371
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48- +V5A_USB_0 2 2 1000pF_50v
    +V5A 0.1uF_16v
    U520 (20/5) 38-
    1 8
    GND OUT
    (20/5) L521 CN511
    2 7 1 32- 1 2 USB_L_P0- 1 G G1
    IN OUT
    C723 USB_P0- 2
    1
    G2
    2 G
    1 3 6 22uF_6.3V 3 G3
    C372 2 3 G
    IN OUT USB_L_P0+
    2 0.01uF_16v 32- 4 3 4
    4 G G4
    32-,38- 4 5
    USB_P0+
    SLP_S5#_3R EN OC#
    WCM_2012_900T
    GMT_G545B1P8U_MSOP_8P
    Close to USB CON
    SYN_020173MR004G565ZR_4P

    +V5A_USB_1
    38-

    C310
    1 1 C312
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48- +V5A_USB_1 1000pF_50v
    +V5A 2 2
    U514 (20/5) 38- 0.1uF_16v
    1 8
    GND OUT
    (20/5)
    2 7 1 L516 CN508
    IN OUT
    C689 32- 1 2 USB_L_P1- 1 G1
    1 G
    1
    3 6 22uF_6.3V USB_P1- 2 G2
    C311
    IN OUT 2 2 G
    2 0.01uF_16v 3 G G3
    USB_L_P1+ 3
    SLP_S5#_3R 32-,38- 4
    EN OC#
    5
    USB_P1+ 32- 4 3 4 4 G G4

    GMT_G545B1P8U_MSOP_8P WCM_2012_900T SYN_020173MR004G565ZR_4P


    Close to USB CON

    +V5A_USB_2
    38-

    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48- +V5A_USB_2 C416


    1 1 C415
    +V5A
    U522 (20/5) 38- 2 2 1000pF_50v
    1
    GND
    8 0.1uF_16v
    OUT
    (20/5)
    2 7 1 L524 CN512
    IN OUT
    C737 32- 1 2 USB_L_P2- 1 G1
    1 G
    1
    C417 3 6 22uF_6.3V USB_P2- 2 G2
    IN OUT 2 2 G
    2 0.01uF_16v 3 G G3
    USB_L_P2+ 3
    SLP_S5#_3R 32-,38- 4 5 32- 4 3 4 G G4
    EN OC# USB_P2+ 4

    GMT_G545B1P8U_MSOP_8P WCM_2012_900T SYN_020173MR004G565ZR_4P


    Close to USB CON

    INVENTEC
    TITLE
    VV Discrete
    USB CONN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Nov-2008 SHEET 38 OF 54
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    +VBATR
    +V3S 5-,7-,8-,9-,11-,13-,29-,30-,48- CN509
    1 1
    CLK_R3S_DEBUG 15- 2 2
    3 3
    +V3AL 31-,39-,45- 4 4
    +V3AL LPC_3S_FRAME# 5
    5-,6-,7-,14-,31-,39-,40-,47- 5
    1 C392 33-,43-,45- 6 6
    5-,6-,7-,14-,31-,39-,40-,47- BUF_PLT_RST# 7
    2 0.1uF_16v 7
    5-,6-,7-,14-,31-,39-,40-,47- LPC_3S_AD(0)
    31-,39-,45- 8 8
    31-,39-,45- 9 9
    1 C735 1 C736 1 C741 1 C368 +V_RTC +V3AL LPC_3S_AD(1) 31-,39-,45- 10
    1 C391 1 C369 LPC_3S_AD(2) 10
    2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 2 0.1uF_16v 31-,34- C367 LPC_3S_AD(3)
    31-,39-,45- 11 11
    1 C366 1 12 12
    2 0.1uF_16v 2 0.1uF_16v 1 1 R440 13
    R439 2 2 STBY_LED#
    39-,47- 13
    0402_OPEN 4.7uF_6.3v 14
    0.1uF_16v LED_3_CAPS#
    39-,47- 14
    0_5%_OPEN 39- 15 15
    LED_3_NUM# 39- 16
    2 2 VCC1_R_POR#_3 16
    SPI_CLK 32-,36- 17 17
    SPI_CE# 32-,36- 18 18
    SPI_SI
    32-,36- 19 19
    SPI_SO 32-,36- 20 20
    1 21
    SPI_HOLD# 36- 21 25 G1
    R7013 SPI_CS1#
    32- 22 22 26 G2
    0_5% 1 C410 23 23
    2 2 0.1uF_16v 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- 24 24
    +V3S +V3AL +V3AL ACES_87216_2406_24P_OPEN
    40-,47-
    SCAN_3S_OUT(11:0) 5-,6-,7-,14-,31-,39-,40-,47-
    5-,6-,7-,14-,31-,39-,40-,47-

    106
    119
    14
    39
    58
    84

    49
    15
    68
    U17
    DEBUG PORT

    100K_5%
    2
    SCAN_3S_OUT(0) 21 124 7-

    VCC1
    VCC1
    VCC1
    VCC1
    VCC1
    VCC1
    VCC2
    CAP
    VCC0
    KOS00 OUT0 KBC_PW_ON

    R699

    R708 8.2K_5%
    SCAN_3S_OUT(1) 20 125 47-
    KOS01 OUT1 BAT_GRN_LED#

    5.1K_5%

    5.1K_5%
    1 R9645 2

    1 R9646 2
    SCAN_3S_OUT(2) 19 123 TP35
    KOS02 OUT7

    2
    SCAN_3S_OUT(3) 18 122 TP13 31-
    KOS03 OUT8 PM_3S_KBCCPURST#

    1
    SCAN_3S_OUT(4) 17 121 41-
    SCAN_3S_OUT(5)
    KOS04 OUT9 A_SD
    16 120 19-
    KOS05 OUT10 PWM_3S_FAN#
    SCAN_3S_OUT(6) 13 118 5-,6-

    1
    SCAN_3S_OUT(7) 12
    KOS06 OUT11
    107 TP65
    CHGCTRL_3
    KOS07 GPIO01
    SCAN_3S_OUT(8) 10 79 47-
    KOS08 GPIO02 PWR_SWIN#_3
    SCAN_3S_OUT(9) 9 80 32-
    SCAN_3S_OUT(10) 8
    KOS09 GPIO03
    81 40-
    LOW_BAT#_3

    Keyboard / Mouse Interface

    Genrel Purpose I/O Interface


    40-,47- SCAN_3S_OUT(11) 7
    KOS10 GPIO04
    83 40-
    SCAN_3S_OUT(14)
    SCAN_3S_IN(7:0) KOS11 GPIO05 SCAN_3S_OUT(15)
    40- 6 85 1 2 7-,32-
    SCAN_3S_OUT(12) KOS12 GPIO07 RSMRST#
    SCAN_3S_OUT(13) 40- 5 86 R445 10K_5%
    KOS13 GPIO08
    SCAN_3S_IN(0) 29 87 1 2
    KSI0 GPIO09
    SCAN_3S_IN(1) 28 88 TP30 R446 10K_5%
    KSI1 GPIO11
    SCAN_3S_IN(2) 27 89 TP31
    KSI2 GPIO012
    SCAN_3S_IN(3) 26 90 TP14
    KSI3 GPIO013 +V3AL
    SCAN_3S_IN(4) 25 91 TP15
    KSI4 GPIO014
    SCAN_3S_IN(5) 24 92 6-
    TP36
    KSI5 GPIO015 BATCON R700 5-,6-,7-,14-,31-,39-,40-,47-
    SCAN_3S_IN(6) 23 101 6- 1 2
    SCAN_3S_IN(7) 22
    KSI6 GPIO016
    102 31-,39-
    THM_MAIN#
    KSI7 GPIO017 EC_3S_A20GATE 100K_5%
    41 61 TP37
    EMCLK GPIO019 39-
    42 103 LED_3_NUM# +V3AL
    EMDAT GPIO020
    IM_5S_CLK 40- 35 105 8-,9-,10-,12-,13-,14-,32-,43-,46- SLP_S3#_3R
    IMCLK GPIO021
    IM_5S_DATA 40- 36 4 5-,6-,7-,14-,31-,39-,40-,47-
    IMDAT GPIO024
    40
    KDAT GPIO025
    73 R676 1
    TP32 2 10K_5%
    38 108
    KCLK GPIO026
    32-,33- 76 Power 74 R701 1 2 1K_1% 5-,6-,7-,43-
    RUNSCI0#_3 ADP_PRES
    Mgmt
    nEC_SCI GPIO027

    SIRQ
    32- 55 93 TP47
    PCI_3S_CLKRUN# CLKRUN# GPIO028
    PCI_3S_SERIRQ 32- 57 98 TP48
    31-,39-,45- SER_IRQ GPIO029
    LPC_3S_AD(3:0) CLK_R3S_KBPCI 15- 54 99 TP49
    PCI_CLK GPIO030
    LPC_3S_AD(3) 51 100 1 R709 2 10K_5% 41-
    LPC_3S_AD(2) 50
    LAD3 GPIO031
    126 33-
    A_EAPD
    LPC_3S_AD(1)
    LAD2 GPIO032 PCI_3S_SERR#
    48 112 6- SCL_MAIN
    LAD1 AB1A_CLK
    LPC_3S_AD(0) 46 LPC Bus 111 6-
    LAD0 Access Bus AB1A_DATA SDA_MAIN
    LPC_3S_FRAME# 31-,39-,45- 52 110
    LFRAME# AB1B_CLK
    NPCI_RESET# 32- 53 Intreface 109
    LRESET# AB1B_DATA
    45 70
    LPCPD# XTAL1
    +V3S 1 71
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- NC XTAL2
    2 59 15- CLK_R3S_KBC14
    NC CLOCKI
    3 75
    R698 NC 32KHZ_OUT_GPIO22 X2
    1 2 30 60
    NC nRESET_OUT
    31 69 11-,20-,32- 4 1
    10K_1% NC TEST_PIN PM_PWROK
    32 77
    NC VCC1_PWRGD
    33 113 2 1 3 2
    NC nBAT_LED 10K_5%
    34 115 R441
    43
    NC Miscellaneous nPWR_LED
    114
    32.768KHZ
    NC nFDD_LED 39- VCC1_R_POR#_3 1 C412 1 C411
    44 116 1 2 14-
    NC mDMS_LED
    R442 1K_5%
    VCC1_POR#_3
    62 78 47-
    NC PWEGD BAT_AMBER_LED# 2 15pF_50V 2 15pF_50V
    63 95 39-,47-
    NC NC STBY_LED#
    64 96 39-,47-
    NC NC LED_3_CAPS#
    65 97
    NC NC 14-
    66 127
    NC NC PWR_GOOD_KBC
    AGND

    67 128
    NC NC
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS
    VSS

    94
    NC
    72

    11
    37
    47
    56
    82
    104
    117

    SMSC_KBC1070_VTQFP_128P

    +V3S

    31-,39- 1 R702 2
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    INVENTEC
    EC_3S_A20GATE TITLE
    10K_5% VV Discrete
    KBC
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 16-Nov-2008 SHEET 39 OF 54
    CN4
    1 1 +V3AL
    2 2 5-,6-,7-,14-,31-,39-,47-
    3 3
    4 4

    5
    2
    3
    7
    4
    5 5 RS500
    6

    47K_5%
    6
    7 7
    SCAN_3S_OUT(15) 39- 8 8
    SCAN_3S_OUT(10) 39- 9 9
    SCAN_3S_OUT(11) 39- 10

    10
    10

    6
    1
    8
    9
    SCAN_3S_OUT(14) 39- 11 11
    SCAN_3S_OUT(13) 39- 12 12
    SCAN_3S_OUT(12) 39- 13 13
    SCAN_3S_OUT(3) 39- 14 14
    SCAN_3S_OUT(6) 39- 15 15
    SCAN_3S_OUT(8) 39- 16 16
    SCAN_3S_OUT(7) 39- 17 17
    SCAN_3S_OUT(4) 39- 18 18
    SCAN_3S_OUT(2) 39- 19 19 SCAN_3S_IN(0)
    SCAN_3S_IN(0) 39-,40-,47- 20 20 SCAN_3S_IN(1)
    SCAN_3S_OUT(1) 39- 21 21 SCAN_3S_IN(2)
    SCAN_3S_OUT(5) 39- 22 22 SCAN_3S_IN(3)
    SCAN_3S_IN(3) 39-,40- 23 23 SCAN_3S_IN(4)
    SCAN_3S_IN(2) 39-,40- 24 24 SCAN_3S_IN(5)
    SCAN_3S_OUT(0) 39-,47- 25 25 SCAN_3S_IN(6)
    SCAN_3S_IN(5) 39-,40- 26 26 SCAN_3S_IN(7)
    SCAN_3S_IN(4) 39-,40- 27 27 G G1
    SCAN_3S_OUT(9) 39- 28 28 G G2
    SCAN_3S_IN(6) 39-,40- 29 29
    SCAN_3S_IN(7) 39-,40- 30 30
    SCAN_3S_IN(1) 39-,40-
    HRS_FH28_60_1SH_30P 39-,40-,47-
    SCAN_3S_IN(7:0)

    KEYBOARD CONN

    +V5S
    5-,11-,13-,14-,19-,29-,32-,34-,37-,41-,48-

    C341 +V5S
    680pF_50v 1
    1 1
    2
    R324 R325
    4.7K_5% 4.7K_5%
    2 2
    CN7
    1 1
    39- (15/5) 2 2
    IM_5S_CLK 39- 3 3 G G1
    IM_5S_DATA
    4 4 G G2

    ACES_8876641L_4P

    TOUCH PAD CNTR

    INVENTEC
    TITLE
    VV Discrete
    KB & TP CONN
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 15-Dec-2008 SHEET 40 OF 54
    39- 1 R9918 2
    A_EAPD
    0_5%_OPEN
    D3004
    +V3S 1 2 39- A_SD
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    C9470 0.1uF_16v
    1 R417 2 3 BAT54A 1 2
    C9471 0.1uF_16v
    0_5% 1 C260 C400 C420 1 C9604
    2 1

    2 1
    1 2 0.1uF_16v
    C9472
    2 4.7uF_6.3v 0.1uF_16v 0.1uF_16v 2 47pF_50V_OPEN
    +V3S 1 2
    C9473 0.1uF_16v
    Place near pin3 and pin9 each C9604 close to U7017 1 2
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    1 R9903 2 C9474 0.1uF_16v
    100K_5% 1 2
    HP_OUT_R_IC C9459 2.2uF_6.3v 41- C9475 0.1uF_16v
    C9467 2.2uF_6.3v 41- HP_OUT_R
    1 C9605
    HP_OUT_L_IC
    1 2 HP_OUT_L 1 2
    +V3S
    1 2 41- LINE_OUT_R 41- AMP_SHUT#
    2 10uF_6.3V 41- LINE_OUT_L
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    33
    32
    31
    30
    29
    28
    27
    26
    25
    U7017
    1
    +VAUDIO_VCC1
    For EMI.

    TML
    SPDIF-OUT0
    EAPD-GPIO0-SPDIFOUT
    DMIC_CLK
    DMIC_0-GPIO1
    GPIO2-SPDIF-OUT1
    PORTA_R
    PORTA_L
    PORTD_R
    R716 41-,42-
    4.7K_5%
    2 1 24
    DVDD_IO PORTD_L
    31- 2 23 1 R9902 2 +VMIC_BIAS_C
    AZ_3S_SDOUT SDO SENSE_B
    31- 3 22 42- +VMIC_BIAS_B
    AZ_3S_BITCLK BITCLK CAP2 2.49K_1%
    4 21 42-
    R451 AS_SDIN
    DVSS VREFOUT-C
    AZ_3S_SDIN0 31- 5 20
    1 2 SDI_CODEC VREFOUT-B +VAUDIO_VCC1 +VAUDIO_VCC
    33_5% 6 19
    DVDD_CORE VREFFILT +V5S

    PCBEEP-MONO
    AZ_3S_SYNC 31- 7 18 41-,42- 41-
    SYNC AVSS1 R9820 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    AZ_3S_RST# 31- 8 17
    RESET# AVDD1

    PORTB_R

    PORTC_R
    PORTE_R
    SENSE_A

    PORTB_L

    PORTC_L
    PORTE_L
    1 2
    0_5%
    C9450 1 1 1 C426
    1 1
    1 C9606 C9607
    1 C401 C9448 2
    1 C9613 2 1uF_10v 2 10uF_6.3V 2 1000pF_50V 2 0.1uF_16v 2 10uF_6.3v_OPEN 2 1uF_16V
    R448 R424
    0_5%_OPEN 100K_5%
    9
    10
    11
    12
    13
    14
    15
    16
    2 0.01uF_16V 3
    2 C9489 D 1
    Close to pin17 Q46 G 1 41-
    1 C418 C9490 HP_JS
    IDT_92HD75B2X5NLGXZAX_QFN_32P 42-
    INT_MIC SSM3K7002F S

    2 12pF_50V_OPEN 1 2
    1uF_16V 1 2 2 1 C403
    +VAUDIO_VCC1 1uF_16V Place near CODEC 2 0.1uF_16v
    41-,42-
    1
    A_MIC2_IC C9460 1uF_16v 42- A_MIC_R Close to R456
    A_MIC1_IC C9452 1uF_16v 1 2
    42- A_MIC_L
    R726 1 2

    C744 +VAUDIO_VCC1
    10K_5% R714
    2 0.1uF_10V 100K_5% +V5S
    C419 41-,42-
    PCBEEP_CRC PCBEEP_IC_CR PCBEEP_IC_C PCBEEP_IC 1 R9905 2 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    1 2
    1 2 1 2 2.49K_1%
    3 1
    SENSE_A_A 1
    D
    R715 1 C745 0.1uF_16v R456 39.2K_1%
    SENSE_A_B
    A_3S_ICHSPKR 32- 1G Q522 R452 1 2 20K_1% R478
    S SSM3K7002F 10K_5% 2
    0.01uF_16v
    1 2
    3 47K_5%
    2 2 D 2
    G 1 42-
    MIC_SENSE
    S
    1 C446
    +V5S Q49 2
    SSM3K7002F 2 0.1uF_16v
    5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-

    1 1 C9438 1 R470 2 Close to R452

    +V5S 2 2 10uF_6.3v 0_5%


    C9435
    5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    1uF_16v +V5S
    5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    +V5S (0603)
    C9430 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48-
    2 1

    C9439 C9442
    2 1

    1
    1uF_16v
    1uF_16v 2 10uF_6.3v 11
    R9815 R9817

    LINE_OUT_R 41- C8 0.047uF_16v 1 R9906 2


    100K_5%_OPEN
    2 2
    100K_5%
    Internal Speaker
    30

    17

    18

    1 2 U7010
    9

    2K_5% C9610 R9908


    VDD

    CPVDD

    HPVDD

    SPVDD

    SPVDD

    41- C9425 0.047uF_16v 1 R9907 2 0.022uF_16V 1K_5%


    2 7 C9611 0.047uF_16v CN6012
    LINE_OUT_L 1 2 1 2 1
    SPKR_RIN+ LOUT-
    6 1 2 1 2
    (35/15) SPK_OUT_R- 1 1 G G1
    2K_5% SPKR_RIN- LOUT+
    1 2 C9612 0.047uF_16v SPK_OUT_R+ 2 2 G G2
    C9426 0.047uF_16v 3 19
    SPKR_LIN+ ROUT- 1 1
    1 21 2 4
    SPKR_LIN- ROUT+
    20 ACES_87213_0200_2P
    C9608
    0.047uF_16v C9455 2 2 C9458
    C9609 100pF_50v 100pF_50v
    1 2 24 31 11
    BYPASS GAIN0 R9816 R9818
    1uF_6.3V GAIN1
    32 Colse to internal speaker.
    41- R9827 1 2 0_5% 22 100K_5% 100K_5%_OPEN
    AMP_SHUT# HP_EN 1 1
    16 HP_OUTL 22
    0_5% HP_OUTL
    R9909 1 2 23
    SPKR_EN#
    15 HP_OUTR 41-
    HP_OUTR HP_JS D2017
    HP_OUT_R 41- 26
    HP_INR
    D2016
    10 R9812 L544 1 JACK502 PHP_PESD5V0S1BB_SOD523_2P _OPEN
    C1P 60.4_1% BLM11A121S PHP_PESD5V0S1BB_SOD523_2P_OPEN
    HP_OUT_L 41- 27
    HP_INL
    HP_OUT_L_R HP_OUT_L_JACK 2
    C9440
    2 1

    1 2
    12 1 2
    6
    1 R9910 2
    C1N 2 2
    0_5%_OPEN
    25

    29
    REG_EN 1uF_16v
    11
    1

    R9813
    60.4_1%
    2 HP_OUT_R_R 1
    L545
    2

    BLM11A121SC9451 11
    HP_OUT_R_JACK
    C9456
    3
    4
    5
    Earphone Jack
    +VAUDIO_VCC REG_OUT
    R9810 R9811
    +V5S 100pF_50V 100pF_50V SIN_2SJ_C82014D3_6P
    41- 20K_5% 20K_5% 22
    TML-PAD
    CPGND
    SPGND

    SPGND

    CPVSS

    HPVSS

    5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,48- 22 1 C9469
    GND

    1 R9911 2 C9424 C9429


    2 1

    1
    2 1uF_16V
    INVENTEC
    5

    21

    11

    28

    13

    14

    33

    2 10uF_6.3v TI_TPA6041A4RHBR_QFN_32P
    100K_5% 0.1uF_10V For EMI
    SGND1 TITLE
    C9433
    VV Discrete
    2 1

    AUDIO CODEC
    1uF_16v SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 41 OF 54
    1 R9913 2

    0_5%_OPEN

    +VMIC_BIAS_C
    +VAUDIO_VCC1 MIC_REF1 41- MIC_REF1
    41-,42- 42- 42-
    1 +VAUDIO_VCC1
    1
    R33 1 41-,42-
    R9834 +VAUDIO_VCC1 3K_1% C40
    47K_5% 41-,42- 2 100pF_50v 2 4 TI_TLV2464IPW_TSSOP_14P
    4 R9836 12 + U7012-D
    2
    5 + U7012-B 100_5% C156 14
    CN10 INT_MIC_R INT_MIC_AMP 41- INT_MIC
    7 1 2 1 2
    INT_MIC_JACK 1 R45 2 1 R32 2 13 - OUT
    6 - OUT
    1 - +
    C9488 C9487 1 2 0_5% 10K_5% 100pF_50V C248
    11
    2 1

    2 1
    R9833 HIT_HMO60_HO3PZ_G_2P 0.1uF_16v

    PESD5V0U1BB_OPEN
    11

    1
    47K_5% 4.7uF_6.3v 4.7uF_6.3v INT_MIC_C
    1 1 2

    D7
    1 C41 C36
    2
    47pF_50v 68pF_50v 2 R31 1
    2
    2
    100K_5%
    TI_TLV2464IPW_TSSOP_14P
    Internal MIC

    2
    For ESD

    1 R9914 2
    0_5%_OPEN
    +VAUDIO_VCC1
    41-,42-

    +VMIC_BIAS_B 1
    C9483
    41-
    MIC_REF1 0.1uF_16v
    2
    42-

    1 1 Close to CODEC 1
    R9838 R9839 C9480 4 TI_TLV2464IPW_TSSOP_14P
    4.7K_5% 4.7K_5% C9485 100pF_50v 3 + U7012-A
    JACK503 0.47uF_16v 2
    1 2 2
    OUT 1 41- A_MIC_L
    2 EXT_JACK_MIC1 2
    L546
    1
    EXT_MIC1 1 R9835 2 1 R9830 2 2 -
    BLM11A121S
    6 1 2 0_5% 10K_5%
    3 EXT_JACK_MIC2 2
    L547
    1
    EXT_MIC2 11
    1
    4 BLM11A121S
    C9479 C9478
    5 41- 68pF_50v 33pF_50V
    MIC_SENSE 2
    SIN_2SJ_C82014D3_6P C9476 1 1 C9477 1 1 2
    C38 R9829 1
    MIC Jack 100pF_50V 2

    For EMI
    2 100pF_50V 2 1000pF_50V_OPEN 2

    100K_5%
    Close to JACK503 pin1
    MIC_REF1
    42- +VAUDIO_VCC1
    SGND1
    C9594 1 41-,42-
    1
    C2 C1 C9484 4 U7012-C
    D2011 C9486 100pF_50v 10 + TI_TLV2464IPW_TSSOP_14P
    2 1uF_16V 0.47uF_16v 2
    CHENMKO_CHPZ6V2_3P 8 41- A_MIC_R
    A 1 R9837 2 1 R9832 2 9 - OUT
    Close to JACK503 FOR EMI 1 2 0_5% 10K_5% 11
    1
    C9482
    68pF_50v C9481 33pF_50V
    2
    1 2
    2
    R9831 1
    100K_5%

    1 R9915 2

    0_5%_OPEN

    +V3S
    CN513
    1 2 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,43-,45-,46-,47-,48-,50-,51-
    MDC_3S_SDOUT 31- 3 4 20 MIL
    5 6
    MDC_3S_SYNC 31- 7 8
    MDC_3S_SDIN1 31- 9 10
    MDC_3S_RST# 31- 11 12 31- MDC_3S_BITCLK
    G1 G4 C452 C1041
    G2 G5
    1 1
    G3 G6 2 2
    0.1uF_16v 10uF_6.3v
    ACES_88020_1210N_12P

    INVENTEC
    TITLE
    VV Discrete
    MDC CNTR MDC CNTR
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 14-Oct-2008 SHEET 42 OF 54
    +V3_LAN
    34-,43-,44-,45- 7-,11-,13-,14-,30-,32-,33-,34-,36-,45-,47-
    +V3A +V3_LAN
    34-,43-,44-,45-
    Q2015

    3
    2

    D
    S
    1 C724 C9397
    1 1
    1 1 R9797

    1G
    R9796 2 4.7uF_6.3v 2 0.1uF_16v R9656
    4.7K_5% PMV65XP
    4.7K_5% 100_5%
    2
    2 2

    U7009
    +V3_LAN 1 8 1 R9655 2
    A0 VCC
    2 7
    34-,43-,44-,45- A1 WP 220K_5%
    3 6
    A2 SCL
    +V3S 4
    GND SDA
    5 C9413
    1
    ATM_AT24C08BN_SOIC_8P 8-,9-,10-,12-,13-,14-,32-,39-,46- U518
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,45-,46-,47-,48-,50-,51- 2 5 NC7SZ02M5X Q2016 3
    0.1uF_16V SLP_S3#_3R 1 2 1 D

    R9794 R9680 0_5% 4 1G


    1
    ADP_PRES 5-,6-,7-,39- 1 2 2 S
    4.7K_5% R339 220K_5% 3 SSM3K7002F 2
    2
    +VDD

    +V2.5_VDD 43-

    43-,44-
    close to pin39

    C9404 C9406
    1 1 +V2.5_VDD
    2 4.7uF_6.3V 2 0.1uF_16V 43-,44-
    48
    47
    46
    45
    44
    43
    42
    41
    40
    39
    38
    37
    36
    35
    34
    33
    VDD
    VMAIN_AVLBL
    TESTMODE
    VDDO_TTL
    VDD
    PU_VDDO_TTL
    CLKREQn
    VPD_DATA
    VDDO_TTL
    VDD
    VPD_CLK
    RESERVED
    RESERVED
    RESERVED
    RESERVED
    VDD
    C9408 0.1uF_16V
    PCIE_C_RXP6 32- 49 32
    PCIE_TXP NC
    PCIE_C_RXN6 32- 1 2 50
    PCIE_TXN NC
    31
    C9407 1 2 0.1uF_16V 51 30
    AVDD NC
    52 29
    AVDD TSTPT
    PCIE_C_TXN6 32- 53 28
    PCIE_RXN NC
    32- 54 U521 27
    PCIE_C_TXP6 PCIE_RXP
    MARVELL_88E8042_QFN_64P NC +V2.5_VDD
    CLK_PCIE_LAN 15- 55 26
    REFCLKP NC
    CLK_PCIE_LAN# 15- 56 25 43-,44-
    REFCLKN HSDACN +V3_LAN
    57 24
    RESERVED HSDACP
    58 23 34-,43-,44-,45-
    VDD NC
    LED_3S_LANACT# 44- 59 22
    LED_ACTn NC
    60 21 44- TRD1N C9411 C9414 C9416 C9418 C9420

    0.1uF_16v

    0.1uF_16v

    0.1uF_16v

    0.1uF_16v

    0.1uF_16v
    LED_SPEEDn TXN 1 1 1 1 1
    61 20 44- TRD1P
    VDDO_TTL TXP 1 1 1 1 1

    C728

    C729

    C397

    C727

    C398
    62 19
    RESERVED AVDDL 2 2 2 2 2
    LOM_DISABLEn

    0.1uF_16V 0.1uF_16V 0.1uF_16V 0.1uF_16V 0.1uF_16V


    SWITCH_VAUX

    LED_3S_LANLINK# 32-,44- 63 18 44- TRD0N 2 2 2 2 2


    VAUX_AVLBL

    LED_LINKn RXN
    SWITCH_VCC

    64 17 44- TRD0P
    VDDO_TTL

    VDDO_TTL

    VDD25 RXP
    C9405 65
    EPAD
    PERSTn

    1
    WAKEn

    XTALO
    PD_12
    PD_25

    XTALI
    RSET
    VDD

    VDD

    VDD

    2
    4.7uF_6.3V
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    13
    14
    15
    16

    close to pin64
    +V3_LAN 1 R9795 2
    34-,43-,44-,45- 2K_1%
    +VDD
    43-

    C9412 C9415 C9417 C9419 C9421


    33-,39-,45- 1 1 1 1 1
    BUF_PLT_RST#
    X504 2 2 2 2 2
    PCIE_WAKE# 32-,45- 0.1uF_16V 0.1uF_16V 0.1uF_16V 0.1uF_16V 0.1uF_16V
    1

    1 R9793 2 25MHZ
    4.7K_5% C1056
    C1055
    2 1

    2 1

    1 R9792 2 22pF_50v 22pF_50v


    GPIO20 32-
    0_5%_OPEN

    Please bypass caps as close as possible with every power pin of MARVEL 88E8042
    Please close to XTALO and XTAL1
    INVENTEC
    TITLE
    VV Discrete
    NIC 10/100- CONTROLLER
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 16-Nov-2008 SHEET 43 OF 54
    +V2.5_VDD
    43-

    C83 C9398
    1 1 +V3_LAN
    2 2 34-,43-,45-
    0.1uF_16v 0.1uF_16v

    R188 2
    330_5%

    330_5%
    R2181

    1
    JACK501
    9 GL1 GL2 10 43- LED_3S_LANACT#
    U515 RJ45_TB+ 44- 8 D-
    2 15 RJ45_TB- 44- 7 D+
    TCT TCT
    TRD1N 43- 3 14 44- RJ45_TA- RJ45_TA+ 44- 6 RX- G G2
    TD- TX-
    TRD1P 43- 1 16 44- RJ45_TA+ 5 C-
    TD+ TX+
    7 10 4 C+
    RCT RCT
    TRD0N 43- 8 9 44- RJ45_TB- RJ45_TA- 3 RX+ G G1
    RD- RX-
    TRD0P 43- 6 11 44- RJ45_TB+ 2 TX-
    RD+ RX+
    4 12 1 TX+
    NC NC
    5 13 11 YL1 YL2 12 32-,43- LED_3S_LANLINK#
    NC NC

    BOTH_TS8121C_LF_SOP_16P SYN_100073FR012G101ZL_12P

    C7029 C7031
    C7028 1 1 C70301 1
    0.01uF_50V 2 2
    0.01uF_50V
    0.01uF_50V 2 2
    0.01uF_50V

    2 2 2 2

    75_1%

    75_1%

    75_1%

    75_1%
    R7001

    R7002
    R266

    R267
    1 1 1 1

    C690
    1
    2 2200pF_2000v

    INVENTEC
    TITLE
    VV Discrete
    NIC 10/100- RJ45
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Nov-2008 SHEET 44 OF 54
    +V3S
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,46-,47-,48-,50-,51-

    +V1.5S

    10-,13-,18-,24-,34-,46-

    C442 C435 C440 1 C436


    1 C434 1 1 C441 1 1
    2 0.1uF_16v 2 10uF_6.3v 2 0.1uF_16v 2 2 2 4.7uF_6.3v
    0.1uF_16v 0.1uF_16v
    CN515
    PCIE_WAKE# 32-,43- 1 2
    WAKE# 3.3V
    WLAN_PRIORITY 45- 3 4
    Reserved GND
    BT_PRIORITY 45- 5 6
    Reserved 1.5V
    CLK_R_REQG# 15- 7 8 31-,39- LPC_3S_FRAME#
    CLKREQ# Reserved
    9 10 31-,39- LPC_3S_AD(3)
    GND Reserved
    CLK_R_PCIE_MINI2# 15- 11 12 31-,39- LPC_3S_AD(2)
    REFCLK- Reserved
    CLK_R_PCIE_MINI2 15- 13 14 31-,39- LPC_3S_AD(1)
    REFCLK+ Reserved
    15 16 31-,39- LPC_3S_AD(0)
    33-,39-,43-,45-
    17
    GND Reserved
    18 +V3_LAN
    BUF_PLT_RST# Reserved GND
    CLK_R3S_MINICARD 15- 19 20 32-,45- XMIT_OFF# 34-,43-,44-
    Reserved Reserved
    21 22 BUF_PLT_RST#
    GND PERST#
    PCIE_C_RXN2 32- 23 24 33-,39-,43-,45-
    PERn0 +3.3Vaux
    PCIE_C_RXP2 32- 25 26
    PERp0 GND
    27 28 C439 C438
    29
    GND 1.5V
    30
    1 1
    GND SMB_CLK
    PCIE_C_TXN2 32- 31 32 2 2
    PETn0 SMB_DATA
    PCIE_C_TXP2 32- 33
    PETp0
    34 0.1uF_16v 10uF_6.3v
    GND
    35 36
    GND USB_D-
    37 38
    Reserved USB_D+
    39 40
    Reserved GND
    41 42
    Reserved LED_WWAN#
    43 44
    Reserved LED_WLAN#
    CL_CLK1 32- R738 1 2 0_5%_OPEN 45
    LED_WPAN#
    46
    Reserved
    CL_DATA1 32- R737 1 2 0_5%_OPEN 47 48
    Reserved 1.5V
    CL_RST#1 32- R736 1 20_5%_OPEN 49
    Reserved GND
    50
    51 52
    Reserved 3.3V
    G1 G2
    G G

    TYCO_1720007_1_52P

    WLAN CONN
    R261,R262,R263,R264,R265 place as close to LPC signal as possible to minimize stub length for LPC bus
    (will be NI for FCS)

    BLUETOOTH_VCC

    +V3A
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,47-
    Q2004
    2 3
    S D
    C7009
    1 1 C7010
    1 R9630 PMV65XP
    G
    1 2 2 0.1uF_16v
    10K_5% 10uF_6.3v 47- WL_BT_LED#
    2
    CN9 Q2005 3
    D

    LED_BLUETOOTH 45- 1G
    32- 1 R9631 2 8
    8 7 G2
    BT_OFF G G1 S

    220K_5% USB_P6+ 32- 7 6 G 1 SSM3K7002F 2


    USB_P6- 32- 6 R9632
    5
    LED_BLUETOOTH 45- 5 4 100K_5%
    45- R9634 1 2 0_5%_OPEN 4 3
    WLAN_PRIORITY
    BT_PRIORITY 45- R9633 1 2 0_5%_OPEN 3 2
    2
    2 1 Q2006 3
    1 D
    ACES_87212_0800_8P XMIT_OFF# 32-,45- 1G
    S

    SSM3K7002F 2

    BLUETOOTH CONN

    INVENTEC
    TITLE
    VV Discrete
    MINICARD CONN & BLUETOOTH
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 5-Nov-2008 SHEET 45 OF 54
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51- +V3S
    +V3S +V3S +V3S +V3S
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    1
    R721 +VCC_SD
    C296
    1 1 C295
    4.7uF_6.3v
    0_5%_OPEN C697 1 1
    46- C699 2 2 4.7uF_6.3v
    2 U526 0.1uF_16v 2 2 0.1uF_16v
    29
    1 R9685 2
    TML-PAD
    CLK_R3S_CR48 15- 1 28
    EXT48IN GPON7
    2 27 46- SD_WP
    0_5% CHIPRESET# CTRL1
    3
    REXT CTRL3
    26 46- SD_CD# 20-,33- U11
    4 25 46- SDDATA1 R7012 1 20
    32- 5
    VD33P DATA1
    24 46- 32- 1 2 PLT_RST# 2
    SYSRST# OC#
    19
    +V3AUX_EXP
    USB_P3+ DP DATA0 SDDATA0 NEWCARD_SD# SHDN# RCLKEN
    USB_P3- 32- 6 23 0_5%_OPEN SLP_S3#_3R 3 18 46-
    7
    DM DATA7
    22
    +V3_EXP 8-,9-,10-,12-,13-,14-,32-,39-,43- 4
    STBY# AUXIN
    17
    VS33P DATA6 3.3VIN AUXOUT
    8 21 46- SD_CLK 5 16 C298
    9
    VDD CTRL0
    20
    46-
    6
    3.3VIN 1.5VIN
    15
    1 1 C700
    CF_V33 DATA5 3.3VOUT 1.5VIN
    10 19 46- SD_CMD C696 7 14 2 10uF_6.3v 2 0.1uF_16v
    V33 CTRL2 3.3VOUT 1.5VOUT
    11 18 C294 PERST# 46- 8
    PERST#
    13
    +V1.5S
    12
    CTRL4 DATA4
    17 46-
    1 1 9
    1.5VOUT
    1246-
    XDCDN DATA3 SDDATA3 NC CPPE# CPPE#
    C755 1 C756 13 16 46- SDDATA2 2 2 10uF_6.3v 10
    GND CPUSB#
    1146- CPUSB# 10-,13-,18-,24-,34-,45-
    1 14
    XDCEN DATA2
    15
    0.1uF_16V XDCIS XDWPN 0.1uF_16v
    1 1 2 2 2.2uF_6.3V TI_TPS2231PW_TSSOP_20P
    C7025 C7026 ALCOR_AU6433_GEF_GR_QFN_28P +V1.5_EXP
    C775
    0402_OPEN 2 0402_OPEN
    2 1 C772 1 1 R723
    46-
    2.2uF_6.3V 330_5%
    2 2
    4.7uF_6.3V
    2 C701
    C297
    1 1
    2 2 10uF_6.3v
    0.1uF_16v

    +V3S
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    +V1.5_EXP
    +VCC_SD CN66
    10K_5% 46- +V3_EXP CN6
    46-
    1 R425 2 G3 G4
    46- 26
    CN8 32- 26
    PCIE_C_TXP5 25
    25
    SDDATA3 46- 1 G1 PCIE_C_TXN5 32- 24 G
    DAT3 GND +V3AUX_EXP 24 G2
    23 G
    46- 2 G2 32- 23 G1
    SD_CMD CMD GND 46- PCIE_C_RXP5 22
    22
    PCIE_C_RXN5 32- 21 G1 G2
    3 12 21
    VSS CD_WP_COM 20
    15- 20 SANTA_130888_2_4P
    CLK_R_PCIE_NEWCARD 19

    R290

    R292

    R291
    4 11 46- 15- 19
    VDD CD SD_CD# CLK_R_PCIE_NEWCARD# 18
    18
    CPPE# 46- 17
    46- 1 R9686 2 5 10 46- 15- 17
    SD_CLK CLK WP SD_WP 1 1 1 CLK_R_REQH# 16
    16
    0_5% 15
    15
    6 9 46- SDDATA2 14
    VSS DAT2
    46- 14
    PERST# 13
    C70271 SDDATA0 46- 7
    DAT0 DAT1
    8 46- SDDATA1 2 2 2 13
    12
    0_5%_OPEN

    4.7K_5%

    4.7K_5%
    12
    10pF_50V_OPEN 2 11
    11
    PLAS_CS165_14P 10
    10
    9
    9
    8
    NEW CARD HOUSING
    8
    7
    7
    6
    6
    5
    SD/MMC CONN CPUSB# 46- 5
    4
    4

    R365
    32-
    0.1uF_16v

    0.1uF_16v

    0_5%_OPEN
    0.1uF_16v

    USB_P7+ 3
    C354
    C353

    C327

    32- 3
    USB_P7- 2
    2
    1 1
    1
    1 1 1
    SANTA_130810_7_26P
    2 2 2
    2
    NEW CARD CONN

    INVENTEC
    TITLE
    VV Discrete
    NEW CARD & SD/MMC
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 20-Nov-2008 SHEET 46 OF 54
    +V3S_DB WIRELESS BUTTON
    47- WLAN LED
    1 +V3S_DB
    R3001
    SW3000
    300_5% D3000 47-
    SCAN_3S_OUT(0)_DB 39-,47- 2 4 39-,40-,47- SCAN_3S_IN(0)_DB
    1 3
    2 EVL_19_21_B7C_ZQ1R2_3T_2P
    47- 1 R3000 2 MITSUMI_SOT_152HST_4P
    WL_BT_LED#_DB FIX2
    1 2
    130_1%
    D3001 FIX_MASK
    2 1 FIX3
    EVL_19_21UYC_S530_A2_TR8
    FIX_MASK
    DB_DGND

    +V3S_DB 47-
    FIX3000 POWER / STANDBY LED
    +V3AL_DB 47- FIX_MASK

    +V3AL_DB
    FIX3001
    47-

    1 PAD3000 FIX_MASK
    D3002
    POWER BUTTON
    2 47- 1 R3002 2
    STBY_LED#_DB 1 2
    3 FIX3003 270_5% +V3AL_DB
    WL_BT_LED#_DB 47- 4
    S3000 S3001 47- 5
    LITEON_LTW_C190DA5 47-
    47-
    STBY_LED#_DB FIX_MASK PWR_SWIN#_3_DB
    SCAN_3S_OUT(0)_DB 39-,47- 6 R3003 SW3001
    SCAN_3S_IN(0)_DB 39-,40-,47- 7 FIX3005 1 2 2 4
    PWR_SWIN#_3_DB 47- 8 1 3
    SCREW5.5_8_10_1P SCREW5.5_8_10_1P 100K_5%
    9 C3000
    10
    FIX_MASK 1 MITSUMI_SOT_152HST_4P
    DB_DGND DB_DGND SMDPAD_10P 2
    1000pF_50v D3003
    2 1 DB_DGND
    DB_DGND

    PHP_PESD5V0S1BB_SOD523_2P

    LED&SWITCH BOARD DB_DGND

    BATTERY-CHARGE LED +V3AL +V3S 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,48-,50-,51-

    5-,6-,7-,14-,31-,39-,40-,47- +V3AL 5-,6-,7-,14-,31-,39-,40-,47-


    R171
    270_5%
    BAT_AMBER_LED# 39- D10
    1
    HT_191UY
    2
    1 2
    LID SWITCH CN2
    39- D11 S1_023459 1 2 1 1
    BAT_GRN_LED# 2
    1 2 +V3A 2
    R170 3 3
    270_5% 45- 4 4
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- WL_BT_LED# 5
    STBY_LED# 39- 5
    39-,40- 6 6
    +V3A SCAN_3S_OUT(0) 7
    SCAN_3S_IN(0) 39-,40- 7
    39-,47- 8 8
    PWR_SWIN#_3
    CAP LED 7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47- 1
    R9901
    C7012 1
    9
    10
    9 G G1
    10 G G2
    100K_5% U7000
    1
    VDD 560pF_50V 2 ACES_88746_100N_10P
    2 3
    GND
    39- D8 1 R152 2
    LITEON_LTW_C190DA5 30-,32- 2
    LED_3_CAPS# 1 2 LID_SW#_3 OUT
    270_5% For EMI
    C7000 1 C7001 1 E-COMS_BC2648_B3_F_SOT23_3P

    1
    2 2
    100pF_50v 0.01uF_16v

    3
    D2009
    PHP_PESD5V2S2UT_SOT23_3P_OPEN
    +V3A
    7-,11-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-

    1
    G Q2001
    PWR_SWIN#_3 39-,47- D S 32- PWR_SWIN2#_3
    3 2
    SSM3K7002F

    INVENTEC
    TITLE
    VV Discrete
    BUTTON & LED
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 25-Dec-2008 SHEET 47 OF 54
    S1

    SCREW3_8_1P
    S6 S7

    S15 SCREW3.7_4_6_1P S16 SCREW3.7_4_6_1P FIX7


    SCREW3.4_6_6_1P SCREW3.4_6_6_1P
    FIX_MASK

    S13 S14 FIX8


    S2 S3
    SCREW2_0_6_1P SCREW2_0_6_1P FIX_MASK
    S8 S9
    S17 SCREW3.7_4_6_1P S18 SCREW3.7_4_6_1P
    SCREW3_8_9_1P SCREW3_8_9_1P FIX9

    SCREW3.4_6_6_1P SCREW3.4_6_6_1P FIX_MASK

    FIX10

    FIX_MASK

    CPU MINI CARD MDC


    FIX11

    S4 S5 FIX_MASK

    FIX12

    SCREW3_6_7_1P SCREW3_6_7_1P FIX_MASK

    FIX37

    FIX_MASK

    FIX38
    +V5A +V5S
    FIX_MASK
    7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48- 5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-

    C9602
    S11 S12 1 2
    0.1uF_10V

    SCREW3_8_10_1P SCREW3_8_10_1P
    S27 S28
    +VBATR +V5A
    5-,7-,8-,9-,11-,13-,29-,30-,39- 7-,8-,9-,10-,11-,12-,13-,14-,30-,34-,38-,48-
    SCREW1.1_0_6_1P SCREW1.1_0_6_1P
    C9599
    1 2
    0.1uF_25V
    S19 S20 C9600
    1 2
    0.1uF_25V
    SCREW3_8_10_1P SCREW3_8_10_1P
    +VBATR +V3S
    5-,7-,8-,9-,11-,13-,29-,30-,39- 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-
    VGA C9601
    1 2
    S21 0.1uF_25V

    +V1.8S +V3S
    SCREW3_8_10_1P
    13-,49-,50-,51-,52-,53-,54- 11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50-,51-

    C9603
    1 2
    0.1uF_10V

    MAIN BOARD For EMI&ESD

    INVENTEC
    TITLE
    VV Discrete
    SCREW
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 25-Nov-2008 SHEET 48 OF 54
    STRAPS PIN Description of default settings U511-2
    M92-S2 AF2
    +V3S_DELY
    TXCAP_DPA3P
    AE9 AF4
    TX_PWRS_ENB GPIO0 PCIE full TX output swing. 0 DVPDATA_18 TXCAM_DPA3N
    1 R215 2
    49-,51-
    L9 GPIO0 49-
    NC
    N9 AG3
    NC DPA TX0P_DPA2P
    1 R186 2
    10K_5%
    TX_DEEMPH_EN GPIO1 PCIE transmitter de-emphasis enabled. 0 AE8 DVPDATA_16 TX0M_DPA2N AG5 GPIO1 49-
    AD9
    DVPDATA_20 10K_5% 1 R184 2
    AC10 DVPDATA_22 TX1P_DPA1P AH3 GPIO4 49-
    BIF_DEBUG_ACCESS GPIO4 Debug signals muxed out. 0 AD7 DVPDATA_12 TX1M_DPA1N AH1
    10K_5%_OPEN
    AC8
    DVPDATA_14
    AC7 DVPCNTL_0 TX2P_DPA0P AK3
    ROMIDCFG(0:3) GPIO[11:13,9] Memory aperture type XXXX AB9 AK1 49- 1 R214 2
    DVPDATA_8 TX2M_DPA0N GPIO11
    AB8
    DVPDATA_6 10K_5% R213
    AB7 AK5 49- 1 2
    X = DESIGN DEPENDANT DVPDATA_4 TXCBP_DPB3P GPIO9
    AB4 AM3
    DVPDATA_19 TXCBM_DPB3N
    1 R311 2
    10K_5%_OPEN
    AB2 DVPDATA_21 GPIO12_ATI 49-
    0 = DO NOT INSTALL RESISTOR 49- Y8 AK6
    MEM_ID2 49-
    DVPDATA_2 TX3P_DPB2P 10K_5%_OPEN 1 R594 2
    MEM_ID0 Y7 AM5 GPIO13 49-
    1 = INSTALL 10K RESISTOR DVPDATA_0 DPB TX3M_DPB2N
    10K_5%_OPEN
    TX4P_DPB1P AJ7
    Table 1 DVO AH6 See table 1.
    TX4M_DPB1N

    GPIO_13 GPIO_12 GPIO_11 For DIS-GDDR2 AK8


    +V1.8S
    TX5P_DPB0P
    AL7 13-,48-,49-,50-,51-,52-,53-,54-
    TX5M_DPB0N
    POW_SW1 POW_SW0 +VDD_CORE M92-S2 49- 10K_5%
    0 0 0 128M memory aperture MEM_ID0 R627
    1 2
    W6
    0 0 1.0V DVPDATA_11 M92-S2 49- R629 10K_5%_OPEN
    49-
    MEM_ID1 1 2
    V4 MEM_ID3
    0 1 0.95V DVPDATA_3
    49- 10K_5%
    0 0 1 256M memory aperture (Default) AC6
    DVPDAT10 DVPCNTL_2
    U5 MEM_ID2 R623
    1 2
    1 0 0.9V AC5 DVPDAT23
    W3 49- R625 10K_5%_OPEN
    DVPDATA_7
    49-
    MEM_ID3 1 2
    AA5 V2
    DVPDAT15 DVPDATA_1 MEM_ID1
    1 1 0 reserved AA6 DVPDAT17
    DVPCNTL_MV1 Y4
    DVPDATA_9 W5

    U1 AA3
    DVPCLK DVPDATA_13
    W1 Y2 +V1.8S See table 2.
    DVPDAT5 DVPCNTL_1
    Table 2 13-,48-,49-,50-,51-,52-,53-,54-
    AA12
    VDDR4
    For DIS-GDDR2 AA1 DVPCNTL_MV0
    MEM_ID3 MEM_ID2 MEM_ID1 MEM_ID0 vendor
    DPC
    30-
    0 1 0 1 samsung (256MB) LCM_BKLTEN
    1
    R212 30- R1
    10K_5% LVDS_DDC_CLK SCL I2C
    0 1 1 0 Qimonda(256M) (Default) LVDS_DDC_DATA 30- R3
    SDA
    2 R256 75_1%
    1 2
    R AM26 29- CRT_R
    GENERAL PURPOSE I/O
    0 1 1 1 hynix (256MB) 49- U6
    RB AK26
    R618 75_1%
    GPIO0 GPIO_0
    1 2
    GPIO1 49- U10 GPIO_1 G AL25 29- CRT_G
    T10 GPIO_2 GB AJ25
    1 R211 2 U8 R259 75_1%
    GPIO_3_SMBDATA
    1 2
    GPIO4 49- U7 AH24 29-
    10K_5% GPIO_4_SMBCLK B CRT_B
    T9 GPIO_5_AC_BATT BB AG25
    TP53 GPIO6 T8
    DAC1
    GPIO_6
    1 R9777 2 T7 AH26 29-
    GPIO_7_BLON HSYNC CRT_HSYNC
    P10 AJ27 29-
    10K_5% 49-
    GPIO_8_ROMSO VSYNC CRT_VSYNC
    GPIO9 P4 GPIO_9_ROMSI
    U511-7 P2 DAC2_A2VDDQ 49-
    AB11 30- 49- N6
    GPIO_10_ROMSCK
    AD22 1 R255 2 +V1.8S
    LVDS CONTROL VARY_BL INV_PWM_3 GPIO11 49-
    GPIO_11 RSET
    AB12 30- N5 13-,48-,49-,50-,51-,52-,53-,54-
    LVDS_VDD_EN GPIO12_ATI 499_1%
    1 L510 2
    DIGON +V3S_DELY GPIO_12
    49- N3 AG24
    GPIO13 GPIO_13 AVDD
    49-,51- Y9 GPIO_14_HPD2 AVSSQ AE22 BLM11A121S
    POW_SW0 9- N1 GPIO_15_PWRCNTL_0 C7055 C7056 C679
    1

    2 1

    2 1
    M4 AE23
    1 GPIO_16_SSIN VDD1DI
    AH20 30- R584 50- R6 AD23 1uF_6.3v
    TXCLK_UP_DPF3P
    AJ19 30-
    LVDSB_CLK R216
    10K_5% 1
    OTEMP#
    W10
    GPIO_17_THERMAL_INT VSS1DI 10uF_6.3v 0.1uF_16v2
    TXCLK_UN_DPF3N LVDSB_CLK# 10K_5% 2
    GPIO_18_HPD3
    M2 GPIO_19_CTF
    M92-S2
    AL21 30- 2 9- 1 2 P8 AM12
    TXOUT_U0P_DPF2P LVDSB_DATA0 POW_SW1 GPIO_20_PWRCNTL_1 R2 +VDDDI
    AK20 30- LVDSB_DATA#0 P7 AK12
    TXOUT_U0N_DPF2N 0_5% GPIO_21_BB_EN R2B
    N8 49-
    1 L511 2
    R9724 GPIO_22_ROMCSB
    TXOUT_U1P_DPF1P AH22 30- LVDSB_DATA1 N7 GPIO_23_CLKREQB G2 AL11
    AJ21 30- T11 AJ11
    TXOUT_U1N_DPF1N LVDSB_DATA#1
    R11
    GPIO_29 G2B 1 C676 1 C680 1 C678 BLM11A121S
    GPIO_30
    TXOUT_U2P_DPF0P AL23 30- LVDSB_DATA2 B2 AK10 2 10uF_6.3v 2 1uF_6.3v 2 0.1uF_16v
    AK22 30- LVDSB_DATA#2 L6 AL9
    TXOUT_U2N_DPF0N JTAG_TRSTB B2B
    L5
    AK24 L3
    JTAG_TDI +VDDDI
    TXOUT_U3P JTAG_TCK
    AJ23 L1 AH12 49-
    TXOUT_U3N JTAG_TMS DAC2 C
    K4 JTAG_TDO Y AM10
    AF24 AJ9
    LVTMDP TESTEN COMP 1 C282
    AB13 2 0.1uF_16v +V3S_DELY
    1K_5%

    1K_5%

    1 1 1 GENERICA
    AL15 30- LVDSA_CLK R9698 W8 AL13
    R15

    TXCLK_LP_DPE3P GENERICB H2SYNC


    R2

    AK14 30- LVDSA_CLK# W9 AJ13 49-,51-


    TXCLK_LN_DPE3N 10K_5% W7
    GENERICC V2SYNC

    1 L15 2
    GENERICD
    TXOUT_L0P_DPE2P AH16 30- LVDSA_DATA0 2 2 2 AD10 GENERICE_HPD4
    AJ15 30- +V1.8S AD19 BLM11A121S
    TXOUT_L0N_DPE2N LVDSA_DATA#0 13-,48-,49-,50-,51-,52-,53-,54-
    VDD2DI 1
    AC14 HPD1 VSS2DI AC19 C291
    TXOUT_L1P_DPE1P AL17 30- LVDSA_DATA1 2 0.1uF_16v
    2
    TXOUT_L1N_DPE1N AK16 30- LVDSA_DATA#1
    R265 A2VDD AE20
    TXOUT_L2P_DPE0P
    AH18 30- LVDSA_DATA2 499_1%
    TXOUT_L2N_DPE0N AJ17 30- LVDSA_DATA#2 1 A2VDDQ AE17 49- DAC2_A2VDDQ
    AC16 VREFG
    AL19 2 AE19
    TXOUT_L3P A2VSSQ
    TXOUT_L3N AK18 C292
    1 R264
    ATI_M92_S2_BGA_631P 0.1uF_16v 2
    1
    249_1% R2SET
    AG13 1 R263
    715_1%
    2
    INVENTEC
    ATI_M92_S2_BGA_631P TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 49 OF 54
    U511-1
    PEG_C_TXP0 21- AF30 PCIE_RX0P PCIE_TX0P AH30 PEG_RXP0 C240 0.1uF_16v 21- PEG_C_RXP0
    PEG_C_TXN0 21- AE31
    PCIE_RX0N PCIE_TX0N
    AG31 1 2
    PEG_RXN0 C238 0.1uF_16v 21- PEG_C_RXN0 +V1.8S
    1 2
    PEG_C_TXP1 21- AE29 AG29 PEG_RXP1 C231 0.1uF_16v 21- PEG_C_RXP1 U511-6 13-,48-,49-,50-,51-,52-,53-,54-
    PCIE_RX1P PCIE_TX1P
    21- AD28 AF28 1 2 DP E/F POWER DP A/B POWER
    PEG_C_TXN1 PCIE_RX1N PCIE_TX1N
    C278
    PEG_RXN1 0.1uF_16v 21- PEG_C_RXN1 AG15 DPE_VDD18#1 NC_DPA_VDD18#1 AE11
    1 2 AG16
    DPE_VDD18#2 NC_DPA_VDD18#2
    AF11
    +VPCIE
    PEG_C_TXP2 21- AD30 PCIE_RX2P PCIE_TX2P AF27 PEG_RXP2 C239 0.1uF_16v 21- PEG_C_RXP2
    21- AC31 AF26 1 2 +VPCIE 9-,50-,51-
    PEG_C_TXN2 PCIE_RX2N PCIE_TX2N
    C235
    PEG_RXN2 0.1uF_16v 21- PEG_C_RXN2
    9-,50-,51-
    1 2 1 L553 2 AG20 DPE_VDD10#1 DPA_VDD10#1 AF6
    PEG_C_TXP3 21- AC29 AD27 PEG_RXP3 C232 0.1uF_16v 21- PEG_C_RXP3 AG21 AF7
    PCIE_RX3P PCIE_TX3P BLM18BA220SN1 1 1 1
    DPE_VDD10#2 DPA_VDD10#2
    PEG_C_TXN3 21- AB28 PCIE_RX3N PCIE_TX3N AD26 1 2
    PEG_RXN3 C234 0.1uF_16v 21- PEG_C_RXN3 C9373 2
    C74 2 2
    1 2 1uF_6.3v C71 AG14 AE1
    C237 0.1uF_16v DPE_VSSR#1 DPA_VSSR#1
    PEG_C_TXP4 21- AB30 PCIE_RX4P PCIE_TX4P AC25 PEG_RXP4 0.1uF_16v 21- PEG_C_RXP4 AH14 DPE_VSSR#2 DPA_VSSR#2 AE3
    PCI EXPRESS INTERFACE

    PEG_C_TXN4 21- AA31 PCIE_RX4N PCIE_TX4N AB25 1 2 10uF_6.3v AM14 DPE_VSSR#3 DPA_VSSR#3 AG1
    PEG_RXN4 C236 0.1uF_16v 21- PEG_C_RXN4 AM16 AG6
    DPE_VSSR#4 DPA_VSSR#4
    1 2 +V1.8S AM18 DPE_VSSR#5 DPA_VSSR#5 AH5
    +V1.8S
    PEG_C_TXP5 21- AA29 PCIE_RX5P PCIE_TX5P Y23 PEG_RXP5 C230 0.1uF_16v 21- PEG_C_RXP5
    21- Y28 Y24 1 2 13-,48-,49-,50-,51-,52-,53-,54- 13-,48-,49-,50-,51-,52-,53-,54-
    PEG_C_TXN5 PCIE_RX5N PCIE_TX5N
    PEG_RXN5 C233 0.1uF_16v 21- PEG_C_RXN5
    1 2 1 L554 2 AF16 DPF_VDD18#1 NC_DPB_VDD18#1 AE13
    PEG_C_TXP6 21- Y30 AB27 PEG_RXP6 C199 0.1uF_16v 21- PEG_C_RXP6 AG17 AF13
    PCIE_RX6P PCIE_TX6P BLM18BA220SN1 1 1 1 C9589 DPF_VDD18#2 NC_DPB_VDD18#2
    PEG_C_TXN6 21- W31 PCIE_RX6N PCIE_TX6N AB26 1 2
    PEG_RXN6 C200 0.1uF_16v 21- PEG_C_RXN6 C9590 2
    C9588 2 2
    1 2 0.1uF_16v 1uF_6.3v
    PEG_C_TXP7 21- W29 PCIE_RX7P PCIE_TX7P Y27 PEG_RXP7 C229 0.1uF_16v 21- PEG_C_RXP7 AF22 DPF_VDD10#1 DPB_VDD10#1 AF8
    PEG_C_TXN7 21- V28 PCIE_RX7N PCIE_TX7N Y26 1 2 10uF_6.3v AG22 DPF_VDD10#2 DPB_VDD10#2 AF9
    PEG_RXN7 C188 0.1uF_16v 21- PEG_C_RXN7
    1 2
    PEG_C_TXP8 21- V30 PCIE_RX8P PCIE_TX8P W24 PEG_RXP8 C186 0.1uF_16v 21- PEG_C_RXP8 AF23 DPF_VSSR#1 DPB_VSSR#1 AF10
    PEG_C_TXN8 21- U31 PCIE_RX8N PCIE_TX8N W23 1 2 AG23 DPF_VSSR#2 DPB_VSSR#2 AG9
    PEG_RXN8 C189 0.1uF_16v 21- AM20 AH8
    PEG_C_RXN8 DPF_VSSR#3 DPB_VSSR#3
    1 2 AM22
    DPF_VSSR#4 DPB_VSSR#4
    AM6
    21- U29 V27 PEG_RXP9 C195 0.1uF_16v 21- AM24 AM8
    PEG_C_TXP9 PCIE_RX9P PCIE_TX9P PEG_C_RXP9 DPF_VSSR#5 DPB_VSSR#5
    PEG_C_TXN9 21- T28 PCIE_RX9N PCIE_TX9N U26 1 2
    PEG_RXN9 C193 0.1uF_16v 21- PEG_C_RXN9
    1 2
    PEG_C_TXP10 21- T30 U24 PEG_RXP10 C187 0.1uF_16v 21- PEG_C_RXP10
    PCIE_RX10P PCIE_TX10P +V1.8S 1 R9787 2 1 R9788 2
    +V1.8S
    PEG_C_TXN10 21- R31
    PCIE_RX10N PCIE_TX10N
    U23 1 2 AF17
    DPEF_CALR DPAB_CALR
    AE10
    PEG_RXN10 C190 0.1uF_16v 21- PEG_C_RXN10
    13-,48-,49-,50-,51-,52-,53-,54- 13-,48-,49-,50-,51-,52-,53-,54-
    150_5% 150_5%
    1 2 L541
    PEG_C_TXP11 21- R29 T26 PEG_RXP11 C198 0.1uF_16v 21- PEG_C_RXP11 BLM11A121S
    PCIE_RX11P PCIE_TX11P DP PLL POWER
    PEG_C_TXN11 21- P28 PCIE_RX11N PCIE_TX11N T27 1 2 AG18 DPE_PVDD DPA_PVDD AG8
    PEG_RXN11 C194 0.1uF_16v 21- PEG_C_RXN11
    1 2
    C9385 C9387 AF19 AG7
    1 C9388 1 1
    DPE_PVSS DPA_PVSS
    1 2
    PEG_C_TXP12 21- P30 PCIE_RX12P PCIE_TX12P T24 PEG_RXP12 C191 0.1uF_16v 21- PEG_C_RXP12 2 0.1uF_16v 2 0.1uF_16v 2 10uF_6.3v
    PEG_C_TXN12 21- N31 PCIE_RX12N PCIE_TX12N T23 1 2
    PEG_RXN12 C192 0.1uF_16v 21- AG19 AG10
    PEG_C_RXN12 NC_DPF_PVDD DPB_PVDD
    1 2 +V1.8S AF20 NC_DPF_PVSS DPB_PVSS AG11
    PEG_C_TXP13 21- N29 PCIE_RX13P PCIE_TX13P P27 PEG_RXP13 C196 0.1uF_16v 21- PEG_C_RXP13
    PEG_C_TXN13 21- M28 PCIE_RX13N PCIE_TX13N P26 1 2 13-,48-,49-,50-,51-,52-,53-,54- ATI_M92_S2_BGA_631P
    PEG_RXN13 C197 0.1uF_16v 21- PEG_C_RXN13
    1 2
    21- M30 P24 PEG_RXP14 C149 0.1uF_16v 21-
    PEG_C_TXP14 PCIE_RX14P PCIE_TX14P PEG_C_RXP14
    PEG_C_TXN14 21- L31 PCIE_RX14N PCIE_TX14N P23 1 2
    PEG_RXN14 C150 0.1uF_16v 21- PEG_C_RXN14
    1 2
    PEG_C_TXP15 21- L29 PCIE_RX15P PCIE_TX15P M27 PEG_RXP15 C152 0.1uF_16v 21- PEG_C_RXP15
    PEG_C_TXN15 21- K30
    PCIE_RX15N PCIE_TX15N
    N26 1 2 +V1.8S
    PEG_RXN15 C153 0.1uF_16v 21- PEG_C_RXN15
    1 2 13-,48-,49-,50-,51-,52-,53-,54-
    +VDD_PLL
    CLOCK 1 L17 2
    CLK_R_DREF 15- AK30 PCIE_REFCLKP BLM11A121S 1 1 C7050

    2 1
    CLK_R_DREF# 15- AK32
    PCIE_REFCLKN C257
    C7048 0.1uF_10V
    10uF_6.3v 2 1uF_6.3v 2
    CALIBRATION
    Y22 R208 1.27K_1% +VPCIE +VPCIE
    PCIE_CALRP 1 2
    9-,50-,51- 9-,50-,51- U511-3
    N10 AA22 R207 2K_1% DDC/AUX
    1 L6 2
    NC_PWRGOOD PCIE_CALRN 1 2 +VDD_CPLL
    DDC1CLK AE6 29- CRT_DDCCLK
    PLL/CLOCK AE5 29-
    BLM18BB100SN1D 1 1 DDC1DATA CRT_DDCDATA

    2 1
    PCIE_RST# 33- AL27 C7041 AF14
    PERSTB
    C7039 C256 DPLL_PVDD
    2 1uF_6.3v 0.1uF_16v 2 AE14 DPLL_PVSS AUX1P AD2
    ATI_M92_S2_BGA_631P 10uF_6.3v AUX1N
    AD4
    AD14 DPLL_VDDC DDC2CLK AC11 TP59
    C302 AC13 TP60
    DDC2DATA
    18pF_50v
    +V3S AM28 XTALIN AUX2P AD13
    AK28 AD11

    1
    XTALOUT AUX2N
    2 1

    1
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,51-
    X500 R9659 AE16
    DDCCLK_AUX5P
    27MHZ 1M_5% AD16
    1 C7152 DDCDATA_AUX5N

    2
    2
    2 0.1uF_16v AC1
    2 1 DDC6CLK
    GPU_THERMDA 50- T4 AC3
    C7151 DPLUS
    THERMAL DDC6DATA
    GPU_THERMDC 50- T2
    1000pF_50v U7006 +V1.8S DMINUS
    C303 DDCCLK_AUX3P AD20
    15-,19-,26-,27-,32- 13-,48-,49-,50-,51-,52-,53-,54-
    1
    VDD SMCLK
    8 ICH_3S_SMCLK DDCDATA_AUX3N AC20
    1 2 18pF_50v R5
    1 L542 2
    TS_FDO
    50- 2 7 15-,19-,26-,27-,32-
    GPU_THERMDA DP SMDATA ICH_3S_SMDATA AD17
    TSVDD NC#1
    AB22
    BLM11A121S AC17 AC22
    1 C9389 TSVSS NC#2

    2 1
    50- 3 6 1 R9742 2 49-
    GPU_THERMDC DN ALERT OTEMP# C9390
    0_5%_OPEN
    20.1uF_16v ATI_M92_S2_BGA_631P
    4
    THERM GND
    5 1 2 19-,32-,33- THERM_SCI# 1uF_6.3v
    PWR_GOOD_3 11-,14- 1 2
    SMSC_EMC1402_2_ACZL_MSOP_8P
    R9743
    0_5%
    INVENTEC
    R9741 TITLE
    0_5% VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 50 OF 54
    +V1.8S
    U511-5 +V1.8S
    13-,48-,49-,50-,51-,52-,53-,54-
    MEM I/O PCIE 13-,48-,49-,50-,51-,52-,53-,54-
    H13 AB23 1 R9740 2
    VDDR1#1 PCIE_VDDR#1
    H16 AC23
    1 C640 1 C598 1 C157 1 C599 VDDR1#2 PCIE_VDDR#2 0_5%
    H19 VDDR1#3 PCIE_VDDR#3 AD24
    2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v 2 10uF_6.3v J10 VDDR1#4 PCIE_VDDR#4 AE24
    J23 VDDR1#5 PCIE_VDDR#5 AE25
    J24 AE26
    VDDR1#6 PCIE_VDDR#6
    J9 VDDR1#7 PCIE_VDDR#7 AF25
    K10 AG26 +VPCIE
    1 C639 1 C597 1 C594 1 C638 K23
    VDDR1#8 PCIE_VDDR#8
    VDDR1#9 L8
    2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v K24
    K9
    VDDR1#10
    L23
    BLM18PG121SN1 9-,50-
    VDDR1#11 PCIE_VDDC#1
    1 2
    L11 L24
    L12
    VDDR1#12 PCIE_VDDC#2
    L25
    1 C279 1 C202 1 C242 1 C241 1 C201 1 C277
    VDDR1#13 PCIE_VDDC#3
    1 C637 1 C591 1 C210 1 C205
    L13 VDDR1#14 PCIE_VDDC#4 L26 2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 0.1uF_16v
    L20 M22
    VDDR1#15 PCIE_VDDC#5
    2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v L21 VDDR1#16 PCIE_VDDC#6 N22
    L22 VDDR1#17 PCIE_VDDC#7 N23
    N24
    PCIE_VDDC#8
    PCIE_VDDC#9 R22
    +V1.8S LEVEL PCIE_VDDC#10 T22
    TRANSLATION U22
    PCIE_VDDC#11 +VDD_CORE
    13-,48-,49-,50-,51-,52-,53-,54- V22
    PCIE_VDDC#12
    1 2 AA20 VDD_CT#1 9-,51-
    L18 C293 AA21
    BLM11A121S 1 1 C259 1 C258 AB20
    VDD_CT#2
    AA15
    VDD_CT#3 CORE VDDC#1
    AB21 N15
    2 10uF_6.3v 2 0.1uF_16v 2 1uF_6.3v VDD_CT#4 VDDC#2
    N17
    1 C286 1 C209 1 C254 1 C246 1 C245 1 C203 1 C244
    VDDC#3
    M92-S2 VDDC#4 R13 2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v
    +V3S_DELY

    POWER
    R16
    VDDC#5
    49-,51- AA17 R18
    VDDR3#1 I/O VDDC#6
    AA18 VDDR3#2 VDDC#7 R21
    AB17 T12
    1 C287 1 C247 1 C255 AB18
    VDDR3#3 VDDC#8
    T15
    1 C284 1 C252 1 C253 1 C249 1 C251 1 C207 1 C250
    VDDR3#4 VDDC#9
    2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v VDDC#10 T17 2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v
    V12 T20
    VDDR5 VDDC#11
    Y12 VDDR4#2 VDDC#12 U13
    U12 VDDR5 VDDC#13 U16
    U18
    +V1.8S AA11
    VDDC#14
    U21
    1 C283 1 C683 1 C685 1 C682 1 C684 1 C243
    VDDR4 VDDC#15
    13-,48-,49-,50-,51-,52-,53-,54- Y11 V15
    VDDR4 VDDC#16 2 10uF_6.3v 2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v
    VDDC#17 V17
    V11 V20
    1 C662 1 C660 1 C661 1 C659 U11
    VDDR5 VDDC#18
    V21
    VDDR5 VDDC#19
    2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 0.1uF_16v VDDC#20 Y13
    VDDC#21 Y16
    Y18
    +V1.8S VDDC#22
    Y21
    MEM CLK VDDC#23
    13-,48-,49-,50-,51-,52-,53-,54-
    1 2 L17
    VDDRHA
    L3
    BLM11A121S 1 C148 1 C154 1 C155 L16
    ISOLATED
    VSSRHA CORE I/O
    2 10uF_6.3v 2 0.1uF_16v 2 1uF_6.3v +VDD_CORE
    M13
    +V1.8S PLL VDDCI#1
    M15
    VDDCI#2 L5 9-,51-
    13-,48-,49-,50-,51-,52-,53-,54- AM30 M16
    PCIE_PVDD VDDCI#3 BLM11A121S
    M17
    1 L512 2 +VDD_PCIE VDDCI#4
    M18 1 2

    TP63
    VDDCI#5 1 C211 1 C208 1 C206 1 C204
    BLM11A121S 1 C7047 L8
    NC_MPV18 VDDCI#6
    M20
    1 C677
    2 1

    VDDCI#7 M21 2 10uF_6.3v 2 1uF_6.3v 2 1uF_6.3v 2 1uF_6.3v


    C7042 N20
    10uF_6.3v 2 1uF_6.3v 2 0.1uF_16v
    TP64 H7
    VDDCI#8
    NC_SPV18

    H8 SPV10
    +VDD_CORE
    9-,51- J7 SPVSS
    L543 +VDD_MPLL
    1 2
    BLM11A121S +VDD_CORE
    C9394 1 1 1 C9396 BACK BIAS
    C9391 1uF_6.3v 9-,51-
    2 M11
    10uF_6.3v 2 2 0.1uF_10V BBP#1
    M12 BBP#2

    ATI_M92_S2_BGA_631P
    +V3S +V3S_DELY
    11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,43-,45-,46-,47-,48-,50- 49-,51-

    2 3
    D
    S

    1 Q2020
    G

    R9739 BSS84_3P
    1
    100K_5%
    +V1.8S 2

    13-,48-,49-,50-,51-,52-,53-,54-
    D
    3
    1 R9738 2 1G Q2021
    20K_5% 1 C7114
    2 0.1uF_16v
    S
    2
    SSM3K7002F
    INVENTEC
    TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 51 OF 54
    VM_R_ADA(63:0) 53-,54- U511-8 53-,54- VM_R_AA(12:0)
    VM_R_ADA(0) K27 DQA_0 MAA_0 K17 VM_R_AA(0)
    VM_R_ADA(1) J29 DQA_1 MAA_1 J20 VM_R_AA(1)
    VM_R_ADA(2) H30
    DQA_2 MAA_2
    H23 VM_R_AA(2)
    VM_R_ADA(3) H32 DQA_3 MAA_3 G23 VM_R_AA(3)
    VM_R_ADA(4) G29 DQA_4 MAA_4 G24 VM_R_AA(4)
    VM_R_ADA(5) F28 H24 VM_R_AA(5) U511-4
    DQA_5 MAA_5
    VM_R_ADA(6) F32 DQA_6 MAA_6 J19 VM_R_AA(6) AA27 PCIE_VSS#1 GND#1 A3
    VM_R_ADA(7) F30 DQA_7 MAA_7 K19 VM_R_AA(7) AB24 PCIE_VSS#2 GND#2 A30
    VM_R_ADA(8) C30
    DQA_8 MAA_8
    J14 VM_R_AA(8) AB32
    PCIE_VSS#3 GND#3
    AA13
    VM_R_ADA(9) F27 DQA_9 MAA_9 K14 VM_R_AA(9) AC24 PCIE_VSS#4 GND#4 AA16
    VM_R_ADA(10) A28 DQA_10 MAA_10 J11 VM_R_AA(10) AC26 PCIE_VSS#5 GND#5 AB10
    VM_R_ADA(11) C28 DQA_11 MAA_11 J13 VM_R_AA(11) AC27 PCIE_VSS#6 GND#6 AB15
    VM_R_ADA(12) E27 DQA_12 MAA_12 H11 VM_R_AA(12) AD25 PCIE_VSS#7 GND#7 AB6
    VM_R_ADA(13) G26 G11 53-,54- AD32 AC9
    DQA_13 MAA_13_BA2 VM_R_A_BA2 PCIE_VSS#8 GND#8
    VM_R_ADA(14) D26 DQA_14 MAA_14_BA0 J16 53-,54- VM_R_A_BA0 AE27 PCIE_VSS#9 GND#9 AD6
    VM_R_ADA(15) F25 DQA_15 MAA_15_BA1 L15 53-,54- VM_R_A_BA1 AF32 PCIE_VSS#10 GND#10 AD8
    VM_R_ADA(16) A25
    DQA_16
    AG27
    PCIE_VSS#11 GND#11
    AE7
    VM_R_ADA(17) C25 DQA_17 DQMA_0 E32 53- VM_R_ADQM#(0) AH32 PCIE_VSS#12 GND#12 AG12
    VM_R_ADA(18) E25 E30 53-
    VM_R_ADQM#(1) K28 AH10

    MEMORY INTERFACE
    DQA_18 DQMA_1 PCIE_VSS#13 GND#13
    VM_R_ADA(19) D24
    DQA_19 DQMA_2
    A21 53-
    VM_R_ADQM#(2) K32
    PCIE_VSS#14 GND#14
    AH28
    VM_R_ADA(20) E23 DQA_20 DQMA_3 C21 53- VM_R_ADQM#(3) L27 PCIE_VSS#15 GND#15 B10
    VM_R_ADA(21) F23 DQA_21 DQMA_4 E13 54-
    VM_R_ADQM#(4) M32 PCIE_VSS#16 GND#16 B12
    VM_R_ADA(22) D22 D12 54- N25 B14
    DQA_22 DQMA_5 VM_R_ADQM#(5) PCIE_VSS#17 GND#17
    VM_R_ADA(23) F21 DQA_23 DQMA_6 E3 54- VM_R_ADQM#(6) N27 PCIE_VSS#18 GND#18 B16
    VM_R_ADA(24) E21 DQA_24 DQMA_7 F4 54-
    VM_R_ADQM#(7) P25 PCIE_VSS#19 GND#19 B18
    VM_R_ADA(25) D20
    DQA_25
    P32
    PCIE_VSS#20 GND#20
    B20
    VM_R_ADA(26) F19 DQA_26 RDQSA_0 H28 53- VM_R_ADQSA(0) R27 PCIE_VSS#21 GND#21 B22
    VM_R_ADA(27) A19 DQA_27 RDQSA_1 C27 53-
    VM_R_ADQSA(1) T25 PCIE_VSS#22 GND#22 B24
    VM_R_ADA(28) D18 A23 53- T32 B26
    DQA_28 RDQSA_2 VM_R_ADQSA(2) PCIE_VSS#23 GND#23
    VM_R_ADA(29) F17 DQA_29 RDQSA_3 E19 53- VM_R_ADQSA(3) U25 PCIE_VSS#24 GND#24 B6
    VM_R_ADA(30) A17 DQA_30 RDQSA_4 E15 54-
    VM_R_ADQSA(4) U27 PCIE_VSS#25 GND#25 B8
    VM_R_ADA(31) C17 DQA_31 RDQSA_5 D10 54- VM_R_ADQSA(5) V32 PCIE_VSS#26 GND#26 C1
    VM_R_ADA(32) E17 DQA_32 RDQSA_6 D6 54- VM_R_ADQSA(6) W25 PCIE_VSS#27 GND#27 C32
    VM_R_ADA(33) D16
    DQA_33 RDQSA_7
    G5 54-
    VM_R_ADQSA(7) W26
    PCIE_VSS#28 GND#28
    E28
    VM_R_ADA(34) F15 DQA_34 W27 PCIE_VSS#29 GND#29 F10
    VM_R_ADA(35) A15 DQA_35 WDQSA_0 H27 53- VM_R_ADQSA#(0) Y25 PCIE_VSS#30 GND#30 F12
    VM_R_ADA(36) D14
    DQA_36 WDQSA_1
    A27 53-
    VM_R_ADQSA#(1) Y32
    PCIE_VSS#31 GND#31
    F14
    VM_R_ADA(37) F13 DQA_37 WDQSA_2 C23 53- VM_R_ADQSA#(2) GND#32 F16
    VM_R_ADA(38) A13 DQA_38 WDQSA_3 C19 53-
    VM_R_ADQSA#(3) GND#33 F18
    VM_R_ADA(39) C13
    DQA_39 WDQSA_4
    C15 54-
    VM_R_ADQSA#(4) GND#34
    F2
    VM_R_ADA(40) E11 DQA_40 WDQSA_5 E9 54- VM_R_ADQSA#(5) GND#35 F20
    VM_R_ADA(41) A11 DQA_41 WDQSA_6 C5 54-
    VM_R_ADQSA#(6) M6 GND#56 GND#36 F22
    VM_R_ADA(42) C11 H4 54- N11 F24
    DQA_42 WDQSA_7 VM_R_ADQSA#(7) GND#57 GND#37
    VM_R_ADA(43) F11 DQA_43 N12 GND#58 GND#38 F26
    VM_R_ADA(44) A9 DQA_44 ODTA0 L18 53-
    VM_R_ODTA0 N13 GND#59 GND#39 F6
    VM_R_ADA(45)
    VM_R_ADA(46)
    C9
    F9
    DQA_45
    DQA_46
    ODTA1
    K16 54-
    VM_R_ODTA1 N16
    N18
    GND#60
    GND#61
    GND GND#40
    GND#41
    F8
    G10
    VM_R_ADA(47) D8 DQA_47 CLKA0 H26 52-,53- DDR_CLKA0 N21 GND#62 GND#42 G27
    VM_R_ADA(48) E7 DQA_48 CLKA0B H25 52-,53- DDR_CLKA0# P6 GND#63 GND#43 G31
    VM_R_ADA(49) A7 DQA_49 P9 GND#64 GND#44 G8
    VM_R_ADA(50) C7 DQA_50 CLKA1 G9 52-,54- DDR_CLKA1 R12 GND#65 GND#45 H14
    VM_R_ADA(51) F7 DQA_51 CLKA1B H9 52-,54- DDR_CLKA1# R15 GND#66 GND#46 H17
    VM_R_ADA(52) A5 DQA_52 R17 GND#67 GND#47 H2
    VM_R_ADA(53) E5
    DQA_53 RASA0B
    G22 53- DDR_RASA0# R20
    GND#68 GND#48
    H20
    VM_R_ADA(54) C3 DQA_54 RASA1B G17 54- DDR_RASA1# T13 GND#69 GND#49 H6
    VM_R_ADA(55) E1 DQA_55 T16 GND#70 GND#50 J27
    VM_R_ADA(56) G7 G19 53- DDR_CASA0# T18 J31
    +V1.8S DQA_56 CASA0B GND#71 GND#51
    VM_R_ADA(57) G6 DQA_57 CASA1B G16 54- DDR_CASA1# T21 GND#72 GND#52 K11
    13-,48-,49-,50-,51-,52-,53-,54- VM_R_ADA(58) G1 DQA_58 T6 GND#73 GND#53 K2
    VM_R_ADA(59) G3
    DQA_59 CSA0B_0
    H22 53- DDR_CSA0_0# U15
    GND#74 GND#54
    K22
    VM_R_ADA(60) J6 DQA_60 CSA0B_1 J22 U17 GND#75 GND#55 K6
    1 R579 VM_R_ADA(61) J1 U20
    DQA_61 GND#76
    100_1% VM_R_ADA(62) J3
    DQA_62 CSA1B_0
    G13 54- DDR_CSA1_0# U3
    GND#77
    VM_R_ADA(63) J5 DQA_63 CSA1B_1 K13 U9 GND#78
    2 V13 GND#79
    K26 K20 53- DDR_CKEA0 V16
    MVREFDA CKEA0 GND#80
    J26 MVREFSA CKEA1 J17 54- DDR_CKEA1 V18 GND#81
    1 R578 V6
    C593 GND#82
    100_1% 1 J25 G25 53- Y10 A32
    NC_MEM_CALRN0 WEA0B DDR_WEA0# GND#83 VSS_MECH#1
    13-,48-,49-,50-,51-,52-,53-,54- K7 H10 54- Y15 AM1
    2 0.1uF_16v R19 NC_MEM_CALRN1 WEA1B DDR_WEA1# GND#84 VSS_MECH#2
    2 243_1% Y17 AM32
    +V1.8S 1 2
    GND#85 VSS_MECH#3
    J8 MEM_CALRP1 RSVD#1 AB16 Y20 GND#86
    K25 G14 Y6
    +V1.8S NC_MEM_CALRP0 RSVD#2
    G20
    GND#87
    R183 RSVD#3
    13-,48-,49-,50-,51-,52-,53-,54- 2 1 TP56 L10 ATI_M92_S2_BGA_631P
    DRAM_RST
    1 R576 4.7K_5%
    K8
    CLKTESTA
    100_1% L7 CLKTESTB

    2 ATI_M92_S2_BGA_631P
    1 1
    R181
    1 R577 4.7K_5%
    C592
    100_1% 1 2 2
    2 0.1uF_16v
    2 R182
    4.7K_5%

    52-,54- 1
    R565 2 1
    R568 2 52-,54- 52-,53- 1
    R559 2 1
    R542 2 52-,53-
    DDR_CLKA1 DDR_CLKA1# DDR_CLKA0 DDR_CLKA0#
    56_5% 56_5% 56_5% 56_5%
    1 1
    C570 C538
    2 470pF_50v 2 470pF_50v

    INVENTEC
    TITLE
    Layou Note: Put these resisters close to V-RAM.
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 52 OF 54
    +V1.8S +V1.8S
    U7 13-,48-,49-,50-,51-,52-,53-,54- U507 13-,48-,49-,50-,51-,52-,53-,54-
    VM_R_ADA(8) 52- G8 A1 VM_R_ADA(30) 52- G8 A1
    LDQ0 VDD LDQ0 VDD
    VM_R_ADA(9) 52- G2 E1 VM_R_ADA(25) 52- G2 E1
    LDQ1 VDD LDQ1 VDD
    VM_R_ADA(14) 52- H7 J9 VM_R_ADA(29) 52- H7 J9
    LDQ2 VDD LDQ2 VDD
    VM_R_ADA(12) 52- H3 M9 VM_R_ADA(27) 52- H3 M9
    LDQ3 VDD LDQ3 VDD
    VM_R_ADA(15) 52- H1 R1 VM_R_ADA(26) 52- H1 R1
    LDQ4 VDD LDQ4 VDD
    VM_R_ADA(11) 52- H9 VM_R_ADA(31) 52- H9
    LDQ5 LDQ5
    VM_R_ADA(13) 52- F1 VM_R_ADA(24) 52- F1
    52- F9
    LDQ6
    A3
    +V1.8S 52- F9
    LDQ6
    A3
    +V1.8S
    VM_R_ADA(10) LDQ7 VSS VM_R_ADA(28) LDQ7 VSS
    VM_R_ADA(16) 52- C8 E3 13-,48-,49-,50-,51-,52-,53-,54- VM_R_ADA(1) 52- C8 E3 13-,48-,49-,50-,51-,52-,53-,54-
    UDQ0 VSS UDQ0 VSS
    VM_R_ADA(22) 52- C2 J3 VM_R_ADA(4) 52- C2 J3
    UDQ1 VSS 1 R560 UDQ1 VSS 1 R564
    VM_R_ADA(17) 52- D7 N1 VM_R_ADA(2) 52- D7 N1
    UDQ2 VSS UDQ2 VSS
    VM_R_ADA(20) 52- D3 P9 4.99K_1% VM_R_ADA(7) 52- D3 P9 4.99K_1%
    UDQ3 VSS UDQ3 VSS
    VM_R_ADA(23) 52- D1 VM_R_ADA(3) 52- D1
    UDQ4 UDQ4
    VM_R_ADA(18) 52- D9 2 VM_R_ADA(5) 52- D9 2
    UDQ5 UDQ5
    52- B1 J2 +VREF_VRAM1 52- B1 J2 +VREF_VRAM2
    VM_R_ADA(21) UDQ6 VREF VM_R_ADA(6) UDQ6 VREF
    VM_R_ADA(19) 52- B9 VM_R_ADA(0) 52- B9
    UDQ7 1 UDQ7 1
    52- F7 A2
    1 C561 R558 52- F7 A2
    1 C564 R562
    VM_R_ADQSA(1) LDQS NC VM_R_ADQSA(3) LDQS NC
    VM_R_ADQSA#(1) 52- E8
    LDQS#
    E2 2 0.1uF_16v 4.99K_1% VM_R_ADQSA#(3) 52- E8
    LDQS#
    E2 2 0.1uF_16v 4.99K_1%
    NC NC
    VM_R_ADQSA(2) 52- B7 L1 52-,53-,54- VM_R_A_BA2 2 VM_R_ADQSA(0) 52- B7 L1 52-,53-,54- VM_R_A_BA2 2
    UDQS NC UDQS NC
    VM_R_ADQSA#(2) 52- A8 R3 VM_R_ADQSA#(0) 52- A8 R3
    UDQS# NC UDQS# NC
    R7 R7
    NC NC
    VM_R_ADQM#(1) 52- F3 R8 VM_R_ADQM#(3) 52- F3 R8
    52- B3
    LDM NC +V1.8S 52- B3
    LDM NC +V1.8S
    VM_R_ADQM#(2) UDM 13-,48-,49-,50-,51-,52-,53-,54- VM_R_ADQM#(0) UDM 13-,48-,49-,50-,51-,52-,53-,54-
    L1
    DDR_CSA0_0# 52-,53- L8
    CS# VDDL
    J1 1 2 DDR_CSA0_0# 52-,53- L8
    CS# VDDL
    J1 1 L504 2
    52-,53- K7 J7
    1 1 BLM11A221S 52-,53- K7 J7
    1 1 BLM11A221S
    DDR_RASA0# RAS# VSSDL C542 C543 DDR_RASA0# RAS# VSSDL C563 C565
    DDR_CASA0# 52-,53- L7 2 0.1uF_16v 2 1uF_6.3v DDR_CASA0# 52-,53- L7 2 0.1uF_16v 2 1uF_6.3v
    CAS# CAS#
    DDR_WEA0# 52-,53- K3 DDR_WEA0# 52-,53- K3
    WE# WE#
    DDR_CKEA0 52-,53- K2 A9 DDR_CKEA0 52-,53- K2 A9
    CKE VDDQ CKE VDDQ
    VM_R_ODTA0 52-,53- K9 C1 VM_R_ODTA0 52-,53- K9 C1
    ODT VDDQ ODT VDDQ
    VM_R_AA(12:0) 52-,53-,54- C3 VM_R_AA(12:0) 52-,53-,54- C3
    VM_R_AA(0) M8
    VDDQ
    C7 +V1.8S VM_R_AA(0) M8
    VDDQ
    C7 +V1.8S
    VM_R_AA(1) M3
    A0 VDDQ
    C9 13-,48-,49-,50-,51-,52-,53-,54- VM_R_AA(1) M3
    A0 VDDQ
    C9 13-,48-,49-,50-,51-,52-,53-,54-
    A1 VDDQ A1 VDDQ
    VM_R_AA(2) M7
    A2 VDDQ
    E9 VM_R_AA(2) M7
    A2 VDDQ
    E9
    VM_R_AA(3) N2
    A3 VDDQ
    G1 VM_R_AA(3) N2
    A3 VDDQ
    G1
    VM_R_AA(4) N8
    A4 VDDQ
    G3 VM_R_AA(4) N8
    A4 VDDQ
    G3
    VM_R_AA(5) N3
    A5 VDDQ
    G7 VM_R_AA(5) N3
    A5 VDDQ
    G7
    VM_R_AA(6) N7
    A6 VDDQ
    G9 VM_R_AA(6) N7
    A6 VDDQ
    G9
    VM_R_AA(7) P2
    A7
    VM_R_AA(7) P2
    A7
    VM_R_AA(8) P8
    A8
    VM_R_AA(8) P8
    A8
    VM_R_AA(9) P3
    A9 VSSQ
    A7 VM_R_AA(9) P3
    A9 VSSQ
    A7
    VM_R_AA(10) M2
    A10 VSSQ
    B2 VM_R_AA(10) M2
    A10 VSSQ
    B2
    VM_R_AA(11) P7
    A11 VSSQ
    B8 VM_R_AA(11) P7
    A11 VSSQ
    B8
    VM_R_AA(12) R2
    A12 VSSQ
    D2 VM_R_AA(12) R2
    A12 VSSQ
    D2
    D8 D8
    VSSQ VSSQ
    VM_R_A_BA0 52-,53-,54- L2 E7 VM_R_A_BA0 52-,53-,54- L2 E7
    BA0 VSSQ BA0 VSSQ
    VM_R_A_BA1 52-,53-,54- L3 F2 VM_R_A_BA1 52-,53-,54- L3 F2
    BA1 VSSQ BA1 VSSQ
    F8 F8
    VSSQ VSSQ
    DDR_CLKA0 52-,53- J8 H2 DDR_CLKA0 52-,53- J8 H2
    CK VSSQ CK VSSQ
    DDR_CLKA0# 52-,53- K8 H8 DDR_CLKA0# 52-,53- K8 H8
    CK# VSSQ CK# VSSQ

    INF_HYB18T256161BF_TFBGA_84P INF_HYB18T256161BF_TFBGA_84P

    +V1.8S +V1.8S
    13-,48-,49-,50-,51-,52-,53-,54- 13-,48-,49-,50-,51-,52-,53-,54-

    1 C589 1 C544 1 C151 1 C590 1 C114 1 C113 1 C562 1 C101 1 C541 1 C540 1 C103 1 C98 1 C99 1 C100 1 C539 1 C102
    2 0.1uF_16v 2 0.01uF_16v 2 10uF_6.3v 2 0.1uF_16v 2 1uF_6.3v 2 0.1uF_16v 2 0.1uF_16v 2 10uF_6.3v 2 0.1uF_16v 2 0.01uF_16v 2 10uF_6.3v 2 0.1uF_16v 2 1uF_6.3v 2 0.1uF_16v 2 0.01uF_16v 2 10uF_6.3v

    INVENTEC
    TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 53 OF 54
    +V1.8S +V1.8S
    U508 13-,48-,49-,50-,51-,52-,53-,54- U8 13-,48-,49-,50-,51-,52-,53-,54-
    VM_R_ADA(38) 52- G8 A1 VM_R_ADA(56) 52- G8 A1
    LDQ0 VDD LDQ0 VDD
    VM_R_ADA(35) 52- G2 E1 VM_R_ADA(58) 52- G2 E1
    LDQ1 VDD LDQ1 VDD
    VM_R_ADA(36) 52- H7 J9 VM_R_ADA(63) 52- H7 J9
    LDQ2 VDD LDQ2 VDD
    VM_R_ADA(32) 52- H3 M9 VM_R_ADA(62) 52- H3 M9
    LDQ3 VDD LDQ3 VDD
    VM_R_ADA(34) 52- H1 R1 VM_R_ADA(61) 52- H1 R1
    LDQ4 VDD LDQ4 VDD
    VM_R_ADA(37) 52- H9 VM_R_ADA(60) 52- H9
    LDQ5 LDQ5
    VM_R_ADA(33) 52- F1 VM_R_ADA(59) 52- F1
    52- F9
    LDQ6
    A3
    +V1.8S 52- F9
    LDQ6
    A3
    +V1.8S
    VM_R_ADA(39) LDQ7 VSS VM_R_ADA(57) LDQ7 VSS
    VM_R_ADA(53) 52- C8 E3 13-,48-,49-,50-,51-,52-,53-,54- VM_R_ADA(40) 52- C8 E3 13-,48-,49-,50-,51-,52-,53-,54-
    UDQ0 VSS UDQ0 VSS
    VM_R_ADA(50) 52- C2 J3 VM_R_ADA(45) 52- C2 J3
    UDQ1 VSS 1 R567 UDQ1 VSS 1 R561
    VM_R_ADA(55) 52- D7 N1 VM_R_ADA(43) 52- D7 N1
    UDQ2 VSS UDQ2 VSS
    52- D3 P9 4.99K_1% 52- D3 P9 4.99K_1%
    VM_R_ADA(51) UDQ3 VSS VM_R_ADA(44) UDQ3 VSS
    VM_R_ADA(48) 52- D1 VM_R_ADA(47) 52- D1
    UDQ4 UDQ4
    VM_R_ADA(54) 52- D9 2 VM_R_ADA(41) 52- D9 2
    UDQ5 UDQ5
    VM_R_ADA(49) 52- B1
    UDQ6 VREF
    J2 +VREF_VRAM3 VM_R_ADA(46) 52- B1
    UDQ6 VREF
    J2 +VREF_VRAM4
    VM_R_ADA(52) 52- B9 VM_R_ADA(42) 52- B9
    UDQ7 1 R566 UDQ7 1 R563
    C566
    52- F7 A2
    1 C568 4.99K_1% 52- F7 A2
    1 4.99K_1%
    VM_R_ADQSA(4) LDQS NC VM_R_ADQSA(7) LDQS NC
    VM_R_ADQSA#(4) 52- E8 E2 2 0.1uF_16v VM_R_ADQSA#(7) 52- E8 E2 2
    LDQS# NC LDQS# NC
    VM_R_ADQSA(6) 52- B7
    UDQS
    L1 52-,53-,54- VM_R_A_BA2 2 VM_R_ADQSA(5) 52- B7
    UDQS
    L1 52-,53-,54- VM_R_A_BA2 0.1uF_16v 2
    NC NC
    VM_R_ADQSA#(6) 52- A8 R3 VM_R_ADQSA#(5) 52- A8 R3
    UDQS# NC UDQS# NC
    R7 R7
    NC NC
    VM_R_ADQM#(4) 52- F3 R8 VM_R_ADQM#(7) 52- F3 R8
    52- B3
    LDM NC +V1.8S 52- B3
    LDM NC +V1.8S
    VM_R_ADQM#(6) UDM VM_R_ADQM#(5) UDM
    L2 13-,48-,49-,50-,51-,52-,53-,54- L507 13-,48-,49-,50-,51-,52-,53-,54-
    DDR_CSA1_0# 52-,54- L8
    CS# VDDL
    J1 1 2 DDR_CSA1_0# 52-,54- L8
    CS# VDDL
    J1 1 2
    52-,54- K7 J7
    1 1 52-,54- K7 J7
    1 1
    DDR_RASA1# RAS# VSSDL C115 C116 BLM11A221S DDR_RASA1# RAS# VSSDL C596 C595 BLM11A221S
    DDR_CASA1# 52-,54- L7 2 0.1uF_16v 2 1uF_6.3v DDR_CASA1# 52-,54- L7 2 0.1uF_16v 2 1uF_6.3v
    CAS# CAS#
    DDR_WEA1# 52-,54- K3 DDR_WEA1# 52-,54- K3
    WE# WE#
    DDR_CKEA1 52-,54- K2 A9 DDR_CKEA1 52-,54- K2 A9
    CKE VDDQ CKE VDDQ
    VM_R_ODTA1 52-,54- K9 C1 VM_R_ODTA1 52-,54- K9 C1
    ODT VDDQ ODT VDDQ
    VM_R_AA(12:0) 52-,53-,54- C3 VM_R_AA(12:0) 52-,53-,54- C3
    VDDQ VDDQ
    VM_R_AA(0) M8
    A0 VDDQ
    C7 +V1.8S VM_R_AA(0) M8
    A0 VDDQ
    C7 +V1.8S
    VM_R_AA(1) M3 C9 13-,48-,49-,50-,51-,52-,53-,54- VM_R_AA(1) M3 C9 13-,48-,49-,50-,51-,52-,53-,54-
    A1 VDDQ A1 VDDQ
    VM_R_AA(2) M7
    A2 VDDQ
    E9 VM_R_AA(2) M7
    A2 VDDQ
    E9
    VM_R_AA(3) N2
    A3 VDDQ
    G1 VM_R_AA(3) N2
    A3 VDDQ
    G1
    VM_R_AA(4) N8 G3 VM_R_AA(4) N8 G3
    A4 VDDQ A4 VDDQ
    VM_R_AA(5) N3
    A5 VDDQ
    G7 VM_R_AA(5) N3
    A5 VDDQ
    G7
    VM_R_AA(6) N7
    A6 VDDQ
    G9 VM_R_AA(6) N7
    A6 VDDQ
    G9
    VM_R_AA(7) P2 VM_R_AA(7) P2
    A7 A7
    VM_R_AA(8) P8
    A8
    VM_R_AA(8) P8
    A8
    VM_R_AA(9) P3
    A9 VSSQ
    A7 VM_R_AA(9) P3
    A9 VSSQ
    A7
    VM_R_AA(10) M2
    A10 VSSQ
    B2 VM_R_AA(10) M2
    A10 VSSQ
    B2
    VM_R_AA(11) P7
    A11 VSSQ
    B8 VM_R_AA(11) P7
    A11 VSSQ
    B8
    VM_R_AA(12) R2
    A12 VSSQ
    D2 VM_R_AA(12) R2
    A12 VSSQ
    D2
    D8 D8
    VSSQ VSSQ
    VM_R_A_BA0 52-,53-,54- L2 E7 VM_R_A_BA0 52-,53-,54- L2 E7
    BA0 VSSQ BA0 VSSQ
    VM_R_A_BA1 52-,53-,54- L3 F2 VM_R_A_BA1 52-,53-,54- L3 F2
    BA1 VSSQ BA1 VSSQ
    F8 F8
    VSSQ VSSQ
    DDR_CLKA1 52-,54- J8 H2 DDR_CLKA1 52-,54- J8 H2
    CK VSSQ CK VSSQ
    DDR_CLKA1# 52-,54- K8 H8 DDR_CLKA1# 52-,54- K8 H8
    CK# VSSQ CK# VSSQ

    INF_HYB18T256161BF_TFBGA_84P INF_HYB18T256161BF_TFBGA_84P

    +V1.8S
    +V1.8S
    13-,48-,49-,50-,51-,52-,53-,54-
    13-,48-,49-,50-,51-,52-,53-,54-

    1 C106 1 C569 1 C104 1 C547 1 C118 1 C117 1 C567 1 C105


    1 C160 1 C159 1 C545 1 C600 1 C601 1 C158 1 C602 1 C546
    2 0.1uF_16v 2 0.01uF_16v 2 10uF_6.3v 2 0.1uF_16v 2 1uF_6.3v 2 0.1uF_16v 2 0.01uF_16v 2 10uF_6.3v
    2 0.1uF_16v 2 0.01uF_16v 2 10uF_6.3v 2 0.1uF_16v 2 1uF_6.3v 2 0.1uF_16v 2 0.1uF_16v 2 10uF_6.3v

    INVENTEC
    TITLE
    VV Discrete
    SIZE CODE DOC. NUMBER REV
    A3 CS 1310A22294-0-MTR A01
    CHANGE by Chang, Roger 4-Sep-2008 SHEET 54 OF 54

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