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fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 1

A Single-Objective Predictive Control Method for a

Multi-Variable Single-Phase Three-Level NPC
Converter-Based Active Power Filter
Pablo Acuña, Member, IEEE, Luis Morán, Fellow, IEEE, Marco Rivera, Member, IEEE, Ricardo Aguilera,
Member, IEEE, Rolando Burgos, Member, IEEE, and Vassilios G. Agelidis, Senior, IEEE

Abstract—A single-objective predictive control method that
deals with four main control objectives applied to a multi-
variable single-phase three-level neutral-point-clamped (NPC)
converter operating as an active power filter (APF) is proposed
in this paper. The four control objectives are: to self-support
the dc-bus voltage under load variations, to compensate the
reactive power and the current harmonics, and to balance
the dc capacitor voltages by using a predefined combination
of the redundant switching states of the converter. The main
contribution of the proposed method is that these objectives are
accomplished without using weighting factors in the cost function,
which eliminates problems such as multi-objective optimization
or additional empirical procedures for determination of these
factors. As a result, the method is easy to implement and
rapidly selects the optimal voltage to improve the dynamic-
state performance. Experimental results from a 2 kVA prototype
are presented to prove that the method is valid for single-
phase compensation. The well-known effect of model parameter
errors issue, which is inherent in predictive control methods, is
also tested to confirm that the harmonic distortion in the grid
current is below 5% even when the predictive model has a 25%
error between actual and theoretically estimated grid impedance
values.
Index Terms—Multilevel systems, predictive models, control
design, predictive control, converters, DC-AC power converters,
power conversion harmonics, pulse width modulation converters,
high-voltage techniques, power distribution, smart grids, power
quality, power harmonic filters, reactive power.
I. I NTRODUCTION
The term “Finite Control Set Model Predictive Control”
(FCS-MPC) in power electronics refers to the method of
predicting the control variable behavior of a discrete type
power converter, and then finding the output switching state
that minimizes a cost function [1]–[6]. The dynamic-state
performance of the control variables is improved because
the FCS-MPC selects the optimal output switching state
that ensures almost zero error between the reference and
Manuscript received April 3, 2014; revised April 5, 2014, September 11,
2014 and November 17, 2014; accepted December 15, 2014.
Copyright
c 2014 IEEE. Personal use of this material is permitted. provides a simple method for traditional two-level inverters
However, permission to use this material for any other purposes must be
obtained from the IEEE by sending a request to pubs-permissions@ieee.org.
This research was partially financed by Complex Engineering Systems
Institute (ICM: P-05-004-F, CONICYT: FBO16), Fondecyt 11401419 and
Fondecyt 11121492.
P. Acuña, R. Aguilera and V.G. Agelidis are with the University of New
South Wales, Australia. L. Morán is with the Universidad de Concepción,
Chile. M. Rivera is with the Universidad de Talca, Chile. R. Burgos is with
the Virginia Tech University, USA.
the predicted value at every sampling period. However, in
terms of steady-state performance, the existing pulse-width
modulation (PWM) methods based on PI control offer the
best performance [7]. In essence, FCS-MPC appears to be
an effective control method for improving the dynamic-state
performance of active power filter applications [8]. The imple-
mentation of this method in the technical literature has become
increasingly popular in recent years with the development of
more powerful and faster microprocessors that can perform
hundreds of calculations per microsecond [9]. Despite the
great calculation power of microprocessors, the aim of FCS-
MPC is to simplify the cost function formulation to reduce the
number of calculations per sampling period. This cost function
is given by one or more mathematical expressions to be
minimized. When the cost function has more than one control
objective, weighting factors reflecting the relative importance
of each control variable are introduced. An adequate cost
function that uses weighting factors allows normalization of
different control objectives. However, FCS-MPC often relies
on a non-trivial multi-objective optimization issue to ensure
that each control variable remains equally controlled. Another
aspect in the implementation of FCS-MPC is the need to
evaluate prediction of the control variables using the measured
parameters of the system. This evaluation allows specification
of how accurately the system parameters must be measured
or if an additional online estimation method is required to
improve control tracking performance of the FCS-MPC [10],
[11].
The technical literature indicates that a key issue in the
implementation of FCS-MPC is how the weighting factors
affect the future system behavior to obtain the lowest possible
error in the controlled variables [2], [4], [12]. The process
of tuning suitable weighting factors is another nontrivial
multi-objective optimization problem [9]. Recently, in motor
control applications, a predictive torque and flux control
without weighting factor calculation by using a multi-objective
ranking-based approach has been reported [13]. This approach
that have two or more control objectives to obtain the optimal
output switching state without weighting factor calculations.
In the case of an active power filter (APF) converter,
the situation is no different, because APFs with two-level
converters normally have three control objectives. These ob-
jectives are: to self-support the dc-bus voltage under load
variations, and to compensate the reactive power and current

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 2

Single-Phase Full-Bridge NPC Equivalent Circuit

harmonics. A previous study reported in [8] proposed avoiding P
the use of weighting factors by directly using a traditional
S1 S3
dq-based current reference scheme, where the dc-bus voltage, +
current harmonics and reactive power references are expressed vC1 C1
− Zeq
completely in terms of the converter output current. In this S2 S4 io
case, the cost function is fully dedicated to evaluating the Req Leq
output current prediction error, and therefore good dynamic-
veq
state performance is obtained. As a conclusion, the technical + vf − n
literature presents FCS-MPC methods for reducing the number
+ S1 S3
of calculations per sampling period, which include both with
and without weighting factor calculations. However, no tech- vC2 C2
nical paper thus far has documented the application of FCS- −
S2 S4
MPC without weighting factors to multilevel converters such
N
as the neutral-point clamped (NPC) converter topology. There
are plenty of possible applications of the proposed converter Fig. 1. Circuit diagram of the single-phase full-bridge NPC converter.
and control method as part of the distributed generation infras-
tructure connected to the medium-voltage grid. For instance,
such a converter can be used as a STATCOM and/or APF II. S INGLE - PHASE NPC ACTIVE P OWER F ILTER M ODEL
connected at the point of common coupling (PCC) of a large- Fig. 1 shows the detailed circuit diagram of the single-
scale solar PV farm or even wind farm. phase NPC converter. The converter output voltage vf can
be generated using 16 permitted switching states (j) of each
Despite the fact that there are multilevel converters with
semiconductor Sx , where x = 1, 2, 3, 4. To limit the number of
self-balancing capability [14], the objective of maintaining a
transitions of each semiconductor between consecutive levels
balance between the dc capacitor voltages in a single-phase
of voltage and η transitions in case of nonconsecutive η-levels
NPC converter adds a new control constraint to be used in the
to one, only nine states are selected (j = 0...8), as shown in
cost function [15]. The main contribution of this work is the
Table I. Fig. 2 shows the possible combinations of converter
possibility of self-supporting the dc-bus voltage, controlling
output voltage vectors in order to change vf between the
each dc capacitor voltage and following the compensating
corresponding three voltage levels. Also, a redundant selection
references in a multilevel converter for APF applications,
optimization criterion is proposed. This criterion includes two
without decreasing the dynamic-state performance. Thus, the
pairs of redundant states (0111-0001 and 1101-0100) that can
balance of dc capacitor voltages is not considered in the cost
be used to predict the voltage charging behavior of the dc
function of the predictive controller, and a simple and effective
capacitors C1 and C2 . This behavior is a function of the
traditional dq-based single-phase current reference scheme,
switching states and the corresponding converter output power
which is designed for two-level converters, is applied without
(Pf ).
modification to the three-level converter. This paper presents a
simple and robust single-objective FCS-MPC method applied The output voltage vf of the single-phase converter, mea-
to a multilevel NPC converter that avoids the use of weighting sured from the n point, can be expressed in terms of switching
factors in the FCS-MPC cost function. The method provides
easier implementation, no need for optimization and faster Table I
current tracking capabilities. The main proposal is to minimize S WITCHING S TATES ∗ OF THE S INGLE - PHASE F ULL - BRIDGE NPC
the output current tracking error, while fast evaluation of the C ONVERTER
available converter output voltage, which is a function of the
output switching states, will maintain balance between the dc
Pf ≥ 0 Pf < 0
capacitor voltages. Additionally, the model parameter errors j S1 S2 S3 S4 vf
are also evaluated to show that this control method operates vC1 vC2 vC1 vC2
well in this application, even when the predictive model has 0 1 1 0 0 vC1 + vC2 ↓↓ ↑↑
a significant error in the estimated system parameters. 1 1 1 0 1 vC1 ↓↑ ↑↓
The rest of the paper is structured as follows. Section II 2 0 1 0 0 vC2 ↑↓ ↓↑
presents in detail the NPC APF model. In Sections III and IV, 3 0 1 0 1 0 ↓↓ ↓↓
the traditional FCS-MPC and the proposed single-objective
4 1 1 1 1 0 ↓↓ ↓↓
predictive control methods are explained. Section V details
the adopted dq-based single-phase current reference scheme 5 0 0 0 0 0 ↓↓ ↓↓
for generating the control reference signals. In Section VI 6 0 1 1 1 −vC1 ↑↓ ↓↑
the selected APF and the compensation performance of the 7 0 0 0 1 −vC2 ↓↑ ↑↓
proposed control method are demonstrated through simulation
8 0 0 1 1 −vC1 − vC2 ↑↑ ↓↓
and validated with experimental results obtained from a 2 kVA
lab prototype. Finally, the conclusions are presented in Section ∗
: only selected states, ↑: increase voltage and ↓: decrease
VII. voltage.

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 3

Converter output voltage vector: vf =

output ripple filter impedance parameters are part of the APF
β

2
vC
design and the grid parameters can be replaced by the power

2
vC

vC
−

vC
−

or

or

+
system short circuit equivalent impedance or by applying

0
1

1
vC

vC
vC

vC
a well known online parameter estimation method, such as
−

−
α
recursive least squares and Kalman filter based algorithms
4 [16], [17]. In extreme cases, when parameter variations are
1111 presented, the literature has already revealed that the use of
1 0111 1101 FCS-MPC with an Extended-State Observer is an effective
0011 0101 1100
0001 0100 method to avoid the mismatch issue [11].
0000 Usually, the resistive part of the grid-equivalent impedance
2
3 is neglected and the series grid equivalent reactance is in the
Switching States: (S1 , S2 , S3 , S4 ) range of 3-7% p.u., which is an acceptable approximation of
the real system. Finally, in eq. (4) Req = Rf and Leq =
Fig. 2. Example of switching state transitions between the levels (1,2,3 or 4)
and associated NPC converter output voltage vectors. Ls + Lf [8].
vs Zs is iL
vP CC III. FCS-MPC
ZL
Traditional FCS-MPC needs to measure a set of variables at
Ls Rs io every instant k during a sampling period Ts , and determines
Grid Lf the best voltage to be applied at the next instant k + 1 to
Zf Single-Phase
Rf Load minimize a cost function, usually called g [10], [18], [19]. This
Multilevel Single-Phase
Shunt Active NPC
cost function is formulated based on a number of n̂ predicted
Power Filter Converter control variables at instant k + 1, its control references and
priorities expressed by the weighting factors (λn̂ ).
Fig. 3. Schematic diagram of the APF based on single-phase NPC converter. For the NPC converter, according to Table I, there are nine
possible values for vf that minimize the cost function. When
a first-order approximation of the derivative is considered to
states, as follows: predict the output current at instant k + 1, a high sampling
rate with a period of Ts between 20 and 100 µs must be used:
vf = vC1 (S1 − S3 ) + vC2 (S2 − S4 ) . (1)
dio io k+1 − io k
The right part of Fig. 1 represents the equivalent circuit for = . (5)
dt Ts
Thevenin analysis at the converter output terminals based on
the connection of the proposed APF topology in one phase of All possible output current predicted values of the single-
the electrical distribution system as shown in Fig. 3. The APF phase full-bridge NPC converter associated with the converter
is connected in parallel with the load at the point of common output voltage vf can be obtained from Eqs. (4) and (5) as:
coupling (PCC) (vP CC = vL ) to compensate for the current
harmonics and the reactive power presented in the load current Ts  k   Req Ts  k
io k+1 = vf − vs k + 1 − io . (6)
(iL ). Leq Leq
The equivalent independent voltage source veq and equiv- If the cost function is selected to achieve minimum current
alent series impedances Zeq that replaces the entire network error tracking, a stable dc-bus voltage and balanced dc-bus
(Zs , Zf and ZL ) at the output terminals is: voltages, then the cost function can be written as follows:

veq = vZL = vZs + vs ≈ vs . (2)
2

g1 = λ1 io ∗ − io k+1 +
The equivalent Thevenin impedance values of Req and Leq k+1

2
are determined by the series connection of the ripple filter λ2 vP N − (vC1
∗
+ vC2 k+1 ) +

2
impedance Zf and a parallel arrangement between the grid λ3 vC1 k+1 − vC2 k+1 . (7)
equivalent impedance Zs and the load impedance ZL (3).
k+1
In this expression the predicted output current (io ) is
Zs ZL compared to the current reference (i∗o ), the predicted dc-bus
Zeq = + Zf ≈ Zs + Zf . (3)
Zs + ZL voltage (vC1 k+1 + vC2 k+1 ) is compared to the dc-bus voltage
The mathematical model of the APF based on a multilevel reference (vP N ∗ ), and the difference between the predicted
converter is: dc capacitor voltages is calculated using the quadratic error
with the corresponding weighting factors λ1 , λ2 and λ3 . In
d io this case the terms associated with the output current and
veq = vf − Req io − Leq . (4)
dt the dc-bus voltage are heavily related. Therefore, ensuring
For this model, it is assumed that ZL >> Zs . Then, the load the convergence of each state to the neighborhood of the
impedance parameter can be neglected, needing only the grid reference is not a trivial task, and improving the performance
and ripple output filter impedance parameters. In this case, the of the FCS-MPC is also depend on the converter topology

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
vs
Cost Redundant
Current Function Selection
iL Reference Optimization Optimization
Generator io ∗ vf k+1
g k+1
vP N ∗
k+1
io
[vC1 ,vC2 ] Predictive
Model
Fig. 4. Proposed FCS-MPC block diagram.
and the particular application; see e.g. [20]. Furthermore, the
predictions of each dc capacitor voltage vC1 k+1 and vC2 k+1
are directly related to the measurement of dc capacitor currents
iC1 k and iC2 k , as shown in Eq. (8), where ρ is 1 or 2.
Ts
vCρ k+1 = vCρ k + iCρ k .
Cρ
The aim is to ensure that even when both dc-bus voltage and
capacitor voltage balancing control are required, a combination
of an adequate current reference generator and selection of
redundant switching states can be used to eliminate the need
for weighting factors and dc capacitor currents. If the unrelated
current tracking weighting factors are eliminated (λ1 = 1,
λ2 = 0 and λ3 = 0), then Eq. (7) turns into Eq. (9) and the
algorithm is fully dedicated to obtaining the optimal output
switching state that minimizes the current tracking error. The
current reference i∗o is used to maintain control of the dc-
bus voltage, and meet current harmonic and reactive power
compensation requirements. During each sampling period, the
switching state that generates the minimum value of g is
selected from the nine possible function values. At this stage,
the algorithm saves the pre-selected optimum voltage vf k+1
and the predictive sign of the converter output power Pf k+1 ,
equal to io k+1 vf k+1 .

2
g = io ∗ − io k+1 . (9)
For the sake of brevity, stability analysis of the proposed
predictive control method has not been included here. How-
ever, the interested reader is refer to [21] for further details
on stability analysis of power converters controlled with FCS-
MPC.
IV. P ROPOSED R EDUNDANT S ELECTION FCS-MPC
The block diagram of the proposed redundant selection
FCS-MPC is shown in Fig. 4. This part of the control method
is designed to be implemented directly into a digital platform
using a sequential algorithm. The proposed algorithm evaluates
the selected optimum switching state of the traditional FCS-
MPC algorithm for each possibility of increasing or decreasing
the capacitor voltages vC1 and vC2 using Table I. The selected
switching state that produces an optimal output voltage is
applied to the converter during the k + 1 state. For example,
considering that the current error associated with the pre-
selected voltage vf k+1 = −vC1 is minimum, Pf k+1 < 0
and vC1 ≥ vC2 , then the redundant algorithm is selected
between vf k+1 = −vC1 or vf k+1 = −vC2 , depending on
the sign of Pf k+1 and whether vC1 needs to be increased
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4
Step 1 Measurement: io k , vs k , vC1 k , vC2 k
Sx
Single-Phase
Step 2 Apply: vf k
NPC
io
Step 3 Estimation: io k
for j = 0...8
Prediction: io k+1
Step 4 Evaluation: g
Saving: Pf k+1
j≤8
(8)
Step 5 Optimization with redundant selection: vf k+1
Fig. 5. Proposed redundant selection optimization FCS-MPC algorithm.
or decreased. Finally, the optimum selected voltage to apply
in the next sampling period is vf k+1 = −vC2 , because this
voltage ensures that vC1 will be increased and vC2 will be
decreased. Owing to the fast dynamics of the output current
and the slow dynamic characteristics of the dc capacitors, the
proposed algorithm assumes that the process of increasing
or decreasing the capacitor voltages occurs slower than the
process of tracking the output current. In case of zero-voltage
selection, each voltage is alternated in the function of the
last used output switching state, reducing the semiconductor
stresses. A summary of the proposed algorithm is described
in the sequence showed in Fig. 5.
V. C URRENT R EFERENCE G ENERATION
The current reference signal i∗o is obtained from the load
current by means of the single-phase dq-based signal block
diagram shown in Fig. 6. This block generates the current
reference signal for the FCS-MPC, which contains information
about both the active power required, by the converter to
maintain the dc-bus voltage, and the reactive power and current
harmonics, to obtain unity power factor and the sinusoidal
current waveform of the grid. The dq-based scheme operates
in a rotating reference frame by multiplying the load current
waveform by the sin(wt) and cos(wt) signals. The factor of
2 is used to normalize the factor of 1/2 that comes from
the product of two sinusoidal quantities. The d-component
is synchronized with the phase-to-neutral system voltage and
the q-component is phase-shifted by 90◦ . The synchronized
signals are obtained from a synchronous reference frame
(SRF) phase-locked-loop [22].
Eq. (10) shows the relationship between the current in the
stationary frame iL (t) and its dq-components in a rotating
reference frame (id and iq ):
   
id sin (ωt)
=2 i (t) . (10)
iq cos (ωt) L
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vP∗ N + PI
Controller diagram shown in Fig. 7, the dc-bus voltage vP N of the single-
id − phase full-bridge NPC converter is measured through the sum
vP N of vC1 and vC2 and compared to a constant reference value
2 sin (ωt) i∗e sin (ωt) vP∗ N . The dc capacitor√ voltage vP N remains constant (with
a minimum value of 2vs ) until the active power absorbed
× Low–pass
Filter
+ × by the converter decreases to a level where it is unable to
iL īd i∗d io ∗ compensate for its losses. The dc-bus voltage error edc is
−
+ processed by a PI controller, with gains Kp and Ti . Both gains
Low–pass
are calculated according to the slow dc-bus voltage dynamic
× Filter
× × response requirements.
īq i∗q
Reactive Power
When the capacitors are charged at vP∗ N , the energy imbal-
2 cos (ωt) cos (ωt)
on/off Control ance in the dc-bus capacitor is ∆vP N and ∆i∗e is considered
Fig. 6. Block diagram of dq-based single-phase current reference generator. for small variations over i∗e . The transfer function between
vP∗ N edc i∗e ie vP N
vP N and the compensation signal generated by the PI con-
+ C (s) FCS-MPC G (s) troller ie is defined as G (s), which is represented by a first-
−
order system given by Eq. (13), where Cdc = CC11+C C2
2
:

√
Fig. 7. dc-bus voltage control block diagram. ∆vP N 1 Kp vs 2/2
G (s) = = . (13)
∆ie s Cdc vP∗ N
Current components id and iq are filtered using a low-pass The equivalent closed-loop transfer function of the dc-bus
filter (LPF), with a 20 Hz cut-off frequency in order to avoid system with a PI controller, as expressed by Eq. (14), is given
ac components. The resulting expressions īd and īq correspond by (15):
to the fundamental dq components of the input current signal
as shown in Eq. (11). With the aim of maintaining the dc-  
bus voltage under control, it is necessary to modify the 1
C(s) = Kp 1 + , (14)
amplitude of the fundamental component of the converter Ti · s
reference current. This is carried out by adding an active power
reference signal i∗e into the d-component, as will be explained  
1
in the dc-bus voltage control section (see Section V-A). In vP N C(s)G(s) ωn2 Ti · s + Ti
this case, the expressions of i∗d and i∗q correspond to dq = = 2 . (15)
vP∗ N 1 + C(s)G(s) s + 2ζωn · s + ωn2
reference components of the output current signal. The single-
phase stationary components of the current reference signal Since the time response of the dc-bus voltage control loop
are determined by multiplying the same sin(wt) and cos(wt) does not need to be fast, a damping ζ = 1 and a natural angular
signals by their dq components, as shown in Fig. 6. Finally, speed ωn = 2π · 100 rad/s are used to obtain an under-damped
the current reference signal i∗o is obtained by subtracting from response with minimal voltage oscillation. The corresponding
the dq reference components the measured load current iL , as integral time Ti and proportional gain Kp can be calculated
shown in Eq. (12). from the system of two equations (16):
   
īd |id | cos (φ)
≈ , (11)  r
īq |iq | sin (φ) √
 ζ = 18 KCpdc
vs 2Ti


vP
∗
N
r √ (16)
i∗o = i∗d sin (ωt + φ) + i∗q cos (ωt + φ) − iL . (12)  ωn = 21 CKpvv∗s T2 .


dc PNi

A. dc-bus voltage control

Considering decoupled dynamics between the dc-bus volt-
age and converter output currents, it is assumed that the dc-bus
voltage control is at least 10 times slower than the proposed
FCS-MPC applied to control the converter output current. The
principal advantage of this block is the potential to avoid
weighting factors in the FCS-MPC cost function, since, as
Fig. 6 shows, the dc-bus voltage control is part of the reference
currents and each dc capacitor voltage is controlled using the
proposed redundant selection FCS-MPC.
The active power absorbed by the converter is controlled by
adjusting the amplitude of the active power reference signal i∗e ,
which is in phase with its respective phase voltage. In the block
VI. R ESULTS
This section presents the simulation and experimental re-
sults necessary to validate the effectiveness of the current
compensation and the technical feasibility of the multilevel
converter based APF under the proposed control method.
To ensure that both simulation and experimental results are
equivalent, dc capacitor voltage balance, and current harmonic
and reactive power compensation under different operating
conditions have been conducted using the parameters given
in Table II. Finally, the behavior of the proposed predictive
control method is verified with a set of results under unknown
load and system impedance parameters.

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 6

2
(2pu/div) vs
replacements
(a) 0

-2
2
iL
(2pu/div)

(b) 0
step-load change


-2
iLd
(2pu/div)

2
(c) 0
iLq
-2

2
io
(2pu/div)

(d) 0
start the compensation process


-2
2
vs
(2pu/div)

(e) 0
is
-2
5
(5pu/div)

isd
(f) 0
isq
-5
(0.1pu/div)

1.1
vP N
(g) 1
0.9
2
vf n
(2pu/div)

(h) 0

-2
t1 t2 t3 t4 t5
(50ms/div)
Fig. 8. Simulated waveforms of the proposed APF scheme. (a) Phase-to-neutral grid voltage. (b) Load current. (c) dq single-phase reference components of
load current. (d) APF output current. (e) Grid current and voltage. (f) dq single-phase reference components of grid current. (g) dc-bus voltage converter. (h)
Converter output voltage.

A. Simulated results
Simulated results have been obtained by means of
MATLAB-Simulink. The predictive control algorithm was pro-
grammed using the S-function block which allows simulation
of a discrete model that can be easily implemented in a digital
control platform. Simulations were performed considering a 20
µs sampling period. The APF was tested with a non-linear load
rated at 500 kVA at 4.16 kV. The APF parameters are shown
in Table II. All voltages and current values in the figures are
expressed in per unit (p.u.). In the simulated results shown
in Fig. 8, the active filter starts to compensate at t = t1 . At
this time, the single phase APF injects an output current io to
compensate current harmonic components. During compensa-
tion, the grid currents (is ) show sinusoidal waveform, with
low total harmonic distortion (T HD = 3.69%). At t = t2 , a
step-load change (from 1.0 to 2.0 pu) is generated using an R-
L load in parallel to the existing load to evaluate the dynamic
behavior of the dc capacitor bank voltage (vP N ). The dc-bus

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 7

without control kVA three-phase experimental setup. The parameters of the

(0.5pu/div) 0.55 vC2 setup are shown in Table II. As well this issue is not in the
scope of this paper, it is important to highlight that since
0.5 the selection and design of the capacitors is based on their
ability to handle 5% maximum voltage dip when the AC grid
0.45 vC1 fails or it is not available then the value of the dc-capacitors
 step load change is independent of the topology being considered, and it is
0.4 possible to determine the capacitor value using the switching
t6 t7 t8 t9 t10 t11 t12 frequency as a parameter. In this case the capacitor value has
(10ms/div) been chosen based on the one available in the laboratory. Only
Fig. 9. Dynamic behavior of dc capacitor voltages vC1 and vC2 under the one phase of a six-pulse rectifier and a 0.37 kW motor were
effect of loss of dc capacitor balance control.
selected as loads in order to verify the effectiveness of the
current harmonic and reactive power compensation. A step-
voltage response is smooth after the load current step change. load change was applied to evaluate the response of the dc-
Therefore, the compensated grid currents remain sinusoidal bus voltage control loop. Finally, a set of impedance value
despite the change in the load current magnitude. From t = variation tests were performed to experimentally explore the
t2 , the total load is equivalent to a 0.84 lagging power factor robustness of the proposed APF implementation. These tests
load plus the nonlinear load. Finally, at t = t4 , the APF turns on are used to establish the allowed threshold percentage, which
its reactive power control signal and the average value of the produces a maximum permissible T HD on the grid current
corresponding q-axis of the grid current (isq ) is moved toward created from unknown system parameters.
to zero as shown in Fig. 8 (f). Simulated results show that The complete control loop is executed by the controller
line currents are sinusoidal and in phase with the grid voltage. every 20 µs, while the selected switching state is available
Additionally, Fig. 8 (g) and (h) show that the dc-bus voltage at 11 µs. An average switching frequency of 6.28 kHz
and the converter output voltage remain stable throughout the is obtained. Fig. 10 shows the transient response of the
whole APF operation. compensation scheme. Fig. 10a shows that the line current
The same discrete model has been used for transient simu- becomes sinusoidal when the APF starts compensation and the
lation of each capacitor voltage. Fig. 9 illustrates the dynamic NPC output voltage has a three-level waveform as expected.
behavior of the dc capacitor voltages vC1 and vC2 under the Experimental results shown in Fig. 10b indicate that the total
effect of loss of dc capacitor voltage balance control during harmonic distortion of the line current T HD is reduced from
an event initiated from a step-load change. At t = t8 , the 25.46% to 3.76%. This is a consequence of the good tracking
redundant switching state selection method is turned off and characteristic of the current references, as shown in Fig. 10c.
the divergence of both dc capacitor voltages is clear until the In Fig. 11, the transient response of the APF under a step-
balance control is turned on again at t = t10 . load change is shown. The line currents remain sinusoidal and
the dc capacitor voltage returns to its reference with a typical
B. Experimental results transient response of an under-damped second order system
(without minimum overshoot and two cycles of settling time).
Since the proposed method was designed for independent
In this case, a step-load change is applied from 1.0 to 1.3 p.u.
phase operation and for simplicity, the compensation effec-
Finally, the motor load was connected and the corresponding
tiveness of the APF is tested in only one phase of a 2
waveforms are shown in Fig. 12. In addition, it is reported
that the active filter is able to compensate the reactive power
Table II with fast transient response (less than one cycle).
S YSTEM PARAMETERS 1) Effects of model parameter errors: The parameters of
an electrical system can vary and, therefore, the effect of
Variable Description Simulation a
Experimental b estimation errors in these parameters needs to be evaluated.
As mentioned before, the impedance parameters of the output
vs Grid voltage 4.16 kV 55 V ripple filter are part of the APF design and the grid parameters
f Grid frequency 50 Hz 50 Hz can be obtained from the electrical system planning depart-
vP N dc capacitor voltage 6100 V 80 V
ment or applying a well known online parameter estimation
method. For this reason, the information provided by variation
Cdc dc capacitor bank 2200 µF 1000 µF on the grid impedance Zs over its rated value Zsr is used to
Lf Filter inductor 28.0 mH (0.3 pu)3.0 mH (0.2 pu) test the behavior of the proposed method under uncertainty
Rf Filter resistance 0.02 Ω 0.6 Ω in this parameter. These tests are used to analyze the steady-
Ts Sampling period 20 µs 20 µs state performance in order to define how accurately the grid
parameter needs to be known to improve control tracking
Te Execution time −− 11 µs performance of the FCS-MPC.
fs Switching frequency 6.35 kHz 6.28 kHz The predictive model of Eq. (6) can be rewritten as follows:
a
: Vbase = 4160 V and Sbase = 2 MVA.    
b
: Vbase = 55 V and Sbase = 2 kVA. io k+1 = Kv vf k − vs k + Ki io k , (17)

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 8

i∗o io vs

iL

start the compensation process

vf
(a) motor load connection
vs

is = iL is
is

30
Fig. 12. Experimental results for motor load connection (reactive power
25 iL compensation). Load current, iL , system voltage vs , grid current, is , and
h1 is system voltage vs .
20
% of h1

15 5 th
(b)
10 a component that is directly related to the actual values of the
7 th
5 11 th th output currents. This component has a fundamental component
13 related to the PI controller that absorbs the dc voltage error
0 10 20 30 40 50 in the steady state and harmonic components to compensate
Harmonic Order h current distortion. It is possible to plot the effect of model
i∗o parameter errors in the behavior of the predictive current-
io tracking error (er = i∗o − io ) as a function of the rated grid
impedance value variations.
Fig. 13a, 13b and 13c are selected as representative of
particular cases. If the predictive controller uses the real value
(c)
of the system impedance, then the error between the current
er = i∗o − io reference and the output current is minimal, as shown in Fig.
13a. If the error in the system impedance value increases, the
current tracking error becomes higher and the grid current
becomes severely distorted, as shown in Fig. 13b and 13c.
Fig. 14 shows how much the system impedance value can
Fig. 10. Experimental transient response after APF connection. (a) Current change until the grid currents do not satisfy the IEEE Std.
reference signals, i∗o , and APF current, io , NPC output voltage, vf , and grid
current is . (b) Associated frequency spectrum (T HD of iL = 25.46% and
519 (THD > 5%). This graph clearly shows that the THD
T HD of is = 3.76%). (c) Current error (tracking characteristic). in the grid current increases as the current tracking error
er becomes larger in the predictive control with Zs from
iL
0.1 to 2 p.u. If the value used in the grid impedance is
between 0.5 and 1.5 p.u., the proposed method allows for
grid currents with THD below 5%, which is very important for
io step-load change establishing parameter accuracy requirements. Moreover, the
APF is still operating even if the system impedance estimation
is
value exceeds 1.5 p.u., or it is less than 0.5 p.u.

vP N
Fig. 11. Experimental results for step-load change (1.0 to 1.3 p.u.). Load
current, iL , APF current, io , grid current, is , and dc voltage converter, vP N .
 
R T
where Kv = LTeq s
and Ki = 1 − Leqeq s .
The predicted current has two key components: the com-
ponent that is in the direction of the nine possible output
voltages, and the component in the same direction as the actual
current. Owing to the discrete nature of the output voltage
(±vP N , ±vP N /2 and 0), the first component always tries to
minimize the cost function g, selecting the optimal voltage
even if an error in Kv is present. On the other hand, there is
VII. C ONCLUSION
A single-objective predictive control method applied to a
three-level single-phase NPC converter as an APF has been
presented and analyzed in this paper. One of the main ad-
vantages of the proposed control method is the elimination of
weighting factors introduced by using a single-phase dq-based
current reference scheme, the combination of cost function
optimization and redundant switching states selection process
in order to self-support the dc-bus voltage, to balance the dc
capacitor voltages and to follow a given APF current reference
signal. Alongside the advantages of using predictive control
without weighting factors, this method fits well in the single-
phase NPC multilevel converter with three control variables
allowing current harmonics and reactive power compensation
reaching higher blocking voltage capabilities.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 9

i∗o
operation of the APF, even when the predictive model has
io a 25% error between actual and estimated grid impedance
values.
The stability under unbalanced three-phase compensation is
er = i∗o − io a very important issue in electric power systems, which could
(a)
be considered as an extension of this paper as well as the
is evaluation of this predictive control method for large multilevel
converters such as five-level or seven-level converters that will
require a more complex mathematical and discrete model.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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May 2000.
Pablo Acuña (M’12) received the B.S. in
Electronics Engineering, the Electronics Engineering
Professional degree, and the Ph.D. degree in Electri-
cal Engineering from the University of Concepción,
Chile, in 2004, 2007, and 2013 respectively. He
is currently Research Associate at the Australian
Energy Research Institute (AERI), School of Elec-
trical Engineering and Telecommunications, Univer-
sity of New South Wales, Sydney, Australia. His
main research interests include the areas of power
electronics, power quality, and electric power system
modeling and applications.
Luis Morán (F’05) received his degree in electri-
cal engineering from the University of Concepción,
Chile, in 1982, and the Ph.D. degree from Concordia
University, Canada in 1990. Since 1990, he has
been with the Electrical Engineering Department,
University of Concepción, where he is a Professor.
He has written and published more than 50 papers
in Active Power Filters and Static Var Compensators
in IEEE Transactions. His main areas of interests are
in power quality, active compensation, large power
ac drives, and power system protection.
0278-0046 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
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10
Marco Rivera (S’09–M’11) received his B.Sc. in
Electronics Engineering and M.Sc. in Electrical
Engineering from the Universidad de Concepción,
Chile in 2007 and 2008, respectively. He recieved
his Ph.D. degree at the Department of Electronics
Engineering, Universidad Técnica Federico Santa
Marı́a (UTFSM), in Valparaı́so, Chile, in 2011. He
is currently Associate Professor in the Department
of Industrial Technologies at Universidad de Talca,
Curicó, Chile. His research interests include matrix
converters, four-leg converters, and predictive and
digital controls for high-power drives.
Ricardo Aguilera (S’01–M’12-) received his B.Sc.
degree in Electrical Engineering from the Universi-
dad de Antofagasta, Chile, in 2003, his M.Sc. degree
in Electronics Engineering from the UTFSM, Chile,
in 2007, and his Ph.D. degree in Electrical Engi-
neering from The University of Newcastle, Australia,
in 2012. He is currently Senior Research Associate
at the Australian Energy Research Institute (AERI),
School of Electrical Engineering and Telecommu-
nications, University of New South Wales, Sydney,
Australia. His main research interests include power
electronics, and theoretical and practical aspects on model predictive control.
Rolando Burgos (S’96–M’03) received the B.S. in
Electronics Engineering, the Electronics Engineering
Professional degree, and the M.S. and Ph.D. degrees
in electrical engineering from the University of
Concepción, Chile, in 1995, 1997, 1999, and 2002
respectively. He is currently Associate Professor in
the Bradley Department of Electrical and Computer
Engineering and CPES faculty, Virginia Tech, USA.
His research interests include multi-phase multi-
level power conversion, grid power electronics sys-
tems, high power density power electronics, model-
ing, and control theory and applications.
Vasssilios G. Agelidis (SM’00) received the B.Eng.
degree in Electrical Engineering from the Dem-
ocritus University of Thrace, Greece, in 1988, the
M.S. degree in Applied Science from Concordia
University, Montreal, QC, Canada, in 1992, and
the Ph.D. degree in Electrical Engineering from
Curtin University, Perth, Australia, in 1997. He
has done extensive research in the field of smarter
grid infrastructure and sustainable energy systems
incorporating solar and wind energy sources. He
is currently the Director of the Australian Energy
Research Institute (AERI) and Professor of Power Engineering at the School
of Electrical Engineering and Telecomunications at the University of New
South Wales (UNSW).