Number Systems & Codes

1. Perform the following operations in 2’s complement method (use 8 bit representation)
(a) (52)10 – (23)10 (d) (-52)10 – (-23)10
(b) (23)10 – (52)10 (e) (-77)10 + (-122)10
(c) (52)10 – (-23)10
Ans. (a) (52)10 – (23)10 can be written as

52 Minuend
-23 Subtrahend
+29

52 = 0011 0100 Binary

-23 = + 1110 1001 2’s complement form

1 0001 1101

carry

Discard carry, the answer is positive and in binary form (+29)

(b) (23)10 – (52)10

23
-52
-29

+23 = 0001 0111 Binary

-52 = + 1100 1100 2’s complement form

1110 0011

No carry is generated so the answer is negative and in 2’s complement form so take
another 2’s complement to get the result

11100011 2’s complement (00011101)2 = (-29)10

(c) (52)10 – (-23)10 = (52)10 + (+23)

 Both numbers are positive so add the numbers in binary

52 0011 0100 Binary

+23 0001 0111 Binary

75 0100 1011 (75)10

(d) -52 – 23 = -52 + (-23)

-52 1100 1100

+(-23) 1110 1001

-75 1 1011 0101

Carry

Ignore carry the result is in 2’s complement form and –ve

Takes 2’s complement of 10110101 2’s complement (01001011)2 = (-75)10

Note if two operands are of the same sign as in this case the sign bit of operand is to
be compared with the sign bit for result (MSB). Here it is 1 in all as indicated the
result is ok

If sign bits of operand and results are not same then there is a problem of over flow
i.e. result cannot be accommodated using eight bits and is to be interpreted suitably.

The result in this case will consist of 9 bits i.e. carry and eight bits, carry bit will give
sign of the number.

(e) add -77 and -122

-77 1011 0011 2’s complement

+(-122) 1000 0110 2’s complement

1 0011 1011

Overflow

Note that MSB of operands is 1 while that of result is 0 so there is overflow. It

occurs when operation results are beyond the capacity of storage registers. So look
for the change in sign bit. The result is 2’s complement of 00111001
 i.e. 11000111 (-199)

Range of numbers:

Note that positive numbers with 2’s complement ------- (2n-1 -1)

Negative numbers -------- -2n-1

i.e. +127 and -128 (for 8 bit)

Here, the number is beyond this range (-199) so it has to be interpreted suitably.

2. Consider the operation 24 + 17 = 40. Find the correct base of number so that the
operation is correct?

Ans. Let the base be b

Or,

Or, b = 11

Base is 11

3. Find F’s complement of (2BFD)16

Ans. F’s complement of (2BFD)16

Is

(i) F F F F
-2 B F D
D 4 0 2

(ii)Add 1 to the above answer

D 4 0 2
+1
D 4 0 3

F’s complement of

(2BFD)16 = (D403)16
 4. The subtraction of a binary number Y from another binary number X, done by adding the
2’s complement of Y to X, results in a binary number without overflow. This implies that
the result is:
(a) negative and is in normal form
(b) negative and is in 2’s complement form
(c) positive and is in normal form
(d) positive and is in 2’s complement form

[Gate 1987: 1 Mark]

Ans. (b)

As per the rules of 2’s complement addition the resulting number will be negative
and is in 2’s complement form

5. An equivalent 2’s complement representation of the 2’s complement number 1101 is

(a) 110100 (c) 110111
(b) 001101 (d) 111101
[Gate 1988: 1 Mark]

Ans. (d)

The 2’s complement number is given 1101which is in 4 bit representation. While the
given options are is 6 bits taking 2’s complement of the number we will get the
corresponding positive number (magnitude). So 2’s complement of 1101 is 0011 i.e.
(+3)10 now represent this in six bit by adding zeros.

i.e. 0011 → 000011 (Bits are extended as per MSB if 0, zeros added if 1, 1 is added)

Taking 2’s complement to get the number 111101

6. The 2’s complement representation of – 17 is

(a) 101110 (c) 111110
(b) 101111 (d) 110001
[Gate 2001: 1 Mark]

Ans. (b)

We have to determine 2’s complement of - 17

So we determine the number the +17in binary i.e.

 (+17)10 = 10001

Note that the above number is in 5 bits while the operations given are in 6 bits i.e.

10001 → 010001 (number positive so sign bit is 0)

Now taking 2’s complement, we get 101111

7. 4-bit 2’s complement representation of a decimal number is 1000. The number is

(a) +8 (c) -7
(b) 0 (d) -8
[Gate 2002: 1 Mark]

Ans. (d)

Given: 2’s complement of a decimal number is represented in 4 bit is 1000

Take another 2’s complement to get +ve number (magnitude) the number is

1000 → (8)10

So the given number is (-8)

8. The range of signed decimal number that can be represented by 6-bit 1’s complement
number is
(a) -31 to +31 (c) -64 to +63
(b) -63 to +63 (d) -32 to 31
[Gate 2004: 1 Mark]

Ans. (a)

The 1’s complement number is a 6 bit number. We have to find the maximum and
minimum number which can be represented by it.

When number is negative then the maximum value can be 111111 (-31)10

Here MSB is for sign.

Maximum positive number is 0 11111 (+31)10

 9. 2’s complement representation of a 16-bit number (one sign bit and 15 magnitude bits) if
FFFF. Its magnitude in decimal representation is
(a) 0 (c) 32, 767
(b) 1 (d) 65, 535
[Gate 1993: 1 Mark]

Ans. (b)

Given: 2’s complement representation of a 16 bit number

FFFF

i.e. 1111 1111 1111 1111

If we take another complement we will get the positive number or magnitude.

2’s complement 0000 0000 0000 0001

So it is 1 decimal

10. A signed integer has been stored in byte using the 2’s complement format. We wish to
store the same integer in a 16 bit word. We should
(a) Copy the original byte to the less significant byte of the word and fill the more
significant byte with zeros.
(b) Copy the original byte to the more significant byte of the word and fill the less
significant byte with zeros.
(c) Copy the original byte to the less significant byte of the word and make each bit of
the more significant byte equal to the most significant bit of the original byte.
(d) Copy the original byte to the less significant bytes well as the more significant byte of
the word. [Gate 1997: 1 Mark]

Ans. Given, A signed integer has been stored is a single byte using 2’s complement
format.

This has to be stored in a 16 bit word. The procedure will be to copy original byte to
less significant byte of the word and make each bit of most significant byte equal to
the most significant bit of the original byte.

If number is negative the MSB will be 1 so make all bits as 1 in most significant
byte.

If MSB is 0 then number is positive, then make all bits as zero.

 Number Systems And Codes
1. The number of digits in octal systems are
(a) 8 (c) 8 or 7
(b) 7 (d) 10
Ans. (a)

2. The digit F in hexadecimal system has equivalence in digital system to

(a) 16 (c) 17
(b) 15 (d) 18
Ans. (b)

( ) ( )

3. The number FF in hexadecimal system has equivalence in decimal system to

(a) 256 (c) 240
(b) 255 (d) 239
Ans. (b)

( )

4. Two voltages are 0V and -5V. In positive logic

(a) 0V is 1 and -5V is 0
(b) -5V is 1 and 0V is 0
(c) 0V is 1 in some circuit and 0 in others
(d) -5V is 1 in some circuit and 0 in others

Ans. (a)

In positive logic, higher voltage is represented as logic 1 and lower as logic 0

5. In the decimal number 27, the digit 2 represents

(a) 2 (c) 0.2
(b) 20 (d) 200
Ans. (b)
 6. Hexadecimal number F is equal to octal number
(a) 15 (c) 17
(b) 16 (d) 18
Ans. (c)

( ) ( )

7. Binary number 1101 is equal to octal number

(a) 17 (c) 15
(b) 16 (d) 14
Ans. (c)

( ) ( )

8. -8 is equal to signed binary number (8 bit)

(a) 10001000 (c) 1000000
(b) 00001000 (d) 11000000
Ans. (a)

For signed binary number MSB is 1 for negative number.

9. 1’ s complement of 11100110 is
(a) 00011001 (c) 00011010
(b) 10000001 (d) 00000000
Ans. (a)

10. 2’s complement of binary number 0101 is

(a) 1011 (c) 1101
(b) 1111 (d) 1110
Ans. (a)

Just complement the bits and add 1

 11. -24 is 2’s complement form is
(a) 11101000 (c) 01111111
(b) 01001000 (d) 00111111
Ans. (a)

(+24)10 = (00011000)2 2’s complement is 1110100 = (-24)10

Alternative and simple method to find 2’s complement.

Write the ( ) ( )
MSB LSB

00011000

Stating from LSB copy all digits till first 1, then complement the further bits

(-24)10 = 11101000 in 2’s complement form

12. 7BF16 = (----)2

(a) 0111 1011 1110 (c) 0111 1011 0111
(b) 0111 1011 1111 (d) 0111 1011 0011
Ans. (b)

Convert each hexadecimal digit to binary

( ) ( )

13. (E7F6)16 = (-----)10

(a) (600000)10 (c) (9382)10
(b) (59382)10 (d) (382)10
Ans. (b)

( ) ( )

14. 26810 = (----)16

(a) 10 A16 (c) 10 C16
(b) 10 B16 (d) 10 D16
Ans. (c)
 By observation one could see that

( )

( )

Alternative method:

Convert decimal to Hex

Division Remainder

16)268 -

16)16 12→C LSD

16)1 0

16)0 1↑ MSD

Remainder

Read the remainders from bottom to top (10C) 16

15. Convert (47)16 = ( )8

The hexadecimal number can be converted to decimal and decimal to octal, but the best
way is
 Convert the number to its binary equivalent
 Form group of 3 bits starting from LSB
 Write the equivalent octal number

(47)16 = (0100 0111)

Here each hex digit is written in a group of 4 binary bits

Like

( ) ( )

( ) ( )

Or ( ) ( )

( )

Similar steps can be used to convert the number from octal to hexadecimal
 Ex. ( ) ( )

( )

( )

16. The number of bits in ASCII is

(a) 12 (c) 9
(b) 10 (d) 7
Ans. (d)

17. The number of bits in EBCDIC is

(a) 12 (c) 8
(b) 10 (d) 6
Ans. (C)

18. FF16 when converted to 8421 BCD is

(a) 0000 0101 0101 (c) 1111 0101 0101
(b) 0010 0101 0101 (d) 1000 0101 0101
Ans. (b)

( )

Now represent each digit in BCD

19. Decimal number 9 in Gray code is

(a) 1100 (c) 110
(b) 1101 (d) 1111
Ans. (b)

(9)10 = (1001)2

Binary

Gray
 20. 11011 in gray code equal to binary
(a) (10010)2 (c) (11100)2
(b) (11111)2 (d) (10001)2
Ans. (a)

Gray

Binary
Boolean algebra and Logic Simplification
Key point
The first two problems at S. Nos. 1 and 2 are on the Number of Boolean expressions for
a given number of variables.

The number of Boolean expressions for n variables is

Note that for n variable Boolean function one can have 2n Boolean inputs.

1. The number of Boolean function that can be generated by n variables is equal to:
(a) (c)
(b) (d)
[GATE 1990 : 1 Mark]
Ans. (b)

The number of district Boolean expressions for n variables is

Where, n is the number of variables.

2. The number of distinct Boolean expressions of 4 variables is

(a) 16 (c) 1024
(b) 256 (d) 65536
[GATE 2003 : 1 Mark]
Ans. (d)

We know that the number of Boolean expressions for n variables is

So, for

3. Two 2’s complement number having sign bits x and y are added and the sign bit of
the result is z. Then, the occurrence of overflow is indicated by the Boolean function.
(a) (c) ̅ ̅ ̅
(b) ̅ ̅ ̅ (d)
[GATE 1998 : 1 Mark]
 Ans. (c)
This problem is based on 2’s complement addition/subtraction (covered in
number systems). Here we have to write the Boolean expression for the case
where overflow occurs.
In the 2’s complement arithmetic we had seen that if MSB (Sign bit) of operands
(Minuend & Subtrahend) is same, and the MSB of the result is different or vice
versa an overflow occurs.
i.e.
or, if
Overflow occurs
So, we can write
̅̅ ̅ is the Boolean function for the overflow to occur.
Key points:
The problems in Q Nos. 3, 4, 5, 6, 7 and 8 are on the simplification of Boolean
expressions based on algebraic methods like using laws and theorems of Boolean
algebra. But this method becomes complex with increase in number of variables and
number of terms.

4. The logical expression ̅ is equivalent to

(a) (c) ̅
(b) ̅ (d)
[GATE 1999 : 1 Mark]
Ans. (d)
̅

( ̅ )( )
( ) ( )

5. The minimized form of the logical expression ( ̅ ̅ ̅ ̅ ̅ ̅ ̅ ) is

(a) ̅ ̅ ̅ ̅ (c) ̅ ̅ ̅
(b) ̅ ̅ ̅ ̅ (d) ̅ ̅ ̅
[GATE 1999 : 2 Marks]
Ans. (a)
̅ ̅̅ ̅ ̅ ̅ ̅ ̅

Combining first two terms

 ̅ ̅( ̅ ) ̅ ̅
̅̅ ̅ ̅
̅ (̅ ) ̅
̅ (̅ )(̅ ) ̅
̅ (̅ ) ̅
̅̅ ̅ ̅
̅̅ (̅ ̅)
̅̅ (̅ )( ̅ ̅)
̅̅ (̅ ̅)
̅̅ ̅ ̅

6. The Boolean expression ̅ is equivalent to

(a) ̅ ̅ (c) ̅ ̅
(b) ̅ ̅ ̅ ̅ (d) ̅ ̅ ̅ ̅
[GATE 2004 : 2 Marks]
Ans. (d)
̅

( ̅) ̅( ̅)
̅ ̅ ̅ ̅
̅ ̅ ̅ ̅

7. The Boolean expression for the truth table shown is

A B C F
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 0

(a) ( )( ̅ ̅) (c) ̅ ( ̅ )( ̅ )
(b) ( ̅ )( ̅ ) (d) ̅ ( )( ̅ ̅)
 [GATE 2005 : 2 Marks]
Ans. (a)
We observe that the expression needed in the result is of POS form but in truth
table the output is 0 for many terms but 1 only for 2 terms so we write the SOP
equation. Then convert it to POS
̅ ̅

(̅ ̅) ( )
( )( ̅ ̅)

Since
̅̅̅̅̅̅̅ ̅̅
So, ̅̅̅̅̅̅ ̅̅̅̅̅̅̅̅̅̅̅̅
̅̅
( ̅ ̅ )( )
( )

8. If X = 1 in the logic equation

, *̅ ( ̅ ̅ )+- * ̅ ̅( )+ then
(a) (c)
(b) ̅ (d)
[GATE 2009 : 2 Marks]
Ans. (d)
Given logic equation is
, *̅ (̅ ̅ )+- * ̅ ̅( )+
, so the first term is * +

2nd term is * ̅( )+ ̅
̅

Key Points:
 Prime implicants :A product term in SOP which cannot be further simplified by
combination with other terms.
 SOP (Sum of product) and POS (producer Sum) expressions.
 K-Map has 2k cells where k is no. of variables.
 Don’t care combinations: Represented as‘d’. d’s can be combined with 1’s to
simplify, where needed.
 9. The K-map for a Boolean function is shown in figure. The number of essential prime
implicants for this function is
AB
CD 00 01 11 10
00 1 1 0 1

01 0 0 0 1

11 1 0 0 0

10 1 0 0 1

(a) 4 (c) 6
(b) 5 (d) 8
[GATE 1998 : 1 Mark]
Ans. (a)

AB
CD 00 01 11 10
00 1 1 1

01 1

11 1

10 1 1

On the K-Map retaining only minimum terms (corresponding to 1)

The number of prime implacants are
̅̅ ̅ ̅̅ ̅̅ ̅̅

Four prime implicants

10. The number of products terms in the minimized sum-of-product expression obtained
through the following K-map is (where, “d” denotes don’t care states)
 1 0 0 1
0 d 0 0

0 0 d 1

1 0 0 1
(a) 2 (c) 4
(b) 3 (d) 5
[GATE 2006 : 2 Marks]

Ans. (a)

AB
CD 00 01 11 10
00 1 0 0 1
01 0 d 0 0

11 0 0 d 1

10 1 0 0 1

To write the minimized expression (d terms do not simplify the expression)

̅̅ ̅

So there are only two product terms

11. The Boolean expression ̅̅ ̅ ̅ ̅ ̅ ̅ ̅ ̅ can be minimized to

(a) ̅̅ ̅ ̅ ̅ ̅ (c) ̅ ̅ ̅ ̅ ̅ ̅
(b) ̅̅ ̅ ̅ ̅ ̅ (d) ̅ ̅ ̅ ̅ ̅̅
[GATE 2007 : 2 Marks]
Ans. (d)
 CD
AB 00 01 11 10
00 1

01 1

11 1

10 1

The Boolean expression

̅ ̅̅ ̅ ̅ ̅̅ ̅̅

Min terms can be plotted on K-Map

The minimized expression is
̅ ̅ ̅̅ ̅̅

Alternative method
̅ ̅̅ ̅ ̅ ̅̅ ̅̅

Combining first and third terms

(̅ )̅̅ ̅ ̅ ̅̅
̅ ̅ ̅̅ ̅̅

12. In the sum of products function ( ) ∑( ), the prime implicates are

(a) ̅ ̅ (c) ̅ ̅ ̅ ̅
(b) ̅ ̅ ̅ ̅ (d) ̅ ̅ ̅ ̅ ̅ ̅
[GATE 2012 : 2 Marks]
Ans. (a)

YZ
X 00 01 11 10
0 1 1

1 1 1

( ) ∑( )
̅ ̅

So prime implicants are

̅ and ̅
 LOGIC GATES (PRACTICE PROBLEMS)
Key points and summary – First set of problems from Q. Nos. 1 to 9 are based on the logic
gates like AND, OR, NOT, NAND & NOR etc.
First four problems are basic in nature. Problems 3 & 4 are based on word statement.
Problems 5 to 9 are on Universal gates. How the logic circuits can be designed using these
gates?
NAND gate implementation has been very common. The procedure is
 Write the Boolean expression in SOP form.
 Simplify the expression
 Double invert it
If Boolean function has only one term then implement by observation.
Problems 10 to 17 are on EX-OR, EX-NOR and other gates. Good number of problems are
asked on EX-OR and EX-NOR gates. You have to be thorough with the SOP & POS
expressions for these gates and how they have to be used in the problems. Practice these
problems to get confidence.

1. Indicate which of the following logic gates can be used to realize all possible
combinational Logic functions
(a) OR gates only (c) EX OR gates only
(b) NAND gates only (d) NOR gates only
[GATE 1989: 1 Mark]
Ans. (b) and (d)
NAND and NOR gates can be used to realize all possible combinational logic
functions. That is why they are also called Universal gates.

2. The output of a logic gate is ‘1’ when all its input are at logic 0.The gate is either
(a) NAND or an EX OR gate (c) an OR or an EX NOR gate
(b) NOR or an EX-NOR gate (d) an AND or an EX-OR gate
[GATE 1994: 1 Mark]
Ans. (b)
If we see first gate of the given options then options (c) and (d) are ruled out as
OR and AND gates give 0 output for zero inputs. Now see option (a) where
NAND gate satisfies the condition but EX-OR gates does not as it gives 0 output
for the same inputs. Option (b) is the correct choice where both gates satisfy the
given condition.
3. A locker has been rented in the bank. Express the process of opening the locker in
terms of digital operation.
Ans.
The locker gate (F) can be opened by using one key (A) which is with the client
and the other key which is with the bank (B). When both the keys are used the
locker door opens. Locker door is opened i.e. F=1 when both keys are applied
A=B=1.
So the process can be expressed as an AND operation.

F=A.B

4. A bulb in a staircases has two switches, one switch being at the ground floor and the
other one at the first floor. The bulb can be turned ON and also can be turned OFF by
and one of the switches irrespective of the state of the other switch. The logic of
switching of the bulb resembles.
(a) an AND gate (c) an XOR gate
(b) an OR gate (d) a NAND gate
[GATE 2013: 1 Mark]
Ans. (c)
If we look for the truth table of EX-OR gate for two inputs
A B F
0 0 0
0 1 1
1 0 1
1 1 0
We can see that the bulb can be put ON and OFF by any one of the switches.
Say, A ground floor switch A = 1, ON and A = 0 OFF
B first floor switch B = 1, ON and B = OFF
F is the bulb F =1 is ON and 0 is OFF
Let both the switches are is off position (first row of truth table) the bulb is off
(since F = 0). If switch (A) is put on (A = 1) then bulb turn on (F = 1) OR of switch
(B) is put on then also bulb turns.
Similarly you can verify for bulb to be off from either floor
5. A Boolean function f of two variables X and Y is defined as follows:
f(0, 0) = f(0, 1) = f(1, 1) = 1; f(1, 0) = 0
Assuming complements of X and Y are not available, a minimum cost solution for
realizing using only 2-input NOR gates and 2-input OR gates (each having unit cost)
would have a total cost of
(a) 1 unit (c) 3 unit
(b) 4 unit (d) 2 unit
[GATE 2004: 2 Marks]
Ans. (d)
As per definition of Boolean function given in the problem a truth table can be
formed
x y F
0 0 1
0 1 1
1 0 0
1 1 1
Since the realization is to be done using only NOR and OR gates so, POS
equation is to be written i.e. write for 0 term at the output
̅+𝒚
𝑭=𝒙
This function can be implemented as

y
x+y
f
x
x

Since only two gates are required so cost is 2 units.

6. The Boolean function Y= AB + CD is to be realized using only 2 input NAND gates

.The minimum number of gates required is
(a) 2 (c) 4
(b) 3 (d) 5
[GATE 2007: 1 Mark]
Ans. (b)
𝒀 = 𝑨𝑩 + 𝑪𝑫
We double complement either side
̅ = 𝒀 = ̅̅̅̅̅̅̅̅̅̅̅̅
i.e. 𝒀 𝑨𝑩 + 𝑪𝑫
̅̅̅̅̅̅̅̅̅̅
= ̅̅̅̅
𝑨𝑩 . ̅̅̅̅
𝑪𝑫
Logic diagram for the expression is

A A.B
B
AB . CD

C
D C.D

So, requires three NAND gates

7. Minimum number of 2 input NAND gates required to implement the function,

𝐹 = (𝑋̅ + 𝑌̅)(𝑍 + 𝑊) is
(a) 3 (c) 5
(b) 4 (d) 6
[GATE 1998: 1 Mark]
Ans. (b)
̅+𝒀
𝑭 = (𝑿 ̅ )(𝒁 + 𝑾)

The Boolean expression is in POS form. It should be converted into SOP and
simplified
̅+𝒀
𝑭 = (𝑿 ̅ )(𝒁 + 𝑾)
̅̅̅̅(𝒁 + 𝑾)
= 𝑿𝒀
̅̅̅̅𝒁 + 𝑿𝒀
𝑭 = 𝑿𝒀 ̅̅̅̅𝑾

Above expression cannot be simplified further.

 W XY . W

X XY
XY . W . XY . Z
Y

= XY . W + XY . Z
Z XY . Z
= XY . W + XY . Z

8. The minimum number of 2-input NAND gates required to implement the Boolean
function 𝑍 = 𝐴𝐵̅ 𝐶, assuming that A, B and C are available is
(a) Two (c) Five
(b) Three (d) Six
[GATE 1998: 1 Mark]
Ans. (c)
̅𝑪
𝒁 = 𝑨𝑩
Since there is only one term so can be implemented directly.
̅ 𝑪 = 𝑨𝑪𝑩
𝒁 = 𝑨𝑩 ̅

A AC AC
C
AC B
AC B

B B

9. The minimum number of NAND gates required to implement the Boolean function
𝐴 + 𝐴𝐵̅ + 𝐴𝐵̅ 𝐶 is equal to
(a) Zero (c) 4
(b) 1 (d) 7
[GATE 1995: 1 Mark]
Ans. (a)
̅ + 𝑨𝑩
Let 𝑭 = 𝑨 + 𝑨𝑩 ̅𝑪
̅ ) + 𝑨𝑩
= 𝑨(𝟏 + 𝑩 ̅𝑪
̅𝑪
= 𝑨 + 𝑨𝑩
̅ 𝑪)
= 𝑨(𝟏 + 𝑩
=𝑨
So to implement above function no NAND gate is required.

10. The Boolean expression for the output of EX-NOR (equivalence) logic gate with
inputs A and B is
(a) 𝐴𝐵̅ + 𝐴̅𝐵 (c) (𝐴̅ + 𝐵)(𝐴 + 𝐵̅ )
(b) 𝐴̅𝐵̅ + 𝐴𝐵 (d) (𝐴̅ + 𝐵̅ )(𝐴 + 𝐵)
[GATE 1993: 1 Mark]
Ans. The Boolean expression in SOP form for EX-NOR gate is
̅𝑩
𝑭=𝑨 ̅ + 𝑨𝑩

i.e. output is 1 when both inputs are same. The expression in POS form can be
derived from SOP

𝑨 ⊕ 𝑩 = ̅̅̅̅̅̅̅̅̅̅̅̅
𝑨ʘ𝑩 = ̅̅̅̅̅̅̅̅̅ ̅ +𝑨
𝑨𝑩 ̅𝑩

= ̅̅̅̅
𝑨𝑩̅ . ̅̅̅̅
̅𝑩
𝑨
̅ + 𝑩). (𝑨 + 𝑩
= (𝑨 ̅)

Option (c) is in POS form

Option (b) is in SOP form

11. The output of the logic gate in figure is

A
F

(a) 0 (c) 𝐴̅
(b) 1 (d) A
[GATE 1997: 1 Mark]
Ans. Given gate is EX-NOR gate

𝑨ʘ𝑩 = ̅̅̅̅̅̅̅̅̅
𝑨⊕𝑩=𝑨 ̅𝑩
̅ + 𝑨𝑩

Here one input is grounded say B is grounded

 ̅ + 𝑨. 𝟎
̅. 𝟎
𝑭 = 𝑨ʘ𝑩 = 𝑨
̅
𝑭=𝑨
̅
So the output is 𝑭 = 𝑨
Option (c)

12. For the circuit shown below the output F is given by

X
F

(a) 𝐹 = 1 (c) 𝐹 = 𝑋
(b) 𝐹 = 0 (d) 𝐹 = 𝑋̅
[GATE 1998: 1 Mark]
Ans. Output of first EX-OR gate is 𝑭𝟏 = 𝑿 ⊕ 𝑿 = 𝟎
Output 2nd EX=OR gate

X F1
F2
F

𝑭𝟐 = 𝑿 ⊕ 𝟎 = 𝑿
Note if X = 1, then output is 1
If X = 0, then output is 0
So whatever is the input the output is same so F2 = X
Output of 3rd EX-OR 𝑭=𝑿⊕𝑿=𝟎
Option (b)
13. For the logic circuit shown in the figure, the required input condition (A,B,C) to make
the output X =1 is
A
B

X
C

(a) 1, 0, 1 (c) 1, 1, 1
(b) 0, 0, 1 (d) 0, 1, 1
[GATE 2000: 1 Mark]
Ans. (d)
As per the result the output X has to be 1, so all the inputs of AND gate
should be 1.
i.e. C must be equal to 1.
One input to EX-NOR is 1(i.e. C)
The other input should also be 1 to get the 1 output i.e. B=1
One of the input to EX-OR is 1(B=1) the other input has to be 0 to get 1
output at EX-OR Gate.
So, A=0 , B=1 And C=1
Option (d)

14. If the input to the digital circuit (in the figure) consisting of cascaded 20 XOR gates is
X, then output Y is equal to
1
1
2
19 Y
20

(a) 0 (c) 𝑋̅
(b) 1 (d) X
[GATE 2002: 1 Mark]
Ans. (b)
Output of first XOR
 ̅ 𝑩 + 𝑨𝑩
𝑭𝟏 = 𝑨 ̅ = 𝟎. 𝑿 + 𝟏. 𝑿
̅=𝑿
̅

Output of 2nd XOR

̅⊕𝑿=𝟏
𝑭𝟐 = 𝑿
Now the 3rd XOR has the same input as first gate. So after 4, 6, 8, …..20th XOR
the output will be 1.

15. Which of the following Boolean expressions correctly represents the relation between
P, Q, R and M1.
P
X
Q

Z
M1

(a) M1 = (P OR Q) XOR R (c) M1 = (P NOR Q) XOR R

(b) M1 = (P AND Q) XOR R (d) M1 = (P XOR Q) XOR R
[GATE 2008: 1 Mark]
Ans. (d)
Boolean expression for the given circuit is
̅̅̅̅̅̅
𝑴𝟏 = [𝑷. 𝑸. (𝑷 + 𝑸)] ⊕ 𝑹

= [( ̅ ̅̅̅̅. (𝑷 + 𝑸)] ⊕ 𝑹
𝑷 + 𝑸)

The expression in the bracket is POS form of XOR gate

So, 𝑴𝟏 = [𝑷 ⊕ 𝑸] ⊕ 𝑹
16. For the output F to be 1 is the logic circuit shown, the input combination should be
A
B

C
(a) 𝐴 = 1, 𝐵 = 1, 𝐶 = 1 (c) 𝐴 = 0, 𝐵 = 1, 𝐶 = 0
(b) 𝐴 = 1, 𝐵 = 0, 𝐶 = 0 (d) 𝐴 = 0, 𝐵 = 0, 𝐶 = 1
[GATE 2010: 1 Mark]
Ans. (d)
The same inputs A and B are connected to EX-OR and EX-NOR gates. So the
Output of them will be complement of each other i.e. 0,1 or 1,0 .
For F to be 1, the inputs to EX-NOR should be even (even number of 1’s).
For the input 1’s to be even numbers C has to be 1.
There is only one option with C=1 i.e. option (d).

17. The output of the circuit shown is equal to

A

A
B
(a) 0 (c) 𝐴̅𝐵 + 𝐴𝐵̅
(b) 1 (d) ̅̅̅̅̅̅̅̅̅̅̅
(𝐴 ⊕ 𝐵) ⊕ (𝐴 ⊕ 𝐵)
[GATE 1995: 1 Mark]
Ans. (b)
Boolean expression for output
̅ )ʘ(𝑨
𝑭 = (𝑨ʘ𝑩 ̅ ʘ𝑩)

Using associative property we can write

̅ )ʘ(𝑩
𝑭 = (𝑨ʘ𝑨 ̅ ʘ𝑩)
=𝟎ʘ𝟎
=1
̅=𝟎
Note that 𝑨ʘ𝑨
̅ are complement of each other that
Since 𝑨 𝒂𝒏𝒅 𝑨
If 𝑨 = 𝟏, ̅ = 𝟎,
𝑨 𝒔𝒐 ̅=𝟎
𝑨ʘ𝑨
Similarly the 2nd term.
̅ ʘ 𝑩) =0
(𝑩