Diffusion

Impurity incorporation in semiconductors

• All semiconductor devices use multiple impurity regions.
• Eg: diode has two regions p-type and n-type.
• We start with say n-type region doped with n-type impurities say
phosphorous (or arsenic). This can be starting wafer from crystal growth.
• To make a diode, we must introduce p-type impurities (boron) in this
substrate.
• Introduction of impurities should be controllable both in total impurities
needed and depth to which these impurities should penetrate.
• Impurities can be incorporated in silicon crystal by following processes:
• 1. During CZ crystal growth, we add fixed amount of desired impurities in
the melt.
• 2. During FZ crystal growth, crystal can be doped by zone-levelling
technique.

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• 3. In epitaxial growth, impurities gets uniformly distributed in the growth
process.
• 4. Solid state diffusion is major source of impurity incorporation.
• 5. Ion implantation is the most popular technique of impurity incorporation.

• However more important issue is to know how these impurities transport in

crystalline material. This process of transport is known as ‘Diffusion’. Any
time – temperature cycle sees impurities – diffusion in space of the crystal.
• Definition: Diffusion is the process by which atoms move in crystal lattice.
The motion of an impurity atom in a lattice takes place in series of random
jump (3D process). The net jump position is statistical average.
• Hence for controlled and specific impurity motion, one must study ‘
physics of diffusion’.
• It should be noted that even Si atoms diffuse in Si (by diffusion) and the
process is called ‘self diffusion’.

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• How do impurities influence electrical behaviour of semiconductor
(devices/circuits)?
• Electrical properties are influenced by:
• 1. Type of majority carriers
• 2. carrier concentration
• 3. carrier concentration gradients
• 4. carrier lifetime
• 5. internal electrical field
• Impurities used in semiconductor devices show energy level/s in
semiconductor bandgap.
• N-type impurities show energy level close to (but below) the conduction
band edge, while p-type show energy level close to valance band edge.

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• i) Source and drain regions are created in substrate with opposite doping.
• ii) Doped poly gives metal like resistivity for gate.
• iii) Parasitics like RS, RD, Rext, Rcontact impact the Idsat, the drive current.
• iv) Short-channel effects are defined the doping around S and D in MOS.
• v) Leakage currents are function of S and D and substrate doping.

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 W

n/p t
L

• Resistance of semiconductor bar with known doping.

𝜌𝜌𝜌𝜌 𝜌𝜌𝜌𝜌 𝜌𝜌 𝐿𝐿
𝑅𝑅 = = = ( )( )
𝐴𝐴 𝑊𝑊𝑊𝑊 𝑡𝑡 𝑊𝑊
𝜌𝜌
( ) is called Sheet Resistivity or sheet resistance RS.
𝑡𝑡
𝐿𝐿
∴ 𝑅𝑅 = 𝑅𝑅𝑆𝑆
𝑊𝑊
𝐿𝐿
( ) is seen as Aspect Ratio.
𝑊𝑊
1
𝜎𝜎 = 𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐𝑐 = = q𝜇𝜇𝑛𝑛 𝑛𝑛 + 𝑞𝑞𝜇𝜇𝑝𝑝 𝑝𝑝
𝜌𝜌
If we apply voltage V across the bar,
𝑉𝑉
Then 𝐸𝐸 = = electric field along direction of current flow.
𝐿𝐿

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The current density 𝐽𝐽 = 𝜎𝜎𝜎𝜎
• vi) In the doped region, the sheet resistance is evaluated as
𝜌𝜌
𝑅𝑅𝑆𝑆 =
𝑥𝑥𝑗𝑗
1
Where 𝑥𝑥𝑗𝑗 is junction depth and 𝜌𝜌 = is specific resistivity.
(q𝜇𝜇𝑛𝑛 𝑛𝑛+𝑞𝑞𝜇𝜇𝑝𝑝 𝑝𝑝)

If n is not uniform along x (direction of current flow) then we have n(x) and
p(x) functions.
If NB is base or background concentration and doping of No
impurities are done from surface, Nsurface = NO
then average 𝜎𝜎 is
N(x)
1 𝑥𝑥𝑗𝑗
𝜎𝜎 = � 𝑞𝑞 𝑛𝑛 𝑥𝑥 − 𝑁𝑁𝐵𝐵 𝜇𝜇𝑛𝑛 (𝑥𝑥)
𝑥𝑥𝑗𝑗 0 n xj
1 1 1
∴ 𝑅𝑅𝑆𝑆 = = =
𝑥𝑥𝑗𝑗 𝜎𝜎𝑥𝑥𝑗𝑗 ∫𝑥𝑥𝑗𝑗 𝑞𝑞 𝑛𝑛 𝑥𝑥 − 𝑁𝑁𝐵𝐵 𝜇𝜇𝑛𝑛 (𝑥𝑥) N (p-type)
0 B
This relation is calculated to generate the so-called Irvin’s curves.

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 Nature of Diffusion
• Impurities can contribute to resistivity only if they occupy substitutional
site on silicon crystal. Point defects are very useful in impurity
incorporation.

NeMo IN FEb
1. Interstitial Diffusion

• There are relatively large number of interstitial sites in Si.

• Movement is very fast.
• Since lattice vibrates (even at room temperature)
it has frequency ν0: 1012-1014/s
• If interstitial impurity atom has to jump to another
site, it as to overcome energy barrier.

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 EM

• At 700°C to 1200°C temperature, thermal vibrations occur with frequency

𝜗𝜗, function of temperature.
−𝐸𝐸𝑚𝑚
�𝑘𝑘𝑘𝑘
• Then 𝜗𝜗 = 4𝜗𝜗𝑜𝑜 𝑒𝑒
• where 𝐸𝐸𝑀𝑀 is barrier energy.
• Energy barrier EM: 0.6-1.2eV

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2. Substitutional diffusion
• Diffusion is from one substitutional site to another.
• Essentially this is a vacancy related process.
• As no. of vacancies are fewer than interstitial sites, the jump rate of this
diffusion process is smaller.
• ES: 3-4 eV
• Occurrence of vacancies is proportional to 𝑒𝑒 −𝐸𝐸𝑆𝑆 ⁄𝑘𝑘𝑘𝑘 𝐸𝐸𝑆𝑆 is binding energy.
−(𝐸𝐸𝑆𝑆 +𝐸𝐸𝑛𝑛
�𝑘𝑘𝑘𝑘
• 𝜗𝜗 = 4𝜗𝜗𝑜𝑜 𝑒𝑒

Si atom

Vacancy
Substitutional
impurity atom

Es: 3-4eV

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3. Combinational Diffusion
P

• Both substitutional and interstitial diffusion of impurity.

• This process has large probability of occurrence.
• An interstitial silicon atom displaces a substitutional impurity, driving it to
an interstitial site where it diffuses some distance before it returns to a
substitutional site.
• If NS and NI are conc. Of available substitutional and
interstitial sites at temp. T then effective jump frequency
𝜗𝜗𝑆𝑆 𝑁𝑁𝑆𝑆 𝜗𝜗𝐼𝐼 𝑁𝑁𝐼𝐼
𝜗𝜗𝑒𝑒𝑒𝑒𝑒𝑒 = +
𝑁𝑁𝑠𝑠 +𝑁𝑁𝐼𝐼 𝑁𝑁𝑠𝑠 +𝑁𝑁𝐼𝐼
Conc. of both defects are relative to each other.
However it is important to note that natural random jump
events may not be very large. However conc. gradient of
impurities will dominate the diffusion process.

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• Maximum impurity concentration which can be incorporated in another
lattice without disturbing lattice structure at a given temperature is called
Solid Solubility.

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 Fick’s Laws
• Now, the mathematical analysis of diffusion, if we view it only in one
dimension that is just the movement of diffusion atom in this direction, one
dimensional analysis is done by Fick’s law .
𝜕𝜕𝜕𝜕
𝑗𝑗 = −𝐷𝐷 …………..1
𝜕𝜕𝜕𝜕
• j stands for the flux. Flux is rate of transfer of solute or the dopant per unit
area. This is valid for a dilute solution.
• N is the concentration of dopant, x is the direction in which the movement
of the dopant atom is taking place.
• D is the diffusion coefficient that is given by
−𝐸𝐸𝐴𝐴
𝐷𝐷 = 𝐷𝐷𝑂𝑂 exp
𝑘𝑘𝑘𝑘
• 𝐷𝐷𝑂𝑂 is considered to be independent of temperature. the value of this
activation energy is actually going to tell how difficult or how easy it is for
the dopant atoms to move inside the semiconductor.

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• The dopant atoms are moving from the left to the right.

P1 P2

dx

• Physically the dopant atoms are moving in, crossing the plane P1, moving
towards the right. The planes are separated by an incremental distance dx.
• In this movement of dopant atoms, there is going to be some accumulation
of the dopant species in between these two planes. Let N to be the
concentration of the dopant atoms. If dopant atoms are going to be
accumulating, then there is going to be a change in this concentration.
𝜕𝜕𝑁𝑁
• So is going to give me the rate of change in the dopant atom
𝜕𝜕𝑡𝑡
concentration. This is the rate at which the dopant atom concentration is
changing.

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 𝜕𝜕𝑁𝑁
𝐴𝐴. 𝑑𝑑𝑑𝑑 = 𝐴𝐴 𝑗𝑗 𝑥𝑥 − 𝑗𝑗 𝑥𝑥 + 𝑑𝑑𝑑𝑑
𝜕𝜕𝑡𝑡
• Adx is actually the incremental volume.
𝜕𝜕𝜕𝜕
• Adx is rate of accumulation of the dopant atoms in between these two
𝜕𝜕𝜕𝜕
planes.
• This is going to be equal to the change in the flux density. The difference of
the two fluxes multiplied by the area is also going to be the rate of
accumulation of the dopant atoms.
𝜕𝜕𝜕𝜕 𝜕𝜕𝑗𝑗
=−
𝜕𝜕𝜕𝜕 𝜕𝜕𝑥𝑥
• When the limit dx→0 then,
𝜕𝜕𝜕𝜕 𝑗𝑗 𝑥𝑥 + 𝑑𝑑𝑑𝑑 − 𝑗𝑗(𝑥𝑥)
=−
𝜕𝜕𝜕𝜕 𝑑𝑑𝑑𝑑
Now, from the first law of Fick’s, If we substitute for this j, then we can write
that this is equal to
𝜕𝜕𝜕𝜕 𝜕𝜕 𝜕𝜕𝜕𝜕
= 𝐷𝐷 ………..2
𝜕𝜕𝜕𝜕 𝜕𝜕𝜕𝜕 𝜕𝜕𝜕𝜕

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• If D is a constant then
𝜕𝜕𝜕𝜕 𝜕𝜕 2 𝑁𝑁
= 𝐷𝐷 2
𝜕𝜕𝜕𝜕 𝜕𝜕𝑥𝑥
• This is called Fick’s simple law of diffusion; simple, because we are taking
the easier option that is the diffusion coefficient is a constant.
• If it is governed by doping profile then one possibility is to have an infinite
source of diffusion. That means that the surface concentration of the dopant
is always a constant. The surface concentration is given by its maximum
possible value. That is the limit governed by solid solubility limit.
• When I have an infinite source, the surface concentration at most can be
equal to the solid solubility limit of the dopant in the semiconductor. So, no
matter for how long I carry out the diffusion, the infinite source is infinite,
it is very big, so the surface concentration is never allowed to fall from this
solid solubility limit. That is called the infinite source diffusion or
sometimes the constant source diffusion; source is a constant, infinite.

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 Infinite Source
• The boundary conditions are: 𝑁𝑁 0, 𝑡𝑡 = 𝑁𝑁0
𝑁𝑁 ∞, 𝑡𝑡 = 0
• Initial condition: 𝑁𝑁 𝑥𝑥, 0 = 0

Constant surface concentration

• doping concentration in the crystal is given as
𝑥𝑥
𝑁𝑁 𝑥𝑥, 𝑡𝑡 = 𝑁𝑁0 𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒
2√𝐷𝐷𝐷𝐷
𝐷𝐷𝐷𝐷
𝑄𝑄 = 2𝑁𝑁0
𝜋𝜋
• D being the diffusion coefficient, t is time
erfc 𝑥𝑥 = 1 − erf 𝑥𝑥
2 𝑥𝑥
erf 𝑥𝑥 = � exp(−𝑧𝑧 2 )dz
√𝜋𝜋 0
2 ∞
erfc 𝑥𝑥 = � exp −𝑧𝑧 2 𝑑𝑑𝑑𝑑
√𝜋𝜋 0
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• This is shape or the nature of the complementary error function profile.
• all of these curves start from the same surface doping concentration
• For however long the diffusion is carried out, if it is an infinite source
diffusion that is if the doping profile is governed by the complementary
error function curve, then you see at x=0, this term is going to be zero.
Therefore, the complementary error function value is going to be 1 and N is
always equal to N0 at x = 0 , no matter what the time.
• Important things regarding this doping profile, regarding the infinite source
diffusion: (i) doping profile follows the complementary error function type,
(ii) the surface concentration is given always by the solid solubility limit,N0
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• In order to obtain total amount of • The third important parameter that
impurity Q which has been is the total amount of impurity that
introduced in the semiconductor has been introduced during this
during this diffusion is given by diffusion. This is actually
integrating under the curve. dependent on the time of diffusion.
∞
𝑄𝑄 = � 𝑁𝑁 𝑥𝑥, 𝑡𝑡 𝑑𝑑𝑑𝑑 • The more, the longer period you
0 diffuse, the more impurity is going
∞
𝑥𝑥 to be introduced.
𝑄𝑄 = � 𝑁𝑁0 𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒 𝑑𝑑𝑑𝑑
0 2√𝐷𝐷𝐷𝐷 • √𝐷𝐷𝐷𝐷 has the unit of length. It is
𝑥𝑥
𝑧𝑧 = often referred to as the diffusion
2√𝐷𝐷𝐷𝐷 length. Also, it is a measure of
𝑑𝑑𝑑𝑑
𝑑𝑑𝑑𝑑 = junction depth which is fourth
2√𝐷𝐷𝐷𝐷 important factor.
∞
𝑄𝑄 = 𝑁𝑁0 2√𝐷𝐷𝐷𝐷 � 𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒 𝑑𝑑𝑑𝑑
0

𝐷𝐷𝐷𝐷
𝑄𝑄 = 2𝑁𝑁0
𝜋𝜋

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• How to find junction depth?
• We know the background doping concentration that is the substrate doping
concentration. Before diffusion the substrate must have had some doping
concentration.
• How do we define the junction?
• If the substrate had this doping concentration NB uniform doping
concentration, then at the point at which the complementary error function
profile is going to cut it, intersect it, that is going to be my junction depth.
In other words, that is the point where the two impurity concentrations are
going to be same.
𝑥𝑥𝑗𝑗
𝑁𝑁𝐵𝐵 = 𝑁𝑁0 𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒
2√𝐷𝐷𝐷𝐷
• If you want to have a deep junction, either carry out the diffusion for longer
time or try to increase the diffusion coefficient by increasing the
temperature.

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 Revisit
• If diffusion coefficient D is assumed to be a constant, then the doping
profile can be expressed as:
𝜕𝜕𝜕𝜕 𝜕𝜕 2 𝑁𝑁
= 𝐷𝐷 2
𝜕𝜕𝜕𝜕 𝜕𝜕𝑥𝑥
• Solving this differential equation under carious boundary and initial
conditions, there are two possibilities:
• 1. Infinite source
• Means the surface concentration is dictated only by the solid solubility
limit.
• So, we also call the infinite source diffusion as the constant surface
concentration case.
𝑥𝑥
• The doping profile is 𝑁𝑁 𝑥𝑥, 𝑡𝑡 = 𝑁𝑁0 𝑒𝑒𝑒𝑒𝑒𝑒𝑒𝑒 where 𝑁𝑁0 is actually the solid
2√𝐷𝐷𝐷𝐷
solubility limit.

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 Revisit
• In a doping profile, the important parameters are
• i) The surface concentration, which in this case is fixed at 𝑁𝑁0
• ii) The total impurity that is the area under the doping concentration profile
curve.
• This is often referred to as pre-deposition.
• This diffusion is carried out with the source on at given temperature for
specific time.
• It follows complementary error function profile which is very abrupt i.e.
junction depth is very small. Total amount of impurity lies in a thin sheet of
charge very close to the surface of the semiconductor.
• In the next step, the source is shut off and the sample with this thin sheet of
dopant material already incorporated very close to the surface is subjected
further to high temperature processing .

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• As the source is shut off, there is no possibility of any new impurity
coming into the semiconductor.
• Hence it is called constant impurity case.
• That is the total amount of impurity is fixed by the time of pre deposition,
by the time and temperature of pre deposition.
• The infinite source diffusion is called the pre deposition step and the
constant total impurity diffusion is called the drive-in step.

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Constant total impurity
• Initial condition: The doping concentration is 0 at the beginning.
𝑁𝑁 𝑥𝑥, 0 = 0
• The boundary conditions will change.
∞
• Constant total impurity means that ∫0 𝑁𝑁𝑁𝑁𝑁𝑁 is a constant = Q.
∞
� 𝑁𝑁𝑁𝑁𝑁𝑁 = 𝑄𝑄
0
• At a very large distance from the surface the doping concentration =0.
𝑁𝑁 ∞, 𝑡𝑡 = 0
• Solving them,
𝑄𝑄 𝑥𝑥 2
𝑁𝑁 𝑥𝑥, 𝑡𝑡 = exp(− )
√𝜋𝜋𝜋𝜋𝜋𝜋 4𝐷𝐷𝐷𝐷
• Gaussian profile

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• In this case the surface concentration is no longer fixed by the solid
solubility limit. As drive-in progresses, the surface concentration is going to
come down.
𝑄𝑄
𝑁𝑁𝑆𝑆 = 𝑁𝑁 0, 𝑡𝑡 =
√𝜋𝜋𝜋𝜋𝜋𝜋
• Junction depth: that point inside the semiconductor at which the impurity
concentration equals the substrate background doping concentration or the
point where N becomes equal to the background doping concentration NB.

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• For 𝑥𝑥𝑗𝑗 → 𝑁𝑁 = 𝑁𝑁𝐵𝐵
𝑄𝑄 𝑥𝑥𝑗𝑗 2
𝑁𝑁𝐵𝐵 = exp −
√𝜋𝜋𝜋𝜋𝜋𝜋 4𝐷𝐷𝐷𝐷
𝑄𝑄
• Also, 𝑁𝑁𝑆𝑆 = 𝑁𝑁 0, 𝑡𝑡 =
√𝜋𝜋𝜋𝜋𝜋𝜋
𝑥𝑥𝑗𝑗 2
𝑁𝑁𝐵𝐵 = 𝑁𝑁𝑆𝑆 exp −
4𝐷𝐷𝐷𝐷
• 𝑥𝑥𝑗𝑗 is a function of Dt as well as the ratio of NB and NS . These are the two
factors which determine the junction depth.
• Dt actually has the dimensions of cm2 or √Dt has the dimensions of length.
• It affects the junction depth, because it is going to dictate how much the
dopants have moved inside the semiconductor.
• As time increases the junction depth is going to be larger. That is the
dopants are going to move deeper and deeper into the semiconductor
material.

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• These 2 were the cases when D was constant.
𝜕𝜕𝜕𝜕 𝜕𝜕 𝜕𝜕𝜕𝜕
= 𝐷𝐷
𝜕𝜕𝜕𝜕 𝜕𝜕𝜕𝜕 𝜕𝜕𝜕𝜕
• In this equation if D is not constant then it cannot be taken out to form
simple diffusion equation.
• D is now a function of concentration. D = f(N)
• in a practical situation, depending on the circumstances, D can either be a
constant or D can be a function of concentration.
• Under such conditions, let us say:
𝐷𝐷 ∝ 𝑁𝑁
𝐷𝐷 = 𝐾𝐾𝐾𝐾
When surface concentration is NS then diffusion coefficient is DS.
𝐷𝐷𝑆𝑆 = 𝐾𝐾𝑁𝑁𝑆𝑆
𝐷𝐷𝑆𝑆
𝐾𝐾 =
𝑁𝑁𝑆𝑆
𝑁𝑁
𝐷𝐷 = 𝐷𝐷
𝑁𝑁𝑆𝑆 𝑆𝑆

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• Similarly, if 𝐷𝐷 ∝ 𝑁𝑁 2
𝑁𝑁 2
𝐷𝐷 = 𝐷𝐷𝑆𝑆
𝑁𝑁𝑆𝑆 2
• If 𝐷𝐷 ∝ 𝑁𝑁 3
𝑁𝑁 3
𝐷𝐷 = 3 𝐷𝐷𝑆𝑆
𝑁𝑁𝑆𝑆
• Computer simulation taking these things into account and assuming an
infinite source diffusion will have the profile like: Fall is much steeper as
order increases. When D = f(N) then profile is called box like profile.

𝑁𝑁/𝑁𝑁𝑁𝑁
𝐷𝐷 = 𝐷𝐷𝑆𝑆

𝑁𝑁
𝐷𝐷 = 𝐷𝐷
𝑁𝑁 3 𝑁𝑁𝑆𝑆 𝑆𝑆
𝐷𝐷 = 𝐷𝐷𝑆𝑆
𝑁𝑁𝑆𝑆 3
𝑁𝑁 2
𝐷𝐷 = 𝐷𝐷𝑆𝑆
𝑁𝑁𝑆𝑆 2

0.4 0.8
VLSI Fabrication Technology 𝑦𝑦 = 𝑥𝑥/2√𝐷𝐷𝐷𝐷 28
• Then junction depth is given as,
𝑁𝑁
𝑥𝑥𝑗𝑗 = 1.616 𝐷𝐷𝑆𝑆 𝑡𝑡 ← 𝐷𝐷 ∝ 𝑁𝑁 → 𝐷𝐷
𝑁𝑁𝑆𝑆 𝑆𝑆
2
𝑁𝑁
𝑥𝑥𝑗𝑗 = 1.019 𝐷𝐷𝑆𝑆 𝑡𝑡 ← 𝐷𝐷 ∝ 𝑁𝑁 2 → 2 𝐷𝐷𝑆𝑆
𝑁𝑁𝑆𝑆
3
𝑁𝑁
𝑥𝑥𝑗𝑗 = 0.87 𝐷𝐷𝑆𝑆 𝑡𝑡 ← 𝐷𝐷 ∝ 𝑁𝑁 3 → 3 𝐷𝐷𝑆𝑆
𝑁𝑁𝑆𝑆
• if we have the same surface concentration and the same time then for
𝐷𝐷 ∝ 𝑁𝑁 the junction depth will be double as that for 𝐷𝐷 ∝ 𝑁𝑁 3 .
• D shows a higher power dependence on the doping concentration, the
junction becomes shallower and of course the profile also become steeper .
• What really happens?
• In a real life situation, should D be considered as a constant or should it be
considered as a function of the doping concentration.
• Diffusion takes places at high temperature and intrinsic concentration is
also a function of temperature.

VLSI Fabrication Technology 29

• As the temperature increases, the intrinsic carrier concentration of
semiconductor is also going to increase.
• Now, at the diffusion temperature, if the intrinsic carrier concentration is
much higher than the impurity concentration, then the diffusion coefficient
D can be modeled as independent of concentration that is the D=constant
case.
• On the other hand, if the impurity concentration is very high, much higher
than the intrinsic carrier concentration of the semiconductor even at the
diffusion temperature, then the diffusion coefficient is assumed to be a
function of the doping concentration

VLSI Fabrication Technology 30

• What is going to happen at the time of diffusion?
• Let us consider the substitutional impurities –they are electronically active
and therefore the most important .
• For substitutional diffusion, the dopant atoms replace silicon in the lattice
site, in order to do so there must be vacancies which are point defects.
• These vacancies must be available in the lattice, so the diffusion is
primarily a process where the dopant impurity is going to interact with
these points defects and these point defects can be in various charge states.
• They can be neutral, positively charged or negatively charged.
• The reaction of the dopant atoms with these vacancies, depending on their
charge states, will depend on the concentration (electron and hole
concentration) and therefore the diffusion coefficient will become a
function of concentration.

VLSI Fabrication Technology 31

• On the other hand,
if at the diffusion temperature the intrinsic carrier concentration of the
semiconductor is going to dominate, then the diffusion coefficient can be
taken to be independent of the doping concentration.
• In that case, the doping profile can be modeled for the infinite source case
as the complementary error function profile and the constant total impurity
case as the Gaussian profile.
• In practical diffusion system, the first step is pre-deposition which is an
infinite source diffusion. the total amount of impurity that is put inside the
semiconductor is given by
2 N 0 D1t1
Q=
π
• D1 and t1 are used to characterize the pre-deposition process.
• In the samples are subjected to drive-in.
• Drive-in is nothing but the constant total impurity case. That is now the
source has been shut and this amount of impurity is going to be there, that
is the total amount of impurity

VLSI Fabrication Technology 32

• The surface concentration is given as:
Q
NS =
πD2t 2
• Suffix 2 indicates that drive-in is the second step and these two processes
are not necessarily carried out at the same temperature.
• That is why the diffusion coefficients are different depending on the
temperature. Of course, the pre deposition time and the drive-in time are
also different.
• Now we know Q, because Q was put during the pre-deposition case. This
gives:
2 N 0 D1 t1
NS =
π D2t 2
• In a practical situation, D1t1 << D2t2
• the surface concentration is going to be very much less than the solid
solubility limit .

VLSI Fabrication Technology 33

Successive diffusions
• Example of a BJT
( Dt ) eff = D1t1 + D2t 2 + ...

• Substrate n-type- collector

• Base diffusion
Pre deposition -> D1t1
Drive-in -> D2t2
• Emitter diffusion
Only pre deposition ->D3t3
• Therefore Base diffusion
• Dteff= D1t1 + D2t2 + D3t3

VLSI Fabrication Technology

• Successive diffusions using different times and temperatures
• Final result depends upon the total Dt product
(Dt )eff = ∑ Diti
i
• What is going to be the final shape of the doping profile?
• Well, in most cases since the drive-in time and temperature is much larger
than the infinite source predeposition time and temperature, the final
doping profile will be approximately Gaussian.
• The Gaussian solution holds only if the Dt used to introduce the dopant is
small compared with the final Dt for the drive-in.
• When D is the same (same temperature) (Dt )eff = D (t1 + t 2 + ... + t n )
• When diffused at different temperatures

(Dt )eff = D1t1 + D2t 2 + ... = D1t1 + D2t 2 + ...

• As D increases exponentially with temperature, total diffusion (thermal

budget) is mainly determined by the higher temperature processes.

VLSI Fabrication Technology 35

 Junction formation in Two-step diffusion
• We have
2𝑁𝑁01 𝐷𝐷1 𝑡𝑡1 𝑥𝑥 2
𝑁𝑁 𝑥𝑥, 𝑡𝑡1 , 𝑡𝑡2 = exp(− )
𝜋𝜋 (𝐷𝐷𝐷𝐷)𝑒𝑒𝑒𝑒𝑒𝑒 4 𝐷𝐷𝐷𝐷 𝑒𝑒𝑒𝑒𝑒𝑒
• At x = 0 𝑁𝑁 𝑥𝑥, 𝑡𝑡1 , 𝑡𝑡2 = 𝑁𝑁𝑆𝑆 surface concentration
2𝑁𝑁01 𝐷𝐷1 𝑡𝑡1 𝑥𝑥 2
or 𝑁𝑁𝑆𝑆 = or 𝑁𝑁 𝑥𝑥, 𝑡𝑡1 , 𝑡𝑡2 = 𝑁𝑁𝑆𝑆 exp(− )
𝜋𝜋 (𝐷𝐷𝐷𝐷)𝑒𝑒𝑒𝑒𝑒𝑒 4 𝐷𝐷𝐷𝐷 𝑒𝑒𝑒𝑒𝑒𝑒

At junction 𝑁𝑁 𝑥𝑥, 𝑡𝑡1 , 𝑡𝑡2 = 𝑁𝑁𝐵𝐵

𝑥𝑥𝑗𝑗 2
𝑁𝑁𝐵𝐵 = 𝑁𝑁𝑆𝑆 exp(− )
4 𝐷𝐷𝐷𝐷 𝑒𝑒𝑒𝑒𝑒𝑒
𝑁𝑁𝑆𝑆
or 𝑥𝑥𝑗𝑗 2 = 4(𝐷𝐷𝐷𝐷)𝑒𝑒𝑒𝑒𝑒𝑒 ln( )
𝑁𝑁𝐵𝐵

𝑁𝑁𝑆𝑆
or 𝑥𝑥𝑗𝑗 = 2 (𝐷𝐷𝐷𝐷)𝑒𝑒𝑒𝑒𝑒𝑒 ln( )
𝑁𝑁𝐵𝐵

VLSI Fabrication Technology 36

 Irvin’s curves
• Motivation to generate Irvin’s curves: both NB (background carrier
concentration), Rs (sheet resistance) and xj can be conveniently measured
experimentally but not N0 (surface concentration). However, these four
1 1 1
parameters are related by: 𝑅𝑅𝑆𝑆 = = = 𝑥𝑥𝑗𝑗
𝑥𝑥𝑗𝑗 𝜎𝜎𝑥𝑥𝑗𝑗 ∫0 𝑞𝑞 𝑛𝑛 𝑥𝑥 −𝑁𝑁𝐵𝐵 𝜇𝜇𝑛𝑛 (𝑥𝑥)
xj
• Irvin’s curves are plots of N0 versus (Rs, xj) for various NB.
σ = ∫ σ (x )dx
1
xj 0

VLSI Fabrication Technology 37

Explicit relationship between: N0, xj, NB and RS.
Once any three parameters are know, the fourth one
can be determined.

VLSI Fabrication Technology 38

 Example
Design a boron diffusion process (say for the well or tub of a CMOS process) such that
ρs=900Ω/square, xj=3µm, with NB=1×1015/cm3.

VLSI Fabrication Technology 39

 Example
Design a boron diffusion process (say for the well or tub of a CMOS process) such that
ρs=900Ω/square, xj=3µm, with NB=1×1015/cm3.

The average conductivity of the layer is

From (half-Gaussian) Irvin’s curve, we find

Ns << solubility of B in Si, so it is correct to assume pre-deposition (here by ion
implantation) plus drive-in, which indeed gives a Gaussian profile.
VLSI Fabrication Technology 40
  x  2  x 2j 
N ( x, t ) =
Q
exp −  N B = N s exp − 
πDt  4 Dt   4 Dt 
 
Dt =
x 2j
=
(3 ×10 ) −4 2
= 3.7 ×10 −9 cm 2
 Ns   4 ×1017 
4 ln  4 ln 15

 NB   10 

Assume drive-in at 1100oC, then D=1.5×10-13cm2/s.

3.7 ×10 −9 cm 2
tdrive−in = −13
= 6.8 hours
1.5 ×10 cm sec2

Pre-deposition dose
Q = N s πDt = 4 ×1017 × π × 3.7 ×10 −9 = 4.3 ×1013 cm −2

VLSI Fabrication Technology 41

Now if we assume pre-deposition by diffusion from a gas or solid phase at
950oC, solid solubility of B in Si is Ns=2.5×1020/cm3, and D=4.2×10-15cm2/s.
The profile of this pre-deposition is erfc function.
Dt
Q = 2Ns
π
2
 4.3 × 10 13
 π
tpre− dep =   ×
20  −15
= 5.5 sec
 2 × 2.5 × 10  4.2 × 10

( )
Dt pre−dep 2.3 ×10 −14 << Dtdrive−in 3.7 ×10 −9( )
However, the pre-deposition time is too short for real processing, so
ion-implantation is more realistic for pre-deposition.

VLSI Fabrication Technology 42

 Actual doping profile
• During diffusion, the impurity moves inside the semiconductor by
interacting with the point defects.
• Substitutional impurities are the most important electronically.
• The movement is primarily governed by the interaction of the dopant atom
with the available vacant sites.
• These interactions can be expressed V0 + h+ → V+
V0 + e- → V-
• V with a zero on top, it means these vacancies are neutral. It can act as a
hole trap or as an electron trap.
• it is possible to have either a neutral vacancy or a positively charged
vacancy or a singly negatively charged vacancy or even doubly negatively
charged vacancies,

VLSI Fabrication Technology 43

• Applying the law of mass transfer,
[𝑉𝑉 + ]
𝐾𝐾 = 0
𝑉𝑉 [ℎ]
Where K is mass transfer coefficient, h = concentration of hole
• At diffusion temperature the semiconductor is behaving like an intrinsic
material that is the temperature is such that 𝑛𝑛𝑖𝑖 ≫ ℎ 𝑜𝑜𝑜𝑜 𝑒𝑒 then
[𝑉𝑉𝑖𝑖 + ]
𝐾𝐾 = 0
𝑉𝑉𝑖𝑖 𝑛𝑛𝑖𝑖
• For extrinsic semiconductor
[𝑉𝑉𝑖𝑖 + ] [𝑉𝑉𝑒𝑒 + ]
𝐾𝐾 = =
𝑉𝑉𝑖𝑖 0 𝑛𝑛𝑖𝑖 𝑉𝑉𝑒𝑒 0 𝑝𝑝
• The conc of neutral vacancies 𝑉𝑉𝑖𝑖 0 and 𝑉𝑉𝑒𝑒 0 are same. The creation of neutral
vacancies is going to be dependent only on the temperature of diffusion.
+ [𝑉𝑉𝑖𝑖 + ]𝑝𝑝
[𝑉𝑉𝑒𝑒 ] =
𝑛𝑛𝑖𝑖

VLSI Fabrication Technology 44

• By analogy
−
− [𝑉𝑉 𝑖𝑖 ]𝑛𝑛
[𝑉𝑉𝑒𝑒 ] =
𝑛𝑛𝑖𝑖
2− 2
2− [𝑉𝑉𝑖𝑖 ]𝑛𝑛
[𝑉𝑉𝑒𝑒 ] =
𝑛𝑛𝑖𝑖 2
• a relationship between the concentration of the charged vacancies in the
intrinsic and the extrinsic case .
• Considering the interaction of the impurity with the vacancies in various
states the total effective diffusion coefficient in intrinsic case can be:
𝐷𝐷𝑖𝑖 = 𝐷𝐷𝑖𝑖 0 + 𝐷𝐷𝑖𝑖 + + 𝐷𝐷𝑖𝑖 − + 𝐷𝐷𝑖𝑖 2−
• For extrinsic case
𝐷𝐷𝑒𝑒 = 𝐷𝐷𝑒𝑒 0 + 𝐷𝐷𝑒𝑒 + + 𝐷𝐷𝑒𝑒 − + 𝐷𝐷𝑒𝑒 2−
0 + − 2−
0 [𝑉𝑉 ] + [𝑉𝑉 ] − [𝑉𝑉 ] 2− [𝑉𝑉 ]
𝐷𝐷𝑒𝑒 = 𝐷𝐷𝑖𝑖 0 + 𝐷𝐷𝑖𝑖 + + 𝐷𝐷𝑖𝑖 − + 𝐷𝐷𝑖𝑖
[𝑉𝑉𝑖𝑖 ] [𝑉𝑉𝑖𝑖 ] [𝑉𝑉𝑖𝑖 ] [𝑉𝑉𝑖𝑖 2− ]
𝑝𝑝 𝑛𝑛 2
0 2− 𝑛𝑛
Finally, 𝐷𝐷𝑒𝑒 = 𝐷𝐷𝑖𝑖 + 𝐷𝐷𝑖𝑖 + + 𝐷𝐷𝑖𝑖 − + 𝐷𝐷𝑖𝑖
𝑛𝑛𝑖𝑖 𝑛𝑛𝑖𝑖 𝑛𝑛𝑖𝑖 2

VLSI Fabrication Technology 45

• Depending on which term is going to dominate we have either D equal to
constant, the first term which is not dependent on the concentration.
• In a real situation, the diffusion coefficient can get further modified if there
is very high doping concentration.
• What happens?
• When there is a very high doping concentration, the impurity may be
ionized. At the time of entering the semiconductor itself, it may be ionized
• There will be an electron concentration associated with this ionization.
• let us say I have positively charged impurity ion and the electron, electrons
will move faster they are much lighter than positively charged ions.
• In the process there will be a space charge region, because this electron is
separated from the positively charged ion.
• this will result in an electric field and the direction of the field will be such
as to aid the movement of the diffusing impurity.

VLSI Fabrication Technology 46

 Field-aided diffusion
• At high doping, apart from concentration gradient the flux will have effect
of the electric field. Diffusion and drift components both.
𝑑𝑑𝑑𝑑 𝑁𝑁 𝑁𝑁 2 −1
∂N ℎ=1+ =1+ [1 + ( ) ] 2
j = −D + µnE 𝑑𝑑𝑑𝑑 2𝑛𝑛𝑖𝑖 2𝑛𝑛𝑖𝑖
∂x 𝑁𝑁
≡1+
D =
kT
µ 𝑁𝑁 2 + 4𝑛𝑛𝑖𝑖 2
q
h is field enhancement factor or
kT 1 ∂n
E=− field aided factor .
q n ∂x It can be at most 2. It can be a
dn ∂N constant, a function of the dopant
∴ j = − D[1 + ]
dN ∂x concentration; can be
∂N proportional to the dopant
j = − Deff
∂x concentration or even
Deff = hD proportional to the square of the
doping concentration
VLSI Fabrication Technology 47
• Impurities get attached with charged vacancy state and form pair which
then diffuse as pair
• Boron: - I-V+, I-V0 pairs
• Phosphorous- I-V0, I-V- and I-V– pairs
• Arsenic- I-V0, I-V- and I-V– pairs
• This effect can be taken through diffusion coefficients:
2
0 + 𝑝𝑝 − 𝑛𝑛 2− 𝑛𝑛
𝐷𝐷𝑒𝑒𝑓𝑓𝑓𝑓 = ℎ 𝐷𝐷𝑖𝑖 + 𝐷𝐷𝑖𝑖 + 𝐷𝐷𝑖𝑖 + 𝐷𝐷𝑖𝑖
𝑛𝑛𝑖𝑖 𝑛𝑛𝑖𝑖 𝑛𝑛𝑖𝑖 2
For n-type dopants
2
𝑛𝑛 𝑛𝑛
𝐷𝐷𝑒𝑒𝑓𝑓𝑓𝑓 = 𝐷𝐷 0 + 𝐷𝐷 − + 𝐷𝐷 −−
𝑛𝑛𝑖𝑖 𝑛𝑛𝑖𝑖
For p-type dopants
𝑝𝑝
𝐷𝐷𝑒𝑒𝑒𝑒𝑒𝑒 = 𝐷𝐷 0 + 𝐷𝐷 +
𝑛𝑛𝑖𝑖

VLSI Fabrication Technology 48

 Actual dopants in silicon-Arsenic
• In case of arsenic doping in silicon, the effective
diffusion coefficient D is given by,
𝑛𝑛
• 𝐷𝐷 = ℎ 𝐷𝐷𝑖𝑖 0 + 𝐷𝐷𝑖𝑖 −
𝑛𝑛𝑖𝑖
• The first term is independent of the dopant
concentration and the second term is proportional to
the dopant concentration.
• this is determined by the interaction of arsenic with the
singly negatively charged vacancies.
• Normalized doping (N/NS) conc wrt junction depth
(X/Xj) – it is erfc profile.
• Abrupt, steep fall at the junction.
• concentration will be closer to the surface
concentration over a larger depth.

VLSI Fabrication Technology 49

 Actual dopants in silicon- Boron
• In case of boron doping in silicon, the effective
diffusion coefficient D is given by,
𝑝𝑝
• 𝐷𝐷 = ℎ 𝐷𝐷𝑖𝑖 0 + 𝐷𝐷𝑖𝑖 +
𝑛𝑛𝑖𝑖
• it is not as steep as that of arsenic.
• Relative dominance of II term is lower, lies between
erfc and arsenic profile.
• In both cases it results in steeper, more abrupt profile
than that predicted by the complementary error
function for infinite source diffusion obviously,
because D is not really a constant here, but there is a
term which is proportional to N .

VLSI Fabrication Technology 50

Actual dopants in silicon- Phosphorous
• phosphorus in silicon cannot be given by such a
simple doping profile.
𝑛𝑛 2
0 2− 𝑛𝑛
• 𝐷𝐷 = ℎ 𝐷𝐷𝑖𝑖 + 𝐷𝐷𝑖𝑖 − + 𝐷𝐷𝑖𝑖
𝑛𝑛𝑖𝑖 𝑛𝑛𝑖𝑖 2
• near the surface where the dopant concentration
is very high, the dominating term is going to be
III term 𝐷𝐷 ∝ 𝑛𝑛2 -very abrupt.
• there is hardly going to be a change from the
surface concentration, it is going to be truly box-
like and then it starts to fall abruptly, very
steeply.
• As the dopant concentration starts to fall very
steeply, the position of the fermi level changes

VLSI Fabrication Technology 51

• In flat topped portion, 𝐷𝐷 ∝ 𝑛𝑛2 , phosphorus impurity has interacted with the
doubly negatively charged vacancies P+-V2-.
• As the fermi level position changes, as it falls 0.11 eV below the conduction
band, this pair starts to dissociate.
• As the fermi level sweeps below 0.11 eV below the conduction band, some of
the levels must be empty. So, it is not possible for these vacancies to retain all
the electrons. they begin to release electrons and it dissociates.
• 𝑃𝑃+ 𝑉𝑉 2− → 𝑃𝑃+ 𝑉𝑉 − + 𝑒𝑒 −
• the singly negatively ionized vacancy and it releases one electron, because the
fermi level is now sweeping by.
• this is where we have a kink, because now the diffusion coefficient is no longer
proportional to n square
• the profile is no longer so abrupt, but it tends to be more flat and then as the
concentration is lower we enter into what is known as the tail region for the
phosphorus doping profile.
• In this tail region, there is further dissociation into the positively charged
phosphorus ions and the vacancies. So, in this process, there are more
vacancies released. That is because the binding energy of 𝑃𝑃+ 𝑉𝑉 − is
comparatively less. So, it dissociates more easily and in the process, we have a
lot of vacancies.

VLSI Fabrication Technology 52

• Because of these vacancies, there is an enhanced diffusion.
• It is known that diffusion is going to be primarily dependent on the
availability of the vacancies.
• in the tail region a number of vacancies are created, because of the
dissociation it leads to an extended tail into the bulk material.
• the phosphorus profile in silicon is characterized
• by a kink and tail. A kink here where there is a switchover from 𝐷𝐷 ∝ 𝑛𝑛2 to
𝐷𝐷 ∝ 𝑛𝑛 or D=constant case and then there is a tail because of the enhanced
vacancies.

VLSI Fabrication Technology 53

 Emitter push effect

• when we were diffusing phosphorus further away from the surface, there is
an enhanced diffusion, because of the creation of the vacancies. The
vacancies will be at the emitter base boundary. The base dopants will get
diffused. Their diffusion also will get more enhanced, because of the
presence of these vacancies because vacancies can migrate.
• If you do not want to have this emitter push effect, do not use phosphorus,
use arsenic. Arsenic will not give rise to this emitter push effect. There is
another problem associated with the diffusion process

VLSI Fabrication Technology 54

 Lateral diffusion

• We diffuse through a window in the mask.

• It will be diffused a bit more inside this is called the lateral diffusion.
• As we move away (deeper) from the surface the concentration falls;
Contour N/Ns falls.
• In such cases when NB is 100 times lower than the surface doping
concentration in that case it is found that the extent of lateral diffusion is 75
to 85 % of the vertical junction depth

VLSI Fabrication Technology 55

 0.8μ 1μ 0.8μ

1μ

• to have a junction depth of 1 micron, this window size is 1 micron then

actually this will be 0.8 on either sides.
• Even though window size is 1 micron, you will actually have it as 2.6.
• obviously the deeper the junction depth is, the more will be the spread.
• If instead of 1 micron if it is 10 micron, this 1 micron window does not
have any meaning at all, because diffused region will be something like 17
micron.
• This might lead to shorting with the near-by junctions and devices.

VLSI Fabrication Technology 56

 Diffusion Techniques
• A typical requirement/requirements for diffusion system:
i. Diffusing impurity should be brought in contact with pre-cleaned silicon
wafer.
ii. It should also remain in contact with wafer for given time and specified
temperature.
iii. A diffusing system should be such that it should be possible to vary
surface conc. Ns up to solid solubility limits.
iv. The diffusion process be such that it does not damage the surface of the
wafer.
v. After diffusion process, the impurities and other materials on wafer
surface should be easily removable.
vi. The diffusion system should be able to give reproducible results in many
runs.
vii. The diffusion system be such that ‘batch-processing is possible as this is
the need of manufacturing.

VLSI Fabrication Technology 57

• Typically open-tube systems are used for solid-state diffusion. In very
specific case, sealed tube diffusion can be used.

• Types of sources
i. Solid source – normally primary source
ii. Liquid source – secondary source
iii. Gaseous source – secondary source
iv. Spin-on sources

• Typical impurities used in silicon processing are:

n-type: As, P and Antimony
p-type: B, Indium, aluminium, Gallium
recombination center: gold

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 Diffusion sources -P
Surface reaction:
2 P2O5 + 5Si ↔ 4 P + 5SiO2
Solid sources: (can be made into wafers like BN, but not popular)
Phosphorus pentoxide
Ammonium monophosphate NH4H2PO4
Ammonium diphosphate (NH4)2H2PO4

Liquid source: phosphorus oxychloride POCl3

4 POCl3 + 3O2 → 3P2O5 + 6Cl2
Gaseous source: phosphine PH3.

2PH 3 + 4O2 → P2O5 + 3H 2O

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 Diffusion sources - B
Surface reaction: 2 B2O3 + 3Si ↔ 4 B + 3SiO2

Solid sources: boron nitride (BN) and trimethylborate (TMB).

TMB has high vapor pressure at room temperature,
so placed outside of furnace.
2(CH 3O )3 B + 9O2 → B2O3 + 6CO2 + 9 H 2O
900 o C

One can also use BN wafers, pass O2, 900oC. 4BN + 3O2 → 2B2O3 + 2N2

Liquid sources: boron tribromide BBr3. 4 BBr3 + 3O2 → 3B2O3 + 6 Br2

Gaseous sources: diborane B2H6. B2 H 6 + 3O2 → B2O3 + 3H 2O

300 o C

B2 H 6 + 6CO2 → B2O3 + 6CO + 3H 2O

300 o C

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 Diffusion sources
Arsenic surface reaction:
2 As2O3 + 3Si ↔ 3SiO2 + 4 As
Solid sources: possible, low surface concentrations.

Gaseous source: arsine AsH3.

Ion implantation is normally used for deposition.

Antimony surface reaction:

2 Sb2O3 + 3Si ↔ 3SiO2 + 4 Sb
Liquid source: antimony pentachloride Sb3Cl5.

Ion implantation is normally used for deposition.

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 Ion Implantation vs Diffusion
• Contamination - One must have separate furnaces, separate quartz tubes,
separate boats, separate set of everything for different diffusion system
• ion implantation is much less prone to contamination. Ion implantation is
an inherently cleaner process, because it is done under high vacuum
• In diffusion, the control of the doping profile is usually within 5 to 10 % of
the predicted value. On the other hand, in ion implantation it can be
controlled within ±1%.
• The third point is temperature. Diffusion is a high temperature process In
contrast, ion implantation is a room temperature process . for diffusion,
since it is a high temperature process, your only choice of mask material is
silicon dioxide. In case of ion implantation however, since it is a room
temperature process, you can even use photoresist as a mask. So, that gives
you a much better flexibility

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• Flexibility: it is difficult to get a low surface concentration and a shallow
junction using a diffusion system.
• We have a high surface concentration and a shallow junction and if we
want to reduce this surface concentration, we have a low surface
concentration, but a deep junction.
• It is easy with ion implantation. There are 2 factors: - ion dose which will
control the total impurity and the other is the ion energy, which will
determine how deep the ions are going to go in.
• Diffusion is governed by a set of rules which are let us say, in equilibrium
that is to say your surface concentration is governed by maximum, the solid
solubility limit.. I cannot get solid solubility limit anywhere apart form the
surface.
• This can obtained with ion implantation. I can adjust the energy, so that the
peak is somewhere inside the semiconductor surface. The peak
concentration can be even in excess of the solid solubility limit.

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 Ion Implantation and Annealing Solid/Gas Phase Diffusion
Room temperature mask No damage created by
doping

Advantages Precise dose control Batch fabrication

1011 - 1016 atoms cm-2 doses
Accurate depth control
Implant damage enhances Usually limited to solid
diffusion solubility

Dislocations caused by damage Low surface concentration

Disadvantages may cause junction leakage hard to achieve without a
long drive in

Implant channeling may affect Low dose predeps very

profile difficult

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Helpful graphs and tables

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 Dopant solid solubility
Solid solubility: at equilibrium, the maximum concentration for an impurity
before precipitation to form a separate phase.

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 Intrinsic diffusivity Di
Intrinsic: impurity concentration NA, ND < ni (intrinsic carrier density).
Note that ni is quite high at typical diffusion temperatures, so "intrinsic" actually
applies under many conditions. E.g. at 1000oC, ni =7.14×1018/cm3.

Ea
Di = D exp(−0
)
kT

Ea: activation energy

D0(cm2/s) Ea(eV)
B 1.0 3.46
In 1.2 3.50
P 4.70 3.68
As 9.17 3.99
Sb 4.58 3.88

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Irvin’s curves

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