Industrial robotics

A new level of collaboration

The robotic revolution has already started – a new type of industrial robots, called collaborative robots or “cobots”, inter-
acts directly and works alongside humans abandoning the need of safety cells. Due to our wide portfolio of power products
and sensors Infineon is able to address nearly every robot design regardless of its size, number of axes and payload.
Discover our highly integrated solutions for industrial and collaborative robotics equipped with superior motor control
enabling the most compact and efficient drive designs in the industry.

Our benefits for you:

› Size reduction of control box and drive units enabled by Infineon’s IPMs, IGBTs, MOSFETs and smart switches
› Managing safety in collaborative and non-collaborative environments with Infineon’s torque, current, position and
radar sensors
› Multi-robot system usage – all topologies of robots can be addressed with Infineon’s wide range of switching solutions
such as IGBTS, half bridges, MOSFETs and IPMs
› Protecting brands and intellectual property of your robot design with Infineon’s OPTIGA™ security solutions
Explore our semiconductor portfolio to discover solutions that will take your industrial robotics and “cobot“ designs into
the future of manufacturing.

For more information please visit

www.infineon.com/industrial-robotics
Vol. 5, No. 3 www.pels.org
September 2018

For your engineering success

Features

26 the Performance Factor

for Magnetic Materials revisited
The effect of core losses on the selection of core size in transformers
William Gerard Hurley, Tim Merkin, and Maeve Duffy

35 a global real-time superlab

on the cover
To realize optimum performance from a
transformer or an inductor at high frequencies,
optimum core size is required. Using performance
factor analysis, a designer can select the right core
for a given application.
GRAPH AND CORES—COURTESY OF EPCOS AG, A TDK GROUP COMPANY,
SMALL GRAPH IMAGE ON BOTTOM LEFT—COURTESY OF POWER
ELECTRONICS RESEARCH CENTRE, NUI GALWAY
Enabling high penetration of power electronics
in the electric grid
Antonello Monti, Marija Stevic, Steffen Vogel,
Rik W. De Doncker, Ettore Bompard, Abouzar Estebsari,
Francesco Profumo, Rob Hovsapian, Manish Mohanpurkar,
Jack David Flicker, Vahan Gevorgian, Siddharth Suryanarayanan,
Anurag K. Srivastava, and Andrea Benigni
45 a simple Plug-In circuit for IgBt gate Drivers
to Monitor Device aging
Toward smart gate drivers
Syed Huzaif Ali, Xiong Li, Anant S. Kamath, and Bilal Akin

56 novel solder alloy

Wide service temperature capability for automotive applications
Jie Geng, HongWen Zhang, Francis Mutuku,
and Ning-Cheng Lee

Departments
& Columns
76
4 From the Editor
8 President’s Message
12 Happenings
18 Entrepreneur Viewpoint
21 Passive Components
64 Women in Engineering
66 Patent Reviews
70 Expert View
76 Society News
98 Event Calendar
104 White Hot

Digital Object Identifier 10.1109/MPEL.2017.2788962

September 2018 z IEEE PowEr ElEctronIcs MagazInE 1

IEEE Power Electronics Magazine
Editor-in-chief IEEE Power Electronics 2019 Members-at-large advertising sales
Ashok Bindra society officers Sibylle Dieckerhoff Walter Chalupa
12 Magnolia Ave. Alan Mantooth diecker@win.tu-berlin.de National Sales Manager
Nesconset, NY 11767 USA President Dan Kinzer Kerstin Chalupa
+1 631 471 5895 mantooth@uark.edu dan.kinzer@navitassemi.com International Sales Manager
bindra1@verizon.net Frede Blaabjerg Telephone: +1 973 835 7015
Marco Liserre chalupapels@aol.com
President-Elect/VP of Products liserre@gmail.com
Deputy Editors-in-chief fbl@iet.aau.dk
Robert N. Guenther (Industry) Annette Mütze IEEE Power Electronics
VP-Product Development Braham Ferreira muetze@tugraz.at society staff
NWL Immediate Past President Mike Kelly
Nominations Committee Chair João O.P. Pinto Executive Director
Bordentown, NJ 08505 USA joaonofre@gmail.com
+1 609-298-7300 ext. 1245 j.a.ferreira@tudelft.nl m.p.kelly@ieee.org
RGuenther@nwl.com Mark Dehong Xu Donna Florek
Don F.D. Tan Technical Community
xdh@zju.edu.cn
John Shen (Academic) Senior Past President, PELS Program Specialist
Grainger Chair Professor Long-Range Planning 2020 Members-at-Large
d.florek@ieee.org
Department of Electrical Committee Chair Johan Enslin
jenslin@clemson.edu Becky Boresen
and Computer Engineering dong.tan@ngc.com Technical Community
Illinois Institute of Technology Mario Pacas Noriko Kawakami Program Specialist
10 West 35th Street, Suite 1600 Executive VP Global Operations kawakami.noriko@tmeic.co.jp b.boresen@ieee.org
Chicago, IL 60616 USA pacas@uni-siegen.de Brad Lehman Jane Celusak
+1 312 567-3352 lehman@ece.neu.edu Project Manager
zjohnshen@gmail.com Yan-Fei Liu
VP Technical Operations Helen Li j.celusak@ieee.org
Tom Keim (Contributing) yanfei.liu@queensu.ca hli@caps.fsu.edu Alicia Tomaszewski
+1 352 363 6688 Project Manager Transportation
tkeim@alum.mit.edu Luichen Chang Marco Rivera Electrification Community
VP Conferences marcoesteban@gmail.com a.tomaszewski@ieee.org
lchang@unb.ca Pradeep Shenoy Kellie Gilbert
Magazine advisory Board
John Shen Peter Wilson pshenoy@ti.com Editorial Assistant/News Editor
Chairman Executive VP Standards kellie.gilbert@ieee.org
Illinois Institute of Technology P.R.Wilson@bath.ac.uk technical committee chairs IEEE Periodicals
Don F.D. Tan Jian Sun Keiichi Hirose Magazines Department
Senior Past President Treasurer Communications Energy Systems 445 Hoes Lane, Piscataway, NJ
IEEE Power Electronics Society jsun@ecse.rpi.edu hirose36@gmail.com 08854 USA
Robert N. Guenther Jinjun Liu Yaow-Ming Chen Jessica Welsh
NWL Managing Editor
Executive VP Membership High Performance and Emerging
jjliu@mail.xjtu.edu.cn Technologies Geraldine Krolin-Taylor
Prasad Enjeti Senior Managing Editor
Texas A&M University Don Tan ymchen@cc.ee.ntu.edu.tw
Uday Deshpande Janet Dudar
William A. Peterson Division II Director Senior Art Director
E&M Power dong.tan@ngc.com Motor Drives and Actuators
udayd@ieee.org Gail A. Schnitzer
William Gerard Hurley Associate Art Director
National University of Ireland, 2018 Members-at-large Rolando Burgos Theresa L. Smith
Galway Liuchen Chang Power and Control Core Production Coordinator
lchang@unb.ca Technologies
Mark Dehong Xu Mark David
William Gerard Hurley rburgos@ieee.org
Zhejiang University, China Sr. Manager Advertising and
gerard.hurley@nuigalway.ie Robert Pilawa-Podgurski Business Development
Ernie Parker Power Conversion Systems
Crane Aerospace and Electronics Katherine Kim Felicia Spagnoli
katakim@gmail.com and Components Advertising Production Manager
Annette Mutze pilawa@illinois.edu Peter M. Tuohy
Graz University of Technology, Ernie Parker
ernie.parker@crane-eg.com Sudip Mazumder Production Director
Graz, Austria Sustainable Energy Systems Kevin Lisankie
Dan Kinzer Grant Pitel mazumder@uic.edu Editorial Services Director
Navitas Semiconductor grantpitel@gmail.com
Alireza Khaligh Dawn M. Melley
Seung-Ki Sul Vehicle and Transportation Systems Staff Director,
sulsk@plaza.snu.ac.kr khaligh@ece.umd.edu Publishing Operations

IEEE prohibits discrimination, harassment, and bullying.

For more information, visit http://www.ieee.org/web/aboutus/whatis/policies/p9-26.html.

IEEE Power Electronics Magazine (ISSN 2329-9207) (IPEMDG) is published quarterly by the Institute of Electrical and
Electronics Engineers, Inc. Headquarters: 3 Park Avenue, 17th Floor, New York, NY 10016-5997 USA, Telephone: +1 212
419 7900. Responsibility for the content rests upon the authors and not upon the IEEE, the Society or its members. IEEE
Mission stateMent: To educate,
Service Center (for orders, subscriptions, address changes): 445 Hoes Lane, Piscataway, NJ 08855-1331 USA. Telephone: inform, and entertain our community of
+1 732 981 0060. Individual copies: IEEE members US$20.00 (first copy only), nonmembers US$99.00 per copy. Subscrip- IEEE Power Electronics Society members
tion rates: Annual subscription rates included in IEEE Power Electronics Society member dues. Subscription rates available on technology, events, industry news, and
on request. Copyright and reprint permission: Abstracting is permitted with credit to the source. Libraries are permitted to
photocopy beyond the limits of U.S. Copyright law for the private use of patrons 1) those post-1977 articles that carry a code general topics relating to consumer elec-
at the bottom of the first page, provided the per-copy fee indicated in the code is paid through the Copyright Clearance Cen- tronics and to further serve and support
ter, 222 Rosewood Drive, Danvers, MA 01923 USA; 2) pre-1978 articles without a fee. For other copying, reprint, or republi- our Members in professional career devel-
cation permission, write Copyrights and Permissions Department, IEEE Service Center, 445 Hoes Lane, Piscataway, NJ
08854. Copyright © 2018 by the Institute of Electrical and Electronics Engineers Inc. All rights reserved. Periodicals postage
opment through tutorials and raising aware-
pending at New York and additional mailing offices. Postmaster: Send address changes to IEEE Power Electronics Maga- ness of engineering tools and technologies.
zine, IEEE, 445 Hoes Lane, Piscataway, NJ 08854 USA. Canadian GST #125634188 PRINTED IN THE U.S.A.

Promoting Sustainable Forestry

Digital Object Identifier 10.1109/MPEL.2017.2788963 SFI-01681

2 IEEE PowEr ElEctronIcs MagazInE z September 2018

 See us at ECCE • Booth 403
September 23-27, 2018 • Portland, OR
www.gmw.com Free Expo Only Registration • www.ieee-ecce.org

New Products in Current Sensor ICs, DC Closed-loop

Current Transducers and AC Current Probes
AKM CZ-37xx Series Low Noise Current Sensors
(preliminary specifications)
» Current Ranges: ±5A to ±180A Peak, 60Arms
» Accuracy: 0.5% (Typ.) @ TAMBIENT= 0 – 90ºC
» Bandwidth (-3dB): dc to 400kHz
» Response Time: 1µsec
» Voltage Isolation: 3kV
» Operating Temp.: -40 to 105ºC
» Decreased dV/dt Noise and Stray Magnetic Field Influence
» UL61800-5-1 Safety Standard Compliant

PEM CWTMini50HF Rogowski Coil AC Current Probe

» Current Ranges: ±600A, ±1200A
» Accuracy: < 0.5%
» Bandwidth (-3dB): 50MHz High Frequency
» Rise Time: 12.5ns
» Voltage Isolation: 2kV
340A pk, 4.5MHz damped sinusoid
Time-base 100ns/div

» Coil Length: 100mm

» Coil Cross-Section: 3.5mm
Ch1 - (2GHz) Co-axial shunt (100A/div)
Ch2 - CWTMini50HF/3/B/1/100/2 (100A/div)
» Screened coil for high dV/dt immunity

Danisense DM1200ID High Stability, High Accuracy

Closed-loop Fluxgate Current Transducer
» Current Range: ±1500A DC Current,
1200Arms AC Current
» Accuracy, dc to 10Hz: ±7ppm
» Bandwidth (-3dB): dc to 300kHz
» Response Time: <1µsec
» Aperture: 45mm
» Supply Voltage: ±15V

GMW Associates • www.gmw.com • Sensors and Instrumentation for Current and Magnetic Field Measurement
 From the Editor
W
ith the rapid adoption of
wide-bandgap power devic-
es, the switching frequen-
cies of converters are also on the rise
for miniaturization with high efficien-
cy. To keep up with this transition,
magnetic components must also
simultaneously advance to reap the
benefits of higher switching. But sim-
ply using a higher frequency is not the
answer. Depending on the properties
of the magnetic material, higher fre-
quencies may not necessarily translate
into lower losses and higher efficien-
cies. In fact, to realize optimum perfor-
mance from a transformer or an induc-
tor at high frequencies, an optimum
core size is required. For that, it is impor-
tant to know the performance charac-
teristics of the core, and there are many
factors affecting this selection.
The first article in this issue, “The
Performance Factor for Magnetic Ma-
terials Revisited,” by William Gerard
Hurley, Tim Merkin, and Maeve Duffy,
discusses ferrite materials and the ef-
fect of core losses at high frequency
on the selection of the core in a spe-
cific transformer application. It shows
that the performance factor curve can
compare different materials, and the
analysis here extends the usefulness
of the performance factor approach to
establish the selection of the core in a
given application.
Digital Object Identifier 10.1109/MPEL.2018.2851858
Date of publication: 10 September 2018
4 IEEE PowEr ElEctronIcs MagazInE
by Ashok Bindra
selecting the right core
for Your Design
Concurrently, with the emergence vices through the measurement of
of distributed energy resources, power on-state collector-emitter voltage
electronics is significantly transform- drop and gate threshold voltage.
ing the electric grid around the world. Syed Huzaif Ali, Xiong Li, Anant
We are entering a new era where S. Kamath, and Bilal Akin show in
power electronics and power system their article, “A Simple Plug-In Circuit
engineers will design for IGBT Gate Driv-
the grid of the future. ers to Monitor De-
Realization of such Depending on the vice Aging,” that this
a large-scale virtual properties of the circuit is practically
infrastructure is al- magnetic material, feasible and can be
ready underway. easily incorporated
higher frequencies
Scientists from in conventional gate
Europe and the may not necessarily driver circuits.
United States have translate into lower Last but not least
demonstrated a mul- losses and higher is the article “Novel
tilaboratory setup for efficiencies. Solder Alloy,” by Jie
simulation and test- G e n g , H o n gWe n
ing of next generation Zhang, Francis Mu-
global power grids called the Global Real- tuku, and Ning-Cheng Lee, which in-
Time Super Laboratory. It represents vestigates the physical and mechanical
a vendor-neutral distributed platform properties of a new solder alloy with
based on the virtual interconnection of high reliability on both moderate and
digital real-time simulators and hard- high service temperature conditions.
ware-in-the-loop setups hosted at eight
geographically distributed laborato- Passives, Women in
ries located in the United States and Eu- Engineering, and More
rope. The article, “A Global Real-Time In the “Passive Components” column,
Superlab,” by Prof. Antonello Monti of J.C. Sun, the founder of Bs&T Frank-
RWTH Aachen University, Germany, furt am Main GmbH, presents recent
and a team of researchers from the two developments in ferrite material for
continents, describes the efforts to- high-power applications. In the “Wo-
ward the realization of this large-scale men in Engineering” column, Katherine
virtual infrastructure. A. Kim writes about Prof. Marta Moli-
The third article in this issue pro- nas from the Norwegian University of
poses a simple cost-effective circuit Science and Technology, Trondheim,
for in situ monitoring of aging and who talks about her career as part of
degradation in discrete insulated- the Women in Engineering Breakfast at
gate bipolar transistor (IGBT) de- the IEEE International Power Electronics
z September 2018
 Sound Choice

Coilcraft dual inductors for Class-D output filters

provide low distortion and the best possible sound quality

Based on their high power efficiency, small
size, and light weight, Class-D amplifiers are
a popular choice for extending battery life in
DC-powered audio applications, such as those
found in automotive sound systems.
Coilcraft offers a unique selection of dual
inductors that significantly improve the per-
formance of Class-D output LC filters. Good
linearity of the inductance with current and
ultra-low total losses minimize the impact on
total harmonic distortion plus noise (THD+N),
greatly improving audio quality.
And housing dual inductors in a single
shielded package saves critical board space.
Learn more about our economical solu-
tions for a wide variety of audio amplifier
applications.
Visit coilcraft.com/Class-D today!

WWW.COILCRAFT.COM
Conference and IEEE Energy Conver- Divan takes a deeper look into the stan- In addition to previewing the IEEE
sion Congress and Exposition (ECCE) dards process to see if it is a friend or ECCE and International Telecom-
Asia 2018 in Niigata, foe of entrepreneurs. munications Energy Conference and
Japan. Titled “The “Patent Reviews” col- announcing the 2018 IEEE Power
Journey to My Dream: Thanks to your umnist Art MacCord Electronics Society (PELS) award
From Astronomy to continuous support, draws attention to a winners, the “Society News” articles
Electrical Engineering U.S. Supreme Court bring information on events, lectures,
IEEE Power Electronics
and More,” Prof. Moli- verdict that upholds and workshops organized by IEEE
nas shared her child-
Magazine continues the inter partes patent PELS Chapters around the world.
hood dream of be - to grow in its review. Bob White, Thanks to your continuous sup-
coming an electrical fifth year. in his column “White port, IEEE Power Electronics Maga-
engineer and ad - Hot,” ex plores the zine continues to grow in its fifth
vancing the field. The role of social media in year. As we work harder to serve you
session attracted 40 participants, both the engineering profession generally better, we are also looking for your
women and men, from around the world. and in power electronics in particular. feedback, which helps make this mag-
Likewise, in the “Happenings” col- The “Expert View” column by Alex Li- azine a valuable resource for prac-
umn, contributing writer Tom Keim dow of Efficient Power Conversion ticing power electronics engineers
uncovers advances in pyrotechnic- identifies challenges of pushing the in- around the world.
assisted fuses while, in the “Entrepre- tegration of GaN-on-silicon power inte-
neur Viewpoint” column, Prof. Deepak grated circuits further.

OPTIMIZED HIGH-FREQUENCY MAGNETICS Agile Magnetics

Boost your new, higher
switching-frequency power
supply design to the top
echelon of performance,
value, and features, with
advanced magnetic
components from Agile
Magnetics.
With advanced design
knowledge and the
largest choice of high-
frequency materials and
manufacturing techniques
at our disposal, Agile will
optimize your magnetic
components’:
• Package size and shape
• Power efficiency
• Performance margin
• Reliability
• Manufacturability
• Thermal rating
• Cost
From rapid prototype
through production,
our ISO9001 / AS9100 –
certified operation will
propel your power products
to excellence.

Agile Magnetics, Concord, NH • www.agilemagco.com • 1-800-805-8991 • Since 1992

6 IEEE PowEr ElEctronIcs MagazInE z September 2018

 www.dspace.com

Smart Energy Control Systems

dSPACE tools make it easy to develop and test control algorithms for
smart grid and power electronic applications, as well as for batteries.

From controller hardware and test systems to simulation models,

we have the perfect tool chain for efficient development.

Control prototyping
Test systems
Simulation models
President’s Message
Y
ou don’t have to be around
me long to discover that I
love sports. And while I’m a
bit heartbroken at the moment that
my Arkansas Razorbacks baseball
team lost in the College World Series
finals, there seems to be plenty of
action currently surrounding the
World Cup to hold my interest. This
spring’s horse racing produced
another Triple Crown winner in Jus-
tify. I have been having a great time
playing some golf this summer; I just
played 36 outstanding holes of
golf in Seoul, South Korea, with my
colleagues from Yonsei University
and Korea University.
To follow with the racing analogy,
my tenure as IEEE Power Electronics
Society (PELS) president is making
the turn for home. Some great things
have been initiated, but we are still
working hard as a Society on improv-
ing things for our membership. In that
spirit, the IEEE PELS Long-Range
Planning Committee met in early
July to hold their biennial discussions
on the future of the Society in terms
of organization and administration
(note that our technical future direc-
tions discussions occur at the IEEE
Future of Electronic Power Process-
ing and Conversion in odd-numbered
years). We will be putting the entire
organization up for discussion, in-
cluding the composition of our advi-
Digital Object Identifier 10.1109/MPEL.2018.2852842
Date of publication: 10 September 2018
8 IEEE PowEr ElEctronIcs MagazInE
by Alan Mantooth
Making the turn for Home
sory committee, our technical com- Automation in Power Electronics,”
mittee structure, our new initiatives, will be held the Saturday before
our staffing, what positions should ECCE (22 September, 8:30 a.m.) at the
be elected versus appointed, and gen- Oregon Convention Center, which is
erally how we organize ourselves the site of ECCE. Registration is re-
to manage an ex panding and ever- quired, but the event is free. Details
d i ver si f y ing f ield can be found on the
for the dissemina- workshop website
tion of technical ad- We will be holding the at http://e3da.csce
vances, provide the first-ever PELS Member .uark.edu/dape/. The
right networking op- Town Hall Meeting on purpose of this work-
portunities, enable shop is to assess the
Sunday, 23 September,
member professional current state of the
growth, and provide
at the IEEE Energy field in design au-
educational materials Conversion Congress tomation for power
all for the benefit of and Exposition in electronics—parti -
our Society members. Portland, Oregon. cularly in the era of
As I mentioned in higher-speed switch-
my message in the ing and higher-power
last issue of IEEE Power Electronics density power electronics enabled by
Magazine, we will be holding the first- wide-bandgap semiconductor technol-
ever PELS Member Town Hall Meet- ogies. The lineup of speakers ranges
ing on Sunday, 23 September, at the from those in academics and industry
IEEE Energy Conversion Congress to design tool providers. Hopefully you
and Exposition (ECCE) in Portland, can make it there. Seating will be lim-
Oregon, from 4:30 to 6:00 p.m. (PDT). ited, but we look forward to a great day.
During this meeting, I will briefly In June, the PELS Administrative
report the results and recommenda- Committee (AdCom) passed a reso-
tions that the Long-Range Planning lution that 20 June will be known as
Committee has made. We will also PELS Day. The suggestion for PELS
talk about all the departments and Day was made by volunteer Alaa
the many exciting things happening Abdallah from Tunisia. The AdCom
within the Society. I look forward to overwhelmingly thought that PELS
seeing you there! Day was a great idea and supported
On another ECCE-related note, its recognition beginning in 2019. We
I would like to plug a one-day work- researched what dates would have
shop that PELS is coorganizing with historical significance to PELS, and it
the Council on Electronic Design was discovered that on 20 June 1987,
Automation. This workshop, “Design the IEEE Technical Activities Boa rd
z September 2018
Smart Lighting

High Efficiency & Low Component Count

— Compatible with wired and wireless protocols

— Lowest standby power ICs
— High Power Factor (PF)

www.power.com
(known a s TAB) ap- The Transporta- This issue of IEEE Power Electron-
proved the Society’s While wide-bandgap tion Electrification ics Magazine is devoted to magnetics.
formation. Thus, be - semiconductors, Conference in Long While wide-bandgap semiconductors,
ginning in 2019, PELS Beach, California, multilevel converters, wireless power,
multilevel converters,
Day will be celebrated also had record at- and other technologies are receiving
wireless power, and much attention, magnetics remains a
worldwide each year tendance. The Inter-
on 20 June. other technologies are national Symposium vital part of many power electronics
Of course, as I receiving much on Power Electron- systems. I had the pleasure of presenting
write this, the sum- attention, magnetics ics for Distributed Prof. Charles Sullivan from Dartmouth
mer conference sche- remains a vital part Generation Systems College, Hanover, New Hampshire, with
dule is well under- in Charlotte, North the PELS Modeling and Control Techni-
of many power
way. I have had the Ca rol i na , a nd t he cal Achievement Award “for contribu-
electronics systems. tions to the modeling and analysis of
pleasure of kicking workshop on Con-
off a number of these. trol and Modeling magnetic components for power elec-
The first IEEE Work- for Power Electron- tronics” at COMPEL in June. It seems
shop on Wide-Bandgap Power Devices ics (COMPEL) in Padova, Italy, were that almost everywhere I turn in the Soci-
and Applications in Asia held in his- similarly very successful! So, wow, it ety, someone is developing some impres-
toric Xi’An, China, was a huge success has been a very busy May and June for sive and inspiring power electronics,
with more than 500 attendees. ECCE- conferences, and I want to thank all of and magnetics is at the heart of many
Asia in Niigata, Japan, was also very the committed volunteers who made of those advances. Enjoy this issue. I
well attended and a great success. them successful. hope that it also inspires you.

10 IEEE PowEr ElEctronIcs MagazInE z September 2018

 Happenings
E
very electric power engineer
has some familiarity with
electrical faults and technolo-
gies for fault mitigation. The basic
problem presented itself to the earli-
est workers in electric technology,
and the basic solutions have been
present essentially from the begin-
ning, and many are used with great
effect to this day.
In some applications where essen-
tially the same protections are required
in millions of instances per year, very
cost-effective solutions are common.
Mainstream automobiles (i.e., setting
aside for the moment battery-electric
and hybrid-electric vehicles), for exam-
ple, are largely protected by simple
electrical fuses, which are technically
effective at very low cost. Residential
electrical systems at one time used
fuses, too, but these have mostly been
supplanted by resettable electrome-
chanical circuit breakers. In this case,
the chosen technology is also extreme-
ly technically effective. Whereas the
cost per unit is far greater than for an
automotive fuse, the technology is also
economically quite satisfactory.
One technology that is receiving
substantial attention for use in electric
automobiles and in other applications
is pyrotechnic current interruption. In
situations where very rapid current
interruption is desired, one option is
to use a small explosive charge to lit-
Digital Object Identifier 10.1109/MPEL.2018.2851123
Date of publication: 10 September 2018
12 IEEE PowEr ElEctronIcs MagazInE
Developments in
Pyrotechnic-assisted Fuses
erally blow away a formerly solid elec-
trical conductor. At first blush, the
idea seems dramatic, over the top. But
thinking just for a moment about arcs
and arc interruption, one realizes that
explosives and the act of current inter-
ruption by mechanical separation of
contacts or intentional melting of a
conductor as in a fuse are not that dif-
ferent in audacity.
An apparent leader in this develop-
ment is Mersen, which includes a com-
pany for merly known as Ferraz
Shawmut. At the Applied Power Elec-
tronics Conference and Exposition
2018, their booth offered a brochure
that described a product line, the Xp
series, which claims to be able to
switch up to 12 kA at up to 1,000 V.
The Xp series device is electrically
gated. The device is essentially an
electrically triggered, fast-acting, one-
time disconnect. At the International
Power Electronics Conference (IPEC)
in Niigata, Japan, in May 2018, repre-
sentatives of the company presented a
compelling paper, focused on near-
term requirements of battery-electric
vehicles. In this paper, they discussed
a proposed product designated the
Xp-ST. Whereas this product is similar
to the Xp series, it replaces the exter-
nal gating capability with a self-actu-
ating configuration. This device is
very similar in overall functionality to
a conventional fuse but with a differ-
ent principle of operation.
It appears that what is attracting
new attention to this concept is
z September 2018
by Tom Keim
increased market interest in current
interrupting performance that cannot
be obtained, or cannot be obtained as
economically, by alternative means.
The referenced Mersen paper cites a
good example. The authors cite a par-
ticular automotive battery system with
a nominal voltage of 900 V and a cur-
rent rating of 500 A. The mainstream
overcurrent protection solution for
such a power source is the series com-
bination of a mechanical contactor and
a fuse. But in the case under consider-
ation, the highest-rated contactor avail-
able from a major supplier of automo-
tive grade contactors, combined with a
fuse that is capable of interrupting the
current available in the event of a solid
short circuit, cannot clear all possible
overloads. The contactor can interrupt
up to 650 A. The fuse cannot be relied
upon to interrupt anything under
1,200 A. Even at 1,200 A, the fuse could
take up to 200 s to act.
One solution to this problem might
be a more capable contactor. If such a
contactor is not available or not avail-
able in a suitable time or at a suitable
price, this solution may not be accept-
able. Another solution is one or the
other of the products offered by Mersen.
The fundamental construction and
operation of the Xp series product was
explained by Dr. Jean-Francois de
Palma, innovation and research and
development vice president at Mersen.
The device is the parallel combination
of a pyroswitch element and a conven-
tional fuse, schematically illustrated in
CWT wide-band
AC current probes
• Thin, flexible, clip-around
ac current probes
• Wide-band from below 0.01Hz
to greater than 20MHz (-3dB)
• Ideal for power electronics
development work
• Current ratings 30A
to 600kA
CWT
Mini
• Two miniature coil
sizes (3.5mm or
4.5mm) up to
200mm length
• Insulation voltage
2kV or 5kV peak
Please contact us to discuss
your application
Tel: +44 (0)115 946 9657
Figure 1. The pyroswitch element is a robust copper con-
ductor with a few areas of reduced cross section, assem-
bled with a small explosive element. In normal operation,
the conductor in the pyroswitch has far lower impedance
than the fuse; essentially all of the current flows in the pyro-
CWT Standard switch. When a fault is detected, the explosive is ignited,
• Robust coils and the conductor in the pyroswitch element is very quickly
in lengths from
300mm to > 1m
removed from the circuit. In at least one case, the fault cur-
rent begins to collapse within 300 μs of the trigger event.
• Insulation voltage
10kV peak (coil When the conductor is removed from the circuit, the fuse
thickness 8.5mm)
CWT becomes by far the lowest impedance in the device, and
Ultra- essentially all of the current transfers to the fuse. The volt-
mini CWT LF age across the place where the pyroswitch element former-
ly was is kept low by the presence of the fuse, and any arc
there is quickly extinguished.
The fuse element is now carrying a current far in
• Coil size
(max 1.7mm • Extended low- excess of the lowest current required for it to act, so it
cross-section), frequency cut-off quickly melts and commences to interrupt the current.
80mm length • Available with The voltage rating of the fuse is above the voltage of the
• Insulation voltage standard or
1.2kV peak mini coil source, so the fuse has no difficulty extinguishing the
current. The key to fast action in all cases is that the fuse
in this device has a current-carrying capability far lower
than rated current. This is possible only due to the pres-
ence of the pyroswitch element.
Power Electronic Measurements According to Project Manager Dr. Pierric Gueguen,
although the built-in fast action is the primary benefit, the
www.pemuk.com configuration of Figure 1 also offers some additional
advantages. When a fuse is the only current-interrupting
element in use, it experiences thermal transients any time
there is a change in operating current or a short overcur-
rent not resulting in circuit interruption. These thermal
transients degrade the capability of the fuse to carry nor-
mal operating current, to the point where fuses have a
finite life even in normal service. Because the fuse is essen-
tially bypassed in the pyrotechnic-assisted device except
during operation, no important degradation occurs during
normal operation.
Also, there is much more flexibility to choose the con-
ductance of the element that carries current during nor-
mal operation. It is normal for literature on these devices
to suggest that the conductor is copper, and except for a
number of mechanical weak places, there is little restric-
tion on its cross section. As a result, it is reasonable for a
pyrotechnic-assisted fuse to have far lower on-state loss-
es than a conventional fuse for the same current. It is fur-
ther practical and desirable to include both the parallel
elements of Figure 1 inside the same mechanical package.
The electrical triggering function can be an advantage or
a disadvantage, depending on the needs of the system
designer. If it is desirable to use complex logic to decide
when to actuate the device and when not to do so, the func-
tion is desirable. If the desired triggering decision is very
simple, e.g., trigger immediately if current rises above 120%
of rated current, the need for a separate triggering device,
which has a separate power supply and therefore can fail to
function for reasons unrelated to any failure of the
switching product, the separate trigger
may be an undesirable feature.
For these cases, Mersen plans to
offer an Xp-ST product, described in
the IPEC paper. This product addition-
ally places a fuse in series with the
components of the Xp product, as
shown in Figure 2. This series fuse is
underrated for the voltage of the sys-
tem but is designed to act at an overcur-
rent high enough to prevent spurious
tripping. When the series fuse opens,
it does not extinguish the internal arc
that results, because of its low voltage
rating. Instead, the voltage across the
fuse is used to trigger the pyroswitch,
which without further delay opens the
circuit by the process described previ-
ously. This configuration is protected
by an issued French patent, and pat-
ent protection in major world markets
is being pursued.
Additionally, Mersen has under
development a product called Xp-
STT, which includes the triggering
mechanisms of both the Xp and Xp-ST
Current
Sensing Fuse
Electronic
Nominal Pyro Element PS1
Current
Electronic
Trigger
FIG 1 The overall topology of pyrotechnic-assisted fuse. (Figure courtesy of Mersen.)
devices. This device is hinted at, but
not named, in the final paragraph of
the IPEC paper. The authors point out
that it is desirable to perform a pre-
cautionary disconnect of the battery
in cases where no overcurrent exists,
e.g., a serious collision or the occur-
rence of a fire. If such a device were
specified, the best use may be to pro-
gram the gate trigger for every con-
ceivable case, reserving the slower
self-triggering case as a backup in
case of a failure of the primary trig-
gering mechanism.
Power Supply
Pyrotechnic-assisted current inter-
ruption is receiving renewed interest
not only for high-power dc systems
but also in ac generation and distribu-
tion systems. Swedish power systems
component manufacturer ABB pro-
duces a line of pyrotechnic-assisted
devices for use in medium-voltage
50- and 60-cycle power systems. A line
of products based on the same princi-
ple described previously, i.e., that of an
explosively removable conductor par-
alleled by a fuse, has been available
under the brand name Is-limiter since
 This makes sense as does the intro-
Clearing Fuse FC duction of the modernized product. It is
well established that fault current levels
in medium-voltage electrical distribu-
Trigger Fuse Ft tion systems have increased over time
and continue to do so, as the amount of
Fuse Ft
Pyro Element PS1 electrical power used per block in areas
Current
of high population density has in-
Overshoot
vershoot
R1 creased. There is a conflict between the
desire to feed a given area by a number
FIG 2 The fuse in series is underrated versus the voltage of the application. It is
of redundant, parallel paths, for in-
designed to act at an overcurrent high enough to prevent spurious tripping. (Figure creased reliability, and the need to keep
courtesy of Mersen.) fault current within the capability of
the interrupting equipment at hand.
1958. Late in 2016, a new product was that would otherwise occur. Circuit ABB has a white paper on its website
launched, under the trademark FC-Pro- breakers do not so dramatically chop explaining how the fast response of a
tector. The new product includes mod- fault currents but instead extinguish pyrotechnic-assisted fuse can be used
ernized trigger circuitry and appears to the current over a few cycles. to good advantage to increase the
use revised power components, but the The current-events aspect of this up-time of a data center at favorable
operating principle is unchanged. Tech- product is not so much the new technol- equipment cost.
nically, the difference between the ogy as the renewed interest in promot- A very interesting article with the
pyrotechnic-assisted products and ing the purchase and use of the product. title “Using Pyrotechnic Current-Limit-
more conventional circuit breakers is The relevant parts of ABB’s website ing Devices” appeared in the Sep-
that the former interrupts the current have for the most part been revised re- tember/October 2017 issue of IEEE
before the first half-cycle current peak cently, and in some cases, quite recently. Industry Applications Magazine [1].
The lead sentence of the article postulated a trend toward
electrical rather than mechanical drivers for large offshore InFORMS ®

Reinforced Matrixed
installations. The article provides an overview of the imple-
mentation of pyrotechnic current-limiting devices from the
design stage through precommisioning, commissioning,
and operation. Plus, it explains the pertinent techniques to Solder Composite
use a small number of such devices to enable the entire Available in solder preforms and ribbon.*
installed power system on an offshore oil platform to oper-
ate in synchronism, despite the fact that the prospective
fault current of such a connection would otherwise exceed
the interruption rating of available switchgear.
The article ran with the subtitle “A Case Study of What
Went Right.” Of course, not everything went right. This par-
ticular offshore rig (called a floating production storage
and offloading vessel) is powered by six 25-MW gas tur-
bine generators and has electric motors as large as 14 MW.
The design of the electric power system is clearly a major
engineering project. A system this large could supply a city
of approximately 100,000 people in the United States. The
generators are paired, with two feeding each of three
buses. The buses are interconnected through two sets of
pyrotechnic fault current limiters, each in series with a cir-
cuit breaker. During normal operation, one generator expe-
rienced a major internal fault, and the pyrotechnic devices
worked exactly as they should have, separating the buses
in under half a cycle. Contrary to plan, all generation on
the vessel was lost, but that was not because of the opera- *Patent pending
tion of the pyrotechnic devices. The story of what went
wrong did involve one of the pyrotechnic devices, but the
problem resulted from device abuse, a consequence of Uneven bondline thickness causes
either inadequate system operating instructions or a failure concentrated stress, which impacts reliability.
to follow instructions.
A reader can imagine that these lessons can be applica- InFORMS® can help solve this challenge.
Copper
ble beyond large offshore installations (or alternatively, Tilted Substrate
Tilted Substrate Copper
that the lessons could have been learned by an awareness
Lack of Solder
of land-based practice for power systems of similar voltage Thickness
Problem: Lack of Baseplate Solder
and power levels). The article is certainly recommended Thickness
Baseplate
reading for anyone who wants a good starting point on
how these devices can benefit a system at 13 kV with chal- Level Substrate
Copper
lenges due to fault currents. Level Substrate
Copper

Solved: Even InFORM

Thickness
About the Author Even
Thickness
Baseplate InFORM
Baseplate
Tom Keim (tkeim@alum.mit.edu) is a late-career engineer
and a longtime Member of the IEEE. His specialty is high- Common InFORM stand-offs:
performance electromechanical systems and the power Solder Preform Requirements
systems that drive and control them. He has worked for a Description
Stand-Off Part Dimensions (x and y) Part Dimensions (z)
(Microns) (Millimeters) (Microns)
worldwide conglomerate, for a small (50 employees) inno-
LM04 100 >10 per side >150
vative research and development company, for a major
LM06 150 >10 per side >200
research university, and for an engineering consulting com-
LM08 200 >10 per side >250
pany. He has 50 publications and 11 patents and is current-
SM04 100 2.5–10 per side >150
ly active as an author, inventor, and consultant.
ESM03 75 .75–2.5 per side >125

Reference
[1] T. Hazel, J. Lavaud, and B. Leforgeais, “Using pyrotechnic current-limit- Contact our engineers:
ing devices,” IEEE Ind. Appl. Mag., vol 23, no. 5, pp. 50–59, Sept.-Oct. 2017. askus@indium.com
www.indium.com/IEEP
©2018 Indium Corporation
Entrepreneur Viewpoint
I
just returned from the 2018 Inter-
national Power Electronics Con-
ference in Niigata, Japan. This
accomplished, long-running confer-
ence is also part of the IEEE Energy
Conversion Congress and Exposition
Asia conference series. With more
than 1,050 registered attendees and a
bevy of quality technical papers and
interactions, the conference was a
resounding success. In a fast-moving
field such as power electronics,
these leading conferences provide
insight into what is currently occupy-
ing the minds of technologists and
deliver some of the emerging solu-
tions that are sure to enter the mar-
ket in the coming years.
To no one’s surprise, this year, a
lot of time was spent discussing the
need to integrate large numbers of
distributed energy resources (DERs)
with the energy infrastructure. Top-
ics included photovoltaic (PV) invert-
ers, microgrid controls, energy stor-
age, dc grids and converters, meshed
grids, fault management, virtual iner-
tia, resynchronization, decentralized
control, and many others. To some-
one from the power systems commu-
nity who happened to wander into
some of the sessions, the discussion
could have seemed chaotic and may
be irrelevant to his/her business. On
a grid, where the frequency is fixed
through central coordination, droop
Digital Object Identifier 10.1109/MPEL.2018.2849652
Date of publication: 10 September 2018
18 IEEE PowEr ElEctronIcs MagazInE
by Deepak Divan
standards: Entrepreneurs’
Friend or Foe?
control seems archaic because it mittees that write these documents
dates back 50 years. State estimation, spend years of hard work in discus-
optimal power flow, and security- sions, writing documents, and then
constrained economic dispatch are voting on them to create industry con-
the backbone of operations on a grid; sensus. As technology cycles mature
however, small DERs and converters and stabilize, harmonization enables
feel like an annoyance, and their con- rapid growth of the sector.
trol should be aligned with current So, is there a problem here? To bet-
operating practices. On a mature ter answer this question, one needs
grid, current investments in the grid to look deeper into the standards pro-
infrastructure (over cess. A typical stan-
US$2 trillion in the dard such as IEEE
United States) repre- Standard 1547 [1],
Standards committees
sent a significant bar- which is the stan-
rier to replacing it that write these docu- dard for intercon-
with an even more ments spend years of nection and interop-
expensive, new, and hard work in discus- erability of DERs
unproven infrastruc- sions, writing docu- with the grid, has
ture. Yet, PV, wind, ments, and then vot- been in process and
and energy storage under revision since
ing on them to create
prices continue on an 2003. In 2018, three
exponential decline, industry consensus. sections, voltage re -
inexorably forcing gu l a t ion, volt a ge
change on a reluctant a nd frequency ride
power systems community—and the through, and power quality, were
outcome is far from clear. finally approved (until they need to be
One silver lining to this stormy changed again!). Other areas like com-
cloud seems to be the standards pro- munications, interoperability, and
cess—attempting to bring order and islanding “need additional work,”
alignment to a community that is oth- whereas microgrids, test require-
erwise moving in many different ments, and modeling are “in early
directions. The standards commit- stages.” Moreover, California has the
tees (the IEEE, International Electro- Smart Inverter Working Group look-
technical Commission, and others) ing at interactions of PV inverters
add tremendous value as industries with the grid and has been moving
mature, creating a common language forward with Rule 21, which defines
and set of specifications that protect requirements for connectivity and
consumers and allow comparisons of secure communications. Simply under-
disparate approaches. Standards com- standing the constantly changing
z September 2018
requirements is challenging, but compliance is even
more so. Furthermore, if someone does comply, what
are they complying with, and does that guarantee
that there will be no problems?
Who is involved in these standards groups, and
are they capturing all of the elements of these fast-
moving technologies? In fact, the people that are
involved with the standards groups discussed in this
article are from utilities and national technology
organizations and work as consultants and solution
providers. These individuals commit significant
amounts of time and work for many years to influ-
ence the outcome and the language of the standards,
often acting in their organization’s best interest (as
they should). As a result of their efforts, a rapidly
evolving technology that could potentially disrupt
the status quo is not likely to breeze through. Addi-
tionally, entrepreneurs who are busy building a com-
pany are unlikely to have the resources or time need-
ed to actively participate in the standards process,
nor would they be likely to persuade others on the
committee that their unique perspective needs to
define a new standard. Because of this, many of the
new and emerging technologies may not even get an
adequate hearing in the standards process. Finally,
even with the best of intentions, it is very challenging
to understand the full scope of interactions between
fast-moving technologies and its impact on estab-
lished systems, such as the grid.
Of even greater concern is the illusion that compli-
ance with standards will result in harmonious sys-
tems. One should remember the motivation of the vari-
ous parties. For instance, inverter manufacturers do
not have any interest in regulating the grid or in com-
municating with utilities—they simply want to sell
more inverters. If compliance with a standard such as
IEEE 1547 is a prerequisite to more sales, then they
will comply. Utilities want to show they have done
everything they can to fix the problem and insist on
compliance—but to which version, and what happens
as the version changes? Who is responsible for ensur-
ing that there are no issues? Why do utilities go
through an interconnection study that is expensive
and can take many months yet does not solve prob-
lems at the interface.
In the face of ever-evolving technologies, this
seems to be an approach that is unlikely to yield a sat-
isfactory outcome, assuming that the desired out-
come is to successfully transition to a new grid that
can economically and viably operate with significant-
ly higher levels of DER penetration. Consequently, a
different approach may be needed. It is the utilities’
role to ensure that the grid operates as intended. As
inverter technologies advance, it is anticipated that
inverters will be capable of supporting the grid in the
face of DER variability as well as with other issues,
such as the need for virtual inertia on
the grid. However, the timeline for
this new capability cannot be fully
anticipated. Yet through this transi-
tion, the utility role of the grid opera-
tor does not change.
One approach is to think of a utili-
ty-controlled device, such as an island
interface device (IID), which ensures
for the utility that the connected
DER/microgrid resource does not vio-
late grid operating requirements. If
the IID detects a violation, it can rap-
idly isolate the offending resource,
thus protecting the grid. Utilities can
provide guidance to potential DER
service providers on what their inter-
connection requirements are and can
also provide signals allowing market
participation. The DER service pro-
vider would have to cover the cost of
either demonstrating IID functional-
ity or adding a physical IID to their
system. This would provide utilities
with an easy approach to integrating
DER/microgrid resources into their
grid, while ensuring that the integrity
of their grid is preser ved. DER/
microgrid service providers would
then be free to deploy different exper-
imental technologies without worry-
ing about compliance with a moving
set of standards.
Standards are clearly very impor-
tant, but so is the timing. Enforcing
standards before emerging technolo-
gies have been vetted and validated in
the field creates competitive disadvan-
tages, higher costs, and inhibits inno-
vation. In the case where there is
an intersection between an existing
mature infrastructure and rapidly
advancing technologies, one approach
may be to create islands where new
technologies can be tested, allowing
rapid disconnect if violations are
detected. As technologies solidify, the
broader market can be enabled by
extracting a minimum set of stan-
dard elements that protect customers,
allow interoperability as needed,
and help the technology to grow—
until the next competitive technology
comes along!
About the Author
Deepak Divan (ddivan@varentec
.com) is a National Academy of Engi-
neering member, IEEE Fellow, and
past president of the IEEE Power Elec-
tronics Society. He is a professor and
director of the Center for Distributed
Energy at Georgia Tech. He also serves
as founder and chief scientist of Varen-
tec, a company focused on grid edge
control that is funded by a clean-tech
venture capital firm, Khosla Ventures,
and investor Bill Gates. Varentec is his
third start-up company.
Reference
[1] IEEE Standard for Interconnection and
Interoperability of Distributed Energy Resources
with Associated Electric Power Systems Inter-
faces, IEEE Standard 1547–2018.

SUPERIOR
PERFORMANCE
HIGH VOLTAGE DIODES - STANDARD AND CUSTOM
Dean Technology offers an exceptional range of high voltage diodes for all applications
including power supplies, medical equipment, instrumentation, control systems, voltage
multipliers and military. If our standard range of products aren’t exactly right, we are able
to customize every detail, generally with little to no increase in lead times or price.

Contact DTI today to find out about the exact

diode for your high voltage design.

www.deantechnology.com

20 IEEE PowEr ElEctronIcs MagazInE z September 2018

 Passive Components
by J.C. Sun

recent Development in Ferrite

Material for High Power application

T
here is no doubt that power at 100 °C. It is to be noted that the Bs density due to its polycrystalline nature
electronics is playing a criti­ is measured according to the IEC stan­ compared to its counterpart metal
cal role in the evolution of dard for polycrystalline ferrite under alloyed material (Figure 1). Because the
the overall infrastructure of energy room temperature, at a field strength magnetic parameters are highly nonlin­
supply, from motion control and of 1194 A/m and 10 kHz, which is far be­ ear, a direct comparison is often mis­
drives to industry automation and yond the application range. The appli­ leading, and the decisive parameter to
traction techniques. However, un ­ cable field strength varies between 100 express the softness of the material is
like decades of impressive definitely the coercivity under the
developments in semicon­ same temperature, field strength,
ductor technologies, the BH Loop 25 kHz, 25 °C, 250 A /m and frequency. There is a very
developments in the pas­ 1,500 recent development of a polycrys­
sive components a r e n a , talline MnZn­ferrite material with
1,000
especially in magnetic com­ a Bs that can be stated to be at
ponents, have been rather 500 least 600 mT at room tempera­
B (mT) →

slow and have been seen as ture and at least 500 mT at

a power system bottleneck 0 100 °C, both of which are almost
–300 –200 –100 0 100 200 300
in terms of efficiency and 20% higher than the reference
–500
miniaturization. power ferrite material for the
To fully tap the benefits –1,000 120­kHz application.
of next­generation semicon­ It is well known that the Bs of
ductors, namely, silicon car­ –1,500 a polycrystalline MnZn­ferrite
H (A /m) →
bide (SiC) and gallium nitride component is proportional to
power devices, the next­gen­ the magnetization per unit vol­
FIG 1 A comparison of an ac FeSiBNbCu Finemet-type
eration passive components, alloy versus ferrite material at 25 °C, 25 kHz, and 250 A/m. ume, and, as such, it depends on
particularly magnetic com­ The measurement was performed by Bs&T Frankfurt am the chemical composition of the
ponents, must be compatible Main GmbH. crystalline unit cell and on the
with these emerging devices, density of the material. It is there­
especially at high frequencies and under and 200 A/m depending on the industry fore less dependent on the morphologi­
high pulse excitation. In essence, high (aerospace, industry, and consumer cal characteristics of the microstruc­
saturation and low­power losses under electronics). Accordingly, the power ture, such as grain and pore size, or the
pulse excitation and relatively high tem­ losses of these materials at 1 MHz and chemical nature of the grain boundar­
peratures are required. Current power 50 mT vary from around 350 mW/cc at ies. Since MnZn ferrites are crystalline
converters using MnZn­ferrite magnetic room temperature to approximately materials of the cubic (only partially
materials possess saturation induction 1 W/cc at 100 °C. The measuring condi­ inverse) spinel structure with ferri­
(Bs) levels around 530 mT at room tem­ tion is still under the sinusoidal mode. magnetic behavior, the Bs maximiza­
perature that decrease down to 430 mT tion will most likely proceed accord­
High Bs Material Development ing to the rules of the maximization of
Digital Object Identifier 10.1109/MPEL.2018.2852078
The ferrite material given by high resis­ the magnetization difference between
Date of publication: 10 September 2018 tivity is limited by the saturation flux the B (octahedral) and A (tetrahedral)

September 2018 z IEEE PowEr ElEctronIcs MagazInE 21

 IsoMAXX
VAC U U M sublattice. Presumably, the iron content of the composition
BRAZED should be maximized under the conditions that the spinel
C O L D P L AT E
Introducing the
phase is retained, and no secondary phases are formed (i.e.,
revolutionary IsoMAXX hematite­Fe 2 O 3 or wustite­FeO). Thus, materials with the
vacuum brazed cold
plate providing a highly highest possible iron concentration will be synthesized, the
efficient cooling pattern
below the newest
conditions for doing that will be specified, and the magnetic
PrimePACK IGBT properties will be measured (with a focus on Bs as a func­
modules.
• Unsurpassed thermal
tion of temperature).
performance The synthesis process is mostly applying the so­called
• Optimized pressure mixed­oxide method, according to which a powder mix­
drop
• Unparalleled thermal ture of the raw materials (Fe 2 O 3, Mn 3 O 4, and ZnO) at the
homogeneity appropriate proportions is prefired, shaped by uniaxial
• Compact and modular
solution
pressing, and sintered at elevated temperatures, which is,
• Cost competitive finally, supposed to produce the new material grade on a
large scale. On the other hand, the power losses of compo­
nents made of MnZn­ferrite materials also depend strongly,
besides the composition of the unit cell, on the morphologi­
cal properties of the microstructure. The fraction of the
ENHANCED losses depending on the crystal is termed hysteresis losses,
COOLING
while the fraction that depends on the morphology is called
SOLUTION FOR
L AT E S T P R I M E PAC K T M eddy-current losses. There is also a third fraction known
I G B T G E N E R AT I O N as resonance losses that is related with ferrimagnetic reso­
nance of the material and dependent on both the crys­
tal and microstructure. At high application frequencies
(~1 MHz), such as those targeted in this proposal, the eddy
E P. M E R S E N . C O M currents dominate and compose more than 50% of the total
power losses. The very first strategic step in the methodol­
ogy would be the reduction of the main power loss source.
Subsequently and at a later optimization phase, attempts to
reduce the other source losses will be included.
Battery technology The eddy­current losses are losses because of the devel­
opment of ohmic­type eddy currents when the operation
calls for the takes place under alternating magnetic fields. Since these
currents are of an ohmic character, the most efficient way
best protection for their reduction is to increase the specific resistivity of

there is
the material. This can be approached by executing the final
sintering step in such a way so that a high density and, at
the same time, a fine­grained microstructure will form. Fine­
grained microstructures have a high grain boundary concen­
tration, and since the specific resistivity of a grain boundary
is significantly higher than the specific resistivity of the crys­
tal, the total resistivity of the polycrystalline microstructure
increases. It is well known within ceramic powder technol­
ogy that the achievement of fine­grained microstructures re­
quires active powders with small particles and relatively low
temperatures, so that grain growth will not take place during
sintering. These low temperatures do not favor densification.
Moreover, the presence of excess iron in the composition (as
Perfect solutions for your required for the achievement of a high Bs) is another factor
energy storage units – that delays densification. This happens because excess Fe 3 +
SIBA fuses in battery installations
ions on divalent iron positions create positively charged de­
Protect your investments, and those of your clients. fects, which are compensated for by negatively charged cat­
Protect your business. With us. The world over.
ion vacancies. This, in turn, through the Schottky equilib­
SIBA is active around the world and has eleven subsidiaries:
USA, China, Russia, UK, Denmark, Netherlands, Poland, rium, decreases the concentration of positively charged
Austria, Czech Republic, South Africa and Singapore. oxygen vacancies. In ionic solids, the diffusion of the rela­
tively large oxygen ions through oxygen vacancies is the rate
SIBA GmbH (Headquarters and Production)
Borker Str. 20-22 • D-44534 Lünen
Our Protection.
T.: +49 (23 06) 70 01-0 • www.siba.de Your Benefit.
Inquiries: inq01@siba.de
 controlling step, and the existence of
oxygen vacancies is essential for mass
transfer and densification.
Conclusively, there is an inherent
interaction between the crystal compo­
sition and processing toward the de­
velopment of the appropriate polycrys­
talline material. The main challenge
is that process parameters that favor a
high Bs (i.e., iron oxide content) also re­
tard sintering and densification, which
are also desirable both for a high Bs
and high­frequency performance. This
is exactly the region where innova­
tion through recent engagements will
be achieved, bringing about a break­
through in MnZn­ferrite materials and
significantly extending the frequency
application region of MnZn ferrites.
Those previously mentioned obstacles
are also the reason that all currently
existing high­frequency materials have
low Bs values.
The proposed concept is to study
the densification of MnZn ferrites and
Vector Network Analyzer Bode 100
Use Bode 100 to measure:
• impedance of passive components
• input impedance and output impedance
• control loop stability (loop gain) of converters
• and much more from 1 Hz to 50 MHz...
Benefit from a
• very wide frequency range
• multifunctional hardware
• easy-to-use software
www.omicron-lab.com
2018-01-25_Halfpage.indd 1
identify the process parameters that
affect the two individual but simulta­
neously occurring processes: densifi­
cation and grain growth. The results
will be used to design firing sched­
ules, allowing densification and grain
growth as separate processes and tak­
ing place in consecutive temperature
regions rather than in overlapping re­
gions. This will give a lot of freedom to
the materials engineer to design com­
positions and microstructures toward
the desired magnetic performance. In
a later stage, material optimization due
to fine tuning will occur. This may in­
clude a slight composition adjustment
to locate the Curie point at an appro­
priate temperature and, thereby, to
mediate the Bs decrease with tempera­
ture. Likewise, the addition of certain
selected dopants can increase the
resonance frequency and therefore
reduce t he resonance fraction of
the losses. Similarly, the addition of
dopants to coat with high­resistivity
September 2018
(eutectic) phases the grain boundar­
ies and increases the specific resistiv­
ity of the material and decreases even
further the eddy­current fraction of
the losses.
Given the importance of loss,
which means inefficiency, the loss
mechanism is still not fully understood.
Consequently, it deserves a separate
phrase to describe loss more clearly.
Since the only physical origin is the
damping of the domain wall by an
induced eddy current and relaxation
process, the investigation of the ex­
citation mode becomes increasingly
important to quantify the loss under
desired conditions. This enables more
insight into loss mechanism for mate­
rial scientists as well as for inductive
component designers.
Large-Sized Shaped-Ferrite Core
For real applications, the magnetic
flux is important. The theoretical
comparison of flux density is not
z IEEE PowEr ElEctronIcs2018-01-26
MagazInE 23
09:55:56
 With an increasingly thinner tape, to
20,000 lower eddy­current loss, the polycrys­
PF N95 HzT talline ferrite­shaped core has a poros­
PF VP HzT 70% ity of a few percent.
PF SA1 HzT 80% It is clearly illustrated from Figure 2
P.F. (500 mW/ccm)

that, for midfrequency applications,

D9B
like traction, wireless charging, and
solid­state transformers for dc grids,
large­sized shaped­ferrite cores with
< 25 kHz high Bs characteristics are a very in­
2,000
2,000 20,000 Frequency Hz teresting alternative for a wide range
of applications.
FIG 2 A comparison of the performance factor (PF) with 500 mW/cm3 for a SiC high- Compared to alloyed tape­wound
power application of an iron-based amorphous and nanocrystalline alloy (with con- material, the size of the ferrite core
sideration of a packing factor) versus the standard-power ferrite and ultra-high Bs fer- shape is limited by the powder metal­
rite. VP: Vitroperm is a trademark of iron-based nanocrystalline alloy from VAC lurgical process. Nowadays, the major­
Hanau Germany; SAI: a trademark of iron-based amorphous alloy from Hitachi/Met-
ity of MnZn­ferrite cores have small di­
glas, Conway, South Carolina; D9B: a trademark of ferrite from DTT Shandong China;
N95: a trademark of ferrite from EPCOS/TDK Munich, Germany. mensions, not much different from the
dimensions of the laboratory samples.
The emerging market driven by SiC
necessarily helpful for particular factors (~20% for thinner tape like for photovoltaic and electrification for
application design. In case of thin 23  µm). Because of the surface tex­ automotive and installation applica­
tape­wound core, the whole dimen­ ture of thinner ribbon, the ratio of tions, like wireless charging infrastruc­
sion of a large­sized alloyed tape­ layer of roughness to ribbon thick­ ture, requires large­sized MnZn­ferrite
wound core is suffering from packing ness en larges with thinner ribbon. cores (https://product.tdk.com/info/en/
catalog/datasheets/ferrite_mz_large_e_
en.pdf) to be able to serve the market
Industry Leading needs. Because of the high power de­ Leading
Industry
mands, these cores must have mean­
ingful dimensions, which, on average,
ALLOY POWDER CORES are more
ALLOY than 10 cm.CORES
POWDER This is associated
Design Software with certain technological problems
that need to be addressed in the devel­
opment phase and before the transfer
of the technology to production.
In every solid component made by
compaction and sintering of a par­
ticulate powder, numerous gradients
• Trusted may arise. Powder flowability and
• Innovative Powder Core Solutions for
compaction technology may not be
• Collabrotive ideal and may generate local density
• Experienced Lighting Applications
gradients in the compacted specimen.
During heating and cooling, tempera­
tureDifferential-Mode
AC Input gradients may Choke,
developResonant
between Inductor,
Flyback Inductor, DC-DC Convertorspeci­
the surface and the center of the Inductor, and
Power Factor
men. Also, Correction
during sintering,Boost Inductor.
intermedi­
DC-DC Converter Inductors & Output Filter Inductors ate phases may form, and oxidations
and reductions may also occur with an
influence on the unit cell sizes. These
phenomena may result in stress gen­
eration within the polycrystalline body
of the product. In laboratory samples
Micrometals Alloy Powder Core Division Micrometals Alloyproducts,
or in small­sized Powder the Core
stressesDivision
Anaheim CA, USA • Shenzhen China generated by these
Anaheim CA, USA • Shenzhen gradients usually
China
www.micrometalsarnoldpowdercores.com do not exceed the fracture
www.micrometalsarnoldpowdercores.com strength of
the material and will not be noticed.

24 IEEE PowEr ElEctronIcs MagazInE z September 2018

 However, in large­sized products,
such as those intended to be produced
within this project, the fracture strength
can easily be exceeded, resulting in the
appearance of internal cracks. The mag­
netic performance is extremely sensi­
tive in the presence of microcracks.
It is therefore proposed to investigate
the mechanism of the reaction of raw
materials during the prefiring step and
the influence of process parameters
(such as the prefiring atmosphere, the
particle size of the raw materials, etc.)
on the phase composition of the final
prefired powder. Subsequently, the vari­
ous weight, expansion and shrinkage,
and phase changes during sintering
will be monitored as a function of the
phase composition of the prefired pow­
der and the partial pressure of oxygen
in the sintering atmosphere. The recent
engagement is the development of the
smoothest firing schedule so that the
eventual temperature gradients will not
give rise to gradual oxidations/reduc­
tions or other chemical reactions and
stress generation.
Conclusions
The most recent ferrite development
is illustrated in material and in core
shape. The highest Bs material is in
focus for high power, i.e., SiC­driven
application in high power for motion,
automotive, and traction application
associated with midvoltage dc grid
propagation and high power density.
The high Bs is desired according to
Snoek’s law, and while Bs is predomi­
nately influenced by chemistry, the
loss mechanism is crystallized with an
investigation into its morphological
nature and its processing parameters,
i.e., the densification process. Another
trend in large­sized core shapes, about
8 in in height and 4 in in width, is also
described, overcoming challenges to
deliver perfect artificial ferrite ceram­
ic to fulfill the needs of newest devel­
opments in power electronics.
Today, ferrite, after nearly 100
years of development, is manufactur­
ed with a capacity of about 500,000
metric tons per year for diverse in­
dustries. This recent innovation is
September 2018
rooted in Snoek’s formulation. Both
high power density and high power
application requires high Bs charac­
teristics. It is crucial to understand
both the chemical composition and
the morphology engineering process
to fully comprehend the impressive­
ness of the artificial ceramics.
About the Author
J.C. Sun is the founder of Bs&T
Frankfurt am Main GmbH based in
Frankfurt, Germany. He received his
Dipl.­Ing. degree from Hamburg Uni­
versity of Technology, Germany, and
an M.B.A. degree from the Collège des
Ingénieurs, Paris, France. Prior to start­
ing his own company, he was an employ­
ee of Philips Components’ Ferrite
Division in Hamburg and worked in
the Sales Europe Group of Metglas,
Hitachi­Metals, in Düsseldorf, Germa­
ny. In addition, he also worked as an
application engineering manager for
Vacuumschmelze in Hanau, Germany.
z IEEE PowEr ElEctronIcs MagazInE 25
 by William Gerard Hurley, Tim Merkin, and Maeve Duffy

The Performance
Factor for Magnetic
Materials Revisited
The effect of core losses on the
selection of core size in transformers

T
he performance factor (PF) for magnetic materials originated with S.A. Mul-
der [1] to compare different grades of ferrite materials. It essentially consists
of a plot of the product of the frequency (f) and flux density (B) versus fre-
quency at a specified level of power loss per unit volume. The fB product is
important to the sizing of inductors and transformers because in the sizing
formula for cores of interest in power electronics the fB factor appears, and there is an
inverse relationship between size and the PF. The PF is temperature dependent. The core
losses are measured on small ring cores to ensure that the core losses are dominated by
hysteresis loss. This article deals with ferrite materials and the effect of core losses at
high frequency on the selection of the core in a specific transformer application. A useful
starting point for transformer optimization is to assume the core losses are equal to the
winding losses. This assumption taken in conjunction with the classical Steinmetz equa-
tion (SE) [2] can lead to the conclusion that the core can be reduced in size as long as the
frequency is increased. The advent of wide-bandgap devices leading to higher frequencies
than their traditional counterparts would suggest that the core sizes may be further
reduced in applications, such as resonant converters, where the faster switching devices
are employed. We will see that the core loss data as presented by the SE does not apply at
very high frequencies and the additional losses must be taken into account when sizing
the transformer core.
The PF has its origin in the celebrated SE [2] for core loss-per-unit volume under
sinusoidal excitation

PV = K c f a Bt b = K c( fBt ) b f a- b, (1)

where K c, a, and b are constants that are normally obtained from the manufacturer’s
core loss data curves. Here, Bt is the amplitude of the sinusoidal flux density at fre-
quency f. The PF is the product fBt and from (1)
1
PF = f Bt = a KV k f (1 - a/b) .
P b
(2)
c

Digital Object Identifier 10.1109/MPEL.2018.2848738

Date of publication: 10 September 2018 images licensed by ingram publishing

26 IEEE PowER ElEcTRonIcs MagazInE z September 2018 2329-9207/18©2018IEEE

The PF is normally plotted for a given value of PV , say 300 mW/cm3, at a specified temperature.
Figure 1 shows the PF at 100 °C for three TDK ferrite materials, the N59 material is now
known as PC200. The suitable operating frequency range for each material is self-evident.
There is a peak value of the PF for each material; the frequency where it occurs depends
on the value of PV that was used to plot the curve. We shall show later that a is equal to b
at the maximum point and that the optimum product of frequency and flux density from a
transformer sizing point of view is at the peak of the PF curve. The data in Figure 1 suggest
that the N59/PC200 material operating in the 700 kHz–3 MHz range would yield the small-
est transformer core. The objective of this article is to show that the PF can be interpreted
in terms of transformer specifications to yield an optimum frequency where the core size
is minimized and to find the size of the core. The PF curves also apply to inductor sizing;
however, this article is concerned with only transformers because there is an optimum
core size based on the fundamental principle that the core losses are approximately equal
to the winding losses. With the advent of wide-bandgap devices, pushing frequencies ever
higher, the optimum frequency for minimizing core size is of interest. The frequency range
for the N59/PC200 material in Figure 1 would be of interest in resonant power supplies.
The SE in (1) is based on core loss data typified by straight lines on a log-log scale as
illustrated in Figure 2. These curves give rise to single values of K c, a, and b, in this case
K c = 9.6, a = 1.275, and b = 2.161. The size of the transformer will decrease with increas-
ing frequency under these core loss conditions. The purpose of this article is to establish
the minimum size of the transformer for a given set of specifications based on “real” core
loss data.
In reality, the core loss curves are not straight lines on a log-log graph; they increase at a
faster rate at high frequency as shown for the N49 material in Figure 3(a). The slope of the
graph is related to a and, at the higher frequency, a is greater than b. We need to revisit the
ideal SE expression for core loss to take the variation in a into account. One straightforward
way to do that would be to modify (1) to provide a better fit for the measured core loss curves:

PV = K c ( fBt ) b f a - b ;1 + c f m E,
f a
cr

(3)
cr

and the PF becomes

1 1

PF = fBt = a KV k f (1 - a/b) ;1 + c f m E .
P b f a -b cr

(4)
c cr

This involves the introduction of two additional parameters, fcr and a cr, which may be
found by curve fitting. The manufacturer’s core loss curves for N49 material are
shown in Figure 3(a), and the corresponding curves generated by (3) are in Figure 3(b),
with the following values at 100 °C:
K c = 31.5, a = 1.25 and b = 2.85, a cr = 2.0
and fcr = 800 kHz.

In (3), fcr should be taken at a sufficiently high frequency to ensure that the low fre-
quency asymptote of (3) coincides with (1). Figure 3 shows that the variation in the

70,000
60,000
f . B (kHz . mT)

50,000
40,000
30,000 N87
20,000 N49
10,000 N59
0
10 100 1,000
f (kHz)

FIG 1 The PF for three ferrite materials. (Figure courtesy of TDK.)

September 2018 z IEEE PowER ElEcTRonIcs MagazInE 27

loss curves is a function of tempera- to other core materials, such as nano-
ture, and indeed of the flux level. crystalline material.
The simulated curves in Figure 3(b)
A useful starting point In this article, we revisit the PF in
refer to 100  °C. It is important to for transformer opti- the section “The Sizing Formula” in
point out at this stage that the PF is the light of the practical Steinmetz
mization is to assume
based on core loss data only. In equation (PSE) (3) that takes the varia-
recent years the definition has been the core losses are tion in core losses at high frequency
expanded to include high-frequency equal to the winding into account and ties it into the sizing
losses in the windings [3]. formula for transformer cores. In the
The PF for the materials in Figure 1 losses. “Design Example: Push-Pull Converter”
are calculated using (4) and plotted section, we apply the new approach to
in Figure 4. The agreement with Fig- the design of a typical push-pull con-
ure 1 is impressive considering that verter, select the core, optimize the
only one set of parameters were used in each case. These winding for proximity effect, and explore using litz wire to
observations apply to ferrites and do not necessarily apply reduce the skin effect.

The Sizing Formula

1,000 200 mT The informing principles for transformer sizing are the
150 mT winding losses and the core losses. The dc copper loss in
100 mT each winding is RI 2. The high-frequency skin and proxim-
b
kW
m3

100 ity effects in the windings must be considered after the

Core Losses a

core is selected.
50 mT
The copper loss is [4]
10
Pcu = t w MLT k u Wa J o2, (5)

where t w is the resistivity of the winding conductor. The

1
10 100 1,000 product of the mean length of a turn (MLT) and the window
Frequency (kHz) area (W a) is the volume of the winding (Vw) . The window
utilization factor (k u) is the ratio of the window area occu-
FIG 2 Core loss as a function of frequency at 100 °C. pied by copper and J o is the current density in the windings.

FAL0595-6
104 10,000
kW 0.0250
0.0500
m3 0.1000
PV
103 300 mT 1,000 0.2000
Core Loss (mW/cm3)

102 100
200 mT

101 100 mT 10

50 mT
25 mT 12.5 mT
100 1
25 °C
80 °C
100 °C
10–1 0.1
101 5 102 kHz 103 10 100 1,000
f Frequency (kHz)
(a) (b)

FIG 3 (a) The core loss curves for N49 material. (b) The core loss curves based on (3) at 100 °C. [Figure 3(a) courtesy of TDK.]

28 IEEE PowER ElEcTRonIcs MagazInE z September 2018

The main physical dimensions of the transformer are shown 27 b [hk t DT] 8
^ fBt o h 7< F . (11)
7b - 2 7(a - b) K v2 k u
f =
in Figure 5. (b + 2) [t w k w] [k c K c] / VA 2
8

The core losses are given by the SE (1)

Pfe = Vc K c ( fBt ) b f a - b .
In relation to the waveform conditions in the trans-
former, the root mean square (rms) voltage across wind-
ing i is
The first and second terms on the right-hand side are fixed
(6) quantities dependant on b and material properties. The
third term is dependent on the circuit conditions and speci-
fications.
The PF in (11) may be used directly in (10) to find Ap
4

A p = )= G<
/ VA 2b F37b - 2
(b + 2) G=
t c, k c2 (t w k w) b K c2 (b + 2) b + 2
E i = K v f N i BA (7)
K v k ub DT (b + 2)
2b
(hk t) 4b b

where A c is the cross-sectional area of the core and N i is
the number of turns in winding i. The variable K v is the
voltage waveform factor and has the value of 4.44 for sinu-
soidal waveforms and 4 for a square waveform. Its value can
be established for any other voltage waveform encountered
in power electronics applications.
In [4], it has been shown that the there is an optimum
point where the core and winding losses combine to give
a minimum value of the total losses (Ptotal = Pcu + Pfe). This
point for a given frequency is at
2 a 1 b. Clearly, for a = b, the size of the transformer is fixed
Pfe = P . (8)
b cu
Since b is typically equal to two, this is the oft-quoted opti-
mum condition for transformers; the core losses are equal
to the winding losses.
The total losses are related to the temperature rise
8 (a - b)
#f 7b - 2 . (12)
This appears somewhat formidable, but recall the first two
terms on the right-hand side have constant variables and
material properties; the third term is a function of the speci-
fications of the transformer (i.e., the VA rating and the tem-
perature rise) and the final term has frequency with the
material parameters a and b.
The optimum value of the PF is implied in the sizing for-
mula (12). It is evident from (12) that the size of the trans-
former decreases with increasing frequency as long as
and independent of frequency. Finally, for a 2 b, the size
of the transformer will actually increase with frequency. In
70,000
60,000
f . B (kHz . mT)

in the transformer with convection from the trans- 50,000

former surface 40,000
30,000
20,000
Ptotal = hA t DT, (9) 10,000
0
10 100 1,000 10,000
where h is the coefficient of heat transfer by convec- Frequency (kHz)
tion, A t is the surface area of the wound transformer,
N59
and TT is the temperature rise in the transformer due N49
to the losses. N87
Manufacturers use the product of the window area in
the core and the core cross-sectional area A p = Wa $ A c to
size the core. FIG 4 The calculated PF for three ferrite materials.
The fundamental equations may be combined and sim-
plified with dimensional analysis to yield an expression for
A p (see “Key Equations”)
MLT Window Area, Wa

t w k w b + 2 1 4/7 / VA
8/7

A p = ; hk E = G . (10) Cross-Sectional
t b k u DT K v fBt o Area, AC
Volume of
The value RVA is the sum of the VA ratings of all the Windings, VW
windings in the transformer. The product fBt o is used here
to emphasize that the product is based on the optimum con-
ditions given by (8). Volume of
Implicit in (10) is the optimum value of the flux density. Core, VC
2r0
Normally, frequency is specified and the optimum value of
the flux density is found from FIG 5 The physical dimensions of a transformer.

September 2018 z IEEE PowER ElEcTRonIcs MagazInE 29

terms of the physical manifestation of the core loss data, in
^ fo B o h7b - 2 f o7 (a - b) ;1 + c f m E
a cr 7
f
Figure 3(a), a 1 b at the lower end of the frequency range cr

and a 2 b at the upper end of the frequency range. The fre- 27 b [hk t DT ]8
< F
K v2 k u (13)
=
quency at the maximum value of the PF may be found by (b + 2) 8 [t w k w] [k c K c] 7 / VA 2
taking the derivative of fB o with respect to frequency in 4

A p = )= G<
/ VA 2b F37b - 2
(b + 2) G=
(11) to show that it occurs when a = b. k c2 (t w k w) b K 2c (b + 2) b + 2
K v k ub DT (b + 2)
2b

Adopting the PSE in (3) it is relatively straightfor- (hk t) 4b b

;1 + c m E
ward to find the new expressions for the PF in (11) and 8 (a - b) f acr 7b - 2
# fo 7b - 2 . (14)
A p in (12): fcr

Key Equations
The dc copper loss in a transformer with n windings is / VA = / K v fN i BJ
t o A wi A c (S9)
n
t w N i MLT
Pcu = / A wi ( J o A wi) 2 . (S1) and invoking the window utilization factor (S2) and the definition
i=1
of A p
The value N i MLT is the length of winding i with N i turns, A wi
is the area of the conductor i, and J o is the current density in the / VA = K v (fBt ) k u A p J o . (S10)
windings.
The window utilization factor (k u) is the ratio of the window area Substituting J o from (S10) into (S7), offers an expression for the
(W a) occupied by copper, so copper loss in terms of the performance factor (PF):
n
/ N i A wi t w k w / VA
2

i=1 Pcu = = G 1 . (S11)

ku = Wa . (S2) k u K v( fBt ) A 5p/4

Incorporating the definition of the window utilization factor into (S1) Evidently, the copper loss is inversely proportional to the square of
yields the PF and the core loss is proportional to PF.
It follows from (8) that the combined winding and core losses are
Pcu = t w MLT k u W a J 2o . (S3)
b+2
Ptotal = P . (S12)
b cu
The product of the MLT and the window area W a is the volume of the
winding Vw . The expression for A p in (10) is found from (S12), with Ptotal given by
At this point, it is helpful to introduce dimensional analysis. The (9) and (S6) and Pcu given by (S11).
physical quantities, surface area (A t), the volume of the core (Vc), and The current density in the windings may be found from (S7) and
the volume of the winding (Vw), are all related to the core window (S12) with (9) and (S6):
area product (A p):
b hk t DT 1
Jo = . (S13)
b + 2 t w k w k u A p1/4
Vw = k w A p3/4 (S4)

Vc = k c A p3/4 (S5) Use the optimum condition in (8) to express (S12) in terms of the
core loss Pfe, (9) with (S6) for the heat loss, (S8) for Pfe, and (10) for A p
A t = k t A p1/2 . (S6)
yields the specific expression for the PF fBt o in (11).
The duty cycle in the push-pull converter is [5]
The constants k w, k c, and k t may be found from the dimensions
of typical cores. For the present purposes, k w = 10, k c = 5.6, and Vo 24
D= = = 0.667. (S14)
V s /a 36
k t = 40 are typical values for the cores encountered in power
electronic converters. The voltage waveform factor for the push-pull transformer is derived
Rewriting (5) and (6) as in [5]

Pcu = t w k w A 3p/4 k u J 2o (S7) 4

Kv = = 4.9. (S15)
D
Pfe = k c A 3p/4 K c ( fBt ) b f a - b, (S8)
The expression for the sum of the VA ratings, in terms of the power
factor of the windings k p, in the push-pull transformer is [5]
the VA rating of each winding is the product of the root mean square
(rms) voltage and the rms current. Summing all the VA ratings, taking
the voltage for each winding in (7) and the current ( J o A wi): / VA = c k1pp a P2o + P2o k + k1ps a P2o + P2o km = 900 VA. (S16)

30 IEEE PowER ElEcTRonIcs MagazInE z September 2018

 10
Ap PSE is1 D1 Lo
Np : Ns
Ap SE
+
Area Product, WaAc (cm4)

+ +
vp2 vs2 Co Vo
– – –
1 + +

+ vp1 vs1
Vdc
– –
–
S2 S1 is2 D2

0.1
10 100 1,000 10,000
Frequency (kHz)

FIG 6 A p based on the SE and the PSE. FIG 7 A push-pull converter.

Table 1. Material specifications. vp1, vs1

n87 n49 n59/Pc200 P Vdc
Kc 3.35 31.5 0.021 9.46 Φ

a 1.4 1.25 1.83 1.3 0 t

b 2.85 2.85 2.98 2.7
a cr 2.2 2 5.8 3

fcr (kHz) 270 800 2500 400

ip1 ip2
At this point, we can plot the area product A p based on (12) Io
and (14), in Figure 6.
In Figure 6, the straight line is A p with (12) using the
SE in (1) and, as expected, A p decreases indefinitely as 0 t
the frequency increases. This is the traditional approach to is1
core sizing. With the modification for the true core loss, we
obtain the A p as a function of frequency with the minimum
value occurring at fo . Thus, there is an upper limit to fre- Io
quency where the core size is minimized and, above that Io
frequency, the core size is increased. Evidently, this mini- 2
mum core size is dependent on the transformer specifica- 0 t
tions (e.g., the power rating and temperature rise). is2

Design Example: Push-Pull Converter

Io
core selection Io
Four materials were chosen to examine the effect of the 2
0 t
PSE on core size: TDK N87, N49, N59/PC200, and Ferrite P ∆T ′ T ′ T
materials. The materials constants are given in Table 1. The
application chosen was a 300-W push-pull converter with a FIG 8 Push-pull converter waveforms.
nominal dc-input voltage of 36 V and a dc-output voltage of
24 V. The allowable temperature rise is 30 °C and the ambi- Selecting a turns ratio of Np/Ns = 1, the duty-cycle ratio
ent temperature is 70 °C. is 0.443, K v is 4.9, and RVA is 900 VA (see “Key Equations”).
The push-pull converter and its associated waveforms At this point, we assume the window utilization factor is 0.4
(i.e., transformer primary and secondary voltages and cur- and check it later.
rents) are shown in Figures 7 and 8. A detailed analysis of The first step is to find the core window area product
the push-pull is provided in [5]. given by (14), for each material in Table 1 with TT = 30 cC,

September 2018 z IEEE PowER ElEcTRonIcs MagazInE 31

 10 Start

15 T
Area Product, WaAc (cm4)

15 T
15 T
15 T
ETD44 Finish
1
(a)

N59 (PC200)
N49
N87
P
0.1
10 100 1,000 10,000 (b)
Frequency (kHz)
Rac /Rdc Versus Frequency
FIG 9 Area product designs with the modified core model. 100 160 ∗ 0.1 mm
40 ∗ 0.2 mm
16 ∗ 0.315 mm

Rac /Rdc
Table 2. Core specifications. 1 ∗ 1.32 mm
10
Ac 1.73 cm2
Wa 2.10 cm2
Ap 3.63 cm4 1
3
1 10 100 1,000
Vc 17.70 cm
Frequency (kHz)
MLT 7.77 cm (c)

FIG 11 The ac resistance for litz wire (a) winding configura-

tion, (b) coils, and (c) R ac /R dc . (Figure and photo courtesy of
i Traco Power Solutions.)

Io effects into account, as described in [4]. Consider 50  kHz

tr for the operating frequency of the converter; the N87 and P
materials are suitable in that range.
D ″T T T t The ETD44 core with N87 material meets the size require-
ment. The specifications of the core are listed in Table 2.
i

Io winding Design
tr We can now turn our attention to the winding design. The
current density is found from (S13) and the conductor area
tr D ″T T T t in the primary and secondary windings is 3 mm2 with six
Io turns in each winding. We have a choice: we can use foil
–
tr winding or wire. Let’s start with a foil winding. The optimum
ratio of foil thickness to skin depth is given by [6]
FIG 10 The pulsed waveform for the push-pull converter. 4 15 ~I rms
D opt =
5p 2 - 1 I' rms . (15)

K v = 4.9, RVA = 900 VA, k u = 0.4, h = 10 W/m 2 cC, k w = 10,
k c = 5.6, k t = 40, and tw = 1.72 # 10 -8 X-m. The results are
shown in Figure 9. The solid part of the curves represents
the frequency range for the material per the manufacturer’s
PF in Figure 1. The dashed part of the curves shows the
results outside that range.
The results in Figure 9 show that the minimum trans-
former size for a given set of specifications occurs at the
frequency where the value of the PF peaks. The design is
completed by taking the high-frequency skin and proximity
Essentially, it depends on the ratio of the rms value of
the current waveform and the rms value of its derivative.
The current waveform for the push-pull converter and its
derivative are shown in Figure 10. Assuming rise and fall
times t r / T of 2.5%, we can evaluate (15) at 50 kHz to give the
optimum ratio of the foil thickness to skin depth of 0.4 for
p = 6  layers. At 50 kHz, the skin depth is 0.295 mm, suggest-
ing a foil thickness of 0.1 mm. Therefore, the foil is 0.1 mm ×
3 mm in the ETD44 bobbin. The ratio of ac resistance to dc
resistance at the optimum foil thickness is 1.33 [6].

32 IEEE PowER ElEcTRonIcs MagazInE z September 2018


FIG 12 The power supply with the transformer. (Photo cour-
tesy of Traco Power Solutions.)
Considering the solid-wire alternative, the required
diameter is 2 mm. Here, the ratio of wire radius to skin
depth is 3.4 and the ratio of ac resistance to dc resistance at
50 kHz is given by [5]
R ac ro 3 d
R dc = 0.25 + 0.5 d + 32 ro = 1.97. (16)
Clearly, the foil is superior to the solid wire. However, we
may now consider litz wire to reduce the skin effect by
introducing smaller strands to replace the solid wire.
Litz wire is a multistrand conductor whose strands are
insulated from each other and the diameter of each strand
is selected to minimize skin and proximity effects. As a
general rule, the diameter of the individual strands should
be approximately one-quarter to one-third of a skin depth
[7], meaning strands of 0.1-mm diameter in this case. Each
winding with litz wire is itself unique and, at best, we can
apply some general guidelines, such as the one noted earlier
for the strand diameter. The additional insulation for each
strand reduces the window utilization factor and, for a large
number of strands, this is at least 70% smaller compared to
the foil winding. The A p formula shows that the core is 30%
larger for the same temperature rise.
To investigate the use of litz wire in this case, we con-
structed a transformer with the ETD44 core. The primary
and secondary consisted of 15 turns each. Four assem-
blies were tested with a solid 1.32-mm wire and three litz
wires with strands of 16 # 0.315 mm, 40 # 0.2 mm, and
160 # 0.1 mm. All four assemblies have the same copper
cross-sectional area. The ratio of R ac /R dc was measured for
each configuration and plotted in Figure 11(c).
Clearly, at 50 kHz, the 160-strand litz wire is superior and
is comparable to the foil in terms of ac losses. The measure-
ments in Figure 11 show that while litz wire is appropriate
to use in this case, operating at a much higher frequency
shows that the solid wire may be superior as is the case
at 1  MHz. This is because additional skin and proximity
effects occur at the strand and bundle level that cause more
losses than the skin effect in the solid conductor. Figure 12
shows the power supply with the transformer.
Conclusions
This article has introduced a modified version of the SE to
account for “real” core loss data. The SE and its parameters
are a curve-fitting function for a given operating point of fre-
quency. The parameters change with frequency, which is
why the classical approach does not reflect reality. The tra-
ditional concept of PF was combined with a realistic model
of the core losses in the SE that shows that there is an opti-
mum frequency where the area product of the transformer
is minimized and that the value of the core size is dependent
on the specifications of the application. The parameters of
the SE (i.e., ideal and practical) are a function of tempera-
ture and the flux density level. The analysis as presented
applies to sinusoidal flux density for the core loss and an
approach similar to the general SE and improved general SE
[8] for nonsinusoidal waveforms. The improved core loss
calculation [9] for dc bias is required to incorporate addi-
tional types of waveforms. The PF curve can compare dif-
ferent materials, and the analysis here extends the useful-
ness of the PF approach to establish the selection of the
core in a given application.
About the Authors
William Gerard Hurley (wghurley@ieee.org) received his
B.E. degree in electrical engineering from the National Uni-
versity of Ireland (NUI), Cork, in 1974, his M.S. degree from
the Massachusetts Institute of Technology, Cambridge, in
1976, his Ph.D. degree from the NUI, Galway, in 1988, and
his higher doctorate, D.Eng. degree, based on his publica-
tions in 2010. He is currently a professor emeritus at the
NUI, Galway, and a professor at the Tianjin University of
Technology, China, under the foreign talent program. He
was the general chair of the IEEE Power Electronics Spe-
cialists Conference in 2000. He has coauthored a textbook
on transformers and inductors, Transformers and Induc-
tors for Power Electronics, that has been translated into
Chinese. He received the IEEE Power Electronics Society
(PELS) Middlebrook Award for technical achievement in
2013 and was appointed a Distinguished Lecturer of the
IEEE for 2014–2017. In 2018, he received the IEEE PELS
Harry A. Owen, Jr., Distinguished Service Award for dedicat-
ed service to IEEE PELS for more than 30 years. He is a Fel-
low of the IEEE.
Tim Merkin (tim.merkin@gmail.com) received his B.S.
degree in electrical engineering from Texas A&M University-
Kingsville and his M.S. degree in electrical engineering from
the University of Texas at Arlington in 2003 and 2005, respec-
tively. Following graduate school, he joined Epoch Microelec-
tronics designing analog and radio-frequency integrated cir-
cuits. Since 2010, he has been with Texas Instruments, design-
ing many different analog-integrated circuit products for a
wide variety of applications, mostly associated with power
management. He is currently a member of the technical staff
September 2018 z IEEE PowER ElEcTRonIcs MagazInE 33
 The parameters
change with frequency,
which is why the classi-
cal approach does
not reflect reality.

at Texas Instruments. A product he designed was selected as an innovation honor-

ee at the 2016 Consumer Electronics Show for his work on a universal serial bus
type-C/power delivery interface controller. More recently, he led the design of con-
trollers for inductor–inductor-capacitor resonant converters.
Maeve Duffy (maeve.duffy@nuigalway.ie) received her B.E. and Ph.D.
degrees in electronic engineering from the National University of Ireland (NUI),
Galway, in 1992 and 1997, respectively. From 1997 to 2001, she was a research offi-

images licensed by ingram publishing

cer with PEI Technologies at the Tyndall National Institute in Cork, Ireland, where
she worked on several European Union and industry-funded projects on the
development of planar magnetics. Since 2001, she has been a lecturer in electrical
and electronic engineering at the NUI. Her research is based in the Power Elec-
tronics Research Centre, where her interests include magnetic component design
for power-supply-on-chip, wireless power transfer, energy harvesting, and renew-
able energy systems. She is a Senior Member of the IEEE.

References
[1] S. A. Mulder, “Loss formulas for power ferrites and their use in transformer design,” in Phillips
Components. Eindhoven, The Netherlands: Philips, pp. 1–16, 1994.
[2] C. P. Steinmetz, “On the laws of hysteresis,” Proc. IEEE, vol. 72, no. 2, pp. 197–221, 1984.
[3] A. J. Hanson, J. A. Belk, S. L. C. R. Sullivan, and D. J. Perreault, “Measurements and performance fac-
tor comparisons of magnetic materials at high frequency,” IEEE Trans. Power Electron., vol. 31, no. 11,
pp. 7909–7925, 2016.
[4] M. Rashid, “Magnetic circuits design for power electronics,” in Power Electronics Handbook, 4th ed.
Amsterdam, The Netherlands: Elsevier, 2017, pp. 571–592.
[5] W. G. Hurley and W. H. Wölfle, Chap. 5 in Transformers and Inductors for Power Electronics: Theo-
ry, Design and Applications. Hoboken, NJ: Wiley, 2013.
[6] W. G. Hurley, E. Gath, and J. G. Breslin, “Optimizing the ac resistance of multilayer transformer
windings with arbitrary current waveforms,” IEEE Trans. Power Electron., vol. 15, no. 2, pp. 369–376,
Mar. 2000.
[7] C. R. Sullivan, “Optimal choice for number of strands in a litz-wire transformer winding,” IEEE
Trans. Power Electron., vol. 14, no. 2, pp. 283–291, 1999.
[8] K. Venkatachalam, C. R. Sullivan, T. Abdallah, and H. Tacca, “Accurate prediction of ferrite core loss
with nonsinusoidal waveforms using only Steinmetz parameters,” in Proc. 2002 IEEE Workshop Com-
puters Power Electronics, 2002, pp. 36–41.
[9] J. Muhlethaler, J. Biela, J. W. Kolar, and A. Ecklebe, “Improved core-loss calculation for magnetic
components employed in power electronic systems,” IEEE Trans. Power Electron., vol. 27, no. 2, pp.
964–973, Feb. 2012.

34 IEEE PowER ElEcTRonIcs MagazInE z September 2018

 A Global
Real-Time Superlab
Enabling high penetration of
power electronics in the electric grid

by Antonello Monti, Marija Stevic, Steffen Vogel, Rik W. De Doncker,

Ettore Bompard, Abouzar Estebsari, Francesco Profumo, Rob Hovsapian,
Manish Mohanpurkar, Jack David Flicker, Vahan Gevorgian,
Siddharth Suryanarayanan, Anurag K. Srivastava, and Andrea Benigni

T
he Global Real-Time Superlaboratory (Global RT Superlab) represents a ven-
dor-neutral distributed platform based on the virtual interconnection of digital
real-time simulators (DRTSs) and hardware-in-the-loop (HIL) setups hosted at
eight geographically distributed laboratories in the United States and Europe
(Figure 1). This article describes the efforts toward the realization of this large-
scale virtual infrastructure and explains a demonstration of the multilab setup for sim-
ulation and testing of next-generation global power grids.

The Emerging Global Grid

The electric grid is changing. In particular, power electronics is
significantly transforming power systems all around the
world. This change is driven by the progressive instal-
lation of distributed energy resources (DERs),
which are typically based on a power electron-
ics interface, and it is creating a com-
pletely new power electronics-run, low-
inertia grid. As described in [1], this
future is closer than we think.

Digital Object Identifier 10.1109/MPEL.2018.2850698

Date of publication: 10 September 2018

©istockphoto.com/Beholdingeye

2329-9207/18©2018IEEE September 2018 z IEEE PowER ElEcTRonIcS MAGAzInE 35

 Even today, the operation of grid opens up new technical scenarios and
portions with only power electronics- theoretical questions regarding, for
driven sources is possible. This means,
A new world is opened example, the dynamic operation of
in a nutshell, that we are transforming for power electronics the system issues related to intercon-
an electromechanical system into an tinental-scale stability and interoper-
and power system
electronic system. At first glance, this ability. However, testing new ideas
seems to be a challenge. The electro- engineers to design the on a real grid is not an easy task. This
mechanical system presents fully pre- grid of the future. is why real-time simulation is gain-
dictable dynamic behavior that can ing so much momentum in the power
be well represented using Newton’s community. Computational capability,
second law of motion. The result is data processing constraints, and the
that, without any control intervention, the system will have availability of real-life data all limit the possibilities of per-
an intrinsic tendency to move to a new steady-state operat- forming meaningful studies in a single laboratory. For this
ing point. This feature has been used in the classical grid reason, and to encourage new ways of sharing knowledge,
to achieve system-level automation without requiring high- the idea of performing distributed real-time simulation is
performance control and ultrafast control reaction. The first emerging [5]. In the following, an ambitious vision of a net-
line of reaction of the system is programmed in the underly- work of laboratories across two continents is introduced,
ing physics. But with power electronics, this feature disap- together with the first experimental knowledge that has
pears. The response then depends on the control. While this been acquired on it.
may appear to be a complication, it can actually be viewed
as an opportunity. In fact, a new world is opened for power Geographically Distributed Real-Time Simulation
electronics and power system engineers to design the grid This paradigm shift of power grid constituents in the form
of the future. of power electronics creates two major challenges. First,
In this area, many ideas are emerging. Converters con- large-scale and multidomain simulation and testing re-
nected to the grid can present different behavior [2] depend- sources are necessary for the design and assessment of
ing on their control architecture. Particularly interesting is power grids. Second, a harmonized transition toward next-
the emerging need for converters that are able to perform the generation power grids requires a holistic approach toward
so-called grid-forming operation. These devices are really the the evaluation of the synergies between newer concepts and
key players in supporting the frequency control of the future. the identification of potential unpredictable interactions. To
That said, there is still great freedom for control designers address these issues, research facilities utilize multiple
to define how this support should be delivered [3], [4]. Addi- DRTS units operating in parallel [6] and deploy comprehen-
tionally, thanks to ultrahigh-voltage dc applications, it is also sive test benches. However, it is cost prohibitive and hardly
possible for the first time to link continents, such as Europe feasible to establish a large-scale and holistic simulation and
and the Americas. Plans are under way to build a global grid testing infrastructure at an individual facility. To this end,
to better support a futuristic scenario based on an extremely the concept of the virtual interconnection of laboratories in
high penetration of renewable energy sources. real time is proposed.
It then becomes natural to ask how such a global grid Real-time simulation resources, power HIL (PHIL) set-
will operate. Thinking in terms of a global network inter- ups, novel test benches, and hybrid cosimulation frame-
connecting local power electronics-run grids completely works are interconnected to form a comprehensive research

FIG 1 The control center at the Idaho National Laboratory during a Global RT Superlab demonstration. (Photos courtesy of Idaho
National Lab.)

36 IEEE PowER ElEcTRonIcS MAGAzInE z September 2018

infrastructure that allows the sharing of resources and
enables large-scale and multidomain experiments. Virtually
interconnected infrastructures serve as a flexible framework
for collaboration on joint experiments and studies based on
indirect data sharing without revealing confidential details of
individual research groups, industries, and utilities. There-
fore, the collaborations and joint studies that leverage com-
petencies across research entities are feasible even with con-
fidentiality constraints.
The underlying concept of the virtual interconnection of
laboratories in real time is being introduced as a geographi-
cally distributed real-time simulation (GD-RTS). This refers
to the concept of partitioning a monolithic simulation model
into subsystem portions that are simulated concurrently
on multiple DRTS units located at geographically dispersed
facilities. Interconnection and data exchange between DRTS
systems is typically realized via a shared communication
network, such as the Internet. As illustrated in Figure 2,
geographically dispersed HIL setups can be interconnected
based on the GD-RTS concept. Therefore, comprehensive
real-world testing of interconnection and interoperability
between novel technologies and the existing power grid can
be performed without the need for the diverse HIL setups to
be located at the same facility.
The interface quantities exchanged among DRTS units
are variables defining power, typically current and volt-
age. The prime requirement for an accurate GD-RTS is
conservation of energy at the interface. Energy must be
DRTS 1
Subsystem 1 Communications
Network
Processing Unit 1... m Communications
Interface
Signal Virtual
Interface Power
Interface
Controller Hardware
(Device Under Test)
Laboratory 1
FIG 2 A schematic of the GD-RTS. (Figure courtesy of RWTH Aachen University.)
neither generated nor stored at the interfaces between
simulated subsystems. If conservation of energy is vio-
lated, simulation stability and fidelity cannot be ensured,
and the GD-RTS results become invalid. Simulation fidel-
ity is a measure of how close the GD-RTS outcomes are
to the simulation results obtained based on a monolithic
model. It greatly depends on the partitioning point that is
selected to divide the monolithic model for the purpose
of distributed simulation. Empirical studies have shown
that substation transformers and high-voltage dc (HVDC)
lines are suitable for model partitioning. Furthermore,
the interconnection of laboratories via the Internet intro-
duces an inevitable communication latency as well as
other characteristics of a shared communication net-
work, such as jitter, packet loss, and packet reordering.
As a result, the conservation of energy at the interfaces
can be significantly violated. Therefore, cosimulation
interface algorithms are necessary to compensate for the
effects of the communication network on simulation sta-
bility and fidelity [5].
Cosimulation Platform
Distributed simulation relies on a cosimulation framework
for interfacing participating simulators with each other. To
support the vision of a global grid of simulators, a new
cosimulation system called VILLASframework has been
developed by the Rheinisch-Westfälische Technische Hoch-
schule (RWTH) Aachen University [7], [8]. HIL simulations
DRTS 2
Subsystem 2
Communications Processing Unit m + 1 ... n
Interface
Forward/Feedback
Signals to/from
Power Amplifier
Power Amplifier
Power
Interface
Power Hardware
(Device Under Test)
Laboratory 2
September 2018 z IEEE PowER ElEcTRonIcS MAGAzInE 37
38
Workstation 1..n Public Server Remote Lab 1..n
HTTP/Reset API
Web/Proxy Influxdb
VILLASweb Server Simulator
Database
(Front End) WebSockets
VILLASweb MongoDB
Pintura API
(Back End) (Database)
(CIM Editor)

IEEE PowER ElEcTRonIcS MAGAzInE

Web VILLASnode
(Central) VILLASnode VILLAScontroller
Browser Message Broker
Socket AMQP Socket AMQP

AMQP Control/Status

IP/UDP Data

z September 2018
Center for Wind Power Drives ACS Lab PGS High-Speed Test Bench
Socket AMQP

VILLASnode VILLAScontroller

Simulator
Scripts

PCIexpress
Fiber

Simulator
VILLASfpga

EtherCAT EtherCAT Analog Analog

I/O I/O

Fiber

FIG 3 A schematic of the VILLASframework cosimulation platform. CIM: common information model; HTTP: hypertext transfer protocol; API: application programing interface; IP:
Internet Protocol; ACS: Institute for Automation of Complex Power Systems; PGS: Institute for Power Generation and Storage Systems. (Images courtesy of RWTH Aachen University.)
require models in the electromagnetic Without a global scheduler, each
transients domain, which are exe- simulator itself is responsible to
cuted in real time. With time steps
Plans are under way to synchronize its shared task execu-
ranging from 1 to 50 μs, this becomes build a global grid to tion with a global time reference.
a challenging task, which is handled No synchronization between the tar-
better support a futur-
by specially optimized real-time simu- gets themselves is performed. Apart
lation targets. Scaling such simula- istic scenario based on from handling the data exchange,
tions to thousands of nodes is cur- an extremely high pen- the gateway is responsible for moni-
rently impossible because of the com- toring the interfaces and collecting
putational limits imposed by a single etration of renewable results and statistics.
target. VILLAS attempts to overcome energy sources. The second component, VILLAS-
this limitation by coupling existing web, is a web interface enabling par-
and proven DRTSs into clusters through ticipants to remotely monitor the sim-
the Internet. ulation via a standard web browser.
The framework consists of four components that can be Graphical dashboards allow users to customize their view
used as building blocks for arbitrarily large cosimulation of the simulation according to their interests. Simulation
setups. The first component, VILLASnode, is a gateway for results are streamed via WebSockets in near real time to
simulation data and measurements. It provides a variety of the browser and are rendered by a variety of widgets, such
interfaces to existing real-time simulation targets as well as as plots, gauges, or text boxes. This live view of the simula-
adapters to commonly used protocols, such as User Data- tion state is crucial for enabling interaction. Buttons, slid-
gram Protocol (UDP), Message Queuing Telemetry Trans- ers, and dial widgets permit users to affect the course of the
port, Advanced Message Queuing Protocol (AMQP), and simulation. An example of such a web-based visualization
international standard IEC 61850. The main way it differs is shown in Figure 4.
from existing frameworks is in its modular and decentral-
ized architecture, as it does not rely on a central broker and Global RT Superlab Demonstration
scheduler to pace the simulation. Instead, simulators are RWTH Aachen University gained its first insights and expe-
interfaced with the VILLASnode gateways, which, in turn, rience with the virtual interconnection of laboratories in
are connected to other gateways and simulators, as shown collaboration with SINTEF, a research organization with
in Figure 3. Similar to the architecture of the Internet, com- facilities in Norway. In 2014, RWTH and SINTEF demon-
plex cosimulation scenarios, each composed of a collection strated the feasibility of joint simulation based on long-dis-
of peerings without a central authority, can be created. tance interconnection of OPAL-RT Technologies systems

FIG 4 A screenshot of a web-based live visualization of the simulation status and results. (Image courtesy of RWTH Aachen University.)

September 2018 z IEEE PowER ElEcTRonIcS MAGAzInE 39

located in Aachen, Germany, and Trondheim, Norway. At
the same time, motivated by the vision of the large-scale,
vendor-neutral virtual interconnection of laboratories,
RWTH started the design and development of VILLAS-
framework. In October 2015, RWTH, Politecnico di Torino
(POLITO), and two facilities of the European Commission’s
Joint Research Center demonstrated the virtual intercon-
nection of four laboratories in Europe and established the
European Real-Time Integrated Cosimulation Laboratory.
Earlier that year, two U.S. bodies, the Idaho National Labo-
ratory (INL) and the National Renewable Energy Labora-
tory (NREL), Golden, Colorado, successfully connected
RTDS simulators at their facilities. The work toward trans-
atlantic interconnection of laboratories in Europe and the
United States had started in 2016 with a collaboration
between RWTH and INL. Another six research institutions
joined this initiative in the following year, with the main
objective to establish the Global RT Superlab across
Europe and the United States.
In September 2017, a demonstration called Global Real-
Time Superlab was performed; it was the most extensive
GD-RTS of a large power system [9]. A total of eight labo-
ratories utilizing ten DRTSs from the three major vendors
(OPAL-RT Technologies, RTDS Technologies, and Typhoon
HIL) were connected over the Internet using the previ-
ously presented VILLASframework. Figure 5 shows the
geographic locations of the involved laboratories, spanning
the United States, Germany, and Italy.
Table 1 provides an overview of the participants in the
Global RT Superlab demonstration and an outline of the
simulation models and laboratory setups. In the United
States, the INL played a central role by simulating the nine-
bus Western Systems Coordinating Council (WSCC) trans-
mission benchmark network on its RTDS system. Likewise,
in Europe, the RWTH Aachen University contributed the
FIG 5 The Global RT Superlab participants and their interconnections. (Map courtesy of RWTH Aachen University.)
40 IEEE PowER ElEcTRonIcS MAGAzInE z September 2018
RTDS-based simulation of a 12-bus European transmission
network benchmark model proposed by the International
Council on Large Electric Systems (CIGRÉ).
The transatlantic link between INL and RWTH was estab-
lished by a long-distance HVDC line with both RWTH and
the INL laboratory simulating one converter station. The
rationale behind this choice was the vision of the global grid,
a worldwide power framework based on ultra-HVDC lines
connecting continents across the globe [10]. The HVDC link
allows for the interconnection of grids with different sys-
tem frequencies. Thus, laboratories in the United States and
Europe can focus on simulating and testing power networks
with the characteristics of the actual local grids. Further-
more, the selection of an HVDC link as a partitioning point
preserves simulation stability for the large communication
latency between RWTH and the INL laboratory.
There were distribution networks connected to the
backbone transmission structure at INL and RWTH, includ-
ing a controller HIL (CHIL) setup contributed by the Uni-
versity of South Carolina (USC), and PHIL arrangements of
a wind turbine and a photovoltaic (PV) inverter provided
by the NREL and Sandia National Laboratories (SNL),
respectively. In general, the model was partitioned into the
U.S. and European Union grids that included transmission
and distribution networks with diverse PHIL and CHIL of
devices that are representative of the novel technologies
being interconnected.
POLITO utilized an OPAL-RT system for simulating the
CIGRÉ European distribution network benchmark model,
with PV units and an interconnection to the transmission
system emulated at RWTH. SNL contributed the seven-bus
simplified distribution system simulated on OPAL-RT with
a PHIL format for a physical PV inverter. A PHIL setup of a
wind turbine together with a simplified three-bus distribu-
tion system simulated on RTDS was contributed by NREL.
The laboratory arrangement at USC INL and RWTH had to merge the
included CHIL with National Instru- streams from their peers and send
ments CompactRIO controllers, Appo-
Eight geographically them collectively to the local RTDS
site N-91 hardware for emulation of a distributed laborato- simulator. In addition, all of the labo-
communication network, and an OPAL- ratories sent monitoring data to INL,
ries jointly performed
RT system for simulation of a modified which hosted the VILLASweb inter-
IEEE 123-bus distribution test system. a comprehensive face, with the visualization shown in
The controllers were responsible for simulation of a Figure 4. The VILLASweb visualiza-
regulating the reactive power of the tion was utilized by all of the partici-
PV inverters and aimed to minimize transatlantic HVDC pants to obtain a holistic view of the
power losses. interconnection. overall simulation, which could be
An IEEE 13-node distribution test presented to the guests.
feeder and an interconnection to the Between the gateways, the UDP
WSCC transmission model at the INL was chosen for exchanging raw sim-
was simulated on an OPAL-RT system, along with advanced ulation data. Dedicated tests revealed an optimal packet-
load management systems at Colorado State University sending rate of approximately 1,000–2,000 packets/s, which
(CSU). Washington State University (WSU) utilized RTDS kept network congestion and packet loss to a minimum. For
for the emulation of a resilient nine-bus microgrid based security reasons, all network traffic between the laborato-
on the Consortium for Electric Reliability Technology Solu- ries was encrypted with Internet Protocol security virtual
tions (CERTS) concept. private network.
Transformers were identified as suitable partitioning The central role of the INL simplified the overall sim-
points between transmission and distribution systems with ulation process. The testing procedure was divided into
respect to simulation stability and fidelity. This choice also four main stages: preunit testing, unit testing, integration
allowed each research group to simulate systems relevant to testing, and system testing. The objective of the preunit
their competence and research focus. DRTS systems at all testing was to verify the local laboratory setups and data
of the laboratories performed electromagnetic transient exchange between a DRTS system and VILLASnode.
simulation with a time step of 50 µs, except for the OPAL-RT Second, simple connection and point-to-point unit tests
simulator at USC, which utilized 100 µs for the simulation of a were performed between the INL and its peers as well
large-scale distribution system. as between RWTH and POLITO. A benchmark cosimu-
Each laboratory hosted a dedicated version of the lation model was designed for unit tests to provide a ref-
VILLASnode simulation gateway to collect statistics and erence model with high simulation fidelity for the first
exchange interface quantities with the central gateway at GD-RTS tests. Following them, an integration test phase
INL, while POLITO exchanged interface quantities with successively added peers to build up to the full scenario.
RWTH. As nodes with multiple cosimulation interfaces, Finally, during system testing, the simulation procedure

Table 1. The simulation models making up the Global RT Superlab.

Site Grid # Busses Peers HIl Simulator
INL, Idaho Falls Western Systems Coordinating Council Nine RWTH, WSU, — RTDS,
USC, SNL, Typhoon HIL,
NREL, CSU OPAL-RT
RWTH Aachen University, International Council on Large Electric 12 INL, POLITO — RTDS
Germany Systems–High Voltage
POLITO, Italy International Council on Large Electric 14 RWTH — OPAL-RT
Systems–Medium Voltage
Sandia National Laboratories, Distribution grid Seven INL PHIL for PV inverters OPAL-RT
New Mexico
NREL, Golden, Colorado Distribution grid Three INL PHIL for wind RTDS
turbines
University of South Carolina, IEEE distribution test system 123 INL CHIL, network emu- OPAL-RT
Columbia lation

Colorado State University, IEEE distribution test feeder 13 INL — OPAL-RT

Fort Collins
Washington State University, Simplified Consortium for Electric Reli- Nine INL — RTDS
Pullman ability Technology Solutions microgrid

September 2018 z IEEE PowER ElEcTRonIcS MAGAzInE 41

and VILLASweb visualization were adjusted and tuned
for the actual Global RT Superlab demonstration.
Simulation Scenario and Results
The simulation procedure (Figure 6) was designed with the
objective of leveraging the key resources and competencies
of each laboratory and demonstrating the advantage of a
network of laboratories for studying next-generation power
grids. Following the demonstration startup procedure, and
after the overall interconnected system reached a steady-
state operating point with respect to the cosimulation inter-
faces, the CompactRIO controllers at USC described in the
previous section were activated. As a result, the reactive
power at the point of common coupling (PCC) of the inter-
connection of the distribution system at USC to the WSCC
transmission system at INL was reduced. Power measure-
ments at the cosimulation interfaces at INL and USC are
illustrated in Figure 7 and indicate a high level of simulation
fidelity for the described scenario.
The transient across the HVDC link between RWTH and
the INL was initiated by changing the set point for active
power reference by 25 MW of the converter station at the
transmission system at RWTH. This resulted in a decrease
of power transfer from INL to RWTH across the HVDC link.
As a result, the system frequency of the WSCC transmission
system at the INL increased because of net excess genera-
tion. Following the frequency increase, the wind turbine at
NREL decreased the active power output, as the control of
the wind turbine included a droop curve for system support
during frequency deviations. The total active power of the

CHIL and
Communication Network
Emulation

USC WSU Simplified CERTS Microgrid

ss7 ss8
WSCC

European High-Voltage
Transmission Network
SNL Benchmark (CIGRÉ)
ss6
INL RWTH
HVDC

ss1 ss2

European Medium-Voltage
Transmission Network
Benchmark (CIGRÉ)

Test Bed for ss5 ss4 ss3

PV Systems
NREL CSU POLITO

National Wind
IEEE 13-Node
Technology Center
Test Feeder

FIG 6 The Global RT Superlab scenario. (Images courtesy of RWTH Aachen University.)

42 IEEE PowER ElEcTRonIcS MAGAzInE z September 2018

 Active Power at INL-NREL PCC
4 0
Active Power (MW)

3
–1
2
–2
1
–3

Active Power (MW)

0
0 10 20 30 40 50 60 70 80 90 –4
Time (s)
–5
(a)
Reactive Power (MVAr)

–6
4
–7
3
–8
2
–9 ss1 (INL) ss5 (USC)
1
–10
0 0 1 2 3 4 5 6 7
0 10 20 30 40 50 60 70 80 90
Time (s)
Time (s)
(b)
FIG 8 The response of the wind turbine at the NREL following the
ss1 (INL) ss7 (USC) frequency increase. (Graph courtesy of RWTH Aachen University.)

FIG 7 The power measurements at the INL–USC cosimulation Fuel Cell and Water Power Technologies Offices of the U.S.
interface following the activation of the controllers at USC: (a) Department of Energy and by the Laboratory Directed
active power and (b) reactive power. (Graphs courtesy of RWTH Research and Development Office, Idaho National Labora-
Aachen University.) tory, Idaho Falls.

NREL system at the PCC with the WSCC system at the INL
measured at the INL and NREL terminals of the cosimula-
tion interface is illustrated in Figure 8.
Conclusions
The Global RT Superlab was successfully established with
its first large-scale transatlantic demonstration. The
VILLASframework significantly reduced research efforts
by enabling a modular and flexible interconnection and
coordination of a multivendor, virtually interconnected
distributed platform. Eight geographically distributed labo-
ratories jointly performed a comprehensive simulation of a
transatlantic HVDC interconnection between the bench-
mark transmission systems of the United States and Euro-
pean grids, including local transmission–distribution inter-
actions and a capability assessment of distributed genera-
tion units to support grid operation. The Global RT Superlab
provides a collaborative environment for such holistic
studies by leveraging individual resources and competen-
cies in a flexible way.
Acknowledgments
We would like to thank Marcelo Masera of the European
Commission for his initial ideas on and support for a global
power system simulation infrastructure. This work was sup-
ported by the RESERVE, which is a European Union Hori-
zon 2020 project funded under grant agreement 72748. We
also gratefully acknowledge the financial support for proj-
ects related to interlaboratory connectivity provided by the
About the Authors
Antonello Monti (amonti@eonerc.rwth-aachen.de) received
his M.Sc. and Ph.D. degrees in electrical engineering in 1989
and 1994, respectively, from Politecnico di Milano, Italy. Cur-
rently, he is the director of the Institute for Automation of
Complex Power Systems, Rheinisch-Westfälische Technische
Hochschule Aachen University, Germany.
Marija Stevic (mstevic@eonerc.rwth-aachen.de)
received her B.Sc. degree in electrical engineering in 2009
and her M.Sc. degree in electrical and computer engineering
in 2012, both from University of Belgrade, Serbia. Currently,
she is a researcher at the Institute for Automation of Com-
plex Power Systems, Rheinisch-Westfälische Technische
Hochschule Aachen University, Germany.
Steffen Vogel (stvogel@eonerc.rwth-aachen.de) re-
ceived his B.Sc. and M.Sc. degrees in electrical engineering,
information technology, and computer engineering in 2014
and 2017, respectively, both from RWTH Aachen University,
Germany. Currently, he is a researcher at the Institute for
Automation of Complex Power Systems, Rheinisch-West-
fälische Technische Hochschule Aachen University,
Aachen, Germany.
Rik W. De Doncker (dedoncker@eonerc.rwth-aachen
.de) received his M.Sc. degree in electromechanical power
engineering in 1981 and his Ph.D. degree in electrical power
engineering (with the highest distinction) in 1986, both from
the Katholieke Universiteit Leuven, Belgium. Currently, he is
the director of the E.ON Energy Research Center, Rheinisch-
Westfälische Technische Hochschule Aachen University. He

September 2018 z IEEE PowER ElEcTRonIcS MAGAzInE 43

was the past president of the IEEE Power Electronics Soci-
ety and received the IEEE William E. Newell Power Elec-
tronics Award in 2013. He is a Fellow of the IEEE.
Ettore Bompard (ettore.bompard@polito.it) received
his M.Sc. and Ph.D. degrees in electrotechnical engineering
in 1990 and 1994, respectively, from Politecnico di Torino,
Italy. Currently, he is a professor of power systems,
Department of Electrical Engineering, Politecnico di Tori-
no, Turin, Italy.
Abouzar Estebsari (abouzar.estebsari@polito.it)
received his B.Sc. degree in electrical engineering in 2006
from Iran University of Science and Technology, Tehran, his
M.Sc. degree in electric power engineering in 2009 from
Shahed University, Tehran, Iran, and his Ph.D. degree in
electrical engineering in 2015 from Politecnico di Torino,
Turin, Italy. Currently, he is an assistant professor of power
systems, Department of Electrical Engineering, Politecnico
di Torino, Turin, Italy.
Francesco Profumo (francesco.profumo@polito.it)
received his M.Sc. degree in electrotechnical engineering in
1977 from Politecnico di Torino, Italy. Currently, he is a pro-
fessor of electrical machines at the Politecnico di Torino,
Turin, Italy.
Rob Hovsapian (rob.hovsapian@inl.gov) received his
B.S., M.S., and Ph.D. degrees in mechanical engineering
from Florida State University in 1986, 1988, and 2009,
respectively. Currently, he is a research scientist at the
Idaho National Laboratory (INL), Idaho Falls, and manager
of INL’s Energy Systems and Technologies Division.
Manish Mohanpurkar (manish.mohanpurkar@inl
.gov) received his B.E. degree in electrical, electronics, and
power engineering in 2008 from the Government College of
Engineering, Aurangabad, India, and his M.S. degree in 2010
and his Ph.D. degree in 2013, both in electrical and comput-
er engineering from Oklahoma State University, Stillwater,
and Colorado State University, Fort Collins, respectively.
Currently, he is group lead for energy systems research at
the Idaho National Laboratory, Idaho Falls.
Jack David Flicker (jdflick@sandia.gov) received his
B.S. degree in chemistry and physics in 2006 from Penn
State University, State College, and his Ph.D. degree in mate-
rials science and engineering in 2011 from the Georgia Insti-
tute of Technology, Atlanta. Currently, he is a senior mem-
ber of the technical staff at Sandia National Laboratories,
Albuquerque, New Mexico.
Vahan Gevorgian (vahan.gevorgian@nrel.gov)
received his M.S. degree in 1986 and his Ph.D. degree in
1993 in electrical engineering from Yerevan Polytechnic
Institute, Armenia, and State Engineering University of
Armenia, respectively. Currently, he is chief engineer with
the Transmission and Grid Integration Group, National
Renewable Energy Laboratory, Golden, Colorado.
Siddharth Suryanarayanan (sid.suryanarayanan@
colostate.edu) received his B.E. degree in electrical and
electronics engineering from the University of Madras,
Chennai, India, and his M.S. and Ph.D. degrees in electrical
44 IEEE PowER ElEcTRonIcS MAGAzInE z September 2018
engineering from Arizona State University. Currently, he is
an associate professor in the Department of Electrical and
Computer Engineering, Colorado State University, Fort Col-
lins, and the inaugural recipient of the Lisa and Desi Rhoden
Endowed Chair.
Anurag K. Srivastava (anurag.k.srivastava@wsu.edu)
received his B.Tech. degree in 1997 from the Harcourt But-
ler Technological Institute, Kanpur, India, his M.Tech.
degree in 1999 from the Indian Institute of Technology, Vara-
nasi, India, and his Ph.D. degree in 2005 from the Illinois
Institute of Technology, Chicago. Currently, he is an associ-
ate professor in the School of Electrical Engineering and
Computer Science, Washington State University, Pullman.
Andrea Benigni (benignia@cec.sc.edu) received his
B.S. and M.S. degrees in electrical engineering from Politec-
nico di Milano, Italy, in 2005 and 2008, respectively. He
received his Ph.D. degree in electrical engineering from
RWTH Aachen University, Germany, in 2013. Currently, he is
an assistant professor of electrical engineering in the Col-
lege of Engineering and Computing, University of South
Carolina, Columbia.
References
[1] T. Ackermann, T. Prevost, V. Vittal, A. J. Roscoe, J. Matevosyan, and N.
Miller, “Paving the way: A future without inertia is closer than you think,”
IEEE Power Energy Mag., vol. 15, no. 6, pp. 61–69, 2017.
[2] J. Rocabert, A. Luna, F. Blaabjerg, and P. Rodriguez, “Control of power
converters in ac microgrids,” IEEE Trans. Power Electron., vol. 27, no. 11,
pp. 4734–4749, 2012.
[3] J. A. Suul, S. D’Arco, and G. Guidi, “Virtual synchronous machine-based
control of a single-phase bi-directional battery charger for providing vehicle-
to-grid services,” IEEE Trans. Ind. Appl., vol. 52, no. 4, pp. 3234–3244, 2016.
[4] D. Raisz, A. Musa, F. Ponci, and A. Monti, “Linear and uniform system
dynamics of future converter-based power systems,” in Proc. IEEE Power
Energy Society General Meeting, 2018, pp. 1–5.
[5] M. Stevic, A. Estebsari, S. Vogel, E. Pons, E. Bompard, M. Masera, and A.
Monti, “Multi-site European framework for real-time co-simulation of power
systems,” IET Generation, Transmission Distribution, vol. 11, no. 17, pp.
4126–4135, 2017.
[6] M. D. O. Faruque, T. Strasser, G. Lauss, V. Jalili-Marandi, P. Forsyth, C.
Dufour, V. Dinavahi, A. Monti, P. Kotsampopoulos, J. A. Martinez, K. Strunz,
M. Saeedifard, X. Wang, D. Shearer, and M. Paolone, “Real-time simulation
technologies for power systems design, testing, and analysis,” IEEE Power
Energy Technol. Syst. J., vol. 2, no. 2, pp. 63–73, 2015.
[7] S. Vogel, M. Mirz, L. Razik, and A. Monti, “An open solution for next-
generation real-time power system simulation,” in Proc. IEEE Conf. Energy
Internet and Energy System Integration (EI2), 2017, pp. 1–6.
[8] FEIN Aachen. (2018, July). e.V. Software projects. [Online]. Available:
http://www.fein-aachen.org/projects/
[9] INL Media Relations. (2017, July). Eight-lab simulator linkup aims to
boost future electric grid stability. [Online]. Available: https: //www.inl.gov/
article/eight-lab-simulator-linkup-aims-to-boost-future-electric-grid-stability/
[10] S. Chatzivasileiadis, D. Ernst, and G. Andersson, “Global power grids for
harnessing world renewable energy,” in Renewable Energy Integration, 2nd
ed., L. E. Jones, Ed. Boston: Academic, 2017, pp. 161–174.

by Syed Huzaif Ali, Xiong Li,
Anant S. Kamath, and Bilal Akin
a simple Plug-In circuit
for IgBt gate Drivers
to Monitor Device aging
Toward smart gate drivers
I
n this article, a simple, cost-effective circuit is pro-
posed for in situ monitoring of aging and degrada-
tion in discrete IGBT devices through the measure-
ment of on-state collector-emitter voltage drop
(Vce,on) and gate-threshold voltage (Vth) . For this
purpose, comprehensive device degradation tests are
conducted through cyclic thermal stress applications.
Based on the test results, Vce,on and Vth are found to be
reliable precursors for a practical device health assess-
ment, and a monitoring circuit, that can be easily incor-
Digital Object Identifier 10.1109/MPEL.2018.2849653
Date of publication: 10 September 2018
2329-9207/18©2018IEEE
©footage firm, inc.
porated in conventional gate driver (GD) circuits is pro-
posed. As one of its key advantages, a Vce, on monitoring
circuit does not require complex compensation and reca-
libration like some of the earlier methods. The proposed
circuit can measure Vce,on and Vth in microseconds dur-
ing system start/stop diagnostic test routine. The mea-
surement results of the proposed circuit are also com-
pared with those from the high-precision curve tracer
(Keysight B1506A), which validates its utility as well.
Aging Detection Methods for IGBT
Today, most modern power converters deploy IGBTs, there-
fore their lifetimes are dependent upon the condition of
September 2018 z IEEE PowEr ElEctronIcs MagazInE 45
 System
ACD
8%
12%

ACD Others
Inverter 9%
21% 37%
System
Inverter
6%
59%
Data
Data
Acquisition
Acquisition
System
Others System
7%
27% 14%

(a) (b)

FIG 1 The failures in PV systems over five years: (a) unscheduled maintenance events and (b) maintenance cost breakdowns due to
failures. PV: photovoltaic; ACD: ac disconnects.

IGBTs [1]. According to one comprehensive survey con-

ducted on a solar farm, most of the system failures occur in
power converters (inverters). Among these, power devices
Humidity occupy a major portion of repair/maintenance costs, as
19% shown in Figure 1(a) and (b) [2]. These failures and corre-
Dirt sponding downtimes can cause a significant amount of
6% Temperature
Steady-State operation loss. There are several factors that affect device
and/or Cyclical degradation and aging; thermal stress has been identified as
Vibration/
Shock 55% the major cause of device aging and package-related fail-
20% ures, as shown in Figure 2 [3], and may cause bond wire lift-
off, delamination, solder joint, and gate-oxide issues as
depicted in Figure 3 [4].
One frequently discussed method is measuring the
IGBT’s junction temperature, T j, which refers to the semi-
FIG 2 The major stressors that act on IGBTs and cause aging. conductor die temperature, and using that measured T j in
the classical Coffin-Mason or other modified stress model
for estimating the IGBT’s lifetime [1]. Measuring T j is not an
Bond Wire easy task because the die is generally encapsulated in thick
Bond Pad
Si Die plastic-molded packages that restrict noninvasive T j mea-
Solder surements. Therefore, different electrical parameters have
Cu Base Plate Thermal been investigated for estimating T j without modifying the
Paste die or encapsulating package [5]. Nevertheless, estimating
Heat Sink T j requires recalibration and/or complex thermal modeling
(a) to compensate for the aging effects.
Another approach is based on using the device’s param-
Bond
Wire Crack Is Initiated eter information to estimate its lifetime. In [6], an easy-
to-implement remaining useful lifetime (RUL) estimation
model for power field-effect transistors has been proposed
based on the variations in on-state resistance (R ds,on). This
Silicon
model directly uses an R ds,on variation because of aging, in
Die
15.0 kV × 100 300 µm contrast to other models that first calculate T j based on
(b) (c) electrical parameters [5]; it then estimates a switch’s life-
time using stress models based on the calculated T j [1].
FIG 3 The IGBT structure and its failure analysis: (a) a discrete-
package IGBT structure, (b) the red spots in an acoustic analysis Several electrical parameters and their measurement
snapshot reveals significant delamination, and (c) a cross-sec- circuits have been reported in the literature as useful
tioned image showing a crack initiation. Si: silicon; Cu: copper. failure precursors for IGBT as well. Among these failure

46 IEEE PowEr ElEctronIcs MagazInE z September 2018

precursors, Vce,on measurement meth- which analyzes only the effects of
ods have been studied extensively [7]. aging under thermal stress.
Besides, a comprehensive discussion is
During these tests, all Furthermore, devices’ conditions
presented in [8] about noninvasive con- of the conditions are have been verified at regular inter-
dition-monitoring topologies and the vals during aging tests for the pos-
maintained exactly
corresponding issues in their imple- sible decrease in the resistance bet-
mentation. Nevertheless, one of the the same, with the ween collector-emitter terminals (i.e.,
major issues is the integration of aging exception of the loss-of-breakdown voltage, BVces
monitoring circuit(s) into the existing capability) using the handheld ohm-
design of converters, particularly the maximum junction meter. To measure failure precursors
GD circuit. temperature (Tj,max ), at regular intervals, a Keysight curve
In [9], the authors have shown the tracer B1506 has been used as part of
utility of Vce,on results for degradation which analyzes only the test setup, of which the measure-
detection, but used pseudo Vth mea- the effects of aging ment and test details as well as fur-
surements for estimating T j . They ther results have been discussed in
have used T j information for Vce,on cor-
under thermal stress. [13] and [14]. More importantly, ther-
rection, however, Vth was affected by mal cycle duration has been corrected
aging and a pseudo Vth measurement after every few hundred cycles to com-
requires a Kelvin emitter connection, which is uncommon pensate the aging effects for estimating T j, as described in
in discrete-package IGBTs. In [10] and [11], circuit details [4]. End-of-life behavior for different samples has been sum-
are given for capturing a variety of failure precursors with marized in Tables 1 and 2 for above- and below-SOA test
pseudo real-time capability but require too many additional cases, respectively [14].
components and may not fit easily in a compact GD. In Figure 6(a) and (c), the Vce,on results for a few samples
The main goal of this article is to demonstrate a smart tested above and below SOA or manufacturer-specified
GD circuit, which can monitor aging related parameters. T j,max limits are shown. Generally, the contacts crack under
With this connection, this article proposes a start/stop thermomechanical stress and fatigue leads to increased
diagnostic test routine to detect aging in IGBTs by monitor- electrical contact resistance; this causes a rise in Vce,on
ing Vth and Vce,on sequentially with a cost-effective circuit. curves, but Vce,on curves at a nominal collector current (I ce)
The circuit is specifically designed to be easily embedded of 5 A follow the “dip-before-rise” behavior, as shown in Fig-
in conventional GDs. The smart GD circuit integrated with ure 6(a) for above-SOA tests. Once the minimum value has
Vth and Vce,on monitoring capability has not been reported been reached, the slope changes to positive and continues
in literature. to increase until complete device failure occurs.
It is speculated that the degradation in both electrical
Identified Failure Precursors and thermal impedances compete with each other to dic-
Previously, gate-threshold voltage (Vth) has been used to tate the overall Vce,on profile. Aging in die attach causes
detect gate oxide-related failures [12]. Similarly, Vce,on has degradation in both thermal and electrical impedances.
also been identified as a useful failure precursor for detect- The degraded thermal impedance increases T j and intrin-
ing package related failures [8]. To understand the effects of sic carrier concentration, which subsequently lowers Vce,on .
thermal stress and confirm the utility of failure precursors After reaching that minimum value, the increased electri-
and their aging profile, a custom accelerated aging test bed cal resistance starts to dominate and dictates the Vce,on
has been used. The schematic design is shown in Figure 4, profile. It is important to note that both increased minority
and the actual snapshot of setup is shown in Figure 5. carrier lifetime and/or reduced gate-threshold voltage due
A set of tests is performed on different IGBT samples to the increased junction temperature can cause Vce,on to
under various thermal stress scenarios. Two cycling schemes decrease. Contrarily, a rising temperature can decrease
are implemented depending on whether the device is operat- the carrier mobility, thereby increasing Vce,on . Thus, at any
ing within safe operating area (SOA) limits. For the previously time throughout aging, a number of physical phenomena
mentioned SOA test, one thermal cycle lasts for more than are competing with one another and determine the overall
2 min, i.e., the Ton /Toff = 45 s/130 s, whereas for the below- Vce,on variation under thermomechanical stresses. These
SOA test, one thermal cycle has a Ton /Toff = 38 s/80 s. The competing mechanisms are illustrated in Figure 7 and more
T j,max is calculated using a thermal model from the manufac- details are given in the previous article [14].
turer datasheet values and the measured case temperature Contrarily, an always-increasing trend in the Vce,on
(Tc) of the individual IGBT. In fact, the thermal cycle dura- variations can be seen for the below-SOA case in Fig-
tion depends on the time required to reach the desired Tc or ure 6(c). This shift lies in agreement with the expected out-
T j,max based on the thermal time constant. During these tests, come of such tests [15]. Furthermore, this always-increasing
all of the conditions are maintained exactly the same, with trend validates the hypothesis that the accelerated temper-
the exception of the maximum junction temperature (T j,max), ature cycling below the maximum temperature of 200 °C

September 2018 z IEEE PowEr ElEctronIcs MagazInE 47

48
DUT Cooling Fan

dc Power Supply

IEEE PowEr ElEctronIcs MagazInE

Auxiliary Board Main Board
Id,1

Transistor Package
Transistor Heat Sink
Auxiliary Circuit 1 Circuit 1

G1auxiliary DUT, 1 No Heat Sink

NI-USB 6255

z September 2018
Auxiliary G1

VCtrl_FAN
Gate Gate Tc,1 Data Acquisition
Swt.1 Driver Driver
System
Vds,1 Id,1Vds,1

Data Storage
Trigger Signal Computer
Tc,1
Auxiliary Circuit 7 Circuit 7
Auxiliary ∗T
c,1,high TI C2000
Gate
DUT, 7 ∗T
c,1,low
DSP
G7auxiliary Signals
Auxiliary Gate G7 Gate
Swt.7 Driver Driver
DUT
Tc,7 ∗∆T ...∗∆T
Gate c,1 c,7
Signals ∗T
c,7,high
∗T
dc Bus c,7,low

FIG 4 The schematic of a test bench. DUT: device under test; TI: Texas Instruments; IR: infrared; DSP: digital signal processor; NI: national instrument; USB: universal serial bus; Swt.:
switch.
 To NI DAQ
Voltage Gate Drivers DSP Controller
Sensing Board
Circuit JTAG to USB

Cooling DUT Temperature Sensor

Fan

FIG 5 A custom-designed aging test setup with a Keysight B1506 curve tracer.

restricts the solder degradation to a lower level. As a result,

Table 1. The IGBT thermal aging
only the positive components of Vce,on dominate the overall results at approximately 200 °C [14].
Vce,on variations under the given conditions. These results
also show good agreement with the results presented in Δt cycle number switch condition
name range of cycles at Failure
[16], where similar trends in Vce,on evolution are observed.
Aside from the package-related failures, gate-oxide IGBT-1A (40–220 °C) 1,600 Always off; low resistance
between the G-E terminals
degradation is another important failure mechanism. IGBT-2A 1,400
and high resistance be-
Gate-oxide degradation in microelectronic components is tween the C-E terminals
IGBT-3A (40–200 °C) 2,594
a well-studied phenomenon. Although the gate-oxide layer
thickness in an IGBT is typically above 150 nm, the gate- IGBT-5A 2,674
oxide follows a similar degradation mechanism. When the IGBT-6A (30–200 °C) 2,159
device’s operating temperature exceeds 100 °C, the traps IGBT-7A 2,191
start to accumulate in the gate oxide [17]. Such traps fur-
ther build up a leakage path causing a decreased oxide IGBT-9A (60–200 °C) 3,331
area and ultimately decreased gate capacitance. Mean- IGBT-10A 3,291
while, this leakage path within the gate oxide increases the IGBT-12A (30–205 °C) 2,308
gate-leakage current. As shown in Figure 6(b) and (d), the
IGBT-13A 2,411
decrease in parasitic capacitances eventually leads to an
increase in Vth during the course of an IGBT’s lifetime [4]. IGBT-4A (40–200 °C) 2,059 Loss of gate control, no
Consequently, a variation in Vth during the device’s lifetime G-E or C-E resistance
IGBT-8A (30–200 °C) 2,440
can be used to determine gate-oxide aging issues.
IGBT-11A (30–205 °C) 2,250
As a summary of previously published results, Vth is
highly useful as aging precursors when T j,max exceeds the
SOA [4]. However, below 100 °C its variation reduces dras-
tically because the gate-oxide failure mechanisms remain Table 2. The IGBT thermal aging
relatively inactive. On the other hand, the Vce,on shifts are results at low thermal swing [14].
highly dependent on the applied thermal stress and can only Δt cycle number switch condition
provide a consistent increase for aging tests below thermal name range of cycles at Failure
SOA [14]. Single-failure precursors may give incomplete IGBT-14A (30–180 °C) 3,592 Always off; low resistance
information. Therefore, to accurately detect and monitor between the G-E terminals
IGBT-15A (30–170 °C) 4,212
the state of health of IGBTs, a measurement circuit for both and very high resistance
Vth and Vce,on is proposed to determine the degradation of IGBT-16A (30–150 °C) 8,450 between the C-E terminals
IGBTs in start/stop system checkups. IGBT-17A 7,435
IGBT-18A (40–140 °C) 12,955
Issues in Measurements of Vth and Vce,on IGBT-19A 13,095
By definition, Vth is the gate-emitter voltage at which the
IGBT-20A (28–100 °C) >32,000 No failure observed
channel inversion occurs and current starts to flow from

September 2018 z IEEE PowEr ElEctronIcs MagazInE 49

 4.5 6.2

Gate Threshold Voltage (Vth) (V)

At Tamb = 28 °C
Collector-to-Emitter Voltage

Ice = 5 A
ΔTj = 160 °C Vge>12 V
4 6
Drop (Vce,on) (V)

Tj,max = 200 °C

3.5 IGBT-3A 5.8 Compliance: Ice = 0.25 mA

IGBT-4A
IGBT-5A
IGBT-3A
3 5.6
IGBT-4A
IGBT-5A
2.5 5.4
0 500 1,000 1,500 2,000 2,500 0 500 1,000 1,500 2,000 2,500 3,000
Number of Cycles Number of Cycles
(a) (b)

3.6 5.5

Gate Threshold Voltage (Vth) (V)

Collector-to-Emitter Voltage

At Tamb = 30 °C Ice = 5 A
3.5 ΔTj = 120 °C Vge>12 V 5.4
Drop (Vce,on) (V)

Tj,max = 150 °C
5.3
3.4
5.2
3.3 Compliance: Ice = 0.25 mA
5.1
IGBT-16A IGBT-17A IGBT-16A IGBT-17A
3.2
5
0 2,000 4,000 6,000 8,000 10,000 0 2,000 4,000 6,000 8,000 10,000
Number of Cycles Number of Cycles
(c) (d)

FIG 6 The aging test results for induced thermoelectric stress, above and below the thermal SOA limit: (a) and (c) variations in
Vce,on drop at I ce = 5A and (b) and (d) variations in Vth drop, respectively.

Increase in Increase in the

Die Attach Equivalent
the Thermal
Degradation Contact Resistance
Resistance

Temperature Temperature
Increase at the Increase in the
PN Junction Drift Region

Gate Increase in the Minority

Threshold Intrinsic Carrier
Voltage Carrier Lifetime Voltage
Reduction Concentration Reduction Drop
Increases
Carrier Across the
Mobility Contacts
Voltage Drop Decreases
at the PN Junction

Vce,on Decrease Vce,on Increase

FIG 7 A simplified approach to explain the underlying physical phenomena responsible for the Vce,on variation in IGBTs under ther-
mally induced aging [14].

50 IEEE PowEr ElEctronIcs MagazInE z September 2018

collector to emitter terminals. For in For the below-SOA case summa-
situ Vth measurements, a small cur- rized in Figure 8(b), the Vce,on curves
rent source (CS) is required to charge
The proposed circuit is at I ce = 10 mA show small dips com-
the gate-emitter capacitance until a intended to be used pared to the result at I ce = 5 A, as
small I ce starts to flow [18]. For the shown in Figure 6(c). In fact, in Fig-
for start-up diagnostic
Vth results shown in Figure 6, the mea- ure 6(c), Vce,on curves show a near-
surement has already been carried out tests in power convert- continuously increasing trend. It is
in a few microseconds at the same test ers before the actual evident that at a higher current with
current (I ce = 0.25 mA) and corre- minimal solder degradation, the con-
spondingly same T j; therefore, the switching operation is tact-resistance voltage drop is the
measurements are considered free activated and/or after dominant component of overall Vce,on
from the effects of variations in I c as but the same contact voltage drop
well as T j . it is halted. becomes negligible at a low- current
On the other hand, Vce,on is a function level. Thus, for a lower current with
of I c as well as T j . As discussed previ- minimal solder degradation, the cor-
ously, a complex load-current compensation is required for responding physical phenomena referred to in the “Identi-
trustworthy Vce,on measurements [6]. Measuring Vce,on at a fied Failure Precursors” section become dominant, which
fixed-test current level can avoid this compensation prob- cause dips in Vce,on curves.
lem at the cost of losing real-time measurement capability.
Since, a Vth measurement requires a fixed-test current through Proposed Circuit Description
device under test (DUT) and isolation of DUT from the main Based on the aging test results, an in situ Vth and Vce,on mea-
currents during measurement, observing Vce,on at lower cur- surement circuit is proposed to monitor IGBT aging. The pro-
rents alongside Vth is feasible. posed circuit is intended to be used for start-up diagnostic
Before utilizing this low-current Vce,on measurement, tests in power converters before the actual switching opera-
aging trends at a lower current must be verified. In this tion is activated and/or after it is halted. The schematic of the
connection, Figure 8(a) and (b) shows the Vce,on results proposed circuit is shown in Figure 9(a). Apart from the GD
at I ce = 10 mA for the same set of tested samples whose components, the circuit features a CS to provide a small test
results at I ce = 5 A have been shown in Figure 6(a) and current; two diodes are included to protect the GD circuit
(c), respectively. For the above-SOA results shown in from the applied high voltage between the C-E terminals dur-
Figure 8(a), significantly less voltage dips are seen as ing off-state and to provide isolation between the CS and GD.
compared to the Vce,on measurements at high current The diagnostic routine involves routing of current from
(5A) shown in Figure 6(a). The device’s self-heating at the CS through different paths to accurately measure Vth
I ce = 5 A causes increased intrinsic carrier concentra- and Vce,on . To achieve this, a set of control signals are gen-
tion, increased carrier lifetime, and decreased gate- erated through the digital signal processor (DSP), namely
threshold voltage, which results in dips in Vce,on curves S1 for IGBT gate signal, S2 to enable the GD output, S3 to
[14]. Conversely, the lower current measurement gener- enable the weak CS, and S4 to control the high-side IGBT.
ates much smaller self-heating; tiny dips in the Vce,on The required timing diagram for control signals is illus-
curves are therefore observed. trated in Figure 9(b).

0.78 0.765
IGBT-3A At Tamb = 28 °C
Collector-to-Emitter Voltage

Collector-to-Emitter Voltage

ΔTj = 120 °C Ice = 10 mA

IGBT-4A Tj,max = 150 °C Vge>12 V
Ice = 10 mA
0.763
Drop (Vce,on) (V)

Drop (Vce,on) (V)

IGBT-5A
0.77 Vge>12 V
At Tamb = 30 °C
ΔTj = 160 °C
0.761
Tj,max = 200 °C
0.76
0.759
IGBT-16A
IGBT-17A
0.75 0.757
0 500 1,500 2,500 0 2,000 4,000 6,000 8,000
Number of Cycles Number of Cycles
(a) (b)

FIG 8 Vce,on measurements at I ce = 10 mA (a) above and (b) below the SOA thermal limit.

September 2018 z IEEE PowEr ElEctronIcs MagazInE 51

 Specifically, the circuit operates in three modes, i.e., the
Vth measurement, the Vce,on measurement, and the normal
operation modes, as illustrated in Figure 9(c)–(e). During
each measurement mode, output- and emitter-node volt-
ages are fed back to a low-pass filter and then to the analog-
to-digital converter pins of the DSP.
1) Vth measurement mode: As illustrated by the red line in
Figure 9(c), the CS is enabled using S3, and the current
starts to charge the gate-emitter capacitance C ge raising
the gate-emitter voltage (Vge) above the threshold volt-
age Vth . Afterward, channel inversion takes place, which
subsequently lowers the Vce , and the CS current is
diverted through the collector terminal. At this point,
the Vout reflects Vth of the device.
2) Vce,on measurement mode: Whereas during Vce,on mea-
surement mode, which is also illustrated in Figure 9(d),
while S1 and S2 are high, the gate emitter is charged to
gate isolated supply voltage (+Vs) using the powerful CS
within the GD integrated circuit. Thus, the CS current
flows only through the collector terminal causing a

S1 +Vs CS +Vbus Timing Diagram

S2 S3
S3 S4 S1
S4 S4
S3

DSP
Output

Control Signals
Isolated + Vs S2
e
Output D2
S1
Vin c
D1
Gate S3
Driver g
S2 e
EN OUT
S4
e GND Vth Vce,on Normal
(a) (b)

S1 +Vcc CS +Vbus S1 +Vcc CS +Vbus

S2 S2
DSP S3 S4 DSP S3 S4
S3

S3

S4 +Vs S4 +Vs

Output D2 Output D2
S1 S1
Vin Vin
Gate D1 Gate D1
Driver Driver
S2 S2
EN OUT EN OUT

GND GND
(c) (d)

S1 +Vcc CS +Vbus

S2
DSP S3 S4
S3

S4 +Vs

S1 Output D2
Vin
Gate D1
Driver
S2
EN OUT

(e) GND

FIG 9 The proposed circuit (red = active and blue = inactive): (a) the schematic, (b) the timing diagram for control signals, (c) the
Vth measurement mode, (d) the Vce,on measurement mode, and (e) the normal GD operation. GND: ground.

52 IEEE PowEr ElEctronIcs MagazInE z September 2018

 voltage drop equivalent to the device’s Vce,on . Accord-
ingly, the Vout reflects Vce,on of the device. 16
3) Normal operation: Moreover, one of the circuit’s promi- Vge
nent features is that the same circuit can be used for 12 Output

Amplitude (V)
normal switching operations without any performance Vce,on
degradation. For normal operation, as illustrated in 8 CS Enable
Figure 9(e), the CS is disabled by keeping S3 at low while
the rest of the control signals are toggled to high with the 4
exception of S1, which now provides the required pulse-
width modulation signal to the IGBT gate. 0
90 110 130 150 170 190
Results from the Proposed Circuit Time (µs)
The P Spice simulation results for the proposed circuit are (a)
shown in Figure 10(a). Vout closely follows the Vge and Vce
waveforms during the Vth and Vce,on measurement modes,
respectively. To verify the simulated results, a prototype is
built. The actual photo of the prototype is shown in Figure 10(b).
Figure 10(c) illustrates the experiment’s waveforms from an
oscilloscope for a new DUT. The experiment’s waveforms
confirm the simulation results and validate the feasibility of
the proposed circuit.
Two aging tests, one above and one below the SOA
limit, have been performed to further corroborate the
simulation results. During the above-SOA test, T j has (b)
been kept variable between T j,max = 120-180 cC, with
T j,min = 30 cC and Ton /Toff = (12 s - 45 s) / (35 s -105 s). Sim- 80 µs
ilarly, for the below-SOA test, T j has been kept vari- 40 µs 40 µs
able between T j,max = 100-140 cC, with T j,min = 30 cC and CS 5 V/V
Enable
Ton /Toff = (12 s-23 s) / (35 s-55 s). The T j has been varied
Vth
to demonstrate the monitoring circuit’s efficacy under 5 V/V Measurement
Vout
variable-loading conditions. After a few hundred cycles, Vce,on
the aged samples are tested using both the proposed cir- Measurement
5 V/V
cuit and the curve tracer. The aged samples are still func- Vce,on
tional and show no sign of loss of gate control. Figure 11(a)
and (b) provides the Vth and Vce,on measurements compari- 10 V/V
Vge
son between the proposed circuit and curve tracer for the
20 µs
above-SOA test. Similarly, Figure 11(c) and (d) provides
the proposed circuit and curve tracer measurements com- (c)
parison for the below-SOA test. During all of these mea-
surements, I ce is maintained at approximately 1 mA.
FIG 10 The results of a prototype circuit: (a) the simulation,
The proposed circuit results therefore have offsets of a (b) the actual prototype snapshot containing both the GD and
few millivolts since the curve tracer and the proposed cir- the aging circuit, and (c) the oscilloscope waveforms for a new
cuit use slightly different current values. Other factors like IGBT sample.
the random thermal noise by the blocking diode (D2) and
trace parasitics or the random variations in the proposed
circuit’s measurement due to variable DUT placement, can to be used for RUL-estimation algorithms based on the Vth
also lead to this offset. In this application, the trend is criti- and Vce,on presented in [4] and [14].
cal for monitoring and it is similar between the proposed Another important aspect of the circuit is that it needs
circuit and curve tracer measurement. Thus, the efficacy of to be used as part of start and/or stop diagnostic test rou-
the circuit has been validated. tines. Since the device’s aging process spans a much longer
With the proposed circuit, a DSP can be used to continu- time, the information lost during normal operation can be
ously monitor the values of the aging precursors. Generally, safely neglected. It is also important to incorporate such
the DSP is capable of computing the relative parametric measurement circuits within the GD instead of the main
changes and the aging trends to estimate its state of health circuit to avoid noisy measurements due to trace para-
and RUL, however, this RUL estimation is outside the scope sitic inductances. In fact, the proposed circuit is ideally
of this article. Nevertheless, the circuit measurements are suited for intelligent power modules that generally house

September 2018 z IEEE PowEr ElEctronIcs MagazInE 53

 6 0.84
Gate Threshold Voltage (Vth) (V)

Tj,min = 30 °C

On-State Collector-Emitter
5.8
0.82

Voltage (Vce,on) (V)

5.6 Tj,max = 120–180 °C
0.8
5.4
0.78
5.2

5 0.76

4.8 0.74
0 2,000 4,000 6,000 8,000 0 2,000 4,000 6,000 8,000
Number of Cycles Number of Cycles
(a) (b)

5.75 0.78
Gate Threshold Voltage (Vth) (V)

Tj,min = 30 °C

On-State Collector-Emitter
5.7 0.77

Voltage (Vce,on) (V)

Tj,max = 100–140 °C 0.76
5.65
0.75
5.6
0.74
5.55
0.73
5.5 0.72

5.45 0.71
0 2,000 4,000 6,000 8,000 10,000 0 2,000 4,000 6,000 8,000 10,000
Number of Cycles Number of Cycles
(c) (d)

Circuit Measurement Curve Tracer Measurement

FIG 11 The comparative results between the proposed circuit and a curve tracer: (a) the Vth comparison for an above-SOA test,
(b) the Vce,on comparison for an above SOA test, (c) the Vth comparison for a below-SOA test, and (d) the Vce,on comparison for a
below-SOA test.

six IGBTs and their respective GDs next to each other in a information can be used to give further information about
single, plastic-encapsulated package [19]. So, the proposed the actual die condition and verify the previously estimated
circuit can be integrated next to respective GD circuits RUL using Vce,on .
within the IPM conveniently. The implementation of the circuit has been validated by
comparing the Vth and Vce,on measurements with the test
Conclusions results from the highly sensitive and accurate curve tracer.
To advance the state-of-the-art converter design, a cost- The results show good agreement between the curve tracer
effective in situ Vth and Vce,on measurement circuit has been and proposed circuit measurements. The measurement
proposed that can easily be incorporated into conventional procedure takes less than 100 ns, which is feasible for most
GD circuits. The proposed circuit can be used as part of a real-world applications.
regular start and/or stop diagnostic routine in the power
converter without any significant RUL estimation error About the Authors
because aging is a much longer process and information lost Syed Huzaif Ali (syedhuzaifali@utdallas.edu) received his
during normal operation may become trivial. B.E. degree in electronics engineering from Nadirshaw
Compared with the state-of-the-art aging detection Eduljee Dinshaw University, Karachi, Pakistan, in 2010. He
methods, the proposed circuit provides a simple, accurate, is currently pursuing his Ph.D. degree with the University of
and easy-to-implement design at the GD side for state-of- Texas at Dallas, Richardson. Since 2015, he has worked at
health and condition monitoring of IGBTs. With the pro- the Power Electronics and Drives Laboratory in the Engi-
posed circuit, no complex compensation and/or constant neering and Computer Science Department at the Universi-
correction is required since the Vce,on can be directly ty of Texas at Dallas. His research interests include real-time
used for estimating the RUL of the IGBT. Additionally, Vth fault diagnosis of power converters and remaining useful

54 IEEE PowEr ElEctronIcs MagazInE z September 2018

lifetime estimation of power devices. He is a Student Mem-
ber of the IEEE.
Xiong Li (xiong.li@ti.com) received his B.E. degree in
electrical engineering from the Central South University,
Changsha, China, in 2011. He is currently working toward
his Ph.D. degree at the University of Texas at Dallas, Rich-
ardson. He worked at the Power Electronics and Drives
Laboratory in the Engineering and Computer Science
Department at the University of Texas at Dallas for four
years. He is currently working as a systems engineer at
Texas Instruments, Dallas. His research interests include
design and control of multilevel converters for renewable
energy systems, and integrated power electronic converters.
He is a Student Member of the IEEE.
Anant S. Kamath (anantkamath@ti.com) received his
B. Tech. degree in electrical engineering from the Indian Insti-
tute of Technology, Madras. Since 2002, he has been a
systems engineer with Texas Instruments, Dallas. He is
responsible for definition and application support for indus-
trial and automotive high-voltage isolation products. He is
also responsible for product compliance to component and
end-equipment standards that deal with isolation, electrical
safety, and electromagnetic compatibility. His was previously a
designer and architect of phase-locked loops and clock sys-
tems, high-speed serializers/deserializers and high-voltage
digital isolation devices. He is a Senior Member of the IEEE.
Bilal Akin (bilal.akin@utdallas.edu) received his Ph.D.
degree in electrical engineering from the Texas A&M Uni-
versity, College Station, in 2007. He was a research and
development (R&D) engineer with Toshiba Industrial Divi-
sion, Houston, Texas, from 2005 to 2008. From 2008 to 2012,
he worked as an R&D engineer at C2000 Embedded Control
Group, Texas Instruments, Dallas. Since 2012, he has been
with the University of Texas at Dallas, Richardson, as an
assistant professor. He is the recipient of the National Sci-
ence Foundation CAREER 2015 Award, the Jonsson School
Faculty Research Award, and the Top Editors Recognition
Award from IEEE Transactions on Vehicular Technology
Society. He is an associate editor of IEEE Transactions on
Industry Applications and IEEE Transactions on Vehicu-
lar Technology. His research interests include the design,
control, and diagnosis of electric motors and drives, digital
power control and management, fault diagnosis, and condi-
tion monitoring of power electronics components and ac
motors. He is a Senior Member of the IEEE.
References
[1] H. Huang and P. A. Mawby, “A lifetime estimation technique for voltage
source inverters,” IEEE Trans. Power Electron., vol. 28, no. 8, pp. 4113–4119,
Aug. 2013.
[2] L. M. Moore and H. N. Post, “Five years of operating experience at a large
utility-scale photovoltaic generating plant,” Prog. Photovolt., vol. 16, no. 3,
pp. 249–259, 2008.
[3] H. Wang, D. Zhou, and F. Blaabjerg, “A reliability-oriented design method
for power electronic converters,” in Proc. IEEE Applications Power Elec-
tronics Conf. Expo., 2013, pp. 2291–2298.
[4] S. Dusmez, S. H. Ali, M. Heydarzadeh, A. S. Kamath, H. Duran, and B.
Akin, “Aging precursor identification and lifetime estimation for thermally
aged discrete package silicon power switches,” IEEE Trans. Ind. Appl., vol.
53, no. 1, pp. 251–260, Jan.-Feb. 2017.
[5] Y. Avenas, L. Dupont, and Z. Khatir, “Temperature measurement of
power semiconductor devices by thermo-sensitive electrical parameters—A
review,” IEEE Trans. Power Electron., vol. 27, no. 6, pp. 3081–3092, June
2012.
[6] S. Dusmez, H. Duran, and B. Akin, “Remaining useful lifetime estimation
for thermally stressed power MOSFETs based on on-state resistance varia-
tion,” IEEE Trans. Ind. Appl., vol. 52, no. 3, pp. 2554–2563, May-June 2016.
[7] S. Be˛czkowski, P. Ghimre, A. R. de Vega, S. Munk-Nielsen, B. Rannestad,
and P. Thøgersen, “Online Vce measurement method for wear-out monitoring
of high power IGBT modules,” in Proc. 15th European Conf. Power Elec-
tronics and Applications (EPE ’13 ECCE-Europe), 2013, pp. 1–7.
[8] Y. Avenas, L. Dupont, N. Baker, H. Zara, and F. Barruel, “Condition moni-
toring: A decade of proposed techniques,” IEEE Ind. Electron. Mag., vol. 9,
no. 4, pp. 22–36, Dec. 2015.
[9] M. A. Eleffendi and C. M. Johnson, “Evaluation of on-state voltage
VCE(ON) and threshold voltage Vth for real-time health monitoring of IGBT
power modules,” in Proc. 17th European Conf. Power Electronics and
Applications (EPE ‘15 ECCE-Europe), 2015, pp. 1–10.
[10] P. O’Connor, R. W. Cox, and J. M. Anderson, “Near real-time incipient
fault detection in IGBT switches,” in Proc. 40th Annu. Conf. IEEE Indus-
trial Electronics Society (IECON), 2014, pp. 4484–4491.
[11] D. Astigarraga, F. M. Ibanez, A. Galarza, J. M. Echeverria, I. Unanue, P.
Baraldi, and E. Zio, “Analysis of the results of accelerated aging tests in insu-
lated gate bipolar transistors,” IEEE Trans. Power Electron., vol. 31, no. 11,
pp. 7953–7962, Nov. 2016.
[12] M. Bouarroudj, Z. Khatir, J. P. Ousten, F. Badel, L. Dupont, and S. Lefe-
bvre, “Degradation behavior of 600V–200A IGBT modules under power
cycling and high temperature environment conditions,” Microelectron.
Reliab., vol. 47, no. 9–11, pp. 1719–1724, Sept. 2007.
[13] S. H. Ali, S. Dusmez, and B. Akin, “A comprehensive study on variations
of discrete IGBT characteristics due to package degradation triggered by
thermal stress,” in Proc. IEEE Energy Conversion Congr. Expo. (ECCE),
2016, pp. 1–6.
[14] S. H. Ali, M. Heydarzadeh, S. Dusmez, X. Li, A. Kamath, and B. Akin,
“Lifetime estimation of discrete IGBT devices based on Gaussian process,”
IEEE Trans. Ind. Appl., vol. 54, no. 1, pp. 395–403, Jan.-Feb. 2018.
[15] W. Lai, M. Chen, L. Ran, O. Alatise, S. Xu, and P. Mawby, “Low ΔTj stress
cycle effect in IGBT power module die-attach lifetime modeling,” IEEE
Trans. Power Electron., vol. 31, no. 9, pp. 6575–6585, Sept. 2016.
[16] U. M. Choi, F. Blaabjerg, S. Jørgensen, F. Iannuzzo, H. Wang, C. Uhren-
feldt, and S. Munk-Nielsen, “Power cycling test and failure analysis of
molded intelligent power IGBT module under different temperature swing
durations,” Microelectron. Reliab., vol. 64, pp. 403–408, Sept. 2016.
[17] A. Ghetti, Gate Oxide Reliability: Physical and Computational Models,
New York: Springer-Verlag, 2004.
[18] Vishay Siliconix, “Measuring power MOSFET characteristics,” Shelton,
Connecticut, Tech. Rep. Appl. Note AN-957, 2010.
[19] M. Otsuki, M. Watanabe and A. Nishiura, “Trends and opportunities in
intelligent power modules (IPM),” in Proc. EEE 27th Int. Symp. Power
Semiconductor Devices and IC’s (ISPSD), 2015, pp. 317–320.
September 2018 z IEEE PowEr ElEctronIcs MagazInE 55
 by Jie Geng, HongWen Zhang,
Francis Mutuku, and Ning-Cheng Lee

novel solder alloy

Wide service temperature capability
for automotive applications

W
ith automotive electronics booming, more sensors and power
moderators are increasingly required for electrical vehicles and
self-driving cars. Lead-free tin-silver-copper (SnAgCu), also known
as SAC, has been a popular choice for surface-mount technology
(SMT) assembly solder alloy in the electronics industry. Whereas
SAC has served the electronics industry adequately well, its adoption for automo-
tive applications has proved to be challenging for several reasons. Key among them
is uncertainty in service temperature range capability [1]–[11]. There is no question
that automotive applications demand high reliability. However, that high reliability
is required not only under moderate temperature but also under high service tem-
perature conditions. In the last several years, a number of new solder alloys have
been tried by the industry with major emphasis on improving the high-temperature
capability, but the success has been limited up until now. Researchers at Indium
Corporation have addressed that problem with the development of a novel solder
alloy, with high reliability demonstrated on both moderate and high service temper-
ature conditions. In this article, this new solder alloy is presented and its physical
and mechanical properties characterized and soldering performance discussed,
including processing and voiding. Additionally, the reliability performance in ther-
mal cycling tests (TCTs), thermal shock tests (TSTs), and thermal aging tests are
discussed and rationalized with the microstructural observation.

The Novel Solder Alloy

For high reliability with a wide service temperature capability, a new solder alloy
90.6Sn/3.2Ag/0.7Cu/5.5 antimony (Sb), designated as Indalloy 276, was developed
(Table 1). In addition to Indalloy 276, Table 1 also includes compositions for alloys
96.5Sn/3Ag/0.5Cu (SAC305) and 90.9Sn/3.8Ag/0.7Cu/3 bismuth (Bi)/1.45Sb/0.15 nickel
(Ni) (SACBSbN). Table 1 shows that the melting temperature of Indalloy 276 is about
11 °C higher than SACBSbN.
Likewise, the mechanical properties of the evaluated alloys at ambient tempera-
ture are listed in Table 2. This table shows that both SACBSbN and Indalloy 276 are
higher in yield stress and ultimate tensile stress (UTS) than SAC305. Meanwhile,
SAC305 is higher in ductility than Indalloy 276 at ambient temperature, whereas
SACBSbN has the lowest ductility.
In this development work, the primary interest of the researchers was the
reliability of solder joints for silicon die (0.72 mm thick with a TiNiAu surface

Digital Object Identifier 10.1109/MPEL.2018.2850739

Date of publication: 10 September 2018

56 IEEE PowEr ElEctronIcs MagazInE z September 2018 2329-9207/18©2018IEEE

finish) attached to an Alloy 42 leadframe. To display the
Table 1. The composition of solder alloys
alloy reliability, the solder joint shear strength, with an
evaluated for high-reliability applications.
increasing number of temperature cycling treatments,
was used. Here, the coefficient of thermal expansion solidus liquidus
alloy sn ag cu Bi sb ni (°c) (°c)
(CTE) mismatch is 13.7 parts per million per Kelvin
(ppm/K). However, during the trial test, the silicon die SAC305 96.5 3 0.5 — — — 217 218
often cracked before the solder joints failed, irrespective SACBSbN 90.9 3.8 0.7 3 1.45 0.15 212.6 221.7
of the solder alloys in Table 2, thus not reflecting joint Indalloy 90.6 3.2 0.7 — 5.5 — 222.9 231.9
strength degradation. To be able to monitor the solder 276
joint strength degradation, copper die on Alloy 42 was
used, with a CTE mismatch of 12.2 ppm/K. The CTE mis-
match is comparable with that of silicon on Cu combina- Table 2. The ambient temperature mechanical
tion, and the copper die did not crack during shear test. properties of several solder alloys.
Yield stress
Reflow and Voiding alloy (MPa) Uts (MPa) Ductility (%)
Two reflow profiles under air atmosphere were used in this
SAC305 39.0 ± 3.1 50.8 ± 4.8 37.1 ± 2.4
study, with peak temperatures of 245 and 255 °C. Unless
otherwise specified, the 255 °C peak temperature profile SACBSbN 44.0 ± 4.0 81.2 ± 10.1 16.6 ± 1.3
was used.
Indalloy 276 59.5 ± 2.9 77.3 ± 1.7 27.6 ± 3.2
Voiding levels were monitored by X-ray imaging on three
testing vehicles, including silicon (Si) on Cu, Si on Alloy
42, and Cu die on Cu substrate with organic solderability
preservative (OSP) surface finish. For samples processed Table 3. The CTE of several materials.
with 255 °C peak temperature profile, the voiding results
Material ctE 10–6 m/(mK) ∆ctE 10–6 m/(mK)
are provided in Figure 1. Flux B (FB) showed less void-
Si 3 13.7 (Si on Cu)
ing than flux A (FA). SAC305 indicated the lowest voiding,
with Indalloy 276 and SACBSbN being comparable in void- Cu 16.7
ing amount. Copper die on OSP provided lower voiding than Alloy 42 4.5 12.2 (Cu on Alloy 42)
copper die on Alloy 42. (58Fe/41Ni/0.8Mn)

Si Die on Bare Cu Cu Die on Alloy 42 Cu Die on OSP

FA FB FA FB FA FB
SAC305
SACBSbN
276

FIG 1 An X-ray showing voids in as-reflowed assembly, reflowed with peak 255 °C, die size 3 × 3 mm.

September 2018 z IEEE PowEr ElEctronIcs MagazInE 57

 Aging at 175 °C
80
70
70
Cu-Alloy 42

Shear Stress (MPa)

Cu-OSP 60
65
Shear Stress (MPa)

50
40
60
30
20
55 10
0 500 1,000 1,500 2,000
Aging Time (h)
50
SAC305 + FB SAC305 + FA
FA

FA

FA

FB

FB

FB
SACBSbN + FB SACBSbN + FA
+

+ 276 + FB 276 + FA
5

bN

bN

6
30

27

30

27
BS

BS
C

C
SA

SA
C

Harsh Condition but Less Stressed:

SA

SA

276 > SACBSbN and 305

FA > FB
FIG 2 The shear strength of as-reflowed solder joints mea-
sured at room temperature for various combinations of mate- FIG 4 The solder joint shear strength measured at room tem-
rials and solder alloys. perature after 175 °C thermally aged up to 2,088 h.

shear strength than both SAC305 and SACBSbN. Third, FA

Aging at 125 °C showed a higher strength than FB.
110
100 Reliability of Solder Joints
Shear Stress (MPa)

90
The reliability of solder joints was assessed by precondition-
ing the solder joints with various thermal aging or TCT or
80 TST treatments, followed by measuring the shear strength.
70 Figure 3 shows solder joint shear strength measured at room
60 temperature after thermal aging at 125 °C up to 2,016 h. For
automotive applications, a 125 °C aging condition is consid-
50
ered a mild condition. Under this condition, Indalloy 276 is
40 comparable with SACBSbN, and both alloys are equal or
0 500 1,000 1,500 2,000
Aging Time (h) higher than SAC305. Here the flux factor is also insignificant.
After the thermal aging treatment at 175 °C (Figure 4)
SAC305 + FB SAC305 + FA for 2,088 h, SACBSbN showed a shear strength about 40%
SACBSbN + FB SACBSbN + FA
276 + FB 276 + FA
of Indalloy 276 with FA but was comparable to Indalloy
276 with FB. For medium-harsh thermal shock cycling
Mild Condition: conducted at –55/155 °C, the results are shown in Figure 5.
276 ~ SACBSbN > 305 Each cycle included 10 min of dwelling time at either
FA ~ FB peak or valley temperature and a total of ~28 min/cycle.
Indalloy 276 retained its strength after 850 thermal shock
FIG 3 The solder joint shear strength measured at room tem- cycles, whereas SAC305 lost 64% of its original strength.
perature after thermal aging at 125 °C up to 2,016 h. SACBSbN degraded rapidly after 1,000 cycles and vir-
tually failed after 1,850 cycles. After 3,000 cycles, FA
showed higher shear strength than FB, and the shear
As-Reflowed Shear Strength strength of SAC305 and SACBSbN became one-eighth of
The shear strength of as-reflowed solder joints measured at Indalloy 276.
room temperature for various combinations of materials Under a harsh TCT (–40/175 °C) condition (Figure 6),
and solder alloys is shown in Figure 2. All solder pastes SAC305 dropped to less than 50% of initial strength after
were reflowed with peak 255 profile. Several trends were 1,000 cycles. SACBSbN and SAC305 exhibited a shear
observed. First, Cu-OSP resulted in higher shear strength strength about 1/20th to 1/11th of Indalloy 276 after 3,000
than Cu-Alloy 42, presumably due to better wetting on Cu cycles. Regarding the flux, FA performance was compa-
than on Alloy 42. Second, Indalloy 276 showed a higher rable with FB.

58 IEEE PowEr ElEctronIcs MagazInE z September 2018

 ATC –40/175 °C
Thermal Shock –55/155 C 70
70 60

Shear Stress (MPa)

60
50
Shear Stress (MPa)

50
40
40
30
30
20
20
10
10 5 MPa
0
0 0 500 1,000 1,500 2,000 2,500 3,000
0 500 1,000 1,500 2,000 2,500 3,000 Cycles
Cycles
SAC305 + FB SAC305 + FA
SAC305 + FB SAC305 + FA SACBSbN + FB SACBSbN + FA
SACBSbN + FB SACBSbN + FA 276 + FB 276 + FA
276 + FB 276 + FA
SACBSbN performed similarly to Indalloy 276 up to
Medium Harsh Condition: 1,000 cycles, then rapidly degraded afterward.
276 >> SACBSbN > 305 Harsh Condition:
276 >> SACBSbN > 305
FA ≥ FB
FA ~ FB

FIG 5 The solder joint shear strength measured at room FIG 6 The solder joint shear strength measured at room tem-
temperature after thermal shock cycling (–55/155 °C) up to perature after thermal cycling (−40/175 °C) up to 3,000 cycles.
3,000 cycles. ATC: accelerated thermal cycling.

SMT Assembly TCT Reliability

The alloys were also evaluated for SMT assembly reliability.
Ball grid array (BGA)192 components were assembled onto
an OSP pad on a printed circuit board, with both solder ball
and solder paste using the same solder alloy. Figure 7 shows
an example of part of the assembled package. Chip array
BGA (CABGA)192 has a size of 14 × 14 mm and pitch size of
0.8 mm. One assembly set was tested with TCT –55/125 °C,
another set tested with –40/150 °C. The test results are
shown in Table 4.
For both –40/150 and –55/125 °C TCTs, the eta value of
Indalloy 276 was slightly higher than SACBSbN and quite
a bit higher than SAC305. However, in a comparison of the
1% failure data, Indalloy 276 was much better than both
SACBSbN and SAC305. This phenomenon, together with FIG 7 An example of part of the test board with CABGA192 com-
the considerably smaller beta value of SACBSbN than Indal- ponents.
loy 276, presumably could be attributed to the nonhomoge-
neous microstructure of SACBSbN. The high beta value of
Indalloy 276 strongly suggests that the microstructure is
fairly homogeneous. The characteristic lifetime of Indalloy Table 4. The TCT reliability of BGA192 joints
with both solder ball and solder paste
276 in the thermal cycling –40/150 °C shall meet the require- using the same alloy.
ments of the Automotive Electronics Council’s AEC-Q102
specification for discrete devices under –55/155 °C temper- –40/150 °c –55/125 °c
ature cycling (1,000 cycles) [12]. alloy 1% Failure Eta Beta 1% Failure Eta Beta
The speculated nonhomogeneity of SACBSbN ver-
SAC305 279 583 6.3 527 1,123 6.1
sus Indalloy 276 based on Table 4 data was supported by
the microstructure of as-reflowed solder joints shown in SACBSbN 658 1,594 5.3 285 1,690 2.6
Figure 8. In SACBSbN, presence of blocky Ag 3 Sn plates
Indalloy 276 1,172 1,665 13.3 929 1,764 7.2
or rods (noted by the arrows) can be easily observed. In

September 2018 z IEEE PowEr ElEctronIcs MagazInE 59

contrast, Indalloy 276 showed a much finer and homoge-
neous microstructure. This nonhomogeneity microstruc-
ture of SACBSbN strongly suggested that some solder joints
may have a lower reliability than other joints, thus resulting
in low beta values of 2.6 and 5.3 (Table 4) when compared
with that of Indalloy 276 alloy (7.2 and 13.3).
Failure Mechanism
At a relatively low stress condition, such as aging at 125 or
175 °C, the difference in shear strength between Indalloy
276 and SACBSbN or SAC305 was minute, as shown in Fig-
ures 3 and 4. However, at a highly stressed condition, such
as TST (–55/155 °C) and TCT (–40/175 °C), Indalloy 276
showed much better reliability than SACBSbN, which, in
turn, was better than SAC305 (Figures 5 and 6) for die-
attach applications. For SMT assembly applications, Table 4
also shows that at a harsh test condition, –55/125 °C (∆T
equals 180 °C) and –40/150 °C (∆T equals 190 °C), Indalloy
276 performed considerably better than SACBSbN, which,
in turn, was better than SAC305.
This difference in behavior under mild and harsh condi-
tions can be attributed to the microstructure and associ-
ated mechanical properties. The detailed microstructural
evolution of the samples under different thermal cycling
conditions has been performed and reported in [1]. Both
Indalloy 276 and SACBSbN are alloys based on SnAgCu
but reinforced with precipitate and solution hardening,
with the use of additives including Sb, Ni, and Bi. The
high strength that resulted from reinforcement resulted
As-Reflowed 175 °C/552 h
SACBSbN + FA
(a)
276 + FA
(d)
FIG 8 The scanning electron microscope microstructures of cross-sectioned solder joints with (a)–(c) a peak 255 profile for
SACBSbN+FA and (d)–(f) Indalloy 276+FA under as-reflowed and aged conditions. In (a), the blocky Ag3Sn plates or rods are
indicated by the arrows.
60 IEEE PowEr ElEctronIcs MagazInE z September 2018
in higher mechanical strength (Table 2), which promised
a better thermal fatigue life than SAC305 under stressed
conditions [13], [14], as reflected in Figures 3–6 and Table 4.
However, there is a significant difference between Indal-
loy 276 and SACBSbN. Though both alloys are stronger
than SAC305, Indalloy 276 is more ductile than SACBSbN
(Table 2). Under harsh test conditions where ∆T was high,
the dimension mismatch between parts and substrate
became very significant due to the CTE mismatch. This
significant dimension mismatch would cause a brittle joint
to crack quickly, as seen on SACBSbN. The challenge was
more tolerable for a ductile joint, as shown by Indalloy 276.
Accordingly, Indalloy 276 showed much better reliability
than SACBSbN under harsh conditions, including high test-
ing temperature and large ∆T.
The effect of solder brittleness and ductility on joint frac-
ture pattern is shown in Figures 9(a) and (b) and 10 for
as-reflowed SAC305, SACBSbN, and Indalloy 276, respec-
tively. As is obvious from Figure 9(a), there is no evidence
of the cleavage or intergranular fracture that characterizes
brittle fracture. Apparently, to achieve high reliability under
a wide service temperature environment, a balanced ductil-
ity and rigidity for the solder alloy is critical for success.
Conclusions
Eyeing high-reliability automotive applications, re -
searchers have developed a novel lead-free solder alloy
90.6Sn/3.2Ag/0.7Cu/5.5Sb (Indalloy 276) with wide ser-
vice temperature capability. The new solder alloy has a
175 °C/1,000 h
(b) (c)
(e) (f)
 Cu6Sn5

Ag3Sn
Sn matrix 100 µm
100 µm

(a) (b)

FIG 9 The fractured die back surface of as-reflowed solder joints: (a) SAC305 showing ductile texture and (b) SACBSbN showing no
sign of ductile texture.

6K Sn Matrix
Sn
4K
2 K Ag
Sn Cu Sn Ag Cu
0
0 2 4 6 8 10
Cu6Sn5 keV
Sn Cu6Sn5
4K
Cu
2K Cu
Sn Matrix
C Sn Sn Fe Cu
0
0 2 4 6 8 10
keV

FIG 10 The fractured die back surface of as-reflowed Indalloy 276 joints (1,000×), with ductile texture shown clearly.

melting temperature range of 223–232 °C, allowing the
reflow to be done with peak temperatures of 245–255 °C.
The new alloy has better mechanical performance than
the control alloys (SAC305 and SACBSbN). At ambient
temperature, it has higher yield strength (60 MPa), UTS
(77 MPa), and ductility (28%). When aged at 125 and
175 °C, the die shear strength was comparable or higher
than both the controls. After 3,000 cycles of thermal
shock under –55/155 °C, the die shear strength of Indal-
loy 276 was about eight times that of both SACBSbN and
SAC305. When preconditioned at TCT (–40/175 °C) for
3,000 cycles, the die shear strength of Indalloy 276 was
11–20 times that of SACBSbN and SAC305, depending on
the flux type used.
For SMT-assembled BGA solder joints with both ball
and paste using the same alloy, Indalloy 276 showed lon-
ger characteristic life (i.e., higher eta value) than SACBSbN
and SAC305 under temperature cycling with –55/125 °C and
–40/150 °C. For 1% failure, Indalloy 276 was two to three
times higher in cycling life than SACBSbN, mainly due to
the higher beta value of Indalloy 276. In reality, SAC305
performed the poorest in these two tests.
Both Indalloy 276 and SACBSbN are Sn-Ag-Cu-based
alloys reinforced by precipitate and solution hardening
through alloying with elements of Sb, Ni, and Bi. The inter-
metallic particles in Indalloy 276 are finer and more uni-
formly distributed than those in SACBSbN, which exhibited
some blocky Ag 3 Sn plates or rods. In addition, the coarsen-
ing rate of Cu 6 Sn 5 at 175 °C was much lower in Indalloy 276
than SACBSbN.
Furthermore, Indalloy 276 is strong and ductile, whereas
SACBSbN is strong but brittle. Under the harsh test condi-
tion where ∆T was high, the geometrical displacement/strain
between parts and substrate became very significant due to
CTE mismatch. This significant strain would cause a brittle
joint to rupture quickly when the solder joint cannot accom-
modate the strain, as seen on SACBSbN. The challenge was
more tolerable for a ductile joint, as shown by Indalloy 276.
Accordingly, Indalloy 276 demonstrated a much better reli-
ability than SACBSbN under harsh condition, including

September 2018 z IEEE PowEr ElEctronIcs MagazInE 61

high testing temperature and large ∆T. Overall, to achieve
high reliability under a wide service temperature environ-
ment, a solder alloy with balanced ductility and strength is
critical for success.
Acknowledgment
We would like to acknowledge the significant contribu-
tions of Christine LaBarbera, scanning electron micro-
scope specialist, on the microstructure characterization of
solder joints.
About the Authors
Jie Geng (jgeng@indium.com) received his Ph.D. degree in
metallurgy from the University of Surrey, United Kingdom.
He is a research metallurgist in Indium Corporation’s
research and development department, where he focuses
on the development of novel lead-free, high-reliability solder
alloys for automotive applications. He also investigates
assembly process technologies in electronic packaging and
interconnections. He continued as a materials scientist after
graduation and has extensive experience on materials selec-
tion, design, processing, and characterization, especially on
processing-structure-property relationships in various mate-
rials including ultrahigh-temperature alloys, lightweight
alloys (aluminum and magnesium), magnetic materials, and
ceramics. He is skilled in combinatorial and high-through-
put material design using three-dimensional printing and
computer programming with Python.
HongWen Zhang (hzhang@indium.com) is a research
metallurgist in Indium Corporation’s research and develop-
ment department. His focus is on the development of lead-
free solder materials for high-temperature and/or high-
fatigue-resistance applications and investigating the asso-
ciated technologies. He co-invented the mixed powder
solder technique in which minor additives are used to
improve the wetting and modify the bonding interface,
thus increasing the bonding strength. On the basis of this
technique, the BiAgX solder system was invented as an
alternative high-temperature lead-free solder. He is also a
certified Institute for Printed Circuits (IPC) specialist for
IPC-A-600 and IPC-A-610D.
Francis Mutuku (fmutuku@indium.com) received his
Ph.D. degree in materials physics from the State University
of New York (SUNY) at Binghamton. He is currently work-
ing with the SUNY Research Foundation at Binghamton as
a postdoctoral associate based at Indium Corporation on
design and development of low-temperature alloys. Prior to
this appointment, he worked with Universal Instruments as
a process research engineer and with Indium Corporation
as research metallurgist. His research interests include
optimization of the reflow process, nucleation and growth,
enhancement of microstructure and mechanical properties,
reliability of electronic packages, and solidification behav-
ior of metallic systems and lead-free solder alloys. He is a
member of the Surface Mount Technology Association and
the Minerals, Metals, and Materials Society.
62 IEEE PowEr ElEctronIcs MagazInE z September 2018
Ning-Cheng Lee (nclee@indium.com) is Indium Corpora-
tion’s vice president of technology, a world-renowned soldering
expert, and a Surface Mount Technology Association member
of distinction. He has extensive experience in the development
of fluxes, alloys, and solder pastes for surface-mount technolo-
gy industries and extensive experience in the development of
high-temperature polymers, encapsulants for microelectron-
ics, underfills, and adhesives. He is an IEEE Fellow.
References
[1] J. Geng, H. Zhang, F. Mutuku, and N.-C. Lee, “Sn3.2Ag0.7Cu5.5Sb solder
alloy with high reliability performance up to 175 °C,” in Proc. IPC APEX
Expo 2018, San Diego, CA.
[2] P. Choudhury, M. Ribas, A. Kumar, S. Mukherjee, S. Sarkar, R. Pandher,
R. Raut, B. Singh, and R. Bhatkal, “New developments in high reliability
high temperature Pb free alloys,” in Proc. Int. Conf. Soldering & Reliability
(ICSR), Toronto, Canada, 2014.
[3] R. Raut, R. Bhatkal, W. Bent, B. Singh, S. Chegudi, R. Pandher, J. Kolbe,
and S. Misra, “Assembly interconnect reliability in solid state lighting applica-
tions—Part 1,” in Proc. Surface Mount Technology Pan Pacific Conf., 2011.
[4] Y. H. Ko, S.-H. Yoo, and C.-W. Lee, “Evaluation on reliability of high
temperature lead-free solder for automotive electronics,” J. Microelectron.
Packaging Soc., vol. 17, no. 4, pp. 35–40, 2010.
[5] B. Arfaei, F. M. Mutuku, R. Coyle, and E. Cotts, “Influence of micro-alloy-
ing elements on reliability of SnAgCu solder joints,” Surface Mount Technol.
J., vol. 29, no. 2, pp. 13–20, 2016.
[6] S. K. Kang, P. Lauro, D. Y. Shih, D. W. Henderson, J. Bartelo, T. Gosselin,
and W. K. Choi, “The microstructure, thermal fatigue, and failure analysis of
near-ternary eutectic Sn-Ag-Cu solder joints,” Mater. Trans., vol. 45, no. 3,
pp. 695–702, 2004.
[7] J. Zhao, L. Qi, X. M. Wang, and L. Wang, “Influence of Bi on microstruc-
tures evolution and mechanical properties in Sn-Ag-Cu lead-free solder,” J.
Alloys Compounds, vol. 375, no. 1, pp. 196–201, 2004.
[8] K. N. Reeve, J. R. Holaday, S. M. Choquette, I. E. Anderson, and C. A. Hand-
werker, “Advances in Pb-free solder microstructure control and interconnect
design,” J. Phase Equilibria Diffusion, vol. 37, no. 4, pp. 369–386, 2016.
[9] A. Z. Miric, “New developments in high-temperature, high-performance
lead-free solder alloys,” Surface Mount Technol. J., vol. 23, no. 4, pp. 24–29,
2010.
[10] C. Handwerker, U. Kattner, and K. W. Moon, “Fundamental properties
of Pb-free solder alloys,” in Lead-Free Soldering. New York: Springer-Verlag,
2007, pp. 21–74.
[11] S. K. Kang, “Effects of minor alloying additions on the properties and
reliability of Pb-free solders and joints,” in Lead-Free Solders: Materials
Reliability for Electronics. Hoboken, NJ: Wiley, 2012, pp. 119–159.
[12] Failure Mechanism Based Stress Test Qualification for Discrete
Optoelectronic Semiconductors in Automotive Applications, AEC Standard
AEC-Q102, 2017.
[13] F. Mutuku, B. Arfaei, and E. Cotts, “The influence of processing on
strengthening mechanisms in Pb-free solder joints,” J. Electronic Materials,
vol. 46, no. 4, pp. 2067–2079, 2017.
[14] R. Parker, R. Coyle, G. Henshall, J. Smetana, and E. Benedetto, “iNEMI
Pb-free alloy characterization project report: Part II—Thermal fatigue
results for two common temperature cycles,” in Proc. Surface Mount Tech-
nology Association Int. (SMTAI), Orlando, FL, 2012, pp. 348–358.
 IEEE DECENTRALIZED ENERGY ACCESS SOLUTIONS (DEAS) WORKSHOP 
New biennial workshop focused on emerging energy access technologies 

Call for Presentations/Papers 
Over 1.1 Billion people live with absolutely no access to electricity. At the 
same time, millions of people who normally enjoy better life and energy access, find 
themselves, through war, climate change or increasingly frequent catastrophic HILF 
(High Impact Low Frequency) events, in a situation where the existing energy 
infrastructure is essentially destroyed. In both cases the quality of life of more than a 
billion people is affected and it is clear that to build a new energy infrastructure for 
these deprived people and communities is a critical priority. A fundamental question 
facing us today is – ‘what should this new energy infrastructure look like?’. 
Should we continue with a 20th century centralized paradigm that was  PRELIMINARY VENUE 
designed in a time when only mechanical solutions were available, or should it be  Mayagüez, Puerto Rico 
reimagined with fast moving 21st century technology with exponentially‐declining  PRELIMINARY DATES: 
prices, such as distributed generation, prosumers, dynamic pricing, microgrids, 
Jan 30‐Feb 1, 2019 
energy storage, internet of things, communications, cloud computing, and others? 
The two seemingly disparate problems in energy access provide a unique  www.ieee‐deas2019.org 
opportunity to define what such a new electricity infrastructure could look like, to 
Important Dates: 
develop components needed to realize such a dynamically reconfigurable system, 
and to demonstrate using test beds and real deployments, the ability for a  Extended digest submission 
decentralized energy infrastructure to be viable. Energy access provides perhaps the  deadline: 
best path to fulfill the IEEE mission statement: Advancing Technology for Humanity.  Aug 1, 2018 
Join us for the first IEEE DEAS workshop that will include invited papers,  Notification of acceptance: 
tutorials, and technical papers for presentation in regular and poster sessions, an  Sept 30, 2018 
exposition, where companies and organizations involved in energy access will be 
Final papers submission 
participating. The digests will undergo a standard IEEE PELS peer review process. 
deadline: 
Accepted papers that are presented at a regular or poster sessions will also be 
Dec 1, 2018 
uploaded to IEEE Explore and will be eligible for submission to all IEEE PELS and IEEE 
PES journals and transactions. The workshop will have two separate tracks; Energy  General Chair: 
Access Solutions and Resilient Energy Infrastructure.  Marcel J. Castro Sitiriche 
This call for papers also serves as an invitation for proposals to present  Technical Program Chair: 
tutorials on related topics. Tutorial presenters will get one free registration for the  Sudip Mazumder 
workshop and will receive a small honorarium. 
Steering Committee 
The IEEE DEAS workshop will be closely linked to the IEEE Empower a Billion 
Lives global competition being organized by the IEEE Power Electronics Society and  Deepak Divan 
will serve as the location for the regional round competition for the Americas.   Phil Krein 
Topics of Interest:  Braham Ferreira 
Track I.: Energy Access Solutions  Track II.: Resilient Energy Infrastructure Liuchen Chang 
 AC & DC Nano, Micro and Mini Grids   Defining & Measuring Grid Resiliency  Stan Attcity 
 Flexible and Expandable Systems   Rapid Build of Electricity Infrastructure 
 Dynamic Source and Load Balancing   Operating Decentralized Systems  Prasad Enjeti 
 PV/Storage/Grid Power Converters   Autonomous Islanding & Reconnection  Henry Louie 
 Decentralized Architecture   Emergency & Normal Mode Operation 
 Power/Energy Constrained Systems   Emergency Mode Services  EBL Coordination Chair: 
 Dynamic Pricing in Distributed Grids   Rapid Restoration of Emergency Services  Szilard Liptak
 Modular Stackable Converters   Role of DER and Nano/Micro‐Grids in 
 Communications in Energy Access  Resilient Systems   
 Pay/Go and Mobile Payments   Distributed Devices for Emergency Services 

Digital Object Identifier 10.1109/MPEL.2018.2852098

Women in Engineering
by Katherine A. Kim

career advice from

Inspiring IEEE Members at the
women in Engineering Breakfast

O
n Tuesday, 22 May 2018, traveling around the world, and re­ After the talk, the floor was open
Prof. Marta Molinas from searching electric power systems. for questions and discussion. Some
the Norwegian University Her talk drew in more than 40 attend­ younger attendees asked for career
of Science and Technology, Trond­ ees, both women and men, who rep­ advice while others shared their own
heim, gave a talk about her career resented countries from all around career experiences, and the group
as part of the Women in Engineering the world (Figure 2). had a fr u itfu l d iscussion about
(WIE) breakfast held during the
2018 IEEE International Power
Engineering Conference and Energy
Conversion Congress and Exposi­
tion Asia at the Toki Messe Niigata
Convention Center in Japan (Fig­
ure 1). In her talk, “The Journey to
My Dream: From Astronomy to Elec­
trical Engineering and More,” Prof.
Molinas shared the inspiring story
of her childhood dream and how it
led her to electrical engineering,
FIG 1 Attendees listening to Prof. Marta Molinas’ talk on her career, “The Journey to
Digital Object Identifier 10.1109/MPEL.2018.2851122 My Dream: From Astronomy to Electrical Engineering and More.” (Photo courtesy of
Date of publication: 10 September 2018 Katherine A. Kim.)

FIG 2 The attendees of the WIE breakfast at the 2018 IEEE International Power Engineering Conference and Energy Conversion
Congress and Exposition Asia. (Photo courtesy of Dr. Noriko Kawakami.)

64 IEEE PowEr ElEctronIcs MagazInE z September 2018

improv ing gender directly from ac ­ fasts are open to all who support
balance in engineer­ Prof. Molinas’ talk complished IEEE ef for ts to prov ide mentorship to
ing and power elec­ drew in more than Members such as women and underrepresented groups
tronics. The event Prof. Molinas and in power electronics.
40 attendees, both
was organized by Dr. Kawakami.
IEEE Fellow Dr. Nor­
women and men, who WIE breakfasts are About the Author
iko Kawakami from represented countries held at most major Katherine A. Kim (katherine.kim@
Toshiba Mitsubishi­ from all around IEEE Power Electron­ ieee.org) is an assistant professor of
Electric Industrial the world. ics Society conferenc­ electrical and computer engineering at
Systems Corpora­ es. During a breakfast, the Ulsan National Institute of Science
tion, Tokyo, who not a prominent woman in and Technology in Ulsan, South Korea,
only facilitated the event but also power electronics or engineering shares focusing on power electronics and
shared some of her own career expe­ her career challenges and triumphs control for photovoltaic applications.
riences as a prominent leader in the through a talk. Afterwards, attendees She serves as a Women in Engineering
power electronics field. The WIE are invited to discuss relevant topics cochair and member at large for the
breakfast was a unique opportunity and establish important connections IEEE Power Electronics Society.
for attendees to receive career advice through networking. The WIE break­

We engineer optimally designed

custom magnetics, while offering thousands
of part numbers standard, off the shelf.
We can help you find one that meets your needs today.
and it can be on your desk, tomorrow.

Standard Products Custom Products

Power Current Sense Wall Plug In Power Supplies Switching Power Alternative Energy
Transformers Transformers Transformers & LED Drivers Supply Inductor

Audio Inductors Medical-Grade Medical-Grade Low- Power Supply Professional Audio

Transformers and Chokes Isolated Sources LeakageTransformers Precision Toroidal Impedance Matching
Transformer Transformer

Triad Magnetics
460 Harley Knox Blvd, Perris, CA 92571
Tel: 951.277.0757 Fax: 951.277.2757
Email: info@triadmagnetics.com www.triadmagnetics.com

September 2018 z IEEE PowEr ElEctronIcs MagazInE 65

 Patent Reviews
Y
ou will recall that in the
December 2017 issue of
IEEE Power Electronics Mag-
azine, we commented on a brief filed
by the IEEE in a case pending before
the U.S. Supreme Court (Oil States v.
Greene’s Energy). The Supreme Court
was reviewing the constitutionality
of inter partes review (IPR) that
allows the U.S. Patent and Trade­
mark Office (USPTO) to invalidate
patents. The Supreme Court has now
decided the case, saying that allow­
ing the USPTO instead of a court to
make the invalidation decision does
not violate the Constitution.
The Supreme Court distinguished
between public rights and private
rights and said that patents are public
rights, i.e., matters between the gov­
ernment and the people subject to its
executive and legislative depart­
ments. Since the Constitution allows
Congress to provide for patents, and
Congress has done so by establishing
the USPTO to issue the patents in the
first place, that makes patents a pub­
lic right, even though it is a form of
property. The USPTO is part of the
executive branch and issues patents
to persons and companies when their
applications comply with the statutes
that Congress has passed.
Then, the Supreme Court stated
that since it previously ruled that
public rights (not necessarily involv­
Digital Object Identifier 10.1109/MPEL.2018.2849651
Date of publication: 10 September 2018
66 IEEE PowEr ElEctronIcs MagazInE
by Art MacCord
supreme court Upholds Inter
Partes Patent review
ing patents) need not be decided in On the same day as the Oil States
courts, it was acceptable for Con­ decision, the Supreme Court decided
gress to treat patents as public rights another case involving IPR of patents,
by allowing the USPTO to review pre­ i.e., SAS Institute v. Iancu. SAS had
viously issued patents and make petitioned for an IPR of a patent, alleg­
them invalid if they do not comply ing that all 16 claims of the patent
with the legal requirements. should be invalidated. The USPTO
The IEEE brief gave two reasons reviewed the petition and decided there
for its unconstitutionality argument, was a reasonable likelihood that SAS’s
the first being that letting the USPTO argument was correct but only as to
decide validity deprives the patent nine claims; so the IPR took place, but
owner of a jury trial. only on those nine
The Supreme Court claims. At the end of
dispensed with that The USPTO is part of the proceeding, eight
a rg u ment , s ay i n g the executive branch claims were invalidat­
that because it ruled and issues patents ed, one was upheld,
that a patent is a pub­ and the seven claims
to persons and
lic right that could be not addressed were
companies when
decided by an ad ­ left as “not addressed.”
ministrative agency, their applications SAS argued that it was
there was no right to comply with the entitled to a ruling on
a jury trial since ju­ statutes that Congress all 16 of the claims it
ries are only present has passed. challenged, and the
in courts. Supreme Court agreed
The IEEE brief with SAS, saying that
also said that the procedure used by the plain wording of the statute that
the USPTO (i.e., applying a preponder­ created IPRs requires an evaluation of
ance of the evidence standard) deprived all of the claims that the petitioner
the patent owner of constitutionally (SAS) seeks to have reviewed.
required due process of law by tak­ The upshot is that IPRs may be­
ing the patent property. The Supreme come even more significant than they
Court said that since the question pre­ have been in determining the rights
sented to it by the parties (recall that between a patentee and an accused
the IEEE is not a party but an amicus infringer. When an accused (or poten­
curiae) did not address due process, it tially accused) infringer petitions the
was not ruling on whether IPRs vio­ USPTO for an IPR, it might have all of
late due process. Since the Supreme the claims it has been accused of
Court bypassed the issue raised by the infringing upon ruled invalid by the
IEEE, it may yet arise again. USPTO, without having the USPTO
z September 2018
leave claims in limbo. In the meantime, ent owner avoid claim invalidation
However, the accused The USPTO has proposed the USPTO itself is by the USPTO. The decision to
infringer may wind that it use a different considering making change the claim interpretation in
up regretting that out­ IPRs somewhat less IPRs is not final but seems likely to
claim interpretation
come; if the USPTO dangerous for patent be adopted.
reviews all of the
method (the method owners. It has been
challenged claims used by the courts), using a broad claim About the Author
and reconfirms the which may help the interpretation, which Art MacCord (amaccord@maccord
continuing validity of patent owner avoid increases the chance mason.com) has practiced patent,
some of them, the claim invalidation that prior art can trademark, copyright, and trade­secret
accused infringer is invalidate a claim by law for over 35 years and is a graduate
by the USPTO.
left to only argue that being deemed to dis­ of the University of Virginia and
it is not infringing close the claimed George Washington University Law
when the case goes invention or make it School. He currently practices with
to court. This is because the law pre­ obvious. The USPTO has proposed MacCord Mason PLLC in Greensboro,
vents the petitioner from raising the that it use a different claim interpre­ North Carolina.
same argument again before a court tation method (the method used by
after raising it at the USPTO. the courts), which may help the pat­

September 2018 z IEEE PowEr ElEctronIcs MagazInE 67

 IEEE eGrid 2018
Monday, November 12th – Wednesday, November 14th, 2018

Location and Special Discounted eGrid Accommodation:

Embassy Suites by Hilton Hotel & Convention Center
5055 International Boulevard
North Charleston, SC 29418
843-730-5117
Rate: $119

IEEE eGrid 2018 Registration

Please click on the link to register and pay
More information and pricing details can be found on the Registration Website.

Reminder: CAPER IAB Fall 2018 Meeting participants will receive a discount on
their IEEE eGrid registration!

C PER
Center for Advanced Power Engineering Research
CAPER Fall 2018 Meeting
Thursday, November 15th – Friday, November 16th, 2018
Visit the IAB Fall 2018 Meeting Website for a discount coupon on your IEEE
eGrid registration!

For IEEE eGrid questions, please contact eGrid2018@clemson.edu

For CAPER questions, please contact charten@clemson.edu

Digital Object Identifier 10.1109/MPEL.2018.2854138

For the most up-to-date information, visit https://www.ieee-egrid.org/2018/program/
 Expert View
by Alex Lidow

gallium nitride Integration:

going where silicon Power can’t go

I
n the late 1970s, when I was a young
research and development engi-
neer working on early power metal–
oxide–semiconductor field-effect
transistors (MOSFETs), our group
was given the challenge of integrat-
ing several power devices to form a
monolithic half-bridge that could be
used in a variable-speed motor drive.
We quickly discovered the difficulty
of integrating multiple silicon (Si)
power devices into a monolithic com-
ponent because of the migration of
minority carriers from one power
device to the next. Solving the prob-
lem involved expensive technology.
The economics did not work, and our
group refocused on discrete transis-
tors. Forty years later, and with the
fast developments in gallium nitride-
on-Si (GaN-on-Si) technology, multi-
ple power devices can now be mono-
lithically integrated economically.
It has been more than eight years
But this is just the beginning for pace to strike the theoretical limit in
GaN-on-Si. Figure 1 shows the relative less time!
die size of Si power MOSFETs versus GaN-on-Si transistors are lateral
the last two generations of enhance- devices (the current flow is parallel
ment-mode GaN (eGaN) FETs pro- to the surface of the transistor) as
duced by the Efficient Power Conver- compared with power MOSFETs,
sion Corporation (EPC). Even with which are vertical-conduction devic-
the current superior performance of es. Therefore, GaN-on-Si has the
GaN over Si, the fifth-generation GaN advantage of easy integration of mul-
devices, launched in 2017, are still 300 tiple power devices that can be elec-
times larger than their theoretical trically isolated from each other. In
limit. For comparison, in 1978, Inter- 2014, EPC demonstrated this capabil-
national Rectifier introduced power ity with a family of monolithic half-
MOSFETs that were state of the art bridge products, starting with the
yet were still 300 times away from the EPC2100. Not only was it possible to
Si theoretical limit. It took about 20 integrate economically, but the com-
years for power MOSFETs to hit the bination of two power devices took
theoretical line. GaN technology is on less chip area than the individual
1 E–02
t
imi

it
im

since discrete GaN-on-Si power devic-

al L

lL

it
im

es hit the off-the-shelf commercial

)

ica
RDS(on),sp (Ω . cm2)

etic

PS

lL
(E

ret

market as replacements for aging Si

ica
eor

ff

eo
-O

ret
Th

power MOSFETs. New applications,

Th
N

1 E–03
eo
ET
Si

such as LiDAR and envelope tracking,

Si

Th
F
14

17
aN

have benefited from the faster switch-

20

20 300 ×
Ga
eG

ca
rc

ing speeds and small size of GaN ir

Ci

C
devices. More recently, mainstream T
FE
applications, such as 48–12-V dc–dc aN Commercial
converters, have adopted GaN-on-Si, eG
Products
and their prices have achieved near 1 E–04
50 500 5,000
parity with mature MOSFETs.
Breakdown Voltage (V)

Digital Object Identifier 10.1109/MPEL.2018.2850738 FIG 1 The theoretical on-resistance versus voltage for Si silicon carbide (SiC) and GaN
Date of publication: 10 September 2018 majority carrier devices. (Image used with permission from EPC.)

70 IEEE PowEr ElEctronIcs MagazInE z September 2018

 College of Engineering, Computing and Applied Science

Faculty Search for Warren H. Owen Distinguished Professor

in Electrical & Computer Engineering with a focus in Power Electronics and Drives

Applications and nominations are sought for the Warren H. Owen Distinguished Professor in Electrical and
Computer Engineering at Clemson University (http://www.clemson.edu/ece/). The candidate’s teaching and
research should encompass a broad range of topics related to power electronics, including power electronic
devices, converter topologies, control, electrical drive systems and energy storage systems. In addition, the
ideal candidate should have a solid understanding of the cyber-infrastructure related areas of power
electronic systems such as embedded controller systems, networking, and communication and sensing. The
person filling the position will hold a senior faculty position in the Holcombe Department of Electrical and
Computer Engineering and will be located on Clemson’s main campus in Clemson, SC.

The Holcombe Department of Electrical and Computer Engineering is one of the largest and most active
departments at Clemson, with over 35 primary faculty positions and 14 affiliated full-time faculty members,
approximately 550 undergraduates and 190 graduate students. The main campus includes state-of-the-art
real-time simulation facilities for research in intelligent control of the electric grid, a modern power-
electronics laboratory, and a thriving undergraduate and graduate emphasis in power systems. There are also
power system facilities at the Clemson University Restoration Institute (CURI) in N. Charleston SC, that are
associated with the department. CURI houses a $98M power facility initiated in 2009 from a $45M
Department of Energy grant. The facility includes the SCE&G Energy Innovation Center which contains
the world’s most-advanced wind-turbine drivetrain testing facility capable of full-scale highly accelerated
mechanical and electrical testing of advanced drivetrain systems for wind turbines. The SCE&G Energy
Innovation Center also houses the Duke Energy Electrical Grid Research Innovation and Development
(eGRID) Center, a facility with real-time simulation and 20MVA hardware-in-the-loop capability.

Clemson University is the largest land-grant institution in South Carolina, enrolling 18,600 undergraduates
and 4,800 graduate students. Seven colleges house strong programs in architecture, engineering, science,
agriculture, business, social sciences, arts and education. A faculty of 1,500 and staff of 3,700 support 84
undergraduate degree offerings, 73 master’s degree programs and 40 Ph.D. programs. An annual operating
budget of approximately $1.15 billion and an endowment of $683 million fund programs and operations.
The University has externally funded research expenditures of $109 million per year. Research and economic
development activities are enhanced by public-private partnerships at 4 innovation campuses and 6 research
and education centers located throughout South Carolina. Clemson University is ranked 23rd among national
public universities by U.S. News & World Report.

Applicants must have an earned doctorate in Electrical Engineering or a closely related field. Application
material should be submitted electronically at the following Web link:
http://apply.interfolio.com/52850

To ensure full consideration, applicants must apply by November 15, 2018; however, the search will remain
open until the position is filled.

Clemson University is an AA/EEO employer and does not discriminate against any person or group on
the basis of age, color, disability, gender, pregnancy, national origin, race, religion, sexual orientation,
veteran status or genetic information. Clemson University is building a culturally diverse faculty
committed to working in a multicultural environment and encourages applications from minorities and
women.
discrete transistors, thus providing
additional savings in cost and valu-
able printed circuit board area. Per-
formance was also improved, largely
due to the reduction in power loop
inductance by approximately 40%, as
shown in Figure 2.
In parallel with the improvement
in discrete GaN technology, new
devices that incorporate the driver
function have been launched by com-
panies such as Navitas Semiconduc-
tor, Dialog Semiconductor, and EPC.
A good example is the EPC2112,
which pairs a 200-V, 40-mΩ FET with
a monolithically integrated driver
that enables the FET to be switched
at multimegahertz frequencies from
simple logic gates. The next step,
coming in early 2019, is to combine
the monolithic half-bridge with driv-
ers and add a level-shift function,
such that the entire half-bridge can
be controlled by a simple logic gate. A
half-bridge with level shift and driv-
ers is the building block for most
power conversion applications. This
is the dream we had 40 years ago!
Going forward, there are two par-
allel paths for GaN technology: 1)
improving the underlying GaN-on-Si
technology to harvest the remaining
300 times in die size reduction theo-
retically possible and 2) adding more
92
91
90
89
88
Efficiency (%)
87
86
85
84
83
82
81
80
79
2 6
FIG 2 The EPC2100 monolithic half-bridge (green curve) shows improved efficiency
in a 12–1.2-V buck converter operating at 1 MHz compared with discrete GaN-on-Si
FETs introduced during the five prior years. (Image used with permission from EPC.)
72 IEEE PowEr ElEctronIcs MagazInE
and more useful functionality to inte-
grated circuits (ICs). However, there
are several challenges facing integra-
tion efforts in GaN.
First and foremost, there needs to
be a stable, well-characterized library
of passive and active components that
can be reliably and predictably inte-
grated monolithically. The first-genera-
tion ICs were in a sense handcrafted
based on trial and error and highly edu-
cated guessing. To achieve the best and
most reliable performance, technology
platforms need to be translated into a
rich set of models that scale; include
parasitic interactions; are character-
ized over all temperature, voltage, and
current conditions; and include real-
istic process variations. This is no
small task, and it creates a natural ten-
sion with the quickly improving dis-
crete GaN FET performance.
On the one hand, it takes time and
effort to fully characterize a technol-
ogy platform. On the other hand, if
the platform is changing faster than
the characterization process, then
the IC products will lag their dis-
crete counterparts in performance
and cost effectiveness. At EPC, this
has caused us to put a great deal of
engineering talent and resources,
including automated device charac-
terization equipment, into the devel-
GaN Circa 2015
GaN Circa 2012 GaN Circa 2014
GaN Circa 2010
VIN = 12 V, VOUT = 1.2 V,
fsw = 1 MHz
10 14 18 22 26 30 34 38 42 46 50
Output Current (A)
z September 2018
opment of a quickly and thoroughly
characterized IC platform based on
the latest discrete technology.
Our technology road map has the
discrete technology evolving from
approximately 21 mΩ-mm2 today, to
about 6 mΩ-mm2 by the year 2021. In
addition to monolithic half-bridge ICs,
we are planning complete closed-loop
buck converters, three-phase motor
drives, and multilevel converters com-
plete with a digital interface (and pos-
sibly full digital control).
Discrete power transistors are
entering their final chapter. With GaN-
on-Si technology, the transistor size is
making it ever harder to pull enough
current out of the tiny discrete chips.
We do not see economical metallurgi-
cal solutions to extracting 300 Adc out
of a 1-mm2 device. ICs mitigate this to
some extent by allowing merged struc-
tures that reduce overall metal con-
duction losses and parasitic induc-
tance. This challenge, however, will
require some creativity to enable the
achievement of theoretical GaN per-
formance. We did it in Si—and we can
do it again in GaN.
About the Author
Alex Lidow (alex.lidow@epc-co.com)
received his B.S. degree from the Cali-
fornia Institute of Technology, Pasade-
na, in 1975 and his Ph.D. degree in
applied physics as a Hertz Foundation
Fellow from Stanford University, Cali-
fornia, in 1977. He was elected to the
Engineering Hall of Fame and received
the 2015 SEMI Award for North Ameri-
ca for innovation in power device tech-
nology. He is the chief executive officer
(CEO) and cofounder of the Efficient
Power Conversion Corporation (EPC).
Prior to founding EPC, he was the CEO
of the International Rectifier Corpora-
tion. A co-inventor of the HEXFET power
metal–oxide–semiconductor field-effect
transistor (MOSFET), he holds many
patents in power semiconductor tech-
nology, including basic patents in power
MOSFETs and gallium nitride (GaN)
FETs. He coauthored the first textbook
on GaN transistors, GaN Transistors for
Efficient Power Conversion.
 Holcombe Department of Electrical and Computer Engineering

Faculty Search for Assistant or Associate Professor in Power Systems or Power Electronics
Clemson University Charleston Innovation Campus, N. Charleston, SC

Applications and nominations are sought for an Assistant or Associate Professor of Electrical and Computer
Engineering (http://www.clemson.edu/ece/) in electrical power engineering at the Zucker Family Graduate
Education Center (ZGEC) of Clemson University’s Charleston Innovation Campus in N. Charleston, SC
(https://www.clemson.edu/cecas/departments/charleston/). Consideration will be given to candidates with
teaching and research in topics related to power engineering with a focus on either 1) Intelligent Distribution
Systems applications in power systems or 2) Power Electronic converters, devices and applications in power
systems. In addition, the ideal candidate should have a solid understanding of the electrical drive systems
and wide-bandgap power electronic devices and converters. In either case, a solid understanding of the
cyber-infrastructure related areas of power systems such as embedded systems, cybersecurity, networking,
and remote sensing will be beneficial.

The Holcombe Department of ECE is one of the largest and most active departments in the University,
with 35 primary faculty positions and 14 affiliated full-time faculty members, approximately 550
undergraduates and 190 graduate students. Annual research expenditures exceed $8.6 million. Power
engineering research facilities associated with the Department include those on the Clemson main campus
and at the Charleston Innovation Campus. The Innovation Campus houses a $110M electric power research
facility initiated in 2009 from a $45M Department of Energy grant. It includes the SCE&G Energy
Innovation Center, which contains the world’s most-advanced wind-turbine drivetrain testing facility
capable of full-scale highly accelerated mechanical and electrical testing of advanced drivetrain systems for
wind turbines. The SCE&G Energy Innovation Center also houses the Duke Energy Electrical Grid
Research Innovation and Development (eGRID) Center, a facility with real-time simulation and 20MVA
hardware-in-the-loop capability. The Clemson main campus includes state-of-the-art real-time simulation
facilities for research in intelligent control of the electric grid, a modern power-electronics laboratory, and a
thriving undergraduate and graduate emphasis in power systems.

Clemson University is the largest land-grant institution in South Carolina, enrolling 18,600 undergraduates
and 4,800 graduate students. Seven colleges house strong programs in architecture, engineering, science,
agriculture, business, social sciences, arts and education. A faculty of 1,500 and staff of 3,700 support 84
undergraduate degree offerings, 73 master’s degree programs and 40 Ph.D. programs. An annual operating
budget of approximately $1.15 billion and an endowment of $683 million fund programs and operations.
The University has externally funded research expenditures of $109 million per year. Research and economic
development activities are enhanced by public-private partnerships at 4 innovation campuses and 6 research
and education centers located throughout South Carolina. Clemson University is ranked 23rd among national
public universities by U.S. News & World Report.

Applicants must have an earned doctorate in Electrical Engineering or a closely related field. Application
material should be submitted electronically at the following Web link:
apply.interfolio.com/39804

To ensure full consideration, applicants must apply by November 15, 2018; however, the search will remain
open until the position is filled.

Clemson University is an AA/EEO employer and does not discriminate against any person or group on
the basis of age, color, disability, gender, pregnancy, national origin, race, religion, sexual orientation,
veteran status or genetic information. Clemson University is building a culturally diverse faculty
committed to working in a multicultural environment and encourages applications from minorities and
women.
 ACEPT is part of:

Asian Conference on Energy, Power

and Transportation Electrification 2018
30th OCT - 2nd NOV 2018 Announcement and Call for Papers
Nanyang Technological University and
Sands Expo and Convention Centre,
Marina Bay Sands The third Asian Conference on Energy, Power and Transportation
Singapore Electrification (ACEPT) as a part of Asia Clean Energy Summit (ACES) held in
conjunction with Singapore International Energy Week (SIEW 2018) will cooperate
with the Institute of Electrical and Electronics Engineers (IEEE) to bring together the world
leading experts to present emerging topics on energy, power, and transportation electrification.
Papers of practical importance are solicited in the following areas:

1. Renewable Energy 3. Smart Grid 4.9 Flash charging buses

1.1 Photovoltaic power 3.1 Solid state transformers
conversion 3.2 Solid state circuit breakers
1.2 Wind power generation 3.3 Smart grid communication
(onshore and offshore) 3.4 Microgrid interoperability
1.3 Tidal, wave and other ocean 3.5 AC, DC and hybrid AC/DC
energy systems micro grids
1.4 Floating renewable systems 3.6 Medium voltage DC
1.5 Distributed generation transmission and distribution
1.6 Renewable enabled remote 3.7 Smart house and building
grids technologies
1.7 Power electronics for utilities 3.8 Virtual Inertia
2. Energy Storage 4. Transportation Electrification
2.1 Specialty batteries 4.1 Electric vehicle propulsion
2.2 Super capacitors 4.2 Railway drivetrains
2.3 Flywheel 4.3 Ship Electrification
2.4 Uninterruptible power 4.4 More electric aircraft
supplies 4.5 V2G and V2H
2.5 Power electronics for energy 4.6 Charging technologies
storage
4.7 Charging infrastructure
4.8 Port electrification
5. Emerging Technologies
5.1 Wireless charging
5.2 High efficiency energy
harvest
5.3 Wide bandgap devices for
electrification applications
5.4 Novel power converter
topologies
6. Renewables, Policy &
Financing
6.1 Business models and policies
6.2 Government initiatives and
incentives
6.3 Market opportunities in
Southeast Asia
7. Multi Energy Grids and Low
Carbon District
7.1 Multi energy grids
7.2 Low carbon district

Deadline for submission of full paper is extended to 29 June 2018.

Authors will be notified of acceptance no later than 20 July, 2018.
Final paper manuscripts are due no later than 14 September, 2018.

Preparation of Full Paper: Prospective authors of technical papers are asked to submit a full paper of their planned
presentation. Full papers for ACEPT 2018 must be submitted in electronic format no later than 1 June, 2018. Authors are
requested to download and fill in the Full Paper template (Word format - A4, US Letter) with details of the primary contact
and presenter. For details, please visit http://acept.asia. All authors should obtain company and governmental clearance
prior to submission of the Full Paper. Full Papers will be sent to multiple reviewers; therefore, “Confidential” and “Proprietary”
information should be omitted.
Please note that papers presented at ACEPT must be original material and not have been presented at previous conferences
or previously published. Manuscripts not received by the deadline above may not be published in the Proceedings and will
not be presented at the conference. Finished manuscripts are not to exceed 8 pages.

Digital Object Identifier 10.1109/MPEL.2018.2855810

 ACEPT 2018 Organizing Committee
General Chair Jason Lai Publicity Chair Koh Liang Mong
General Co-Chair Lalit Goel Publicity Co-Chair Liaw Ai Tee
Technical Program Chair Josep Pou Tutorial Chair Tang Yi
Technical Program Co-Chair Gooi Hoay Beng Tutorial Co-Chair Vaisambhayana
Technical Program Co-Chair Narasimalu Srikanth Brihadeeswara Sriram

Special Sessions Chair Choo Fook Hoong Local Arrangement Chair Anshuman Tripathi

Finance Chair Niels de Boer Web Master Bill Diong

Finance Co-Chair Koh Leong Hai Marcus Conference Administrator Yvonne Loh

Publication Chair Ayu Aaron Alexander

ACEPT 2018 International Steering Committee

Amit Gupta (Chair) Rolls-Royce, Singapore
Frede Blaabjerg Aalborg University, Denmark
Henry Shu-Hung Chung City University of Hong Kong,
Hong Kong
Akshay Kumar Rathore Concordia University, Canada
Deepak Divan Georgia Institute of Technology,
USA
Nouredine Hadjsaid Grenoble Institute of Technology,
France
Chun-Taek Rim Gwangju Institute of Science
and Technology, Korea
Tomy Sebastian Halla Mechatronics, USA
Dianguo Xu Harbin Institute of Technology,
China
C.K. Michael Tse The Hong Kong Polytechnic
University, Hong Kong
Mahesh Krishnamurthy Illinois Institute of Technology,
USA
Timothy Green Imperial College London, UK
Sri Nivas Singh Indian Institute of Technology
Kanpur, India
Amit Patra Indian Institute of Technology
Kharagpur, India
Tsorng-Juu (Peter) Liang National Cheng-Kung University,
Taiwan
Yen-Shin Lai National Taipei University of
Technology, Taiwan
Peter Malkin Newcastle University, UK
Phil Taylor Newcastle University, UK
Carlo Bottasso Technische Universität
München, Germany
Prasad Enjeti Texas A&M University, USA
Toshihisa Shimizu Tokyo Metropolitan University,
Japan
Mark O’Malley University College Dublin,
Ireland
Yunwei Li University of Alberta, Canada
Kaushik Rajashekara University of Houston, USA
Liuchen Chang University of New Brunswick,
Canada
Z. Qiang Zhu University of Sheffield, UK
Sheldon Williamson University of Ontario Institute of
Technology, Canada
AbuBakr Bahaj University of Southampton, UK
Atsuo Kawamura Yokohama National University,
Japan
Graeme Burt University of Strathclyde, UK

A peer review process will be used to evaluate all papers submitted for consideration. Anyone interested in becoming a
reviewer is encouraged to email ACEPT@ntu.edu.sg. The principal criterion in reviewing papers for acceptance will be
the usefulness of the presentation to the practicing power engineering professional. The reviewers value evidence of
completed experimental work.

ACEPT 2018 is technically co-sponsored by IEEE Transportation Electrification Community, Power Electronics Society,
Power and Energy Society and Industry Applications Society. Accepted and presented papers will be indexed in IEEE Xplore
Digital Library.
For more information, contact and visit:
Secretariat, ACEPT 2018
Email: ACEPT@ntu.edu.sg
Website: http://acept.asia
 Society News
T
he tenth edition of the annu­
al IEEE Energy Conversion
Congress and Exposition
(ECCE) will be held 23–210 Septem­
ber 2018, in Portland, Oregon. By at
least one measure, this meeting has
the expectation of being bigger than
any of its predecessors. Based on
reports by organizers, it has the
potential to be even better than the
previous embodiments of this popu­
lar conference.
The conference is well summari­
zed on its home page by its general
chair Dr. Avoki M. Omekanda, who
is also a staff research engineer at
the General Motors Global R&D Cen­
ter in Pontiac, Michigan. According
to Omekanda,
IEEE ECCE 2018 shares an
insight into the recent research
and cutting­edge technologies
in electrical and electromechan­
ical energy conversion, which
gains immense interest with the
exuberant presence of talented
researchers, practicing engi­
neers, and other professionals.
ECCE is the world’s leading
technical conference and expo­
sition for energy conversion
solutions. We bring together a
multidisciplinary group of
researchers, engineers, and sci­
entists from all over the world
to present and exchange break­
Digital Object Identifier 10.1109/MPEL.2018.2851120
Date of publication: 10 September 2018
76 IEEE PowEr ElEctronIcs MagazInE
EccE gets Bigger and Better
through ideas relating to the
energy conversion systems and
technologies. ECCE is unique
in our emphasis on integrated
systems, presenting the best in
applied integrated systems
research together with innova­
tions in individual energy con­
version components.
As was the case last year, the con­
ference is collocated with the IEEE
Industry Applications Society (IAS) An­
nual Meeting. The preliminary sched­
ule­at­a­glance, also on the website,
shows little change from previous
years; there are tutorials all day on
Sunday, technical sessions mornings
and afternoons Monday through
T hursday, with no overlap between
massively parallel oral sessions and
poster sessions but substantial over­
lap between oral sessions and special
panels. The schedule comes close to
Table 1. ECCE 2018’s plenary session speakers.
topic
Power Semiconductors—Enabling
a Powerful Decade of Changes
Ocean Energy—Wave and Tidal
Energy Opportunities
Data Centers—Disruptive Facility
Architectures with Fuel Cells and
Load Side Integration
SiC Power Devices—High Impact Dr. Victor Veliadis
Application and Path to Wide
Adoption
Hyperloop—Creating the Future
of Transportation
z September 2018
by Tom Keim
having something for everyone, all
the time.
The plenary titles and presenters
are shown in Table 1. Commenting on
the plenary talks, plenary session co­
chair Dr. Bruno Lequesne of E­Motors
Consulting, LLC, said, “Wave and tidal
energy is a big deal in the upper West
Coast. The local universities have
great programs in this field.” With
regard to data centers, Dr. Lequesne
noted that “they are a big industry
now, using over 2% of the electric­
ity produced in the U.S. So Microsoft
and others are researching in a big
way how to reduce this energy bill.”
He also reports that IEEE IAS has
recently formed a subcommittee re­
lated to data center topics, and a meet­
ing for those interested will be held at
6:00 p.m. on Monday in conjunction
with the conference. Many readers
will recognize the name Hyperloop,
speaker affiliation
Dr. Stephanie Technology Innovation Architect,
Butler Texas Instruments
Jason Bush Executive Director, Pacific Ocean
Energy Trust
Sean James Director of Energy Research,
Microsoft
Chief Technical Officer Power­
America and North Carolina State
University
Dr. Jiaqi Liang Director of Power Electronics,
Hyperloop One
 Despite the record
number of
submissions, the
review process was
substantially more
rigorous than in at
least some previous
conferences.

but Dr. Lequesne recommends that readers Google

that term and promises that “it sounds like a lot
of futuristic fun.”
Figure 1 suppor ts the idea that this year’s
ECCE is bigger than any previous year’s, while
providing perspective on the advance of the se­
ries of conferences.
The chart clearly shows that the number of di­
gest submissions received for 2018 is the largest
ever, while the trend line shows that submissions
have grown from roughly 1,100 in the early years to
nearly 1,700 in recent years. Dr. Omekanda further
reports that the number of abstracts accepted for
presentation in 2018 is also a record; given that few­
er papers are actually presented than accepted, it
is premature to conclude that the number of papers
presented will be a record. But 1,190 overall papers
have been accepted, so the prospects are good. And
Tape Wound Toroidal & Cut Cores
the trend line is very encouraging. For Sophisticated Electronic
Dr. Giovanna Oriti, a professor at the Naval Components
Postgraduate School in Monterey, California, and
one of several technical program cochairs for the
conference, made a convincing case for the confer­
ence being better than before. Despite the record
number of submissions, the review process was
substantially more rigorous than in at least some
previous conferences. Overall, 1,755 abstracts were
subjected to 8,201 reviews. The difference between
the number submitted (1,788 from Figure 1) and
the number reviewed represents abstracts that,
Magnetic Metals Our Magnetic Cores
while submitted, were withdrawn prior to review.
Uniquely Supplies: are used in:
The average number of reviews per abstract was
• All types & thicknesses of soft Power/navigation systems for
therefore approximately 4.7. Every paper ab­ magnetic materials with… Aero/Defense • Transformers/
stract received between three and five reviews. GFCI’s for EV’s/charging
Only papers in which the first three reviews were • Advanced magnetic & stations • Power supplies for
performance properties. MRI’s/medical equip. • Voltage
unanimous, either for or against acceptance, were
• Standard & custom sizes, monitors for industrial controls
eligible to be judged on three reviews alone. The
rejection of papers that received a positive review shapes and quantities. Contact Our Technical
was an occasion for a review by a vice chair and/ • Nanocrystalline & amorphous Team Today!
or a topic chair. Written comments were provided alloys; silicon- nickel- and New Jersey & California
cobalt-iron alloys. 888-892-8392
for all rejections. Even with this rigor (or perhaps
www.MagneticMetals.com
because of it), the acceptance rate was 68%, up
from 64% the previous year. 75+ YEARS
OF CUSTOMER
SERVICE
 otherwise be submitted to ECCE are
Historical Digest Submissions apparently offered there instead.
1,900 Even the Sunday tutorials are
1,800 1,718 1,788
claimed to be bigger and better. “We
1,700 listened to the local industries by ap­
1,600 1,557
proaching local IEEE IAS and PELS
1,500 Chapters in the Portland, Oregon, and
1,442 1,504
1,400 Seattle, Washington areas,” Dr. Ome­
1,262 1,342
1,300 kanda explains. “They gave us a list
1,200 1,245 1,190 of topics of their interests. Following
1,100 their suggestions and regular ECCE
1,000 1,085
2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 areas of interest, a record number of
Conference Year 20 tutorials out of 40 submissions
were selected for the conference. For
FIG 1 The number of abstracts received by ECCE over time. (Figure courtesy of Dr. the first time in ECCE history, the tu­
Avoki Omekanda.) torial materials will be available for
purchase by conference attendees
This process involved the efforts of they represent a continuation of the who will not be able to attend live tuto­
approximately 1,000 volunteer review­ predecessor Power Electronics Spe­ rial sessions on Sunday, September
ers, supervised by 23 vice chairs and cialist Conference. The large inter­ 23, 2018.”
168 topic chairs. The review process est in electrical machines is, at first Technically, there are 22 tutorial
was completed close to 20 days ahead glance, a little puzzling. The mystery offerings, not 20. The conference web­
of schedule, and a preliminary pro­ is heightened when one learns that site shows that there are ten options in
gram was uploaded to the conference electrical machines was the fastest the morning session and ten options
website nearly four months before of growing subject track, up 60% from in the afternoon; however, in both the
the conference. the previous year. Prof. Akira Chiba, morning and the afternoon, one of the
It is interesting to note that the of the Tokyo Institute of Technology options is to select one or both of two
three largest subject tracks in terms and also a technical program vice half­length tutorials, which are of­
of submissions (controls, modeling, chair, provided the answer. There is a fered in sequence. The tutorial topics
and optimization of converters and long history of higher submissions of are also available on the website.
power converter topologies and elec­ electric machines abstracts in even­ All of this development is the re­
trical machines) represented 48% of numbered years. In odd­numbered sult of an excellent volunteer organiz­
all submissions. The inclusion of con­ years, the IEEE International Elec­ ing committee. It is heartening to see
trols, modeling, optimization, and to­ tric Machines and Drives Conference such growth and improvement in this
pologies on this list is understandable; is held, and many papers that would already successful conference.

by Tom Keim

IntElEc turns 40

T
he IEEE International Tele­ for the 40th consecutive year, this time called Turin. The conference website
communication Energy Confer­ in Torino, Italy, from 7 to 11 October in English uses Torino throughout, so
ence (INTELEC) will convene 2018. It is the largest conference wholly this is clearly a conscious choice.
sponsored by the IEEE Power Elec­ Although the conference series started
Digital Object Identifier 10.1109/MPEL.2018.2851121
tronics Society. Torino is the Italian with a focus on electrical power and
Date of publication: 10 September 2018 name for the city, which in English is energy technology for large telephone

78 IEEE PowEr ElEctronIcs MagazInE z September 2018

systems, the technical focus of the con­ that the spirit of the conference has re­ conversion, energy storage, and site
ference has expanded and shifted over mained true to these roots, despite the monitoring and suppor t solutions
the decades to serve the expanding revolutionary changes in communica­ for the commu ni cations industry.
needs of a burgeoning communications tions and in forma­ There is a large so­
and information delivery industry. tion systems. ci a l component t o
This transition is evidenced by the In today’s con­ Although the the con ference in­
breadth of technical subjects spanned text, the industry cluding receptions,
conference series
by the call for papers. This ranges compr ises “manu­ a gala dinner on the
from power conversion technologies fa ct u rer s, u s e r s , started with a focus night before the final
such as ac–dc and dc–dc converters, and system opera­ on electrical power day of sessions, and,
energy storage and generation tech­ tors, w o r k i n g to­ and energy technology m o s t pa r ticula rly,
nologies, including emergent and even gether,” according for large telephone Tuesday after noon
preemergent technologies, e.g., flow to Dav id son. The systems, the technical social and technical
batteries and energy management conference is well half­day tours that
focus of the
systems, and site support systems focused on all tech­ ensure attendees can
such as cooling technologies. nologies power conference has network and get the
Don Davidson of Gleneagles Tech­ related, as they ap­ expanded and shifted most out of their visit
nologies serves as the chair of the con­ ply to the evolving  over the decades to to the host city.
ference steering committee, which is i n fo r m a t i o n a n d serve the expanding One distinguishing
involved in selecting future venues com mu n ic a t io n s needs of a burgeoning feature of this confe­
and setting strategic objectives for the technologies or ICT. rence is the focus on
communications and
conference series. In a conversation, The same thought is the needs of a narrow
he said that the characteristic has precisely captured information delivery subset of the industry
an uncommonly intense focus on the by the theme of the industry. at large. It is estimat­
needs of the industry that it serves. Torino conference: ed that between oral
It seems reasonable that the confer­ “40 Years of Inspi­ and poster sessions,
ence started out with such a focus, ration, Research, and Exploration in perhaps 140 papers will be presented
given that it was founded with the Power and Energy for ICT.” over the four days. A dedicated attend­
support of the Bell Telephone La­ The conference format is famil­ ee could hope to hear or discuss per­
boratory, in a time when if the Bell iar: tutorials on the first day, ple­ haps 40 papers and presentations over
Sy s tem perceived a need for a tech­ nary and parallel sessions on each the course of the conference. With dili­
nology, the Bell System created it. subsequent day. The conference also gent selectivity about what one at­
Davidson’s asser tion is evidence includes a n ex h ibit ion of power tends, that dedicated attendee could

September 2018 z IEEE PowEr ElEctronIcs MagazInE 79

possibly experience all of the entries
on the program that are of highest
importance to him or her.
The 2018 conference venue is
the Lingotto Convention Centre. This
convention site is part of an exten­
s i v e redevelopment of w h a t w a s
once the largest automobile assem­
bly plant in the world. The building
complex even features a test track on
its roof, a carry­over feature from the
original use of the complex. In addi­
tion to the convention center, the re­
development includes several hotels
and a large modern indoor shopping
mall. The host city, Torino, is located
in Piedmont, the northeastern re­
gion of Italy. The city hosted the 2014
Winter Olympics and is famous for
its picturesque setting, long history
(from Roman times), culture, food,
and wine.
More information on the INTELEC
2018 conference, including registra­
tion, accommodation, and travel can
be accessed on the conference web­
site: www.intelec2018.org.

congratulations to the 2018

PEls awards winners!

C
ontinuing its tradition of rec­ research contributions aiming at sta­ ( L E D ) l i g h t i n g standards group
ognizing technical profes­ bility of power systems with power (project authorization request 1789)
sionals whose achievements electronic supply.” and for IEEE Std 1789­2015, IEEE
a n d contributions have m a d e a The recipient of the IEEE PELS Recommended Practices for Mod­
difference in our Society and the H a r r y A . O we n , Jr. D i s t i n g u i sh­ ulating Current in High­Brightness
engineering profession while sig­ e d Ser v ice Awa rd LEDs for Mitig a t ­
nificantly impacting technology was William Gerard i n g H e a l t h Risks
itself, the IEEE Power Electronics Hu rley of t he Na ­ The Modeling and to Viewers.”
Society (PELS) has announced the tional University of Control Technical The winner of the
winners of its 2018 PELS Awards. Ireland, Galway “for Achievement Award IEEE PELS Sustain­
The winners were announced by 2018 dedicated ser vice able Energy Systems
was presented to
IEEE PELS Awards Chair An dreas to IEEE PELS for Technical Achieve­
Lindemann of Universitaet Magde­ over thir ty yea rs, Charles R. Sullivan of ment Aw a r d w a s
burg, Germany. pa r ticula rly in in­ Dartmouth College, Liuchen Chang of the
The IEEE PELS R. David Middle­ ternational confer­ Hanover, New University of New
brook Achievement Award was given ences and seminars Hampshire, “for Brunswick, Canada,
to Grahame Holmes of Monash Uni­ and the promotion contributions to the “for contr ibutions
versity, Melbourne, Australia, “for of power electron­ to i n nov a t ion s in
modeling and analysis
fundamental contributions to the ics to a worldwide d i s tributed power
theory and practice of pulsewidth audience through of magnetic generation.”
modulation and current regulation of lectures and invit­ components for T he M o d e l i n g
power converters.” ed talks.” power electronics.” and Control Tech­
The Richard M. Bass Outstand­ Brad Lehman of nical Achievement
ing Young Power Electronics Engi­ Northeastern Uni­ Aw a r d w a s p r e ­
neer Award went to Xiongfei Wang versity, Boston, Massachusetts, re ­ sented to Ch a rle s R . S u l livan of
of Aalborg University, Denmark, “for ceived the IEEE PELS Award for D a r t m o u t h C o l l e g e , H a n o v e r,
Achievement in Power Electronics New Hampshire, “for con tributions
Standards “for outstanding con­ to the modeling and ana ly s i s o f
Digital Object Identifier 10.1109/MPEL.2018.2851699
tributions in initiating and lead­ m a g ne t ic c omp one nt s for pow­
Date of publication: 10 September 2018 ing the IEEE light­emitting diode er electronics.”

80 IEEE PowEr ElEctronIcs MagazInE z September 2018

 1988-2018 - Celebrating 30 years of Innovation and Service

EMPOWER YOURSELF!
With Global Vision, Knowledge and Networking
as a Member of the IEEE Power Electronics Society.

TECHNICAL COMMUNITIES

PUBLICATIONS

CONFERENCES

Powering the Past,

STANDARDS
Energizing the Future

EDUCATION

STUDENT ACTIVITIES & MENTORING

Join now at ieee-pels.org

Be connected to the ultimate source of power in your industry!

Digital Object Identifier 10.1109/MPEL.2018.2865154


Joint IEs/PEls Poland chapter organizes
workshop on Interlock time
O
n 10 September 2017, the
IEEE Power Electronics
Society (PELS) Technical
Committee Power & Control Core
Technologies and the Joint IEEE
Industrial Electronics S o c i e t y
(IES)/PELS Chapter of Poland Sec­
tion organized a workshop, “Inter­
lock Times—Necessary, Useful, or
Not Needed at All?” The workshop
was held at the Centre for Inno­
vation and Technology Transfer
Management of Wa r s a w Univer­
sity of Technology, Poland, a day
before the European Conference
on Power E l e c t r o n i c s and Ap ­
plications (EPE ‘17 ECCE Europe).
Thirty­two participants, includ­
ing 28 IEEE Members, joined the
workshop to share their experienc­
es (Figure 1).
Joint IES/PELS Chapter of Po­
land Section Chair Sebastian Styn­
ski kicked off the lectures with a
welcome address, followed by a talk
about the background of the work­
shop, which was delivered by Prof.
Ralph Kennel from the Technical Uni­
versity of Munich. Prof. Kennel noted:
Digital Object Identifier 10.1109/MPEL.2018.2851700
Date of publication: 10 September 2018
FIG 1 The attendees and speakers during the “Interlock Times—Necessary, Useful, or Not Needed at All?” workshop.
82 IEEE PowEr ElEctronIcs MagazInE
Just like many researchers, I
have been taught (and I was
passing this knowledge to the
students) that they must be pro­
vided a specified period of time
(so­called interlock time or
dead­time) between gate signals
of two complementary semicon­
ductors to prevent a shoot­
through, and finally a failure of
one or both of semiconductors
as a result of thermal damage.
Also, during my industrial activ­
ities at Robert Bosch, company
experts were stuck to that opin­
ion. However, recent reports
have shown that it is not neces­
sary to wait until the tail current
has vanished—the opposite
semiconductor can be switched
on during the time the tail cur­
rent is still flowing without
destroying them.
Hence, the idea of organizing a
workshop with an open discussion
and exchange of experience in field of
interlock times proved to be benefi­
cial to all attendees. At the end, he ex­
pressed hope that participants would
be able to get closer to the answer on
this question of whether the interlock
times are necessary, useful, or not
needed at all.
z September 2018
by Sebastian Stynski
First, Guangye Si from the Techni­
cal University of Munich, Germany,
presented a report on his master’s
thesis, “Switching of the Commuta­
tion Process During the Recombi­
nation Current of Insulated­Gate
Bipolar Transistor (IGBT),” in which
he proved that after reduction of the
interlock time (even to zero), collector
current suffers a bump in the current
when one IGBT turns on during the
tail current of the other one, but this
doesn’t affect the proper working of
the circuit.
Prof. Sabin Carpiuc from Math­
Works Ltd., Natick, Massachusetts,
presented “Simulation of S ho o t ­
Through Characteristics in IGBT
Inverters,” in which deep analysis
of the dead­time impact on shoot­
through currents and the device’s
power losses was shown. One of the
conclusions was that longer dead­time
can help lower the loss, but a zero
dead­time is all that is needed to avoid
a destructive shoot­through current.
Prof. Mario Pacas of the University
of Siegen, Germany, in his “The Use of
Interlock Times in Industry” presenta­
tion, showed a historical view of the
effect in industrial drives and its new
aspects by using silicon carbide (SiC)
switches. He claimed that different
 What + If = IEEE

420,000+ members in 160 countries.

Embrace the largest, global, technical community.
People Driving Technological Innovation.

ieee.org/membership #IEEEmember

knowledge community professional development career advancement

FIG 2 The attendees and speakers exchanging ideas and experiences.
experimental works show that invert­
ers with SiC switches can be operated
without interlock times; nevertheless,
some concerns arise regarding elec­
tromagnetic interference, voltage
stress, losses, and impact on life ex­
pectancy, which calls into question
the worthiness of the elimination of
interlock time.
Oleg Zeiter, from the Fraunhofer
Institute for Reliability and Microin­
tegration, Germany, delivered “Cou­
pled Gates Zero Dead­Time Driver,”
designed for Si, SiC, a nd gallium
nitride (GaN) applications. Thanks
to its structure, which bypasses the
body diodes, the commutation to
the free­wheeling diodes is avoided,
and, therefore, apart from losses and
switching overvoltage reduction, no
pulsewidth modulation (PWM) duty­
cycle constrictions occur.
Prof. Jun Wang of Hunan Univer­
sity, China, discussed “The Shoot­
Through Phenomenon of (Metal–
Oxide–Semiconductor Field­Effect
Transistor) MOSFET a nd IGBT.”
A f ter MOSFET’s shoot­through and
suppression method he focused on
impact of IGBT’s interlock time on
efficiency and reliability. According
to Prof. Wang, the interlock time
needs to be reduced to achieve high
efficiency/reliability, however, strict
knowledge of semiconductor de­
vices’ electrical characteristics is
needed for good driver design with
84 IEEE PowEr ElEctronIcs MagazInE
appropriate engineering margin or
protection techniques to suppress
shoot­through.
Mario Mauerer, from ETH Zurich,
Switzerla nd, pre s ent ed the talk
“Minimization of Switching Stage
Non­Idealities for Ultra­Low THD
Class­D Power Amplifiers,” about the
negative impact of dead­time on out­
put signal distortion and different
ways it can be reduced. What is im­
portant, he pointed out, is that mini­
mization of interlock times is not the
ultimate solution, as there are other
sources of signal distortions and com­
pensation of other nonlinearities still
may be needed.
Finally, Prof. Toit Mouton from
Stellenbosch University, South Africa,
presented “Blanking Times (Inter­
lock Times/Dead­Times) in Class­D
Amplifiers,” claiming that, in most
cases, such application dead­time
(which cannot be minimized to zero)
is the dominant distortion mecha­
nism. When we want to suppress the
harmonics, the controller must have
enough loop gain, requiring a finely
quantized digital PWM with a very
high clock speed.
After a lunch break, an open dis­
cussion began. Participants could
ask questions of speakers and share
their own experiences (Figure 2). The
main conclusion from the discus­
sion was that the optimal dead­time
is required to protect the devices
z September 2018
from shoot­t h roug h; however, i n
m o s t cases, it is too long because
it based on the manufacturer’s data
that have a negative impact on per­
formance. In general, it is not dan­
gerous to switch during current tail
(even if reducing interlock time to
zero), but it requires more inves­
tigations into aspect junction tem­
perature (and the occurrence of hot
spots in junction) and how it affects
the lifetime of the device, since the
insufficient dead­time results in ob­
vious electric stress. In the case of
SiC and GaN devices, the D­ratio is
not yet fully established in compari­
son to the Si; however, it is hard to
make any final statement, especially
in the case of SiC and GaN devices,
for which such properties are not
yet fully established in comparison
to the Si­based ones. The reason for
this, e.g., is that the possible operat­
ing temperature for SiC devices (well
over 400 °C) is difficult to obtain
due to the lack of serially produced
housings that are able to withstand
very high temperatures. Therefore,
more investigations on interlock
time reduction are needed, and sup­
port of semiconductor devices pro­
ducers is needed to ensure it is safe.
Eventually, intelligent driver and
control with adaptive interlock time
can be the solution because in many
operation points, interlock times are
not needed.
by Kai Sun

IEEE PEls Dc Microgrids workshop

Held in Beijing

T
he 2018 IEEE Power Elec­
tronics Society (PELS) DC
Microgrids Workshop was
held in Tsinghua University, Beijing,
on 25 May 2018. It was sponsored
and initiated by the PELS Techni­
cal Committee 1; organized by the
Department of E l e c t r i c a l Engi­
neering, Tsinghua University; and
cosponsored by the PELS Beijing
Chapter, China Electrotechnical
Society, Tsinghua Energy Internet
Research Institute, and State Key
Lab of Power Systems. TBEA Xi, an
electrical technology company, was FIG 1 The invited workshop speakers with some industry partners from left: Kai Sun,
the gold partner of this workshop. Josep M. Guerrero, Tsai-Fu Wu, Martin Ordonez, Yunwei Li, Syed Muhammad Raza
The main theme of the gathering Kazmi, Xiang Hao, Jun Wang, and Tao Liu.
was “Smart DC Microgrids for a
Cleaner Future,” and there were Prof. Yun Wei Li of the University of Al­ Microgrids.” Dr. Xiang Hao, represent­
over 230 attendees from more than berta, Edmonton, Canada, offered the ing TBEA Xinjiang New Energy Compa­
60 institutions. presentation “Power ny, Ltd., gave the ad­
Prof. Xi Xiao, vice dean of the De­ Quality Control in dress “Smart Energy
partment of Electrical Engineering, Smar t AC/ DC Mi­ Router for Hybr id
Prof. Kai Sun of
Tsinghua University, and Prof. Zheng­ crogrids.” Prof. Mar­ AC/DC Microgrids.”
ming Zhao, chair of the PELS Beijing tin Ordonez of the Tsinghua University Last, Prof. Kai Sun
Chapter, kicked off the workshop with University of British talked about power of Tsinghua Univer­
welcome speeches. The workshop in­ Columbia, Vancou­ electronics techniques sit y t a l ked a bout
vited six experts from academia and ver, Canada, talked for large-capacity power electronics
industry to give presentations on about impedance de­ photovoltaic techniques for large­
dc microgrids (Figure 1). Prof. Josep tection and extreme capacity photovol­
generation integrated
M. Guerrero of Aalborg University, dynamic regulation taic generation inte­
Denmark, gave the talk “Microgrids in dc grids. into dc grids. grated into dc grids.
in Electric Ships and Seaports: Is Prof. Tsai­Fu Wu After the workshop,
DC Going Back to Sea?” Similarly, of the National Tsing all of the speakers
Hua University, Hsinchu City, Taiwan, and attendees joined a laboratory tour
Digital Object Identifier 10.1109/MPEL.2018.2856141
presented “Direct Digital Control of the Department of Electrical Engi­
Date of publication: 10 September 2018 for Multi­Function Converters in DC neering at Tsinghua University.

September 2018 z IEEE PowEr ElEctronIcs MagazInE 85

 by Mini Sujith

PEls student Branch chapter at asE

organizes Distinguished lecture

T
he IEEE Power Electronics
S o c i e t y (P E L S ) S t u d e n t
Branch Chapter at Amrita
School of Engineering (ASE), Benga­
luru, India, organized a Distinguished
Lecture on 16 January 2018. The lec­
ture, “Distributed Clean Energy Infra­
structure,” was presented by Prof.
Krishna Shenai, a Fellow of the
IEEE, the American Physical Soci­
ety, and the American Association
for the Advancement of Science; a FIG 1 The attendees at Prof. Krishna Shenai’s Distinguished Lecture on 16 January
senior fellow of the Computation 2018 at Amrita School of Engineering, Bengaluru, India.
Institute at the University of Chica­
go; a University Scholar at the Uni­ transmission lines and distribution distribution system drawbacks, i.e.,
versity of Illinois; and a member of system, which enables the possibil­ it is fragile, inefficient, not resilient
the Serbian Academy of Engineers. ity for transformational changes in to natural disasters, and the solu­
He has guided three dozen gra­ t he electric utilit y tions needed for its
duate student dissertations and and transportation i mproveme nt f o r
founded and managed two success­ infrastructures. He Dr. Shenai discussed the smart grid tech­
ful venture­capitalist­funded start­up gave in­depth insight dc and hybrid nology by microgrids,
companies. He has authored more into dc el ectricity, which is a local grid,
microgrids powered by
than 450 peer­reviewed archived which enhances the and its energy are
system, provides wide
distributed clean connected to the uti­
papers, three books, and ten book
chapters. Additionally, he has edit­ efficiency, and reduc­ energy sources such as lity grid.
ed 15 conference digests and holds es the overall cost. wind and solar Dr. Shenai’s talk
13 U.S. patents. Dr. Shen a i d i s ­ photovoltaic systems, included a quick note
The program began with a welcome cussed dc and hybrid which rapidly on the modern boom
speech by Dr. K. Deepa. This was fol­ microgrids powered in the field of power
contribute to human
lowed by Dr. M.R. Rashimi’s introduc­ by distributed clean electronics and hy­
energy sources such
development around brid electric vehicles
tion of the speaker, Dr. Shenai, and his
accomplishments. The guest speaker a s wind a nd s ol a r the world, especially and discussed the
started his lecture by reviewing the phot ovolt a ic s y s ­ in emerging importance and ad­
history of electricity and discussing the tems, which rapidly economies. vantage of dc energy.
power grid system across the world, cont r ibut e t o hu ­ This Distinguished
focusing on India’s grid. The focus m a n de velopment Lecture was very in­
throughout the talk was on how to around the world, especially in em ­ formative and motivational for the
generate, store, and utilize dc electric­ erging economies. L ikew ise, elec­ audience (Figure 1). The talk provid­
ity locally, from clean and sustainable tric vehicles powered with clean ed the current status and emerging
energy sources without the need of long energ y technologies have the po­ trends in this strategic technology.
tential to dramatically impact the A sense of gratitude and congratu­
Digital Object Identifier 10.1109/MPEL.2018.2851701
impending global climate changes. He lations was felt by all at the end of
Date of publication: 10 September 2018 further discussed the ac high­voltage the program.

86 IEEE PowEr ElEctronIcs MagazInE z September 2018

by Graham Town

Joint PEls/Ias/IEs new south wales

chapter Hosts Distinguished lecturers

T
he Joint IEEE Power Elec­
tronics Society, Industry Appli­
cations Society, and Industrial
Electronics Society (PELS/IAS/IES)
New South Wales Chapter kicked off
2018 with two Distinguished Lec­
tures. Prof. Udaya Madawala, on
behalf of PELS, gave the first lecture
“Grid Integration of Electric Vehicles,”
and Prof. Xinghuo Yu, representing
IAS, gave the second lecture, “Smart
Grid and Beyond” (Figure 1).
Both events were very well attend­
ed and had lively discussions af­
terward. The Joint Chapter is very
fortunate to have benef it ed from FIG 1 Distinguished Lecturer Prof. Xinghuo Yu (right) is introduced by Chapter Chair
visits by such highly distinguished Prof. Graham Town (Photo courtesy of the New South Wales PELS/IAS/IES Joint
academics and their very timely lec­ Chapter Committee.)
tures on such important topics. The
Joint Chapter Committee is planning benefit of members following recon­ chair), Associate Prof. Dylan Lu (sec­
additional high­quality events for the stitution at the Section Annual Gen­ retary), and Dr. Ha Pham (Member).
eral Meeting in late 2017. The Chapter The Joint Chapter is very well sup­
Committee now comprises Prof. Gra­ ported by IEEE Student Members,
Digital Object Identifier 10.1109/MPEL.2018.2851702
ham Town (Chapter chair), Associ­ including Pouya Jamborsalamati and
Date of publication: 10 September 2018 ate Prof. Jahangir Hossain (deputy Saad Hasan.

by Hakan Ergun

Benelux Joint chapter Hosts Eighth

Young researchers symposium

T
he IEEE Benelux Power &
Energy Society/Power Elec­
tronics Society/Industry Ap ­
plications Society (PES/PELS/IAS)
Digital Object Identifier 10.1109/MPEL.2018.2851703
Date of publication: 10 September 2018
Joint Chapter organized the eighth
Young Researchers Symposium on
24–25 May 2018 at the Université
Libre de Bruxelles (Figure 1). Thirty­
nine papers from nine universities in
the IEEE Benelux Region were pre­
sented by master’s degree and young
Ph.D. students. The symposium cov­
ered a broad range of topics related
to power electronics and power
systems. Keynote speeches were
delivered by Damien Ernst from the
University of Liége, Belgium, on
management of distribution systems

September 2018 z IEEE PowEr ElEctronIcs MagazInE 87

 Thirty-nine papers
from nine universities
in the IEEE Benelux
region were presented
by master’s degree
and young Ph.D.
students.

open to renewables and by Fabien

Meinguet, from Thales Alenia Space,
Cannes, France, on emerging chal­
FIG 1 The Young Researchers Symposium attendees at the Université Libre de Brux- lenges for power electronics in
elles. (Photo courtesy of Pierre Jacobs.) space, respectively.

by Jaydeep Saha

Joint Ias/PEls student Branch chapter

at nUs Invites guest lecturer

T
he J o i n t I E E E I n d u s t r y how more­electric and hybrid electric The Student Branch Chapter plans
Applications Society/Power architectures are emerging to lower to organize other interactive and in­
Electronics Society (IAS/ fuel consumption, reduce emissions, teresting events in the near future.
PELS) Student Branch Chapter at cut maintenance, Apart from the guest
the National University of Singapore and possibly lower lecture, the Chapter
(NUS) invited Prof. Kaushik Raja ­ vehicle cost as well. Apart from the guest has also organized
she kara, a distinguished professor The diverse audien­ lecture, the Chapter r e s e a rch ­ s h a r i n g
in the Department of Electrical and ce consisted of 35 sessions for relay­
has also organized
Computer Engineering, University of people from acade­ ing the research ex­
Houston, Texas, for a guest lecture pro­ mia and industry. research-sharing perience and knowl­
gram on 9 May 2018 [Figure 1(a)–(e)]. The Distinguished sessions for relaying edge of resea rch
Prof. Rajashekara first introduced Lecturer was very the research scholars with other
himself and then shared many of his interactive with the experience and interest ed students
experiences while working in the in­ participants both knowledge of research and staff at the uni­
dustry. His technical talk was titled during and after the versity. On 16 May
scholars with other
“Power Generation and Distribution lecture. There were a 2 018 , a r e s e a rch ­
Architectures for More Electric Air­ few interesting ques­ interested students sharing session was
craft.” Besides talking about the tions raised about and staff at the organized, and two
recent trends and challenges in the various issues in the university. researchers provi­
aerospace industry, he also explained aerospace industry, ded their research
which pro mpted a ex per ience. Pa lak
Digital Object Identifier 10.1109/MPEL.2018.2851859
healthy discussion on the possi­ Jain, a research scholar in the De­
Date of publication: 10 September 2018 ble solutions. partment of Electrical and Computer

88 IEEE PowEr ElEctronIcs MagazInE z September 2018

 (a) (b) (c)

(d) (e)

(f) (g) (h)

FIG 1 (a) Associate Prof. S.K. Panda, Student Branch advisor, introducing the guest lecturer, (b) and (c) the audience during the
guest lecture, (d) the guest lecturer making important points during the lecture, and (e) a small token of gratitude presented
by (left) Associate Prof. Panda to Guest Lecturer Prof. Kaushik Rajashekara. Research-sharing session talks by (f) Palak Jain,
(g) Prathamesh Deshpande, and (h) (second from right) Dr. Amit Kr. Singh.

Engineering, NUS, talked about her
research findings in “Digital Twins
for Power Electronics.” Prathamesh
Desh pa nde , a re s e a r c h asso ciate
at Electrical Machines and Drives
L a b , t a l k e d a b o u t his r e s e a r c h
experience in “A Matrix­Based
Isolated Bidirectional AC–DC Con­
verter with LCL Type Input Filter
for Energy Storage Application.”
On 21 May 2018, Dr. Amit Kr. Singh,
in his research­sharing s e s s i o n ,
discussed “Input Power Factor
C o n trol of Matrix­based AC–DC
Con verter.” All of these research­
sharing sessions were very interac­
tive and benefitted the speaker and
the audience alike.

September 2018 z IEEE PowEr ElEctronIcs MagazInE 89

 by Orlando Trejo

Joint IEEE EDs/cas/PEls Venezuela

chapter organizes Events

T
he Joint IEEE Electron De ­ event consisted of a series of semi­ with the presenters (Figure 1). The
vices Society/Circuits and nars related to ongoing research and informal meetings after the conclusion
Systems Society/Power Elec­ practical challenges on the topic of re­ of the workshop served as a starting
tronics Society (EDS/CAS/PELS) newable energy. Prof. Orlando Trejo point for further collaboration aimed
Venezuela Chapter hosted two events gave the first tutorial, “Dependence at integrating expertise from multiple
in 2017. On 11 July, Ramón Salazar of the Conversion Efficiency of PV fields to tackle current challenges rel­
from Global Foundries presented Cells with the Manu­ evant to renewable
the lecture “Modeling Tunnel Effect, facturing Semicon­ energy technology.
from Feynman to Wentzel–Kramers– ductor Band Gap.” The informal meetings The joint Venezu­
Brillouin (WKB) to Fowler–Nordheim.” Next, Prof. Raúl Bar­ after the conclusion of ela Chapter congrat­
This interesting lecture unambigu­ roso presented his ulated Andrea Sucre
the workshop served
ously clarified what the tunneling lecture, “Pot ent ia l González, Ph.D. de­
effective mass is that must be used of Metamaterials in as a starting point for gree candidate with
in the well­known WKB and Fowler– Solar PV Cell Fabri­ further collaboration the Solid­State Elec­
Nordheim equations as carrier tun­ cation,” followed by aimed at integrating tronics R e s e a r c h
nels between conduction and valence Prof. Víctor Guzmán expertise from Group at the Univer­
bands (band­to­band tunneling). The a nd h i s t u t o r i a l , multiple fields to sidad Simón Bolívar,
event’s ten attendees held lively dis­ “Po we r E le c t r on ­ for being awarded
tackle current
cussions with interesting questions ics i n R e n e w a b l e the 2018 Biennial Re­
and answers. E n e r g y A p pl i c a ­ challenges relevant gion 9 Outstanding
On Thursday, 7 December, the first tions.” F inally, Prof. to renewable Student Paper Award
workshop on technologies, trends, Miguel Díaz closed energy technology. by the IEEE EDS.
and prospects of renewable energy the s e s s i o n w ith For a d d i t i o n a l
projects took place at the Univer­ his pres e n t a t i o n , i n for mation, v i s it
sidad Simón Bolívar, Venezuela. The “Communication Systems for Smar t ht t p://gsiep.labc.u sb.ve /e d s ­ cas­
Grids.” The audience included 20 pro­ pel­joint­chapter­ieee/ or contact
Digital Object Identifier 10.1109/MPEL.2018.2851704
fessionals from different discipli nes Prof. Orlando Trejo at orlandotrejo@
Date of publication: 10 September 2018 who engaged in dynamic discussions ieee.org.

FIG 1 Some of the presenters and attendees at the workshop on renewable energy technology, the second of two events orga-
nized by the joint Venezuela Chapter. (Photo courtesy of Orlando Trejo.)

90 IEEE PowEr ElEctronIcs MagazInE z September 2018

by Phelipe L.S. Rodrigues
and Montiê A. Vitorino

Joint UFcg student Branch chapter

continues to Promote Power activities

S
ince its creation in 2017, the
Federal University of Campi­
na Grande (UFCG) Joint IEEE
Power Electronics Society/Industry
Applications Society (PELS/IAS) Stu­
dent Branch Chapter (SBC) contin­
ues to promote power activities. As a
result, starting with the first semester
of 2018, the SBC has developed many
power­related activities for 2018.
On 21 February, a technical tour
of Edson Mororó Moura Institute of
FIG 1 Prof. Joachim Holtz with students attending his lecture “Energy Efficiency of
Technology, Belo Jardim, Pernambuco, Medium Voltage Drives.” (Photo courtesy of UFCG PELS/IAS SBC.)
Brazil, was arranged. The tour provid­
ed a great networking opportunity
for Chapter volunteers and profes­ ■■Phelipe Rodrigues—chapter chair Drives” to UFCG students. Besides
sionals from the industry. Given the ■■Rodrigo Lacerda—vice­chair educating the students, it also pre­
success of the first workshop, “Intro­ ■■Amanda Monteiro—secretary sented a good opportunity to boost
duction to Photovoltaic Systems,” ■■Mateus Lucena—treasurer the number of PELS and IAS UFCG
a second edition was organized on ■■Nayara Ingrid Santos—marketing student members as well as to pro ­
24 February. coordinator mot e t he I EEE . T he event wa s a
On 1 March, Prof. Joa chim Holtz, ■■José Djair da Silva—workshops great success and had 67 attendees
Life Fellow of the IEEE and professor coordinator. (27 IEEE Members).
emeritus of Wuppertal University, Continuing the program, Prof. From 31 May to 2 June, the I E E E
Germany, presented a talk, “Energy Walmir de Freitas Brazilian National
Efficiency of Medium Voltage Dri ­ Filho, with the Uni­ Meeting of Branch­
ves” (Figure 1). This lect u re was versity of Campinas, es and Young Pro ­
sponsored by the IEEE Industrial Brazil, was invited The tour provided a fessiona l s t o o k
Electronics Society and was orga­ o n 17 M a y t o g i v e great networking place in C a m p i n a
nized in partnership with the UFCG the lecture “Modern opportunity for G r a n d e , Paraiba,
PELS/IAS SBC and the Joint Chap­ Electric Power Dis­ Chapter volunteers Brazil. It was host­
ter Power Engineering Society/IAS/ tribution Systems: and professionals ed j o i n t l y by the
PELS Northeast. Future Po tential.” Instituto F e d e r a l
from the industry.
A new SBC board was ceremoni­ On 21 May, volu n­ da Paraiba Student
ously announced on 19 April. The teers from the SBC Bra nch (SB) a n d
positions were filled as follows: promoted an activity the UFCG SB. The
called “IEEE coffIEEE.” In this activ­ Joint UFCG SBC also conducted a
Digital Object Identifier 10.1109/MPEL.2018.2852018
ity, the group presented “Laboratory work shop, “Introduction to Photo­
Date of publication: 10 September 2018 of Industrial Electronics and Machine voltaic Systems.”

September 2018 z IEEE PowEr ElEctronIcs MagazInE 91

 by Bryce Hesterman

PEls seattle chapter Hosts

Distinguished lecturer

D
istinguished Lecturer Dr. a more in­depth dis­ finished with an ex­
Krishna Shenai gave two pre­ cussion of gallium The presentation cellent discussion of
sentations, “Wide­Bandgap nitride and sili con provided a great the fa ilu re modes
Power Devices” at the Bothell cam­ carbide devices (Fig­ of w ide ­ b a nd g a p
introduction to power
pus of the University of Washington, ure 1). The presen­ sem iconductor s.
Seattle, on 2 April 2018 and “Field tation prov ided a
electronics for the Dr. Shenai has had a
Reliability of High­Density Power great introduction students along with long career in both
Converters” on 3 April 2018 at Micro­ to power electron­ valuable information industry and acade­
soft in Redmond, Washington. ics for the students for practicing mia, and his descrip­
The first presentation gave an over­ along with valuable engineers. tion of the h istor y
view of power electronics switches information for prac­ of w ide ­ b a nd g a p
and their history and finished with ticing engineers. The semiconductors and
second presentation power supply fail­
Digital Object Identifier 10.1109/MPEL.2018.2852038
started with a general discussion ure modes was both enlightening
Date of publication: 10 September 2018 of power supply failure modes and and entertaining.

FIG 1 (Standing, far right) Dr. Krishna Shenai presents a Distinguished Lecture for members of the PELS Seattle Chapter. (Photo
courtesy of Bob Gudgel.)

92 IEEE PowEr ElEctronIcs MagazInE z September 2018

by Ryuji Iijima, Yoshikazu Kuwabara, Daiki Yamaguchi,
Yuta Yanagisawa, Yoshihiro Miwa, Hidemine Obara,
and Yongheng Yang

students and Young Engineers Meeting

Held at IPEc 2018-EccE asia

T
he International Power Elec­
tronics Conference (IPEC),
one of the IEEE Energy Con­
version Congress and Exposition
(ECCE) Asia Series conferences,
sponsored by the Institute of Elec­
trical Engineers of Japan (IEEJ) and
cosponsored by the IEEE Power
Electronics Society (PELS) and the
IEEE Industry Applications Society
(IAS), held its 8th IPEC (IPEC­Niiga­
ta 2018) from 20 to 24 May 2018 in
Niigata, Japan. As it is the home­
town of Prof. Isao Takahashi, who is FIG 1 Power electronics Ph.D. degree students in Japan were the main organizers of
very well known in the power elec­ the Students and Young Engineers Meeting, cosponsored by PELS and IAS.
tronics field, this year’s IPEC­ECCE
Asia was truly memorable.
As is tradition, the PELS Young
Professionals (YP) Committee pro­
moted the YP event held at IPEC­Ni­
igata, where the IPEC Steering Com­
mittee, IAS, and the Ph.D. candidates
of Power Electronics in Japan (PPEJ)
generously supported the event (Fig­
ure 1). The very successful gathering,
dubbed the Students and Young Engi­
neers Meeting, was held at two differ­
ent times, one during the daytime and
the other in the evening.
The day time event bega n with
opening remarks from Ryuji Iijima, a
representative of PPEJ and a Ph.D. de­
FIG 2 The evening meeting was held in a traditional Japanese pub where the attend-
gree student at the University of Tsu­
ees enjoyed networking.
kuba, and Prof. Yongheng Yang, PELS
YP Committee international strategy
chair and associate professor at Aal­ over the world. The students’ research their research environments and tech­
borg University. Yuta Yanagisawa, a environments and lifestyles were also nical topics. More than 110 attendees
member of PPEJ and a Ph.D. degree shared with each other. In particu­ attended the event and enjoyed dis­
student at Osaka University, present­ lar, the attendees were surprised to cussions over a light Japanese lunch.
ed survey results about the research learn that some Ph.D. degree students The daytime meeting concluded with
lives of Ph.D. degree students from all work more than 12 h/day in laborato­ remarks from Prof. Katherine A. Kim
ries. The next event was “Laboratory of Ulsan National Institute of Sci­
Digital Object Identifier 10.1109/MPEL.2018.2852438
Showcases,” in which 27 poster pre­ ence and Technology, who is also a
Date of publication: 10 September 2018 senters from far and wide introduced PELS member­at­large and PELS YP

September 2018 z IEEE PowEr ElEctronIcs MagazInE 93

FIG 3 More than 150 students, young engineers, young professors, and distinguished professors attended the YP event.

Committee advisory board member.
Other professors that commented in­
clude Prof. Po­tai Cheng of National
Tsing Hua University, who is an IAS
executive board member­at­large, and
Prof. Toshihisa Shimizu of Tokyo Met­
ropolitan University, an IEEJ organiz­
ing committee chair of IPEC 2018.
After the IPEC 2018 welcome re­
ception, the evening meeting took
place in a n izakaya, a traditional
Japanese pub. The attendees formed
new friendships with professors and
students alike and enjoyed traditional
Ja pa ne s e mea l s a nd d r i n k s l i ke
sake (Figure 2).
T he Students a nd You ng En­
gi neers Meeting was a great suc­
cess (Figure 3). We appreciate all the
attendees, the IPEC 2018 Steering
Committee, PELS, and IAS for their
strong support and cooperation. We
especially want to thank the event’s
steering committee members, Dr.
Yoshiya Ohnuma, Prof. Takaharu
Takeshita, Prof. Yasuyuki Nishi­
da, Prof. Nor iy uki K imura (IPEC
2018 Steering Committee), Dr. Péter
Magyar (IAS), Hayato Higa, Hiroyasu
Kobayashi, Kazuma Suzuki, Kei Ni­
shikawa, Keita Furukawa, Kenichi
Kondo, Kenichiro Saito, Prof. Kimi­
hiro Nanamori, Koroku Nishizawa,
Nagisa Takaoka, Ryota Inoue, Shohei
Komeda, Dr. Shota Kimura, Shunsuke
Takuma, Takuya Shijo, and Prof. To­
moyuki Mannen (PPEJ). We hope
that the event was an unforgettable
experience for all students, young en­
gineers, and professors. We look for­
ward to seeing the attendees again at
future conferences.

by Johan Enslin, Somasundaram Essakiappan,

and Madhav Manjrekar

IEEE 9th International symposium on

Power Electronics for Distributed
generation systems

I
t was our honor to welcome 178
attendees to the IEEE 9th Inter­
national Symposium on Power
Electronics for Distributed Genera­
tion Systems (PEDG) in Charlotte,
North Carolina, 25–29 June. Dubbed
the New Energy Capital of North
Digital Object Identifier 10.1109/MPEL.2018.2854640
Date of publication: 10 September 2018
America, Charlotte was the perfect
host for the 2018 PEDG symposium
because of the area’s dominant
power industry and research horse­
power throughout North Carolina in
the areas of clean technology and
power generation, transmission, and
distribution. PEDG brought together
power electronic p r o f e s s i o n a l s ,
focused on power electronics for dis­
tributed power, and discussed the
role of power electronics on distrib­
uted power systems (Figure 1). This
year, the majority of papers and pre­
sentations were geared toward ener­
gy storage and microgrids. Each
year, the PEDG symposium is made
possible by the tireless efforts of the
volunteer organizing committee and
the sponsorship of the IEEE Power

94 IEEE PowEr ElEctronIcs MagazInE z September 2018

FIG 1 Attendees listen to welcome and keynote address presented by Sam Holeman, vice president of transmission system plan-
ning and operations for Duke Energy.
Electronics Society (PELS).The staff
and faculty of the Energy Production
and Infrastructure Center (EPIC) at
the University of North Carolina
(UNC) Charlotte hosted this year’s
event, and their dedication and ex ­
pertise helped make it a success.
This year’s symposium program
highlighted the role that power elec­
tronics technology plays in the power
systems society by enabling clean
and sustainable energy distributed
resources. Key papers stressed the
importance of grid­interconnection
requirements and stability concerns,
hardware­in­the­loop (HIL) simula­
tions, and wide­bandgap power elec­
tronic devices. There were also some
unique features of this year’s event,
such as a technical program that includ­
ed seven handpicked tutorials that were
attended by roughly 80 attendees, a well­
received industry panel session, three
invited sessions, 20 regular paper ses­
sions in three parallel tracks, a poster
session, and daily keynote speeches.
The welcome and key not e ad­
dress was presented by Sam Hole­
man, vice president of transmission
system planning and operations for
Duke Energy, and Dr. Georgios De­
metriades, group research manager
with ABB, delivered the keynote ad­
dress Tuesday morning. On Wednes­
day, Tom Key from the Electric Power
Research Institute, Inc. (EPRI) and
Taku Takaku, a senior field applica­
tions engineer at Fuji Electric Co.,
Ltd., from Fuji, Japan, gave the daily
keynote presentations, and on Thurs­
day, Peter Lürkens from Germany’s
RWTH Aachen University and Om
Nayak from Nayak Corporation, who
discussed the topic “Real­Time Digi­
tal Simulator,” were the daily key­
note presenters. There were also 12
invited speakers from industry and
academia, including Randy Collins
from Clemson University, South Car­
olina, who gave an entertaining final
awards lunch talk on the history of the
sag generator.
The technical program at PEDG
2018 contained 158 abstracts, of which
approximately 60% were from coun­
tries other than the United States, the
host country. This shows the expand­
ing international interest in and scope
of PEDG. There was a great deal of
diversity of technical topics as well,
with a near­equal distribution among
the symposium tracks: power electro­
nics for sustainable sources, energy
storage systems, and distributed gen­
eration interacting with power trans­
mission and distribution systems.
Overall, 97 papers were presented at
the symposium as oral presentations
and posters and will be published by
the symposium’s technical committee.
The symposium also prov ided
ample opportunities for networking
and social interactions throughout
the PEDG program, including during
the technical tour to the EPIC Center
at UNC Charlotte on Mond ay eve­
ning, the banquet at the NASCAR
Hall of Fame on Tuesday evening, and
an interactive poster, career develop­
ment, which was a young professionals’
social event on Wednesday evening.
These events were well attended, and
September 2018
the participants had a chance to race
each other in the NASCAR simulator on
Tuesday evening.
This year’s exhibit was well support­
ed by PEDG sponsors and smoothly
integrated with the program, social
events, breaks, and lunches. The inter­
active exhibit booths that included
demonstrations on HIL modeling and
analysis were especially instructive.
Our deepest gratitude goes to the
local organizing and steering com­
mittees for their dedicated efforts in
making PEDG 2018 a success. Special
thanks also go to all the authors, pan­
elists, reviewers, session chairs, and
attendees. As we all know, these con­
ferences would be financially impos­
sible without our dedicated sponsors.
In this regard, we thank the following
supporters for making this sympo­
sium possible: Duke Energy, ABB,
Fuji Electric, EPRI, Nayak/RTDS
Technologies, UNC Charlotte EPIC,
Clemson University, the FREEDM
Center, Framaton, Plexim, Typhoon
HIL, Inc., PowerAmerica, E4­Carolinas,
IEEE Charlotte Section, and Atom
Power. Finally, we would like to thank
IEEE PELS as the symposium sponsor.
Of the 195 registrants, there were
roughly 120 from academia and 75
from industry; we hope they all had an
enjoyable visit and a fruitful sympo­
sium. At the awards luncheon, Jinjun
Liu gave the participants a glimpse of
the exciting location for PEDG 2019—
Xi’an, China. We hope to see everyone
there in June 2019.
z IEEE PowEr ElEctronIcs MagazInE 95
Digital Object Identifier 10.1109/MPEL.2018.2853379
 Event Calendar

2018 10–13 December

Singapore
13–14 september
Fourth Southern Power Electronics Conference (SPEC)
Helsinki, Finland
IEEE Ninth International Symposium on Sensorless Control 18–21 December
for Electrical Drives (SLED) Chennai, India
IEEE International Conference on Power Electronics,
17–21 september
Drives, and Energy Systems (PEDES)
Riga, Latvia
20th European Conference on Power Electronics 20–22 December
and Applications (EPE’18 ECCE Europe) Bern, Switzerland
Second European Conference on Electrical Engineering and
23–27 september
Computer Science (EECS)
Portland, Oregon, United States
IEEE Energy Conversion Congress and Exposition (ECCE)

7–11 october
2019
Turino, Italy 17–21 March
IEEE International Telecommunications Energy Anaheim, California, United States
Conference (INTELEC) IEEE Applied Power Electronics Conference
and Exposition (APEC)
17–19 october
Hsinchu, Taiwan 24–26 april
International Workshop on Power Supply on Chip (PwrSoC) Toulouse, France
IEEE International Workshop on Integrated Power Packaging
24–26 october (IWIPP)
Cholula, Puebla, Mexico
14th International Conference on Power Electronics (CIEP) 11–15 May
San Diego, California, United States
31 october–2 november IEEE International Electric Machines and Drives
Atlanta, Georgia, United States Conference (IEMDC)
IEEE Sixth Workshop on Wide Bandgap Power Devices and
Applications (WiPDA) 27–31 May
Busan, South Korea
1–3 november Tenth International Conference on Power Electronics and the
Banja Luka, Bosnia and Herzegovina IEEE Energy Conversion Congress and Exposition, Asia
International Symposium on Industrial Electronics (INDEL) (ICPE 2019–ECCE Asia)

4–7 november 25–29 June

Shenzhen, China Svalbard
IEEE International Power Electronics and Application IEEE Future of Electronic Power Processing and Conversion
Conference and Exposition (PEAC) (FEPPCON)

7–9 november 6–9 august

Nottingham, United Kingdom
IEEE International Conference on Electrical Systems for Aircraft,
Railway, Ship Propulsion, and Road Vehicles and the International
Transportation Electrification Conference (ESARS-ITEC)
12–14 november
Charleston, South Carolina, United States
IEEE Electronic Power Grid (eGrid)
Washington, D.C., United States
IEEE Electric Ship Technologies Symposium (ESTS)
2–4 september
Istanbul, Turkey
International Aegean Conference on Electrical Machines
and Power Electronics (ACEMP) and the 2019 International
Conference on Optimization of Electrical and Electronic
Equipment (OPTIM)

Digital Object Identifier 10.1109/MPEL.2018.2851708

Date of publication: 10 September 2018

98 IEEE PowEr ElEctronIcs MagazInE z September 2018

The IEEE Workshop on Wide Bandgap Power Devices & Applications (WiPDA) provides a forum for device
scientists, circuit designers, & application engineers from the Power Electronics & Electron Devices Societies to
share technology updates, research findings, experience & potential applications.
TOPICS OF INTEREST:
 Heteroepitaxial & Bulk Materials Growth
 Gate Dielectrics & Surface Passivation
 Device Structures & Fabrication Techniques
 Device Characterization & Modeling
 Very-High Efficiency Or Compact Converters
 Safe Operating Areas Of Wide Bandgap Devices,
Including Short Circuit, Spike, &Transient Tolerance
 Harsh Environment (High Temperature) Operation
& Reliability
 Packaging Power Modules & ICs
 Hard-Switched & Soft-Switched Application Analysis
 Gate Drive & Other Auxiliary Circuits
 High-Performance Passive Components
 Applications in Renewable Energy & Energy
Storage, Transportation, Industrial Drives, &
Grid Power Systems
 Wide Band Gap System Design Philosophies &
Strategies
KEY DATES:
 Two Page Abstract: June 15, 2018
 Notification of Acceptance: July 20, 2018
 Final Paper Submission: August 24, 2018
 Technical & Dialogue Sessions: November 1st-2nd, 2018.
ORGANIZING COMMITTEE:
 Maryam Saeedifard, General Chair, Georgia Tech
 Victor Veliadis, Vice-Chair, NC State/Power America
 Eric Persson, Technical Program Co-Chair, Infineon
 Mahshid Amirabadi, Technical Program Co-Chair,
Northeastern University
 Khurram Afridi, Technical Program Co-Chair, University of
Colorado - Boulder
 Babak Parkhideh, Treasurer, North Carolina - Charlotte,
 Karthik Kandasamy, Local Organizing Committee, Georgia Tech
 Suman Debnath, Tutorials Co-Chair, Oak Ridge National Lab
 Jiangchao Qin, Tutorials Co-Chair, Arizona State University
 Mark Scott, Publicity Chair, Miami University
 Lingxiao Xue, Website Chair, Navitas Semiconductor
 Stephen Oliver, PSMA Rep., Navitas Semiconductor

All presented papers will be included in the conference proceedings and

submitted to the databases of IEEExplore.
PARTICIPATION OPPORTUNITIES
 Tutorials: Educational tutorials on state-of-the-art device technology and applications are welcome. Four tutorials will be
offered on the afternoon of October 31th.
 Keynote Sessions: Two keynote sessions will be held on November 1st and 2nd, where leading experts from academia,
industry, and research institutes will be invited to share their insights on technology developments and future trends.
 Panel Session: Leading experts from federal agencies, industry, and academia will be invited to discuss pressing technical
issues at a panel session on November 1st.
 Exhibition & Sponsorships: A limited number of booths and corporate sponsorships will be available.

Digital Object Identifier 10.1109/MPEL.2018.2852083

White Hot (continued from page 104)
provide useful information through
social media channels without cross­
ing that line.
For organizations like the IEEE,
its Societies, and conferences, social
media can be a valuable way to keep
people informed. I think you’ll find
that most Societies and many confer­
ences make use of social media like
Twitter, LinkedIn, and Facebook to
promote their conferences, work­
shops, and webinars. I think, in gen­
eral, the IEEE has done a pretty good
job of providing useful information
without crossing the line and becom­
ing annoying. With these platforms
though, I do have to wonder how
many people they are reaching. I sup­
pose that even if it is not thousands
of people, it is still a good way for
IEEE event organizers to get their
message out.
Again, while not exactly social
media, Societies often used their web­
sites to host educational webinars
and recordings of the content of webi­
nars and other educational videos.
These can be a useful resource for
IEEE Members to keep up with the
latest developments in technology.
The IEEE itself has IEEE.tv. While I
have, from time to time, looked at
and browsed the offerings on IEEE.tv,
in reality, it is rather disappointing to
me to see that for an organization as
large and as technologically capable
as the IEEE, the offerings there seem
rather meager. This is an area where I
think the IEEE could do a lot better
in providing educational offerings
that would be of interest to all Mem­
bers, but, perhaps, especially young
professionals who are just starting
out and trying to learn all aspects of
their profession.
I would like to mention some
social media discussion groups that
are of interest to members of the
IEEE Power Electronics Society
(PELS). The first are the Power Sup­
ply Design Center groups run and
managed by Ray Ridley. Ray has one
group on LinkedIn and one group on
100 IEEE PowEr ElEctronIcs MagazInE
Facebook. Ray started with the Pow­ your definition of a coupled inductor,
er Supply Design Center group on then the magnetic element of the fly­
LinkedIn but found the LinkedIn back converter is not a coupled induc­
group format rather limiting. For exam­ tor. Others, though, looked at the mag­
ple, the LinkedIn group format doesn’t netic element of a flyback converter as
allow subposts or the two or more windings
easy posting of mul­ on a common core
tiple diagrams, such For organizations like that is used to store
a s schemat ics o r the IEEE, its Societies, energy and, thus, is a
waveforms, whereas coupled inductor. In
and conferences,
Facebook allows both the end, there was no
of these. Ray has done social media can be a agreement between
an excellent job in cre­ valuable way to keep the two points of view.
ating these groups people informed. So what do we call the
and enabling discus­ magnetic element in
sion on a wide range a flyback converter?
of power supply design­related top­ Perhaps we should just simply call it a
ics. You must ask Ray for permission flyback inductor.
to join his groups and he does an Another discussion was started by
excellent job of keeping the groups those who claim that “Bode is dead.”
spam free. The people making this claim work
I would also like to point out the mainly in the design and analysis of
PELS group on LinkedIn. I am a mod­ power distribution networks (PDNs).
erator of that group, and we have These people are mainly concerned
more than 15,000 members. I am dili­ with the impedance of the distribu­
gent in keeping the group spam­free. tion network. For example, they work
The only commercial postings that to keep the voltage on a processor
are allowed relate to training and edu­ chip within bounds even as the cur­
cational opportunities of interest to rent is changing by 100 A or more in
the group members, such as commer­ only a few nanoseconds.
cial power supply design seminars. The power converters providing
Recently, there have been some energy to these distribution networks
interesting discussions in this group. are, to the PDN engineers, often just
One discussion was started by a post­ black boxes. They don’t have access to
ing that said, “Flyback transformers the internals of these converters. In
are not coupled inductors.” The discus­ some cases, they might be integrated
sion on this topic became surprisingly linear regulators with no way to make
vigorous and even heated. We can all any measurements of the actual regula­
agree that the magnetic device in the tor circuit. For these people, Bode plots
flyback converter is not a transformer are not useful tools. They are con­
because power is not transferred cerned with the impedance of the
directly from the primary to the sec­ power distribution network, which
ondary with only incidental energy needs to be low and predictable across
storage in the core. Discussion of a wide bandwidth.
whether or not the flyback magnetic is However, for those of us who
a coupled inductor was rather interest­ design the black boxes, Bode plots
ing. The claims that the flyback mag­ are indispensable tools. There is no
netic element is not a coupled inductor other single tool that gives us such a
came from the point of view that a cou­ simple, clear answer on the stability
pled inductor couples voltage between of a power converter. From a Bode
two parts of a circuit while storing plot we can easily read off the gain
energy, generally with current flowing and phase margins of our design and
in all winding simultaneously. If this is know if our design is good or not.
z September 2018
 Also discussed were the relative
merits of Bode plots versus Nyquist
plots. For some, a Nyquist plot pro­
vides a more detailed answer on stabil­
ity in questionable or marginal cases.
However, it was noted that the linear
scales of the Nyquist plot can make it
very difficult to get a good assessment
of stability margins.
It was also pointed out in this discus­
sion that a Bode plot is a reflection of a
small signal analysis. Power convert­
ers, when driven by large transients of
output load or input voltage, can
become nonlinear and a small signal
analysis no longer applies. For exam­
ple, an operational amplifier in a feed­
back error amplifier can saturate and
no longer be responsive to the input.
In this case, the control loop is essen­
tially nonfunctional and no longer lin­
ear. One must check for these cases, in
addition to Bode plots, to ensure the
stability and proper operation of
power converters under all conditions.
You do not have to be a member of
the PELS or even the IEEE to join the
IEEE PELS LinkedIn group. If you
use LinkedIn, I encourage you to join
this group and start asking questions
and contributing to the discussions.
In summary, I believe social media
is a useful tool for engineering pro­
fessionals. It provides a means to
connect to colleagues all over the
world, to keep up with the latest de ­
velopments, and to ask questions
and get help with the problems we
face in our everyday work. There are
problems, such as discussion groups
being overrun by spam to the point
of uselessness. And we always have
to balance our desire for connection
and information with the need to
keep much of our personal infor­
mation private. Overall though, I
find the positives outweigh the neg­
atives and that social media does
help me succeed in my profession­
al endeavors.
September 2018
About the Author
Robert V. White (bob.white@ieee
.org) has over 30 years of industry
experience as a power electronics
engineer. He has worked in product
design, systems and applications engi­
neering, and technology development.
He has been an active volunteer with
the IEEE Power Electronics Society,
serving several years on the Adminis­
trative Committee, two terms as tech­
nical vice president, and as a Chapter
chair. He earned a B.S.E.E. degree
from the Massachusetts Institute of
Technology and an M.S.E.E. degree
from Worcester Polytechnic Institute.
He is currently pursuing a Ph.D.
degree in power electronics at the Uni­
versity of Colorado, Boulder. Present­
ly, he is the chief engineer of Embed­
ded Power Labs, a power electronics
consulting company. He is a Fellow of
the IEEE.
z IEEE PowEr ElEctronIcs MagazInE 101
 IEEE PEAC’2018
The 2nd IEEE International Power Electronics and Application Conference and Exposition
November 4–7, 2018
Honorary Chair
Fred C. Lee, Virginia Tech.
General Chairs
Dehong Xu, Zhejiang Univ.
Alan Mantooth, Univ. of Arkansas
Technical Program Chairs
Hao Ma, Zhejiang Univ.
Frede Blaabjerg, Aalborg Univ.
Toshihisa Shimizu, Tokyo Metropolitan Univ.
Jaeho Choi, Chungbuk National Univ.
Yen Shin Lai, National Taipei Tech.
Michael Chi Kong Tse, Hong Kong Polytechnic Univ.
International Steering Committee Chairs
Don Tan, Northrop Grumman
Braham Ferreira, Delft Univ. of Tech.
Dianguo Xu, Harbin Inst. of Tech.
Hirofumi Akagi, Tokyo Inst. of Tech.
National Steering Committee Chairs
An Luo, Hunan Univ.
Zhengming Zhao, Tsinghua Univ.
Xiangning He, Zhejiang Univ.
Invited Session Committee Chair
Jinjun Liu, Xi’an Jiaotong Univ.
Tutorial Committee Chairs
Xinbo Ruan, Nanjing Univ. of Aeronautics and Astro-
nautics
Sewan Choi, Seoul National Univ. of Sci. and Tech.
Yunwei Li, Univ. of Alberta
Industry Session Committee Chairs
Jinfa Zhang, Delta Electronics
Stephen Oliver, Navitas Semiconductor
Tatsuhiko Fujihira, Fuji Electric
Tianhao Tang, Shanghai Maritime Univ.
Publications Committee Chair
Bo Zhang, South China Univ. of Tech.
Sponsored by
China Power Supply Society
IEEE Power Electronics Society
Technically sponsored by
Power Sources Manufacturers Association
Korean Institute of Power Electronics
IEEJ Industry Applications Society
National Natural Science Foundation of China
Digital Object Identifier 10.1109/MPEL.2018.2855811
Shenzhen, China
www.peac-conf.org
IEEE International Power Electronics and Application Conference and Exposition
(PEAC) is an international conference for presentation and discussion of the state-of-the-
art in power electronics, energy conversion and its applications. The IEEE PEAC’2018 is
the second meeting of PEAC, which will be held in Shenzhen, China, during November
4-7, 2018.
The worldwide power electronic industry, research, and academia are cordially invited to
participate in an array of presentations, tutorials, exhibitions and social activities for the
advancement of science, technology, engineering education, and fellowship.
◼ Highlights of PEAC2018
▪ 650+ Attendees expected ▪ 8 Keynote Speeches by world-renowned experts
▪ 500+ Papers will be presented ▪ 10 Tutorials on important topics in power electronics
▪ 52 Technical Sessions ▪ 2 Dialogue Sessions ▪ 10 Industry Sessions
▪ 30+ Exhibitors showcase their latest products and technologies
▪ 2 Social Events ensure you in-depth communication with peers
◼ Keynote Speakers
Prof. Fred C. Lee, Virginia Tech., IEEE Fellow
Prof. Alan Mantooth, University of Arkansas, IEEE Fellow, President of IEEE PELS
Prof. Frede Blaabjerg, Aalborg University, IEEE Fellow
Prof. David Perreault, Massachusetts Institute of Technology, IEEE Fellow
Prof. Hirofumi Akagi, Tokyo Institute of Technology, IEEE Fellow
Dr. Gourab Majumdar, Senior Fellow of Mitsubishi Electric Corporation
Dr. Tatsuhiko Fujihira, CTO for Electronic Devices Fuji Electric Co., Ltd.
Prof. Sixiong Chen, Vice President of Xiamen Kehua Hengsheng Co.,Ltd
◼ About Shenzhen
Shenzhen is a coastal city in South China, situated immediately north of Hong Kong. The
city has a subtropical marine climate with plenty of sunshine and is rich in tropical fruit.
It is a popular tourist destination renowned for pleasant sea-shore, well-preserved forests,
and various theme parks such as Dameisha Beach, Xichong Beach, China Folk Culture
Village, Window of the World, Ecoventure Valley and etc.
Besides joining the activities of the conference please plan your time to visit the city and
enjoy the culture and local food.
Early registration pricing ends on Oct. 10, 2018.
Find more information and Register Now on www.peac-conf.org
 Advertisers Index

The Advertisers Index contained in this issue is compiled as a service to our readers and advertisers: the publisher is not lia­
ble for errors or omissions, although every effort is made to ensure its accuracy. Be sure to let our advertisers know you
found them through IEEE Power Electronics Magazine.

sAles contAct PAge Advertiser Url PHone

Walter Chalupa Associates
13 Acopian Technical Company www.acopian.com +1 800 523 9478
Walter Chalupa
National Sales Manager 6 AGILE Magnetics www.agilemagco.com +1 800 805 8991
Kerstin Chalupa
15 Applied Power Systems, Inc. www.appliedps.com -1 516 935 2230
International Sales Manager
Telephone: +1 973 835 7015 101 Bs&T Thyristor Pulse Technology www.powerlosstester.de
chalupapels@aol.com
CVR 4 Chroma Systems Solutions www.chromausa.com +1 949 600 6400

71, 73 Clemson University College www.clemson.edu/ece

of Engineering, Computing and
Applied Science

5 Coilcraft www.coilcraft.com/Class-D

20 CKE/Dean Technology www.deantechnology.com

7 dSpace www.dspace.com

3 GMW Associates www.gmw.com

10 ICE Components, Inc. www.icecomponents.com

17 Indium Corporation www.indium.com/IEEP

CVR 2 Infineon Technologies www.infineon.com/robotics

14,77 ITG Electronics www.ITG-Electronics.com +1 914 806 8063

79 Kendeil S.r.l. www.kendeil.com +39 0331 786966

67 Magna Power Electronics www.magna-power.com +1 908 237 2200

77 Magnetic Metals Corp. www.MagneticMetals.com +1 888 892 8392

22 Mersen ep.mersen.com

24 Micrometals Alloy Powder www.micrometalsarnoldpowdercores.com

Core Division

23 Omicron Lab www.omicron-lab.com

16 Payton Planar Magnetics www.PaytonGroup.com +1 954 428 3326

14 PEM Ltd. www.pemuk.com +44 0 115 946 9657

CVR 3 Plexim GmbH www.plexim.com

9 Power Integrations www.power.com

11 Powersim, Inc. www.powersimtech.com/pels2018 +1 301 841 7445

19 PREEN AC Power Corp. www.acpower.net +1 949 988 7799

22 SIBA GmbH www.siba.de +49 23 06 70 01 0

25 Teledyne Lecroy teledynelecroy.com/static-

dynamic-complete

65 Triad Magnetics www.triadmagnetics.com +1 951 277 0757

Digital Object Identifier 10.1109/MPEL.2017.2770683

September 2018 z IEEE PowEr ElEctronIcs MagazInE 103

 White Hot
by Robert V. White

Power Electronics and

social Media

H
ere in the United States, When using social media, I have IEEE Smart Grid LinkedIn group of
social media has been in the made it my policy to separate my per­ which I am a member. I found the ratio
news quite a bit in the last sonal and professional lives. In my of spam to useful content to be rough­
year. Stories have covered privacy personal life, I main­ ly 50:1. I will discuss
issues, data breaches, questionable or ly use Facebook (yes, a couple of excep­
improper use of personal data, and I know that tags me I look for the ability to tions to this later on.
attempts by foreign agents to influ­ as an old guy) to keep I also use You­
see updates from oth-
ence the last presidential election. up with friends and Tube from time to
These stories have led me to think relatives. I also use ers, post my own time for professional
about the role of social media in the Facebook groups to updates, and partici- purposes. Mainly, I
engineering profession, particularly keep up with news pate in discussions look for instructional
power electronics. and activities in my that broaden and videos from equip­
First, what is social media? To me, local area. Like many deepen my under- ment or component
a social media platform attempts to people, I also use You­ manufacturers that
standing of both peo-
connect people, create a community, Tube for “how­to” vid­ either show me how
and foster discussion. The most com­ eos. For example, I ple and knowledge to use equipment or
mon platforms are Facebook, Linke­ will soon be chang­ in general. offer me information
dIn, Twitter, Instagram, YouTube, ing the battery in my on the latest compo­
and Snapchat. All of these platforms wife’s iPhone be ­ nents and devices. I
allow users to post content, such as cause I learned how from a YouTube also look for videos from other profes­
text, photos, or videos, and solicit video. And that is it. I don’t use Twit­ sionals that are sharing their expertise.
and receive feedback and comments. ter, Snapchat, Instagram, or anything For example, Shmuel (Sam) Ben­Yaa­
Somewhat related, but not exactly else because I haven’t seen the value. kov of the Ben­Gurion University, has
social media, are platforms like P r ofe s s ion a l ly, I m a i n ly u s e been posting excellent videos on va­
IEEE.tv, which posts content like vid­ LinkedIn. I like being able to connect rious topics in power electronics. I
eos but doesn’t really encourage the with and keep up with professional would encourage you to check out his
formation of the community. colleagues from all stages of my YouTube channel to see his great work.
What do I look for in social media? career and from all over the world. As This is how I use social media in
I look for the ability to connect with an independent consultant, I also my personal and professional life. But
friends, relatives, and colleagues from use LinkedIn as a form of an online how should companies and organiza­
all parts of my life and career. I look resume. This allows people who are tions use social media? It seems to me
for the ability to see updates from oth­ searching for power electronics con­ that the main purpose of social media
ers, post my own updates, and partici­ sultants to easily find me. for companies is advertising. The prob­
pate in discussions that broaden and One of LinkedIn’s features that lem here is that it’s very easy for adver­
deepen my understanding of both could be extremely useful is discus­ tising to cross the line and become
people and knowledge in general. sion groups. However, with few excep­ annoying spam. I have not found many
tions, I have found them so overrun good examples of companies that
Digital Object Identifier 10.1109/MPEL.2018.2849650
with spam that they are useless. For
Date of publication: 10 September 2018 example, I did a quick check of the (continued on page 100)

104 IEEE PowEr ElEctronIcs MagazInE z September 2018

 electrical engineering soft ware

FROM OFFLINE SIMULATION

TO REAL-TIME TESTING

PLECS SOFTWARE RT BOX PLATFORM

Fast simulation of complex systems Hardware-in-the-loop (HIL)

Comprehensive component library Rapid control prototyping
Analysis tools Full integration with PLECS
Standalone and Simulink versions Deploy large models on multiple boxes
Model-based code generation Competitively priced

n at
Get more informatio
w w w.plexim.com
 Simulate AC Line Conditions
Measure Critical Product Characteristics

NEW

5KHz
OPTION

Model 61509 - 6kVA

New Additions to the 61500 Series

Compact Single- or Three-Phase
Programmable AC Power Sources
Chroma’s new compact programmable AC sources are programmable to 350VL-N
and deliver single- or three-phase output without derating under SCIP program
control. Frequency includes DC and 2kHz with 5kHz option. Models generate pure
sine waveform output with distortions levels <0.3% at 50/60Hz.
3kVA | 4.5kVA | 6kVA
Voltage range: 0-175V/0-350V/Auto
Frequency: DC, 15Hz-2KHz (5KHz opt.)
Single- or three-phase output selectable
Distortion Waveform, Harmonics, and Interharmonics

To learn more about power conversion testing, visit chromausa.com

Testing on-grid devices? Ask about our Regenerative Grid Simulators

Full 4 quadrant, regenerative, grid simulation with advanced features
for compliance, safety and product verification testing - up to 300kVA

chromausa.com | 949-600-6400 | sales@chromausa.com

© 2018 Chroma Systems Solutions, Inc. All rights reserved.