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OB2263

Current Mode PWM ControllerFrequency Shuffling


Tone energy at below 20KHZ is minimized in the
GENERAL DESCRIPTION design and audio noise is eliminated during operation.
OB2263 is a highly integrated current mode PWM OB2263 is offered in SOT23-6, SOP-8 and DIP-8
control IC optimized for high performance, low packages.
standby power and cost effective offline flyback
converter applications in sub 30W range. FEATURES
PWM switching frequency at normal operation is ■ On-Bright Proprietary Frequency Shuffling
externally programmable and trimmed to tight range. Technology for Improved EMI Performance.
At no load or light load condition, the IC operates in ■ Extended Burst Mode Control For Improved
extended ‘burst mode’ to minimize switching loss. Efficiency and Minimum Standby Power Design
Lower standby power and higher conversion ■ Audio Noise Free Operation
efficiency is thus achieved. ■ External Programmable PWM Switching
VDD low startup current and low operating current Frequency
contribute to a reliable power on startup design with ■ Internal Synchronized Slope Compensation
OB2263. A large value resistor could thus be used in ■ Low VDD Startup Current and Low Operating
the startup circuit to minimize the standby power. Current (1.4mA)
The internal slope compensation improves system ■ Leading Edge Blanking on Current Sense Input
large signal stability and reduces the possible sub- ■ Good Protection Coverage With Auto Self-
harmonic oscillation at high PWM duty cycle output. Recovery
Leading-edge blanking on current sense(CS) input o VDD Over Voltage Clamp and Under Voltage
removes the signal glitch due to snubber circuit diode Lockout with Hysteresis (UVLO)
reverse recovery and thus greatly reduces the external o Gate Output Maximum Voltage Clamp (18V)
component count and system cost in the design. o On-Bright Proprietary Line Input Compensated
OB2263 offers complete protection coverage with Cycle-by-Cycle Over-current Threshold Setting
automatic self-recovery feature including Cycle-by- For Constant Output Power Limiting Over
Cycle current limiting (OCP), over load protection Universal Input Voltage Range.
(OLP), VDD over voltage clamp and under voltage o Overload Protection (OLP)
lockout (UVLO). The Gate-drive output is clamped
to maximum 18V to protect the power MOSFET. APPLICATIONS
Excellent EMI performance is achieved with On- Offline AC/DC flyback converter for
Bright proprietary frequency shuffling technique ■ Battery Charger
together with soft switching control at the totem pole ■ Power Adaptor
gate drive output. ■ Set-Top Box Power Supplies
■ Open-frame SMPS

TYPICAL APPLICATION

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OB2263

Current Mode PWM ControllerFrequency Shuffling

Ordering Information
GENERAL INFORMATION Part Number Description
Pin Configuration OB2263MP SOT23-6, Pb-free
The OB2263 is offered in SOT23-6, DIP8 and SOP8 OB2263AP DIP8, Pb-free
packages, shown as below. OB2263CP SOP8, Pb-free

Package Dissipation Rating


Package RθJA
(°C/W)
DIP8 90
SOP8 150
SOT23-6 200

Absolute Maximum Ratings


Parameter Value
VDD DC Supply Voltage 30 V
VDD Zener Clamp VDD_Clamp+0.1V
Note
Voltage
VDD DC Clamp Current 10 mA
VFB Input Voltage -0.3 to 7V
VSENSE Input Voltage to -0.3 to 7V
Sense Pin
VRI Input Voltage to RI Pin -0.3 to 7V
Min/Max Operating -20 to 150 oC
Junction Temperature TJ
Min/Max Storage -55 to 160 oC
Temperature Tstg
Note: VDD_Clamp has a nominal value of 34V.
Stresses beyond those listed under “absolute maximum ratings”
may cause permanent damage to the device. These are stress
ratings only, functional operation of the device at these or any
other conditions beyond those indicated under “recommended
operating conditions” is not implied. Exposure to absolute
maximum-rated conditions for extended periods may affect device
reliability.

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OB2263

Current Mode PWM ControllerFrequency Shuffling

Marking Information

TERMINAL ASSIGNMENTS
Pin Name I/O Description
GND P Ground
FB I Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and
SENSE pin input.
RI I Internal Oscillator frequency setting pin. A resistor connected between RI and GND sets
the PWM frequency.
SENSE I Current sense input pin. Connected to MOSFET current sensing resistor node.
VDD P Chip DC power supply pin.
GATE O Totem-pole gate drive output for the power MOSFET.

RECOMMENDED OPERATING CONDITION

Symbol Parameter Min Unit


Max
VDD VDD Supply Voltage 10 to 30 V
RI RI Resistor Value 100 Kohm
o
TA Operating Ambient Temperature -20 to 85 C

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OB2263

Current Mode PWM ControllerFrequency Shuffling

BLOCK DIAGRAM

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OB2263

Current Mode PWM ControllerFrequency Shuffling


ELECTRICAL CHARACTERISTICS
(TA = 25OC if not otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
Supply Voltage (VDD)
I_VDD_Startup VDD Start up VDD =12.5V, RI=100K 3 20 uA
Current Measure Leakage current
into VDD
I_VDD_Ops Operation Current VDD=16V, 1.4 mA
RI=100Kohm, VFB=3V
UVLO(ON) VDD Under Voltage 7.8 8.8 9.8 V
Lockout Enter
UVLO(OFF) VDD Under Voltage 13 14 15 V
Lockout Exit
(Recovery)
VDD_Clamp VDD Zener Clamp IVDD = 5 mA 34 V
Voltage
Feedback Input Section(FB Pin)
AVCS PWM Input Gain ΔVFB /ΔVcs 2.0 V/V
VFB_Open VFB Open Loop 4.8 V
Voltage
IFB_Short FB pin short circuit Short FB pin to GND and 1.2 mA
current measure current
VTH_0D Zero Duty Cycle FB VDD = 16V, 0.75 V
Threshold Voltage RI=100Kohm
VTH_PL Power Limiting FB 3.7 V
Threshold Voltage
TD_PL Power limiting 35 mSec
Debounce Time
ZFB_IN Input Impedance 6 Kohm
DC_MAX Maximum Duty VDD=18V, 75 %
Cycle RI=100Kohm, FB=3V,
CS=0
Current Sense Input(Sense Pin)
T_blanking Leading edge RI = 100 Kohm 300 ns
blanking time
ZSENSE_IN Input Impedance 40 Kohm
TD_OC Over Current VDD = 16V, 75 nSec
Detection and CS>VTH_OC, FB=3.3V
Control Delay
VTH_OC Over Current FB=3.3V, RI=100 Kohm 0.70 0.75 0.80 V
Threshold Voltage at
zero Duty Cycle
Oscillator
FOSC Normal Oscillation RI = 100 Kohm 60 65 70 KHZ
Frequency

∆f_Temp Frequency VDD = 16V, 5 %


Temperature Stability RI=100Kohm, TA -20oC
to 100 oC
∆f_VDD Frequency Voltage VDD = 12-25V, 5 %
Stability RI=100Kohm
RI_range Operating RI Range 50 100 150 Kohm
V_RI_open RI open load voltage 2 V

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OB2263

Current Mode PWM ControllerFrequency Shuffling


Fosc_BM Burst Mode Base VDD = 16V, RI = 22 KHZ
Frequency 100Kohm
Gate Drive Output
VOL Output Low Level VDD = 16V, Io = -20 mA 0.8 V
VOH Output High Level VDD = 16V, Io = 20 mA 10 V
V_Clamp Output Clamp 18 V
Voltage Level
T_r Output Rising Time VDD = 16V, CL = 1nf 220 nSec
T_f Output Falling Time VDD = 16V, CL = 1nf 70 nSec
Frequency Shuffling
∆f_OSC Frequency RI=100K -3 3 %
Modulation range
/Base frequency
f_shuffling Shuffling Frequency RI=100K 64 HZ

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OB2263

Current Mode PWM ControllerFrequency Shuffling

CHARACTERIZATION PLOTS
VDD = 16V, RI = 100 Kohm, TA = 25oC condition applies if not otherwise noted.

VDD Startup Current vs. Voltage I_VDD_startup vs. Temp


20 5.0
Ivdd_startup(uA )

I_vdd_startup (uA)
4.6
15
4.2
10
3.8
5
3.4
0 3.0
0 2 4 6 8 10 12 14 16 -20 10 40 70 100 130
VDD(V) Temp(C)

VDD UVLO and Ops Current VDD Operation Current vs. Load(pF)
2
50KHz 65KHz 100KHz
1.6 5
I(VDD) (mA)

4
I(V D D ) (m A )

1.2
3
0.8
2
0.4 1
0 0
0 5 10 15 20 25 30 0 500 1000 1500 2000
VDD (V) Gate Load (pF)

UVLO(ON) vs Temp UVLO(OFF) vs Temp


14.5
9.0
UVLO(ON) (V)

8.8 14.4
UVLO(OFF) (V)

8.6 14.3

8.4 14.2

8.2 14.1

8.0 14.0
-20 10 40 70 100 130 -20 10 40 70 100 130
Temp(C) Temp(C)

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OB2263

Current Mode PWM ControllerFrequency Shuffling

Fosc(KHz) vs. RI(Kohm) Fosc vs. Temp


66.5
140
66
Fosc(K H z)

115

Fosc (KHz)
65.5
90 65
65 64.5
64
40 63.5
50 70 90 110 130 150 -20 5 30 55 80 105 130
RI(Kohm)
Temp (C)

Vth_OC(V) vs Duty_cycle(%)
1.2
1.1
V th_O C (V )

1
0.9
0.8
0.7
0 10 20 30 40 50 60 70
Duty_cycle(%)

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OB2263

Current Mode PWM ControllerFrequency Shuffling


OPERATION DESCRIPTION
The OB2263 is a highly integrated PWM controller minimize the switching loss and reduces the
IC optimized for offline flyback converter standby power consumption to the greatest extend.
applications in sub 30W power range. The extended The frequency control also eliminates the audio
burst mode control greatly reduces the standby noise at any loading conditions.
power consumption and helps the design easily
meet the international power conservation • Oscillator Operation
requirements. A resistor connected between RI and GND sets the
constant current source to charge/discharge the
• Startup Current and Start up Control internal cap and thus the PWM oscillator frequency
Startup current of OB2263 is designed to be very is determined. The relationship between RI and
low so that VDD could be charged up above UVLO switching frequency follows the below equation
threshold level and device starts up quickly. A large within the specified RI in Kohm range at nominal
value startup resistor can therefore be used to loading operational condition.
minimize the power loss yet provides reliable
startup in application. For AC/DC adaptor with 6500
universal input range design, a 2 MΩ, 1/8 W FOSC = ( Khz )
RI ( Kohm)
startup resistor could be used together with a VDD
capacitor to provide a fast startup and low power
dissipation solution. • Current Sensing and Leading Edge Blanking
Cycle-by-Cycle current limiting is offered in
• Operating Current OB2263 current mode PWM control. The switch
The Operating current of OB2263 is low at 1.4mA. current is detected by a sense resistor into the sense
Good efficiency is achieved with OB2263 low pin. An internal leading edge blanking circuit chops
operating current together with extended burst off the sense voltage spike at initial MOSFET on
mode control features. state due to Snubber diode reverse recovery so that
the external RC filtering on sense input is no longer
required. The current limit comparator is disabled
• Frequency shuffling for EMI improvement
and thus cannot turn off the external MOSFET
The frequency Shuffling/jittering (switching
during the blanking period. PWM duty cycle is
frequency modulation) is implemented in OB2263.
determined by the current sense input voltage and
The oscillation frequency is modulated with a
the FB input voltage.
random source so that the tone energy is spread out.
The spread spectrum minimizes the conduction
band EMI and therefore reduces system design • Internal Synchronized Slope Compensation
challenge. Built-in slope compensation circuit adds voltage
ramp onto the current sense input voltage for PWM
generation. This greatly improves the close loop
• Extended Burst Mode Operation
stability at CCM and prevents the sub-harmonic
At zero load or light load condition, majority of the
oscillation and thus reduces the output ripple
power dissipation in a switching mode power
voltage.
supply is from switching loss on the MOSFET
transistor, the core loss of the transformer and the
loss on the snubber circuit. The magnitude of • Gate Drive
power loss is in proportion to the number of OB2263 Gate is connected to an external MOSFET
switching events within a fixed period of time. gate for power switch control. Too weak the gate
Reducing switching events leads to the reduction drive strength results in higher conduction and
on the power loss and thus conserves the energy. switch loss of MOSFET while too strong gate drive
OB2263 self adjusts the switching mode according output compromises the EMI.
to the loading condition. At from no load to A good tradeoff is achieved through the built-in
light/medium load condition, the FB input drops totem pole gate design with right output strength
below burst mode threshold level. Device enters and dead time control. The low idle loss and good
Burst Mode control. The Gate drive output switches EMI system design is easier to achieve with this
only when VDD voltage drops below a preset level dedicated control scheme. An internal 18V clamp is
and FB input is active to output an on state. added for MOSFET gate protection at higher than
Otherwise the gate drive remains at off state to expected VDD input.

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OB2263

Current Mode PWM ControllerFrequency Shuffling


• Protection Controls At overload condition when FB input voltage
Good power supply system reliability is achieved exceeds power limit threshold value for more than
with its rich protection features including Cycle-by- TD_PL, control circuit reacts to shut down the
Cycle current limiting (OCP), Over Load output power MOSFET. Device restarts when VDD
Protection (OLP) and over voltage clamp, Under voltage drops below UVLO limit.
Voltage Lockout on VDD (UVLO). VDD is supplied by transformer auxiliary winding
With On-Bright Proprietary technology, the OCP output. It is clamped when VDD is higher than
threshold tracks PWM Duty cycles and is line threshold value. The power MOSFET is shut down
voltage compensated to achieve constant output when VDD drops below UVLO limit and device
power limit over the universal input voltage range enters power on start-up sequence thereafter.
with recommended reference design.

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OB2263

Current Mode PWM ControllerFrequency Shuffling

PACKAGE MECHANICAL DATA


SOT23-6

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OB2263

Current Mode PWM ControllerFrequency Shuffling


8-Pin Plastic DIP

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OB2263

Current Mode PWM ControllerFrequency Shuffling

8-Pin Plastic SOP

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