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LTC3610

24V, 12A Monolithic


Synchronous Step-Down
DC/DC Converter
Features Description
■ 12A Output Current The LTC®3610 is a high efficiency, monolithic synchronous
■ Wide VIN Range = 4V to 24V step-down DC/DC converter that can deliver up to 12A
■ Internal N-Channel MOSFETs output current from a 4V to 24V (28V maximum) input
■ True Current Mode Control supply. It uses a valley current control architecture to de-
■ Optimized for High Step-Down Ratios liver very low duty cycle operation at high frequency with
■ tON(MIN) ≤100ns excellent transient response. The operating frequency is
■ Extremely Fast Transient Response selected by an external resistor and is compensated for
■ Stable with Ceramic COUT variations in VIN and VOUT.
■ ±1% 0.6V Voltage Reference

The LTC3610 can be configured for discontinuous or
Power Good Output Voltage Monitor

forced continuous operation at light load. Forced continu-
Adjustable On-Time/Switching Frequency

ous operation reduces noise and RF interference while
Adjustable Current Limit

discontinuous mode provides high efficiency by reducing
Programmable Soft-Start

switching losses at light loads.
Output Overvoltage Protection
■ Optional Short-Circuit Shutdown Timer Fault protection is provided by internal foldback current
■ Low Shutdown IQ: 15µA limiting, an output overvoltage comparator and an optional
■ Available in a 9mm × 9mm 64-Pin QFN Package short-circuit shutdown timer. Soft-start capability for sup-
ply sequencing is accomplished using an external timing
Applications capacitor. The regulator current limit is user programmable.
A power good output voltage monitor indicates when
■ Point of Load Regulation the output is in regulation. The LTC3610 is available in a
■ Distributed Power Systems compact 9mm × 9mm QFN package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5481178, 6100678, 6580258, 5847554, 6304066.

Typical Application
High Efficiency Step-Down Converter
604k Efficiency vs Load Current
0.1µF VON ION
100 10000
VIN
RUN/SS VIN
4V TO 24V 95 VIN = 5V
10µF
100pF LTC3610 ×3 90
1000
0.47µH VOUT 85 VIN = 12V
POWER LOSS (mW)

SW 2.5V
EFFICIENCY (%)

470pF 0.22µF 12A 80


100µF
ITH BOOST ×2 75 100
31.83k
70
SGND INTVCC 65 POWER LOSS 12V
30.1k
FCB 10
60 POWER LOSS 5V
VRNG 4.7µF
55
PGND VOUT = 2.5V
PGOOD 50 1
EXTVCC VFB 0.01 0.1 1 10
LOAD CURRENT (A)
3610 TA01a 9.5k 3610 TA01b

3610ff


LTC3610
Absolute Maximum Ratings Pin Configuration
(Note 1)
Input Supply Voltage (VIN, ION)................... 28V to –0.3V TOP VIEW

54 INTVCC
53 INTVCC
Boosted Topside Driver Supply Voltage

64 PGND
63 PGND
62 PGND
61 PGND
60 PGND
59 PGND
58 PGND
57 PGND
56 PGND

50 SGND
49 SGND
52 SVIN
51 SVIN
55 SW
(BOOST)................................................. 34V to –0.3V
SW Voltage............................................. 28V to –0.3V
PGND 1 48 SGND
INTVCC, EXTVCC, (BOOST – SW), RUN/SS, PGND 2
65
PGND 47 SGND
PGOOD Voltages....................................... 7V to –0.3V PGND 3 46 SGND

FCB, VON, VRNG Voltages............. INTVCC + 0.3V to –0.3V SW 4


SW 5
45 SGND
44 EXTVCC
ITH, VFB Voltages........................................ 2.7V to –0.3V SW 6 43 VFB

Operating Temperature Range SW 7 66


SW
42 SGND
SW 8 41 ION
(Note 4).............................................. –40°C to 125°C SW 9 40 SGND
Junction Temperature (Note 2).............................. 125°C SW 10
68
39 FCB
SW 11 38 ITH
Storage Temperature Range.................... –55°C to 125°C PVIN 12
SGND
37 VRNG
PVIN 13 36 PGOOD
PVIN 14 67 35 VON
PVIN
PVIN 15 34 SGND
PVIN 16 33 SGND

PVIN 17
PVIN 18
PVIN 19
PVIN 20
PVIN 21
PVIN 22
PVIN 23
PVIN 24
PVIN 25
SW 26
NC 27
SGND 28
BOOST 29
RUN/SS 30
SGND 31
SGND 32
WP PACKAGE
64-LEAD (9mm × 9mm) QFN MULTIPAD
TJMAX = 125°C, θJA = 28°C/W

Order Information
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3610EWP#PBF LTC3610EWP#TRPBF LTC3610WP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 125°C
LTC3610IWP#PBF LTC3610IWP#TRPBF LTC3610WP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3610EWP LTC3610EWP#TR LTC3610WP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 125°C
LTC3610IWP LTC3610IWP#TR LTC3610WP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.*The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

Electrical
Characteristics The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 4). VIN = 15V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
VIN Operating Input Voltage Range 4 24 V
IQ Input DC Supply Current
Normal 900 2000 µA
Shutdown Supply Current 15 30 µA
VFB Feedback Reference Voltage ITH = 1.2V (Note 3) ● 0.594 0.600 0.606 V
ΔVFB(LINEREG) Feedback Voltage Line Regulation VIN = 4V to 28V, ITH = 1.2V (Note 3) 0.002 %/V
3610ff


LTC3610
Electrical
Characteristics The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 4). VIN = 15V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ΔVFB(LOADREG) Feedback Voltage Load Regulation ITH = 0.5V to 1.9V (Note 3) –0.05 –0.3 %
IFB Feedback Input Current VFB = 0.6V –5 ±50 nA
gm(EA) Error Amplifier Transconductance ITH = 1.2V (Note 3) ● 1.4 1.7 2 mS
VFCB Forced Continuous Threshold ● 0.54 0.6 0.66 V
IFCB Forced Continuous Pin Current VFCB = 0.6V –1 –2 µA
tON On-Time ION = 60µA, VON = 1.5V 170 250 310 ns
ION = 60µA, VON = 0V 120 ns
tON(MIN) Minimum On-Time ION = 180µA, VON = 0V 60 100 ns
tOFF(MIN) Minimum Off-Time ION = 30µA, VON = 1.5V 290 500 ns
IVALLEY(MAX) Maximum Valley Current VRNG = 0.5V, VFB = 0.56V, FCB = 0V ● 7 16 A
VRNG = 0V, VFB = 0.56V, FCB = 0V ● 10 19 A
IVALLEY(MIN) Maximum Reverse Valley Current VRNG = 0.5V, VFB = 0.64V, FCB = 0V –6 A
VRNG = 0V, VFB = 0.64V, FCB = 0V –9 A
ΔVFB(OV) Output Overvoltage Fault Threshold 7 10 13 %
VRUN/SS(ON) RUN Pin Start Threshold ● 0.8 1.5 2 V
VRUN/SS(LE) RUN Pin Latchoff Enable Threshold RUN/SS Pin Rising 4 4.5 V
VRUN/SS(LT) RUN Pin Latchoff Threshold RUN/SS Pin Falling 3.5 4.2 V
IRUN/SS(C) Soft-Start Charge Current VRUN/SS = 0V –0.5 –1.2 –3 µA
IRUN/SS(D) Soft-Start Discharge Current VRUN/SS = 4.5V, VFB = 0V 0.8 1.8 3 µA
VIN(UVLO) Undervoltage Lockout VIN Falling ● 3.4 3.9 V
VIN(UVLOR) Undervoltage Lockout Release VIN Rising ● 3.5 4 V
RDS(ON) Top Switch On-Resistance 12 16 mΩ
Bottom Switch On-Resistance 6.5 10 mΩ
Internal VCC Regulator
VINTVCC Internal VCC Voltage 6V < VIN < 28V, VEXTVCC = 4V ● 4.7 5 5.5 V
ΔVLDO(LOADREG) Internal VCC Load Regulation ICC = 0mA to 20mA, VEXTVCC = 4V –0.1 ±2 %
VEXTVCC EXTVCC Switchover Voltage ICC = 20mA, VEXTVCC Rising ● 4.5 4.7 V
ΔVEXTVCC EXTVCC Switch Drop Voltage ICC = 20mA, VEXTVCC = 5V 150 300 mV
ΔVEXTVCC(HYS) EXTVCC Switchover Hysteresis 500 mV
PGOOD Output
ΔVFBH PGOOD Upper Threshold VFB Rising 7 10 13 %
ΔVFBL PGOOD Lower Threshold VFB Falling –7 –10 –13 %
ΔVFB(HYS) PGOOD Hysteresis VFB Returning 1 2.5 %
VPGL PGOOD Low Voltage IPGOOD = 5mA 0.15 0.4 V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: The LTC3610 is tested in a feedback loop that adjusts VFB to
may cause permanent damage to the device. Exposure to any Absolute achieve a specified error amplifier output voltage (ITH).
Maximum Rating condition for extended periods may affect device Note 4: The LTC3610 is tested under pulsed load conditions such that
reliability and lifetime. TJ ≈ TA. The LTC3610E is guaranteed to meet performance specifications
Note 2: TJ is calculated from the ambient temperature TA and power from 0°C to 125°C. Specifications over the –40°C to 125°C operating
dissipation PD as follows: temperature range are assured by design, characterization and correlation
TJ = TA + (PD • 28°C/W) (θJA is simulated per JESD51-7 high effective with statistical process controls. The LTC3610I is guaranteed over the
thermal conductivity test board) full –40°C to 125°C operating junction temperature range. Note that
θJC = 0.24°C/W (θJC is simulated when heat sink is applied at the the maximum ambient temperature is determined by specific operating
bottom of the package). conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
3610ff


LTC3610
Typical Performance Characteristics
Transient Response
Transient Response (Discontinuous Mode) Start-Up

VOUT VOUT
100mV/DIV 100mV/DIV
RUN/SS
2V/DIV

IL IL
5A/DIV 5A/DIV
VOUT
1V/DIV
ILOAD ILOAD
5A/DIV IL
5A/DIV 5A/DIV
3610 G01 3610 G02 3610 G03
40µs/DIV 40µs/DIV 40ms/DIV
LOAD STEP 0A TO 8A ILOAD = 1A TO 7A VIN = 12V
VIN = 12V VIN = 12V VOUT = 2.5V
VOUT = 2.5V VOUT = 2.5V RLOAD = 0.5Ω
FCB = 0V FCB = INTVCC FIGURE 6 CIRCUIT
FIGURE 6 CIRCUIT FIGURE 6 CIRCUIT


Efficiency vs Load Current Efficiency vs Input Voltage Frequency vs Input Voltage
100 100 640
FCB = 5V
DISCONTINUOUS FIGURE 6 CIRCUIT ILOAD = 10A
MODE 600
90
95

FREQUENCY (kHz)
560
EFFICIENCY (%)

EFFICIENCY (%)

80
CONTINUOUS ILOAD = 10A
MODE 90 520
70 ILOAD = 0A
ILOAD = 1A 480
VIN = 12V 85
60
VOUT = 2.5V 440
EXTVCC = 5V FCB = 0V
FIGURE 6 CIRCUIT FIGURE 6 CIRCUIT
50 80 400
0.001 0.01 0.1 1 10 5 10 15 20 25 5 10 15 20 25
LOAD CURRENT (A) INPUT VOLTAGE (V) INPUT VOLTAGE (V)
3610 G05 3610 G06
3610 G04


Frequency vs Load Current Load Regulation ITH Voltage vs Load Current
650 0.80 2.5
FIGURE 6 CIRCUIT FIGURE 6 CIRCUIT
600
CONTINUOUS MODE 0.60
550
2.0
500 0.40
450
FREQUENCY (kHz)

ITH VOLTAGE (V)

400 0.20 1.5


ΔVOUT (%)

350 CONTINUOUS
0 MODE
300 DISCONTINUOUS MODE
250 1.0
–0.20
200
–0.40 DISCONTINUOUS
150
0.5 MODE
100
–0.60
50
0 –0.80 0
0 2 4 6 8 10 12 0 2 4 6 8 10 12 0 3 6 9 12
LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (A)
3610 G07 3610 G08 3610 G09

3610ff


LTC3610
Typical Performance Characteristics
Load Current
vs ITH Voltage and VRNG On-Time vs ION Current On-Time vs VON Voltage
25 10000 1000
VRNG = VVON = 0V ION = 30µA
1V
20
800
0.7V
15 0.5V
LOAD CURRENT (A)

1000

ON-TIME (ns)
600

ON-TIME (ns)
10

5 400
100
0
200
–5

–10 10 0
0 0.5 1.0 1.5 2.0 2.5 3.0 1 10 100 0 1 2 3
ITH VOLTAGE (V) ION CURRENT (µA) VON VOLTAGE (V)
3610 G10 3610 G11 3610 G12

Maximum Valley Current Limit Maximum Valley Current Limit


On-Time vs Temperature vs VRNG Voltage vs RUN/SS Voltage
300 18
IION = 30µA
24
MAXIMUM VALLEY CURRENT LIMIT (A)

MAXIMUM VALLEY CURRENT LIMIT (A)


VVON = 0V
250 15
22

200 20 12
ON-TIME (ns)

18
150 9
16
100 6
14
50 3
12

0 10 0
–50 –25 0 25 50 75 100 125 0.5 0.6 0.7 0.8 0.9 1.0 1.65 1.90 2.15 2.40 2.65 2.90 3.15 3.40
TEMPERATURE (°C) VRNG VOLTAGE (V) RUN/SS VOLTAGE (V)
3610 G14 3610 G15
3610 G13

Maximum Valley Current Limit Input Voltage Maximum Valley Current Limit
vs Temperature vs Maximum Valley Current in Foldback
20 18 15
MAXIMUM VALLEY CURRENT LIMIT (A)
MAXIMUM VALLEY CURRENT LIMIT (A)

16
MAXIMUM VALLEY CURRENT (A)

15
14
10
12
10
10
5
8
5

0 4 0
–50 –25 0 25 50 75 100 125 4 7 10 13 16 19 22 25 28 0 0.1 0.2 0.3 0.4 0.5 0.6
TEMPERATURE (°C) INPUT VOLTAGE (V) VFB (V)
3610 G16 3610 G18
3610 G17

3610ff


LTC3610
Typical Performance Characteristics
Feedback Reference Voltage Input and Shutdown Currents
vs Temperature Error Amplifier gm vs Temperature vs Input Voltage
0.62 2.0 1400 40

EXTVCC OPEN 35
FEEDBACK REFERENCE VOLTAGE (V)

1200
1.8

SHUTDOWN CURRENT (µA)


0.61 30
1000

INPUT CURRENT (µA)


1.6 25
800

gm (mS)
0.60 SHUTDOWN 20
600
1.4 15
400
0.59 10
1.2 EXTVCC = 5V
200 5

0.58 1.0 0 0
–50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 5 10 15 20 25 30
TEMPERATURE (°C) TEMPERATURE (°C) INPUT VOLTAGE (V)
3610 G19 3610 G20 3610 G21

EXTVCC Switch Resistance


INTVCC Load Regulation IEXTVCC vs Frequency vs Temperature
0.30 25 10

0.20

EXTVCC SWITCH RESISTANCE (Ω)


20 8
0.10
IEXTVCC (mA)
ΔINTVCC (%)

15 6
0

–0.10 10 4

–0.20
5 2
–0.30

–0.40 0 0
0 10 20 30 40 50 400 500 600 700 800 900 1000 –50 –25 0 25 50 75 100 125
INTVCC LOAD CURRENT (mA) FREQUENCY (kHz) TEMPERATURE (°C)
3610 G22
3610 G23 3610 G24

RUN/SS Pin Current RUN/SS Pin Current Undervoltage Lockout Threshold


vs Temperature vs Temperature vs Temperature
3 5.0 4.0
UNDERVOLTAGE LOCKOUT THRESHOLD (V)

2
RUN/SS PIN CURRENT (µA)
RUN/SS PIN CURRENT (µA)

4.5 3.5
PULL-DOWN CURRENT LATCHOFF ENABLE
1
4.0 3.0
0
LATCHOFF THRESHOLD
3.5 2.5
–1

PULL-UP CURRENT
–2 3.0 2.0
–50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) 3610 G26
TEMPERATURE (°C)
3610 G25 3610 G27

3610ff


LTC3610
Pin Functions
PGND (Pins 1, 2, 3, 56, 57, 58, 59, 60, 61, 62, 63, 64, VRNG (Pin 37): Current Limit Range Input. The voltage at
65): Power Ground. Connect this pin closely to the (–) this pin adjusts maximum valley current and can be set
terminal of CVCC and the (–) terminal of CIN. from 0.5V to 0.7V by a resistive divider from INTVCC. It
defaults to 0.7V if the VRNG pin is tied to ground which
SW (Pins 4, 5, 6, 7, 8, 9, 10, 11, 26, 55, 66): Switch
results in a typical 19A current limit.
Node Connection to the Inductor. The (–) terminal of the
bootstrap capacitor CB also connects here. This pin swings ITH (Pin 38): Current Control Threshold and Error Amplifier
from a diode voltage drop below ground up to VIN. Compensation Point. The current comparator threshold
PVIN (Pins 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, increases with this control voltage. The voltage ranges
23, 24, 25, 67): Main Input Supply. Decouple this pin to from 0V to 2.4V with 0.8V corresponding to zero sense
power PGND with the input capacitance CIN. voltage (zero current).

NC (Pin 27): No Connection. FCB (Pin 39): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
SGND (Pins 28, 31, 32, 33, 34, 40, 42, 45, 46, 47, 48, load, to INTVCC to enable discontinuous mode operation at
49, 50, 68): Signal Ground. All small-signal components low load or to a resistive divider from a secondary output
and compensation components should connect to this when using a secondary winding.
ground, which in turn connects to PGND at one point.
ION (Pin 41): On-Time Current Input. Tie a resistor from VIN
BOOST (Pin 29): Boosted Floating Driver Supply. The to this pin to set the one-shot timer current and thereby
(+) terminal of the bootstrap capacitor CB connects here. set the switching frequency.
This pin swings from a diode voltage drop below INTVCC
up to VIN + INTVCC. VFB (Pin 43): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
RUN/SS (Pin 30): Run Control and Soft-Start Input. A divider from VOUT.
capacitor to ground at this pin sets the ramp time to full
EXTVCC (Pin 44): External VCC Input. When EXTVCC exceeds
output current (approximately 3s/µF) and the time delay
4.7V, an internal switch connects this pin to INTVCC and
for overcurrent latchoff (see Applications Information).
shuts down the internal regulator so that controller and
Forcing this pin below 0.8V shuts down the device.
gate drive power is drawn from EXTVCC. Do not exceed
VON (Pin 35): On-Time Voltage Input. Voltage trip point for 7V at this pin and ensure that EXTVCC < VIN.
the on-time comparator. Tying this pin to the output volt-
SVIN (Pins 51, 52): Supply Pin for Internal PWM
age or an external resistive divider from the output makes
Controller.
the on-time proportional to VOUT. The comparator input
defaults to 0.7V when the pin is grounded and defaults to INTVCC (Pins 53, 54): Internal 5V Regulator Output. The
2.4V when the pin is tied to INTVCC. Tie this pin to INTVCC driver and control circuits are powered from this voltage.
in high VOUT applications to use a lower RON value. Decouple this pin to power ground with a minimum of
PGOOD (Pin 36): Power Good Output. Open-drain logic 4.7µF low ESR tantalum or ceramic capacitor.
output that is pulled to ground when the output voltage
is not within ± 10% of the regulation point.

3610ff


LTC3610
Functional Diagram
RON

VON ION FCB EXTVCC SVIN


35 41 39 44
51, 52
4.7V
0.7V 2.4V PVIN
1µA + – 0.6V 12, 13, 14, 15,
REF 16, 17, 18, 19,
20, 21, 22, 23,
24, 25, 67
0.6V 5V CIN
REG

INTVCC
– +
53, 54
F
BOOST
29
VVON
tON = (10pF) R
IION
S Q FCNT CB
M1

ON
20k DB L1
SW
+ + VOUT
SWITCH 4, 5, 6, 7, 8, 9,
ICMP IREV LOGIC 10, 11, 26, 55,
66
– –
1.4V SHDN +
COUT
OV
M2 CVCC
VRNG
37
PGND
×
(0.5 TO 2) 1, 2, 3, 56, 57,
0.7V 58, 59, 60, 61,
62, 63, 64, 65
36 PGOOD

1 R2
240k
1V
+ 0.54V
Q2 Q4 UV

Q6 –
ITHB
43
VFB
Q3 Q1
+ R1

OV
+ 0.8V – 0.66V
SGND
– 28, 31, 32, 33, 34,
SS RUN 40, 42, 45, 46, 47,
– + SHDN 48, 49, 50, 68
1.2µA
×3.3 EA
NC
+

27

+ –
6V

0.6V 0.4V
38 30 3610 FD

ITH RUN/SS

CSS

3610ff


LTC3610
Operation
Main Control Loop Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback volt-
The LTC3610 is a high efficiency monolithic synchronous,
age exits a ±10% window around the regulation point.
step-down DC/DC converter utilizing a constant on-time,
Furthermore, in an overvoltage condition, M1 is turned
current mode architecture. It operates from an input voltage
off and M2 is turned on and held on until the overvoltage
range of 4V to 24V and provides a regulated output voltage
condition clears.
at up to 12A of output current. The internal synchronous
power switch increases efficiency and eliminates the need Foldback current limiting is provided if the output is
for an external Schottky diode. In normal operation, the shorted to ground. As VFB drops, the buffered current
top MOSFET is turned on for a fixed interval determined threshold voltage ITHB is pulled down by clamp Q3 to
by a one-shot timer OST. When the top MOSFET is turned a 1V level set by Q4 and Q6. This reduces the inductor
off, the bottom MOSFET is turned on until the current valley current level to one sixth of its maximum value as
comparator ICMP trips, restarting the one-shot timer and VFB approaches 0V.
initiating the next cycle. Inductor current is determined Pulling the RUN/SS pin low forces the controller into its
by sensing the voltage between the PGND and SW pins shutdown state, turning off both M1 and M2. Releasing
using the bottom MOSFET on-resistance. The voltage on the pin allows an internal 1.2µA current source to charge
the ITH pin sets the comparator threshold corresponding up an external soft-start capacitor, CSS. When this voltage
to inductor valley current. The error amplifier, EA, adjusts reaches 1.5V, the controller turns on and begins switching,
this voltage by comparing the feedback signal VFB from but with the ITH voltage clamped at approximately 0.6V
the output voltage with an internal 0.6V reference. If the below the RUN/SS voltage. As CSS continues to charge,
load current increases, it causes a drop in the feedback the soft-start current limit is removed.
voltage relative to the reference. The ITH voltage then
rises until the average inductor current again matches INTVCC/EXTVCC Power
the load current.
Power for the top and bottom MOSFET drivers and most of
At light load, the inductor current can drop to zero and the internal controller circuitry is derived from the INTVCC
become negative. This is detected by current reversal pin. The top MOSFET driver is powered from a floating
comparator IREV which then shuts off M2 (see Func- bootstrap capacitor CB. This capacitor is recharged from
tional Diagram), resulting in discontinuous operation. Both INTVCC through an external Schottky diode, DB, when
switches will remain off with the output capacitor supplying the top MOSFET is turned off. When the EXTVCC pin is
the load current until the ITH voltage rises above the zero grounded, an internal 5V low dropout regulator supplies
current level (0.8V) to initiate another cycle. Discontinu- the INTVCC power from VIN. If EXTVCC rises above 4.7V,
ous mode operation is disabled by comparator F when the internal regulator is turned off, and an internal switch
the FCB pin is brought below 0.6V, forcing continuous connects EXTVCC to INTVCC. This allows a high efficiency
synchronous operation. source connected to EXTVCC, such as an external 5V sup-
The operating frequency is determined implicitly by the ply or a secondary output from the converter, to provide
top MOSFET on-time and the duty cycle required to main- the INTVCC power. Voltages up to 7V can be applied to
tain regulation. The one-shot timer generates an on-time EXTVCC for additional gate drive. If the input voltage is
that is proportional to the ideal duty cycle, thus holding low and INTVCC drops below 3.5V, undervoltage lockout
frequency approximately constant with changes in VIN. circuitry prevents the power switches from turning on.
The nominal frequency can be adjusted with an external
resistor, RON.

3610ff


LTC3610
Applications Information
The basic LTC3610 application circuit is shown on the Operating Frequency
front page of this data sheet. External component selection The choice of operating frequency is a trade-off between
is primarily determined by the maximum load current. efficiency and component size. Low frequency operation
The LTC3610 uses the on-resistance of the synchronous improves efficiency by reducing MOSFET switching losses
power MOSFET for determining the inductor current. The but requires larger inductance and/or capacitance in order
desired amount of ripple current and operating frequency to maintain low output ripple voltage.
also determines the inductor value. Finally, CIN is selected
for its ability to handle the large RMS current into the The operating frequency of LTC3610 applications is de-
converter and COUT is chosen with low enough ESR to meet termined implicitly by the one-shot timer that controls the
the output voltage ripple and transient specification. on-time tON of the top MOSFET switch. The on-time is set
by the current into the ION pin and the voltage at the VON
VON and PGOOD pin according to:
The LTC3610 has an open-drain PGOOD output that VVON
tON = (10pF )
indicates when the output voltage is within ±10% of the IION

regulation point. The LTC3610 also has a VON pin that
allows the on-time to be adjusted. Tying the VON pin high Tying a resistor, RON, from VIN to the ION pin yields an
results in lower values for RON which is useful in high VOUT on-time inversely proportional to VIN. The current out of
applications. The VON pin also provides a means to adjust the ION pin is:
the on-time to maintain constant frequency operation in VIN
applications where VOUT changes and to correct minor IION =
RON
frequency shifts with changes in load current.
For a step-down converter, this results in approximately
VRNG Pin and ILIMIT Adjust
constant frequency operation as the input supply varies:
The VRNG pin is used to adjust the maximum inductor
VOUT
valley current, which in turn determines the maximum f= [ HZ ]
average output current that the LTC3610 can deliver. The VVON RON(10pF )
maximum output current is given by: To hold frequency constant during output voltage changes,
IOUT(MAX) = IVALLEY(MAX) + 1/2 ΔIL tie the VON pin to VOUT or to a resistive divider from VOUT
when VOUT > 2.4V. The VON pin has internal clamps that
The IVALLEY(MAX) is shown in the figure “Maximum Valley
limit its input to the one-shot timer. If the pin is tied below
Current Limit vs VRNG Voltage” in the Typical Performance
0.7V, the input to the one-shot is clamped at 0.7V. Similarly,
Characteristics.
if the pin is tied above 2.4V, the input is clamped at 2.4V.
An external resistor divider from INTVCC can be used to In high VOUT applications, tying VON to INTVCC so that the
set the voltage on the VRNG pin from 0.5V to 1V, or it can comparator input is 2.4V results in a lower value for RON.
be simply tied to ground force a default value equivalent Figures 1a and 1b show how RON relates to switching
to 0.7V. When setting current limit, ensure that the junc- frequency for several common output voltages.
tion temperature does not exceed the maximum rating of
125°C. Do not float the VRNG pin.

3610ff

10
LTC3610
Applications Information
1000 as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the ITH pin to the VON pin and VOUT. The values
SWITCHING FREQUENCY (kHz)

VOUT = 3.3V required will depend on the parasitic resistances in the


VOUT = 1.5V VOUT = 2.5V
specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin
as shown in Figure 2a. Place capacitance on the VON pin
to filter out the ITH variations at the switching frequency.
The resistor load on ITH reduces the DC gain of the error
100
amp and degrades load regulation, which can be avoided
100 1000 10000 by using the PNP emitter follower of Figure 2b.
RON (kΩ)
3610 F01a

Figure 1a. Switching Frequency vs RON (VON = 0V)


Minimum Off-Time and Dropout Operation
The minimum off-time, tOFF(MIN), is the smallest amount
1000
of time that the LTC3610 is capable of turning on the bot-
tom MOSFET, tripping the current comparator and turning
the MOSFET back off. This time is generally about 250ns.
SWITCHING FREQUENCY (kHz)

The minimum off-time limit imposes a maximum duty


VOUT = 12V
cycle of tON/(tON + tOFF(MIN)). If the maximum duty cycle
VOUT = 5V
is reached, due to a dropping input voltage for example,
VOUT = 3.3V then the output will drop out of regulation. The minimum
input voltage to avoid dropout is:
tON + tOFF(MIN)
VIN(MIN) = VOUT
100
100 1000 10000 tON
RON (kΩ)
3610 F01b
A plot of maximum duty cycle vs frequency is shown in
Figure 1b. Switching Frequency vs RON (VON = INTVCC) Figure 3.

Because the voltage at the ION pin is about 0.7V, the cur- Setting the Output Voltage
rent into this pin is not exactly inversely proportional to The LTC3611 develops a 0.6V reference voltage between
VIN, especially in applications with lower input voltages. the feedback pin, VFB, and the signal ground as shown in
To correct for this error, an additional resistor RON2 con- Figure 6. The output voltage is set by a resistive divider
nected from the ION pin to the 5V INTVCC supply will further according to the following formula:
stabilize the frequency.
⎛ R2 ⎞
5V VOUT = 0.6V ⎜ 1+ ⎟
RON2 = RON ⎝ R1⎠
0.7 V
To improve the frequency response, a feedforward capaci-
Changes in the load current magnitude will also cause
tor C1 may also be used. Great care should be taken to
frequency shift. Parasitic resistance in the MOSFET
route the VFB line away from noise sources, such as the
switches and inductor reduce the effective voltage across inductor or the SW trace.
the inductance, resulting in increased duty cycle as the
load current increases. By lengthening the on-time slightly

3610ff

11
LTC3610
Applications Information
RVON1
30k
frequency with small ripple current. However, achieving
VOUT VON this requires a large inductor. There is a trade-off between
RVON2
CVON
0.01µF LTC3610
component size, efficiency and operating frequency.
100k
RC
ITH
A reasonable starting point is to choose a ripple current
CC
that is about 40% of IOUT(MAX). The largest ripple current
occurs at the highest VIN. To guarantee that ripple current
does not exceed a specified maximum, the inductance
(2a) should be chosen according to:
RVON1
3k ⎛ V ⎞⎛ VOUT ⎞
VOUT VON
L=⎜ OUT 1−
RVON2 CVON ⎟⎜ ⎟
10k 10k 0.01µF
LTC3610 ⎝ f ΔIL(MAX) ⎠ ⎝ VIN(MAX) ⎠
INTVCC
RC
Q1
2N5087
ITH
Once the value for L is known, the type of inductor must
CC
3610 F02 be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores.
(2b) A variety of inductors designed for high current, low volt-
age applications are available from manufacturers such as
Figure 2. Correcting Frequency Shift with Load Current Changes Sumida, Panasonic, Coiltronics, Coilcraft and Toko.
2.0
CIN and COUT Selection
The input capacitance CIN is required to filter the square
SWITCHING FREQUENCY (MHz)

1.5
DROPOUT wave current at the drain of the top MOSFET. Use a low ESR
REGION
capacitor sized to handle the maximum RMS current.
1.0
VOUT VIN
IRMS ≅IOUT(MAX) –1
VIN VOUT
0.5
This formula has a maximum at VIN = 2VOUT, where
0
0 0.25 0.50 0.75 1.0
IRMS = IOUT(MAX)/2. This simple worst-case condition is
DUTY CYCLE (VOUT/VIN)
3610 F03
commonly used for design because even significant de-
viations do not offer much relief. Note that ripple current
Figure 3. Maximum Switching Frequency vs Duty Cycle ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to derate
Inductor Selection the capacitor.
Given the desired input and output voltages, the induc- The selection of COUT is primarily determined by the
tor value and operating frequency determine the ripple ESR required to minimize voltage ripple and load step
current: transients. The output ripple ΔVOUT is approximately
⎛V ⎞⎛ V ⎞ bounded by:
ΔIL = ⎜ OUT ⎟ ⎜ 1− OUT ⎟
⎝ f L ⎠⎝ VIN ⎠ ⎛ 1 ⎞
ΔVOUT ≤ ΔIL ⎜ ESR +
⎝ 8fCOUT ⎟⎠
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
3610ff

12
LTC3610
Applications Information
Since ΔIL increases with input voltage, the output ripple Discontinuous Mode Operation and FCB Pin
is highest at maximum input voltage. Typically, once the The FCB pin determines whether the bottom MOSFET
ESR requirement is satisfied, the capacitance is adequate remains on when current reverses in the inductor. Tying
for filtering and has the necessary RMS current rating. this pin above its 0.6V threshold enables discontinuous
Multiple capacitors placed in parallel may be needed to operation where the bottom MOSFET turns off when in-
meet the ESR and RMS current handling requirements. ductor current reverses. The load current at which current
Dry tantalum, special polymer, aluminum electrolytic and reverses and discontinuous operation begins depends on
ceramic capacitors are all available in surface mount pack- the amplitude of the inductor ripple current and will vary
ages. Special polymer capacitors offer very low ESR but with changes in VIN. Tying the FCB pin below the 0.6V
have lower capacitance density than other types. Tantalum threshold forces continuous synchronous operation, al-
capacitors have the highest capacitance density but it is lowing current to reverse at light loads and maintaining
important to only use types that have been surge tested high frequency operation.
for use in switching power supplies. Aluminum electrolytic In addition to providing a logic input to force continuous
capacitors have significantly higher ESR, but can be used operation, the FCB pin provides a means to maintain a
in cost-sensitive applications providing that consideration flyback winding output when the primary is operating
is given to ripple current ratings and long-term reliability. in discontinuous mode. The secondary output VOUT2 is
Ceramic capacitors have excellent low ESR characteris- normally set as shown in Figure 4 by the turns ratio N
tics but can have a high voltage coefficient and audible of the transformer. However, if the controller goes into
piezoelectric effects. The high Q of ceramic capacitors with discontinuous mode and halts switching due to a light
trace inductance can also lead to significant ringing. When primary load current, then VOUT2 will droop. An external
used as input capacitors, care must be taken to ensure resistor divider from VOUT2 to the FCB pin sets a minimum
that ringing from inrush currents and switching does not voltage VOUT2(MIN) below which continuous operation is
pose an overvoltage hazard to the power switches and forced until VOUT2 has risen above its minimum:
controller. To dampen input voltage transients, add a small
5µF to 50µF aluminum electrolytic capacitor with an ESR in ⎛ R4 ⎞
VOUT2(MIN) = 0.6V ⎜ 1+ ⎟
the range of 0.5Ω to 2Ω. High performance through-hole ⎝ R3 ⎠
capacitors may also be used, but an additional ceramic
capacitor in parallel is recommended to reduce the effect Fault Conditions: Current Limit and Foldback
of their lead inductance.
The LTC3610 has a current mode controller which inher-
Top MOSFET Driver Supply (CB, DB) ently limits the cycle-by-cycle inductor current not only
An external bootstrap capacitor, CB, connected to the BOOST in steady state operation but also in transient. To further
pin supplies the gate drive voltage for the topside MOSFET. limit current in the event of a short circuit to ground,
This capacitor is charged through diode DB from INTVCC the LTC3610 includes foldback current limiting. If the
when the switch node is low. When the top MOSFET turns output falls by more than 25%, then the maximum sense
on, the switch node rises to VIN and the BOOST pin rises voltage is progressively lowered to about one sixth of
to approximately VIN + INTVCC. The boost capacitor needs its full value.
to store about 100 times the gate charge required by the
top MOSFET. In most applications an 0.1µF to 0.47µF, X5R
or X7R dielectric capacitor is adequate.

3610ff

13
LTC3610
Applications Information
SW
GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
IN4148
1 48
VOUT2 PGND SGND
2 47
CSEC + PGND SGND
1µF 3 46
• PGND SGND
4 45
VOUT1 SW SGND

T1 5 44
+ 1:N SW EXTVCC
COUT 6 43
SW VFB
7 42
SW SGND
8 41 R4
SW ION
9 LTC3610 40
SW SGND
10 39 OPTIONAL EXTVCC
SW FCB CONNECTION
11 38 5V < VOUT2 < 7V
SW ITH
VIN 12 37
PVIN VRNG
+ 13 36 R3
CIN PVIN PGOOD
14 35
PVIN VON
15 34
PVIN SGND
16 33
PVIN SGND

RUN/SS
BOOST
SGND

SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
SW
NC

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
3610 F04

SGND
SW

Figure 4. Secondary Output Loop and EXTVCC Connection

INTVCC Regulator and EXTVCC Connection 2. EXTVCC connected to an external supply. A high efficiency
supply compatible with the MOSFET gate drive require-
An internal P-channel low dropout regulator produces the
ments (typically 5V) can improve overall efficiency.
5V supply that powers the drivers and internal circuitry
within the LTC3610. The INTVCC pin can supply up to 50mA 3. EXTVCC connected to an output derived boost network.
RMS and must be bypassed to ground with a minimum of The low voltage output can be boosted using a charge
4.7µF tantalum or ceramic capacitor. Good bypassing is pump or flyback winding to greater than 4.7V. The
necessary to supply the high transient currents required system will start-up using the internal linear regulator
by the MOSFET gate drivers. until the boosted output supply is available.
The EXTVCC pin can be used to provide MOSFET gate drive Soft-Start and Latchoff with the RUN/SS Pin
and control power from the output or another external
source during normal operation. Whenever the EXTVCC The RUN/SS pin provides a means to shut down the LTC3610
pin is above 4.7V the internal 5V regulator is shut off and as well as a timer for soft-start and overcurrent latchoff.
an internal 50mA P-channel switch connects the EXTVCC Pulling the RUN/SS pin below 0.8V puts the LTC3610 into
pin to INTVCC. INTVCC power is supplied from EXTVCC a low quiescent current shutdown (IQ < 30µA). Releasing
until this pin drops below 4.5V. Do not apply more than the pin allows an internal 1.2µA current source to charge
7V to the EXTVCC pin and ensure that EXTVCC ≤ VIN. The up the external timing capacitor CSS. If RUN/SS has been
following list summarizes the possible connections for pulled all the way to ground, there is a delay before start-
EXTVCC: ing of about:
1. EXTVCC grounded. INTVCC is always powered from the 1.5V
tDELAY = C = (1.3s/µF ) CSS
internal 5V regulator. 1.2µA SS

3610ff

14
LTC3610
Applications Information
When the voltage on RUN/SS reaches 1.5V, the LTC3610 INTVCC

begins operating with a clamp on ITH of approximately RSS*


0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH 3.3V OR 5V
VIN
RUN/SS RUN/SS
D2*
is raised until its full 2.4V range is available. This takes an RSS*
D1
additional 1.3s/µF, during which the load current is folded
2N7002 CSS
back until the output reaches 75% of its final value. CSS

After the controller has been started and given adequate 3610 F05

*OPTIONAL TO OVERRIDE
time to charge up the output capacitor, CSS is used as a OVERCURRENT LATCHOFF

short-circuit timer. After the RUN/SS pin charges above 4V, (5a) (5b)
if the output voltage falls below 75% of its regulated value,
Figure 5. RUN/SS Pin Interfacing with Latchoff Defeated
then a short-circuit fault is assumed. A 1.8µA current then
begins discharging CSS. If the fault condition persists until Efficiency Considerations
the RUN/SS pin drops to 3.5V, then the controller turns
off both power MOSFETs, shutting down the converter The percent efficiency of a switching regulator is equal to
permanently. The RUN/SS pin must be actively pulled the output power divided by the input power times 100%.
down to ground in order to restart operation. It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
The overcurrent protection timer requires that the soft‑start produce the most improvement. Although all dissipative
timing capacitor, CSS, be made large enough to guarantee elements in the circuit produce losses, four main sources
that the output is in regulation by the time CSS has reached account for most of the losses in LTC3610 circuits:
the 4V threshold. In general, this will depend upon the
size of the output capacitance, output voltage and load 1. DC I2R losses. These arise from the resistance of the
current characteristic. A minimum soft-start capacitor internal resistance of the MOSFETs, inductor and PC
can be estimated from: board traces and cause the efficiency to drop at high
output currents. In continuous mode the average output
CSS > COUT VOUT RSENSE (10 –4 [F/V s]) current flows through L, but is chopped between the top
Generally 0.1µF is more than sufficient. and bottom MOSFETs. The DC I2R loss for one MOSFET
can simply be determined by [RDS(ON) + RL] • IO.
Overcurrent latchoff operation is not always needed or de-
sired. Load current is already limited during a short-circuit 2. Transition loss. This loss arises from the brief amount
by the current foldback circuitry and latchoff operation can of time the top MOSFET spends in the saturated re-
prove annoying during troubleshooting. The feature can gion during switch node transitions. It depends upon
be overridden by adding a pull-up current greater than the input voltage, load current, driver strength and
5µA to the RUN/SS pin. The additional current prevents MOSFET capacitance, among other factors. The loss
the discharge of CSS during a fault and also shortens the is significant at input voltages above 20V and can be
soft-start period. Using a resistor to VIN as shown in Fig- estimated from:
ure 5a is simple, but slightly increases shutdown current. Transition Loss ≅ (1.7A–1) VIN2 IOUT CRSS f
Connecting a resistor to INTVCC as shown in Figure 5b
eliminates the additional shutdown current, but requires 3. INTVCC current. This is the sum of the MOSFET driver
a diode to isolate CSS. Any pull-up network must be able and control currents. This loss can be reduced by sup-
to pull RUN/SS above the 4.2V maximum threshold of the plying INTVCC current through the EXTVCC pin from a
latchoff circuit and overcome the 4µA maximum discharge high efficiency source, such as an output derived boost
current. network or alternate supply if available.

3610ff

15
LTC3610
Applications Information
4. CIN loss. The input capacitor has the difficult job of filtering Selecting a standard value of 0.82µH results in a maximum
the large RMS input current to the regulator. It must have ripple current of:
a very low ESR to minimize the AC I2R loss and sufficient 2.5V ⎛ 2.5V ⎞
capacitance to prevent the RMS current from causing ΔIL = 1– = 4.4A
( 550kHz ) ( 0.82µH) ⎜⎝ 12V ⎟⎠
additional upstream losses in fuses or batteries.
Other losses, including COUT ESR loss, Schottky diode D1 Next, set up VRNG voltage and check the ILIMIT. Tying VRNG
conduction loss during dead time and inductor core loss to 0.5V will set the typical current limit to 16A, and tying
generally account for less than 2% additional loss. VRNG to GND will result in a typical current around 19A.
CIN is chosen for an RMS current rating of about 5A at
When making adjustments to improve efficiency, the input
85°C. The output capacitors are chosen for a low ESR
current is the best indicator of changes in efficiency. If you
of 0.013Ω to minimize output voltage changes due to
make a change and the input current decreases, then the
inductor ripple current and load steps. The ripple voltage
efficiency has increased. If there is no change in input
will be only:
current, then there is no change in efficiency.
ΔVOUT(RIPPLE) = ΔIL(MAX) (ESR)
Checking Transient Response = (4.4A) (0.013Ω) = 57mV
The regulator loop response can be checked by looking However, a 0A to 10A load step will cause an output
at the load transient response. Switching regulators take change of up to:
several cycles to respond to a step in load current. When
ΔVOUT(STEP) = ΔILOAD (ESR) = (10A) (0.013Ω) = 130mV
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series An optional 22µF ceramic output capacitor is included
resistance of COUT. ΔILOAD also begins to charge or dis- to minimize the effect of ESL in the output ripple. The
charge COUT generating a feedback error signal used by the complete circuit is shown in Figure 6.
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot How to Reduce SW Ringing
or ringing that would indicate a stability problem. The ITH As with any switching regulator, there will be voltage ring-
pin external components shown in Figure 6 will provide ing on the SW node, especially for high input voltages.
adequate compensation for most applications. For a The ringing amplitude and duration is dependent on the
detailed explanation of switching control loop theory see switching speed (gate drive), layout (parasitic inductance)
Application Note 76. and MOSFET output capacitance. This ringing contributes
to the overall EMI, noise and high frequency ripple. One
Design Example way to reduce ringing is to optimize layout. A good layout
As a design example, take a supply with the following minimizes parasitic inductance. Adding RC snubbers from
specifications: VIN = 5V to 24V (12V nominal), VOUT = SW to GND is also an effective way to reduce ringing. Finally,
2.5V ± 5%, IOUT(MAX) = 12A, f = 550kHz. First, calculate adding a resistor in series with the BOOST pin will slow
the timing resistor with VON = VOUT: down the MOSFET turn-on slew rate to dampen ringing,
1 but at the cost of reduced efficiency. Note that since the
RON = = 182k IC is buffered from the high frequency transients by PCB
( 550kHz )(10pF )
and bondwire inductances, the ringing by itself is normally
and choose the inductor for about 40% ripple current at not a concern for controller reliability.
the maximum VIN:
2.5V ⎛ 2.5V ⎞
L= 1− = 0.86µH
(550kHz )(0.4)(12A ) ⎜⎝ 28V ⎟⎠
3610ff

16
LTC3610
Applications Information
INTVCC

VIN
CF RF1
CVCC 0.1µF 1Ω
4.7µF 25V
6.3V SW
GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
1 48
PGND SGND EXTVCC
2 47 C4
PGND SGND
0.01µF
3 46 (OPTIONAL)
PGND SGND
VOUT R1 R2
4 45
2.5V AT SW SGND 9.5k C1 30.1k C2
12A L1 5 44 1% 1%
C5 COUT1 + 0.8µH SW EXTVCC (OPTIONAL) VOUT
22µF 220µF 6 43
SW VFB RON
6.3V 2×
7 42 182k
SW SGND
(OPTIONAL) 1%
8 41
GND SW ION VIN
9 LTC3610 40 CON
SW SGND (OPTIONAL) CC1
10 39 0.01µF
R5 470pF
SW FCB
11 38 31.84k
SW ITH
VIN VIN 12 37
PVIN VRNG
5V TO 24V GND 13 36 R3
PVIN PGOOD
CIN C6 + 14 35 0Ω
10µF 10µF PVIN VON CC2
35V 35V 15 34 RPG1 C3
PVIN SGND 100k 100pF
3× 16 33
(OPTIONAL)
PVIN
RUN/SS
BOOST
SGND

SGND
SGND

RVON
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN

INTVCC (OPTIONAL)
SW
NC


VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
SW RSS1 3610 F06
510k
CIN: TAIYO YUDEN GMK325BJ106MM-B INTVCC VIN
COUT: SANYO 10TPE220ML CB1 CSS
L1: CDEP85NP-R80MC-50 DB (OPTIONAL)
0.22µF 0.1µF
C5: MURATA GRM31CR60J226KE19 CMDSH-3
SW

Figure 6. Design Example: 5V to 24V Input to 2.5V/12A at 550kHz

PC Board Layout Checklist • Ground connections (including LTC3610 SGND and


PGND) should be made through immediate vias to
When laying out a PC board follow one of the two sug-
the ground plane. Use several larger vias for power
gested approaches. The simple PC board layout requires
components.
a dedicated ground plane layer. Also, for higher currents, a
multilayer board is recommended to help with heat sinking • Use a compact plane for the switch node (SW) to improve
of power components. cooling of the MOSFETs and to keep EMI down.
• The ground plane layer should not have any traces and • Use planes for VIN and VOUT to maintain good voltage
it should be as close as possible to the layer with the filtering and to keep power losses low.
LTC3610.
• Flood all unused areas on all layers with copper. Flood-
• Place CIN and COUT all in one compact area, close to ing with copper reduces the temperature rise of power
the LTC3610. It may help to have some components components. Connect these copper areas to any DC
on the bottom side of the board. net (VIN, VOUT, GND or to any other DC rail in your
system).
• Keep small-signal components close to the LTC3610.

3610ff

17
LTC3610
Applications Information

CVCC
SW

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
1 48
PGND SGND
2 47
PGND SGND
3 46
PGND SGND
4 45 R1
SW SGND
5 44
COUT SW EXTVCC
6 43 R2
SW VFB
7 42
SW SGND RON
8 41
SW ION
VOUT 9 LTC3610 40
SW SGND
10 39 CC1
SW FCB RC
11 38
SW ITH
12 37
PVIN VRNG
13 36
PVIN PGOOD
14 35
CIN PVIN VON
15 34
PVIN SGND CC2
16 33
PVIN
RUN/SS
BOOST
SGND

SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
SW
NC

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

DB
CB CSS
RF
3610 F07

Figure 7. LTC3610 Layout Diagram

When laying out a printed circuit board without a ground • Keep the high dV/dT SW, BOOST and TG nodes away
plane, use the following checklist to ensure proper opera- from sensitive small-signal nodes.
tion of the controller. These items are also illustrated in • Connect the INTVCC decoupling capacitor, CVCC, closely
Figure 7. to the INTVCC and PGND pins.
• Segregate the signal and power grounds. All small- • Connect the top driver boost capacitor, CB, closely to
signal components should return to the SGND pin at
the BOOST and SW pins.
one point, which is then tied to the PGND pin.
• Connect the VIN pin decoupling capacitor, CF, closely
• Connect the input capacitor(s), CIN, close to the IC. to the VIN and PGND pins.
This capacitor carries the MOSFET AC current.

3610ff

18
LTC3610
Typical Applications
3.3V Input to 1.5V/12A at 750kHz
INTVCC
VIN2 = 5V

CF
CVCC 0.1µF
4.7µF 25V
6.3V SW
GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
1 48
PGND SGND EXTVCC
2 47 C4
PGND SGND
0.01µF
3 46 (OPTIONAL)
PGND SGND
VOUT R2
4 45 R1
1.5V AT SW SGND C1 30.1k C2
L1 20.43k
12A 5 44 1%
C5 COUT1 + 0.36µH SW EXTVCC 1%
(OPTIONAL) VOUT
22µF 220µF 6 43
SW VFB RON
6.3V 2×
7 42 113k
SW SGND
(OPTIONAL) 1%
8 41
GND SW ION VIN
9 LTC3610 40 CON
SW SGND
10 39 0.01µF (OPTIONAL) CC1
R5 470pF
SW FCB
11 38 11.15k
SW ITH
VIN VIN 12 37
PVIN VRNG
3.3V GND 13 36
PVIN PGOOD
CIN C6 + 14 35
10µF 10µF PVIN VON CC2
3× 35V 15 34 RPG1
PVIN SGND 100k 100pF
(OPTIONAL) 16 33 INTVCC
PVIN
RUN/SS

(OPTIONAL)
BOOST
SGND

SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
SW
NC

RVON
VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
CB1 RSS1 CVON
(OPTIONAL) 3610 TA02
0.22µF 510k
CIN: TAIYO YUDEN TMK432BJ106MM INTVCC VIN
COUT1: SANYO 10TPE220ML CSS
L1: TOKO FDH1040-36M (OPTIONAL)
0.1µF
C5: TAIYO YUDEN JMK316BJ226ML-T

3610ff

19
LTC3610
Typical Applications
5V to 24V Input to 1.2V/12A at 550kHz
INTVCC

VIN
CF RF1
CVCC 0.1µF 1Ω
4.7µF 25V
6.3V SW
GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
1 48
PGND SGND EXTVCC
2 47 C4
PGND SGND
0.01µF
3 46 (OPTIONAL)
PGND SGND
VOUT R1 R2
4 45
1.2V AT SW SGND 30k C1 30.1k C2
12A L1 5 44 1% 1%
C5 COUT1 + 0.52µH SW EXTVCC
(OPTIONAL) VOUT
22µF 220µF 6 43
SW VFB RON
6.3V 2×
7 42 301k
SW SGND
(OPTIONAL) 1%
8 41
GND SW ION VIN
9 LTC3610 40 CON
SW SGND
10 39 0.01µF (OPTIONAL) CC1
R5 470pF
SW FCB
11 38 31.84k
SW ITH
VIN VIN 12 37
PVIN VRNG
5V TO 24V GND 13 36
PVIN PGOOD
CIN C6 + 14 35
10µF 10µF PVIN VON CC2
25V 35V 15 34 RPG1
PVIN SGND 100k 100pF
3× 16 33
(OPTIONAL) INTVCC
PVIN
RUN/SS
BOOST
SGND

SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
SW
NC

RVON
VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
SGND
CB1 RSS1 CVON
(OPTIONAL) 3610 TA03
0.22µF 510k
C5: TAIYO YUDEN JMK316BJ226ML-T INTVCC VIN
CIN: TAIYO YUDEN TMK432BJ106MM CSS
COUT1: SANYO 10TPE220ML DB (OPTIONAL)
0.1µF
L1: WURTH 744310055 CMDSH-3

3610ff

20
LTC3610
Typical Applications
5V to 24V Input to 1.8V/12A All Ceramic 1MHz

INTVCC

VIN
CF RF1
CVCC 0.1µF 1Ω
4.7µF 25V
6.3V SW
GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
1 48
PGND SGND EXTVCC
2 47 C4
PGND SGND
0.01µF
3 46 (OPTIONAL)
PGND SGND
VOUT R1 R2
4 45
1.8V AT SW SGND 10k C1 20k C2
12A L1 5 44 1% 1%
C5 COUT 0.47µH SW EXTVCC (OPTIONAL) VOUT
22µF 100µF 6 43
SW VFB RON
6.3V 2×
7 42 102k
SW SGND
(OPTIONAL) 1%
8 41
GND SW ION VIN
9 LTC3610 40 CON
SW SGND
10 39 0.01µF (OPTIONAL) CC1
R5 560pF
SW FCB
11 38 18.7k
SW ITH
VIN VIN 12 37
PVIN VRNG
5V TO 24V
13 36
PVIN PGOOD
CIN 14 35
10µF PVIN VON CC2
25V 15 34 RPG1
PVIN SGND 100k 100pF
3× 16 33
PVIN INTVCC
RUN/SS

(OPTIONAL)
BOOST
SGND

SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
SW
NC

RVON
VOUT
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
CB1 RSS1 CVON
(OPTIONAL) 3610 TA04
0.22µF 510k
COUT: TAIYO YUDEN JMK325BJ107MY INTVCC VIN
L1: TOKIN MPLC0730 CSS
C5: TAIYO YUDEN JMK316BJ226ML-T DB (OPTIONAL)
0.1µF
CMDSH-3

3610ff

21
WP Package
64-Lead QFN Multipad (9mm × 9mm)
(Reference LTC DWG
WP# Package
05-08-1812 Rev A)

22
64-Lead QFN Multipad (9mm × 9mm)
(Reference LTC DWG # 05-08-1812 Rev A)

SEATING PLANE
1.39 3.30
A
LTC3610

9.00 0.00 – 0.05 0.50


1.19 49 50 51 52 53 54 64
BSC 0.20 REF
B 0.30 – 0.50
1.92 48 0.53 1
PAD 1 2.01 (2x) 3.50 0.87
CORNER 1.17
3.06

0.30
(2x)
2.98
0.95
5
4.53 3.60

9.00
Package Description

BSC 1.30
1.81
4.10

bbb M C A B
3.30

NX b 3.99 2.04

33

aaa C 2x
16
WP64 QFN REV A 0707

32 17

aaa C 2x TOP VIEW 0.20 – 0.30 1.42 3.85


0.90 ± 0.10
NX
// ccc C 0.08 C BOTTOM VIEW
(BOTTOM METALLIZATION DETAILS)
6
3.30 1.39
0.50 1.19

0.30 – 0.50
PIN 1 0.53 1.92
0.87 3.50 (2x) 2.01 NOTE:
1.17 3.06 1. DIMENSIONING AND TOLERANCING CONFORM TO ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES (°)
3. N IS THE TOTAL NUMBER OF TERMINALS
0.30
(2x) 4. THE LOCATION OF THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING
2.98 CONVENTION CONFORMS TO JEDEC PUBLICATION 95 SPP-002
0.95
5 DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED
3.60 4.53 BETWEEN 0.15mm AND 0.30mm FROM THE TERMINAL TIP.
6 COPLANARITY APPLIES TO THE TERMINALS AND ALL OTHER SURFACE
METALLIZATION
1.30
1.81
2.30 4.10 SYMBOL TOLERANCE
3.30
aaa 0.15
bbb 0.10
2.04 3.99 ccc 0.10

3.85 1.42 0.20 – 0.30

RECOMMENDED SOLDER PAD LAYOUT


TOP VIEW

3610ff
LTC3610
Revision History (Revision history begins at Rev F)

REV DATE DESCRIPTION PAGE NUMBER


F 07/10 I-grade part added. Reflected throughout the data sheet. 1 to 24

3610ff

23
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3610
Typical Application
14V to 24V Input to 12V/5A at 500kHz
CVCC
4.7µF INTVCC VIN
6.3V CF RF1
0.1µF 1Ω
25V
SW
GND

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
SW
INTVCC
INTVCC
SVIN
SVIN
SGND
SGND
1 48
PGND SGND EXTVCC
2 47 C4
PGND SGND
0.01µF
3 46 (OPTIONAL)
PGND SGND
VOUT R1 R2
4 45
12V AT SW SGND 1.58k C1 30.1k C2
5A L1 5 44 1% 1%
C5 COUT + 5.7µH SW EXTVCC (OPTIONAL) VOUT
22µF 180µF 6 43
SW VFB RON
25V 16V
7 42 1M
SW SGND
(OPTIONAL) 1%
8 41
GND SW ION VIN
9 LTC3610 40 CON
SW SGND
10 39 0.01µF (OPTIONAL) CC1
R5 560pF
SW FCB
11 38 20k
SW ITH
VIN VIN 12 37
PVIN VRNG
14V TO 24V GND 13 36
PVIN PGOOD
CIN C6 + 14 35
10µF 10µF PVIN VON CC2
25V 35V 15 34 RPG1
PVIN SGND 100k 100pF
3× 16 33
(OPTIONAL) INTVCC
PVIN
RUN/SS

(OPTIONAL)
BOOST
SGND

SGND
SGND
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
PVIN
SW
NC

RVON
INTVCC
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SGND
CB1 RSS1 CVON
(OPTIONAL) 3610 TA05
0.22µF 510k
CIN: TAIYO YUDEN TMK432BJ106MM INTVCC VIN
COUT: SANYO 16SVP180MX CSS
DB (OPTIONAL)
L1: SUMIDA CDEP1055R7 0.1µF
CMDSH-3 RUN/SS

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3610ff

24 Linear Technology Corporation


LT 0710 REV F • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417


(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2007