IEEE Transactions on Energy Conversion, Vol. 6 , No.
3, Septcmber 1991
FREQUENCY MEASUREMENT FOR USE WITH A MICROPROCESSOR-BASED
WATER TURBINE GOVERNOR
O.P.Malik, G.S.Hope, G.C.Hancock
Dept. of Electrical Eng.
Univ. of Calgary
Calgary, Alberta
Canada T2N 1N4
Keywords: Frequency measurement; Governor; Microprocessor-based
ABSTRACT
A digital frequency measurement approach and its
implementation for use i n conjunction with a duplex
fault-tolerant microprocessor-based governor for water
turbine i s described i n t h i s paper. The proposed
approach h a s a wide measuring range as well a s high
resolution and f a s t response. The circuitry and t h e
software are very simple. The interface to t h e
generating plant i s direct and simple. Due t o t h e direct
measurement of t h e frequency instead of speed, i t can
a d a p t t o a n y plant without changes to either t h e
hardware or t h e software. Results i n an actual power
system environment h a v e proven t h a t t h e proposed
measurement technique can very well meet the
requirements of speed control i n electric power systems.
I INTRODUCTION
One of t h e most important indices of t h e quality of
electrical energy i s frequency. I t s measurement plays a
fundamental role in t h e regulation performance. In t h e
specification of t h e hydro turbine control system (Fig.
l ) , t h e r e a r e three indices which a r e directly related to
t h e speed/frequency measurement [1,21:
(i) speed fluctuation for no-load operation must
be equal to or less t h a n f0.15%.
(ii) speed dead-band (i,) must be smaller t h a n
0.02%.
(iii) dead-time of main servo-motor for t h e
rejections of 210% load (Tq) must be smaller t h a n 0.2
S.
According to the indices listed above and
considering t h e dead-band of t h e servo-mechanical
mechanism, t h e resolution of t h e speed/frequency
measurement must be less t h a n 0.02%. Also, t h e
response speed should be less t h a n 0.2 s. In addition,
t h e speed/frequency measurement should h a v e wide
range for improving s t a r t - u p , shut-down and load
rejection performance.
The conventional measurement techniques can
hardly meet all these requirements a t one time. In t h e
l a s t decade, microprocessor based techniques h a v e
appeared as strong rivals in both control and
measurement applications and the conventional
speed/frequency measurement i s being replaced by
digital means.
Generally, speed signal h a s been employed in t h e
speed governors (3.41. Many good digital techniques to
91 WM 140-4 EC A paper recommended and approved
by the IEEE Energy Development and Power Generation
Committee of the IEEE Power Engineering Society for
presentation at the IEEE/PES 1991 Winter Meeting,
New York, New York, February 3 - 7 , 1991. Manuscript
submitted January 26, 1990; made available for
printing January 22, 1991.
0885-8969/91/0900-0361$01.~~ 1991 IEEE
36 1
Li Zhaohui. Ye Luqing, Wei Shouping
Dept. of Electrical Eng.
Huazhong Univ. of Science & Tech.
Wuhan, Hubei 430074
P.R. China
FREQUEN
SET CO"ERNoR -
1
governor.
TURBINE-
GENERATOR UNIT
- POWER
SYSTEM
I I
Figure 1 Frequency Regulation in Electric Power
Systems
measure speed have been developed [5,6,7]. In speed
measurement, a special purpose sensor, such as an optical disc,
a magnetic pickup or a tacho generator, has to be installed on
the generating unit's rotor [5,7]. It rotates with the rotor and
converts a speed signal to an electrical signal for the digital
measuring device. The quality of performance of the
transducer is largely due to the high performance of digital
techniques. The cost of a good transducer is usually high.
Moreover, the parameters used in the measurement transducer
have to be changed to match the speed of each individual
instclllation. This can make the field installation inconvenient.
Many purely digital frequency measurement
techniques for electric power systems have been
proposed [8,9,10.11]. However, most of them a r e
designed for pure measurement or protection purposes,
and a r e generally not suited to meet the special
demands of governor application.
A digital frequency measurement approach specially
designed for t h e speed governors i s proposed in t h i s
paper. This approach h a s been successfully applied t o
12 speed governors for water turbines (include 1 1
governors installed in 7 hydro power s t a t i o n s (121)
since 1984 when the first microprocessor-based
governor was put into operation i n Ouyanghai hydro
power s t a t i o n i n China. T e s t results I121 of a l l these
governors h a v e shown t h a t this frequency measurement
approach can very well meet t h e requirement of speed
control in electric power systems.
This approach h a s also been adopted in t h e
research prototype of a highly reliable fault-tolerant
water turbine governor jointly developed by t h e
department of electrical engineering, t h e University of
Calgary, and t h e department of electrical engineering,
Huazhong University of Science and Technology
[12,13,14]. This research prototype is planned t o be
tested in a hydro power s t a t i o n in June 1990. The
frequency measurement principle i s presented in section
2. The hardware and t h e software implementation of
frequency measurement integrated into this research
prototype a r e described in section 3 and section 4
respectively. The performance and t e s t results a r e
presented in section 5.
I1 PRINCIPLE OF FREQUENCY MEASUREMENT
A s i s well known, t h e timing characteristic of a n
alternating signal can be described either in frequency
(f) or by period (T). From t h e viewpoint of digital
measurement, t h e frequency and t h e period can be
defined as below:
Definition 1: The frequency of a n alternating signal i s
t h e number of times t h e signal crosses zero level from
-__-
362
negative to positive (or from positive t o negative) in a
u n i t time (e.g. per second).
D e f i n i t i o n 2 The period of a n alternating signal i s t h e
time t h e signal t a k e s from one zero-level crossing to
t h e n e x t zero-level crossing i n t h e same direction.
The period i s inversely proportional to the
frequency. Obviously, t h e frequency of a n alternating
signal can be obtained i n two ways based on t h e two
definitions above:
1) Counting t h e number of times of zero-level
crossing i n t h e same direction in a u n i t time. The
frequency, f , equals t h i s number.
2) Measuring t h e time, T. from one zero-level
crossing to t h e n e x t zero-level crossing in t h e same
direction. The frequency i s t h e n equal t o 1/T.
The f i r s t method i s ideal for measuring high
frequency with slow change. Generally, t h e second
method is more s u i t a b l e for low frequency. The
frequency of electric power systems i s low. Moreover,
its change i n two consecutive cycles can be relatively
f a s t . Therefore, t h e second method is more suitable for
t h i s application IS]. Basically, t h e idea is t o use one
crossing of zero level from negative t o positive (or
from positive t o negative) t o start a "stopwatch" and
t o use t h e n e x t zero-crossing i n t h e same direction t o
stop t h e "stopwatch", and so on. The time shown on t h e
"stopwatch" i s t h e period T. Then f equals 1/T. With
microprocessor t h i s conversion i s very simple.
The principle of t h i s frequency measurement
approach i s shown i n Fig. 2. A voltage comparator iS
used to shape t h e a l t e r n a t i n g signal to a logic signal
(square wave). Then t h e frequency is divided by 2. The
t r u e output of t h e divider i s connected t o t h e control
input of t h e timer ( t h i s control input is called gate
signal on Intel programmable interval timer 8253/8254).
A t t h e rising edge of t h e g a t e signal, t h e timer s t a r t s
timing. A t t h e falling edge, t h e timer stops timing and
outputs t h e timing r e s u l t . The output of the timer is
t h e period. The period i s converted t o frequency.
Figure 2 Principle o f F r e q u e n c y Measurement
Theoretically, t h e positive half wave and the
negative half wave of t h e voltage (or t h e current) in
a n electric power system should be symmetrical. The
output of t h e voltage comparator could be used a s t h e
g a t e signal of t h e timer and t h e output of t h e timer i s
one half period. However, t h i s condition can not always
be relied upon i n t h e practical systems because of t h e
possibility of physical asymmetry among t h e armatures
of generators and t h e flotation of neutral point in t h e
electric power system.
I11 HARDWARE IMPLEMENTATION
The circuitry for the frequency nieasurenient is shown i n
Fig. 3. It is adapted to an Intel 8086 microprocessor-based
system. With a slight change, it can also be adapted to other
1nicroprocessor-b;ised systems. The numbers in circles i n this
figure relate to Fig. 3 which shows the secpentid operation of
the device.
The original signal is from the potential
transformer ( p t ) connected t o t h e terminals of t h e
generator. This signal i s f i r s t fed t o a n isolation
transformer to isolate t h e digital side. Then t h e
isolated signal goes through a filter and a voltage
limiter. The filter removes t h e high frequency harmonics
from t h e signal. The voltage limiter plays a very
important role. The governor n o t only measures t h e
frequency during t h e normal generation operation but
also h a s t o measure t h e frequency during t h e s t a r t - u p
and shut-down operations. During t h e start-up, t h e
output voltage is produced by t h e residual magnetism
from previous excitation and is v e r y low. The ratio of
t h e isolation transformer should be small. But a f t e r t h e
s t a r t - u p and t h e excitation of t h e generator, t h e
output voltage of t h e generator goes up t o t h e normal
value and t h e o u t p u t voltage of t h e p t is 220V (or
1lOV). So t h e voltage limiter i s necessary i n t h i s case.
The limited signal (point 2 i n Fig. 3) i s shaped by
a low offset voltage comparator. The output of t h e
comparator (point 3 i n Fig. 3) i s a square wave. It can
be adapted t o TTL or CMOS circuitry. Then t h e
frequency i s divided by 2. The divider is composed of a
D flip-flop. The t r u e output of t h e D flip-flop (point 4
in Fig. 3 ) goes t o t h e Gate pin of t h e timer (Intel
8253/8254). I t s rising edge s t a r t s t h e timer and t h e
falling edge stops t h e timer. During t h e timing, t h e
timer counts t h e pulse of t h e Clk (point 1 in Fig. 3, a
constant high frequency signal generated by a crystal).
The false output of t h e D flip-flop (point 5 in Fig.
3 ) is connected to t h e i n t e r r u p t controller (Intel 8259).
The falling edge of t h e t r u e output of t h e D flip-flop
happens a t t h e same time a s t h e rising edge of t h e
false output of t h e same D flip-flop. So t h e
microprocessor is interrupted ( point 7 i n Fig. 3) as
soon as t h e timer i s stopped. The microprocessor picks
up t h e timing result and reloads t h e timer, and s o on.
The timer used is a 16-bit device. The lowest
frequency which can be measured by t h i s transducer is:
f1=fc/65535 (1)
where, fc i s t h e clock frequency.
A wide frequency measuring range iS very
important for improving t h e performance of t h e s t a r t - u p
and t h e shut-down of t h e generating unit. The
measuring range can be extended in two ways. One iS
t o use two channels of Intel 8253/8254 for t h e
measurement of each frequency. The two channels
(channel 1 and 2) a r e connected serially t o form a 32-
b i t timer, e.g. t h e Out pin of channel 1 is connected t o
t h e Clk pin of channel 2 and t h e two Gate pins a r e
tied together.
Another way is t h e method used in t h i s paper (Fig.
3). The Out signal of t h e timer (point 6 in Fig. 3) is
connected t o t h e i n t e r r u p t controller. When t h e timer
overflows, t h e microprocessor adds 1 t o a n extending
counter i n RAM and reloads t h e timer. In t h i s way. t h e
lowest frequency which can be measured by t h i s
circuitry mainly depends on t h e voltage output of t h e
generator, e.g. if t h e voltage output of t h e generator is
high enough, i t c a n measure frequency as low as
desired.
Generally, higher resolution can be obtained with
higher clock frequency. But t h e Out i n t e r r u p t should
not happen around t h e supply frequency because:
(i) i n a r e a l time controller, t h e i n t e r r u p t is
disabled during t h e execution of some important
programs. So TI (Figure 4) i n eqn. (2) below c a n not be
determined very accurately.
(ii) t h e i n t e r r u p t is one of t h e entries of external
disturbances t o t h e microprocessor.
(iii) t h e time i s a very critical resource i n a real-
time control system. Too frequent interrupts a r e not
expected.
If no Out i n t e r r u p t happens over 45.00 Hz, t h e
highest clock frequency i s about 2.95 MHz. The fc i n
t h e research prototype i s 1193181 Hz (CPU clock/4).
The operation of t h e timer described above shows
t h a t the frequency measurement is executed once every
two cycles. It can be easily modified t o one
measurement per cycle by using two timers. One
 363

PROGRAMMABLE
LOW OFFSET
VOLTAGE FREQUENCY TIMER
DIVIDER
-r @
r-------i COMPARATOR
t
FROM

z
P.T. TRANSFORMER. I
- T
I VOLTAGE
I LIMITER I
L ---_--_ J

Figure 3 Hardware Diagram of Frequency Measurement in Governor

- I

Before t h e generator synchronizing circuit breaker

i s closed, for f a s t synchronization with t h e electrical
network t h e governor regulates t h e speed of t h e
generating u n i t according t o t h e network frequency (if
t h e network frequency is normal) instead of t h e
frequency set point. Therefore, the governor h a s to
measure t h e network frequency as well. The circuitry is
t h e same as t h a t for t h e generator frequency except
t h e Out interrupt. Normally, t h e network frequency is
around 60 Hz (or 60 Hz). So, t h e Out interrupt is not
necessary for t h e measurement of network frequency.
In t h e research prototype, there a r e independent
measurement mechanisms for generator frequency and
network frequency on each subsystem as shown i n Fig.
5. From reliability consideration, there a r e four
isolation transformers and each of them is connected t o
a different pt.

IV SOFTWARE IMPLEMENTATIONIN DUPLICATE

Figure 4 Sequential Operation of Waveform in
Frequency Measurement
possibility is t o use one timer t o measure t h e positive
half period and another t o measure t h e negative half
period, and t h e n t o sum t h e output of t h e two timers
as t h e period of a whole cycle. Another method i s t o
use two timers t o a l t e r n a t e l y measure t h e period and
then t o combine t h e o u t p u t of t h e two timers together.
In t h e f i r s t method, t h e two timers a r e connected t o
t h e output of t h e voltage comparator and its logic
'not'. In t h e second approach, one of t h e two timers i s
connected t o t h e t r u e o u t p u t of t h e divider and t h e
other i s connected t o t h e false output of t h e divider.
OF NETWORK
SUBSYSTEM1
1
MICROPROCESSOR-BASED GOVERNOR
In t h e duplex microprocessor-based governor, each
subsystem h a s its own frequency measurement hardware.
In t h i s section, t h e software for frequency calculation,
error detection and f a u l t tolerance is discussed.
1. Initialization of Timer and of Interrupt Controller:
The channels of the timer for frequency
measurement a r e s e t i n mode 0. The maximun counting
value OOOOH i s loaded a t t h e beginning and t h i s value
i s reloaded a t each falling edge of t h e Gate signal ( t h e
end of t h i s sampling period) for t h e next sampling
period.
While t h e frequency measured is below fi, t h e Out
interrupt will occur. A t each rising edge of t h e Out
signal, t h e corresponding channel i s reloaded with a
value X. This value i s obtained from t h e following
formula:
X = l O O O O H - Hex(Ti fc) (2)

Here, Ti is t h e t i m e from t h e falling edge of t h e Out

FREQUENCY signal t o i t s rising edge (Fig. 4). Ti i s estimated
OF NETWORK according to t h e number of clock pulses t h a t t h e
microprocessor t a k e s from t h e interrupt request to t h e
end of t h e o u t command of t h e high byte of X.
OF GENERATOR OUTPUT MEASUREMENT
The interrupt controller i s s e t i n t h e edge
interrupt mode. When t h e microprocessor i s ready t o
I.T. Isolation Transformer measure a frequency, t h e corresponding interrupt
Figure 6 Diagram of t h e Frequency s i g n a l Connection masking bit in t h e i n t e r r u p t controller i s reset
to Plant (unmasked).
364

2. Frequency Calculation: generator, t h e possible maximum change of t h e

frequency in time d e l t a T must be smaller t h a n
Let N represent t h e count number of t h e timer. 6.
Then t h e frequency measured is:
Supposing delta T is equal t o 1 s and f(k-1) i s t h e
f = fc/N. (3) frequency of t h e l a s t sampling cycle, t h e lower limit of
t h e frequency f ( k ) in t h i s sampling cycle is:
The software diagram for frequency calculation is
shown i n Fig. 6 . I t is a n i n t e r r u p t subroutine. Because fll = f(k-1) - 2 ' 6 / f ( k - l ) (5)
Intel 8253/8254 is down counting timer, t h e real count
value (N) i s t h e complement of t h e result (Nt) i n t h e and t h e upper limit is:
timer plus lOOOOH multiplied by t h e value (Nr) i n t h e
extending counter i n RAM. For network frequency, Nr is ful = f(k-1) + 2.6/f(k-l) (6)
always equal t o zero.
Here 2/f(k-1) is t h e time interval between these two
N = NEG(Nt)+lOOOOH*Nr (4) consecutive sampling periods. If t h e frequency measured
is wrong in m consecutive sampling periods, t h e lower
limit of t h e frequency f(k+m) can be obtained from t h e
I PUSH THE CONTENTS OF
REGISTER INTO STACK I following recurrence formula:

fii(i) = fii(i-1) - 2.6/fil(i-1) (7)

and t h e recurrence formula for t h e upper limit is:

fuiW = f u i ( i - l ) + 2'6/fui(i-1) (8)

CALCULATE THE REAL COUNTING i = l , 2, ..., m. Actually a f t e r m h a s reached a certain

f = C/N
RELOAD THE CHANNEL OF TIMER FOR
THE MEASUREMENT OF THIS FREQUENCY
value, for example 3, t h e frequency measurement is
considered faulty.
Due t o t h e short sampling period, t h i s error
detection method i s very effective. 6 can be pre-
determined according to t h e inertia of t h e generating
unit and t h e maximum operating speed of t h e guide
blade. 6 for t h e network frequency i s generally smaller
t h a n t h a t for t h e generating unit frequency. 6 should
initially be large. It can be modified on line according
to preset rules.

4. Fault Tolerance:

PERIOD ACCORDING TO THE RULES The frequency information flow in t h e duplex

PROPOSED IN SECTION 4.3
microprocessor-based governor i s shown in Fig. 7. Each
module samples t h e frequency independently and passes
t h e result ( t h e count value) t o t h e other module. It
also g e t s t h e sampling result from t h e other module. SO
there a r e two values for t h e same frequency in each

d=
module a t each sampling period. The following s t e p s a r e
adopted t o implement t h e f a u l t tolerahce of frequency
measurement in each module.
RDD 1 TO ERROR COWER
\
Step 1: The frequency input by t h i s module (fi) iS
UPDATE FREQ. IN RAM
detected. If it i s normal, clear i t s error counting and
81 RESET FAULT FLAG i t s f a u l t y flag. Otherwise, add 1 t o t h e error counter.
If t h e error counting number is larger t h e n N , a f a u l t
flag for f l i s s e t .
> SET FAULT FLAG S t e p 2 The frequency input by t h e o t h e r module
(fi) is detected. If i t i s normal, clear i t s error counting
< I and i t s f a u l t y flag. Otherwise, add 1 t o t h e error
JI counter. If t h e error counting number is larger then N,
POP THE CONTENTS BACK a fault flag for fz i s s e t .
TO REGISTERS FROM STACK Step 3: When t h e error counters for fi and fz a r e
zero, t h e frequency of t h i s sampling period in this
module is: f=(fi+fz)/2. Go to s t e p 6.
Step 4: When t h e error counter for f i is zero and
Figure 6 I n t e r r u p t Subroutine of Frequency t h a t for f2 i s a non-zero positive integer, then f=fi
Measurement and vice versa. If t h e error counters for both fi and fz
are non-zero positive integer, there is no updated f in
this sampling period.
3. Error Detection: Step 5: Display t h e f a u l t information when any
A filter is generally used in the measurement. However it f a u l t y flag h a s been s e t If both fault flags have been
usually causes considerable delay and also complicates the s e t , go to s t e p 7 .
implementation. In the duplex microprocessor-based governor, Step 6: Wait for frequency input interrupt. When
this module receives t h e frequency input interrupt, go
the error detection is used for the frequency measurement
to s t e p 1. If t h e r e is no frequency input interrupt in
instead of filter. The rule of the error detection can be time Tz. t h e two f a u l t flags will be s e t and t h e next
described as: s t e p will be executed.
Because of the inertia of the turbine and the Step 7: The alarm i s sounded and proper s t r a t e g y

is adopted 1141.
Note: 1. Each module separately d e t e c t s frequency
by use of t h e means proposed i n 3 (Error Detection).
The frequency i n p u t by subsystem i (i=1 or 2, 1
represents t h i s subsystem and 2 represents t h e other
subsystem) is detected by both subsystems. The rules
proposed i n Ref. [14] are used for t h e resolution of a n y
dispute between t h e two subsystems.
2. If t h e r e is no frequency information from
subsystem i i n a sampling period, it is treated t h e
same as wrong information.
3. Tz=r*N. where r is sampling period.
r
I SYNTHESIZINGITO NEXT
I:CALCULATION AND
I
I
Figure 7 Frequency Information Flow i n Duplex
Microprocessor-Based Governor
V PERFORMANCE AND TEST RESULTS
Test results of the frequency measurement
performance and t h e f a u l t tolerance of t h e frequency
measurement i n t h e research prototype are presented
below.
1. Resolution.
For a clock frequency of 1193181 Hz, t h e resolution
is about 0.004 percent a t 50.00 Hz. T e s t results a r e
shown i n Tab. 1.
Table 1. Resolution T e s t Results (samples i n 9 consecutive periods).
Output frequency of t h e signal generator: 60.0000 Hz(f0.0005 Hz)
Theorical count number: 23863
2. Measuring Range.
If a n 8-bit extending counter is set i n RAM, t h e
low limit of t h e measuring range is about 0.1 Hz. I t s
high limit i s about 119 Hz with 0.01 percent resolution.
However, in t h i s special application t h e low limit
depends on t h e voltage of t h e input signal ( a s
discussed in section 3).
Test 1 . Low voltage signal input t e s t .
Test s t e p and result: Using a sine signal generator,
t h e output frequency was s e t a t 10 Hz and t h e output
voltage of t h e signal generator was adjusted. For t h e
output of t h e isolation transformer larger t h a n 0.12 V,
t h e measurement was stable. When t h i s voltage was
under 0.08 V, t h e measurement failed.
365
Test 2. High voltage signal input t e s t .
Test s t e p and result: Connecting t h e isolation
transformer t o a.c. power source v i a a n adjustable
transformer, t h e voltage of t h e isolation transformer
was raised up t o 220 V. The measurement circuitry
worked normally.
3. The Speed of Response.
The speed of response of t h e measurement is
dependent upon t h e frequency measured. I t i s equal t o
n If
LII.
4. Fault Tolerance Test.
Test 1 . The failure of t h e frequency measurement
of t h e on-line subsystem.
Initial s t a t e : t h e frequency measurements of both
subsystems were operating normally. Subsystem A was
t h e on-line subsystem and subsystem B was standby.
Test s t e p s and phenomena: 1) The frequency signal
t o subsystem A was c u t off b u t it remained t h e on-line
subsystem. Display indicated t h e frequency measurement
of subsystem A as faulty. 2 ) The frequency was t h e n
changed. The control output of t h e system, i.e. t h e
o u t p u t of subsystem A, responded correctly.
Test 2. The failure of t h e frequency measurement
on t h e standby subsystem.
Initial state: same as Test 1.
Test s t e p s and phenomena: 1) The frequency signal
t o subsystem B was c u t off. Subsystem A remained t h e
on-line subsystem. Display indicated t h e frequency
measurement of subsystem B as faulty. 2 ) The
frequency was changed. The control output of
subsystem B responded correctly.
Test 3. The generator frequency measurement on
t h e on-line subsystem failed and t h e network frequency
measurement on t h e s t a n d b y subsystem failed (or vice
versa).
Initial s t a t e : same a s Test 1.
Test s t e p s and phenomena: 1) The generator
frequency signal t o subsystem A and t h e network
frequency signal t o subsystem B were c u t off.
Subsystem A remained t h e on-line subsystem. Display
indicated t h e generator frequency measurement Of
subsystem A and t h e network frequency measurement Of
subsystem B a s f a u l t y . 2 ) Both generator frequency and
network frequency were changed. The control Outputs of
two subsystems responded correctly.
Test 4. The generator frequency measurement Of
both subsystems failed.
Initial s t a t e : same as Test 1.
Test step and phenomenon: The generator's
frequency t o both subsystems w a s c u t off. The alarm
w a s sounded and t h e governor moved t o manual
operation s t a t e .
Test 5. Frequency measurement recovery from fault.
T e s t s t e p and phenomenon: With t h e system i n one
of t h e 4 f a u l t y s t a t e s simulated in Tests 1-4, t h e
signal(s) was reconnected. The system went back t o t h e
initial s t a t e .
5. Error Detection. Transactions on Power Apparatus a n d Systems, Vol.
PAS-104, Feb. 1985, pp. 437-443.
T e s t s t e p a n d phenomena: With t h e governor
operating i n s t a b l e s t a t e , intermittent electromagnetic 11. A.Mackay a n d G.W.Swift "A High Speed Transducer
disturbances were induced around t h e measurement for Power System Phase a n d Frequency" Paper C A77-
circuitry. The o u t p u t of frequency divider a n d t h e 202-5, IEEE Winter Power Meeting, New York, 1977.
control o u t p u t of t h e system were observed. When t h e
o u t p u t of t h e frequency divider was obviously 12. YE Luqing, WE1 Shouping, LI Zhaohui, 0.P.Malik &
disturbed, t h e control o u t p u t s t i l l remained stable. G.S.Hope "Field T e s t a n d Operation of a Duplicate
The above t e s t r e s u l t s show t h a t t h e frequency Multiprocessor-based Governor for Water Turbine and
measurement i n t h e research prototype of t h e duplex Its Further Development" Accepted for presentation at
fault-tolerant governor has met the design IEEE PES 1990 Winter Meeting.
specifications.
13. 0.P.Malik. G.S.Hope, Ye Luqing, Wei Shouping and Xu
Haibo "An Intelligent Self-Improving Control Strategy
VI CONCLUSIONS with a Variable S t r u c t u r e and Time-Varying Parameters
The frequency measurement technique proposeed in this for Water Turbine" Revue Generale d e I'ElectricitC,
Paris, No.4, 1989, pp. 23-35.
paper has wide measuring range, fast response and high
resolution. It is specially designed for digital governors. It can 14. Li Zhaohui, Ye Luqing, Wei Shouping, O.P.Malik,
also be used in other applications where the frequency G.S.Hope, G.C.Hancock "Fault Tolerance Aspects of a
measurement of the electric power is needed. One such Microprocessor-Based Governor for Water Turbine" in
application example, an Intelligent Frequency Measurement preparation.
Meter for Electric Power Industry developed by a Chinese
electronics manufacturer is based on this frequency 0. P. Malik (M'66 - SM'69 - F'87) graduated in electrical
measurement technique. This meter is implemented in an Intel engineering from Delhi Polytechnic, India, in 1952 and obtained the
single chip microprocessor. M.E. degree from the University of Roorkee, in 1962. In 1965 he
received the Ph.D. degree from the University of London, and D.I.C.
from the Imperial College, London, England. From 1952 to 1961 he
REFERENCES worked with electric utilities in India on various aspects of design,
construction, and operation of power systems. At present he is at The
1. Technical Committee N0.4: Hydraulic Turbine, University of Calgary.
International Electrotechnical Commission "Specification
of Hydro-turbine Governor" 1973, Geneva.
G.S. Hope (S'56 - M'67 - SM'72) He received the B.Sc. degree
2. Technical Committee No.4: Hydraulic Turbine, in electrical engineering from the University of Alberta, Edmonton,
International Electrotechnical Commission "Draft Guide Canada; the Ph.D. and D.I.C. degrees in electrical engineering from
t o Specifications of Hydro-turbine Control System" June Imperial College, University of London, London, England, in 1957 and
1986, Geneva. 1966, respectively. He joined The University of Calgary, in 1967; at
present, he holds the rank of Professor.
3. L.E.Eilts, F.R.Schleif "Governing Features and
Performance of t h e First 600-MW Hydrogenerating Unit Garwin C. Hancock received a diploma in electronics technology
at Grand Coulee" IEEE Transaction on Power Apparatus from the Southern Alberta Institute of Technology, Calgary in 1973.
and Systems, Vol. PAS-96, March/April 1977, pp. During 1973-74 he was employeed the University of Alberta as an
457-466. electronics technician. In 1974, he joined the Department of Electrical
Engineering at The University of Calgary and has been involved with
4. ACEC DESCRIPTION "A NEW GENERATION SPEED electronic and power electronic circuit design.
GOVERNOR: ACEC-MemoRHY FOR WATER TURBINE" NDA
557-00.30;
LI Zhaohui received [he Master degree from Huazhong University
5. D.W.Huber, 0.P.Malik a n d G.S.Hope "A Digital Device of Science and Technology (HUST) in 1987. He is currently a Ph.D.
t o Measure Angular Speed a n d Torque Angle" IEEE student co-guided by the Department of Electrical Engineering of
Transactions on Industrial Electronic and Control HUST and U. of C.
Instrumentation, Vol. IECI-22, May 1975, pp. 186-188.

6. O.P.Malik, G.S.Hope a n d J.James "Digital Angular
Speed Measurement Using Waveform Sampling" IEEE
Transactions on Industrial Electronics, Vol. IE-29, Feb.
1982, pp. 56-66.
7. S.I.Ahson a n d M.H.Ali "A Microprocessor-Based
Scheme for Torque- Angle a n d Speed Measurement of
Synchronous Machine" IEEE Transaction on Industrial
Electronics, Vol. IE-34, May 1987, pp. 135-138.
8. P.N.Neild "Method of Measuring Power System
Frequencies" Proc. IEE, Vol. 117, J a n . 1970, pp.
157-160.
9. C.T.Nguyen, K,Srinivasan "A New Technique for Rapid
Tracking of Frequency Deviations Based on Level
Crossing" IEEE Transactions on Power Apparatus and
Systems, Vol. PAS-103, Aug. 1984, pp. 2230-2236.
YE Luqing graduated from Huazhong University of Science and
Technology, Wuhan, China, in 1958, and has worked at that university
since then. He worked at the Institut National Polytechnique de
Grenoble and Derection des Etudes et Recherches, Electricite de France
as a visiting scientist from March 1979 to July 1981. He is professor
and director of the Hydroelectric Control Engineering Laboratory in
Huazhong University of Science and Technology.
WE1 Shouping received the Master degree from Huazhong
University of Science and Technology in 1981. He worked at Tianjin
Institut of Electrical Control from 1962 to 1970, at Jinchengjing Works
of Hydroelectric Apparatus from 1970 to 1978. He is currently an
associate professor and deputy director of the Hydroelectric Control
Engineering Laboratory at Huazhong University of Science and
Technology.

10. M.S.Sachdev, M.M.GIRAY "A Least Squares Technique

for Determining Power System Frequency" IEEE