Professional Documents
Culture Documents
end solucion;
SÍMBOLO:
SIMULACIONES:
B. Multiplicación de dos números de 8 bits por suma y desplazamiento:
SOLUCIÓN:
CÓDIGO:
Library IEEE;
Use IEEE.std_logic_1164.all;
Use IEEE.std_logic_arith.all;
Use IEEE.std_logic_unsigned.all;
Entity multiplicador_desp is
Port( start, clk: in std_logic;
M,N: in std_logic_vector(7 downto 0);
P: out std_logic_vector(15 downto 0));
end multiplicador_desp;
Architecture solucion of multiplicador_desp is
signal lm,dd,ln,di,la,clr,ena,hab,z: std_logic;
signal B: std_logic_vector(7 downto 0);
signal A,C: std_logic_vector(15 downto 0);
Type estado is (s0,s1,s2,s3);
signal es,ep: estado;
Begin
Process(clk)
Begin
if rising_edge(clk) then
ep <= es;
if lm='1' and ln='1' and clr='1' then
B <= M;
C <= "00000000" & N;
A <=(others=>'0');
elsif dd='1' and di='1' and la='1' then
if hab='1' then
A <= A + C; end if;
B <= '0' & B(7 downto 1);
C <= C(14 downto 0) & '0';
end if;
end if;
end process;
P <= A when ena='1' else (others => 'Z');
z <= '1' when B=0 else '0';
hab <= B(0);
Process(ep)
Begin
es <= ep;
case ep is
when s0 => lm<='0';dd<='0';ln<='0';di<='0';la<='0';clr<='0';ena<='0';
if start='1' then es <= s1; else es <= s0; end if;
when s1 =>lm<='1';dd<='0';ln<='1';di<='0';la<='0';clr<='1';ena<='0';
es <= s2;
when s2 =>lm<='0';dd<='1';ln<='0';di<='1';la<='1';clr<='0';ena<='0';
if z='1' then es <= s3; else es <= s2; end if;
when s3 =>lm<='0';dd<='0';ln<='0';di<='0';la<='0';clr<='0';ena<='1';
es <= s3;
end case;
end process;
end solucion;
SÍMBOLO:
SIMULACIONES: