Code No.: B22103166 Date: 13.06.

2016

CVR COLLEGE OF ENGINEERING

UGC Autonomous Institution - Affiliated to JNTUH R12
Vastunagar, Mangalpalli(V), Ibrahimpatan (M), R.R.Dist–501 510.
B Tech II Year II Sem. Main Exams June - 2016 (2013 & 14 Batches)

Subject: Structured Digital System Design

Branch: EIE
Time: 3 hours Max. Marks: 75

PART – A (10x2= 20 Marks)

(Answer ALL Questions)

1. Differentiate between asserted and not-asserted conditions?

2. Define Fan in and Fan out?
3. Draw & explain the operation of Basic Memory Element.
4. Write the flip-flop excitation table for T flip-flop?
5. Draw state diagram for BCD Ripple Counter?
6. Compare system controller and a sequential machine.
7. What is the significance of state assignment in designing sequential circuits?
8. How does a PLA differ from ROM?
9. Write the importance of PRESET input of sequential circuit.
10. Draw mixed mode equivalent circuit for F = AB  CD if A,B are from the positive logic & C,D
are from negative logic system.
PART – B (5x11 = 55 Marks)
(Answer any FIVE questions)
11. Design and explain a 4- bit Comparator?

12. a) Compare open collector and tri –state bus system?

b) Explain the procedure to calculate propagation delay in a combinational circuit with a suitable
example?

13. Design a FSM that counts the following decimal sequence. 3,7,2,6,3,7,2,6,…. The count is to be
represented directly by the contents of the D flip-flops. The counting starts when the control
input ‘C‘ is asserted and stops whenever C is de-asserted. Assume that the next state from all
unused states is the state for the first count in the sequence.

14. What is the difference between ‘Mealy’ and ‘Moore’ models of sequential machines? Explain
using structural diagrams?

15. Draw Bare Bones block diagram & first cut flow diagram for a circuit to obtain 2’s compliment
of given 8-bit number.

16. Design a reaction timer that is to be designed to generate an output at some random period of
time after a START button is pressed and also measures time interval?

17. Design JK Flip-Flop using T Flip-Flop ?

18. Explain in detail about the steps required to design system controller?

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