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50PS60 Plasma Display

Training Manual Advanced Single Scan


Troubleshooting

Updated September 17, 2009

Original: July, 2009


50PS60 TABLE OF CONTENTS

TOPICS TOPICS

PRELIMINARY ........................................ 2 DISASSEMBLY continued


Outline .......................................................... 2 Y-SUS board Removal ................................. 28
Overview ...................................................... 3 Top Y-Drive board Removal ........................ 29
Safety Notice and Cautions .......................... 4 Bottom Y-Drive board .................................. 30
ESD Notice .................................................. 5 Z-SUS board Removal ................................. 31
Regulatory Info. ............................................ 5 Ft Control board Removal ............................ 32
Contact Information ..................................... 6 X-Board Removal Text ................................ 33
Handling and Safety ..................................... 7 X-Board Removal ......................................... 34
Basic Troubleshooting Steps ........................ 8

PRODUCT INFORMATION ................... 9 TROUBLESHOOTING ............................. 35


Feature List .................................................. 10 Signal and Voltage Block Diagram .............. 36
Product Logos .............................................. 12 Panel Label Explained .................................. 37
600Hz Sub Field Driving ............................. 15 Adjustment Order **Important** ................. 38
Remote Control ............................................ 17 Power Supply ............................................... 39
Accessing Service Menu .............................. 18 Y-Sustain ...................................................... 51
Rear and Side Inputs .................................... 19 Y-drive Upper and Lower ............................. 67
Software Download Screen .......................... 20 Z-SUS board ................................................. 77
Dimensions .................................................. 21 Control board ................................................ 84
X-Drive boards ............................................. 99
DISASSEMBLY ......................................... 22 Main (Digital) board ..................................... 112
Back Cover Removal ................................... 23 Ft Control (IR) .............................................. 129
Circuit Board Layout ................................... 24 Side Key ....................................................... 137
Power supply board Removal ...................... 25
Main board Removal .................................... 26 11 X 17 Foldout Section ............................. 139
Control board Removal ................................ 27

Page 1
OUTLINE
Overview of Topics to be Discussed
Section 1

Contact Information, Preliminary Matters, Specifications,


Plasma Overview, General Troubleshooting Steps,
Disassembly Instructions, Voltage and Signal Distribution
Section 2

Circuit Board Operation, Troubleshooting and Alignment of :


• Switch Mode Power Supply
• Y SUS Board
• Y Drive Boards
• Z SUS Output Board (Connects directly with FPC to Panel)
NEW • Control Board Receives its 5V from Power Supply, not Y-SUS
• X Drive Boards (3)
• Main Board
NEW • Power Button (Front Key Board)
Turns off the SMPS via Key On line.
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Overview of Topics to be Discussed

50PS60 Plasma Display


Section 1
This Section will cover Contact Information and remind the Technician of
Important Safety Precautions for the Customers Safety as well as the Technician
and the Equipment.

Basic Troubleshooting Techniques which can save time and money sometimes
can be overlooked. These techniques will also be presented.

This Section will get the Technician familiar with the Disassembly, Identification and
Layout of the Plasma Display Panel.

At the end of this Section the Technician should be able to Identify the Circuit
Boards and have the ability and knowledge necessary to safely remove and
replace any Circuit Board or Assembly.

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Preliminary Matters (The Fine Print)

IMPORTANT SAFETY NOTICE


The information in this training manual is intended for use by persons possessing an adequate
background in electrical equipment, electronic devices, and mechanical systems. In any attempt
to repair a major Product, personal injury and property damage can result. The manufacturer or
seller maintains no liability for the interpretation of this information, nor can it assume any
liability in conjunction with its use. When servicing this product, under no circumstances should
the original design be modified or altered without permission from LG Electronics. Unauthorized
modifications will not only void the warranty, but may lead to property damage or user injury. If
wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for
service, they must be returned to their original positions and properly fastened.

CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power
is required for diagnosis or test purposes, disconnect the power immediately after performing
the necessary checks. Also be aware that many household products present a weight hazard. At
least two people should be involved in the installation or servicing of such devices. Failure to
consider the weight of an product could result in physical injury.

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ESD NOTICE (Electrostatic Static Discharge)

Today’s sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti-static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.

REGULATORY INFORMATION
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.

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LG CONTACT INFORMATION

Customer Service (and Part Sales) (800) 243-0000

Technical Support (and Part Sales) (800) 847-7597

USA Website (GCSC) aic.lgservice.com

Customer Service Website us.lgservice.com

LG Web Training lge.webex.com

LG CS Academy lgcsacademy.com http://136.166.4.200


LG Learning Academy

LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 47LG90
PLASMA: 42PG20, 42PQ20, 50PQ30, 50PG20, 50PS80, 50PS60

Also available on Plasma Panel New Training Materials on


the Plasma page Alignment Handbook the Learning Academy site

Published August 2009 by LG Technical Support and Training


LG Electronics Alabama, Inc.
201 James Record Road, Huntsville, AL, 35813.
Page 6
SECTION 1: PLASMA OVERVIEW
Safety & Handling Regulations

1. Approximately 10 minute pre-run time is required before any adjustments are performed.
2. Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y SUS and Z SUS Boards.
Always adjust to the specified voltage level.
3. Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4. C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5. The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6. The Plasma television should be transported vertical NOT horizontal.
7. Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8. Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9. New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful
with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
10. New Plasma models have much thinner cabinet assemblies and mounts. Be extremely careful when moving the
set around as damage can occur.

Checking Points to be Considered


1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y Board Failure, Mal-discharge on screen, etc.

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Basic Troubleshooting Steps

Define, Localize, Isolate and Correct

•Define Look at the symptom carefully and determine what circuits could be causing
the failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and
check for possible overheated components. Capacitors will sometimes leak dielectric material
and give off a distinct odor. Frequency of power supplies will change with the load, or listen for
relay closing etc. Observation of the front Power LED may give some clues.

•Localize After carefully checking the symptom and determining the circuits to be
checked and after giving a thorough examination using your senses the first check should
always be the DC Supply Voltages to those circuits under test. Always confirm the supplies
are not only the proper level but be sure they are noise free. If the supplies are missing check
the resistance for possible short circuits.

•Isolate To further isolate the failure, check for the proper waveforms with the
Oscilloscope to make a final determination of the failure. Look for correct Amplitude Phasing
and Timing of the signals also check for the proper Duty Cycle of the signals. Sometimes
“glitches” or “road bumps” will be an indication of an imminent failure.

•Correct The final step is to correct the problem. Be careful of ESD and make sure to
check the DC Supplies for proper levels. Make all necessary adjustments and lastly always
perform a Safety AC Leakage Test before returning the product back to the Customer.

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Product Information

This section of the manual will discuss the specifications of the


50PS60 Single layer design. The 1080p Full HD resolution and THX
Display certification makes this series the must have HDTV in 2009.

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Specifications Pg 1 1080P PLASMA HDTV
Full HD 1080p Plasma TV (50” diagonal)
•50" Screen
•Full HD 1080p
•THX Display Certification and THX Cinema Mode
•THX Media Director
•Super Bright Panel: 1,500 cd/m2 Brightness
•30,000:1 Contrast Ration
•600Hz Sub Field Driving
•Four (4) HDMI (V.1.3 with Deep Color)
•ISFccc ready
•USB 2.0 for access to digital music and photos (MP3, JPEG)
•LG SimpLink(TM) Connectivity
•Smart Energy Saving
•LG Core Technologies:
(Clear Voice II, Invisible Speaker, Picture Wizard, Intelligent Sensor)
•Easy UI menu interface
•Pure Black Level
•Auto Navigation:
(VCR, DVD, Bluray, HD DVD, SetTop Box, Satellite, Cable Box, Game, PC)
•Input Labeling

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Specifications Pg 2 (Continued from Previous Page)

•Quick View (Previous Channel)


•Parental Control w/V-Chip
•Key Lock
•Closed Caption 3 (English, Spanish, French)
•Trilingual Menus (English/Spanish/French)
•EZ Menus (High Performance Interface)
•Channel Add/Delete
•Favorite Channel
•Auto Clock
•Manual Clock
•On/Off Timer
•Sleep Timer
•SimpLink™
•Auto Off (When no video is present)
•Image Sticking Minimization
•100,000 Hour Panel Life (typical)
•NTSC/ATSC Tuners with Clear QAM

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Specifications Logo Familiarization (Pixels, HDMI, Invisible Speakers, XD Engine)

FULL HD RESOLUTION 1080p HD Resolution Pixels: 1920 (H) × 1080 (V)


High definition television is the highest performance segment of the DTV system used in
the US. It’s a wide screen, high-resolution video image, coupled with multi-channel,
compact-disc quality sound.

HDMI (1.3 Deep Color) Digital multi-connectivity


HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,
10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors,
and also drastically improves the data-transmission speed.

Invisible Speaker
Personally tuned by Mr. Mark Levinson for LG
TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system,
guaranteeing first class audio quality personally tuned by Mr. Mark
Levinson, world renowned as an audio authority. It provides Full Sweet
Spot and realistic sound equal to that of theaters with its Invisible
Speaker.
Dual XD Engine
Realizing optimal quality for all images
One XD Engine optimizes the images from RF signals as another XD
Engine optimizes them from External inputs. Dual XD Engine presents
images with optimal quality two times higher than those of previous
models.

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Specifications Logo Familiarization (Picture Wizard)

Picture Wizard easily guides


consumers through the
calibration process using
on-screen reference
points.

Customers can customize


picture performance
without the need for
additional expense.

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Specifications Logo Familiarization (AV Model, Vol Control, Clear Voice, Energy)

AV Mode "One click" - Cinema, Sports, Game mode. Cinema Mode is


TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode Pre-calibrated
which allows you to choose from 3 different modes of Cinema, Sports using ISFccc,
and Game by a single click of a remote control. (new in 2009)

Clear Voice Clearer dialogue sound


Enhanced “Clear Voice” feature with 12 level voice control (-6 to +6)
enables adjustment to the voice frequency ensuring clear sound despite loud background
noise.

Save Energy, Save Money


It reduces the plasma display’s power consumption.
The default factory setting complies with the Energy Star requirements and is adjusted
to the comfortable level to be viewed at home.
(Turns on Intelligent Sensor).
Save Energy, Save Money
Home electronic products use energy when they're off to power features like clock
displays and remote controls. Those that have earned the ENERGY STAR use as much
as 60% less energy to perform these functions, while providing the same performance at
the same price as less-efficient models. Less energy means you pay less on your energy
bill. Draws less than 1 Watt in stand by.

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600Hz Sub Field Driving
(600 Hz Sub Field Driving)

• 600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)
Note: Sub field 2
• No smeared images during fast motion scenes through 10 are
actually in reverse.
Brighter image
should be last.

Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.

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THX Familiarization

Dazzling ‘visual and sound’ performance (certified by THX)

• LG is one of the first consumer electronics companies to achieve THX Display


Certification. An industry benchmark for video quality, THX Display Certification
signifies that an HDTV delivers exceptional images, bringing more immersive movie,
broadcast and video game experiences to your living room.

• Long history in the video category


• DVD/D-cinema mastering programs, THX Optimizer
• THX is unique, since it is involved in every step of the production chain
• Mission : make the picture at home look like the picture in the studio

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Remote Control
BOTTOM PORTION
TOP PORTION

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Accessing the Service Menu
SIDE KEYS

REMOTE
TOP PORTION To access the Service Menu.
1) Turn the Set On
2) Simultaneously, Press and
“Hold” the Menu Key on the
Side Key pad and Press and
“Hold” the Menu Key on the
Remote approximately 5
seconds.
3) If Customer’s Menu appears,
continue to hold until it
disappears.
4) The Service Menu appears

Note: It is possible, dependant upon the Software Version,


a Password may be required to enter the Service Menu.
If a password is required, enter
0000

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Rear and Side Input Jacks
USB
Music/Pictures and
Software Upgrades

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USB Download
1) Open the USB Flash Drive.
5) Cursor left and highlight ‘START’ Button and
push ‘Enter’ button using the remote control.
6) You can see the download progress Bar.
7) Do not unplug until unit has automatically restarted.
8) When download is completed,
you will see “COMPLETE”.
9) Your TV will be restarted automatically.

2) Copy new software (xxx.bin) to Root. ※CAUTION:


Make sure to have correct software file.
Do not remove AC power or the USB Flash Drive.
3) With TV turned on, insert USB flash drive.
Do not turn off Power, during the upgrade process.
4) You can see the message “TV Software Upgrade”

Shows the
Currently Installed Shows the
Version Software file
found on the USB
Shows the Flash Drive
Software Version
found on the USB
Flash Drive

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50PS60 Dimensions
Power:
There must be at least 4 inches of Clearance on all sides
295W (Typical) 3-1/8"
48-5/16" 78.7mm
0.13W (Stand-By)
1226.8mm

5-11/16"
145mm
15-3/4"
400mm
15-5/16"
405mm

32-1/2" 15-3/4" 15-3/4"


825.5mm 400mm 400mm
Model No.
Serial No.
30-3/8"
Label
772mm

15-3/4"
400mm
Remove 4 screws to
remove stand for 4-3/4" 1-3/4"
wall mount 120mm 45mm
6-7/8"
174mm
2-1/8"
54mm

80 lbs with Stand 25-7/16"


Weight: 646mm 13-7/8"
74.5 lbs without Stand 353mm

21
DISASSEMBLY SECTION

This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 50PS60 Advanced Single Scan Plasma Display Panel.

Upon completion of this section the Technician will have a better


understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.

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Removing the Back Cover

To remove the back cover, remove the 29 screws


Indicated by the arrows.
(The Stand does not need to be removed).

PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH


Of the screws when replacing the back cover.
Improper type can damage the front.

23
50PS60 Circuit Board Layout
Y Drive Upper
Panel Voltage Label
FPC

Panel ID Label
FPC

FPC
FPC

Power Supply
(SMPS) Board
FPC

Z-SUS Board
Y-SUS Board FPC
FPC

Z-SUB
Board
Control
FPC

Board FPC
Side Input
FPC

(part of main)
Y Drive Lower
AC In
FPC

TCP
Control Keys Main Board
Heat Sink
Ft IR Board Left “X” Right “X”
Center “X”

Power PWR LED Conductive Tape Under Main PWB


Button Board Invisible Speakers

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SMPS (Switch Mode Power Supply) PWB Removal
Disconnect P811, P812, P813 and SC101
Then Remove the 8 Screws

P811 P812

P813

SC101

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Main PWB Removal
P1006

P1003

P1001

P1005

Disconnect P1001, P1005 and P1006

Disconnect P1003 by lifting up the locking mechanism and removing the LVDS ribbon cable.

Then Remove the 4 Screws

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Control PWB Removal
Disconnect P2, and P200
Disconnect P5 (LVDS cable) by pressing inward on the two locking tabs and rocking the cable out.
Disconnect P1, P101, P102 and P104 by removing the tape and lifting upward on the locking tab
pulling the cable out.
Then Remove the 4 Screws P200 P2

n/c
P1 P5

Look on back
for heat transfer
material
P101
P104

n/c
n/c

P102

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Y-SUS PWB Removal

P302
Disconnect P302 and P307.

Disconnect P101 and P309 by


removing the tape and lifting
upward on the locking tab
P309
pulling the cable out.

Then Remove the 10 Screws

Carefully separate
the Y-SUS from
the Y-Drive
Upper and Lower
n/c
Boards.
P101

P3
07

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Y-Drive Upper PWB Removal
•Note: All connectors
Disconnect P111 and P112. going to the Y-
Y-SUS board
are fragile.
Disconnect P101, P102, •P114, P116, P214 and
P103 and P104 by lifting up P101 P216.
on the locking tab and then •Removing and reinserting
lifting up slightly on the the drive board or the
FPC to release the small Y-SUS can cause an
wings on the cable. intermittent or open
P102 connection.
•Investigate these
Then Remove the 3 Screws connectors carefully after
replacing either the Y-
Y-SUS
or Upper or Lower Y-Y-Drive
Carefully separate
boards and resolder if
the Y-Drive from necessary.
the Y-SUS Boards which is
P114
connected via P114 and P103
P116.

P116

P111
P104 P112

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Y-Drive Lower PWB Removal
•Note: All connectors
Disconnect P211. going to the Y-
Y-SUS board
P211 are fragile.
Disconnect P201, P202, •P114, P116, P214 and
P203 and P204 by lifting up P201 P216.
on the locking tab and then P214 •Removing and reinserting
lifting up slightly on the the drive board or the
FPC to release the small Y-SUS can cause an
wings on the cable. intermittent or open
P202 connection.
P216
•Investigate these
Then Remove the 3 Screws connectors carefully after
replacing either the Y-
Y-SUS
or Upper or Lower Y-Y-Drive
Carefully separate
boards and resolder if
the Y-Drive from necessary.
the Y-SUS Boards which is
connected via P214 and P203
P216.

P204

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Z-SUS PWB Removal

Disconnect P100 and P101

Disconnect P102 and P104


P104
by pulling out (to the right)
the locking tabs and
removing the FPC from
the connector.

Then Remove the 8


Screws
P101
Carefully separate
the Z-SUS from
the Z-SUB P103 and
remove.
P102

P100

n/c P1
03

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Removing Front Power LED and IR Board
To remove the Ft Power LED and Ft IR board,
1 Remove the 2 screws in the Front IR PWB
2 Remove the 1 screw at the bottom of the Power LED PWB.
Bottom
Metal
Front IR PWB Power LED PWB
Ground
snap

Screw

2
Ground
Strap Cabinet
screw Bottom

Note, the left screw in step 1 has a ground strap Note, this screw
s has an
1 lug. Make sure to return it when reinstalling the 2 Oversized washer which
board. This ground snaps into the Bottom Metal. locks the board in place.

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Removing the X Drive Circuit Board LVDS Cable Connector
Lay the Plasma down carefully on a padded surface.
Make sure AC is removed and remove the Back Cover and the
Stand.
Carefully remove the LVDS Cable P1003 from the Main Board by
lifting the Locking Tab upward and pull the ribbon cable free. (See
illustration to the right). This prevents possible damage to the cable.

PROCEDURE: (See Figure on next page). Flip up the Locking Tab

(A) Remove the Stand (4 Screws removed during back removal)


Pull the stand out of the stand support bracket.
(B) Remove the Stand Metal Support Bracket (5 Screws).
(C) On the Main board, remove connectors P1108, P1101 and P900.
The LVDS connector should already be removed (see above).
(D) Remove the 4 screws from the Main Board Mounting Bracket.
(Note: Decorative Plastic Piece on right does not need to be removed)
Carefully reposition the Main Board and Mounting Bracket up and off to the right side.
(E) Remove the metal support Braces marked “E”. Note: There is a Left and a Right brace.
(3 Screws per/bracket).
(F) Remove the 13 screws holding the Heat Sink.

X-DRIVE PWBs REMOVAL:


Disconnect all TCP ribbon cables from the defective X-Drive PWB.
Remove the 5 screws holding the PWB in place.
Remove the PWB. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Bias.

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Getting to the X Circuit Boards
Warning: Never run the TV with the TCP Heat Sink removed

E
E
Right
Left

C C
Heat Sink
D
B
F

Warning Shorting Hazard: Conductive Tape, Do not allow to touch energized circuits. Also under the Main board.

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CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION

50PS60 Plasma Display

This Section will cover Circuit Operation, Troubleshooting and


Alignment of the Power Supply, Y-SUS Board, Y Drive Boards, Z-SUS
Board, Control Board, Main Board and the X Drive Boards.

At the end of this Section the technician should understand the operation
of each circuit board and how to adjust the controls. The technician
should be able with confidence to troubleshoot a circuit board failure,
replace the defective circuit and perform all necessary adjustments.

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50PS60 SIGNAL and VOLTAGE DISTRIBUTION DIAGRAM
Y Drive
Display Panel
Upper
FPCs 5VFG indicates SMPS OUTPUT VOLTAGES IN STBY SMPS OUTPUT VOLTAGES IN RUN Grids Address
measured from STB5V, +5V, 17V, 12V to Main PWB Reset
STB +5V (also AC Voltage Det)
P101 Floating Ground Vs, Va and M5V to Y-SUS, Z-SUS
Floating M5V to Control PWB
Ground P811 P812
P102
P114
P101 P312 (FG) P201
SMPS Note: Va not used
5VFG M5V, Vs, Va M5V, Vs, Va
P103
P103 P311 Note: PWB P813
FPCs
P116 Va not used P101
(V Scan) (5VFG) (FG)
P104
by Y-SUS SK101 P814
P104 P112 SMPS Relay On +5V, 12V
P309 Data, Clock (i2c)
P111 Turn On M5 On M5V
Drive Data
AC
Input Commands VS On 17V, Va, Vs
Z SUS
FPCs
Clock (i2c)
Y-SUS PWB Filter PWB P102

P211 17V
5VFG
P313 P100
P201 P214
(V Scan) (5VFG) (FG) Logic Signals P103
M5V 17V Z Drive Signals Z Drive Signals
P202 P101 P1 P200 P2 LVDS
P105
P216 P314 (FG) 17V CONTROL P5
P106
P307 Note: 17V not used Set in
P203 Floating by Control PWB LVDS
Ground Stand By:
P101 P104 FPCs
P102 STB +5
P1006 P1003 Speakers
P204 AC Voltage
Det MAIN PWB
Y Drive P1101 3.3V
Va P1005 Key Board
Lower RGB Logic RGB Logic
Signals Signals 5V STBY Pull Up
Display Panel IR, Power LED, Control Keys
Horizontal Grids Luminance 3.3V 3.3V 3.3V Intelligent Sensor Power Button
P210
P121 P110 P310
X-PWB-Left P120 P220 X-PWB-Center
P232 P211 P311 P331
P221 P320 X-PWB-Right
Va Va

P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306

Display Panel Vertical Address (Color Information)

36
Panel Label Explanation

(9) (10)
(1)
(8)
(2) (11)
(3) (12)
(4)
(5) (13)
(14)
(6) (7) (15)

(1) Model Name (9) TUV Approval Mark


(2) Bar Code (10) UL Approval Mark
(3) Manufacture No. (11) UL Approval No.
(4) Adjusting Voltage DC, Va, Vs (12) Model Name
(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White)
(6) Trade name of LG Electronics (14) Max. Volts
(7) Manufactured date (Year & Month) (15) Max. Amps
(8) Warning

37 Fall 2009 1080P Plasma 50PS60


Adjustment Order
All Adjustments MUST be done in White Wash

It is critical that the DC Voltage adjustments be checked when;


1) SMPS, Y-SUS or Z-SUS PWB is replaced.
2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel
3) A Picture issue is encountered
4) As a general rule of thumb when ever the back is removed

ADJUSTMENT ORDER “IMPORTANT”


Remember, the Voltage Label MUST
DC VOLTAGE ADJUSTMENTS be followed, it is specific to the
1) SMPS PWB: Va Vs (Always do SMPS first) panel’s needs.

2) Y-SUS PWB: Adjust –Vy, Vscan,


3) Z-SUS PWB: Adjust ZBias
WAVEFORM ADJUSTMENTS
1) Y-SUS PWB: Set-Up, Set-Down

The Waveform adjustment is only necessary


1) When the Y-SUS PWB is replaced All label references are from a specific panel.
2) When a “Mal-Discharge” problem is encountered They are not the same for every panel
3) When an abnormal picture issues is encountered encountered.

38 Fall 2009 1080P Plasma 50PS60


SWITCH MODE POWER SUPPLY PWB SECTION
The following section gives detailed information about the Switch
Mode Power Supply (SMPS) This board develops voltages for all
other boards.
This board has 2 DC adjustments:
• (VS) Voltage for Sustain
• (Va) Voltage for Address

The SMPS outputs the following voltages:


• STBY 5V (Stand-By),
• +5V, 12V when Relay On command arrives
• M5V to the Control, Y-SUS and Z-SUS boards when M5 On
command arrives
• 17V to the Main board when Vs on arrives
• VS to the Y-SUS and Z-SUS boards when Vs on arrives
39 Fall 2009 1080P Plasma 50PS60
Switch Mode Power Supply Overview

The Switch Mode Power Supply Board Outputs to the :


VS (Vs = Voltage for Sustain)
Drives the Panel’s Horizontal Electrodes (Y and Z SUS Boards)
Y-SUS Board
VA (Va = Voltage for Address)
Z-SUS Board Primarily responsible for Panel’s Vertical electrodes (X Boards, TCPs).
Control Board Va routed to the Y-SUS then to the left X board.
M5V (M5V = Monitor 5 volts)
Used to develop Bias Voltages on the Y-SUS, Z-SUS and Control
Boards.

5V-STBY Control Circuits

Main Board 17V Audio B+ Supply


12V Video Processing
+5V Signal Input Circuits

There are 2 adjustments located on the Power Supply Board VA and VS. The
5V VCC is pre-adjusted and fixed. All adjustments are made with relation to
Chassis Ground. Use “Full White Raster” 100 IRE. Each panel has its own
adjustment values for Va and Vs. Use the Panel’s Voltage Label for reference.

VA RV901
Adjustments
VS RV501

40 Fall 2009 1080P Plasma 50PS60


SMPS (Switch Mode Power Supply) PWB Layout Hot Ground Symbol
VS
P811 M5V VS
M5V NC 1
Gnd Gnd
VA Gnd P812
To
VA VA
Y-SUS Vs Adj VA To
Gnd
Gnd VR901 Gnd Z-SUS
NC M5V
1 VS M5V
Va Adj
VS VR501 1

P813
F801 To
1~4 M5V
4A/250V Control
5~8 Gnd

F302 IC701
1A/250V

SC101

P814
1
To
Fuse F101-2
Main
15A/250V

41 Fall 2009 1080P Plasma 50PS60


Power Supply Basic Operation
AC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly. Standby 5V is developed from
165V source supply (which during run measures 380V measured from the primary fuse F302).
This supply is also used to generate all other voltages on the SMPS.

The STBY5V (standby) is B+ for the Sub Micon (IC701) on the SMPS and output at P814 pins 11 and 23 then sent to the
Main PWB for Microprocessor (IC1) operation. AC Detect is generated on the SMPS, by rectifying a small sample of the
A/C Line at D102 and associated circuitry and routed to the Sub Micon (IC701) where it outputs at pin 15 and sent to P814
pin 18 to the Main Board where it is sensed and monitored by the Main Microprocessor (IC1). The AC Det in this set works
differently than most. If AC Det is missing the Microprocessor will turn off the television in about 10 seconds after turn on.
This will happen each time turn on is attempted.
A new feature included on the side keypad is called a Power Button which opens a ground allowing the “Key On” line of
P814 Pin 24 to go high, turning off the 5V STB line defeating the Micro Processor (IC1) on the Main Board and Remote
Control Operation.
When the Microprocessor (IC1) on the Main Board receives an “ ON “ Command from either the Power button or the
Remote IR Signal, it outputs a high called RL ON at Pin 19 of P814. This command causes the Relay Drive Circuit to
close both Relays RL102 and RL103 bringing the PFC source up to full power by increasing the 165V standby to 380V
run which can be read measuring voltage at Fuse F302 and F801 from “Hot” Ground. At this time the run voltages 12V,
and +5V sources become active and are sent to the Main Board via P814 (12V at pins 5 and 6 and 5V at pins 9,10, and
12). The 5V detect line from the SMPS Board to the Main Board can be measured at pin 17 of P814. It is not used.
The next step is for the Microprocessor (IC1) on the Main Board to output a high on M5V ON Line to the SMPS at P814 Pin
21 which is sensed by the Sub Micon (IC701) turning on the M5V line and output at P811 and P812 pins 9 and 10 to the
Y and Z SUS boards and P813 pins 1~4 to the Control board.
Full Power occurs when the Microprocessor (IC1) on the Main Board brings the VS-ON line high at Pin 20 of P814 of the
SMPS Board. VS-ON is routed to the Sub Micon (IC701) which turns on the 17V Audio, VA, and the VS supplies. VA and
VS output at P811 to the Y-SUS board and P812 to the Z-SUS board. (VA pins 6 and 7 and VS pins 1 and 2 of either
connector) the 17V Audio supply outputs to the Main board at P814 pins 1 and 2.
AUTO GND Pin 22 of P814: This pin is grounded on the Main board. When it is grounded, the Sub Micon IC701 works in
the normal mode. Meaning it turns on the power supply via commands sent from the Main board. When this pin is floated
(opened), it pulls up and turns the Sub Micon IC701 on in the Auto mode. In this state, the Sub Micon turns on the power
supply in stages automatically. A load is necessary to regulate the 17V with the SMPS disconnected. This is a good test if
the Main board is suspect.

42 Fall 2009 1080P Plasma 50PS60


50PS60 POWER SUPPLY START UP SEQUENCE
In Stand-By Primary side is 163V
Standby 5V will not In Run (Relay On) Primary side is 386V 10
be output if the M5V
POWER SUPPLY 9 Reg
Power Button is off.
(SMPS)
16 16
AC In 5V/12V Vs
Regulators Reg
Vs
14
1 Stand
17V
By 5V Reg 15
6 Reg Va Va
Reg
15
5V Det.
AC Stand 7 5V
M5V Va Vs M5V Va Vs M5V M5V
Det. By 5V 12V
17V On Vs
15 16 10 15 16 10 10
3 2 Relay 8
On On Y-SUS PWB Z-SUS PWB Control PWB
6 14 Va 5VFG 17V 3.3V
17V
9 14 15 12 11 11 11 13
17V Audio 5V 17V
5V Not Floating
12V Video
Mnt Used
Gnd 12
AC Det. +5V HDMI EDID
If missing, And other input circuits Y DRIVE Y DRIVE
5V Switch
set turns
Q303 Upper Lower
off within Power 13
10 sec. Other At point 4 TV is in
Switch 13
Stand-By state. It is MAIN
Circuits 5V Relay Energy Star Compliant. PWB 15
X PWB X PWB X PWB
On Less than 1 Watt
Mnt
2 6
Left Center Right
3.3V Reg 15 15
IC301
9 STBY 5V
Microprocessor 14 2 Front IR Remote Power Button
Reset IC1 Power On Board Or Key
Q302
4
5 5
Off
On
43
SMPS Adjustments
Set should be in “Full White Raster” and Heat Run 10 Minutes.

These two voltages are adjustable and should be adjusted to the


correct values as indicated by your specific panel label.
Example shown on the right.

VS and VA adjustment resistors are shown in the drawing below.


VR901 is the VS adjustment pot.
VR501 is the VA adjustment pot.

1) VS ADJUST:
Connect DVM to pin 1 or 2 of P812.
Adjust VR901 until the voltage
matches your panel’s voltage label.

2) VA ADJUST:
Connect DVM to pin 6 or 7 of P812.
Adjust VR501 until the voltage matches
your panel’s voltage label.

44 Fall 2009 1080P Plasma 50PS60


50PS60 SMPS STATIC TEST UNDER LOAD
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs
turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If
this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk
screen on the SMPS and place each supply voltage under the appropriate load.
4 or 5 or 8 P812
P811 Check Pins 6 or 7
Gnd
100W

10) M5V for Va voltage


9) M5V
8) Gnd Provided the Power Button is
Vs 7) VA 10) M5V closed, any time AC is applied to
100W

6) VA 9) M5V the SMPS, STBY 5V and AC DET


P812
5) Gnd 8) Gnd should be present.
Pins 1 or 2 4) Gnd 7) VA
6) VA P813 If AC Det is missing,
3) NC
5) Gnd the TV will come on then shut
2) VS
4) Gnd off within 10 Sec.
P811 1) VS
3) NC This will happen each time the
Check Pins 1 or 2 TV is turned on.
for Vs voltage 2) VS
P813
1) VS 1,2,3,4) M5V
Check Pins 1~4 for
5,6,7,8) Gnd
M5V
P814
T301
Check Pins 11 or 23 for
U701 5V SBY

Check Pin 18 for


SC101 AC Det (5V)
P814
1 23 Check Pin 9,10,12 for
(+5V)
2 24
Check Pins 1 or 2 for
17V
Note: This SMPS will run without a load, however if the Vs is not loaded,
the 17V will pulsate up and down. Check Pins 5 or 6 for
It is always best to test the SMPS under a load using the 2 light bulbs. 12V

45
50PS60 Power Supply Troubleshooting
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light
bulbs turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate
under load. If this test is successful and all other voltages are generated, you can be fairly assured the power
supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the
silk screen on the SMPS and place each supply voltage under the appropriate load.
4 or 5 or 8

P811 Note: Placing the two 100 Watt light bulbs from Vs to
Gnd
Ground will assure the power supply will regulate with a
100W

10) M5V load and that the 17V will be stable. Without out this
9) M5V
8) Gnd load, the 17V will pulsate up and down.
Vs C 100Ω
100W

7) VA
10) M5V

STBY 5V
6) VA P812

Relay On
5) Gnd 9) M5V 100Ω

STBY 5V
M5 On
8) Gnd
Pins 1 or 2
4) Gnd
3) NC 7) VA B
P813
2) VS 6) VA 5V
1) VS 5) Gnd
4) Gnd 17V Gnd 12V Gnd +5V Gnd Gnd Det
3) NC
2) VS
1 3 5 7 9 11 13 15 17 19 21 23

P814
1) VS

1,2,3,4) M5V
5,6,7,8) Gnd 2 4 6 8 10 12 14 16 18 20 22 24
17V Gnd 12V Gnd +5V +5V Gnd A
T301
AC V S Auto Key
U701 D Det O n Gnd On
100Ω
SC101

P814
1 23

2 24

This Power Supply can be powered on sequentially for understanding of the operation and for troubleshooting purposes.
When the supply is operational in its normal state the Auto Ground line at Pin 22 of P814 is held to ground by the Main Board.
When the Power Button is in the off state the Standby 5V Supply will be at 0v, the Key On Line at Pin 24 will be 4.3V. When the
Power Button is pressed on, the Key On Line is grounded which allows the 5V Standby to go to 5V.

(A) Grounding both the Auto Gnd and the Key On Lines will allow the supply to be powered up one section at a time.
(B) Add a 100Ω ¼ watt resistor from 5V Standby to RL_ON and the 12V and 5V Run Lines will become active.
(C) Add a 100Ω ¼ watt resistor from 5V Standby to M5V_ON to make the Main 5V Line operational.
(D) Add a 100Ω ¼ watt resistor from 5V Standby to Vs_On to make the 17V, Va and Vs lines operational. (See note at top)

46
P814 Pins ID, Voltages and Diode Mode Measurements for the SMPS
P814 CONNECTOR “SMPS" to “Main PWB" P1006 * Pins 9, 10, 12: (+5V) Turned on by Relay On Command.

Pin Label STBY Run Diode Mode Pin Label STBY Run Diode Mode
1* 17V 0V 17.3V 2.2V 2* 17V 0V 17.3V 2.2V
3 Gnd Gnd Gnd Gnd 4 Gnd Gnd Gnd Gnd
5 12V 0V 12V Open 6 12V 0V 12V Open
7 Gnd Gnd Gnd Gnd 8 Gnd Gnd Gnd Gnd
9 +5V 0V 5.15V 1.2V 10 +5V 0V 5.15V 1.2V
11 Stby 5V 5.15V 5.15V Open 12 +5V 0V 5.15V 1.2V
13 Gnd Gnd Gnd Gnd 14 Gnd Gnd Gnd Gnd
15 Gnd Gnd Gnd Gnd 16 n/c n/c n/c n/c
17* 5V Det 0V 4.8V 1.45V 18* AC Det 5V 5V 1.45V
19 RL On 0V 3.3V Open 20 VS On 0V 3.2V Open
21 M5 ON 0V 3.3V Open 22 Auto Gnd Gnd Gnd Open
23 Stby 5V 5V 5V Open 24* Key On *0V *0V Open

* Pin 1 and 2: 17V If Vs is unloaded will pulsate. * Pin 18: AC DET if missing will cause the set to turn
Turned on by Vs On Command. off after 10 seconds.
* Pin 17: 5V Det not used.
* Pin 24: When the Power Button is opened,
• Pin 24 pulls up to 4.3V.
• Stand-By 5V turns off. AC-Det remains.
Diode Mode Readings taken with all connectors Disconnected.
Black lead on Gnd. DVM in Diode Mode.

47 Fall 2009 1080P Plasma 50PS60


SK101 and P811 Pin ID and Voltages
Voltage and Diode Mode Measurements for the SMPS.
SC101 AC INPUT

Connector Pin Number Standby Run Diode Mode


SC101 1 and 3 120VAC 120VAC Open

P811 CONNECTOR "Power Supply PWB“ to Y-SUS P302


Diode Mode Diode Mode
Pin Label STBY Run
Connected Disconnected
1 Vs 0V *195V Open Open

2 Vs 0V *195V Open Open

3 n/c n/c n/c n/c n/c

4 Gnd Gnd Gnd Gnd Gnd

5 Gnd Gnd Gnd Gnd Gnd

6 Va 0V *65V Open Open

7 Va 0V *65V Open Open

8 n/c n/c n/c n/c n/c

9 M5V 0V 5V 0.74V 0.86V

10 M5V 0V 5V 0.74V 0.86V

* Note: This voltage will vary in accordance with Panel Label


Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

48 Fall 2009 1080P Plasma 50PS60


P812 Pin ID and Voltages
Voltage and Diode Mode Measurements for the SMPS.

P812 CONNECTOR "Power Supply PWB“ to Z-SUS P101


Diode Mode Diode Mode
Pin Label STBY Run
Connected Disconnected
1 Vs 0V *195V Open Open

2 Vs 0V *195V Open Open

3 n/c n/c n/c n/c n/c

4 Gnd Gnd Gnd Gnd Gnd

5 Gnd Gnd Gnd Gnd Gnd

6 Va 0V *65V Open Open

7 Va 0V *65V Open Open

8 n/c n/c n/c Gnd Gnd

9 M5V 0V 5V 0.74V 0.86V

10 M5V 0V 5V 0.74V 0.86V

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected, Unless specified. Black lead on Gnd. DVM in Diode Mode.

49 Fall 2009 1080P Plasma 50PS60


P813 Connector Pin ID and Voltages
Voltage and Diode Mode Measurements for the SMPS. P813

1
P813 CONNECTOR "Power Supply PWB“ to “Control PWB” P200
Diode Mode
Pin Label STBY Run
Connected
1 M5V 0V 5V 0.75V

2 M5V 0V 5V 0.75V

3 M5V 0V 5V 0.75V

4 M5V 0V 5V 0.75V

5 Gnd Gnd Gnd Gnd

6 Gnd Gnd Gnd Gnd


NOTE: The Black wire on P813
7 Gnd Gnd Gnd Gnd Connector is not pin 1.

8 Gnd Gnd Gnd Gnd

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

50 Fall 2009 1080P Plasma 50PS60


Y-SUS PWB SECTION

The following section gives detailed information about the Y-SUS


board. This board develops the “Panel Sustain Signals” and delivers
the Luminance signals to the panel. The Y-SUS board receives the
waveform development signals from the Control board. The Y-SUS
also develops additional voltages via internal switch mode power
supplies. 15V, floating ground 5V, VSC voltages and –Vy voltages.

This board has 4 adjustments, 2 DC and 2 Waveform:


• 2 DC: VSC (VSCAN) AND –Vy (DD-VAR)
• 2 Waveform: Set-Up1 and Set-Dn1

Board Receives its main B+ from the:


• Switch Mode Power Supply sends VS
• Switch Mode Power Supply sends M5V

51 Fall 2009 1080P Plasma 50PS60


Y-SUS PWB Layout
VS
VS
P312 FS302 (Vs) NC
3A/250V P302 GND
GND
Not for FS303 (Va) To SMPS VA
To
Adjustment of 10A/125V VA
Y Drive
P311 the Y-Drive NC
Upper
signal, used to M5V
test Y-SUS. M5V
FS301 (M5V)
P309 C324 lower leg 4A/125V
Y-SUS drive TP
400V p/p
- C323 upper leg
Vsc TP
R306

+ Set-Up1 Top 6 pins 17.8V (out)


P313
Adj VR602
Logic Signals (in)
To Set-Dn1 P101
Y Drive To Control
Adj VR601 n/c
Lower
- + -Vy Adj
P314 VR902

-Vy TP Vsc Adj P307 FS901 (5V)


R305 To Left X 4A/125V
VR901
Pins 1~4 Va

52 Fall 2009 1080P Plasma 50PS60


50PS60 (50H3 Panel) P312
Y-SUS PWB LAYOUT
FS302
Vs
P302
P311 FS303
Va
FS301
M5V

P309

R306
(-) VSC TP

P313
(+)
VR602
SET-up1

VR601
P101
P314 (-) (+) SET-dn1
VR902
DD_Var (-Vy)
FS901
R305 M5V
-VY TP
VR901
VSCAN

53 P307
Y-SUS –Vy and VSC Adjustments
1) Pre-Heat unit for at least 10 Minutes before making adjustments.
Vs and Va adjustments complete.
2) Place unit into White Wash from the Customer’s Menu for all adjustments.
3) Be sure to use all adjustment values as indicated on your panel’s
voltage label in the upper right of the panel. (Example shown above)

PROCEDURE: (See figures for locations) -Vy VR902 -Vy TP R305

4) Adjust –Vy using VR902.


Measured across –Vy TPs R305.
Match your specific Panel’s Voltage
label ±1V.

5) Adjust VSC using VR901.


Measured across VSC TPs R306. Location Lower left
Match your specific Panel’s Voltage
label ±1V.

VSC VR901

Location Bottom Center VSC TP R306

Location Lower Center

54 Fall 2009 1080P Plasma 50PS60


Observing the Y and Z SUS Output Waveforms

External Triggering of the Oscilloscope allows for a Stable Display of both the Y and Z SUS Output Waveforms
regardless of how distorted the waveforms may be, allowing the wave shape and phasing to be easily examined.

To set the Oscilloscope up for External Trigger first connect a Scope Probe set on direct to the External Input Jack.
Next set the External Jack for AC Coupling either positive or negative slope, use the Trigger Menu on the Scope.
Finally you will need to set the Trigger Level press the Trigger View and set the level as indicated in the picture below.

VS_DA Test Point:


• Located on the Control Board just to the right of the MCM Chip and above the EEPROM IC6.
This TP may be used as an external trigger source for locking the waveform on the Oscilloscope

Trigger Level Adjust

External Trigger Source

55 Fall 2009 1080P Plasma 50PS60


Y-Drive Signal Test Points
c
Overall signal
observed 2mS/div

d
Highlighted signal from
waveform above observed
100uSec/div

Y-Drive PWB Test Points


(Middle of bottom
Y-Drive Board)

e
Highlighted signal
from waveforms
above observed
50uS/div

Either test point is OK to use. 50uS 510V p/p


NOTE: The Waveform Test Points are fragile. If by accident the land is torn and the
run lifted, make sure there are no lines left to right in the screen picture. 78V RMS

56 Fall 2009 1080P Plasma 50PS60


Observing (Capturing) the Y-Drive Signal for Set-up or Set-down Outlined
Blanking Area
Set must be in “WHITE WASH” All other DC Voltage
adjustments should have already been made.

Fig 1: FIG1
As an example of how to lock in to the Y-Drive Waveform. 2mS
Fig 1 shows the signal locked in at 2ms per/div.
Note the blanking sections.
The signal for Set-Up / Down adjustment is outlined within
the Waveform

Area to FIG2
be adjusted 100uS
Fig 2:
At 100us per/div. the signal for Set-Up / Down adjustment is
now easier to recognize. It is outlined within the Waveform

Fig 3: Set Up
At 50uSec per/division, the adjustment for
SET-UP or SET-DOWN can be made.
Area to FIG3
Note: When actually performing the adjustments, be adjusted 50uS
The portion of the waveform being adjusted can be
Zoomed in on by increasing the speed of the scope.
Set Down

57 Fall 2009 1080P Plasma 50PS60


Y-SUS (Y Drive Waveform Set-Up and Set-Down Adjustments)
1) Pre-Heat unit for at least 10 Minutes before making adjustments. V Set-Up Adj
VR602
Vs, Va, -Vy and VSC adjustments should be completed.
2) Place unit into White Wash from the Customer’s Menu for all adjustments.

PROCEDURE: (See figure to the right for locations)

Oscilloscope TP on the “Waveform” TPs on the Y-Drive PWB.

3) SET-UP ADJUSTMENT VR602: V Set-Dn Adj


Adjust VR602 while observing area (A) and set the flat portion to VR601
10uSec ± 5uSec. While observing only the peak of the waveform,
turn the pot CW which will cause the peak to dome to the left of the
flat portion. CCW will cause the peak to decrease in amplitude.
Turn CW until the dome appears, then back off CCW. Lower Center Of PWB

4) SET-DOWN ADJUSTMENT VR601:


Adjust VR601 while observing
area (B) and set to
160uSec ± 5uSec.

58 Fall 2009 1080P Plasma 50PS60


V Set Up Too High or Low NOTE: If Vset DN too high, this set will go to excessive bright,
All Waveforms taken at 50V per/div, 50uSec per/div then shutdown. To correct, remove the LVDS from control
PWB and make necessary adjustments.

Ramp (Vset UP) too high


Vset DN too high

Ramp (Vset UP) too low Vset DN too low

59 Fall 2009 1080P Plasma 50PS60


Y SUS Block Diagram Block Diagram of Y-SUS (Sustain) Board

Vs and M5V
Blue Blocks Power Supply Board - SMPS Z-SUS Board
are part of the
Distributes 17V
Y-SUS Board M5V

Receive M5V, Va, Vs Distributes 17V Control Board


from SMPS Generated by DC to
Distributes VA DC Converters
Logic signals R, G, B
needed to Logic
generate drive
waveform 3.3V
Circuits generate Generates Vsc and -Vy
Y Sustain Waveform from Vs or M5V by internal SMPS
Also controls Set Up/Down via adj.

Generates Floating Ground


Left X Board
5V by on board SMPS
FETs amplify Sustain
VA Waveform
Logic signals needed to control buffer
outputs. Routed through Y-SUS board.
Center X Board

VA To Horizontal
Electrodes
Y Drive Boards
Right X Board Display Panel
Receives Scan Waveform

Operates referenced to Floating Gnd


To Vertical Electrodes Logic signals needed to generate drive waveform

R, G, B Logic and 3.3V

60 Fall 2009 1080P Plasma 50PS60


Y–SUS P302 to SMPS P811 Plug Information
P302
Voltage and Diode Mode Measurements.
Note: There are no Stand-By Voltages to this board.
1
P302 CONNECTOR "Y-SUS" to "Power Supply PWB" P811
Diode Mode Diode Mode
Pin Label Run
Connected Disconnected
1 Vs *195V Open Open

2 Vs *195V Open Open

3 n/c n/c n/c n/c

4 Gnd Gnd Gnd Gnd

5 Gnd Gnd Gnd Gnd

6 Va *65V Open Open

7 Va *65V Open Open

8 n/c n/c Gnd Gnd

9 M5V 5V 0.74V 1.14V

10 M5V 5V 0.74V 1.14V

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected unless specified. Black lead on Gnd. DVM in Diode Mode.

61 Fall 2009 1080P Plasma 50PS60


Y-SUS P307 to Left X Drive P121 Plug Information P307
Voltage and Diode Mode Measurements.
Note: There are no Stand-By Voltages to this board.
1

P307 CONNECTOR "Y-SUS PWB" to "X-Drive” Left P121


Pin Label Run Diode Mode
1 VA *65V Open
2 VA *65V Open
3 VA *65V Open
4 VA *65V Open
5 NC NC NC
6 Gnd Gnd Gnd
7 Gnd Gnd Gnd

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

62 Fall 2009 1080P Plasma 50PS60


Y-SUS P101 to Control P1 Pin 50 on Y-SUS is Pin 1 on Control
Connector Layout
Top 25 Pins Bottom 25 Pins
P101 P1 P101 P1
Y-SUS PWB Control PWB Y-SUS PWB Control PWB

50 17.8V
15V 1 15V 0.7V
17.8V DELTA_VY_ON_OFF 25 26 DELTA_VY_ON_OFF
15V 49 2 15V Gnd
17.8V GND 24 27 GND
15V 48 3 15V 0.68V
17.8V DELTA_VY1 23 28 DELTA_VY1
15V 47 4 15V Gnd
17.8V GND 22 29 GND
15V 46 5 15V 0V
17.8V SET_UP2 21 30 SET_UP2
15V 45 6 15V
NC GND 20 Gnd 31 GND
NC 44 7 NC
2.84V SET_UP1 19 0.1V 32 SET_UP1
OC2_ODD 43 8 OC2_ODD
Gnd GND 18 Gnd 33 GND
GND 42 9 GND
1.87V SET_DN2 17 4.9V 34 SET_DN2
OC1_ODD 41 10 OC1_ODD
Gnd GND 16 Gnd 35 GND
GND 40 11 GND
0.3V SET_DN1 15 3.48V 36 SET_DN1
CLK 39 12 CLK
Gnd CTRL_OE 14 0V 37 CTRL_OE
GND 38 13 GND
0V GND 13 Gnd 38 GND
DATA_ODD 37 14 DATA_ODD
Gnd PASS_TOP 12 1.4V 39 PASS_TOP
GND 36 15 GND
0V GND 11 Gnd 40 GND
DATA_EVEN 35 16 DATA_EVEN
Gnd DELTA_VY2 10 0.7V 41 DELTA_VY2
GND 34 17 GND
Gnd GND 9 Gnd 42 GND
GND 33 18 GND
4.3V ER_UP 8 0.2V 43 ER_UP
STB 32 19 STB
Gnd GND 7 Gnd 44 GND
GND 31 20 GND
2.8V ER_DN 6 0.1V 45 ER_DN
OC2_EVEN 30 21 OC2_EVEN
Gnd GND 5 Gnd 46 GND
GND 29 22 GND
Gnd SUS_UP 4 0.1~0.4V 47 SUS_UP
GND 28 23 GND
1.85V GND 3 Gnd 48 GND
OC1_EVEN 27 24 OC1_EVEN
Gnd SUS_DN 2 4V 49 SUS_DN
GND 26 25 GND
GND 1 Gnd 50 GND

Top 6 pins are 17V to Control then to Z-SUS


Control does not use 17V

63
Y-SUS P101 to Control P1 Connector Information Pin 1 on Control is Pin 50 on Y-SUS

Pin Label Run Diode Mode Pin Label Run Diode Mode

1 15V 17.8V Open 26 DELTA_VY_ON_OFF 0.7V 1.44V

2 15V 17.8V Open 27 GND Gnd Gnd

3 15V 17.8V Open 28 DELTA_VY1 0.68V 1.44V

4 15V 17.8V Open 29 GND Gnd Gnd

5 15V 17.8V Open 30 SET_UP2 0V 1.44V

6 15V 17.8V Open 31 GND Gnd Gnd

7 NC NC NC 32 SET_UP1 0.1V 1.44V

8 OC2_ODD 2.84V 1.44V 33 GND Gnd Gnd

9 GND Gnd Gnd 34 SET_DN2 4.9V 1.44V

10 OC1_ODD 1.87V 1.44V 35 GND Gnd Gnd

11 GND Gnd Gnd 36 SET_DN1 3.48V 1.44V

12 CLK 0.3V 1.44V 37 CTRL_OE 0V 1.44V

13 GND Gnd Gnd 38 GND Gnd Gnd

14 DATA_ODD 0V 1.44V 39 PASS_TOP 1.4V 1.44V

15 GND Gnd Gnd 40 GND Gnd Gnd

16 DATA_EVEN 0V 1.44V 41 DELTA_VY2 0.7V 1.44V

17 GND Gnd Gnd 42 GND Gnd Gnd

18 GND Gnd Gnd 43 ER_UP 0.2V 1.44V

19 STB 4.3V 1.44V 44 GND Gnd Gnd

20 GND Gnd Gnd 45 ER_DN 0.1V 1.44V

21 OC2_EVEN 2.8V 1.44V 46 GND Gnd Gnd

22 GND Gnd Gnd 47 SUS_UP 0.1~0.4V 1.44V

23 GND Gnd Gnd 48 GND Gnd Gnd

24 OC1_EVEN 1.85V 1.44V 49 SUS_DN 4V 1.44V

25 GND Gnd Gnd 50 GND Gnd Gnd

Voltage and Diode Mode Measurement (No Stand-By Voltages)


64 Fall 2009 1080P Plasma 50PS60
Y SUS Floating Ground 5V (5VFG) and Scan Input Check
•Note: All connectors going to the Y-
Y-SUS board are fragile.
•P114, P116, P214 and P216. Checked from Floating Gnd.
•Removing and reinserting the drive board or the Y-
Y-SUS can Y-Drive boards connected.
cause an intermittent or bad connection.
•Investigate these connectors carefully after replacing either
VSCAN: Black Lead: 0.76V Red Lead: Open
the Y-
Y-SUS or Upper or Lower Y-
Y-Drive boards and resolder if
5V FG: Black Lead: 0.5V Red Lead: 0.6V
necessary.

Y-SUS Y-SUS
P311 1 P313
1 VSCAN
n/c
Floating 5V FG
Ground

5V FG Floating
Ground
n/c
VSCAN

Diode Check means the Digital Volt Meter is in Diode Mode.


65 Fall 2009 1080P Plasma 50PS60
Y-SUS Connectors P311 – P314 to Y-Drive Information
Voltage and Diode
Note: All Voltage Measurement taken from Floating Ground Check Measurements.
This board has no
P311 CONNECTOR “Y-SUS " to “Upper Y-Drive " P116 Stand-By voltage.
Pin Label Run Diode Mode
P312 CONNECTOR “Y-SUS to
1~7 *FGnd FGnd FGnd “Upper Y-Drive " P114

8-9 5VFG 5V 1.3V All Pins are Floating Ground

10 n/c n/c n/c

11~12 VScan 140V 2.7V

* Note: (FGnd) Floating Ground

P313 CONNECTOR “Y-SUS " to “Lower Y-Drive " P214

Pin Label Run Diode Mode

1~2 VScan 140V 2.7V P314 CONNECTOR “Y-SUS”


to “Lower Y-Drive " P216
3 n/c n/c n/c
All Pins are Floating Ground
4~5 5VFG 5V 1.3V

6~12 *FGnd FGnd FGnd

* Note: (FGnd) Floating Ground

Diode Mode Readings taken with all connectors Disconnected. Black lead on Floating Gnd. DVM in Diode Mode.

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Y DRIVE UPPER AND LOWER PWB SECTION
The following section gives detailed information about the
Y Drive boards (Upper and Lower). These boards deliver the
“Y Drive Sustain Signals” to the Panel’s horizontal electrodes,
(This determines the Vertical resolution of the panel).
Each Y Drive board contains 6 buffers (12 total) driving 8 flexible
ribbon cables connecting 1080 horizontal electrodes.
These boards have no DC adjustments.

These boards receives their main B+ from the Y-SUS PWB:


• Floating ground 5V from the Switched Mode Power
Supply on the Y-SUS board.
(Must be measured from the Floating Ground).
• Y Scan signal (over 500V peak/peak from the Y-SUS board).
• Logic signals from the Control board, routed through Y-SUS.

67 Fall 2009 1080P Plasma 50PS60


Y Drive Upper and Lower PWB Layout
Y Drive Upper Y Drive Lower
P211
Note: All connectors
going to the Y-SUS

FPC
board are fragile.
FPC

P101 P201
P114, P116, P214
P214 and P216.
Removing and
reinserting the drive
FPC

P102 board or the Y-SUS can


P202

FPC
cause an intermittent or
open connection. P216

Investigate these
connectors carefully
P114 after replacing either
FPC

P103

FPC
P203
the Y-SUS or Upper
or Lower Y-Drive
boards and resolder
P116
if necessary.
P204
FPC

P104

FPC
P112

P111
68 Fall 2009 1080P Plasma 50PS60
Y Drive Upper and Lower PWB Connector Information
Y Drive Upper Y Drive Lower
All control signals for
lower drive board P211
Y Drive (V Scan) signal
in on top two pins 11 and 12.
P214
Floating Ground 5V pins 8 and 9

All Pins Floating Ground P216

P114
All Pins Floating Ground

Floating Ground 5V
P116 pins 4 and 5.
Y Drive (V Scan) signal in
on bottom two pins 1 and 2.
P112
All control signals
input from Y-SUS
P111
All control signals for
lower Y Drive board
69 Fall 2009 1080P Plasma 50PS60
Y Drive Upper and Lower PWB Chocolate Piece Locations
Y Drives Removed
Chocolate pieces are behind
Chocolate both Y-Drive boards.
Pay attention and make sure
to replace these pieces if the
board is removed.
Note: When removing either
Y-Drive board, these
Chocolate pieces will “Stick”
making the board feel as
thought its still attached.

Stand-Off

Note the PWB stand-off. The


top of the stand-off has a
collar which enters the PWB
screw hole. The board must
be lifted up slightly to clear
these collars before it can be
Chocolate
removed.

70 Fall 2009 1080P Plasma 50PS60


Y Drive Removing the Flexible Printed Circuits Gap (Tab exposed)

Tab

Flip the locking tab up


to unlock the FPC from
the connector

Slide a thin plastic


object under either end
of the FPC and lift up
gently releasing the tab.

Gently pull the FPC


from the connector.

When reinserting the


FPC, make certain that
both tabs are seated
correctly before
attempting to lock
Tab
No Gap (Tab seated)
71 Fall 2009 1080P Plasma 50PS60
Y Drive Floating Ground 5V and Scan Input Check
Checked from Floating Gnd
Diode Mode Check: All checks from Floating Gnd.
VSCAN BL: 0.76V RL: Open
BL = Black Lead on test point red lead on FG.
RL= Red Lead on test point black lead on FG. 5V FG BL: 0.60V RL: Open

Y Drive Upper P116 These are Y Drive Upper P214 These are
fragile fragile
connections connections

VSCAN
n/c
Floating 5V FG
Ground

Floating
5V FG Ground
n/c
VSCAN
1 1

Diode Check means the Digital Volt Meter is in Diode Mode, all connectors to PWB are removed.

72 Fall 2009 1080P Plasma 50PS60


Y Drive Connectors P116 – P214 to Y-SUS Information
Voltage and Diode
Note: All Voltage Measurement taken from Floating Ground Check Measurements.
This board has no
P116 CONNECTOR “Upper Y-Drive" to “Y-SUS" P311 Stand-By voltage.
Pin Label Run Diode Mode
P114 CONNECTOR Upper
1~2 VScan 140V Open "Y-Drive" to “Y-SUS" P312

3 n/c n/c n/c All Pins are Floating Ground

4~5 5VFG 5V Open

6~12 *FGnd FGnd FGnd

* Note: (FGnd) Floating Ground

P214 CONNECTOR “Lower Y-Drive" to “Y-SUS" P313

Pin Label Run Diode Mode

1~7 *FGnd FGnd FGnd


P216 CONNECTOR Lower
8-9 5VFG 5V Open "Y-Drive" to “Y-SUS" P314

10 n/c n/c n/c All Pins are Floating Ground

11~12 VScan 140V Open

* Note: (FGnd) Floating Ground

Diode Mode Readings taken with all connectors Disconnected. Black lead on Floating Gnd. DVM in Diode Mode.

73 Fall 2009 1080P Plasma 50PS60


Y Drive Upper P111 Checked Diode Mode Check: All checks from Floating Gnd.
BL = Black Lead on test point red lead on FG.
RL= Red Lead on test point black lead on FG.

5V Floating Ground
BL: 0.6V RL: Open OC1-T-B-Even BL: 0.87V
OC2-T-Odd BL: 0.87V
Scan (Y Drive Signal) Same
CLK-T BL: 0.85V All
as 5
BL: 0.76V RL: Open readings
below STB-T BL: 0.85V Open
Floating Ground with RL
OC2-T-Even BL: 0.84V
OC1-T-B-Odd BL: 0.87V
BL: 0.87V OC1-T-B-Even
BL: 0.87V OC2-T-Odd 1 BL: Open
BL: 0.85V CLK-T 2 BL: Open
Same
BL: 0.85V STB-T as 6 3 5 3 BL: Open
BL: 0.87V OC2-T-Even below
4 BL: Open
7
BL: 0.84V Data-Even 1 5 BL: 0.87V
BL: 0.84V Data-Odd 2 4 6 8 6 BL: 0.87V
BL: 0.87V OSC1-T-B-Odd 7 Reading will vary
P111
All readings Open with RL 8 Reading will vary
Bottom of PWB
All readings Open with RL
74 Fall 2009 1080P Plasma 50PS60
Y Drive Upper P211 Checked Diode Mode Check: All checks from Floating Gnd.
BL = Black Lead on test point red lead on FG.
RL= Red Lead on test point black lead on FG.

P211 Top of PWB

Floating Ground
1
1) Data-Even BL: 0.84V

2 2) Data-Odd BL: 0.84V


8
BL: 0.76V RL: Open 3) OC1-T-B-Odd BL: 0.87V
Scan
4) OC1-T-B-Even BL: 0.87V
5V Floating Ground 5) STB-B BL: 0.84V
BL: 0.6V RL: Open
6) CLK-B BL: 0.84V
7) OC2-B-Odd BL: 0.87V
Floating Ground
8) OC2-B-Even BL: 0.87V

All readings Open with RL

75 Fall 2009 1080P Plasma 50PS60


Y Drive Buffer Output Check
Note: The buffer output pins
Diode Mode Check: All checks from Floating Gnd. identified on the left are actually the
BL = Black Lead on test point red lead on FG. bottom connections on the Flexible
RL= Red Lead on test point black lead on FG. Ribbon Cable to the Panel (FPC). The
top connections to the FPC are on top
of the board as shown on the right.
Back Side of Y Drive board
Front Side of Y Drive board

Floating Ground

Buffer FG Checking any pin


from Floating Gnd
BL: 0.8V RL: Open

Buffer Output 135 Total Output


Buffer
Pins Bottom Pins per FPC
Output
Side 8 FPC connections
Pins
1080 Total Horizontal
Electrodes Top
establishing vertical
Side
pixel count
68 pins
67 pins

76 Fall 2009 1080P Plasma 50PS60


Z-SUS PWB SECTION

The following section gives detailed information about the


Z-SUS board. The Z-SUS board develops the “Panel Erase
Sustain Signals”.

This board has one DC adjustment (Z-Bias)

This Board Receives its operational B+ from the:

• VS from the Switched Mode Power Supply


• M5V from the Switched Mode Power Supply
• 15V from the Control board but developed on the Y-SUS board

77 Fall 2009 1080P Plasma 50PS60


Z-SUS PWB Layout
Z-SUS
P104
To Panel

FS102 (Vs)
3A/250V
No
VS IPMs
VS
NC
GND
GND P312 No
VA Z Drive TP
To SMPS IPMs
VA FL103
NC
M5V
M5V FS100 (5V)
Z Bias TP
4A/125V
R457
Top Side to P102
Chassis Gnd To Panel
+

Pins
Z-Bias
P100 Adj VR201
1~4
17.8V To Control
P103
P301 To Z-Sub
-
nc
78 Fall 2009 1080P Plasma 50PS60
Z-SUS PWB Adjustment
PREPARATION:

1) Pre-Heat unit for at least 10 Minutes before making adjustments.


2) Place unit into White Wash from the Customer’s Menu for all adjustments.
3) Be sure to use all adjustment values as indicated on the panel
voltage label in the upper right hand corner of the panel. (Example above)

PROCEDURE: (See preceding page for locations)

4) Place DC Volt meter on VZB TP Z-Bias TP


(Top of R457 to Chassis Gnd). Top of R457 to
Chassis Gnd
5) Adjust VZB (Z Bias) VR201 to match your Z-Bias
specific Panel’s voltage label. ADJ
VR201

Lower Right Side Of PWB

79 Fall 2009 1080P Plasma 50PS60


Z-SUS PWB Comparing to Y-SUS During Reset
PURPOSE: To show the timing between Y-SUS and Z-SUS

From the Waveform it can be seen that the timing of the Z-SUS must align to the Y-SUS for the panel to work
correctly.
If the timing is out of sync, the Control board is at fault.
Note: While making adjustments to the Ramp Up and/or Rame Down portion of the Y-Drive signal, the Control
board makes the same adjustments to the Z-SUS waveform.

80 Fall 2009 1080P Plasma 50PS60


Z-SUS PWB Testing without Y-SUS
Light bulbs must remain
PREPARATION: connected to the Vs from the
Power Supply to Gnd.
1) The Power Supply must be working normally under Light Bulb test.
Failure to do so, will cause the
2) Leave the Light Bulbs in place for the following test. 17V to fluxuate and cause the
Z-SUS to shutdown.
3) Jump the 17V from pin 1 or pin 2 P814 to the Z-SUS
connector P100 1~5. (See note below)
41V RMS 260V p/p (Normal)
4) Place the Scope on the Z-SUS
waveform Test Point FL103.

5) Confirm there is an Output from the


Z-SUS PWB
(approximate 230V p/p in this test)

This test confirms that the Power Supply,


Control Board and Z-SUS boards
are all working OK.

Note:
If the Y-SUS is defective, but is still able to generate the 17V, then just jump M5V to the Y-SUS board,
load the Vs with two light bulbs.
No other jumpers are required to test SMPS, Control and Z-SUS boards.

81 Fall 2009 1080P Plasma 50PS60


Z-SUS P101 Connector Pin ID and Voltages
P101
Voltage and Diode Mode Measurements for the Z-SUS PWB.
This board has no Stand-By voltages. 1

P101 CONNECTOR "Z-SUS PWB” to Power Supply P812


Diode Mode Diode Mode
Pin Label Run
Connected Disconnected
1 Vs *195V Open Open

2 Vs *195V Open Open

3 n/c n/c n/c n/c

4 Gnd Gnd Gnd Gnd

5 Gnd Gnd Gnd Gnd

6 Va *65V Open Open

7 Va *65V Open Open

8 n/c n/c Gnd Gnd

9 M5V 5V 0.74V Open

10 M5V 5V 0.74V Open


* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected unless specified. Black lead on Gnd. DVM in Diode Mode.

82 Fall 2009 1080P Plasma 50PS60


P100 Pin ID and Voltages
Voltage and Diode Mode Measurements for the Z-SUS PWB. Note: Black wire is NOT pin 1.
This board has no Stand-By voltages.

1
P100 CONNECTOR "Z-SUS PWB” to “Control Board” P2

Pin Label Run Diode Mode

1 15V 17.8V 1.9V

2 15V 17.8V 1.9V

3 15V 17.8V 1.9V

4 15V 17.8V 1.9V

5 CTRL-OE 0V Open

6 ER-UP 0V Open

7 ER-DN 0V Open

8 Gnd Gnd Gnd

9 Z Bias 3V Open

10 Gnd Gnd Open

11 SUS-UP 0.4V Open

12 SUS-DN 0.7V Open

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

83 Fall 2009 1080P Plasma 50PS60


CONTROL BOARD (LOGIC) SECTION
The following section gives detailed information about the Control board.
The control board develops all “Panel Drive Signals”. This signal is
developed from software stored in the board’s ROM.

This board has no adjustment.

The Auto Generator is located on this board which


(when pins 1 and 2 of P6 are jumped together) will produce a pattern on the
screen for testing purposes. This can be done without the Main board
delivering LVDS video to confirm if the problem lies with the Main board or
the panel and its boards.
(Note: In this set, If P814 is removed, pull the LVDS cable from the Control
board or the Auto Gen will not work.)
The Control Board Receives its main B+ from the:
• 5V from the Switched Mode Power Supply,
(Pins 1 through 4 of P200).
• The Control board does receive 15V from the Y-SUS, but simply
passes this voltage on to the Z-SUS board.
• Generates 3.3V and routes this voltage down to the three X Boards.
84 Fall 2009 1080P Plasma 50PS60
Control Board Layout Pins 1~4 Pins 9~12
5V 17.8V

P200 P2
P202 To SMPS To Z-SUS
n/c
1 1

D6
Top 6 pins Temp FL4 (5V) FL5 (5V)
17.8V (in)
P5
P1 D7
IC7 LVDS
To Y-SUS Data
X2
50Mhz

P101 IC12
IC1 P104
To Left X
P6 To Right X
Pins 1~4 Auto Gen Pins 1~4
3.3V Short 1~2 3.3V
IC304 IC16
1

P102 P3
3.3V Pins 1~4 To Center X n/c
FOR TCPs To each
X Board Pins 1~4
3.3V
85 Fall 2009 1080P Plasma 50PS60
Control Board (EMI Filter) Explained

NOTE: The Black wire on 1


P200 Connector is not pin 1.

The two EMI Filters just below P200 are surface mount mini
devices which shunt high frequencies to ground. They
have 4 pins. The top and bottom are the B+ route, the
FL4 or FL5
two side solder points are Chassis Gnd. (5V EMI filters)

P200 5V

Gnd Gnd

5V
FL4 (5V) FL5 (5V)

86 Fall 2009 1080P Plasma 50PS60


Control Board Regulator Checks Pins 1~4 (5V) Pins 9~12 (15V)

P200 P2
To SMPS To Z-SUS

D6
Temp FL4 (5V) FL5 (5V)

5V
D7 IC7
Data

2.5V 0V
5V
IC12 0V
3.3V

0V 0V
IC304 IC16
3.3V 3.3V

5V 5V

If the M5V input from P200 is missing, the Control board can still be tested. If the
SMPS is developing STBY 5V, the STBY 5V can be jumped to any 5V point on the
Control board. Confirm that LED D6 and LED D7 are illuminated or blinking, if they
are, the board is most likely OK.

87 Fall 2009 1080P Plasma 50PS60


Control Board Crystal X2 Check

Use bottom left


leg of Crystal

50Mhz 4V P/P

88 Fall 2009 1080P Plasma 50PS60


Control PWB Signal Block

The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.

Control Board to X Board Basic Diagram of Control Board


Address Signal Flow IC1
This Picture shows Signal Flow Distribution to help determine the
failure depending on where the problem shows on the screen. MCM CONTROL PWB

Resistor Array X-DRIVE PWB

DRAM
16 bit TCP PANEL
EEPROM
MCM 23 Total TCPs
2 Buffers 5888 Line Outputs
IC1 per TCP
RGB per/Pixel
128 Lines per Buffer 5888 / 3 = 1962
256 Lines output Total 1920 actual
(42 pin outputs not used)
To X-Drive To X-Drive To X-Drive
Left Board Center Board Right Board

89 Fall 2009 1080P Plasma 50PS60


Control Board LVDS P5 Connector LVDS Cable Connector Removal
If a video problem is encountered, to eliminate all Panel
Press Inward
boards, remove the LVDS cable and then jump the Auto Gen
connector pin 1 and 2. If the picture is OK, the Power Supply,
Y-SUS, Z-SUS, Y-Drives, X-Boards, TCPs and the Panel are
OK. And most likely the Control board is OK too.

The pin connections on the LVDS plug are too close


together for safe readings, use Test Points. To remove the
LVDS cable, press the two locking tabs inward, then rock
the connector side to side while pulling out on the
connector.

1
Press Inward

P6 Auto Gen:
Jump pin 1 to 2, a series of patterns will be produced on screen.
90 Fall 2009 1080P Plasma 50PS60
Control Board LVDS P5 Connector Voltages and Diode Check
Pins 7~10, 47~51 are n/c
P5 Connector "Control Board” to “Main PWB” P1003 Pins 1, 11, 18, 21, 34, 37, 44~46 are Gnd

PIN LABEL RUN DIODE PIN LABEL RUN DIODE

41 RA1- 1.46V 0.89V 22 RB2+ 1.26V 0.7V 51 P5


40 RA1+ 1.19V 0.94V 20 RC2- 1.27V 0.8V

39 RB1- 1.29V 0.84V 19 RC2+ 1.20V 0.9V Gnd


38 RB1+ 0V 0.94V 17 RCLK2- 1.22V 0.9V

36 RC1- 1.27V 0.94V 16 RCLK2+ 1.26V 0.9V


40
35 RC1+ 1.20V 0.84V 15 RD2- 1.16V 0.9V 35
33 RCLK1- 0V 0.88V 14 RD2+ 1.29V 0.9V
30
32 RCLK1+ 1.23V 0.9V 13 RE2- 1.18V 0.9V
25
31 RD1- 1.26V 0.9V 12 RE2+ 1.3V 0.9V

30 RD1+ 1.18V 0.9V 6 Module SDA 3.28V Open


20
29 RE1- 1.26V 0.9V 5 2.8V Display Enable 2.8V 0.5V 15
28 RE1+ 1.24V 0.7V 4 Module SCL 3.28V Open
Gnd
25 RA2- 1.0V 0.9V 3 ROM TX 3.28V Open 5
24 RA2+ 1.45V 0.9V 2 ROM RX 0.5V Open

23 RB2- 1.2V 0.8V


2

Blue Pins indicate 24 bit


Note: There are no voltages in Stand-By mode. (12 bit differential) video signal

91 Fall 2009 1080P Plasma 50PS60


Control Board P2 Connector Pin ID and Voltages
Voltage and Diode Mode Measurements for the Control PWB.
Note: There are no voltages in Stand-By mode. P2

P2 CONNECTOR " Control Board” to “Z-SUS PWB” P100

Pin Label Run Diode Mode

1 SUS-DN 0.7V 1.49V


17.8V
2 SUS-UP 0.4V 1.49V
1
3 Gnd Gnd 1.49V

4 Z Bias 3V 1.48V

5 Gnd Gnd Gnd


6 ER-DN 0V 1.48V
7 ER-UP 0V 1.48V

8 CTRL-OE 0V 1.4V P2 Label


9 15V 17.8V 1.32V

10 15V 17.8V 1.32V

11 15V 17.8V 1.32V

12 15V 17.8V 1.32V

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

92 Fall 2009 1080P Plasma 50PS60


Control Board P200 Connector Pin ID and Voltages
P200
Voltage and Diode Mode Measurements for the Control PWB.
Note: There are no voltages in Stand-By mode.
1

NOTE: The Black wire on


P200 Connector is not pin 1.

P200 CONNECTOR "Control PWB “ to “Power Supply PWB” P813


Diode Mode Diode Mode
Pin Label Run
Connected Disconnected
1 M5V 5V 0.75V 0.92V

2 M5V 5V 0.75V 0.92V

3 M5V 5V 0.75V 0.92V

4 M5V 5V 0.75V 0.92V

5 Gnd Gnd Gnd Gnd

6 Gnd Gnd Gnd Gnd

7 Gnd Gnd Gnd Gnd

8 Gnd Gnd Gnd Gnd

Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.

93 Fall 2009 1080P Plasma 50PS60


P101 P1
Y-SUS PWB Control PWB
Pin 1 on Control is
Control P1 to Y-SUS 15V
15V
50
49
17.8V
17.8V
1
2
15V
15V
Pin 50 on Y-SUS
P101 Plug Information 15V
15V
48
47
17.8V
17.8V
3
4
15V
15V
17.8V
15V 46 5 15V
17.8V
15V 45 6 15V
NC
NC 44 7 NC
2.84V
OC2_ODD 43 8 OC2_ODD
Gnd
GND 42 9 GND
1.87V
OC1_ODD 41 10 OC1_ODD
Gnd
GND 40 11 GND
0.3V
CLK 39 12 CLK
Gnd
GND 38 13 GND
0V
DATA_ODD 37 14 DATA_ODD
36 Gnd
GND 15 GND
35 0V
DATA_EVEN 16 DATA_EVEN
Gnd
GND 34 17 GND
Gnd 18
GND 33 GND
4.3V 19
STB 32 STB
Gnd 20
GND 31 GND
Voltage Measurements for OC2_EVEN 30
2.8V 21 OC2_EVEN
Gnd
the Control PWB. GND 29
Gnd
22 GND
GND 28 23 GND
Note: There are no OC1_EVEN 27
1.85V 24 OC1_EVEN
voltages in Stand-By GND 26
Gnd
0.7V
25 GND
25 26
mode. DELTA_VY_ON_OFF
GND 24
Gnd 27
DELTA_VY_ON_OFF
GND
0.68V 28
DELTA_VY1 23 DELTA_VY1
Gnd 29
GND 22 GND
0V 30
SET_UP2 21 SET_UP2
20 Gnd 31
GND GND
19 0.1V 32
SET_UP1 SET_UP1
18 Gnd 33
GND GND
17 4.9V 34
SET_DN2 SET_DN2
16 Gnd 35
GND GND
15 3.48V 36
SET_DN1 SET_DN1
14 0V 37
CTRL_OE CTRL_OE
GND 13 Gnd 38 GND
PASS_TOP 12 1.4V 39 PASS_TOP
GND 11 Gnd 40 GND
DELTA_VY2 10 0.7V 41 DELTA_VY2
GND 9 Gnd 42 GND
ER_UP 8 0.2V 43 ER_UP
GND 7 Gnd 44 GND
ER_DN 6 0.1V 45 ER_DN
GND 5 Gnd 46 GND
SUS_UP 4 0.1~0.4V 47 SUS_UP
GND 3 Gnd 48 GND
SUS_DN 2 4V 49 SUS_DN
GND 1 Gnd 50 GND

94
Control P1 to Y-SUS P101 Plug Information Pin 1 on Control is Pin 50 on Y-SUS.
Note: There are no voltages in Stand-By mode
Pin Label Run Diode Mode Pin Label Run Diode Mode

1 15V 17.8V Open 26 DELTA_VY_ON_OFF 0.7V 1.44V

2 15V 17.8V Open 27 GND Gnd Gnd

3 15V 17.8V Open 28 DELTA_VY1 0.68V 1.44V

4 15V 17.8V Open 29 GND Gnd Gnd

5 15V 17.8V Open 30 SET_UP2 0V 1.44V

6 15V 17.8V Open 31 GND Gnd Gnd

7 NC NC NC 32 SET_UP1 0.1V 1.44V

8 OC2_ODD 2.84V 1.44V 33 GND Gnd Gnd

9 GND Gnd Gnd 34 SET_DN2 4.9V 1.44V

10 OC1_ODD 1.87V 1.44V 35 GND Gnd Gnd

11 GND Gnd Gnd 36 SET_DN1 3.48V 1.44V

12 CLK 0.3V 1.44V 37 CTRL_OE 0V 1.44V

13 GND Gnd Gnd 38 GND Gnd Gnd

14 DATA_ODD 0V 1.44V 39 PASS_TOP 1.4V 1.44V

15 GND Gnd Gnd 40 GND Gnd Gnd

16 DATA_EVEN 0V 1.44V 41 DELTA_VY2 0.7V 1.44V

17 GND Gnd Gnd 42 GND Gnd Gnd

18 GND Gnd Gnd 43 ER_UP 0.2V 1.44V

19 STB 4.3V 1.44V 44 GND Gnd Gnd

20 GND Gnd Gnd 45 ER_DN 0.1V 1.44V

21 OC2_EVEN 2.8V 1.44V 46 GND Gnd Gnd

22 GND Gnd Gnd 47 SUS_UP 0.1~0.4V 1.44V

23 GND Gnd Gnd 48 GND Gnd Gnd

24 OC1_EVEN 1.85V 1.44V 49 SUS_DN 4V 1.44V

25 GND Gnd Gnd 50 GND Gnd Gnd

95 Fall 2009 1080P Plasma 50PS60


P101 Connector "Control Board” to “Left X PWB” P110
1~4 pins 3.3V TP
Leave Connector P101 Connected to the X-Board P110
1~4
Pin Run Diode Mode Pin Run Diode Mode
6
1~4 3.3V 0.67V 33 1.0V 0.97V Pin 1
6 1.0V 0.97V 34 1.27V 0.97V
7 1.27V 0.97V 36 1.0V 0.97V White hash
marks count
8 1.0V 0.97V 37 1.27V 0.97V
as 5
11
9 1.27V 0.97V 39 1.0V 0.97V
11 1.0V 0.97V 40 1.27V 0.97V
12 1.27V 0.97V 41 1.0V 0.97V 20
13 1.0V 0.97V 42 1.27V 0.97V
14 1.27V 0.97V 44 1.0V 0.97V
15 1.0V 0.97V 45 1.27V 0.97V 31
16 1.27V 0.97V 46 1.0V 0.97V
18 1.0V 0.97V 47 1.27V 0.97V
19 1.27V 0.97V 49 1.0V 0.97V 40
20 1.0V 0.97V 50 1.27V 0.97V
21 1.27V 0.97V 51 1.0V 0.97V 60
23 1.0V 0.97V 52 1.27V 0.97V 50
24 1.27V 0.97V 53 1.0V 0.97V
26 1.0V 0.97V 54 1.27V 0.97V 59
27 1.27V 0.97V 56 1.87V 1.2V
28 1.0V 0.97V 57 1.87V 1.2V 58
29 1.27V 0.97V 58 3.22V 1.2V
57 56
31 1.0V 0.97V 59 0.49V 1.1V
32 1.27V 0.97V 60 0.49V 1.1V Pins with no TP are Gnd.

96 Fall 2009 1080P Plasma 50PS60


P102 Connector "Control Board” to “Center X PWB” P210
White hash
marks count
6
as 5

Pin 1

1~4 10 21 30 40 56 60
3.3V TP
51
1ST 4 pins

Leave Connector P102 Connected to the Center X-Board P110


Diode Diode Diode Diode
Pin Run Pin Run Pin Run Pin Run
Mode Mode Mode Mode

1~4 3.3V 0.67V 21 1.27V 0.97V 37 1.27V 0.97V 53 1.0V 0.97V

6 1.0V 0.97V 22 1.0V 0.97V 39 1.0V 0.97V 54 1.27V 0.97V

7 1.27V 0.97V 24 1.0V 0.97V 40 1.27V 0.97V 56 1.0V 1.2V

9 1.0V 0.97V 25 1.27V 0.97V 42 1.0V 0.97V 57 1.27V 1.2V

10 1.27V 0.97V 27 1.0V 0.97V 43 1.27V 0.97V 58 1.0V 1.2V

12 1.0V 0.97V 28 1.27V 0.97V 45 1.0V 0.97V 59 1.27V 1.1V

13 1.27V 0.97V 30 1.0V 0.97V 46 1.27V 0.97V 60 1.0V 1.1V

15 1.0V 0.97V 31 1.27V 0.97V 48 1.0V 0.97V


49 1.27V 0.97V
Note:
16 1.27V 0.97V 33 1.0V 0.97V
There are no voltages in
18 1.0V 0.97V 34 1.27V 0.97V 51 1.0V 0.97V
Stand-By mode.
19 1.27V 0.97V 36 1.0V 0.97V 52 1.27V 0.97V
Pins with no TP are Gnd.

97 Fall 2009 1080P Plasma 50PS60


P104 Connector "Control Board” to “Right X PWB” P310 White hash
Leave Connector P104 Connected to the X-Board P310 marks count
60 as 5
Pin Run Diode Mode Pin Run Diode Mode
1~4 3.3V 0.67V 33 1.0V 0.98V
6 1.0V 0.98V 34 1.27V 0.98V
50
7 1.27V 0.98V 36 1.0V 0.98V
8 1.0V 0.98V 37 1.27V 0.98V
9 1.27V 0.98V 39 1.0V 0.98V
40
11 1.0V 0.98V 40 1.27V 0.98V
12 1.27V 0.98V 41 1.0V 0.98V 56
13 1.0V 0.98V 42 1.27V 0.98V
14 1.27V 0.98V 44 1.0V 0.98V
15 1.0V 0.98V 45 1.27V 0.98V 31
16 1.27V 0.98V 46 1.0V 0.98V
18 1.0V 0.98V 47 1.27V 0.98V
20
19 1.27V 0.98V 49 1.0V 0.98V
20 1.0V 0.98V 50 1.27V 0.98V
21 1.27V 0.98V 51 1.0V 0.98V 10 Pin 1
23 1.0V 0.98V 52 1.27V 0.98V
24 1.27V 0.98V 53 1.0V 0.98V
26 1.0V 0.98V 54 1.27V 0.98V 6
27 1.27V 0.98V 56 1.87V 0.49V
1~4
28 1.0V 0.98V 57 1.87V 0.49V
3.3V TP
29 1.27V 0.98V 58 3.22V 3.22V
31 1.0V 0.98V 59 0.49V 1.87V Note:
There are no voltages in Stand-By mode.
32 1.27V 0.98V 60 0.49V 1.87V
Pins with no TP are Gnd.

98 Fall 2009 1080P Plasma 50PS60


X BOARD (LEFT, RIGHT and CENTER) SECTION
The following section gives detailed information about the X boards.
These boards deliver the Color information signal developed on the
Control board to the TCPs, (Taped Carrier Packages). The TCPs are
attached to the vertical FPCs, (Flexible Printed Circuits) which are
attached directly to the panel. The X boards are the attachment
points for these FPCs.
These boards have no adjustment.

These boards receive their main B+ from the:

• Originally developed on the Switched Mode Power Supply


Va (Voltage for Address) is routed through the Y-SUS board
and then to the Left X board via P121 pins 1~4. Va also
leaves P120 and is sent to the Center X via P220. Then it
leaves on P221 and goes to the Right X P320.
• Control board develops 3.3V and routes to each X board via
ribbon connectors P110, P210 and P310.

99 Fall 2009 1080P Plasma 50PS60


X PWB Additional Information

There are three X boards, the Left, Center and the Right
(As viewed from the rear of the set).
The three X boards have very little circuitry. They are basically signal
and voltage routing boards.
• They route the Va to all of the Taped Carrier Packages (TCPs).
Va is introduced to the Left X board first, then the Left X sends
Va to the Center X and then the Center X sends Va to the Right X.
• They route the Logic (Color) signals from the Control board
to all of the Taped Carrier Packages (TCPs). Including VPP which is
generated on each of the 3 X boards.
The X boards have connectors to 23 TCPs, 8 on the left and right and
7 on the center. The Center X board has connections to 7 TCPs.
There are a total of 23 TCPs and each TCP has 2 buffers. So there
are a total of 46 buffers feeding the panel’s 5760 vertical electrodes.

100 Fall 2009 1080P Plasma 50PS60


X PWB TCP Heat Sink Warning
NEVER run the television with this heat sink removed.
Damage to the TCPs will occur and cause a defective panel.

The Vertical
Address buffers
(TCPs) have one
heat sink across
all 23 TCPs as
indicated by the
arrow.

101 Fall 2009 1080P Plasma 50PS60


X PWB Layout Primary Circuit Diode Check
The three X-Boards have two similar circuit layouts for the connections going to the TCPs., as shown below.

On any Gnd - On any Gnd


+

- On the below: On the below:

+
On any Va (0.54V) TCPs connected. On any Va (Open)
On any Va (0.84V) TCPs disconnected. On 3.3V (0.62V)
On 3.3V (0.42V) On any VPP (Open)
On any VPP (0.42V)

Readings given with TCPs connected unless specified.

102 Fall 2009 1080P Plasma 50PS60


TCP (Tape Carrier Package)
This shows the layout of the bottom ribbon cables connecting to the Panel’s Vertical electrodes,
(Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.

X Drive Board
Va
Y-SUS Board
Front panel Horizontal Address
Rear panel Vertical Address

Logic
X_B/D

Control Board
Frame

Chocolate
ctor
Conne
TCP
Taped Carrier 128 lines 128 lines
Package
256 total lines
256 Vertical Con
nect
Electrodes or

Flex
ibl
Cabl e
e
TCP
Attached directly Heat Sink
to Flexible cable Back side of TCP Ribbon

103 Fall 2009 1080P Plasma 50PS60


TCP Testing Must be checked on flexible cable.

On any Gnd
+

VPP 3.3V VPP Look for any TCPs


Gnd
- On the below: Gnd being discolored.
Gnd Ribbon Damage.
On any Va (0.58V) Va Va
Cracks, folds
On 3.3V (0.72V)
Pinches, scratches,
On any VPP (0.58V)
etc…
1 5 10 15 20 25 30 35 40 45 50
Reverse leads reads Open

104 Fall 2009 1080P Plasma 50PS60


TCP 3.3V B+ Check Warning: DO NOT attempt to run the set with the
Heat Sink over the TCPs removed.
For Connectors P101, P102
and P104 on the Control Checking IC304 for 3.3V, use center pin.
board, see Control board
section. IC304
0V 3.3V for TCPs
3.3V IC304 on
Red Lead On 3.3V (0.42V)
Black Lead On 3.3V (0.62V) 5V Control Board
This also test IC100, IC200 and IC300

3.3V in on Pins 57 ~ 60 on any connector

Left X PWB P110 Center X PWB P210 Right X PWB P310

All Connectors to All TCPs look very


similar for the 3.3V test point. The
upside down L trace at pins 34 and 35 of
each connector.
Example here from P204. You can only
check for continuity, you can not run
the set with heat sink removed.

105 Fall 2009 1080P Plasma 50PS60


TCP Visual Observation. Damaged TCP

Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
After a very short time, these ICs will begin to self destruct due to overheating.

This damaged TCP can,


a) Cause the Power Supply to shutdown
b) Generate abnormal vertical bars
c) Cause the entire area driven by the TCP to be “All White”
d) Cause the entire area driven by the TCP to be “All Black”
e) Cause a “Single Line” defect

106 Fall 2009 1080P Plasma 50PS60


Left X Drive P121 Connector to Y-SUS P307 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)

P121 CONNECTOR " X-Drive Left PWB" to "Y-SUS” P307


Pin Label Run Diode Mode
1 VA *65V Open
2 VA *65V Open
3 VA *65V Open
1
4 VA *65V Open
5 NC NC NC
6 Gnd Gnd Gnd
7 Gnd Gnd Gnd

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

107 Fall 2009 1080P Plasma 50PS60


P110 Connector “Left X PWB” to “Control” P101
Leave Connector P310 Connected to the Control Board P104 White hash marks
count as 5
Pin Run Diode Mode Pin Run Diode Mode
Pin 1
15
1 0.49V 1.1V 29 1.27V 0.97V
57~60 1
2 0.49V 1.1V 30 1.0V 0.97V
3 3.22V 1.2V 32 1.27V 0.97V
4 1.87V 1.2 33 1.0V 0.97V
5 1.87V 1.2V 34 1.27V 0.97V
7 1.27V 0.97V 35 1.0V 0.97V
57~60 pins Pins with no TP are Gnd.
3.3V TP
8 1.0V 0.97V 37 1.27V 0.97V 53 Gnd
9 1.27V 0.97V 38 1.0V 0.97V 50 Gnd
10 1.0V 0.97V 40 1.27V 0.97V 47 Gnd
11 1.27V 0.97V 41 1.0V 0.97V 44 Gnd
12 1.0V 0.97V 42 1.27V 0.97V
41 Gnd
14 1.27V 0.97V 43 1.0V 0.97V
38 Gnd
15 1.0V 0.97V 45 1.27V 0.97V
35 Gnd
16 1.27V 0.97V 46 1.0V 0.97V
32 Gnd
17 1.0V 0.97V 47 1.27V 0.97V
27 Gnd
19 1.27V 0.97V 48 1.0V 0.97V
22 Gnd
20 1.0V 0.97V 49 1.27V 0.97V
21 1.27V 0.97V 19 Gnd
50 1.0V 0.97V
22 1.0V 0.97V 52 1.27V 0.97V 14 Gnd

24 1.27V 0.97V 53 1.0V 0.97V 11 Gnd


25 1.0V 0.97V 54 1.27V 0.97V 6 Gnd
27 1.27V 0.97V 55 1.0V 0.97V
28 1.0V 0.97V 57~60 3.3V 0.67V 56 n/c

108 Fall 2009 1080P Plasma 50PS60


P210 Connector "Center X PWB“ to ”Control Board” P102
Leave Connector P210 Connected to the Control Board P102
White hash marks
Pin Run Diode Mode Pin Run Diode Mode
count as 5
Pin 1
1 0.49V 1.1V 29 1.27V 0.97V
15
2 0.49V 1.1V 30 1.0V 0.97V 1
3 3.22V 1.2V 32 1.27V 0.97V
4 1.87V 1.2 33 1.0V 0.97V
5 1.87V 1.2V 34 1.27V 0.97V
7 1.27V 0.97V 35 1.0V 0.97V
57~60 pins Pins with no TP are Gnd.
8 1.0V 0.97V 37 1.27V 0.97V 3.3V TP 51 Gnd
9 1.27V 0.97V 38 1.0V 0.97V 57~60
44 Gnd
10 1.0V 0.97V 40 1.27V 0.97V
39 Gnd
11 1.27V 0.97V 41 1.0V 0.97V 36 Gnd
12 1.0V 0.97V 42 1.27V 0.97V 31 Gnd
14 1.27V 0.97V 43 1.0V 0.97V 26 Gnd
15 1.0V 0.97V 45 1.27V 0.97V 23 Gnd
16 1.27V 0.97V 46 1.0V 0.97V 18 Gnd
17 1.0V 0.97V 47 1.27V 0.97V 13 Gnd
19 1.27V 0.97V 48 1.0V 0.97V 6 Gnd
20 1.0V 0.97V 49 1.27V 0.97V
21 1.27V 0.97V 50 1.0V 0.97V 56 n/c

22 1.0V 0.97V 52 1.27V 0.97V


24 1.27V 0.97V 53 1.0V 0.97V
25 1.0V 0.97V 54 1.27V 0.97V
27 1.27V 0.97V 55 1.0V 0.97V
28 1.0V 0.97V 57~60 3.3V 0.67V

109 Fall 2009 1080P Plasma 50PS60


P310 Connector “Right X Board” to “Control” P104
Leave Connector P310 Connected to the Control Board P104
White hash marks
Pin Run Diode Mode Pin Run Diode Mode
count as 5
1 0.49V 1.1V Pin 1
29 1.27V 0.97V
15 1
2 0.49V 1.1V 30 1.0V 0.97V 57~60
3 3.22V 1.2V 32 1.27V 0.97V
4 1.87V 1.2 33 1.0V 0.97V
5 1.87V 1.2V 34 1.27V 0.97V
7 1.27V 0.97V 35 1.0V 0.97V 57~60 pins Pins with no TP are Gnd.
8 1.0V 0.97V 37 1.27V 0.97V 3.3V TP
51 Gnd
9 1.27V 0.97V 38 1.0V 0.97V
44 Gnd
10 1.0V 0.97V 40 1.27V 0.97V
39 Gnd
11 1.27V 0.97V 41 1.0V 0.97V
36 Gnd
12 1.0V 0.97V 42 1.27V 0.97V
31 Gnd
14 1.27V 0.97V 43 1.0V 0.97V
26 Gnd
15 1.0V 0.97V 45 1.27V 0.97V
23 Gnd
16 1.27V 0.97V 46 1.0V 0.97V
18 Gnd
17 1.0V 0.97V 47 1.27V 0.97V 13 Gnd
19 1.27V 0.97V 48 1.0V 0.97V 6 Gnd
20 1.0V 0.97V 49 1.27V 0.97V
21 1.27V 0.97V 50 1.0V 0.97V 56 n/c
22 1.0V 0.97V 52 1.27V 0.97V
24 1.27V 0.97V 53 1.0V 0.97V
25 1.0V 0.97V 54 1.27V 0.97V
27 1.27V 0.97V 55 1.0V 0.97V
28 1.0V 0.97V 57~60 3.3V 0.67V

110 Fall 2009 1080P Plasma 50PS60


P120, P220, P221 and P320 X Board Connector Information (Va distribution)
White hash marks count as 5

P120 P220 P221 P320


Left X Center X 16~30 Center X Right X
16~30
Gnd
Gnd 1~15 1~15
Gnd Gnd

16~18 13~15 16~18


13~15 nc nc nc
nc

1~12 19~30 1~12 19~30


Va Va Va Va

On any Gnd - On any Gnd


+

- On any Va (0.54V) TCPs connected. On any Va (Open)

+
On any Va (0.84V) TCPs disconnected. TCPs connected
or disconnected

Note: Va voltage will vary by panel, check your specific panel’s voltage label.

111 Fall 2009 1080P Plasma 50PS60


MAIN PWB SECTION
The following section gives detailed information about the Main board. This
board contains the Microprocessor, Audio section, video section and all
input, outputs. It also receives all input signals and processes them to be
delivered to the Control board via the LVDS cable. The main tuner (VSB,
8VSB and QAM) is located on the main board. This board is also where the
television’s software upgrades are accomplished through the USB input.

This board has no adjustment.

The Main Board Receives its operational voltage from the SMPS:

DURING STAND BY 5V:


• STBY 5V

DURING RUN: (STBY 5V remains)


• +5V from the Switched Mode Power Supply
• 12V for Tuner (Stepped down to 5V)
• 17V for Audio

112 Fall 2009 1080P Plasma 50PS60


Main PWB Layout and Identification
To Power Supply

P1006
LVDS (Video)
To Control
IC302 IC804
IC203 P1003
P1001
IC952
To
Front
Controls IC801
IC503 USB
IC1
X1
12 Mhz
Micro
Tuner
SPK X501 IC504
Out 25 Mhz HDMI 3
IC1001
P1005 Audio RGB/DVI Pin 19

LD501
Optical
Audio Tuner
RS232 RGB/PC Component inputs Audio
IC805 AV
In 3
Pin 1
HDMI inputs

A/V Composite inputs RF

Wired Remote S-In

113 Fall 2009 1080P Plasma 50PS60


50PS60 MAIN PWB (Front Side) COMPONENT LAYOUT

Components that are Grayed out are on the back.


IC804 USB
1) 5.1V 4) 0V IC804
P1006 2) Gnd 5) 0V
P1001 C IC302 IC203
3) 3.2V 6) 5.1V
Q301 P1003 LVDS IC952
E B

IC202

IC801
IC503 USB
A
C A IC1 IC204
D303 D502
A
IC201 C A
IC504
B X501
C
E
HDMI
Q1002 X1
P1005
19 Video
MAIN (Digital) Front Board
16 SIF
15 (5V)
IC805
Q801 DIF - 13 C=4.7V
DIF + 12
D805
A=0V A=5V
A
C A
TUNER

A
(5V) 4
C A
D804
1
ZD601 K A

114
Main PWB Back Side (Regulator Checks)

IC304
IC301

IC305
D951 IC202
IC201 Q303

D801
D1001
Q302
Q951
Q1001
Q502 IC502 Q501

IC601
Q504
D802
Q503 IC803

D892
D628

Q602
D627
D890
IC505 IC602 IC802

115 Fall 2009 1080P Plasma 50PS60


50PS60 MAIN PWB COMPONENT LAYOUT

Q303 3 IC304 Components that are Grayed out are on the back.
BE IC301 IC804 USB
1 2 3
12 1) 5.1V 4) 0V IC804
P1006 C 2) Gnd 5) 0V
P1001 C IC302 IC203
3) 3.2V 6) 5.1V
Q301 2 P1003 LVDS IC952
1 2 3 EB C
IC201 D951

Q305 IC202 AA
AA
2 D801
IC801 C
IC503 USB
Q951
D1001 C
IC1 IC204
D303 D502
C A BE
A EB
C A Q302
IC201 Q1002 C Q504 IC504
C IC502
B Out X501
C E B E G S
HDMI
X1 Q502 C
EB D Q891
P1005 Q1001 C Gnd In C
Q501 Out EB C
19 Video
D802
IC601 MAIN (Digital) Front Board EB
AA EB
Q503 16 SIF
IC803 15 (5V)
K IC805
Q892 Q801 DIF - 13 C=4.7V
BE DIF + 12
D805
A K D628 A=0V A=5V
C A C
A A Q601
Q890 D627 K B E TUNER
BE A A
IC802 C
A IC505
C IC602 (5V) 4
C A 2
D804 D633 K

A A 1
ZD601 K A 123

116
50PS60 MAIN (BACK SIDE) SIMICONDUCTORS
IC201 NVRAM IC304 1.8VMST IC505 5V (Tuner) IC602 RS232 RAM Q1001 Pow Down Q502 Video Buffer Q890/2 HDMI1/2
Pin Pin Reg Pin Reg Pin Pin IC1001 Pin Pin Hot Swap
[1] Gnd [1] 0.6V [1] 3.8V [1] Gnd [B] 0V [B] 0.6V [B] 0V
[2] Gnd [2] 1.8V [2] 5V [2] Gnd [E] Gnd [E] 2.1V [E] Gnd
[3] Gnd [3] 3.28V [3] 8V [3] Gnd [C] 3.3V [C] Gnd [C] 0V
[4] Gnd [4] Gnd
[5] 3.28V [5] 4.5V Q302 Reset Q503 SIF Buffer Q891/951 HDMI3/4
[6] 3.28V IC601 RS232 Control [6] 4.5V Pin Pin Pin Hot Swap
[7] 0V IC305 3.3VMST Pin [7] 3.3V [B] 3.3V [B] 2.3V [B] 0V
[8] 3.28V Pin Reg [1] 3.3V [8] 4.5V [E] 3.2V [E] 3.0V [E] Gnd
[1] Gnd [2] 5.4V [C] 0V [C] Gnd [C] 0V
IC202 HDCP [2] 3.0V [3] 0V IC802/3 HDMI1/2
Pin [3] 4.9V [4] 0V Pin Q303 5V MST Q501 1.2V PVSB
[1] Gnd [5] 5.3V [1] Gnd Pin Pin Switch
[2] Gnd [6] 5.3V [2] Gnd [S] 4.9V [S] 3.3V
[3] 3.28V [7] 5.3V [3] Gnd [G] 4.9V [G] 3.3V/0V
[4] Gnd IC502 1.2V PVSB [8] 0V [4] Gnd [D] 0V [D] 0V/3.27V
[5] 3.28V On Digital CH / Off Analog [9] 3.3V [5] 4.5V On Digital CH / Off Analog
[6] 3.28V Pin Reg [10] 3.3V [6] 4.5V Q501 1.2V PVSB
[7] 3.28V Gnd Gnd [11] 0.3V [7] 3.3V Pin Switch Q601 RS232 TX
[8] 3.28V In 0V/3.3V [12] 3.3V [8] 4.5V [B] 0V/0.6V Pin Buffer D801 EDID B+ D802 HDMI CEC
Out 0V/1.2V [13] 0V [E] 0V [B] 0.6V Pin Pin B+
IC301 3.3V VST [14] 5.4V [C] 3.3V/0V [E] Gnd A 4.6V A 0V
Pin [15] 0V On Digital CH / Off Analog [C] 0V C 4.9V C 3.17V
[1] Gnd [16] 3.3V A 5.1V A 3.27V
[2] 3.3V D1001 IC1001 D951 HDMI4 PWR D627 RS232 TX Noise D628 RS232 RX Noise D633 RGB B+
[3] 5.0V Pin Reset Limit Pin Pin Suppression Pin Suppression Pin
A 3.27V A 5.1V A (-5.3V) A 0V A 0V
C 3.3V C 4.65V C 0.1V C 0V C 4.5V
A 0V A Gnd A Gnd A 5.0V

50PS60 MAIN (FRONT SIDE) SIMICONDUCTORS


IC302 1.3V VDDC IC804 USB 5V IC952 HDMI4 EDID Q301 Turns on
Pin Pin Pin Pin Q303 D804 HDMI1 PWR D805 HDMI2 PWR D806 HDMI3 PWR
[1] 5.47V [1] 5.0V [1] Gnd [B] 0.54V Pin Pin Pin
[2] 4.89V [2] Gnd [2] Gnd [E] Gnd A 5.1V A 5.1V A 5.1V
[3] 1.3V [3] 3.2V [3] Gnd [C] 0V C 4.65V C 4.65V C 4.65V
[4] Gnd [4] 0V [4] Gnd A 0V A 0V A 0V
[5] 0.9V [5] 0V [5] 4.65V Q801 HDMI CEC
[6] 1.19V [6] 5.1V [6] 0V Pin Amp
[7] 4.85V [7] 4.65V [1] 0V
[8] 3.55V [8] 4.65V [2] 3.16V
[3] 3.27V
IC503 9V Reg IC805 HDMI3 EDID [4] 3.28V
Pin Pin D303 Reset
[1] 10V [1] Gnd Pin Q1002 Pow Down
[2] Gnd [2] Gnd A 3.18V Pin IC1001
[3] 8V [3] Gnd AC 3.28V [B] 0.6V
[4] Gnd C 3.28V [E] Gnd
[5] 4.65V [C] 0V
[6] 4.65V
[7] 3.31V
[8] 4.65V

117
Main PWB Tuner Check (Shield Off) Pins Exposed TDVW-H103F

TU501
Data Pin 9 Clock Pin 8
Only present during
Channel Change

Video Pin 19 Video Test Point

SIF Pin 16 Audio Test Point

DIG IF (-) Pin 13


DIG IF (+) Pin 12
Digital Channel Test Point

Data Pin 9
Clock Pin 8

Pin 4 Tuner B+ (5V)

Main Board

Pin 1

118 Fall 2009 1080P Plasma 50PS60


Main PWB Tuner Video
Note: NTSC Only
and SIF Output Check “Video Out” Signal only when
receiving an analog Channel.
USING COLOR BAR SIGNAL INPUT
2.24Vp/p
Pin 19
MAIN PWB “Video”
Signal
Tuner Location

500mV / 10uSec

Pin 16 “SIF”
Signal 450mVp/p
Pin 1

700mVp/p

Note: 8VSB or QAM Only 200mV / 2uSec


“Dig IF” Signal only when
receiving a Digital Channel.
Pin 12 and Pin 13
“Dig IF” Signal
100mV / 1uSec

119 Fall 2009 1080P Plasma 50PS60


Main PWB Crystal X1 and X501 Check
X1 (1.5V DC) / (2.4V p/p)
12Mhz

X1 Runs all the time

X501 Runs only when set is on X501 (1.5V DC) / (110mV p/p)
25Mhz
X501
X1

MAIN PWB
Crystal Location

120 Fall 2009 1080P Plasma 50PS60


Main PWB P1003 (Removing the LVDS Cable

(1) Using your fingernail, lift up the locking mechanism.


Since the locking tab is very thin and fragile, its best to lift
slightly one end, then work across the locking tab
a little at a time, back and forth until the tab is released.

(2) Pull the Cable from the Connector

121 Fall 2009 1080P Plasma 50PS60


Main PWB P1003 LVDS Video Signal Test Points LVDS Waveform TPs
P1003 Location 39
36 40
38
35
37c
Pin
33
30
32
29
P1003 28
Location
24
27
s
P Lo cation
T 22 23

21

MAIN PWB 17
14 19 20
16
12 13

11

122 Fall 2009 1080P Plasma 50PS60


Main PWB P203 LVDS Video Signal Check SMTP Color Bar Signal Input
Pins 11, 12, 16 and 17 Waveform TP see 1 page back

Pin 12 (R1024) Pin 11 (R1023)

Pin 17 (R1020) Pin 16 (R1019)

123 Fall 2009 1080P Plasma 50PS60


Main PWB P203 LVDS Video Signal Check
Pins 21, 22, 27 and 28 Waveform TP see 2 pages back. SMTP Color Bar Signal Input

Pin 22 (R1016) Pin 21 (R1015)

Pin 28 (R1012) Pin 27 (R1011)

124 Fall 2009 1080P Plasma 50PS60


Main Board Plug P1003 “LVDS” Voltages
Voltage and Diode Test for the Main Board

Pin c
P1003 “Main Board” Connector to P5 "Control Board”
PIN LABEL RUN DIODE PIN LABEL RUN DIODE
NOTE: This is a 51 pin
11 RA1- 1.46V 0.89V 30 RB2+ 1.26V 0.7V connector.
12 RA1+ 1.19V 0.94V 32 RC2- 1.27V 0.8V
Pins 6-8, 15, 18, 31, 34, 41 and
51 are Ground (Gnd).
13 RB1- 1.29V 0.84V 33 RC2+ 1.20V 0.9V Pins 1-5, 9-10, 25-26, 42-45 are
14 RB1+ 0V 0.94V 35 RCLK2- 1.22V 0.9V No Connection (n/c).

16 RC1- 1.27V 0.94V 36 RCLK2+ 1.26V 0.9V

17 RC1+ 1.20V 0.84V 37 RD2- 1.16V 0.9V

19 RCLK1- 0V 0.88V 38 RD2+ 1.29V 0.9V Blue Pins indicate 20 bit


differential video signal
20 RCLK1+ 1.23V 0.9V 39 RE2- 1.18V 0.9V

21 RD1- 1.26V 0.9V 40 RE2+ 1.3V 0.9V

22 RD1+ 1.18V 0.9V 46 Module SDA 3.28V Open

23 RE1- 1.26V 0.9V 47 2.8V Display Enable 2.8V 0.5V

24 RE1+ 1.24V 0.7V 48 Module SCL 3.28V Open


Note: There are no voltages
27 RA2- 1.0V 0.9V 49 ROM TX 3.28V Open in Stand-By mode.
28 RA2+ 1.45V 0.9V 50 ROM RX 0.5V Open

29 RB2- 1.2V 0.8V

Diode Mode Check with the Board Disconnected.

125 Fall 2009 1080P Plasma 50PS60


Main PWB Plug P1001 to Ft Keys
Pin c
Voltage and Diode Mode Measurements for the Main Board
P1001 CONNECTOR "MAIN PWB" to "Front Keys"
For Voltages when Pin Label STBY Run Diode Check
each Key is
pressed, see the 1 IR 4V 3.98V 2V
Key PWB section. 2 Gnd Gnd Gnd Gnd

3 Key1 3.3V 3.3V 1.9V

* Pin 5 (Power Key) 4 Key2 3.3V 3.3V 1.9V


This pin is 0V when *5 Key On 0V/4.3V 0V Gnd / Open
the button is locked
“On” (In) and 5V 6 Gnd Gnd Gnd Gnd
when locked “Off”
(Out). 7 EYEQ-SCL 3V 3.3V 2V

8 EYEQ-SDA 3V 3.3V 2V

7&8 9 Gnd Gnd Gnd Gnd


Intelligent 10 STBY 5V 5V 5V 1.25V
Sensor
11 +5V 0.56V 5V 0.6V
Stand 12 Gnd Gnd Gnd Gnd
By 5V
13 LED R 3.19V 0V 1.87V
*Green LEDs turn
14 LED W 0V *0V 1.7V on when TV first
turned on. Next
15 LED Cent 0V *0V 1.5V
Not Used they get brighter,
then they go off.
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

126 Fall 2009 1080P Plasma 50PS60


Main PWB Plug P1006 to Power Supply Voltages and Diode Check Pin c front
Diode Mode Check with the PWB Disconnected. DVM in the Diode mode.
P1006
* Pins 9, 10, 12: (+5V) Turned on by Relay On Command.
P1006 CONNECTOR "Main" to "SMPS PWB" P813
Pin Label STBY Run Diode Mode Pin Label STBY Run Diode Mode
1* 17V 0V 17.3V Open 2* 17V 0V 17.3V Open
3 Gnd Gnd Gnd Gnd 4 Gnd Gnd Gnd Gnd
5 12V 0V 12V Open 6 12V 0V 12V Open
7 Gnd Gnd Gnd Gnd 8 Gnd Gnd Gnd Gnd
9 +5V 0V 5.15V 1.0 V 10 +5V 0V 5.15V 1.0 V
11 Stby 5V 5.15V 5.15V 1.0 V 12 +5V 0V 5.15V 1.0 V
13 Gnd Gnd Gnd Gnd 14 Gnd Gnd Gnd Gnd
15 Gnd Gnd Gnd Gnd 16 n/c n/c n/c Gnd
17* 5V Det 0V 4.8V Open 18* AC Det 5V 5V Open
19 RL On 0V 3.3V Open 20 VS On 0V 3.2V Open
21 M5 ON 0V 3.3V Open 22 Auto Gnd Gnd Gnd Gnd
23 Stby 5V 5V 5V 1.3V 24* Key On *0V *0V Open

* Pin 1 and 2: 17V If Vs is unloaded will pulsate. * Pin 18: AC DET if missing will cause the set to turn
Turned on by Vs On Command. off after 10 seconds.

* Pin 24: When the Power Button is opened,


* Pin 17: 5V Det not used. • Pin 24 pulls up to 4.3V.
• Stand-By 5V turns off. AC-Det remains.

127 Fall 2009 1080P Plasma 50PS60


Main PWB Speaker Plug P1005

Voltage and Diode Mode Measurements for the Main Board Speaker Plug

P1005 CONNECTOR "Main" to "Speakers"

Pin Label SBY Run Diode Mode


1 R- 0V 8.65V Open
2 R+ 0V 8.65V Open
3 L- 0V 8.65V Open
4 L+ 0V 8.65V Open

Right (-)
Board
P1005
Right (+) Location
Speaker
Connector Left (-)
Left (+)

MAIN PWB
Diode Mode Check with the PWB Disconnected. DVM in the Diode mode.

128 Fall 2009 1080P Plasma 50PS60


FRONT IR, POWER LED and SIDE KEY PWB SECTION

The following section gives detailed information about the Front IR,
Power LED and Side Key PWBs. These boards contains the Infrared
Receiver, Intelligent Sensor, Side Keys and Power LEDs section.
The front Intelligent Sensor IC communicates with the Main PWB
Microprocessor via Clock and Data lines.

These boards have no adjustments.

The Front Control Board (IR and Intelligent Sensor) receives its main
B+ from the Main PWB:

• STBY 5V from the Main PWB. This voltage is originated on the


Switched Mode Power Supply
• 3.3V generated on the Main PWB.
• The Front Power LEDs are driven by 2 separate pins from the
Main board.

129 Fall 2009 1080P Plasma 50PS60


Front Control (IR and Intelligent Sensor) PWB and Power LED PWB Location

Power LED PWB

Front IR PWB

Lower Left Side (As viewed from rear).

130 Fall 2009 1080P Plasma 50PS60


Front Power LED and IR Board Layout

Ground Power LED PWB


snap

IR Power
Intelligent Sensor LEDs
Sensor

P1

J2

J1
Front IR PWB P2

131 Fall 2009 1080P Plasma 50PS60


Front Power LED and IR Board Connector Layout
Power
P2 To LEDs
Ft IR J1
P2
Green
Red (Stand-By)
Power LED Green
PWB front
Green LEDs turn on
when power first
turned on. Then they
get brighter, then they
go off.
Power LED
PWB back P1

P1 To Main
Front IR PWB PWB P1001

J2 To Side
J1 To Power Key P1
LED P2
J1 J2

132 Fall 2009 1080P Plasma 50PS60


Front IR and Intelligent Sensor Board Layout

U2
U1

U1

iew
Ft V

Intelligent Sensor Infrared Sensor

133 Fall 2009 1080P Plasma 50PS60


Front Control PWB Connector P1 Voltage and Pin Identification
P1 CONNECTOR " Front Control PWB" to P1001 "Main PWB"
For Voltages when Pin Label STBY Run Diode Check P1
each Key is
pressed, see the 1 IR 4V 3.98V 2V
Key PWB section. 2 Gnd Gnd Gnd Gnd

3 Key1 3.3V 3.3V 1.9V

* Pin 5 (Power Key) 4 Key2 3.3V 3.3V 1.9V


This pin is 0V when *5 Key On 0V/4.3V 0V Gnd / Open
the button is locked
“On” (In) and 5V 6 Gnd Gnd Gnd Gnd
when locked “Off”
(Out). 7 EYEQ-SCL 3V 3.3V 2V

8 EYEQ-SDA 3V 3.3V 2V

7&8 9 Gnd Gnd Gnd Gnd


1
Intelligent 10 STBY 5V 5V 5V 1.25V
Sensor
11 +5V 0.56V 5V 0.6V
Stand 12 Gnd Gnd Gnd Gnd
By 5V
13 LED R 3.19V 0V 1.87V
*Green LEDs turn
14 LED W 0V *0V 1.7V on when TV first
turned on. Next
15 LED Cent 0V *0V 1.5V
Not Used they get brighter,
then they go off.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

134 Fall 2009 1080P Plasma 50PS60


Front IR PWB Plug J2 to Side Key (Voltages and Pin Identification)
Voltage and Diode Mode Measurements for the Main Board

For Voltages when each Key is pressed, see the Key PWB section.

*STBY1 Power Button “OUT”

J2 CONNECTOR “Ft IR PWB" to "Ft Key“

Pin *STBY1 *STBY2 Run Diode Mode


1 0V 3.3V 3.3V Open
2 0V 3.3V 3.3V Open
3 4.38V Gnd Gnd Open
4 Gnd Gnd Gnd Gnd

*STBY2 Power Button “IN”

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

135 Fall 2009 1080P Plasma 50PS60


Side Key Assembly

SW1

SW3

SW5

SW4

SW7

SW6

SW2

SW8

c c
To Ft IR PWB P1

136 Fall 2009 1080P Plasma 50PS60


P1 Resistance Measurements with Key pressed.
Side Key Assembly
Pin 1 measured Pin 2 measured
KEY KEY
from Gnd from Gnd
CH (Up) 0.61K Ohms Volume (+) 3.6K Ohms

CH (Dn) 9K Ohms Volume (-) 0.62K Ohms

Input 3.66K Ohms Enter 22K Ohms

Menu 9K Ohms

P1 Voltage Measurements with Key pressed.


Pin 1 measured Pin 2 measured
KEY KEY
from Gnd from Gnd
CH (Up) 0.19V Volume (+) 0.86V

CH (Dn) 1.57V Volume (-) 0.19V

Input 0.88V Enter 2.2V

Menu 1.56V

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
c P1 Connector “Side Key" to “IR/LED Control PWB“ J2 (No Key Pressed)
STBY 1 Pin *STBY1 *STBY2 Run Diode Mode
Power
1 KEY 1 0V 3.3V 3.3V Open
Button Out
2 KEY 2 0V 3.3V 3.3V Open
STBY 2
Power 3 PWR SW 4.38V Gnd Gnd Open
Button In 4 Gnd Gnd Gnd Gnd Open

137 Fall 2009 1080P Plasma 50PS60


11X17 FOLDOUT “INTERCONNECT DIAGRAM” SECTION

The following section is the 11 X 17 Foldout “Interconnect” drawing.


This drawing is a quick reference, single sheet drawing with
references to many of the repair tips, voltages and layouts giving
during the presentation.

The 11 X 17 foldout is best viewed in the Adobe version in which the


page can be zoomed in and out for easier reading.

138 Fall 2009 1080P Plasma 50PS60


Y-SUS LOCATION Generic Part P302 Pin Diode Check Pin Diode Check 50PS60 TV INTERCONNECT DIAGRAM
D51, 52, 61, 62, 71, 72 MA3DF30 1,2 Open 6,7 Open NOTE: Diode tests are conducted with the PWB disconnected.
Q51, 52, 61, 62, 71, 72, 73, 81, 82, 83 45F122 3 NC 8 NC Note: If AC Det (Pin 18) is missing, the set will come on like normal,
Q98, 99 K3667 4,5 Gnd 9,10 0.86V then in under 10 seconds it will turn off. Z-SUS LOCATION Generic Part
Q93, 94, 95, 96, 97 IRFI14229
VS Adj Note: The 17V supply will pulsate 2 to 3 times a second with Vs unloaded. D16, 17 RF2001
A Flat Period: Set-up VR602 VR901 Q10, 11, 12, 20, 21, 22, 30, 31, 40, 41 45F122
P814 “SMPS” - P1108 “MAIN” D30, 31, 40, 41 MA3DF30
10 ± 5us 520V p/p Read in P811 / P812 “SMPS” Pin Label STBY Run Diode Check
P101 P812 Q13, 14 20NF20
A 78V RMS White Wash Pin Label STBY Run Diode Check 1,2 17V 0V 17V 2.2V Pins 1,2 (17V) turned on with Vs On.
Q15 51N25
1,2 VS 0V 195V Open 3,4 Gnd Gnd Gnd Gnd
F801 5,6 0V 12V
3 NC NC NC NC 12V Open 260V p/p
B VS P811 4A 250V 7,8 Gnd Gnd Gnd Gnd 41V RMS
0V 4,5 Gnd Gnd Gnd Gnd
Odd VA Adj 9,10, 12 5V 0.5V 5V 1.2V Pins 9,10,12 (+5V) turned on
6,7 VA 0V 65V Open
Waveform B Set-dn VR601 -VY VSC 11 5V STBY 5V 5V Open with Relay On Command.
8 NC NC NC NC
160us ± 5us 13,14,15 Gnd Gnd Gnd Gnd
Scope Settings 100V 100uS 9,10 M5V 0V 5.0V 0.86V VR501
P102 16 NC NC NC NC
Read in
FS302 VS
P813 “SMPS” - P200 “CONTROL” P813 17 5V DET 0V 4.7V 1.45V Pin 17 (5V Det) not used. White Wash
Pin Label STBY Run Diode Check 18 A/C DET 5V 5V 1.45V
3A 250V F302 1,2,3,4 5V 0.75V
P114 5V 0V

D51
P312 19 RL ON 0V 3.3V TIP: To Test Z-SUS Open
1A 250V 5,6,7,8 Gnd Gnd Gnd Gnd

Q22 Q21 Q20


Floating

D30
Floating 20 VS ON 0V 3.2V Without a good Y-SUS.Open
Gnd GND D74 P302 21 M5V ON
0V 3.3V Open
1) Light bulb load Vs.

D52
P103 Switch Mode Power Supply 22 AUTO GND 0V 0V Open
2) Jump the 17V from pin 1 or FS102 VS

D31
23 P104
D72

STBY 5 5V 5.0V Open 3A 250V


Even FS303 VA pin 2 P814 to the Z-SUS
*24 KEY ON *0V *0V Open
Waveform 10A 125V FS301 connector P100 1~5.

Q51
SC101
M5V *If pin 24 is at 4.3V with the unit is in standby the Power P101

Q30
1~7 FG P814
FS301 4A/125V F101-2 Button is released and will prevent the unit from coming on.
Q73 Q72 Q71

8~9 FG5V

Q52

D17 D16 Q12 Q11 Q10


P116 15A / 250V
Q93

P311 Y-SUS

Q31
TIP: If A/C DET is low or missing, Remove AC Det (pin 28) out of P814 and FS100 5V
11~12 Y-Drive
LOCATION
Q901:
SMPS TEST: Removing connector P814 will force the SMPS into full run mode. jump it to any pin carrying 5V STBY. Then reapply power to the unit. If the 4A 125V Z-SUS
Only do this with AC power removed then reapply AC power. TV now stays on, suspect a defective SMPS.
FQB27N25
Q94

Complete testing of the SMPS requires that you load VS


Q61

P104 Q902, Q904: Fl103


with 2 100 watt light bulbs with P811 and P812

Q40
KTN2222AU Z-SUS TP
unplugged to verify it is functioning correctly.
Logic Sig Q903:
Q95

Q62
Q83 Q82 Q81

P112 FQB6N70
Pins 9~12 LVDS
P309 D6 blink pattern

Q41
IC902, IC903:
VSC TP (-) shows temperature Pins 1~4 (5V) 17.8V Q303 3 IC304 IC804 USB P100
P111 LTV817MVB GS IC301
P102
Q96

1 23 1) 5.1V 3) 3.2V 5) 0V
IC904: 21 2) Gnd 4) 0V 6) 5.1V Pins 1 ~ 4 are (+)VZB TP
D61

D
P1 P1001 C
IC302 IC203 labed as 15V
R306

Q15 Q14 Q13


KIA431AF Q301
Pins 1 ~ 6 D6 P202 P200 P2
P1006 2 P1003 LVDS IC952

D40
P211 IC908, IC909: IC306 1 2 3
B E
C but measures
are 17.8V n/c D951
Q97

IC201
BA17BM15T *FL4 *FL5 A A 17.8V.
D62

IC202
1~ 2 pins Y-Drive from Y-Sus Q305 AA
R457
IC905:
P1 5V 5V D801

D41
P214 IC801

Y-SUS P5 Q504
P313 KIA78M05F D7 IC503
2
Analog Digital
C USB
P100 VZB
Control PWB
Q951
4~5 pins FG5V D7 IC7
D1001
IC1 S (0V) S (3.3V) IC204 C
Black wire
VR201
P201 Anode:
Q98

IC12 C A D303 B E G (3.3V) G (0V) D502 (-)VZB TP


6~12 pins FG D909,D910 shows IC12 IC201 A-C
C
A C
Q302 D (3.3V) D (3.3V) X501 E B
is not Pin 1 P301
PWB 1 (0V) X2 B Q504 IC504 P103
VR602 D902 = (+Vy) FG 2 (2.5V)
IC7 C E C X1 B EGS Out
N/C
SET-Up1
30V p/p
running IC1 50Mhz 1 (0V) E B
Q1002
Q501 IC502 C
Q891
HDMI
D903 = (Vsc) FG 3 (5.0V) P1005 D Q502
+VY TP OK 2 (3.3V) Q1001 C C
D909 / D910 = 17.8V P101 3 (5.0V)
Speakers
IC601
In Out Gnd EB C 19 Video P100 “Z-SUS” - P2 “Control”
Q99

Q503
(-) (+) D911 = (15V FG) Pin 1-4 is 3.3V to IC301 IC305 IC304 IC502 IC503 IC505 E B
E B
P106
P202 VR601 D912 = (5V FG) P101 TCP from IC304 50Mhz TP P104 D802 A A
4 3 SIF 16 Pin Label Run Diode Check
IC803 3.3VST 3.3VMST 1.8VMST 1.2VPVSB Reg
SET-Dn1 IC304 IC16
Pin 1-4 is K Q801
Reg Reg Reg On = Digital CH
9V Reg 5V Reg (5V) 15
IC805 1~4 15V 17.8V 1.49V
Even R305 3.3V to TCP
1 2 K=4.7V
VR902 N/C P310
DIF - 13
1 (0V) 71 (0V) 0V 4.9V 0.6V Gnd 12V DIF + 12 5 Gnd Gnd Gnd
BE D628 1 3.8V
Waveform DD_Var (-VY)
Pin 1-4 is 3.3V to
2 (3.3V) TCP from IC304 2 (3.3V)
from IC304 D805
A Q892 K A=0V A=5V 6 ER-UP 0V 2.2V
K A C
2 3.3V 3.0V 1.85V In 0V/3.3V 0V 5.0V D806
IC904 C 17.8V P6 3 (5.0V) 3 (5.0V) A A
7 ER-DN 0V 1.8V
IC902 ZD902
Q903 P102 N/C D627 K B E
3 5V 0V 3.3V Out 0V/1.2V 8V 8V
TUNER
P216 P314 Source P3
BE A A 8 Gnd Gnd Gnd P105
IC908 IC903 IC905
S G AUTO GEN IC802
Q890 Q601 C
Floating Floating D902
A D911 IC304 IC16 K A
A C IC602 (5V) 4 IC505
2
9 Z Bias 3.0V 1.2V
+Vy C D804 10
D 15VFG Gnd Gnd
K Gnd
GND GND D904 A D909 AUTO GEN is activated by * FL4 / FL5: D633
K A
ZD601
D903 C D914 D910 A A
1 11 SUS-UP 0.4V .5V
Vsc C A fg cg shorting pin 1 to pin 2 of These EMI filters have 4 Main Run / *Stby Voltages 3 2 1
12 SUS-DN 0.7V .5V
S G VSCAN fg cg D912 FS901 5V connector P6. Note: The
5VFG T902 solder tack points the Q301 Q302 Q303 Q501 I/O Q502 Q503 The 17.8V on pins 1 ~ 4 is
(VSC) T901 C A 4A 125V LVDS cable must be removed
IC201 IC202 IC302 IC602 IC802 IC803 IC805 IC952
P203 Q901 center two are tied to 1.3V RS232 HDMI1 HDMI2 HDMI3 HDMI4 0V 3.29V S 4.9V Gnd 1.6V 2.37V derived by the Y-SUS PWB.
D VR901 Pin NVRAM HDCP E
IC909
for Auto Gen to work. ground. VDDC Flash EDID EDID EDID EDID
Fg = Floating Gnd cg = Chassis Gnd P307 1 0V 0V 5.4V 0V Gnd Gnd Gnd Gnd B 3.3V 3.19V G 4.9V 0V/0.6V 2.16V 3.0V
P1101 “Main” - J1 “Ft IR”
Odd
Floating Gnd A C
0V 4.89V 0V Gnd Gnd C 5.0V 0V D 0V 3.28V/0V 0V 0V
P2 “Control”
D904 Across +Vy Vsc 163V 180V 2 0V Gnd Gnd Pin Label STBY Run
Run Diode Check
Waveform P116 P214 3 0V 3.28V 1.3V 0V Gnd Gnd Gnd Gnd Q601 Q801 Q890/2 Q891 Q951 Q1001 Q1002 1 IR 4V 3.98V
3.98V 2V
Pin Diode Check
Pin Run V Diode Chk Pin Run V Diode Chk These voltages are reference to floating GND.
1~2 140V Open 1~7 F Gnd F Gnd LOC Pin 1 Pin 2
Pin 3 Pin 4 LOC Developes Cathode Front PWB 4 0V 0V 0V 0V Gnd Gnd Gnd Gnd E 0.6V 1-0V 0V
2-3.1V
0V 0V 0V
0V
0V
0V 0V 0V 0.6V
2
3
Gnd
Key1
Gnd
3.29V
Gnd
Gnd
3.29V
3.29V
Gnd
1.9V
1
2
1.48V
1.48V
IR Receiver 5 3.28V 3.28V 0.9V 4.54V 4.6V 4.6V 4.65V 4.67V B 0V
3 nc nc 8~9 FG5V Open IC902 9V Cold Gnd 1.8V cg D902
8V +Vy 180V 4 Key2 3.29V 3.29V
3.29V 1.9V
C 0V 3-3.2V 0V 0V 0V 3.28V 0V 3 1.48V
4~5 FG5V Open 10 nc nc IC903 1V
0V Cold Gnd .08V cg D903 Vsc 163V Power Button 6 3.28V 3.28V 1.1V 4.54V 4.6V 4.6V 4.65V 0V
*5 Key On
0V/
0V/4.3V 0V
0V
Gnd /
Gnd / Open
P204 7 0V 4.85V 3.3V 3.3V 3.3V 4.65V 4.67V 4-3.2V 4.3V Open 4 1.48V
6 ~ 12 F Gnd F Gnd 11 ~ 12 140V Open IC904 2.1V 0V 7.7V N/A D911 15VFG 23.3V 3.28V 6 Gnd Gnd Gnd
Gnd Gnd
Voltages are reference to floating ground. D913 15VFG Reg 23.3V ZD2 ZD3 8 3.28V 3.28V 3.57V 4.5V 4.6V 4.6V 4.65V 4.67V 7 EYEQ
EYEQ -SCL
SCL 3V 3.3V
3.3V 2V 5 Gnd
IC905 17.9V Cold Gnd 5V N/A
P311 P313 8 EYEQ
EYEQ SDA
-SDA 3V 3.3V
3.3V 2V 6 1.48V
IC908 23.3V 0V 15.2V N/A D912 5VFG 10.58V ZD1 *If no voltage is shown for Stby then it is 0V. Pin 5:
Pin Run V Diode Chk Pin Run V Diode Chk 5.0V
J2 J1 9 Gnd Gnd Gnd
Gnd Gnd 7 1.48V
IC909 10.5V 0V 5.0V N/A D914 5VFG Reg 4.7V STBY
1 ~ 7 F Gnd F Gnd 1 ~ 2 140V 2.7V Pin Stby Run P1 When the Power Button is opened, 10 STBY 5V
5V
5V 5V 1.25V
LOC Source Gate Drain ZD902 Feedback 15.3V
11 +5V 0.56V 5V 0.6V
8 1.4V
8~9 5V 3 nc nc Pin 5: pulls up to 4.3V.
1.3V
Q901 140V 144V 163V ZD902 Anode 3V 1~2 3.3V 3.3V If Power Button 12 Gnd Gnd Gnd Gnd 9~12 1.32V
10 nc nc 4 ~ 5 FG5V 1.3V P1 Pin 10: Stand-By 5V turns off.
3 Gnd Gnd is open, 13 LED
LEDRR 3.19V 0V 1.87V
11~12 140V 2.7V 6 ~ 12 F Gnd F Gnd Q903 85V 88V 275V *Generic parts list for sub supplies Side (Key) Controls pin 3 (4.38V) 14
LED
LED W 0V 0V 1.7V Note: P2 pins
located in and above Y-SUS. W
Diode test is reference to floating GND (F Gnd) 4 Gnd Gnd 15 LED Cent 0V 0V 1.5V reversed from P100
P307 Y-SUS P121
P110 P120 P210 P221 P310
Pin Run Diode Check Pin Run Diode Check P320
3.3V in Va out 3.3V in on Va out on 3.3V in on
1,2,3,4
5
VA Voltage
nc
Open
nc
1,2,3,4
5
VA Voltage
nc
Open
nc on Pins on Pins
P220
Va in on Pins 57~60 X-Board Center Pins 1~12 Va in on
Pins 19~30 Pins 57~60 X-Board Right
6,7 Gnd Gnd 6,7 Gnd Gnd 57~60 1~12 Pins 19~30
P101 P102 P103 P104 P105 P106 P107 P108 P201 P202 P203 P204 P205 P206 P207 P301 P302 P303 P304 P305 P306 P307 P308
NOTE: LVDS P1003 Information WAVEFORMS:
50PS60 LVDS P1003 WAVEFORMS There are actually 20 pins carrying Video plus 4 pins carrying clock signals to the Waveforms taken using SMTP Color Bar input. All readings give their Time Base related to scope settings.
Control board. Only 8 are shown as an example of what signals are on each pin. All waveforms taken from the P1003.

MAIN PWB VIDEO TEST POINT (Pin 28) MAIN PWB VIDEO TEST POINT (Pin 27) MAIN PWB VIDEO TEST POINT (Pin 22) MAIN PWB VIDEO TEST POINT (Pin 21)

200mV per/div 10uSec per/div 900mV p/p 1V per/div 10uSec per/div 6V p/p 1V per/div 10uSec per/div 6.25V p/p 1V per/div 10uSec per/div 7V p/p

MAIN PWB VIDEO TEST POINT (Pin 17) MAIN PWB VIDEO TEST POINT (Pin 16) MAIN PWB VIDEO TEST POINT (Pin 12) MAIN PWB VIDEO TEST POINT (Pin 11)

1V per/div 2mSec per/div 5.25V p/p 1V per/div 2mSec per/div 6.4V p/p 1V per/div 2mSec per/div 7.25V p/p 1V per/div 2mSec per/div 5.25V p/p
50PS60 MAIN (BACK SIDE) SIMICONDUCTORS

IC201 NVRAM IC304 1.8VMST IC505 5V (Tuner) IC602 RS232 RAM Q1001 Pow Down Q502 Video Buffer Q890/2 HDMI1/2
Pin Pin Reg Pin Reg Pin Pin IC1001 Pin Pin Hot Swap
[1] Gnd [1] 0.6V [1] 3.8V [1] Gnd [B] 0V [B] 0.6V [B] 0V
[2] Gnd [2] 1.8V [2] 5V [2] Gnd [E] Gnd [E] 2.1V [E] Gnd
[3] Gnd [3] 3.28V [3] 8V [3] Gnd [C] 3.3V [C] Gnd [C] 0V
[4] Gnd [4] Gnd
[5] 3.28V [5] 4.5V Q302 Reset Q503 SIF Buffer Q891/951 HDMI3/4
[6] 3.28V IC601 RS232 Control [6] 4.5V Pin Pin Pin Hot Swap
[7] 0V IC305 3.3VMST Pin [7] 3.3V [B] 3.3V [B] 2.3V [B] 0V
[8] 3.28V Pin Reg [1] 3.3V [8] 4.5V [E] 3.2V [E] 3.0V [E] Gnd
[1] Gnd [2] 5.4V [C] 0V [C] Gnd [C] 0V
IC202 HDCP [2] 3.0V [3] 0V IC802/3 HDMI1/2
Pin [3] 4.9V [4] 0V Pin Q303 Reset Q501 1.2V PVSB
[1] Gnd [5] 5.3V [1] Gnd Pin Pin Switch
[2] Gnd [6] 5.3V [2] Gnd [S] 4.9V [S] 3.3V
[3] 3.28V [7] 5.3V [3] Gnd [G] 4.9V [G] 3.3V/0V
[4] Gnd IC502 1.2V PVSB [8] 0V [4] Gnd [D] 0V [D] 0V/3.27V
[5] 3.28V On Digital CH / Off Analog [9] 3.3V [5] 4.5V On Digital CH / Off Analog
[6] 3.28V Pin Reg [10] 3.3V [6] 4.5V Q501 1.2V PVSB
[7] 3.28V Gnd Gnd [11] 0.3V [7] 3.3V Pin Switch Q601 RS232 TX
[8] 3.28V In 0V/3.3V [12] 3.3V [8] 4.5V [B] 0V/0.6V Pin Buffer
Out 0V/1.2V [13] 0V [E] 0V [B] 0.6V
IC301 3.3V VST [14] 5.4V [C] 3.3V/0V [E] Gnd
Pin [15] 0V On Digital CH / Off Analog [C] 0V
[1] Gnd [16] 3.3V
[2] 3.3V D1001 IC1001 D951 HDMI4 PWR D627 RS232 TX Noise D628 RS232 RX Noise D633 RGB B+ D801 EDID B+ D802 HDMI CEC
[3] 5.0V Pin Reset Limit Pin Pin Suppression Pin Suppression Pin Pin Pin B+
A 3.27V A 5.1V A (-5.3V) A 0V A 0V A 4.6V A 0V
C 3.3V C 4.65V C 0.1V C 0V C 4.5V C 4.9V C 3.17V
A 0V A Gnd A Gnd A 5.0V A 5.1V A 3.27V

50PS60 MAIN (FRONT SIDE) SIMICONDUCTORS


IC302 1.3V VDDC IC804 USB 5V IC952 HDMI4 EDID Q301 Turns on
Pin Pin Pin Pin Q303
[1] 5.47V [1] 5.0V [1] Gnd [B] 0.54V
[2] 4.89V [2] Gnd [2] Gnd [E] Gnd
[3] 1.3V [3] 3.2V [3] Gnd [C] 0V
[4] Gnd [4] 0V [4] Gnd
[5] 0.9V [5] 0V [5] 4.65V Q801 HDMI CEC
[6] 1.19V [6] 5.1V [6] 0V Pin Amp
[7] 4.85V [7] 4.65V [1] 0V
[8] 3.55V [8] 4.65V [2] 3.16V
[3] 3.27V
IC503 9V Reg IC805 HDMI3 EDID [4] 3.28V
Pin Pin D303 Reset
[1] 10V [1] Gnd Pin Q1002 Pow Down
[2] Gnd [2] Gnd A 3.18V Pin IC1001
[3] 8V [3] Gnd AC 3.28V [B] 0.6V
[4] Gnd C 3.28V [E] Gnd
[5] 4.65V [C] 0V
[6] 4.65V
[7] 3.31V
[8] 4.65V

D804 HDMI1 PWR D805 HDMI2 PWR D806 HDMI3 PWR


Pin Pin Pin
A 5.1V A 5.1V A 5.1V
C 4.65V C 4.65V C 4.65V
A 0V A 0V A 0V

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