EE 311: Electrical Engineering Junior Lab

EXPERIMENT : The 555 Timer

OBJECTIVE

The objective of this experiment is to examine the 555 universal timer in monostable and
astable timing circuits.

BACKGROUND

The 555 timer is unique in that it simply, cheaply, and accurately can operate as both a
monostable multivibrator, i.e., a \one-shot", or as an astable multivibrator, i.e., an oscillator,
in addition to various other applications, such as as a linear voltage ramp generator, a missing
pulse detector, or a pulse width modulator. It can be used with any power supply in the range
of 5-18 volts, thus is an ideal solution for various analog circuit problems. When connected
to a 5-volt supply, the 555 timer is directly compatible with TTL or CMOS digital devices.
A basic block diagram of the timer is enclosed by the large rectangular box shown in both
Figures 1 and 2. The circuit consists of a SR latch, two analog comparators, an output stage,
a discharge transistor and a voltage divider network.

SR Latch

The term SR latch is short for set{reset latch. This circuit has two stable states. Let us
de¯ne these states as follows
state 1 =) Q = 1, Q = 0 (i.e., latch = set) and
state 0 =) Q = 0, Q = 1 (i.e., latch = reset).

We see that if Q = 1, then Q = 0 and vice versa.

Both of these states are stable, and the circuit can remain inde¯nitely in any one of these
states. A trigger pulse can be applied either at S or R to change the state of the circuit. In
order to set the latch, a short positive pulse may be applied at the S terminal. Similarly, a
positive pulse applied at the R terminal will reset the latch. However, if both the S and R
terminals are high, the latch will stay in the prior state after the second goes high. That
is, if S = 1 and then R = 1, the latch will operate as if it has just been set. On the other
hand, if R = 1 and then S = 1, the latch will operate as if it has just been reset. In the 555
timer, the pulses generated at the output of the two comparators are employed to change
the state of the latch. The output stage is a bu®er stage between the latch output and the
load connected at pin 3. The output follows the potential of Q. Thus, if Q = 1, the output
is \1".

Analog Comparators COMP1 & COMP2

A comparator compares two input voltages and determines which of the two is larger. If the
voltage at the noninverting input, V+ , is greater than that at the inverting input, V¡ , the
output is high or \1", and, if the voltage at the noninverting terminal is less than or equal

1
to the voltage at the inverting terminal, the output is low or \0". These conditions can be
written as
V+ > V¡ =) comparator output = \1",
V+ · V¡ =) comparator output = \0".
A voltage divider network consisting of three equal valued resistors is employed to maintain
V+ of COMP1 at V1 = 1=3Vcc and V¡ of COMP2 at V2 = 2=3Vcc . The job of comparator
COMP2 is to compare the voltage at pin 6, the threshold terminal, to that of V2 . If the
voltage at pin 6 exceeds V2 , called the threshold voltage, the output of COMP2 goes high.
Comparator COMP1, on the other hand, is referenced to V1 . In this case, if the voltage at
pin 2, the trigger terminal, drops below V1 , the output of COMP1 goes high; otherwise, it
stays low.

The Discharge Transistor

The discharge transistor is used to discharge an external capacitor connected from pin 7, the
transistor collector, to ground. Whenever Q = 1, the transistor is ON, and the transistor
acts as a short circuit between the collector and the emitter. Thus, if a charged capacitor
is connected from the collector to ground and Q = 1, it will be discharged through the
transistor, and its voltage will drop to zero rapidly. When Q = 0, the transistor is turned
OFF, and the capacitor is unclamped.
At this point, we are ready to describe how the 555 timer actually works. We will ¯rst
consider the 555 timer in a monostable con¯guration and then in an astable con¯guration.

Monostable Operation

When the 555 timer is con¯gured as a monostable multivibrator or single pulse generator,
the IC waits patiently for a trigger pulse. When received, the trigger pulse causes the output
to change state for a ¯xed period of time related to an external capacitor and resistor, before
returning to its initial state. The ability of the monostable to generate a single pulse of
precise length is often referred to as a \one shot" circuit element. Many times in digital
electronics, a precise delay is required to allow events to be measured, data to be displayed
for a speci¯c period of time or a timing pulse to catch up in order to synchronize events with
a clock signal. Monostable operation is obtained by connecting two external elements, Rx
and Cx , as shown in Figure 1. First, note that V1 = 1=3Vcc and V2 = 2=3Vcc . The operation
of the timer is as follows. When power is applied to the circuit, the latch is reset, and we
have Q = 0 and Q = 1. Since the base of the transistor is at a high voltage, the transistor
is ON with the result that the upper terminal of Cx is clamped to ground, and, hence, the
capacitor voltage Vcap = 0. If the circuit is not triggered, the timer will stay in this stable
state inde¯nitely.
Now, consider that the circuit is triggered at the trigger terminal, pin 2, by making its
potential less than V1 = 1=3Vcc . This can easily be done by connecting pin 2 to ground
momentarily using a switch (SW1 shown in Figure 1). The moment that V¡ is pulled below
V+ , the output of COMP1 goes to \1", which sets the latch (Q = 1 and Q = 0), causing Q
and the output to go to \1" and the discharge transistor to turn OFF. The timing capacitor,
Cx , is now allowed to charge toward Vcc with a time constant ¿ = Rx Cx . When the capacitor

2
voltage crosses the threshold level, V2 , the output of COMP2 goes to \1", which resets the
latch. Consequently, Q and the output switch back to the low level, \0", and, with Q at the
high level, \1", the discharge transistor turns ON rapidly discharging Cx and thereby ending
the quasi stable state.
The output pulse width is readily determined from writing the charging equation across
the capacitor. The time change of the capacitor voltage can be described by

vC (t) = Vf ¡ (Vf ¡ Vi )e¡t=¿ ; (1)

where
Vi = initial capacitor voltage,
Vf = ¯nal capacitor voltage,
¿ = time constant of the charging/discharging circuit.

Since Vcap = 0 when the circuit is triggered, Vi = 0 volts. The ¯nal voltage to which the
capacitor would be charged, if not interrupted by the discharging transistor, is Vcc . Thus,
Vf = Vcc . However, we know that at t = Tm , vC becomes slightly higher than V2 and resets
the latch, and the capacitor voltage drops to zero. Here, Tm is the duration of the quasi
stable state of the monostable circuit. Thus, the above equation becomes

vC (t) = Vcc ¡ (Vcc ¡ 0)e¡t=¿ = Vcc (1 ¡ e¡t=¿ ): (2)

Now, at t = Tm , vC = V2 = 2=3Vcc . Therefore, using equation (2), we can write

vC (t = Tm ) = 2=3Vcc = Vcc (1 ¡ e¡Tm =¿ );

which yields
Tm = ¿ ln ((Vcc )=(Vcc ¡ 2=3Vcc )) :
Thus, the pulse width at the output of the timer is

P W = Tm = ¿ ln(3) ¼ 1:1¿ = 1:1(Rx Cx ): (3)

Astable Operation

Astable operation is obtained by connecting the threshold and the trigger terminals together
and connecting external components RA , RB and Cx as shown in Figure 2. This circuit has
two quasi stable states

quasi stable state 1 =) Q = 1 and Q = 0, to < t < t1 and

quasi stable state 2 =) Q = 0 and Q = 1, t1 < t < t2 :

During state 1, the latch is set while in state 2 it is reset. In the astable mode of
operation, the circuit changes its state automatically. Since the timer output follows Q,
the square wave generated at Q will be available at the output of the timer (pin 3). The
operation of the astable circuit is explained below.
Assume at time to , the latch has just been set causing Vout to go to \1" and the discharge
transistor to turn OFF. The timing capacitor, Cx , charges toward Vcc with a time constant

3
¿1 = (RA + RB )Cx . At time t1 , the capacitor voltage, Vcap , crosses V2 causing the latch to
reset. Hence, Vout switches to \0" and the discharge transistor turns ON. The capacitor now
discharges toward ground with a time constant ¿ = RB Cx . However, at time t2 , Vcap = V1 ,
and, then, the output of COMP1 causes the latch to set. At this time, the transistor turns
OFF, and the capacitor begins to charge, and the whole timing cycle repeats itself.
Equation (1) can be used to determine both the charging and discharging time. Note
that the capacitor charges from V1 to V2 with a time constant ¿1 . The pulse width for the
charging is given by

P W1 = t1 ¡ to = ¿1 ln(2) ¼ :695(RA + RB )Cx : (4)

Since the capacitor discharges from V2 to V1 with a time constant ¿2 , the pulse width for the
discharging time is given by

P W2 = t2 ¡ t1 = ¿2 ln(2) ¼ :695(RB Cx ): (5)

The total time period of the output waveform is

T = P W1 + P W2 ;

and the frequency is

f = 1=(P W1 + P W2 ):
From equations (4) and (5), we obtain

f = 1:439=((RA + 2RB )Cx )Hz: (6)

Finally, the duty cycle, D, of a periodic waveform is de¯ned as the ratio of the \high time"
in one period to one total time period. For the 555 timer in astable mode, it is given by

D = P W1 =T = (RA + RB )=(RA + 2RB ): (7)

Equations (6) and (7) can be used to design an oscillator with a prescribed frequency and
duty cycle.

PRELIMINARY REPORT QUESTIONS

1. Lookup up and record the physical location of the pins on the 555 timer chip.
2. The 555 timer is designed so that the timing characteristics, e.g., frequency, pulse
width and duty cycle, are independent of the power supply voltage. Justify this
statement theoretically, e.g., using circuit analysis.
3. Experiment with the demo VI's associated with the LabVIEW 555 Monostable.llb
library, e.g., Monostable1.vi, Alarm.vi, XYJoystick.vi, etc., available from the
class web site. Based on these monostable timer applications, describe in detail
how a 555 timer IC could be used to create an inexpensive meter to measure an
unknown capacitance in the range 0.001 to 1000uF.

4
 i i
Vcc Vcc

t Control Reset
8 5 4
0.01¹F

»X
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X »X
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X
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10k­ XX Rx X X R
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t t
Threshold HH Clear Totem Output
+ H
V2 t t¡©©
6 COMP2H
© R Q pole
output 3
©
Cx
X X
X»
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X X»
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X
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»X R Latch X»
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Discharge »
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7

t HHH ¢
Trigger V1 + ¢
t
COMP1H
© S Q
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t
2 © AU
X
X» LL ¯¯
t
»X LED
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SW1 X»
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Figure 1: Circuit Used for Monostable Operation.

4. For step 1 of the Procedure, calculate the expected time that the LED will remain
lit after the switch is released when pin 4 is connected to Vcc .
5. Experiment with the demo VI's associated with the LabVIEW 555 Astable.llb
library, e.g., 555 Astable1.vi, 555 Flasher.vi, etc., available from the class web
site. In particular, observe the timer output waveform and duty cycle when
RA > RB ; RA = RB ; and RA < RB . Based on these astable timer applications,
describe in detail how a 555 timer and a thermistor could be used to create an
inexpensive temperature transducer.
6. For step 2 of the Procedure, calculate the expected frequency and duty cycle of
the output at pin 3.
7. For step 3, use PSpice to show the expected waveforms at pins 2 and 3 of the

5
 i i
Vcc Vcc

Control Reset
8 5 4
0.01¹F
X X
X»
»X X»
»X
RA X»
»X X»
»X R
X»
»X
» X»
»X
»

t
Threshold HH Clear Totem Output
+ H
t t
6 COMP2H
© R Q pole
X V2 ¡©© output 3
X»
»X ©
RB X»
»X
X»
»X
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t
XX XX
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t
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Latch Discharge X
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7

V1 t +HH
H ¢
Cx ¢
COMP1H
© S Q
¡ ©
Trigger 2 ©© A
AU
X
X»
»
X
LL ¯¯
LED
X»
»
X R L¯
X»
»
X
»

Figure 2: Circuit Used for Astable Operation.

555 timer chip when Vcc = 12V. Determine the frequency, duty cycle and the
amplitude of the output at pin 3. Repeat the above with Vcc = 6V.

PROCEDURE

Step-1. Construct the circuit shown in Figure 1 using Rx = 910k­, Cx = 10¹F and
Vcc = 12V. Press the SPST switch momentarily and record the time, using a wrist
watch, that the LED remains on. Note that the cathode of the LED must be tied
to the ground for it to work. To determine which terminal is the cathode, one
can connect the LED and the series 560­ resistance across the 5 V source and
¯nd out which con¯guration causes the LED to lit up.

Next press and hold the switch for 20 seconds. Observe and record how the
LED operates now.
Finally, disconnect pin 4 from Vcc and connect it to pin 2. Record the oper-
ation of the LED when the switch is held momentarily and for 20 seconds.

6
 Step-2. Construct the circuit shown in Figure 2 using RA = 43k­, RB = 100k­,
Cx = 10¹F and Vcc = 12V. Use a wrist watch to determine, as accurately as
possible, the frequency and the duty cycle of the °ashes.
Step-3. Construct the circuit shown in Figure 2 using RA = 36k­, RB = 18k­,
Cx = 0:01¹F and Vcc = 12V. (Note that the 560­ resistor and LED do not have
to remain connected to the ouput, pin 3.)

Measure the frequency, duty cycle and amplitude of the voltage at pin 3
using the oscilloscope. Also, carefully sketch the waveforms at pins 2 and 3
on the same axes.
Now, decrease the power supply voltage from 12V to 6V. Measure the fre-
quency, duty cycle and amplitude of the voltage at pin 3.

Step-4. Measure the actual values of all the resistors and the capacitors used in the
experiment

RESULT QUESTIONS

1. Modify your pre-lab predictions by using the actual values of the components.
These revised predictions should be used in the error analysis in the Comparison
section of your lab report.
2. Explain the observations made in step 1 of the Procedure by explaining the status
of the SR latch for each of the four cases.
3. From observations made in step 3 of the Procedure explain what e®ects decreasing
the supply voltage has on the 555's timing characteristics or the amplitude of the
output.

EQUIPMENT
Item Quantity Size/Type
oscilloscope 1 2215 or 2236, bench
dual power supply 1 Clarkson
proto board 1 small
555 timer IC 1 LM555
LED 1 red
resistor 5 560­, 10k­, 18k­, 36k­, 43k­, 100k­, 910k­
capacitor 3 2{0:01¹F, 1{10¹F
box 2 leads, wires

Last Revised: August 23, 2003