2011 IEEE PES Innovative Smart Grid Technologies – India
An Optimum Setting of Controller for a dc-dc converter Using Bacterial
Intelligence Technique
1 2
D. M. Mary Synthia Regis Dr. S. Pushpa Kumar
Prabha, Principal,
Associate Professor, Heera College of Engg. & Tech.,
Noorul Islam University, Nedumancadu, Trivandrum.
Kumaracoil. spushpakumar@gmail.com
regisprabha@gmail.com
ABSTRACT
The most commonly used control algorithm in
industry is the Proportional-Derivative-Integral
(PID) control. The controller’s performance is
decided by the proper selection of the control
parameters. In this paper, Bacterial Foraging
Optimization Algorithm (BFOA) is applied for
optimizing the controller’s parameters of a dc-dc
converter. The robustness of the BFOA tuned PID
controlled DC-DC converter under load
disturbances is studied. Finally, the controller’s
effectiveness is studied by comparing it with the
conventional PID controlled DC-DC converter.
Index Terms:
PID control, DC-DC converter, BFO Algorithm
I. INTRODUCTION
Switching mode dc-dc converters are widely
used today in a variety of applications including
power supplies for personal computers, mission
critical space applications, laptop computers, dc
motor drives, medical electronics as well as high
power transmission [1]. These converters are non-
linear dynamical systems. The non-linearities arise
primarily due to switching, power devices and
passive components such as inductors and
capacitors. A control technique suitable for dc-dc
converters must cope with their intrinsic non-
linearity and wide input voltage and load variations
ensuring stability in any operating condition while
providing fast transient response.
PID control is a traditional linear control
which is the most commonly used control
algorithm in industries. It can be easily
implemented by engineers using current
technologies which make it more popular than
other controllers. Linear PID controllers for dc-dc
converters are usually designed by classical
frequency response techniques applied to the small-
signal models of converters [2]. A bode plot is
adjusted in the design to obtain the desired loop
gain, cross-over frequency and phase margin.
978-1-4673-0315-6/11/$26.00©2011 IEEE
3
G. Glan Devadhas
Associate Professor,
Noorul Islam University,
Kumaracoil.
glandeva@gmail.com
The transient response can be tuned using root
locus type approaches [3]. The stability of the
system is guaranteed by an adequate phase margin.
For a buck converter, the magnitude of the
frequency response depends on the duty cycle.
Duty cycle variations do not change the shape of
the magnitude plot of the transfer function, but only
shifts the plot upward [3], [4].
Optimization is a powerful tool that has
been used in the design of PID controllers [6],[14].
An optimization algorithm which takes care of the
local minima, requires less number of computations
and which settles at minimum time is said to be a
best algorithm [12]. The controller’s performance
is decided by the proper selection of the control
parameters. In order to obtain the optimal
parameters of the PID controller, Bacterial
Foraging Optimization Algorithm (BFOA) is
applied. Recent researches show that BFOA is
more advantageous than other optimization
techniques because of its easy convergence and
reduced calculations [9].
In this paper, the PID controller is
designed for a Buck converter and optimized to
meet the nominal stability and nominal
performance requirements. The robustness of the
dc-dc converter under line and load disturbances is
studied. This paper is organised as follows: Section
II deals with the basics of a dc-dc Buck converter
and its small signal modelling. Section III deals in
detail the PID controller design and the BFOA
technique. Also it deals with the optimization
procedure of the BFOA-PID algorithm. Section IV
gives an account of the dynamic performance
analysis of the controller. Section V gives the
results and discussions of the conventional PID
controlled Buck Converter and BFOA optimized
PID controlled Buck Converter.
II. DC-DC CONVERTER:
Buck converter has two modes of
operation: (i) Switch is on (ii) Switch is off. The
 2011 IEEE PES Innovative Smart Grid Technologies – India

circuit diagram of the Buck converter is shown in

figure 1. Small Signal Input to Output transfer
function at this nominal operating point is given as,
.
4
.

III. CONTROLLER DESIGN

Figure 1 Buck Converter A. Control Principle

The PID controller has several parameters

Small Signal Control to Output transfer function is that can be adjusted to make the control loop
derived as, perform better. The controller’s performance gets
deteriorated if the control parameters are not
1 chosen properly. The procedure for finding the
controller parameters is called tuning [6].
The PID algorithm can be described as
Small Signal Input to Output transfer
1
function is derived as, 5

6
2
Where u is the control variable and is the control
error. The control variable is thus a sum of three
In this transfer function, VO is the output
voltage, D is the duty cycle, C is the output terms: the P term (which is proportional to error),
capacitance, L is the inductance and R is the load the I-term (which is proportional to the integral of
resistance. RL and RC are the equivalent series the error), and the D-term (which is proportional to
resistance (ESR) of L and C respectively. This the derivative of the error) [6]. While the integral
transfer function is a second order low pass filter, action takes care of the steady state error under
with a left-half-plane introduced by the ESR of the steady state condition making it zero, the derivative
filter capacitance C [5]. The cut-off frequency of
action improves the closed-loop stability. Proper
the second order low pass filter is ωC = 1/√ .
selection of the controller parameters , and
Variations of D, varies the magnitude of the
transfer function. Moreover, it does not change the makes the controller perform optimally.
shape of the frequency response, but shifts the
magnitude plot upward or downward. B. Design of a PID Controller
Table 1 The open loop transfer function G(s)H(s)
Circuit Parameters of the prototype Buck is given in equation (3). It is desired that the system
Converter have a phase margin Ф 107° at a cross-over
Parameter Value Units frequency of 125.66 kHz and steady state error for
Input Voltage, Vi 24 V
unit ramp input is 0.035%. So a PID controller
Desired Output 12 V
Voltage, Vod whose transfer function is
Load Resistance, Ro 6 Ω introduced to get the desired phase margin at the
Filter Inductance, L 35 μH desired frequency. For the controller to meet the
Filter Capacitance, C 150 μF
requirements,
ESR of Inductor, RL 0.12 Ω
Ф 180° 7
ESR of Capacitor, RC 0.03 Ω
90° 8
The nominal operating point of the
prototype Buck converter is chosen as follows: Here 9
Input Voltage, Vi = 24 V, Desired Output Voltage,
Vod = 12 V, Duty ratio D = 0.5, Switching Also | | 1 10
frequency = 200 kHz. Representing eq.(9) in triangle form,

Small Signal Control to Output transfer | |

(11)
function at this nominal operating point is given as,
24 10.8 So, | |
12
3
1 5.817 4.243
 2011 IEEE PES Innovative Smart Grid Technologies – India

And 13 Bacterial Foraging Optimization BFOA is

| |
a novel optimization method proposed by Passino
is decided from the steady state requirements [7]-[9]. It is developed inspired by the chemotactic
and is found that 119.048 . Substituting this behaviour of a group of E.Coli bacterium moving
value of in eq. (9) and (13), the values of and towards an energy gradient by performing four
are found to be 5.80125, and 0.0869x10-4 basic processes such as swim, tumble, reproduction
respectively. and elimination-dispersion [10].
C. Bacterial Foraging Optimization

Eliminate the Disperse it to a random

Kill half of the Split up
bacteria with very location on the
population with highest the other
small probability optimization domain
objective function half

Figure 2: Reproduction Process Figure 3: Elimination-Dispersion Process

Initialize all Elimination-

Chemotaxis Reproduction
variables Dispersion Stop

Loop Loop executed

executed for for ‘Ned ‘ times
‘Nre ‘ times

Figure 4: Optimization Process of BFOA algorithm

Initialize Select 1st Compute Yes

Compute Obj. Fn.
number of Tumble objective Swim
bacteria objective = max?
bacteria ‘S’ in i=0 function function
the population
No

Yes

Select the next bacteria i = i+1 i<S

No

Perform reproduction

Figure 5: Chemotaxis process

Step 1: The inner loop is the chemotactic loop
shown in figure 5. In this process, the movement of
an E.Coli bacterium is simulated. It moves in two
different ways: tumbling and swimming [10]. Each
time it performs an operation, the objective
function value is calculated. The bacterium changes
its position only if the modified objective function
value is less than the previous one. At the
completion of chemotaxis, the bacterium will be
swarming around a point in the search space with
least objective function value.
Step 2: The loop outside the chemotactic loop is the
reproduction loop shown in figure 2. In this
reproduction process, the objective function value
of each and every bacterium is calculated and
sorted out in the ascending order. The worst half of
the bacterial population with the highest value dies
out and the other half of the population with the
lowest value splits out [10]. For this new
generation of bacterium, the inner chemotactic loop
is started and this process continues for the
specified number of reproduction steps.
Step 3: The outermost loop is the elimination-
dispersion loop shown in figure 3. In this process,
some bacterium with very small probability is
eliminated and dispersed to a random location on
the optimization domain. This process keeps the
number of bacterium constant [10].
 2011 IEEE PES Innovative Smart Grid Technologies – India
D. Optimization process of the BFOA-PID
algorithm:
The steps that are used for optimizing the PID
controller parameters are,
1. Initialize all the variables.
2. Find the position and velocity of each
bacterium and update the position of each
bacterium by performing swim and tumble.
3. For each bacterium the best position is
recorded in the PID controller.
4. Perform simulation and calculate the error (Vref
- Vout).
5. Calculate the local best position of each
bacterium and then the global best position.
6. Find the new direction (tumble) for each
bacterium by calculating its velocity. The
velocity of each bacterium is changed for easy
convergence.
7. Perform reproduction process by sorting the
bacteria in the order of ascending cost, killing
half of the population with highest cost and
splitting up the other half population.
8. If the cost (error) calculated is minimal, then
the bacterium with minimum cost gives the
optimal PID controller parameters. Or else
goto step 2.
IV. DYNAMIC PERFORMANCE
ANALYSIS:
Robust stability and performance account
to satisfactory stability and performance for a set of
deviation from the nominal value [11]. In switching
power converters, these deviations and
uncertainties are, in part, due to changes in
elements and circuit characteristics, especially load,
and in part due to errors in modelling high
frequency dynamics and unmodeled elements) and
linearizing. The three figures of merit: Integral of
Square Error (ISE), Integral of Absolute Error
(IAE) and Integral of Time-weighted Absolute
Error (ITAE) are used for the formulation of a
dynamic performance criterion [13].
∞
(14)
∞
15
∞
16
ISE strongly suppress large errors and IAE
suppress small errors more effectively. ITAE works
more effectively on errors that persist for a long
time. So ISE is used for penalizing the response
that has large errors which is usually the case at the
dynamic part of the response and ITAE is used for
penalizing a response which occurs during the
steady state condition [4].
Minimization of these errors is considered
to be the main objective of this algorithm. In each
iteration, the errors (i.e.) the objective function is
calculated. Also the corresponding Kp, Ki and Kd
values are calculated. Condition check is being
made to find whether the objective function is
minimized. If the condition comes out to be true,
the Kp, Ki and Kd values found out during that
iteration is considered to be optimum. Otherwise
the next iteration starts and the process continues.
This algorithm is developed such that if the errors
remain to be minimum continuously for 100
iterations, the optimization process stops and the
Kp, Ki and Kd values calculated during the final
iteration is assigned as the controller parameter
values and the controller operates with that
parameter values.
V. RESULTS AND DISCUSSIONS
A. PID control:
The open loop transfer function G(S)H(s)
of the Buck converter is given by equation (3). A
PID compensator is designed with a phase margin
of 107° at a cross-over frequency of 125.66 kHz.
The steady state error for unit ramp input is
considered to be 0.035%. The KP, Ki and Kd values
are found to be 5.80125, 119.048 and 0.0869x10-4
respectively. The simulation results of the
controller with these controller parameters are
shown.
The PID controlled Buck converter is
simulated using Matlab simulink and the results are
shown.
Figure 6: Output response of the Buck converter
with PID control
 2011 IEEE PES Innovative Smart Grid Technologies – India

The figure 6 shows the output response of
the Buck converter with PID control. The output
response has a peak overshoot of 6.22V. This peak
overshoot accounts to more than 50% of the desired
output voltage which is very large and is
unacceptable in most sensitive applications.
The figure (8) shows the output response
of the PID contolled Buck Converter which is
optimized using BFOA. The figure(9) shows the
ISE, IAE and ITAE error plot. It can be inferred
that the errors are minimized very shortly.

160
ISE
140 IAE
ITAE
120

100

Process output
80
Figure 7. Dynamic response of the PID controlled
Buck converter to load step change from 6Ω to 60

25Ω. 40

The figure 7 shows the dynamic 20

performance of the PID controlled Buck converter 0

to a load step change from 6Ω to 25Ω. It can be -20

0 50 100 150 200 250 300 350
noticed that there is a large disturbance in the Time(s)

output response and it settles at a new value.

Figure (9) Error Plot
B. BFOA tuned PID Control:
The PID controller parameters are being The figure (10) shows how the local best
optimized by using BFOA algorithm. The variables position varies for the bacterium in the search
used in BFOA are assigned the values given below. space.
It is then simulated using Matlab.
i. Dimension of search space D=3
ii. The number of bacteria NB =10
iii. Number of chemotactic steps Ncs =10
iv. Limits the length of a swim Nsl =4
v. The number of reproduction steps Nrep=4
vi. The number of elimination-dispersal
events Nede=1
vii. The number of bacteria reproductions
(splits) per generation Sr=s/2
viii. The probability that each bacteria will be
eliminated/dispersed Ped=0.25

By applying BFOA for optimization of

PID control parameters Kp, Ki and Kd are obtained
as Kp =0, Ki=4.7640 and Kd=13.2698. The
simulation results of the controller with these Figure (10) Local best position of each bacterium
controller parameters are shown.
The figure 11 shows how the global best
position is assigned for the bacterium in every
iteration step throughout the search space.

Figure 8. Output response of the BFOA tuned PID

controlled Buck Converter
 2011 IEEE PES Innovative Smart Grid Technologies – India

14
Table II
12 Performance evaluation
10 Parameters PID BFOA tuned
control PID Control
G lobal bes t pos ition

4.7x10-4s 1.9x10 -5s

8
Settling Time
6 Maximum Peak 6.22V 0.15V
4
Overshoot
2
VI. CONCLUSION:
0 In this paper, Bacterial Group Foraging
-2 Algorithm (BFOA) is applied for optimizing the
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3
Search space PID controller parameters of a DC-DC Buck
Figure 11 Global best position of each bacterium Converter. The robustness of the BFOA tuned PID
controlled DC-DC converter under load
The figures (12) and (13) show the disturbances is studied. The controller’s
robustness of the BFOA – PID controller for a dc- effectiveness is studied by comparing it with the
dc converter. conventional PID controlled DC-DC converter. It is
proved that the peak overshoot of the response is
very much reduced and it settles at a very less time.
Also it is proved that the BFOA tuned PID
controller fed Buck converter is robust in its
stability when subjected to external disturbances.

VII. REFERENCES
1) Robert W. Ericson, “DC-DC Converters”,
Article in Wiley Encyclopaedia of Electrical
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2) Prodit, . Maksimovic, “Design of a digital PID
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Figure 12 Dynamic response of a BFOA-PID
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 2011 IEEE PES Innovative Smart Grid Technologies – India

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