Toshiba Laptop Schematic Diagram

5 4 3 2 1
m
MAX1845 ( +1.5V & VCCP1.05V )
P31
o
SC486IMLTRT ( +1.8SUS & 0.9V )
c
P32 Intel Dothan Processor
.
D
VCC_CORE
CPU Thermal D
GMCH_VTT
VCCA 478 uFCPGA Sensor
SC4215 ( +2.5V ) P3,4 P3
s
+5V
P32
it c
FSB
533/400MHz
MAX1999 ( 3VPCU & 5VPCU )
P33 X'TAL
14.318M
VIN
Alviso-GM LCD/INV
a
+5V
BATTERY CHARGER +3V CK-GEN
P34
GMCH CONN P13 CK410M
Dual Channel +3V ICS954206 P2
DDR II DDR2 82915GM
GMCH_VTT +5V
m
MAX1907 ( CPU_CORE ) SODIMM0 1.8VSUS
+1.5V
+2.5V
CRT
1.8VSUS +2.5V 1257 PCBGA P12
P35 SMDDR_VTERM +3V P5,6,7,8,9
e
C
DDR II C
DISCHARGE SODIMM1 S-VIDEO
h
P36 P10,11 X'TAL P12
32.768K
DMI interface
c
SATA
s
PATA PCI Bus interface
ICH6-M
-
USB 2.0 +3V
3VSUS
USB,PCI Express
p
+2.5V
+1.5V
1.5VSUS 609 BGA
SATA HDD/CD-ROM USB Port 0 ~ 3 VCCRTC
GMCH_VTT TYPE III TI PCI7411 RELTEK
to
+5V 5VSUS
P14,15,16
( reserved ) P18 P18 P17
MINI-PCI 288 PBGA RTL8100CL(10/100M)
AC'97 LPC
B
Socket X'TAL ( PCMCIA+1394 X'TAL
RTL8110SB(1G) B
INTB/C
24.576M +Cardreader ) 25M
INTD
p
REQ1 REQ2
GNT1 +3V INTA/B/C GNT2
EC/KBC SIOPC87383 +3V AD20 3VSUS REQ0 LANVCC3 AD16
P30 3VSUS 5VSUS GNT0 LANVCC18
AMCODEC PC97551
l. a
5VSUS P25 +1.5V AD25 P28 LANVCC10 P26
CONEXANT
MODEM DAA
CONEXANT 3VPCU
+3V
20468-31 VCCRTC
20463-31 P22 FIR
P20 X'TAL P30
P19 32.768K 3 in 1 Cardreader
NEW Socket RJ45
P29
CARD
w
MIC IN RJ11 ISA BIOS 3VPCU P27
Audio PORT ( reserved )
JACK P22 P37
Amplifier P27 REPLICATOR CARDBUS
P21 P24
GMT1428 Slot
w
BLUETOOTH
+5V P21 TOUCHPAD+5V type I X II P28
P23 P37
A CRT 1394 A
PORT
w
Stereo Speaker
Conn.
Keyboard P29
P21 P23
USB PORT
RJ45 PS/2 H/P POWER
Headphone Jack COM&PRT JACK CONN. JACK JACK
P21 PORT 5,6
5 4 3 2
5 4 3 2 1
10,12,13,15,16,18,21,22,23,25,26,30,33,36,37 +3V
02
m
9,16,31,36 VCCP
L57
+3V CLKVDD Place these termination to close
ACB2012L-120
C358 C373 C368 C383 C375
ICS954226
120 ohms@100Mhz
o
CLK_VDDA
0.047U 0.047U 0.047U 0.047U 0.047U C111
CG_XIN
2
c
20P R54 12.1/F
37
38
14M_SIO 30
R277 2.2 Y2 U12
CLK_VDDA 14M_REF R57 12.1/F
.
14.318MHZ 50 52
VDDA
VSSA
XTAL_IN REF 14M_ICH 15
D C109 RP30 D
C372 C378 C369 CG_XOUT RHCLK_MCH
1
49 XTAL_OUT CPU0 44 1 2 HCLK_MCH 5
43 RHCLK_MCH# 3 4 +3V
CPU0# HCLK_MCH# 5
0.047U 4.7U/10V 0.01U 20P RP32 33X2
s
35 CLK_EN# CLK_EN# 10 41 RHCLK_CPU 1 2 HCLK_CPU 3 R_PCLK_ICH R327 10K
STP_PCI# VTT_PWRGD#/PD CPU1 RHCLK_CPU# R_PCLK_LAN R311 10K
15 STP_PCI# 55 PCI_STOP# CPU1# 40 3 4 HCLK_CPU# 3
15,35 STP_CPU# STP_CPU# 54 33X2
L63 CPU_STOP#
36
it c
CLKVDD1 CPU2_ITP/SRC7
+3V CPU2#_ITP/SRC7# 35
ACB2012L-120
120 ohms@100Mhz C405 C436 C452 CGCLK_SMB NEWCARDCLKREQ# HCLK_MCH R60 49.9/F
CGDAT_SMB
46 SCLK CK-410M SRC6 33 NEWCARDCLKREQ# 37
HCLK_MCH# R65 49.9/F
47 SDATA SRC6# 32
0.047U 0.047U 4.7U/10V RP35
15 CLK48_USB R58 22 CG_BSEL0 12 31 RSRC_MCH 1 2 SRC_MCH 6 HCLK_CPU R69 49.9/F
R61 22 CG_BSEL1 FSA/USB_48 SRC5 RSRC_MCH# HCLK_CPU# R72 49.9/F
28 CLK48_7411 16 FSB/TEST_MODE SRC5# 30 3 4 SRC_MCH# 6
53 RP37 33X2
CG_BSEL2 R319 4.7K U18_FSC FSC/TEST_SEL RSRC_SATA SRC_MCH R82 49.9/F
26 3 4
a
SRC4 SRC_SATA 14
R322 2.2 CLK_VDDREF 48 27 RSRC_SATA# 1 2 SRC_SATA# 14 SRC_MCH# R91 49.9/F
CLK_VDD48 CLKVDD VDD_REF SRC4# RP36 33X2
42 VDD_CPU
24 RSRC_ICH 3 4 SRC_ICH 15 SRC_ICH R92 49.9/F
C409 C387 CLKVDD1 SRC3 RSRC_ICH# SRC_ICH# R94 49.9/F
1 VDD_PCI_1 SRC3# 25 1 2 SRC_ICH# 15
7 RP34 33X2
0.047U 4.7U/10V VDD_PCI_2 RSRC_NEW CLK_PCIE_NEWC R79 *49.9/F
SRC2 22 3 4 CLK_PCIE_NEWC 37
CLKVDD 21 23 RSRC_NEW# 1 2 CLK_PCIE_NEWC# R83 *49.9/F
m
VDD_SRC0 SRC2# CLK_PCIE_NEWC# 37
28 *33X2
VDD_SRC1 DREFSSCLK R73 49.9/F
34 VDD_SRC2 SRC1 19
20 DREFSSCLK# R75 49.9/F
R326 1 CLK_VDD48 SRC1# RP33
11 VDD_48
e
CLK_VDDREF 17 RDREFSSCLK 3 4 DOT96 R66 49.9/F
C SRC0 DREFSSCLK 5 C
Iref=5mA, R74 475/F IREF 39 18 RDREFSSCLK# 1 2 DOT96# R70 49.9/F
IREF SRC0# DREFSSCLK# 5
C404 33X2
Ioh=4*Iref 5 R_PCLK_591 R46 33 PCLK_591 22
SRC_SATA R96 49.9/F
0.047U PCI5 R_PCLK_7411 R42 33 SRC_SATA# R99 49.9/F
PCI4 4 PCLK_7411 28
h
RP31 3 R_PCLK_SIO R38 33 R_PCLK_LAN R316 *10K
GND_PCI_1
GND_PCI_2
PCI3 PCLK_SIO 30
GND_SRC
GND_CPU
GND_REF
5 DOT96 DOT96 1 2 R_DOT96 14 56 R_PCLK_MINI R48 33 PCLK_MINI 25
DOT96 PCI2
GND_48
5 DOT96# DOT96# 3 4 R_DOT96# 15 9 R_PCLK_LAN R56 33 PCLK_LAN 26
DOT96# PCIF1 R_PCLK_ICH R50 33
PCIF0/ITP_EN 8 PCLK_ICH 14
c
33X2
FSC FSB FSA CPU SRC PCI ICS954226
C TEST modified EMI ( 48 MHz )
13
51
29
45
2
6
1 0 1 100 100 33
250mA ( MAX. )
s
ICS954226 R43 CLK48_USB C140 *10P
0 0 1 133 100 33 SMbus address D2 10K CLK48_7411 C144 *10P
-
0 1 1 166 100 33 +3V
0 1 0 200 100 33 ( 33 MHz )
0 0 0 266 100 33 C520 C521 C522 C523 +3V PCLK_SIO C112 *10P
p
1 0 0 333 100 33 .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R PCLK_LAN C137 *10P
+3V
1 1 0 400 100 33 PCLK_MINI C126 *10P
to
1 1 1 RESERVED PCLK_ICH C127 *10P
PCLK_7411 C122 *10P

B * Frequence select by CPU auto sense. Q25 R330 R296 B
2
CH2507S 10K 10K PCLK_591 C125 *10P
CGDAT_SMB
p
15,37 PDAT_SMB 3 1 CGDAT_SMB 10
( 14 MHz )
14M_SIO C136 *10P
l. a
14M_ICH C139 *10P
+3V
Q26 2
CH2507S
3 1 CGCLK_SMB
15,37 PCLK_SMB CGCLK_SMB 10
+3V VCCP VCCP
w
R302 R288 R310
10K *1K *1K
w
CG_BSEL0
R281 0 CG_BSEL1 R282 1K

A 3 SELPSB1_CLK MCH_BSEL1 5 A
w
R301 0 CG_BSEL2 R293 1K
3 SELPSB0_CLK MCH_BSEL2 5
R294 R289 R318

*10K *0 *0
5 4 3 2
A B C D E
03
m
5 HD#[0..63] HD#[0..63] HD#[0..63]
U10B
HA#[3..31] U10A HD#0 HD#32
o
5 HA#[3..31] A19 D0# D32# Y26
HA#3 P4 N2 ADS# HD#1 A25 AA24 HD#33
A3# ADS# ADS# 5 D1# D33#
HA#4 U4 L1 BNR# HD#2 A22 T25 HD#34
A4# BNR# BNR# 5 VCCP D2# D34#
HA#5 V3 J3 BPRI# HD#3 B21 U23 HD#35
A5# BPRI# BPRI# 5 D3# D35#
0
ADDR GROUP
HA#6 R3 HD#4 A24 V23 HD#36
c
A6# D4# D36#
2
DATA GRP
HA#7 V2 L4 DEFER# HD#5 B26 R24 HD#37
A7# DEFER# DEFER# 5 D5# D37#
DATA GRP
HA#8 W1 H2 DRDY# HD#6 A21 R26 HD#38
A8# DRDY# DRDY# 5 D6# D38#
.
4 HA#9 T4 M2 DBSY# R101 HD#7 B20 R23 HD#39 4
A9# DBSY# DBSY# 5 D7# D39#
HA#10 W2 HD#8 C20 AA23 HD#40
HA#11 A10# HBREQ0# 56 HD#9 D8# D40# HD#41
Y4 A11# BR0# N4 HBREQ0# 5 B24 D9# D41# U26
HA#12 Y1 HD#10 D24 V24 HD#42
A12# D10# D42#
CONTROL
s
HA#13 U1 A4 IERR# HD#11 E24 U25 HD#43
HA#14 A13# IERR# CPUINIT# HD#12 D11# D43# HD#44
0
AA3 A14# INIT# B5 CPUINIT# 14 C26 D12# D44# V26
HA#15 Y3 HD#13 B23 Y23 HD#45
HA#16 A15# HLOCK# HD#14 D13# D45# HD#46
AA2 A16# LOCK# J2 HLOCK# 5 E23 D14# D46# AA26
HADSTB0# HD#15 HD#47
it c
5 HADSTB0# U3 ADSTB#0 C25 D15# D47# Y25
B11 CPURST# 5 HDSTBN0# HDSTBN0# C23 W25 HDSTBN2# HDSTBN2# 5
RESET# CPURST# 5 DSTBN0# DSTBN2#
5 HREQ#0 HREQ#0 R2 H1 RS#0 5 HDSTBP0# HDSTBP0# C22 W24 HDSTBP2# HDSTBP2# 5
REQ0# RS0# RS#0 5 DSTBP0# DSTBP2#
5 HREQ#1 HREQ#1 P3 K1 RS#1 5 DINV#0 D25 T24 DINV#2 5
REQ1# RS1# RS#1 5 DINV0# DINV2#
5 HREQ#2 HREQ#2 T2 L2 RS#2 HD#[0..63] HD#[0..63]
REQ2# RS2# RS#2 5
5 HREQ#3 HREQ#3 P1 M3 HTRDY#
REQ3# TRDY# HTRDY# 5
5 HREQ#4 HREQ#4 T1 HD#16 H23 AB25 HD#48
HA#[3..31] REQ4# HIT# HD#17 D16# D48# HD#49
HIT# K3 HIT# 5 G25 D17# D49# AC23
HA#17 AF4 K4 HITM# HD#18 L23 AB24 HD#50
A17# HITM# HITM# 5 D18# D50#
a
HA#18 AC4 HD#19 M26 AC20 HD#51
HA#19 A18# BPM#0 HD#20 D19# D51# HD#52
AC7 A19# BPM#0 C8 T26 H24 D20# D52# AC22
1
ADDR GROUP
3
DATA GRP
HA#20 AC3 B8 BPM#1 HD#21 F25 AC25 HD#53
A20# BPM#1 T27 D21# D53#
DATA GRP
HA#21 AD3 A9 BPM#2 HD#22 G24 AD23 HD#54
A21# BPM#2 T28 D22# D54#
HA#22 AE4 C9 BPM#3 HD#23 J23 AE22 HD#55
A22# BPM#3 T70 D23# D55#
HA#23 AD2 A10 PRDY# HD#24 M23 AF23 HD#56
A23# PRDY# T29 VCCP D24# D56#
HA#24 AB4 B10 PREQ# HD#25 J25 AD24 HD#57
A24# PREQ# D25# D57#
m
HA#25 AC6 A13 TCK HD#26 L26 AF20 HD#58
SIGNALS
HA#26 A25# TCK TDI HD#27 D26# D58# HD#59
XTP/ITP
AD5 A26# TDI C12 N24 D27# D59# AE21
HA#27 TDO HD#28 HD#60
1
AE2 A27# TDO A12 M25 D28# D60# AD21
HA#28 AD6 C11 TMS R114 HD#29 H26 AF25 HD#61
HA#29 A28# TMS TRST# HD#30 D29# D61# HD#62
AF3 B13 N25 AF22
e
3
HA#30 A29# TRST# DBR# 56 HD#31 D30# D62# HD#63 3
AE1 A30# DBR# A7 DBR# 15 K25 D31# D63# AF26
HA#31 AF1 5 HDSTBN1# HDSTBN1# K24 AE24 HDSTBN3# HDSTBN3# 5
HADSTB1# A31# CPU_PROCHOT# HDSTBP1# DSTBN1# DSTBN3# HDSTBP3#
5 HADSTB1# AE5 ADSTB#1 PROCHOT# B17 5 HDSTBP1# L24 DSTBP1# DSTBP3# AE25 HDSTBP3# 5
THERM
B18 THERMDA 5 DINV#1 J26 AD20 DINV#3 5

A20M# THERMDA THERMDC DINV1# DINV3#
h
14 A20M# C2 A20M# THERMDC A18
FERR# D3 R110 PM_PSI# E1 P25 COMP0 R55 27.4
14 FERR# FERR# T84 PSI# COMP0 VCCP
IGNNE# A3 C17 THRMTRIP#_1 0 P26 COMP1 R51 54.9
14 IGNNE# IGNNE# THERMTRIP# THRMTRIP# 5,14 COMP1
2 SELPSB0_CLK SELPSB0_CLK C16 AB2 COMP2 R345 27.4
STPCLK# SELPSB1_CLK BSEL0 COMP2 COMP3 R346 54.9
C6 A15 C14 AB1
c
14 STPCLK# STPCLK# ITP_CLK1 T24 2 SELPSB1_CLK BSEL1 COMP3
INTR D1 A16
14 INTR
H CLK
NMI LINT0 ITP_CLK0 T25

14 NMI D4 B14 HCLK_CPU# MISC R297
LINT1 BCLK1 HCLK_CPU# 2
14 SMI# B4 B15 HCLK_CPU B2 G1 200
SMI# BCLK0 HCLK_CPU 2 T23 RSVD RSVD/DPRSTP# H_DPRSTP# 14
C3 B7
s
T80 RSVD DPSLP# H_DPSLP# 14
Dothan_478P
T9 AF7 RSVD DPWR# C19 DPWR# DPWR# 5
T104 AC1 RSVD PWRGOOD E4 CPUPWRGD CPUPWRGD 14
E26 A6
-
T20 RSVD SLP# H_CPUSLP# 5,14
VCCP R24 1K/F H_GTLREF AD26 C5 H_TEST1

GTLREF TEST1
Layout note: 0.5" max length. TEST2 F23 H_TEST2 CPUSLP#
1.connected between Dothan and
p
Dothan_478P
R23 R63 R102 ICH6 for Dothen A Stepping.
2K/F 2.connected between Dothan and
*1K *1K
Alviso for Dothen B Stepping.
to
VCCP
2 2
TDI R106 150
TMS R104 39.2
TDO R107 *54.9
p
CPURST# R105 54.9
TCK R109 27.4

TRST# R108 680
l. a
+3V
R100 200 6648VCC

VCCP
PREQ# R103 56 C162

THRMTRIP#_1 R115 *56 R98 R95 R93 R85 0.1U
10K 10K 10K *10K
U14
w
22 THCLK_SMB THCLK_SMB 8 1
SCLK VCC THERMDA
22 THDAT_SMB THDAT_SMB 7 2
SDA DXP C161
22 6648_ALERT# 6648_ALERT# 6 3 2200P
ALERT# DXN
w
33 SYS_SHDN# SYS_SHDN# 4 5 THERMDC
OVERT# GND
1 G781P8/MAX6648MUA 1
10,12,13,15,16,18,21,22,23,25,26,30,33,36,37 +3V
w
9,16,31,36 VCCP
A B C D
A B C D E
U10D
A2 D13
04
m
VSS0 VSS97
A5 VSS1 VSS98 D15
CPU_VCCA R84 0 +1.5V A8 D17
VSS2 VSS99
A11 VSS3 VSS100 D19
CPU_CORE CPU_CORE C147 A14 D21
R81 *0 VSS4 VSS101
o
U10C +1.8V A17 VSS5 VSS102 D23
0.1U A20 D26
VSS6 VSS103
AA11 VCC0 VCC59 G5 A23 VSS7 VSS104 E3
AA13 VCC1 VCC60 H22 A26 VSS8 VSS105 E6
AA15 H6 AA1 E8
c
VCC2 VCC61 VSS9 VSS106
AA17 VCC3 VCC62 J21 AA4 VSS10 VSS107 E10
AA19 VCC4 VCC63 J5 AA6 VSS11 VSS108 E12
.
4
AA21 K22 CPU_VCCA VCCP VCCP AA8 E14 4
VCC5 VCC64 VSS12 VSS109
AA5 VCC6 VCC65 U5 AA10 VSS13 VSS110 E16
AA7 VCC7 VCC66 V22 AA12 VSS14 VSS111 E18
AA9 VCC8 VCC67 V6 AA14 VSS15 VSS112 E20
s
AB10 W21 C146 C149 AA16 E22
VCC9 VCC68 + C165 C394 C393 C461 C445 C444 C463 C450 C395 C458 C396 VSS16 VSS113
AB12 VCC10 VCC69 W5 AA18 VSS17 VSS114 E25
AB14 Y22 0.01U 10U AA20 F1
VCC11 VCC70 150U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U VSS18 VSS115
AB16 VCC12 VCC71 Y6 AA22 VSS19 VSS116 F4
it c
AB18 VCC13 AA25 VSS20 VSS117 F5
AB20 VCC14 VCCA0 F26 AB3 VSS21 VSS118 F7
AB22 B1 TP_VCCA1 AB5 F9
VCC15 VCCA1/RSVD T75 VSS22 VSS119
AB6 N1 TP_VCCA2 AB7 F11
AB8 AC26 TP_VCCA3 AB9 F13
AC11 VCC18 AB11 VSS25 VSS122 F15
AC13 VCC19 VCCP0 D10 VCCP AB13 VSS26 VSS123 F17
AC15 VCC20 VCCP1 D12 AB15 VSS27 VSS124 F19
a
AC9 VCC23 VCCP4 E11 AB21 VSS30 VSS127 G2
AD10 VCC24 VCCP5 E13 AB23 VSS31 VSS128 G6
AD12 VCC25 VCCP6 E15 AB26 VSS32 VSS129 G22
AD14 VCC26 VCCP7 F10 AC2 VSS33 VSS130 G23
AD16 VCC27 VCCP8 F12 AC5 VSS34 VSS131 G26
AD18 F14 CPU_CORE AC8 H3
VCC28 VCCP9 VSS35 VSS132
m
AD8 VCC29 VCCP10 F16 AC10 VSS36 VSS133 H5
AE11 VCC30 VCCP11 K6 35,36 CPU_CORE AC12 VSS37 VSS134 H21
AE13 VCC31 VCCP12 L21 9,16,31,36 VCCP AC14 VSS38 VSS135 H25
AE15 VCC32 VCCP13 L5 15,16,31,36,37 +1.5V AC16 VSS39 VSS136 J1
AE17 M22 + C499 + C500 + C498 36 +1.8V AC18 J4
e
3 VCC33 VCCP14 VSS40 VSS137 3
AE19 VCC34 VCCP15 M6 AC21 VSS41 VSS138 J6
AE9 N21 330U *270U *270U AC24 J22
AF10 VCC36 VCCP17 N5 AD1 VSS43 VSS140 J24
AF12 VCC37 VCCP18 P22 AD4 VSS44 VSS141 K2
h
AF14 VCC38 VCCP19 P6 AD7 VSS45 VSS142 K5
AF16 VCC39 VCCP20 R21 AD9 VSS46 VSS143 K21
AF18 VCC40 VCCP21 R5 AD11 VSS47 VSS144 K23
AF8 VCC41 VCCP22 T22 AD13 VSS48 VSS145 K26
D18 T6 CPU_CORE CPU_CORE AD15 L3
c
D20 VCC43 VCCP24 U21 AD17 VSS50 VSS147 L6
D22 VCC44 AD19 VSS51 VSS148 L22
D6 VCC45 VCCQ0 P23 AD22 VSS52 VSS149 L25
D8 W4 C469 C107 C468 C132 C131 C105 C106 C129 C427 C470 AD25 M1
s
VCC46 VCCQ1 VSS53 VSS150
E17 VCC47 AE3 VSS54 VSS151 M4
E19 E2 CPU_VID0 10U 10U 10U 10U 10U 10U 10U 10U 10U 10U AE6 M5
VCC48 VID0 CPU_VID0 35 VSS55 VSS152
E21 F2 CPU_VID1 AE8 M21
-
E5 F3 CPU_VID2 AE10 M24
E7 G3 CPU_VID3 AE12 N3
E9 G4 CPU_VID4 AE14 N6
F18 H4 CPU_VID5 AE16 N22
p
F20 VCC54 AE18 VSS61 VSS158 N23
F22 VCC55 AE20 VSS62 VSS159 N26
F6 AE7 TP_VCCSENSE CPU_CORE CPU_CORE AE23 P2
VCC56 VCCSENSE VSS63 VSS160
F8 VCC57 AE26 VSS64 VSS161 P5
G21 AF6 TP_VSSSENSE AF2 VSS162 P21
to
VCC58 VSSSENSE VSS65
AF5 VSS66 VSS163 P24
Dothan_478P C429 C428 C423 C119 C115 C114 C116 C113 C425 C102 AF9 R1
R349 R347 VSS67 VSS164
AF11 VSS68 VSS165 R4
10U 10U 10U 10U 10U 10U 10U 10U 10U 10U AF13 R6
2
*54.9 *54.9 VSS69 VSS166 2

AF19 T3
p
VSS72 VSS169
AF21 VSS73 VSS170 T5
AF24 VSS74 VSS171 T21
CPU_CORE CPU_CORE B3 T23
VSS75 VSS172
B6 VSS76 VSS173 T26
B9 U2
l. a
VSS77 VSS174
B12 VSS78 VSS175 U6
C135 C101 C426 C471 C424 C130 C104 C133 C103 C134 B16 U22
VSS79 VSS176
B19 VSS80 VSS177 U24
10U 10U 10U 10U 10U 10U 10U 10U 10U 10U B22 V1
VSS81 VSS178
B25 VSS82 VSS179 V4
C1 VSS83 VSS180 V5
C4 VSS84 VSS181 V21
C7 VSS85 VSS182 V25
CPU_CORE CPU_CORE C10 W3
VSS86 VSS183
C13 W6
w
VSS87 VSS184
C15 VSS88 VSS185 W22
CPU_CORE C18 W23
C392 C397 C391 C400 C467 C505 C503 C398 C390 C466 VSS89 VSS186
C21 VSS90 VSS187 W26
C24 VSS91 VSS188 Y2
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U D2 Y5
C472 C473 C474 C118 C117 VSS92 VSS189
D5 Y21
w
VSS93 VSS190
D7 VSS94 VSS191 Y24
10U 10U 10U 10U 10U D9 VSS95
D11 VSS96
1 Dothan_478P 1
w
CPU_CORE CPU_CORE
C430 C502 C504 C399 C496 C418 C497 C495 C494 C501
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
A B C D
5 4 3 2 1
VCCP
05
m
HD#[0..63] U9A HA#[3..31] R339
3 HD#[0..63] HA#[3..31] 3
o
HD#0 E4 G9 HA#3 1K
HD#1 HD0# HA3# HA#4 U9C
E1 HD1# HA4# C9
HD#2 F4 E9 HA#5 DMI_TXN0 AA31 G16 CFG0
HD2# HA5# 15 DMI_TXN0 DMIRXN0 CFG0 T102
HD#3 H7 B7 HA#6 DMI_TXN1 AB35 H13 MCH_BSEL1
HD3# HA6# 15 DMI_TXN1 DMIRXN1 CFG1 MCH_BSEL1 2
c
HD#4 E2 A10 HA#7 DMI_TXN2 AC31 G14 MCH_BSEL2
HD4# HA7# 10,32 SMDDR_VREF 15 DMI_TXN2 DMIRXN2 CFG2 MCH_BSEL2 2
HD#5 F1 F9 HA#8 DMI_TXN3 AD35 F16 CFG3
HD5# HA8# 8,9,10,36 1.8VSUS 15 DMI_TXN3 DMIRXN3 CFG3 CFG3 6
HD#6 HA#9 CFG4
.
E3 HD6# HA9# D8 9,16,31,36 VCCP CFG4 F15 T92
D HD#7 D3 B10 HA#10 G15 CFG5 D
HD7# HA10# CFG5 CFG5 6
HD#8 K7 E10 HA#11 DMI_TXP0 Y31 E16 CFG6
HD8# HA11# 15 DMI_TXP0 DMIRXP0 CFG6 CFG6 6
HD#9 F2 G10 HA#12 DMI_TXP1 AA35 D17 CFG7
HD#10 J7 D9 HA#13 DMI_TXP2 AB31 J16 CFG8
s
HD10# HA13# 15 DMI_TXP2 DMIRXP2 CFG8 T98
HD#11 J8 E11 HA#14 DMI_TXP3 AC35 D15 CFG9
HD#12 H6 F10 HA#15 E15 CFG10
HD12# HA15# CFG10 T82
HD#13 F3 G11 HA#16 D14 CFG11
HD#14 K8 G13 HA#17 DMI_RXN0 AA33 E14 CFG12
15 DMI_RXN0 CFG12 6
it c
HD#15 HD14# HA17# HA#18 DMI_RXN1 DMITXN0 CFG12 CFG13
H5 HD15# HA18# C10 15 DMI_RXN1 AB37 DMITXN1 CFG13 H12 CFG13 6
DMI
HD#16 H1 C11 HA#19 DMI_RXN2 AC33 C14 CFG14
HD16# HA19# 15 DMI_RXN2 DMITXN2 CFG14 T85
HD#17 H2 D11 HA#20 DMI_RXN3 AD37 H15 CFG15
HD17# HA20# 15 DMI_RXN3 DMITXN3 CFG15 T77
HD#18 K5 C12 HA#21 J15 CFG16
HD#19 K6 B13 HA#22 H14 CFG17
HD19# HA22# CFG17 T94
HD#20 J4 A12 HA#23 DMI_RXP0 Y33 G22 CFG18
HD20# HA23# 15 DMI_RXP0 DMITXP0 CFG18 CFG18 6
CFG/RSVD
HD#21 G3 F12 HA#24 DMI_RXP1 AA37 G23 CFG19
HD21# HA24# 15 DMI_RXP1 DMITXP1 CFG19 CFG19 6
HD#22 H3 G12 HA#25 DMI_RXP2 AB33 D23 CFG20
HD22# HA25# 15 DMI_RXP2 DMITXP2 CFG20 T81
HD#23 J1 E12 HA#26 DMI_RXP3 AC37 G25
a
HD23# HA26# 15 DMI_RXP3 DMITXP3 RSVD21
HD#24 L5 C13 HA#27 G24 CFG[2:0] ==>External Pull-ups are required.
HD#25 HD24# HA27# HA#28 VCCP RSVD22
K4 B11 J17
HD#26 J5
HD25# HA28#
D13 HA#29 CLK_SDRAM0 AM33 RSVD23
A31
CFG[17:3] ==>has internal pull up.
HD26# HA29# 10 CLK_SDRAM0 SM_CK0 RSVD24
HD#27 P7 HD27# HA30# A13 HA#30
10 CLK_SDRAM1
CLK_SDRAM1 AL1 SM_CK1 RSVD25 A30 CFG[20:18] ==>has internal pull up.
HD#28 L7 F13 HA#31 CLK_SDRAM2 AE11 D26
HD28# HA31# T108 SM_CK2 RSVD26
HD#29 J3 R335 CLK_SDRAM3 AJ34 D25
HD29# 10 CLK_SDRAM3 SM_CK3 RSVD27 +2.5V
HD#30 P5 F8 ADS# CLK_SDRAM4 AF6
m
HD30# HADS# ADS# 3 10 CLK_SDRAM4 SM_CK4
HD#31 L3 B9 HADSTB0# 100/F CLK_SDRAM5 AC10
HD31# HADSTB0# HADSTB0# 3 T105 SM_CK5
HD#32 U7 E13 HADSTB1#
HD32# HADSTB1# HADSTB1# 3
DDR MUXING
HD#33 V6 J11 HVREF CLK_SDRAM0# AN33
HD33# HVREF 10 CLK_SDRAM0# SM_CK0#
HD#34 R6 A5 BNR# CLK_SDRAM1# AK1
HD34# HBNR# BNR# 3 10 CLK_SDRAM1# SM_CK1#
e
HD#35 R5 D5 BPRI# CLK_SDRAM2# AE10 R331 R329
C HD35# HBPRI# BPRI# 3 T110 SM_CK2# C
HD#36 P3 E7 HBREQ0# R332 C442 CLK_SDRAM3# AJ33
HOST
HD36# BREQ0# HBREQ0# 3 10 CLK_SDRAM3# SM_CK3#

HD#37 T8 H10 CPURST# CLK_SDRAM4# AF5 10K 10K
HD37# HCPURST# CPURST# 3 10 CLK_SDRAM4# SM_CK4#
HD#38 R7 200/F 0.1U CLK_SDRAM5# AD10
HD38# T107 SM_CK5#
HD#39 R8 J23 PM_BMBUSY#
HD39# BM_BUSY# PM_BMBUSY# 15
h
HD#40 U8 CKE0 AP21 J21 PM_EXTTS#0
HD40# 10,11 CKE0 SM_CKE0 EXT_TS0#
HD#41 R4 AB1 HCLK_MCH# CKE1 AM21 H22 PM_EXTTS#1
HD41# HCLKINN HCLK_MCH# 2 10,11 CKE1 SM_CKE1 EXT_TS1#
PM
HD#42 T4 AB2 HCLK_MCH CKE2 AH21 F5 R47 0
HD42# HCLKINP HCLK_MCH 2 10,11 CKE2 SM_CKE2 THRMTRIP# THRMTRIP# 3,14
HD#43 T5 CKE3 AK21 AD30
HD43# 10,11 CKE3 SM_CKE3 PWROK IMVP_PWG 15,35
c
HD#44 R1 C6 DBSY# AE29 R350 100
HD44# HDBSY# DBSY# 3 RSTIN# PLTRST# 14,15,30,37
HD#45 T3 E6 DEFER# SM_CS0# AN16
HD45# HDEFER# DEFER# 3 10,11 SM_CS0# SM_CS0#
HD#46 V8 H8 DINV#0 SM_CS1# AM14 A24 DOT96#
HD46# HDINV#0 DINV#0 3 10,11 SM_CS1# SM_CS1# DREF_CLKN DOT96# 2
HD#47 U6 K3 DINV#1 SM_CS2# AH15 A23 DOT96
HD47# HDINV#1 DINV#1 3 10,11 SM_CS2# SM_CS2# DREF_CLKP DOT96 2
LCK
s
HD#48 W6 T7 DINV#2 SM_CS3# AG16 C37
HD48# HDINV#2 DINV#2 3 10,11 SM_CS3# SM_CS3# DREF_SSCLKN DREFSSCLK# 2
HD#49 U3 U5 DINV#3 D37
HD49# HDINV#3 DINV#3 3 DREF_SSCLKP DREFSSCLK 2
HD#50 V5 G6 DPWR# M_OCDCOMP0 AF22
HD50# HDPWR# DPWR# 3 T113 SM_OCDCOMP0
-
HD#51 W8 F7 DRDY# M_OCDCOMP1 AF16 AP37 TP_NC1
HD51# HDRDY# DRDY# 3 T111 SM_OCDCOMP1 NC1 T5
HD#52 W7 G4 HDSTBN0# AN37 TP_NC2
HD52# HDSTBN0# HDSTBN0# 3 NC2 T7
HD#53 U2 K1 HDSTBN1# M_ODT0 AP14 AP36 TP_NC3
HD53# HDSTBN1# HDSTBN1# 3 10,11 M_ODT0 SM_ODT0 NC3 T4
HD#54 U1 R3 HDSTBN2# M_ODT1 AL15 AP2 TP_NC4
HD#55 Y5 V3 HDSTBN3# M_ODT2 AM11 AP1 TP_NC5
p
HD#56 Y2 G5 HDSTBP0# M_ODT3 AN10 AN1 TP_NC6
HD56# HDSTBP0# HDSTBP0# 3 10,11 M_ODT3 SM_ODT3 NC6 T8
NC
HD#57 V4 K2 HDSTBP1# B1 TP_NC7
HD57# HDSTBP1# HDSTBP1# 3 NC7 T18
HD#58 Y7 R2 HDSTBP2# M_RCOMPN AK10 A2 TP_NC8
HD58# HDSTBP2# HDSTBP2# 3 SMRCOMPN NC8 T21
HD#59 W1 W4 HDSTBP3# L71 BK2125HS121 M_RCOMPP AK11 B37 TP_NC9
HD59# HDSTBP3# HDSTBP3# 3 SMRCOMPP NC9 T14
HD#60 SMDDR_VREF TP_NC10
to
W3 HD60# HEDRDY# F6 T79 1 2 AF37 SMVREF0 NC10 A36 T19
HD#61 Y3 D4 HIT# 1 2 AD1 A37 TP_NC11
HD61# HHIT# HIT# 3 SMVREF1 NC11 T17
HD#62 Y6 D6 HITM# SMXSLEW AE27
HD62# HHITM# HITM# 3 SMXSLEWIN
HD#63 W2 B3 HLOCK# L72 BK2125HS121 AE28
HD63# HLOCK# HLOCK# 3 SMXSLEWOUT
B A11 C576 C577 SMYSLEW AF9 B
HPCREQ# T22 SMYSLEWIN
HXRCOMP C1 A7 HREQ#0 AF10
HXRCOMP HREQ0# HREQ#0 3 SMYSLEWOUT
HXSCOMP C2 D7 HREQ#1 0.1U 0.1U
HXSCOMP HREQ1# HREQ#1 3
HXSWING HREQ#2
p
HYRCOMP
D1 HXSWING HREQ2# B8 HREQ#2 3 It's point to point, 55ohm trace, ALVISO
T1 C7 HREQ#3
HYRCOMP HREQ3# HREQ#3 3 keep as short as possible.
HYSCOMP L1 A8 HREQ#4
HYSCOMP HREQ4# HREQ#4 3
HYSWING P1 A4 RS#0
HYSWING HRS0# RS#0 3
C5 RS#1
HRS1# RS#1 3
l. a
B4 RS#2 Note :
HRS2# RS#2 3
G8 HCPUSLP# R44 0
HCPUSLP# H_CPUSLP# 3,14 a). DREF_CLKN , DREF_CLKP
B5 HTRDY#
HTRDY# HTRDY# 3 C TEST modified EMI Display Clock Frequency at 96MHz ( CRT,SDVO and TVOUT)
should be populated b). DREF_SSCLKN , DREF_SSCLKP
ALVISO
to support Dothan B Display Clock Frequency (with SSC) at 96,100MHz ( LVDS)
stepping.
w
VCCP VCCP VCCP 1.8VSUS
w
R67 54.9 HXSCOMP
R59 R343 R64 24.9/F HXRCOMP R353

M_OCDCOMP0 80.6/F
A A
221/F 221/F M_OCDCOMP1
w
HXSWING HYSWING M_RCOMPN
R352 R351
VCCP 40.2/F 40.2/F M_RCOMPP
R303 C138 R344 C108
R340 54.9 HYSCOMP
100/F 0.1U 100/F 0.1U R354
R32 24.9/F HYRCOMP 80.6/F
Route as short
as possible.
5 4 3 2
5 4 3 2 1
U9F
m
T95 H24 SDVOCTRL_DATA EXP_COMPI D36 EXP_COMP R62 24.9/F
VCC3G_PCIE
06
MISC
T97 H25 SDVOCTRL_CLK EXP_ICOMPO D34
2 SRC_MCH# SRC_MCH# AB29
SRC_MCH GCLKN
2 SRC_MCH AC29 GCLKP EXP_RXN0 E30 5,8,12,13,16,32,36 +2.5V
o
EXP_RXN1 F34 8 VCC3G_PCIE
EXP_RXN2 G30 9,16,31,36 VCCP
12 TV_COMP TV_COMP TV_COMP_A A15 H34
TV_Y/G TV_Y/G_A TVDAC_A EXP_RXN3
12 TV_Y/G C16 TVDAC_B EXP_RXN4 J30
c
12 TV_C/R TV_C/R TV_C/R_A A17 K34
TVDAC_C EXP_RXN5
TV
R334 4.7K/F J18 L30
R88 150/F TV_REFSET EXP_RXN6
.
B15 TV_IRTNA EXP_RXN7 M34
D R86 150/F B16 N30 D
R87 150/F B17
TV_IRTNB
TV_IRTNC
EXP_RXN8
EXP_RXN9 P34 ALVISO POWER STRAP PIN define
EXP_RXN10 R30
T34
s
EXP_RXN11
C TEST Modified EXP_RXN12 U30
V34
CFG[2:0] : 001=FSB533
EXP_RXN13
EXP_RXN14 W30 101=FSB400
CRT_COM# R292 0 CDDCCLK E24 Y34
12 CDDCCLK
it c
CRT_BLUE R304 150/F
12 CDDCDATA
CDDCDATA E23
DDCCLK EXP_RXN15 other = Reserved
CRT_GREEN R291 150/F CRT_B_COM CRT_BLUE DDCDATA
12 CRT_B_COM E21 BLUE EXP_RXP0 D30
CRT_RED R290 150/F D21 E34
BLUE# EXP_RXP1
12 CRT_G_COM
CRT_G_COM CRT_GREEN C20 GREEN EXP_RXP2 F30 CFG[4:3] : Reserved
VGA
B20 GREEN# EXP_RXP3 G34
CRT_R_COM CRT_RED A19 H30
12 CRT_R_COM RED EXP_RXP4
CRT_COM# B19 J34
VSYNC_COM R279 39 VSYNC H21
RED# EXP_RXP5
K30
CFG5 : 0=DMI X 2
12 VSYNC_COM VSYNC EXP_RXP6
HSYNC_COM R280 39 HSYNC G21 L34 1=DMI X 4 ( Default )
PCI-EXPRESS GRAPHICS
a
12 HSYNC_COM HSYNC EXP_RXP7
R336 255/F REFSET J20 M30
REFSET EXP_RXP8
EXP_RXP9 N34
P30
EXP_RXP10
R34
CFG6 : 0=DDR2
EXP_RXP11
R306 100K EXP_RXP12 T30 1=DDR ( Default )
EXP_RXP13 U34
R315 100K E25 V30
m
LBKLT_CTRL EXP_RXP14
13 BLON F25 W34
R314 2.2K C23
LBKLT_EN EXP_RXP15 CFG7 : 0=Reserved
+2.5V T78 LCTLA_CLK
5 CFG16 CFG16 R309 2.2K C22 E32 1=Dothan ( Default )
T83 LCTLB_DATA EXP_TXN0
13 LDDC_CLK F23 LDDC_CLK EXP_TXN1 F36
e
C 13 LDDC_DATA F22 LDDC_DATA EXP_TXN2 G32 C
LVDS
R333 13 DISP_ON F26 H36
R307 1.5K/F C33
LVDD_EN EXP_TXN3
J32 CFG8 : Reserved
*2.2K LIBG EXP_TXN4
T86 C31 LVBG EXP_TXN5 K36
T90 F28 LVREFH EXP_TXN6 L32
h
T88 F27 LVREFL EXP_TXN7 M36 CFG9 : 0=Reserve Lanes (15->0, 14->1 etc)
EXP_TXN8 N32
13 TXLCLKOUT-
TLCO-_1 B30 LACLKN EXP_TXN9 P36 1=Normal Operation ( Default )
Low=FSB Dynamic ODT Disabled TLCO+_1 B29 R32
13 TXLCLKOUT+ LACLKP EXP_TXN10
c
High=FSB Dynamic ODT Enabled TUCO-_1 C25 T36
13 TXUCLKOUT- LBCLKN EXP_TXN11
13 TXUCLKOUT+
TUCO+_1 C24 LBCLKP EXP_TXN12 U32 CFG[11:10] : Reserved
EXP_TXN13 V36
13 TXLOUT0- TLO0-_1 B34 W32
+2.5V LADATAN0 EXP_TXN14
s
TLO1-_1 B33 Y36
13 TXLOUT1-
TLO2-_1 B32
LADATAN1 EXP_TXN15 CFG[13:12] : 00=Reserved
13 TXLOUT2- LADATAN2
EXP_TXP0 D32 01=XOR Mode Enabled
-
13 TXLOUT0+ TLO0+_1 A34 E36
R275 TLO1+_1 LADATAP0 EXP_TXP1 10=All Z Mode Enabled
13 TXLOUT1+ A33 LADATAP1 EXP_TXP2 F32
13 TXLOUT2+ TLO2+_1 B31 G36
*1K LADATAP2 EXP_TXP3
H32
11=Normal Operation ( Default )
TUO0-_1 EXP_TXP4
13 TXUOUT0- C29 J36
p
CFG19 TUO1-_1 LBDATAN0 EXP_TXP5
5 CFG19 13 TXUOUT1- D28 LBDATAN1 EXP_TXP6 K32
13 TXUOUT2- TUO2-_1 C27 LBDATAN2 EXP_TXP7 L36 CFG[15:14] : Reserved
EXP_TXP8 M32
Low=CPU VTT 1.05V 13 TXUOUT0+ TUO0+_1 C28 N36
TUO1+_1 LBDATAP0 EXP_TXP9
to
High=CPU VTT 1.2V 13 TXUOUT1+ D27 LBDATAP1 EXP_TXP10 P32 CFG16 : 0=Dynamic ODT Disabled
13 TXUOUT2+ TUO2+_1 C26 R36
LBDATAP2 EXP_TXP11
EXP_TXP12 T32 1=Dynamic ODT Enabled ( Default )
EXP_TXP13 U36
B
EXP_TXP14 V32 B
EXP_TXP15 W36 CFG17 : Reserved
p
ALVISO
CFG18 : 0=1.05V ( Default )
1=1.5V
l. a
5 CFG12 CFG12
5 CFG5 5 CFG9 CFG9 5 CFG13 CFG13 5 CFG6 CFG6
CFG19 : 0 =1.05V ( Default )
R323 R300 R328 R313 R308 1=1.2V ( Reserved )
*2.2K
*2.2K *2.2K *2.2K 2.2K
resistor no stuff CFG 20 : Reserved
w
Low=DMIx2 PCI-E Graphics Lane 00 : Reserved Low=DDR II
SDVOCRTL_DATA :0=No SDVO device present (Default)
High=DMIx4 Low = Reverse Lane 01 : XOR Mode Enabled High=DDR 1=SDVO device present
High = Normal Operation 10 : All Z Mode Enabled
11 : Normal Operation
+2.5V
w
5 CFG7 CFG7
5 CFG11 CFG11 5 CFG3 CFG3
R299
R276 R298 R321
A A
*2.2K
*1K *2.2K *2.2K
w
5 CFG18 CFG18
Low=Reserved
High=Dothan Low=CPU core VCC 1.05V Low=FSB533 Low=DDR533
High=CPU core VCC 1.5V
5 4 3 2
5 4 3 2 1
07
o m
. c
D D
R_B_MD[0..63]
s
10 R_B_MD[0..63] U9G
R_B_MD0 AE31 AJ15 R_B_BS0#
SBDQ0 SB_BS0# R_B_BS0# 10,11
R_B_MD1 AE32 AG17 R_B_BS1#
SBDQ1 SB_BS1# R_B_BS1# 10,11
R_B_MD2 AG32 AG21 R_B_BS2#
R_B_BS2# 10,11
it c
R_B_MD3 SBDQ2 SB_BS2# R_B_DM[0..7]
AG36 SBDQ3 R_B_DM[0..7] 10
R_B_MD4 AE34 AF32 R_B_DM0
R_B_MD5 SBDQ4 SB_DM0 R_B_DM1
AE33 SBDQ5 SB_DM1 AK34
R_B_MD6 AF31 AK27 R_B_DM2
R_A_MD[0..63] R_B_MD7 SBDQ6 SB_DM2 R_B_DM3
10 R_A_MD[0..63] U9B AF30 SBDQ7 SB_DM3 AK24
R_B_MD8 AH33 AJ10 R_B_DM4
R_A_MD0 R_A_BS0# R_B_MD9 SBDQ8 SB_DM4 R_B_DM5
AG35 SADQ0 SA_BS0# AK15 R_A_BS0# 10,11 AH32 SBDQ9 SB_DM5 AK5
R_A_MD1 AH35 AK16 R_A_BS1# R_B_MD10 AK31 AE7 R_B_DM6
SADQ1 SA_BS1# R_A_BS1# 10,11 SBDQ10 SB_DM6
R_A_MD2 AL35 AL21 R_A_BS2# R_B_MD11 AG30 AB7 R_B_DM7
a
SADQ2 SA_BS2# R_A_BS2# 10,11 SBDQ11 SB_DM7
R_A_MD3 AL37 R_A_DM[0..7] R_B_MD12 AG34 R_B_DQS[0..7]
SADQ3 R_A_DM[0..7] 10 SBDQ12 R_B_DQS[0..7] 10
R_A_MD4 AH36 AJ37 R_A_DM0 R_B_MD13 AG33 AF34 R_B_DQS0
R_A_MD5 SADQ4 SA_DM0 R_A_DM1 R_B_MD14 SBDQ13 SB_DQS0 R_B_DQS1
AJ35 SADQ5 SA_DM1 AP35 AH31 SBDQ14 SB_DQS1 AK32
R_A_MD6 AK37 AL29 R_A_DM2 R_B_MD15 AJ31 AJ28 R_B_DQS2
AL34 SADQ7 SA_DM3 AP24 AK30 SBDQ16 SB_DQS3 AK23
R_A_MD8 AM36 AP9 R_A_DM4 R_B_MD17 AJ30 AM10 R_B_DQS4
AN35 AP4 AH29 AH6
m
AP32 SADQ10 SA_DM6 AJ2 AH28 SBDQ19 SB_DQS6 AF8
R_A_MD11 AM31 AD3 R_A_DM7 R_B_MD20 AK29 AB4 R_B_DQS7
R_A_MD12 SADQ11 SA_DM7 R_A_DQS[0..7] R_B_MD21 SBDQ20 SB_DQS7 R_B_DQS#[0..7]
AM34 SADQ12 R_A_DQS[0..7] 10 AH30 SBDQ21 R_B_DQS#[0..7] 10
R_A_MD13 AM35 AK36 R_A_DQS0 R_B_MD22 AH27 AF35 R_B_DQS#0
SADQ13 SA_DQS0 SBDQ22 SB_DQS0#
e
R_A_MD14 AL32 AP33 R_A_DQS1 R_B_MD23 AG28 AK33 R_B_DQS#1
C
R_A_MD15 SADQ14 SA_DQS1 R_A_DQS2 R_B_MD24 SBDQ23 SB_DQS1# R_B_DQS#2 C
AM32 SADQ15 SA_DQS2 AN29 AF24 SBDQ24 SB_DQS2# AK28
R_A_MD16 AN31 AP23 R_A_DQS3 R_B_MD25 AG23 AJ23 R_B_DQS#3
R_A_MD17 SADQ16 SA_DQS3 R_A_DQS4 R_B_MD26 SBDQ25 SB_DQS3# R_B_DQS#4
AP31 SADQ17 SA_DQS4 AM8 AJ22 SBDQ26 SB_DQS4# AL10
DDR SYSTEM MEMORY B

R_A_MD18 AN28 AM4 R_A_DQS5 R_B_MD27 AK22 AH7 R_B_DQS#5
SADQ18 SA_DQS5 SBDQ27 SB_DQS5#
h
R_A_MD19 AP28 AJ1 R_A_DQS6 R_B_MD28 AH24 AF7 R_B_DQS#6
R_A_MD20 SADQ19 SA_DQS6 R_A_DQS7 R_B_MD29 SBDQ28 SB_DQS6# R_B_DQS#7
AL30 SADQ20 SA_DQS7 AE5 AH23 SBDQ29 SB_DQS7# AB5
R_A_MD21 AM30 R_A_DQS#[0..7] R_B_MD30 AG22 R_B_MA[0..13]
SADQ21 R_A_DQS#[0..7] 10 SBDQ30 R_B_MA[0..13] 10,11
R_A_MD22 AM28 AK35 R_A_DQS#0 R_B_MD31 AJ21 AH17 R_B_MA0
SADQ22 SA_DQS0# SBDQ31 SB_MA0
c
R_A_MD23 AL28 AP34 R_A_DQS#1 R_B_MD32 AG10 AK17 R_B_MA1
R_A_MD24 SADQ23 SA_DQS1# R_A_DQS#2 R_B_MD33 SBDQ32 SB_MA1 R_B_MA2
AP27 SADQ24 SA_DQS2# AN30 AG9 SBDQ33 SB_MA2 AH18
R_A_MD25 AM27 AN23 R_A_DQS#3 R_B_MD34 AG8 AJ18 R_B_MA3
AM23 AN8 AH8 AK18
DDR SYSTEM MEMORY A
s
R_A_MD27 AM22 AM5 R_A_DQS#5 R_B_MD36 AH11 AJ19 R_B_MA5
AL23 SADQ28 SA_DQS6# AH1 AH10 SBDQ37 SB_MA6 AK19
R_A_MD29 AM24 AE4 R_A_DQS#7 R_B_MD38 AJ9 AH19 R_B_MA7
-
R_A_MD30 AN22 R_A_MA[0..13] R_B_MD39 AK9 AJ20 R_B_MA8
SADQ30 R_A_MA[0..13] 10,11 SBDQ39 SB_MA8
R_A_MD31 AP22 AL17 R_A_MA0 R_B_MD40 AJ7 AH20 R_B_MA9
R_A_MD32 SADQ31 SA_MA0 R_A_MA1 R_B_MD41 SBDQ40 SB_MA9 R_B_MA10
AM9 SADQ32 SA_MA1 AP17 AK6 SBDQ41 SB_MA10 AJ16
R_A_MD33 AL9 AP18 R_A_MA2 R_B_MD42 AJ4 AG18 R_B_MA11
AL6 AM17 AH5 AG20
p
AP7 SADQ35 SA_MA4 AN18 AK8 SBDQ44 SB_MA13 AG15
R_A_MD36 AP11 AM18 R_A_MA5 R_B_MD45 AJ8
R_A_MD37 SADQ36 SA_MA5 R_A_MA6 R_B_MD46 SBDQ45 R_B_SCASA#
AP10 SADQ37 SA_MA6 AL19 AJ5 SBDQ46 SB_CAS# AH14 R_B_SCASA# 10,11
R_A_MD38 AL7 AP20 R_A_MA7 R_B_MD47 AK4 AK14 R_B_SRASA#
SADQ38 SA_MA7 SBDQ47 SB_RAS# R_B_SRASA# 10,11
R_A_MD39 R_A_MA8 R_B_MD48
to
AM7 SADQ39 SA_MA8 AM19 AG5 SBDQ48 SB_RCVENIN# AF15 T114
R_A_MD40 AN5 AL20 R_A_MA9 R_B_MD49 AG4 AF14
SADQ40 SA_MA9 SBDQ49 SB_RCVENOUT# T112
R_A_MD41 AN6 AM16 R_A_MA10 R_B_MD50 AD8 AH16 R_B_BMWEA#
SADQ41 SA_MA10 SBDQ50 SB_WE# R_B_BMWEA# 10,11
R_A_MD42 AN3 AN20 R_A_MA11 R_B_MD51 AD9
R_A_MD43 SADQ42 SA_MA11 R_A_MA12 R_B_MD52 SBDQ51
B AP3 SADQ43 SA_MA12 AM20 AH4 SBDQ52
B
R_A_MD44 AP6 AM15 R_A_MA13 R_B_MD53 AG6
R_A_MD45 SADQ44 SA_MA13 R_B_MD54 SBDQ53
AM6 SADQ45 AE8 SBDQ54
R_A_MD46 R_A_SCASA# R_B_MD55
p
AL4 SADQ46 SA_CAS# AN15 R_A_SCASA# 10,11 AD7 SBDQ55
R_A_MD47 AM3 AP16 R_A_SRASA# R_B_MD56 AC5
SADQ47 SA_RAS# R_A_SRASA# 10,11 SBDQ56
R_A_MD48 AK2 AF29 R_B_MD57 AB8
SADQ48 SA_RCVENIN# T106 SBDQ57
R_A_MD49 AK3 AF28 R_B_MD58 AB6
SADQ49 SA_RCVENOUT# T109 SBDQ58
R_A_MD50 AG2 AP15 R_A_BMWEA# R_B_MD59 AA8
SADQ50 SA_WE# R_A_BMWEA# 10,11 SBDQ59
l. a
R_A_MD51 AG1 R_B_MD60 AC8
R_A_MD52 SADQ51 R_B_MD61 SBDQ60
AL3 SADQ52 AC7 SBDQ61
R_A_MD53 AM2 R_B_MD62 AA4
R_A_MD54 SADQ53 R_B_MD63 SBDQ62
AH3 SADQ54 AA5 SBDQ63
R_A_MD55 AG3
R_A_MD56 SADQ55
AF3 SADQ56
R_A_MD57 AE3 ALVISO
R_A_MD58 SADQ57
AD6 SADQ58
R_A_MD59 AC4
R_A_MD60 SADQ59
AF2 SADQ60
w
R_A_MD61 AF1
R_A_MD62 SADQ61
AD4 SADQ62
R_A_MD63 AD5 SADQ63
ALVISO
w
A A
5 w 4 3 2
A
B
C
D
0.22U
G1
C128
VTT51 VCCP_GMCH_CAP4
M1
VCCP
VTT50
VCCA_3GPLL
VTT49 N1
2.2U
+2.5V
V1
C464
VTT48 VCCP_GMCH_CAP3
G37 VTT47 B2
VSSA_3GBG VCCP_GMCH_CAP2
0.1U
F37 M2
C480
VCCA_3GBG VTT46
C95
N2
0.22U
VTT45
Y27 VTT44 M3
VCCA_3GPLL2
0.1U
Y28 N3
C386
5
5
VCCA_3GPLL1 VTT43
Y29 VTT42 M4
VCCA_3GPLL0
10U
VCCA_3GPLL
N4
C477
C157
C475
VTT41
J37 VTT40 M5
VCC3G6
4.7U/10V
L37 N5
N37
VCC3G5 VTT39
A6 0.47U/10V
R348
VCC3G4 VTT38 VCCP_GMCH_CAP1
R37 VTT37 M6
VCC3G3
U37 VTT36 N6
VCC3G2
W37 M7
C158
0.47U
VCC3G1 VTT35
0.5/F
AE37 VTT34 N7
VCC3G_PCIE VCC3G0
VTT33 M8
AF18 N8
w
VCCP
VCCA_SM3 VTT32
+2.5V
AF19 VTT31 J9
VCCA_SM2
AP19 VTT30 L9
VCCA_SM1
AF20 M9
2
VCC_DDRDLL VCCA_SM0 VTT29

VTT28 N9
A27 P9
L65
VCCTX_LVDS2 VTT27
0.1U
A28 R9
C382
VCCTX_LVDS1 VTT26
D14
B28 U9
VCCP
BLM11A121S
VCCTX_LVDS0 VTT25
w
VTT24 W9
AE1 Y9
CH751H-40H
VCCSM64 VTT23
AM1 J10
C362
VCCSM63 VTT22
1 R89
+2.5V
AP8 VTT21 K10

VCCSM62
4.7U/10V
AB9 VTT20 M10
VCCSM61
AB10 VTT19 N10
+1.5V
+2.5V
VCCSM60
AB11 P10
L60
VCCSM59 VTT18
AC11 R10
w
VCCSM58 VTT17
10
AD11 VTT16 T10

VCCSM57
AE12 VTT15 U10
VCCSM56
AF12 VTT14 V10
VCCSM55
AG12 W10
V1.8_DDR_CAP4
V1.8_DDR_CAP3
V1.8_DDR_CAP6
L10
VCCSM54 VTT13
AH12 VTT12 K11
VCCSM53
AJ12 L11
4
4
VCCSM52 VTT11
AK12 VTT10 M11
VCCSM51
C85
0.1U
AL12 VTT9 N11
VCCSM50
AM12 P11
BLM11A121S
VCCSM49 VTT8
AN12 VTT7 R11
VCCSM48
AP12 T11
l. a
VCC3G_PCIE
VCCSM47 VTT6
VCC_DDRDLL
AE13 VTT5 U11
VCCSM46
C83
0.1U
AF13 VTT4 V11
VCCSM45
10U
0.1U
AG13 W11
C361
C408
BLM11A121S
VCCSM44 VTT3
AH13 K12
C96
+ C76
100U
VCCSM43 VTT2
10U
AJ13 VTT1 J13
VCCSM42
p
AK13 VTT0 K13
VCCSM41
C79
0.1U
0.1U
shorted internally.
AL13
C432
VCCSM40
Note: All VCCSM pins

0.022U
AM13 H20
C417
VCCSM39 VCC_SYNC
VCC_SYNC
AN13
VCCSM38
0.1U
AP13
C484
VCCSM37
10U
C100
AE14 VVSSA_CRTDAC G19
VCCSM36
AE15 VCCA_CRTDAC1 E19
VCCSM35
VCCA_CRTDAC
AE16 VCCA_CRTDAC0 F19

VCCSM34
AE17
to
VCCSM33
AE18 VCCA_MPLL AA2
VCCSM32
AE19 VCCA_HPLL AA1
VCCSM31
VCC3G_PCIE
AE20 C35
+ C75
220U
330uF
VCCSM30 VCCA_DPLLB
L8
L5
AE21 VCCA_DPLLA B23
VCCSM29
AE22 VCCH_MPLL0 AC1
VCCSM28
AE23 AC2
p
BLM11A121S
VCCSM27 VCCH_MPLL1
0.1U
AE24
C481
VCCSM26
10U
C80
VVSA_CRTDAC
AE25 K17
+ C121 BLM11A121S
VCCSM25 VCC48
AF25 K18
VCCA_MPLL
VCCSM24 VCC47
- AG25
VCCSM23 VCC46 T18
VCCA_DPLLA
VCCA_DPLLB
AH25 VCC45 V18

+1.5V
VCCSM22
AJ25 VCC44 W18
+1.5V
VCCSM21
470U
+ C485
AK25 K19
3
3
L66
VCC43
+1.5V
VCCSM20
AL25 U19
1.8VSUS
VCCSM19 VCC42
s
AM25 VCC41 V19
VCCSM18
10U
C77
0.1U
AN25 K20
C479
VCCSM17 VCC40
POWER
AP25 VCC39 T20

VCCSM16
AE26 VCC38 U20
VCCSM15
AF26 VCC37 W20
VCCSM14
1uH
c
AG26 VCC36 K21
VCCSM13
AH26 VCC35 K22
VCCSM12
C81
470U
+ C465
0.1U
AJ26 K23
L64
VCCSM11 VCC34
V1.8_DDR_CAP5 AK26VCCSM10 VCC33 K24
0.1U
J25
C379
AL26 VCCSM9 VCC32
0.1U
K25
C389
AM26VCCSM8 VCC31
h
H26
+2.5V VCC30
AN26VCCSM7
0.1U
K26
C487
AP26VCCSM6 VCC29
10U
H27
C141
VCC28
+1.5V
AC27VCCSM5
1uH
V1.8_DDR_CAP2
AD27VCCSM4 VCC27 J27
shorted internally.
AD28VCCSM3 VCC26 K27

470U
+ C421
Note: All VCCSM pins
L27
L62
AP29VCCSM2 VCC25
C82
0.1U
AH37VCCSM1 VCC24 M27

V1.8_DDR_CAP1 AM37VCCSM0 VCC23 N27
0.1U
P27
C380
C156
0.01U
VCC22
A21 VCCHV2 VCC21 R27
T27
+2.5V VCC20
B21 VCCHV1
B22 VCCHV0 VCC19 U27
+1.5V
0.1U
V27
C381
10uH
VCC18
A35 VCCA_LVDS VCC17 G28
470U
+ C160
H28
L11
VCC16
A25 VCCD_LVDS2 VCC15 J28
B25 VCCD_LVDS1 VCC14 K28
B26 VCCD_LVDS0 VCC13 L28
+1.5V
0.1U
M28
C482
VCC12
N28
2
2
H17 VCCDQ_TVDAC VCC11

a
D19 VCCD_TVDAC VCC10 P28

R28
10uH
VCC9
T28
+1.5V
G18 VSSA_TVBG VCC8

U28
C437
H18 VCCA_TVBG VCC7

10U
C88
0.022U
VCC6 V28
E18 J29
C402
VCCA_TVDACC1 VCC5
0.022U
F18 K29
VCCD_TVDAC
VCC4
+1.5V
VCCA_TVDACC0
VCCDQ_TVDAC
C18 M29
C438
VCCA_TVDACB1 VCC3
0.1U
0.022U
D18 N29
C365
VCCA_TVBG
VCCA_TVDACB0 VCC2
E17 R29
C388
L61
VCCA_TVDACA1 VCC1
0.1U
0.022U
F17 T29
C367
it c
L59
VCCA_TVDACA0 VCC0
C407
9,16,31,36
10,12,13,15,16,18,21,22,23,25,26,30,33,36,37
0.1U
0.022U
C366
U9H
+3V
0.1U
C401
L58
15,16,31,36,37 +1.5V
VCCP
ALVISO
s
0.1U
C420
C431
.
0.022U
BLM11A121S
0.1U
C478
BLM11A121S
D33
0.1U
C416
c
0.1U
C462
+1.5V
BLM11A121S
+1.5V
CH751H-40H
VCCA_TVDAC
1 2
0.1U
C454
+1.5V
o
10
R90
1
10U
+3V
C451
0
R278
10U
C446
VCCP
m
10U
C476
08
A
B
C
D
A
B
C
D
B36
VSSALVDS
B24 Y1
VSS135 VSS271
D24 D2
VSS134 VSS270
F24 G2
5
5
VSS133 VSS269
J24 J2
VSS132 VSS268
AG24 AL24
VSS131 VSS267
AJ24 AN24
VSS130 VSS266
E27 A26
VSS129 VSS265
L17 Y12 G27 E26
VCC_NCTF78 VSS_NCTF68 VSS128 VSS264
M17 AA12 W27 G26
N17 Y13 AA27 J26
P17 AA13 AB27 B27
T17 L14 AF27 L2
U17 M14 AG27 P2
V17 N14 AJ27 T2
w
W17 P14 AL27 V2
L18 R14 AN27 AD2
M18 T14 E28 AE2
N18 U14 W28 AH2
P18 V14 AA28 AL2
R18 W14 AB28 AN2
Y18 Y14 AC28 A3
w
L19 AA14 A29 C3
M19 AB14 D29 AA3
N19 L15 E29 AB3
P19 M15 F29 AC3
R19 N15 G29 AJ3
Y19 P15 H29 C4
L20 R15 L29 H4
M20 T15 P29 L4
w
N20 U15 U29 P4
P20 V15 V29 U4
R20 W15 W29 Y4
Y20 Y15 AA29 AF4
L21 AA15 AD29 AN4
M21 AB15 AG29 E5
4
4

N21 VCC_NCTF50 L16 AJ29 W5
VSS_NCTF40 VSS100 VSS236
P21 VCC_NCTF49 M16 AM29 AL5
T21 VCC_NCTF48 N16 C30 AP5
U21 VCC_NCTF47 P16 Y30 B6
V21 R16 J6
l. a
VCC_NCTF46 VSS_NCTF36
AA30VSS96
VSS232
W21 VCC_NCTF45 T16 AB30VSS95 L6
VSS_NCTF35 VSS231
L22 VCC_NCTF44 U16 AC30VSS94 P6
VSS_NCTF34 VSS230
M22 VCC_NCTF43 V16 AE30VSS93 T6
VSS_NCTF33 VSS229
N22 VCC_NCTF42 W16 AP30VSS92 AA6
VSS_NCTF32 VSS228
P22 VCC_NCTF41 Y16 D31 VSS91 AC6
VSS_NCTF31 VSS227
p
R22 VCC_NCTF40 AA16 E31 VSS90 AE6
VSS_NCTF30 VSS226
T22 VCC_NCTF39 AB16 F31 VSS89 AJ6
VSS_NCTF29 VSS225
U22 VCC_NCTF38 R17 G31 VSS88 G7
VSS_NCTF28 VSS224
V22 VCC_NCTF37 Y17 H31 VSS87 V7
VSS_NCTF27 VSS223
W22 VCC_NCTF36 AA17 J31 VSS86 AA7
VSS_NCTF26 VSS222
L23 VCC_NCTF35 AB17 K31 VSS85 AG7
VSS_NCTF25 VSS221
M23 VCC_NCTF34 AA18 L31 VSS84 AK7
VSS_NCTF24 VSS220
N23 VCC_NCTF33 AB18 M31 VSS83 AN7
VSS_NCTF23 VSS219
P23 AA19 C8
to
N31 VSS82
VSS218
R23 VCC_NCTF31 AB19 P31 VSS81 E8
VSS_NCTF21 VSS217
T23 VCC_NCTF30 AA20 R31 VSS80 L8
VSS_NCTF20 VSS216
NCTF
U23 VCC_NCTF29 AB20 T31 VSS79 P8
VSS_NCTF19 VSS215
V23 VCC_NCTF28 R21 U31 VSS78 Y8
VSS_NCTF18 VSS214
W23 VCC_NCTF27 Y21 V31 VSS77 AL8
VSS_NCTF17 VSS213
L24 AA21 A9
M24
N24
P24
R24
T24
U24
p
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
-
VCC_NCTF22
VCC_NCTF21
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
AB21
Y22
AA22
AB22
Y23
AA23
W31 VSS76
AD31VSS75
AG31VSS74
AL31 VSS73
A32 VSS72
C32 VSS71
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
H9
K9
T9
V9
AA9
AC9
VSS
Y32 VSS70
VSS206
V24 AB23 AE9
3
3
AA32VSS69
VSS205
W24 VCC_NCTF18 Y24 AB32VSS68 AH9
VSS_NCTF8 VSS204
s
L25 VCC_NCTF17 AA24 AC32VSS67 AN9
VSS_NCTF7 VSS203
M25 VCC_NCTF16 AB24 AD32VSS66 D10
VSS_NCTF6 VSS202
N25 VCC_NCTF15 Y25 AJ32 VSS65 L10
VSS_NCTF5 VSS201
P25 VCC_NCTF14 AA25 AN32VSS64 Y10
VSS_NCTF4 VSS200
R25 VCC_NCTF13 AB25 D33 VSS63 AA10
VSS_NCTF3 VSS199
c
T25 VCC_NCTF12 Y26 E33 VSS62 F11
VSS_NCTF2 VSS198
U25 VCC_NCTF11 AA26 F33 VSS61 H11
VSS_NCTF1 VSS197
V25 VCC_NCTF10 AB26 G33 VSS60 Y11
VSS_NCTF0 VSS196
W25 VCC_NCTF9 H33 VSS59 AA11
VSS195
L26 VCC_NCTF8 J33 VSS58 AF11
VSS194
M26 VCC_NCTF7 K33 VSS57 AG11
VSS193
h
N26 VCC_NCTF6 L33 VSS56 AJ11

VSS192
P26 VCC_NCTF5 M33 VSS55 AL11
VSS191
R26 VCC_NCTF4 VTT_NCTF17 L12 N33 VSS54 AN11
VSS190
T26 VCC_NCTF3 VTT_NCTF16 M12 P33 VSS53 B12
VSS189
U26 VCC_NCTF2 VTT_NCTF15 N12 R33 VSS52 D12
VSS188
V26 P12 J12
e
VCC_NCTF1 VTT_NCTF14 T33 VSS51

VSS187
W26 VCC_NCTF0 VTT_NCTF13 R12 U33 VSS50 A14
VSS186
T12 B14
VCCP VTT_NCTF12 V33 VSS49
VSS185
AB12VCCSM_NCTF31 VTT_NCTF11 U12 W33 VSS48 F14
VSS184
AC12VCCSM_NCTF30 VTT_NCTF10 V12 AD33VSS47 J14
VSS183
AD12VCCSM_NCTF29 VTT_NCTF9 W12 AF33 VSS46 K14
VSS182
AB13VCCSM_NCTF28 VTT_NCTF8 L13 AL33 VSS45 AG14
VSS181
AC13VCCSM_NCTF27 VTT_NCTF7 M13 C34 VSS44 AJ14
VSS180
AD13VCCSM_NCTF26 VTT_NCTF6 N13 AA34VSS43 AL14
VSS179
m
AC14VCCSM_NCTF25 VTT_NCTF5 P13 AB34VSS42 AN14

VSS178
AD14VCCSM_NCTF24 VTT_NCTF4 R13 AC34VSS41 C15
VSS177
AC15VCCSM_NCTF23 VTT_NCTF3 T13 AD34VSS40 K15
VSS176
AD15VCCSM_NCTF22 VTT_NCTF2 U13 AH34VSS39 A16
VSS175
AC16VCCSM_NCTF21 VTT_NCTF1 V13 AN34VSS38 D16
VSS174
W13 H16
2
2
AD16VCCSM_NCTF20 VTT_NCTF0 B35 VSS37

VSS173
a
K16
VCCP
AC17VCCSM_NCTF19 D35 VSS36

VSS172
AD17VCCSM_NCTF18 E35 VSS35 AL16
VSS171
AC18VCCSM_NCTF17 F35 VSS34 C17
VSS170
AD18VCCSM_NCTF16 G35 VSS33 G17
VSS169
AC19VCCSM_NCTF15 H35 VSS32 AF17
VSS168
AD19VCCSM_NCTF14 J35 VSS31 AJ17
VSS167
AC20VCCSM_NCTF13 K35 VSS30 AN17
VSS166
AD20VCCSM_NCTF12 L35 VSS29 A18
VSS165
AC21VCCSM_NCTF11 M35 VSS28 B18
VSS164
AD21VCCSM_NCTF10 N35 VSS27 U18
VSS163
AL18
it c
AC22VCCSM_NCTF9 P35 VSS26

VSS162
AD22VCCSM_NCTF8 R35 VSS25 C19
VSS161
AC23VCCSM_NCTF7 T35 VSS24 H19
VSS160
AD23VCCSM_NCTF6 U35 VSS23 J19
VSS159
AC24VCCSM_NCTF5 V35 VSS22 T19
VSS158
W19
s
AD24VCCSM_NCTF4 W35 VSS21

VSS157
AC25VCCSM_NCTF3 Y35 VSS20 AG19
VSS156
AD25VCCSM_NCTF2 AE35VSS19 AN19
VSS155
U9D
A20
.
AC26VCCSM_NCTF1 C36 VSS18

VSS154
D20
ALVISO
AD26VCCSM_NCTF0 AA36VSS17
VSS153
E20
1.8VSUS
AB36VSS16
VSS152
AC36VSS15 F20
VSS151
AD36VSS14 G20
VSS150
V20
c
AE36VSS13
VSS149
AF36 VSS12 AK20
VSS148
AJ36 VSS11 C21
VSS147
AL36 VSS10 F21
VSS146
AN36VSS9 AF21
VSS145
E37 VSS8 AN21
VSS144
A22
o
H37 VSS7
VSS143
K37 VSS6 D22
VSS142
E22
1
1
M37 VSS5
VSS141
P37 VSS4 J22
VSS140
T37 VSS3 AH22
VSS139
V37 VSS2 AL22
VSS138
Y37 VSS1 H23
VSS137
AG37VSS0 AF23
VSS136
m
U9E
ALVISO
09
A
B
C
D
1 2 3 4 5 6 7 8
R_A_DM[0..7] 7
R_A_MD[0..63] 7 R_B_DM[0..7] 7
10
m
R_A_DQS[0..7] 7 R_B_MD[0..63] 7
SMDDR_VREF SMDDR_VREF
R_A_DQS#[0..7] 7 R_B_DQS[0..7] 7
1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS
R_A_MA[0..13] 7,11 R_B_DQS#[0..7] 7
CN30 CN29 1.8VSUS
R_B_MA[0..13] 7,11
1 VREF VSS46 2 1 VREF VSS46 2
o
3 VSS47 4 R_A_MD4 3 VSS47 4 R_B_MD4 Place these Caps near So-Dimm1.
R_A_MD0 DQ4 R_A_MD5 R_B_MD7 DQ4 R_B_MD5
5 DQ0 DQ5 6 5 DQ0 DQ5 6
R_A_MD1 7 DQ1 8 R_B_MD1 7 DQ1 8
VSS15 R_A_DM0 VSS15 R_B_DM0 C16 C17 C19 C67 C18 C64
9 VSS37 DM0 10 9 VSS37 DM0 10
c
R_A_DQS#0 11 DQS#0 12 R_B_DQS#0 11 DQS#0 12
R_A_DQS0 VSS5 R_A_MD2 R_B_DQS0 VSS5 R_B_MD6 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U
13 DQS0 DQ6 14 13 DQS0 DQ6 14
R_A_MD7 R_B_MD3
.
15 VSS48 DQ7 16 15 VSS48 DQ7 16
A R_A_MD6 17 DQ2 18 R_B_MD0 17 DQ2 18 A
R_A_MD3 VSS16 R_A_MD12 R_B_MD2 VSS16 R_B_MD11
19 DQ3 DQ12 20 19 DQ3 DQ12 20
21 VSS38 22 R_A_MD9 21 VSS38 22 R_B_MD13 1.8VSUS
R_A_MD8 DQ13 R_B_MD12 DQ13
23 DQ8 24 23 DQ8 24 Place these Caps near So-Dimm1.
s
R_A_MD13 VSS17 R_A_DM1 R_B_MD9 VSS17 R_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
R_A_DQS#1 29 DQS#1 30 CLK_SDRAM0 R_B_DQS#1 29 DQS#1 30 CLK_SDRAM3
CK0 CLK_SDRAM0 5 CK0 CLK_SDRAM3 5
R_A_DQS1 31 DQS1 32 CLK_SDRAM0# R_B_DQS1 31 DQS1 32 CLK_SDRAM3# C51 C55 C46 C54
CLK_SDRAM0# 5 CLK_SDRAM3# 5
it c
CK0# CK0#
33 VSS39 VSS41 34 33 VSS39 VSS41 34
R_A_MD14 35 DQ10 36 R_A_MD11 R_B_MD8 35 DQ10 36 R_B_MD10 0.1U 0.1U 0.1U 0.1U
R_A_MD15 DQ14 R_A_MD10 R_B_MD14 DQ14 R_B_MD15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 40 SMDDR_VREF 39 VSS50 40
VSS54 VSS54
41 VSS18 VSS20 42 41 VSS18 VSS20 42
R_A_MD20 43 44 R_A_MD16 R_B_MD16 43 44 R_B_MD20 SMDDR_VREF +3V
R_A_MD17 DQ16 DQ20 R_A_MD21 R_B_MD17 DQ16 DQ20 R_B_MD21
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 48 C571 C572 C573 47 48
a
VSS1 VSS6 VSS1 VSS6
SDRAM SO-DIMM
SDRAM SO-DIMM
R_A_DQS#2 49 50 R_B_DQS#2 49 50
R_A_DQS2 DQS#2 NC3 R_A_DM2 0.1U 0.1U 0.1U R_B_DQS2 DQS#2 NC3 R_B_DM2 C49 C25 C40 C26
51 DQS2 DM2 52 51 DQS2 DM2 52
53 VSS19 VSS21 54 53 VSS19 VSS21 54
R_A_MD18 55 56 R_A_MD23 R_B_MD19 55 56 R_B_MD23 0.1U 2.2U 2.2U 0.1U
PC4800 DDR2
PC4800 DDR2
57 DQ19 DQ23 58 57 DQ19 DQ23 58
59 VSS22 VSS24 60 59 VSS22 VSS24 60
R_A_MD25 61 62 R_A_MD29 R_B_MD24 61 62 R_B_MD28
m
63 DQ25 DQ29 64 63 DQ25 DQ29 64
65 66 65 66
R_A_DM3 67
VSS23
DM3
VSS25
DQS#3 68 R_A_DQS#3 R_B_DM3 67
VSS23
DM3
VSS25
DQS#3 68 R_B_DQS#3 Place these Caps near So-Dimm1.
69 70 R_A_DQS3 R_B_DQS3
NC4 DQS3 C TEST 69 NC4 DQS3 70
No Vias Between the Trace of PIN to
e
(200P)
(200P)
71 VSS9 VSS10 72 71 VSS9 VSS10 72
B
R_A_MD26
R_A_MD30
73 DQ26 DQ30 74 R_A_MD27
R_A_MD31
modified EMI R_B_MD26
R_B_MD27
73 DQ26 DQ30 74 R_B_MD31
R_B_MD30
CAP. B
75 DQ27 DQ31 76 75 DQ27 DQ31 76

77 VSS4 VSS8 78 77 VSS4 VSS8 78
CKE0 79 80 CKE1 CKE2 79 80 CKE3
5,11 CKE0 CKE0 CKE1 CKE1 5,11 5,11 CKE2 CKE0 CKE1 CKE3 5,11
h
81 82 81 82 1.8VSUS
VDD7 VDD8 VDD7 VDD8
83 NC1 A15 84 83 NC1 A15 84
R_A_BS2# 85 86 R_B_BS2# 85 86 Place these Caps near So-Dimm2.
7,11 R_A_BS2# A16_BA2 A14 7,11 R_B_BS2# A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
c
R_A_MA12 89 90 R_A_MA11 R_B_MA12 89 90 R_B_MA11
R_A_MA9 A12 A11 R_A_MA7 R_B_MA9 A12 A11 R_B_MA7 C38 C63 C65 C68 C66 C47
91 A9 A7 92 91 A9 A7 92
A8 A6 A8 A6 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U
95 VDD5 VDD4 96 95 VDD5 VDD4 96
s
R_A_MA3 A5 A4 R_A_MA2 R_B_MA3 A5 A4 R_B_MA2
99 A3 A2 100 99 A3 A2 100
A1 A0 A1 A0
-
103 VDD10 VDD12 104 103 VDD10 VDD12 104
R_A_MA10 105 106 R_A_BS1# R_B_MA10 105 106 R_B_BS1# 1.8VSUS
A10/AP BA1 R_A_BS1# 7,11 A10/AP BA1 R_B_BS1# 7,11
R_A_BS0# 107 108 R_A_SRASA# R_B_BS0# 107 108 R_B_SRASA# Place these Caps near So-Dimm2.
7,11 R_A_BS0# BA0 RAS# R_A_SRASA# 7,11 7,11 R_B_BS0# BA0 RAS# R_B_SRASA# 7,11
R_A_BMWEA# 109 110 SM_CS0# R_B_BMWEA# 109 110 SM_CS2#
7,11 R_A_BMWEA# WE# S0# SM_CS0# 5,11 7,11 R_B_BMWEA# WE# S0# SM_CS2# 5,11
111 112 111 112
p
R_A_SCASA# VDD2 VDD1 M_ODT0 R_B_SCASA# VDD2 VDD1 M_ODT2
7,11 R_A_SCASA# 113 CAS# ODT0 114 M_ODT0 5,11 7,11 R_B_SCASA# 113 CAS# ODT0 114 M_ODT2 5,11
SM_CS1# 115 116 R_A_MA13 SM_CS3# 115 116 R_B_MA13 C52 C42 C53 C44
5,11 SM_CS1# S1# A13 5,11 SM_CS3# S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120 0.1U 0.1U 0.1U 0.1U
5,11 M_ODT1 ODT1 NC2 5,11 M_ODT3 ODT1 NC2
to
121 VSS11 VSS12 122 121 VSS11 VSS12 122
125 DQ33 DQ37 126 125 DQ33 DQ37 126
127 VSS26 VSS28 128 127 VSS26 VSS28 128
C R_A_DQS#4 129 130 R_A_DM4 R_B_DQS#4 129 130 R_B_DM4 SMDDR_VREF +3V C
R_A_DQS4 DQS#4 DM4 R_B_DQS4 DQS#4 DM4
131 DQS4 VSS42 132 131 DQS4 VSS42 132
133 134 R_A_MD38 133 134 R_B_MD38
R_A_MD34 VSS2 DQ38 R_A_MD39 R_B_MD35 VSS2 DQ38 R_B_MD39
p
135 DQ34 DQ39 136 135 DQ34 DQ39 136
R_A_MD35 137 138 R_B_MD34 137 138 C20 C50 C27 C39
DQ35 VSS55 R_A_MD45 DQ35 VSS55 R_B_MD44
139 VSS27 DQ44 140 139 VSS27 DQ44 140
R_A_MD40 141 142 R_A_MD44 R_B_MD41 141 142 R_B_MD45 0.1U 2.2U 2.2U 0.1U
R_A_MD41 DQ40 DQ45 R_B_MD40 DQ40 DQ45
143 DQ41 VSS43 144 143 DQ41 VSS43 144
l. a
145 146 R_A_DQS#5 145 146 R_B_DQS#5
R_A_DM5 VSS29 DQS#5 R_A_DQS5 R_B_DM5 VSS29 DQS#5 R_B_DQS5
147 DM5 DQS5 148 147 DM5 DQS5 148
149 VSS51 VSS56 150 149 VSS51 VSS56 150
R_A_MD42 153
DQ42
DQ43
DQ46
DQ47 154 R_A_MD47 R_B_MD43 153
DQ42
DQ43
DQ46
DQ47 154 R_B_MD46 Place these Caps near So-Dimm2.
155 156 155 156
R_A_MD48 157
VSS40
DQ48
VSS44
DQ52 158 R_A_MD52 R_B_MD48 157
VSS40
DQ48
VSS44
DQ52 158 R_B_MD52 No Vias Between the Trace of PIN to
R_A_MD49 159 DQ49 DQ53 160 R_A_MD53 R_B_MD49 159 DQ49 DQ53 160 R_B_MD53 CAP.
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 164 CLK_SDRAM1 163 164 CLK_SDRAM4
NCTEST CK1 CLK_SDRAM1 5 NCTEST CK1 CLK_SDRAM4 5
w
165 166 CLK_SDRAM1# 165 166 CLK_SDRAM4# CLK_SDRAM3 CLK_SDRAM4
VSS30 CK1# CLK_SDRAM1# 5 VSS30 CK1# CLK_SDRAM4# 5
R_A_DQS#6 167 168 R_B_DQS#6 167 168
R_A_DQS6 DQS#6 VSS45 R_A_DM6 R_B_DQS6 DQS#6 VSS45 R_B_DM6 C61 C62
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172
R_A_MD51 173 174 R_A_MD50 R_B_MD50 173 174 R_B_MD55 10P 10P
R_A_MD55 DQ50 DQ54 R_A_MD54 R_B_MD51 DQ50 DQ54 R_B_MD54 CLK_SDRAM3# CLK_SDRAM4#
175 DQ51 DQ55 176 175 DQ51 DQ55 176
w
177 VSS33 VSS35 178 177 VSS33 VSS35 178
R_A_MD60 179 180 R_A_MD61 R_B_MD61 179 180 R_B_MD60 CLK_SDRAM0 CLK_SDRAM1
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 184 183 184 C31 C30
R_A_DM7 VSS3 VSS7 R_A_DQS#7 R_B_DM7 VSS3 VSS7 R_B_DQS#7
D
185 DM7 DQS#7 186 185 DM7 DQS#7 186 D
187 188 R_A_DQS7 187 188 R_B_DQS7 10P 10P
R_A_MD58 VSS34 DQS7 R_B_MD58 VSS34 DQS7 CLK_SDRAM0# CLK_SDRAM1#
w
189 DQ58 VSS36 190 189 DQ58 VSS36 190
DQ59 DQ62 R_A_MD62 DQ59 DQ62 R_B_MD62
193 VSS14 DQ63 194 193 VSS14 DQ63 194
CGDAT_SMB 195 196 CGDAT_SMB 195 196
SDA VSS13 2 CGDAT_SMB SDA VSS13
CGCLK_SMB 197 198 R10 10K CGCLK_SMB 197 198 R13 10K
SCL SA0 2 CGCLK_SMB SCL SA0
+3V 199 200 R9 10K +3V 199 200 R12 10K
VDD(SPD) SA1 VDD(SPD) SA1
PC4800_DDR2_R_4H PC4800_DDR2_R_4H +3V
CLOCK 0,1 SMbus address A0
CLOCK 3,4 SMbus address A4
CKE 0,1 CKE 2,3
1 2 3 4 5 6
1 2 3 4 5 6 7 8
11
DDRII DUAL CHANNEL A,B.
o m
. c
A A
s
DDRII A CHANNEL SMDDR_VTERM 32,36
DDRII B CHANNEL
it c
R_A_MA[0..13] 7,10 R_B_MA[0..13] 7,10
SMDDR_VTERM
SMDDR_VTERM
C32 C28 C59 C45 C29 C33 C21 C22 C23 C24 C56 C36 C58
a
C70 C35 C34 C41 C57 C43 C73 C74 C37 C69 C71 C72 C48
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
m
M_ODT0 1 2 R_B_MA0 1 2
5,10 M_ODT0
e
SM_CS0# RP9 3 4 56X2 R_B_BS1# RP24 3 4 56X2
B 5,10 SM_CS0# 7,10 R_B_BS1# B
R_A_MA5 1 2 R_B_MA1 1 2
R_A_MA8 RP6 3 4 56X2 R_B_MA3 RP18 3 4 56X2
R_A_MA3 1 2 R_B_MA5 1 2
R_A_MA1 RP5 3 4 56X2 SMDDR_VTERM R_B_MA8 RP19 3 4 56X2 SMDDR_VTERM
h
R_A_MA11 1 2 R_B_MA4 1 2
CKE1 RP14 3 4 56X2 R_B_MA2 RP25 3 4 56X2
5,10 CKE1
R_A_MA10 1 2 R_B_MA9 1 2
c
R_A_BS0# RP4 3 4 56X2 R_B_MA12 RP20 3 4 56X2
7,10 R_A_BS0#
R_A_MA6 1 2 R_B_MA6 1 2
R_A_MA7 RP13 3 4 56X2 R_B_MA7 RP26 3 4 56X2
R_A_MA0 1 2 CKE2 1 2
5,10 CKE2
s
R_A_MA4 RP12 3 4 56X2 SMDDR_VTERM R_B_BS2# RP21 3 4 56X2 SMDDR_VTERM
7,10 R_B_BS2#
R_A_MA2 1 2 R_B_SRASA# 1 2
7,10 R_B_SRASA#
-
R_A_BS1# RP11 3 4 56X2 SM_CS2# RP23 3 4 56X2
7,10 R_A_BS1# 5,10 SM_CS2#
R_A_MA9 1 2 R_B_BMWEA# 1 2
7,10 R_B_BMWEA#
R_A_MA12 RP7 3 4 56X2 M_ODT3 RP15 3 4 56X2
5,10 M_ODT3
R_A_BMWEA# 1 2 R_B_MA10 1 2
7,10 R_A_BMWEA#
R_A_SCASA# RP3 3 4 56X2 SMDDR_VTERM R_B_BS0# RP17 3 4 56X2 SMDDR_VTERM
p
7,10 R_A_SCASA# 7,10 R_B_BS0#
to
C C
R_A_MA13 1 2
R_A_SRASA# RP10 3 4 56X2
7,10 R_A_SRASA#
M_ODT2
p
5,10 M_ODT2 1 2
R_B_MA13 RP22 3 4 56X2
R_B_SCASA# 1 2
7,10 R_B_SCASA#
SM_CS3# RP16 3 4 56X2
5,10 SM_CS3#
M_ODT1 1 2
5,10 M_ODT1
l. a
SM_CS1# RP2 56X2
C TEST modified EMI 5,10 SM_CS1#
R_B_MA11
3
1
4
2
CKE3 RP27 3 4 56X2
5,10 CKE3
CKE0 1 2
5,10 CKE0
R_A_BS2# RP8 3 4 56X2 SMDDR_VTERM
7,10 R_A_BS2#
SMDDR_VTERM
w
C524 C525 C526 C527 C528 C529 C530 C531 C532 C533
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
w
SMDDR_VTERM
D D
w
C534 C535 C536 C537 C538 C539 C540 C541 C542 C543
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
1 2 3 4 5 6
5 4 3 2 1
ESD PORTECTION CRT PORT CRTVDD_5V

+5V CRTVDD1
F2 L46
12
m
2 1 2 1 CRTVDD2
+5V D25 CH500H-40
U32 POLY_SWITCH_1.1A HI0805Q310R-00
C297 CN18
16
2 VCC IO4 6
CRT_VS_1 DDCCLK_1 *0.1U CRT_CONN
CRT_HS_1
1
3
IO1
IO2
IO3
GND
4
5
C TEST Modified
o
6
*DALC208SC6 VGA_RED L31 0 RED_PI L30 BK1608HS470 CRT_R_1 1 11 CRT_SENSE#
CRT_SENSE# 15
7
VGA_GEN L33 0 GEN_PI L32 BK1608HS470 CRT_G_1 2 12
8
VGA_BLU L35 0 BLU_PI L34 BK1608HS470 CRT_B_1 3 13 C300
c
9 180P
4 14
R158 R160 R161 C250 C253 C256 C246 C251 C254 C255 C252 C249 10
.
+5V 150/F 150/F 150/F *10P *10P *10P 5.6P 5.6P 5.6P T50 5 15
D D
5.6P 5.6P 5.6P
U30
2 6 CRT_B_1
17
CRT_R_1 VCC IO4 DDCDAT_1
1 IO1 IO3 4
CRT_G_1 3 5
s
IO2 GND
*DALC208SC6 +2.5V
+2.5V R162 2.2K

CRTVDD_5V
2
it c
R163
CDDCCLK 1 3
6 CDDCCLK
DDCCLK2 24
+5V CH2507S
Q13 2.2K
U5 DDCCLK2 L36 BK1608HM121 DDCCLK_1
2 6 TV_COMP
TV_Y/G VCC IO4 TV_C/R CRTVS_VGA R205 39 CRT_VS2 L45 BK1608HM121 CRT_VS_1
1 IO1 IO3 4
3 IO2 GND 5
CRTHS_VGA R206 39 CRT_HS2 L47 BK1608HM121 CRT_HS_1
*DALC208SC6
a
+2.5V DDCDAT2 L48 BK1608HM121 DDCDAT_1
+2.5V R207 2.2K
2
R208 DDCDAT2 24 C257 C296 C298 C299
CDDCDATA 1 3 *33P *33P *33P *33P

6 CDDCDATA
CH2507S 2.2K
m
Q18
CRTVDD_5V
CRT SWITCH TV-OUT
e
C C
SEL FUNCTION(COM) C TEST Modified

+5V
LOW IN_B0 +5V +3V
h
HIGH IN_B1 R154 10K 6 TV_Y/G TV_Y/G L4 TV_LUMA_1
C238
0.1U BLM18BD151SN1
CC0402 U27 R4 C10 V4
5 6 PR_INSERT#_D 2 1 PR_INSERT# 150/F 5.6P 5.6P
VCC SEL PR_INSERT# 26
D18 CH500H-40
c
VGA_RED 1 4 CRT_R_COM
IN_B1 COM CRT_R_COM 6
PR_RED-1 3 CN2
IN_B0 S-VIDEO
GND 2
5
+5V
s
NC7SB3157P6X TV_C/R L2 TV_CHROMA_1 6 4
5
6 TV_C/R 6 4
C240 BLM18BD151SN1
0.1U U28 R2 C9 V2
-
CC0402 5 6 150/F 5.6P 5.6P 9 8
VCC SEL 9 8
VGA_GEN 1 4 CRT_G_COM
IN_B1 COM CRT_G_COM 6
PR_GEN-1 3 IN_B0
GND 2 3 3 1
p
+5V
2
NC7SB3157P6X
2
+3V C239 L3
0.1U U29 TV_COMP TV_COMP_1
6 TV_COMP 1 2
CC0402 5 6
VCC SEL
to
BLM18BD151SN1
VGA_BLU 1 4 CRT_B_COM R3 V3
IN_B1 COM CRT_B_COM 6
R150 150/F C8 5.6P/VPORT-22
PR_BLU-1 3 5.6P
10K IN_B0
B GND 2 B
INTVGA_E NC7SB3157P6X
3
p
Q11
PR_INSERT#_D 2
+3V
CH2507S
+3V
C229
l. a
0.1U
1
INTVGA_E 1
U24
8
CC0402 To port - replicator C.R.T
1OE# VCC
HSYNC_COM 2 7
1A 2OE#
24 PR_HSYNC 3 2Y 1Y 6 CRTHS_VGA C TEST Modified

4 5 HSYNC_COM
GND 2A HSYNC_COM 6
SN74LVC2G125
w
PR_RED-1 L20 0 PR_RED-2 L19 BK1608HS470 PR_RED 24
PR_GEN-1 L18 0 PR_GEN-2 L17 BK1608HS470 PR_GRN 24
PR_BLU-1 L16 0 PR_BLU-2 L15 BK1608HS470 PR_BLU 24
+3V
R148 R142 R139 C226 C220 C210 C221 C212 C207 C209 C219 C225
w
+3V 150/F 150/F 150/F *10P *10P *10P 5.6P 5.6P 5.6P
C230 5.6P 5.6P 5.6P
0.1U
U25 CC0402
INTVGA_E 1 8
1OE# VCC
A A
VSYNC_COM 2 7
1A 2OE#
w
3 6 CRTVS_VGA
24 PR_VSYNC 2Y 1Y
4 5 VSYNC_COM
GND 2A VSYNC_COM 6
SN74LVC2G125
5 4 3 2
5 4 3 2 1
PANEL VCC CONTROL
m
LCD CONNECTOR
VIN_BLIGHT
o
+3V +5V
CN13
VADJ_1 +3V
E 1 2 E
LCDVCC LCDVCC
c
C205 U21 L14 FPBACK 3 4
0.1U HI0805Q310R-00 5 6
.
AAT4280_OUT EDID_DATA 7 8
6 IN OUT 1 9 10
EDID_CLK
11 12
1
4 IN GND 2 13 14
s
R137 C201
6 TXUCLKOUT+ 15 16 TXLCLKOUT+ 6
3 5 C206 0.01U
6 DISP_ON ON/OFF GND 6 TXUCLKOUT- 17 18 TXLCLKOUT- 6
0.1U 150
19 20
6 TXUOUT2+ 21 22 TXLOUT2+ 6
it c
AAT4280-1
2
6 TXUOUT2- 23 24 TXLOUT2- 6
R136
10K 25 26
31 32
37 38
a
D 39 40 D
LCDCON40P
m
BACKLIGHT CONTROL
e
2,3,8,10,12,14,15,16,18,21,22,23,25,26,30,33,35,36,37 +3V
h
14,22,23,32,33,34,36 3VPCU
5,6,8,12,16,32,36 +2.5V
c
C +3V C
+2.5V
s
+3V R227
+3V 3VPCU Q23 2.2K
2
CH2507S
-
LDDC_CLK 1 3 EDID_CLK
6 LDDC_CLK
R190 R188
p
10K 10K
D24 +2.5V R226
2 1 R189 1K 2.2K
MXLID# 22
2
to
CH500H-40
C287
+3V 0.1U LDDC_DATA 1 3 EDID_DATA
6 LDDC_DATA
B Q22 B
CH2507S
C288
p
0.1U COVERSW# HI0805Q310R-00
5
BLON 1 CN20 L13

6 BLON FPBACK VIN VIN_BLIGHT
4
1
2
l. a
2 C286
U37 1000P C170 C181
TC7SH08FU .1U/50V .1U/50V
3
LID CC0805 CC0805

Q17
3
DTC144EUA
FPBACK# 2 VADJ L51 BK1608HS121-T VADJ_1

15 FPBACK# 22 VADJ
w
1
w w 4 3 2
5 4 3 2 1
+3V 10,12,13,15,16,18,21,22,23,25,26,30,33,36,37
14
m
VCCP
VCCP 9,16,31,36
FERR# R242 56
o
R97 U13A H_DPSLP# R263 *56
10M
Y4 CLK_32KX1 Y1 P2 LAD0/FWH0 RCIN# R253 10K +3V
RTCX1 LAD0 LAD0/FWH0 22,30
CLK_32KX2 Y2 N3 LAD1/FWH1
RTCX2 LAD1/FB1 LAD1/FWH1 22,30
RTC
N5 LAD2/FWH2 GATEA20 R245 10K +3V
LAD2/FB2 LAD2/FWH2 22,30 VCCP
32.768KHZ RTCRST# AA2 N4 LAD3/FWH3
RTCRST# LAD3/FB3 LAD3/FWH3 22,30
C163 C159 PIORDY R259 4.7K
.
LDRQ0# N6 LPC_DRQ0# +3V
D 12P 12P R265 1M SM_INTRUDER# AA3 P4 D
LPC
VCCRTC INTRUDER# LDRQ1#/GPI41
AA5 P3 LFRAME#/FWH4
INTVRMEN LFRAME# LFRAME#/FWH4 22,30
R243
PCI Pullups
s
75
NMI AF25 AG25 CPUPWRGD
3 NMI NMI CPUPWRGD/GPO49 CPUPWRGD 3
A20M# AF23 AE22 +3V
3 A20M# A20M# INIT3_3V# T67
FERR# R241 56 AF24 AE23 THERMTRIP#_ICH R244 56 RP44
3 FERR# THRMTRIP# 3,5
it c
IGNNE# FERR# THRMTRIP# R118 0 FRAME#
AG26 AG27 6 5
3
3
IGNNE#
INTR
INTR
CPUINIT#
AG24
IGNNE#
INTR
CPU SMI#
STPCLK# AE26
H_CPUSLP#_R R117
STPCLK#
SMI# 3
STPCLK# 3
REQ0#
PIRQD#
7 4
AF27 AE27 *0 8 3
3 CPUINIT# INIT# CPUSLP# H_CPUSLP# 3,5
RCIN# AD23 AD27 H_DPSLP#_R R268 0 PIRQB# 9 2 REQ2#
VCCRTC 22 RCIN# RCIN# DPSLP#/TP[2] H_DPSLP# 3
GATEA20 AF22 AE24 H_DPRSTP#_R R240 0 +3V 10 1 PIRQA#
22 GATEA20 A20GATE DPRSTP#/TP[4] H_DPRSTP# 3
AD[0..31] 8.2KX8
25,26,28 AD[0..31]
AD0 E2 J6 C/BE0# DPRSTP# +3V
a
AD0 C/BE0# C/BE0# 25,26,28
D5 CH500H-40 C92 1U/16V AD1 E5 H6 C/BE1# RP46
VCCRTC AD2 AD1 C/BE1# C/BE2#
C/BE1# 25,26,28 1). Stuff for Dothan B1 Stepping. REQ5#
3VPCU 2 1 C2 AD2 C/BE2# G4 C/BE2# 25,26,28 6 5
AD3 F5 G2 C/BE3# 2). No stuff for Dothan A Stepping. REQ4# 7 4 IRQ14
AD3 C/BE3# C/BE3# 25,26,28
R26 AD4 F3 SERIRQ 8 3
AD4 15,22,28,30 SERIRQ DEVSEL# SERR#
D4 CH500H-40 20K AD5 E9 J3 FRAME# 9 2
RTCRST# AD5 FRAME# FRAME# 25,26,28 PERR#
2 1 1 2 AD6 F2 A3 IRDY# +3V 10 1
AD6 IRDY# IRDY# 25,26,28
AD7 D6 J2 TRDY#
m
AD7 TRDY# TRDY# 25,26,28
C97 AD8 E6 C3 DEVSEL# 8.2KX8
AD8 DEVSEL# DEVSEL# 25,26,28
1
1U/16V AD9 D3 J1 STOP#
AD9 STOP# STOP# 25,26,28
G2 AD10 A2 E1 PAR +3V
RTC AD11 D2
AD10
AD11
PCI PAR
SERR# G5
PAR
SERR#
25,26,28
25,26,28
RP28
e
SHORT_ PAD1 AD12 D5 E3 PERR# REQ3# 6 5
C AD12 PERR# PERR# 25,26,28 C
2 AD13 H3 C5 PLOCK# PIRQC# 7 4 REQ6#
5VPCU AD14 AD13 PLOCK# STOP# REQ1#
B4 AD14 8 3
AD15 J5 L5 REQ0# TRDY# 9 2 PLOCK#
AD15 REQ0# REQ0# 28
1 3 RTC_N01 R16 3K AD16 K2 AD16 REQ1# B5 REQ1#
REQ1# 25 +3V 10 1 IRDY#
h
AD17 K5 M5 REQ2#
AD17 REQ2# REQ2# 26
Q4 AD18 D4 B8 REQ3# 8.2KX8
AD18 REQ3#
1
MMBT3904 AD19 L6 F7 REQ4#

BT2 R15 AD20 AD19 REQ4#/GPI40 REQ5#
2
G3 AD20 REQ5#/GPI1 E8 T103
c
RTC-BAT C78 4.7K AD21 H4 B7 REQ6#
AD21 REQ6#/GPI0 T13 +3V
1000P AD22 H2
RTC_N02 AD23 AD22 GNT0# RP45
2
H5 AD23 GNT0# C1 GNT0# 28

AD24 B3 B6 GNT1# ICH_GPIO5 7 8
AD24 GNT1# GNT1# 25
s
AD25 M6 F1 GNT2# PIRQE# 5 6
AD25 GNT2# GNT2# 26
AD26 B2 C8 GNT3# ICH_GPIO3 3 4
AD26 GNT3# T11
R14 AD27 K6 E7 GNT4# ICH_GPIO4 1 2
AD27 GNT4#/GPO48 T101
-
15K AD28 K3 F6 GNT5#
AD29 A5 D8 GNT6# 8P4R-8.2K
AD30 L1
AD31 AD30 PIRQA#
K4 AD31 PIRQA# N2 PIRQA# 28
L2 PIRQB# Distance between the ICH-6 M and cap on the "P"
p
PIRQB# PIRQB# 25,28
M1 PIRQC#
PIRQC# PIRQC# 25,28 signal should be identical distance between the
P6 L3 PIRQD#
25,26,28 ICH_PME# PME# PIRQD# PIRQD# 26
G6 D9 PIRQE#
2 PCLK_ICH
PCIRST# PCICLK PIRQE#/GPI2 ICH_GPIO3
T96 ICH-6 M and cap on the "N" signal for same pair.
22,26 PCIRST# R2 PCIRST# PIRQF#/GPI3 C7
PLTRST#_1 ICH_GPIO4 C491 3900P
to
R5 PLTRST# PIRQG#/GPI4 C6
CLKRUN# AF19 M3 ICH_GPIO5 SATA_RXN0_C SATA_RXN0
22,25,26,28,30 CLKRUN# CLKRUN#/GPIO32 PIRQH#/GPI5 SATA_RXN0 18
+3V R255 8.2K C492 3900P

B SATA_RXP0_C SATA_RXP0 B
SATA_RXP0 18
PDD0 AD14 AC19 SATA_LED#
DD0 SATALED# SATA_LED# 23
PDD1 AF15 C335 3900P
+3VSUS PDD2 DD1 SATA_RXN0_C SATA_TXN0_C SATA_TXN0
p
AF14 AE3
NS,VGA,SIO Reset C93 0.047U
PDD3
PDD4
AD12
AE14
DD2
DD3
SATA0_RXN
SATA0_RXP AD3
AG2
SATA_RXP0_C
SATA_TXN0_C C337 3900P
SATA_TXN0 18
PDD5 DD4 SATA0_TXN SATA_TXP0_C SATA_TXP0_C SATA_TXP0

AC11 DD5 SATA0_TXP AF2 SATA_TXP0 18
IDE
PDD6 AD11 DD6

5
l. a
U7 PDD7 AB11 AD7
PDD8 DD7 SATA2_RXN
2 AE13 DD8 SATA2_RXP AC7
PLTRST# 4 PDD9 AF13 AF6
SATA
5,15,30,37 PLTRST# DD9 SATA2_TXN
1 PLTRST#_1 PDD10 AB12 AG6
PDD11 DD10 SATA2_TXP
AB13 DD11
7SZ32 PDD12 AC13 AC2 SRC_SATA#
DD12 SATA_CLKN SRC_SATA# 2
PDD13 AE15 AC1 SRC_SATA
DD13 SATA_CLKP SRC_SATA 2
PDD14 AG15
PDD15 DD14
PDD[0..15]
AD13 DD15 SATARBIAS# AG11
SATABIAS R261 24.9/F
Place within 500mils
18 PDD[0..15] SATARBIAS AF11
of ICH6 ball
w
PDCS1# AD16
18 PDCS1# DCS1#
PDCS3# AE17 R30 *1K
18 PDCS3# DCS3# +3V
PDA0 AC16
18 PDA0 DA0
PDA1 AB17 C10 R197 33
18 PDA1 DA1 ACZ_BIT_CLK AC_BITCLK 19
PDA2 AC17 B9 R29 33
IDE Reset 18
18
PDA2
PDIOR#
PDIOR# AE16
DA2
DIOR#
ACZ_SYNC
ACZ_RST# A10 R28 33
AC_SYNC 19
AC_RESET# 19
w
PDIOW# AC14
18 PDIOW# DIOW#
AC-97/
AZALIA
PIORDY AF16 F11 R27 33

+3V 18 PIORDY IORDY ACZ_SDIN0 AC_SDIN0 19
IRQ14 AB16 F10 AC_SDIN1
18 IRQ14 IDEIRQ ACZ_SDIN1 T91
PDDREQ AB14 B10 AC_SDIN2
18 PDDREQ DDREQ ACZ_SDIN2 T12
C94 0.1U PDDACK# AB15 C9 AC_SDOUT
A 18 PDDACK# DDACK# ACZ_SDO AC_SDOUT 19 A
5
w
1
4 IDERST#_R R18 33 ICH6-M
IDERST# 18
PLTRST# 2
U8
TC7SH08FU
3
R21 *0
5 4 3 2
5 4 3 2 1
15
o m
+3VSUS
U13B
USBP5+ D21 B20 USBP2+

17 USBP5+ USBP0P USBP1P USBP2+ 24
c
USBP5- C21 A20 USBP2-
17 USBP5- USBP0N USBP1N USBP2- 24
OC0# C27 B27 OC1# R37
USBP4+ OC0# OC1# USBP6+
.
17 USBP4+ C19 USBP2P USBP3P B18 USBP6+ 17
D USBP4- D19 A18 USBP6- 10K D
17 USBP4-
OC2# B26
USBP2N
OC2#
USB USBP3N
OC3# C26 OC3#
USBP6- 17
OC3#
USBP3+ D17 A16 USBP1+
37 USBP3+ USBP4P USBP5P USBP1+ 24
USBP3- E17 B16 USBP1- OC2#
s
OC4# C23 D23 OC5# OC1#
USBP0+ OC4#/GPI9 OC5#/GPI10 USBP7+ OC0#
17 USBP0+ D15 USBP6P USBP7P B14 USBP7+ 37
USBP0- C15 A14 USBP7-
OC6# C25 C24 OC7#
it c
OC6#/GPI14 OC7#/GPI15
USBRBIAS B22
USBRBIAS R342 22.6/F RP29
2 CLK48_USB A27 CLK48 USBRBIAS# A22
Place within 500mils of ICH-6 OC6# 2 1 +3VSUS
DMI_RXN0 T25 Y25 DMI_RXN2 OC7# 4 3
5 DMI_RXN0 DMI0_RXN DMI2_RXN DMI_RXN2 5
DMI_RXP0 T24 Y24 DMI_RXP2 OC5# 6 5
5 DMI_RXP0 DMI0_RXP DMI2_RXP DMI_RXP2 5
DMI_TXN0 R27 W27 DMI_TXN2 OC4# 8 7
5
5
DMI_TXN0
DMI_TXP0
DMI_TXP0 R26
DMI0_TXN
DMI0_TXP
DMI DMI2_TXN
DMI2_TXP W26 DMI_TXP2
DMI_TXN2 5
DMI_TXP2 5
10KX4
DMI_RXN1 V25 AB24 DMI_RXN3
a
5 DMI_RXN1 DMI1_RXN DMI3_RXN DMI_RXN3 5
DMI_RXP1 V24 AB23 DMI_RXP3
5 DMI_RXP1 DMI1_RXP DMI3_RXP DMI_RXP3 5
DMI_TXN1 U27 AA27 DMI_TXN3
5 DMI_TXN1 DMI1_TXN DMI3_TXN DMI_TXN3 5
DMI_TXP1 U26 AA26 DMI_TXP3
5 DMI_TXP1 DMI1_TXP DMI3_TXP DMI_TXP3 5
2 SRC_ICH# SRC_ICH# AD25 F24

SRC_ICH DMI_CLKN DMI_ZCOMP DMI_ZCOMP R320 24.9/F
2 SRC_ICH AC25 DMI_CLKP DMI_IRCOMP F23 +1.5V Place within 500mils of ICH-6
m
PCIE_RXN0 H25 M25
37 PCIE_RXN0 HSIN0 HSIN2
PCIE_RXP0 H24 M24
37 PCIE_RXP0
37 PCIE_TXN0
PCIE_TXN0C142 *0.1U PCIE_TXN0_R G27
HSIP0
HSON0
PCI-EXPRESS HSIP2
HSON2 L27
PCIE_TXP0 C143 *0.1U PCIE_TXP0_R G26 L26
37 PCIE_TXP0 HSOP0 HSOP2
e
C B TEST Modified T89 K25 HSIN1 HSIN3 P24
C
T87 K24 HSIP1 HSIP3 P23

T16 J27 HSON1 HSON3 N27
T15 J26 HSOP1 HSOP3 N26
h
PCLK_SMB Y4 W4 SMLINK0
2,37 PCLK_SMB SMBCLK SMLINK0
PDAT_SMB W5 U6 SMLINK1
+3V
2,37 PDAT_SMB SMBALERT# W6
SMBDATA SM&SMI
SMBALERT#/GPI11
SMLINK1
LINKALERET# Y5 SMB_LINK_ALERT#
c
R254 10K DASP_ON RI# T2 T4 SUSB#
RI# SLP_S3# SUSB# 22
THRM# AC20 T5 SUSC# PCIE_WAKE# R274 680 3V_S5
THRM# SLP_S4# SUSC# 22
s
22 PWROK PWROK AA1 T6
PWROK SLP_S5# T74
DPRSLPVR AE20 V5 PLTRST#
35
22
DPRSLPVR
BATLOW# BATLOW# V2
DPRSLPVR/TP1
BATLOW#/TP0
PM LAN_RST#
SYS_RESET# U2 DBR#
PLTRST# 5,14,37
DBR# 3 MCH_SYNC# R252 10K
+3V
-
R271 10K PWROK 22 DNBSWON# DNBSWON# U1 U5 PCIE_WAKE#
PWRBTN# WAKE# PCIE_WAKE# 37
R272 10K RSMRST# RSMRST# Y3 AG21 MCH_SYNC#
22 RSMRST# RSMRST# MCH_SYNC# T65
IMVP_PWG AF21
5,35 IMVP_PWG VRMPWRGD
5 PM_BMBUSY# PM_BMBUSY# AD19 AC21 STP_PCI#
BM_BUSY#/GPIO6 STP_PCI#/GPO18 STP_PCI# 2
22,30 SUS_STAT# SUS_STAT# W3 AD22 STP_CPU# +3V
p
SUS_STAT#/LPCPD# STP_CPU#/GPO20 STP_CPU# 2,35 RP40
SUSCLK V6 AB20 SERIRQ
+3V T72 SUSCLK SERIRQ SERIRQ 14,22,28,30
SATA3GP 2 1
E10 P5 SM_EN# SATA2GP 4 3
2 14M_ICH CLK14 GPIO25 T76
PCSPK F8 AF17 SATA0GP SATA1GP 6 5
19 PCSPK SPKR SATA0GP/GPIO26
R246 8.2K THRM# CRT_SENSE# FPBACK# SATA0GP
to
12 CRT_SENSE# AE19 GPI7 GPIO27 R3 FPBACK# 13 8 7
KBSMI# R1 T3
R247 10K CRT_SENSE#
22
22
KBSMI#
SCI# SCI# M2
GPI8
GPI12
MISC&GPIO GPIO28
SATA1GP/GPIO29 AE18 SATA1GP 10KX4
22 SWI# SWI# R6 AF18 SATA2GP T73
GPI13 SATA2GP/GPIO30 SATA3GP
B AB21 GPO19 SATA3GP/GPIO31 AG18 B
3V_S5 AD20 GPO21 DASP_ON
D13 AD21 AF20 DASP_ON 18
RP43 HW_RADIO_DIS# GPO23 GPIO33
p
37 HW_RADIO_DIS# 2 1 V3 GPIO24 GPIO34 AC18 T69
7 8 SCI#
5 6 SWI# CH500H-40
3 4 SMLINK1 E12
PDAT_SMB LAN_RXD0
1 2 D12 EE_CS LAN_RXD1 E11
l. a
R80 B12 C13
8P4R-10K 1K D11
EE_SHCLK
EE_DOUT
LAN LAN_RXD2
LAN_TXD0 C12
F13 EE_DIN LAN_TXD1 C11
RP42 +3V E13
KBSMI# LAN_TXD2
7 8
5 6 RI# F12
DBR# LAN_CLK
3 4
1 2 BATLOW# B TEST Modified LAN_RSTSYNC B11
AC5 RSVD1 RSVD6 AD9

8P4R-10K AD5 AF8
RSVD2 RESERVED RSVD7
w
AF4 RSVD3 RSVD8 AG8
RP41 AG4 U3
SMBALERT# RSVD4 RSVD9
7 8 AC9 RSVD5
5 6 SMB_LINK_ALERT#
3 4 SMLINK0 ICH6-M
1 2 PCLK_SMB
w
8P4R-10K 3V_S5 3V_S5 3V_S5
R273 10K SUS_STAT#
A A
R111
*10K
w
5
U16A U16B
1 6 3 4 RSMRST#
C167 *NC7WZ14P6X *NC7WZ14P6X

*0.1U
5 4 3 2
5 4 3 2 1
16
m
U13C U13D
o
+1.5V AA22 VCC1_5_1 VCC1_5_79 AA19 +1.5V A1 VSS001 VSS087 G1
AA23 VCC1_5_2 VCC1_5_80 AA20 A12 VSS002 VSS088 G12
c
+ C164 C359 C385 C415 AA24 AA21 C435 C340 C403 C345 C363 C124 C328 A15 G21
VCC1_5_3 VCC1_5_81 VSS003 VSS089
AA25 VCC1_5_4 VCC1_5_82 L11 A19 VSS004 VSS090 G7
220U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.01U 10U 10U
.
AB25 VCC1_5_5 VCC1_5_83 L12 A21 VSS005 VSS091 G9
D AB26 VCC1_5_6 VCC1_5_84 L14 A23 VSS006 VSS092 H23 D
AB27 VCC1_5_7 VCC1_5_85 L16 A26 VSS007 VSS093 H26
F25 VCC1_5_8 VCC1_5_86 L17 A4 VSS008 VSS094 H27
F26 M11 A7 J23
s
VCC1_5_9 VCC1_5_87 VSS009 VSS095
F27 VCC1_5_10 VCC1_5_88 M17 A9 VSS010 VSS096 J24
G22 VCC1_5_11 VCC1_5_89 P11 AA11 VSS011 VSS097 J25
+5V R31 10 G23 P17 AA13 J4
VCC1_5_12 VCC1_5_90 VSS012 VSS098
G24 T11 AA16 K1
it c
VCC1_5_13 VCC1_5_91 VSS013 VSS099
G25 T17 AA4 K23
D8
V5REF
H21
VCC1_5_14
VCC1_5_15
VCC VCC1_5_92
VCC1_5_93 U11 AB1
VSS014
VSS015
VSS100
VSS101 K26
+3V 2 1 H22 VCC1_5_16 VCC1_5_94 U12 AB10 VSS016 VSS102 K27
J21 VCC1_5_17 VCC1_5_95 U14 AB19 VSS017 VSS103 K7
CH751H-40H C99 C354 J22 U16 AB2 L13
VCC1_5_18 VCC1_5_96 VSS018 VSS104
K21 VCC1_5_19 VCC1_5_97 U17 AB7 VSS019 VSS105 L15
1U 0.1U K22 F9 AB9 L23
VCC1_5_20 VCC1_5_98 VSS020 VSS106
L21
L22
VCC1_5_21
A6
+3V +3_3V_PCI AC10
AC12
VSS021 VSS107 L24
L25
a
VCC1_5_22 VCC3_3_2 C374 C384 C434 C329 VSS022 VSS108
M21 VCC1_5_23 VCC3_3_3 B1 AC22 VSS023 VSS109 M12
M22 VCC1_5_24 VCC3_3_4 E4 AC23 VSS024 VSS110 M13
N21 H1 0.1U 0.1U 0.1U 1U AC24 M14
N22
VCC1_5_25
VCC1_5_26
VCC3_3_5
VCC3_3_6 H7 AC26
VSS025
VSS026
GND VSS111
VSS112 M15
N23 VCC1_5_27 VCC3_3_7 J7 AC3 VSS027 VSS113 M16
N24 VCC1_5_28 VCC3_3_8 L4 AC6 VSS028 VSS114 M23
N25 L7 AD1 M26
m
R25 10 VCC1_5_29 VCC3_3_9 VSS029 VSS115
5V_S5 P21 VCC1_5_30 VCC3_3_10 M7 AD10 VSS030 VSS116 M27
P25 VCC1_5_31 VCC3_3_11 P1 AD15 VSS031 VSS117 M4
P26 VCC1_5_32 AD18 VSS032 VSS118 N1
D7 P27 VCC1_5_33 VCC3_3_12 AA12 +3V +3_3V_ICH AD2 VSS033 VSS119 N11
e
3V_S5 2 1 V5REF_SUS R21 AA14 AD24 N12
C VCC1_5_34 VCC3_3_13 C413 C355 C330 VSS034 VSS120 C
R22 VCC1_5_35 VCC3_3_14 AA15 AD6 VSS035 VSS121 N13
CH751H-40H C98 C422 T21 AA17 AE10 N14
VCC1_5_36 VCC3_3_15 0.1U 0.1U 1U VSS036 VSS122
T22 VCC1_5_37 VCC3_3_16 AC15 AE11 VSS037 VSS123 N15
1U 0.1U U21 AD17 AE12 N16
VCC1_5_38 VCC3_3_17 VSS038 VSS124
h
U22 VCC1_5_39 VCC3_3_18 AG13 AE2 VSS039 VSS125 N17
V21 VCC1_5_40 VCC3_3_19 AG16 AE21 VSS040 VSS126 N7
V22 VCC1_5_41 VCC3_3_20 AG19 1.5V_S5 AE25 VSS041 VSS127 P12
W21 VCC1_5_42 VCC3_3_21 AA10 AE6 VSS042 VSS128 P13
c
W22 C412 AE7 P14
VCC1_5_43 VSS043 VSS129
Y21 VCC1_5_44 AF1 VSS044 VSS130 P15
Y22 G19 0.1U AF10 P16
+1.5V VCC1_5_45 VCCSUS1_5_1 VSS045 VSS131
AF12 VSS046 VSS132 P22
s
+1.5V AA6 R7 AF26 R11
VCC1_5_46 VCCSUS1_5_2 1.5V_S5 VSS047 VSS133
AB4 VCC1_5_47 VCCSUS1_5_3 U7 AF3 VSS048 VSS134 R12
C376 C377 C336 AB5 C414 C360 AF7 R13
VCC1_5_48 VSS049 VSS135
-
C339 C364 C440 AB6 G8 AG1 R14
VCC1_5_49 VCC1_5_67 +1.5V VSS050 VSS136
0.1U 0.1U 0.1U AC4 0.1U 0.1U AG12 R15
0.1U 0.1U 0.1U VCC1_5_50 VSS051 VSS137
AD4 VCC1_5_51 VCC1_5_68 D24 AG14 VSS052 VSS138 R16
AE4 VCC1_5_52 VCC1_5_69 D25 AG17 VSS053 VSS139 R17
AE5 D26 AG20 R23
p
VCC1_5_53 VCC1_5_70 VSS054 VSS140
AF5 VCC1_5_54 VCC1_5_71 D27 AG22 VSS055 VSS141 R24
+1.5V AG5 E20 AG3 R25
VCC1_5_55 VCC1_5_72 +1.5V VSS056 VSS142
R116 VCC1_5_73 E21 AG7 VSS057 VSS143 R4
L12 C331 C443 C456
AA7 VCC1_5_56 VCC1_5_74 E22 B13 VSS058 VSS144 T1
VCCDMIPLL_1
to
2 1 AA8 VCC1_5_57 VCC1_5_75 E23 B15 VSS059 VSS145 T12
AA9 E24 1U 0.1U 0.1U B19 T13
1 BLM11A121S VCC1_5_58 VCC1_5_76 VSS060 VSS146
AB8 VCC1_5_59 VCC1_5_77 F20 B21 VSS061 VSS147 T14
C168 C347 AC8 G20 B23 T15
VCC1_5_60 VCC1_5_78 VSS062 VSS148
B AD8 VCC1_5_61 B24 VSS063 VSS149 T16 B
10U 0.01U AE8 P7 +2.5V B25 T23
VCC1_5_62 VCC2_5_2 VSS064 VSS150
AE9 VCC1_5_63 VCC2_5_4 AB18 C14 VSS065 VSS151 T26
C351
p
AF9 VCC1_5_64 C18 VSS066 VSS152 T27
AG9 VCC1_5_65 C20 VSS067 VSS153 T7
A8 V5REF 0.1U C22 U13
VCCDMIPLL_2 V5REF1 VSS068 VSS154
AC27 VCCDMIPLL V5REF2 AA18 C4 VSS069 VSS155 U15
+3V E26 VCC3_3_1 D1 VSS070 VSS156 U23
l. a
F21 V5REF_SUS D10 U24
C352 V5REF_SUS VSS071 VSS157
+1.5V AE1 VCCSATAPLL D13 VSS072 VSS158 U25
+3V AG10 VCC3_3_22 VCCUSBPLL A25 +1.5V D14 VSS073 VSS159 V23
0.1U C350 A24 3V_S5 D18 V26
C453 VCCSUS3_3_20 C338 VSS074 VSS160
A13 VCCLAN3_3/VCCSUS3_3_1 D20 VSS075 VSS161 V27
0.1U F14 AB3 VCCRTC C353 D22 V4
0.1U VCCLAN3_3/VCCSUS3_3_2 VCCRTC 0.01U VSS076 VSS162
G13 VCCLAN3_3/VCCSUS3_3_3 D7 VSS077 VSS163 W1
G14 0.1U E14 W23
VCCLAN3_3/VCCSUS3_3_4 VSS078 VSS164
VCCLAN1_5/VCCSUS1_5_1 G10 1.5V_S5 E15 VSS079 VSS165 W24
3V_S5 A11 VCCSUS3_3_1 VCCLAN1_5/VCCSUS1_5_2 G11 E18 VSS080 VSS166 W25
w
U4 VCCSUS3_3_2 E19 VSS081 VSS167 W7
C356 C457 V1 AB22 E25 Y23
VCCSUS3_3_3 V_CPU_IO1 VSS082 VSS168
V7 VCCSUS3_3_4 V_CPU_IO2 AD26 F17 VSS083 VSS169 Y26
0.1U 0.1U W2 AG23 VCCP F19 Y27
VCCSUS3_3_5 V_CPU_IO3 VSS084 VSS170
Y7 VCCSUS3_3_6 F22 VSS085 VSS171 Y6
C16 C334 F4 E27
VCCSUS3_3_13 VSS086 VSS172
w
A17 VCCSUS3_3_7 VCCSUS3_3_14 D16
3V_S5 B17 E16 0.1U
VCCSUS3_3_8 VCCSUS3_3_15
C17 VCCSUS3_3_9 VCCSUS3_3_16 F15 ICH6-M
C411 C455 F18 F16
A
G17 VCCSUS3_3_11 VCCSUS3_3_18 G15 A
0.1U 0.1U G18 G16 VCCRTC
w
ICH6-M
3V_S5 C346 C348
C433 C357 C447 C410 0.1U 0.1U
0.1U 0.1U 0.1U 0.1U
5 4 3 2
5 4 3 2 1
24,28,32,33,36 +5VSUS
m
40MIL
U3
40MIL M890VDD0
USB-0 17
o
3 1 M890VDD0 CN6
+5VSUS IN OUT M890VDD0 1 V+
4 IN USBP_5- 2
c
USBP_5+ DATA_L
3 DATA_H
2 GND OUT 5 SHIELD1 5
.
D 4 GND SHIELD2 6 D
RT9701
+ USB_CONN_H
C3 C6
s
0.1U 100U/6.3V
EB4
USBP5+ USBP_5+
it c
15 USBP5+ 3 3 2 2
USBP5- 4 1 USBP_5-
15 USBP5- 4 1
NCCMQ20D900-TR
a
40MIL 40MIL M890VDD1
USB-1
U33
3 1 M890VDD1 CN21
+5VSUS IN OUT M890VDD1 1 V+
4
m
IN USBP_0- 2 DATA_L
USBP_0+ 3 DATA_H
2 GND OUT 5
B TEST 4
SHIELD1 5
6
e
C GND SHIELD2 C
RT9701 Modified + USB_CONN_H
C TEST C264 C265
Modified Signal pin 0.1U 100U/6.3V
h
swap for
EB2
3 2 USBP_0+ layout
c
15 USBP0+ 3 2 USBP_0-
15 USBP0- 4 4 1 1
NCCMQ20D900-TR
USB-2
s
40MIL 40MIL
-
M890VDD2
U2 CN5
3 1 M890VDD2 M890VDD2 1
+5VSUS IN OUT V+
USBP_4-
p
4 IN 2 DATA_L
USBP_4+ 3 DATA_H
SHIELD1 5
2 GND OUT 5 4 GND SHIELD2 6
to
RT9701 + USB_CONN_H
C2 C5
B 0.1U 100U/6.3V B
EB3
3 2 USBP_4+
p
15 USBP4+ 3 2
4 1 USBP_4-
15 USBP4- 4 1
NCCMQ20D900-TR
USB-3
l. a
CN7
40MIL 40MIL M890VDD3 M890VDD3 1 V+
U4
3 1 M890VDD3 USBP_6- 2
+5VSUS IN OUT USBP_6+ DATA_L
3 DATA_H
4 IN SHIELD1 5
w
4 GND SHIELD2 6
2 5 + USB_CONN_H
GND OUT C4 C7
RT9701 0.1U 100U/6.3V
w
A A
w
EB5
3 2 USBP_6+
15 USBP6+ 3 2
4 1 USBP_6-
15 USBP6- 4 1
NCCMQ20D900-TR
5 4 3 2
1 2 3 4 5 6 7 8
PDD[0..15]
18
m
14 PDD[0..15]
14 PDDREQ
PDDREQ
PDIOW#
ODD CONNECTOR SLAVE
14 PDIOW#
PDIOR#
14 PDIOR#
PIORDY CN17
o
14 PIORDY
PDDACK# CDAUDL CDAUDR
14 PDDACK# 19 CDAUDL 1 2 CDAUDR 19
IRQ14 CDGND
14 IRQ14 19 CDGND 3 4
PDA1 IDERST# PDD8
14 PDA1 5 6
PDA0 PDD7 PDD9
14 PDA0 7 8
PDCS1# PDD6 PDD10
c
14 PDCS1# 9 10
PDA2 PDD5 PDD11
A 14 PDA2 11 12 A
PDCS3# PDD4 PDD12
14 PDCS3# 13 14
.
IDERST# PDD3 PDD13
14 IDERST# 15 16
PDD2 PDD14
+5V PDD1 17 18 PDD15
PDD0 19 20 PDDREQ
-PDIAG R210 0 PDIAG 21 22 PDIOR#
U45
s
PDIOW# 23 24
PIORDY 25 26 PDDACK#
7SH08 27 28
5
IRQ14
PDA1 29 30 -PDIAG 80MIL
B TEST Modified DASP_ON_1 4
2
PDA0 31 32 PDA2 ODD_VCC +5V
it c
PDCS1# 33 34 PDCS3# ODD_VCC
1 DASP_ON 15 35 36
ODDLED#
+5V +5V 23 ODDLED# 37 38 L21
ODD_VCC 39 40 PBY201209T-300Y-S
41 42
C232
C301
C231
C235
C234 43 44 0.1U
R153 R155 0.1U 45 46 C233
*10K Q32 *CH2507S Q12 10K 47 48 0.1U
49 50
2
1000P
0.1U
10U
CH2507S
a
HDDLED# ODDLED# 51
3 1 1 3 52
R209
NC for slave 470
C15004-15001
2
DASP_ON_1
B B
m
R156 *0
ADD DASP_ON FOR IDE CABLE SELECT

B TEST Modified
e
SATA 1 CONNECTOR
HDD CONNECTOR
c h
CN10
CN9 23 GND4
IDERST# 1 2 1
PDD7 1 2 PDD8 GND1
3 4 25 2
s
3 4 H1 TXP SATA_TXP0 14
PDD6 5 6 PDD9 3
5 6 TXN SATA_TXN0 14
PDD5 7 8 PDD10 4
PDD4 7 8 PDD11 GND2
9 10 5 SATA_RXN0 14
-
PDD3 9 10 PDD12 RXN
11 11 12 12 RXP 6 SATA_RXP0 14
PDD2 13 14 PDD13 7
PDD1 13 14 PDD14 GND3 +3.3VSATA +3V +3.3VSATA
15 15 16 16
PDD0 17 18 PDD15
C 17 18 C
19 20 8
p
19 20 3.3V
C516
C517
C518
PDDREQ 21 22 9 L69
PDIOW# 21 22 3.3V PBY201209T-300Y-S
23 23 24 24 3.3V 10
PDIOR# 25 26 HDD_VDD 11
PIORDY 25 26 PCSEL R19 470 GND
27 27 28 28 GND 12
0.1U
PDDACK#
4.7U/10V
4.7U/10V
29 29 30 30 GND 13
to
C490
C489
C493
C86
IRQ14 31 32 14
31 32 5V HDD_VDD
PDA1 33 34 PDIAG R17 *10K_0402 15
PDA0 35
33
35
34
36 36 PDA2 80MIL 5V
5V 16
PDCS1# 37 38 PDCS3# HDD_VDD +5V 17
37 38 GND
1000P
0.1U
0.1U
10U
HDDLED# 39 40 L7 18
23 HDDLED# 39 40 RSVD
HDD_VDD 41 41 42 42 2 1 GND 19
43 43 44 44 12V 20
PBY201209T-300Y-S 26 21
p
C87 H2 12V
45 45 46 46 12V 22
*100P 47 48
47 48
24 GND5
ALLTOP_17859
Serial_ATA
B TEST Modified
l. a
MASTER
D D
w
C TEST modified (footprint change )
w
1 2 3 4 5 6
w
A B C D E
SMARTAMC-CONEXANT_20468-31 19
o m
For Layout:
Place decoupling caps near the power pins of
SmartAMC device.
. c
CODEC POWER
L43 +5V U39 +3.3VA
+3VSUS *BK2125HM121 +3.3VA 800mA (30MIL)
s
3 IN OUT 2
ADJ
2
it c
MC27 MC35 MC37 C294 GMT_G960T63U
MC39 MC41 MC32 MC36 MC38 MC40 0.1U_0402 10U 0.47U_0402 C295
1
1U/10V
10U 0.1U_0402 0.1U_0402 0.1U_0402 0.1U_0402 0.1U_0402 0.1U_0402
1
2 1
R200 *124
2
MR26
249K_(1%) MU3 R199
18
10
23
33
44
B TEST
5
GND AGND 0
EC38,May/24 Modified
VDD5
VDDC18
VDDC10
VDD_CLK
AVDD33
AVDD44
AGND
a
MC2 150P_0402
1
For Layout: Close to SmartAMC device.
RC_OSC 1
GND RCOSC1
L39 SBK160808T-110Y MR16 0 3 MC24 10U AGND
20 DIB_DATAN DIB_DATAN MIC1
29 MIC
MIC_IN MIC1 21
L40 SBK160808T-110Y MR17 0 4
20 DIB_DATAP DIB_DATAP
CD_IN_R 32 RCDR SOFTWARE EQ CONTROL TABLE
m
L41 SBK160808T-110Y MR18 0 7 31 CDGND1 GPIO4 GOIO5 S/W EQ
20 PWRCLKP PWRCLKP CD_IN_GND RCDL
CD_IN_L 30
L42 SBK160808T-110Y MR19 0 8 LOW LOW ON
20 PWRCLKN PWRCLKN 1000P_0402 MC25 AGND
LINE_IN_L 27
MR25 33 15 28 1000P_0402 MC26 LOW HIGH OFF
14 AC_SDOUT
e
MC3 SDATA_OUT LINE_IN_R
15:5:15 routing , 50 mil 14 AC_SYNC 16 SYNC
150P_0402 17 39 AC97OUT_L HIGH LOW OFF
to other signal 14 AC_RESET# AC_RESET# LINE_OUT_L AC97OUT_R
AC97OUT_L 21
LINE_OUT_R 40 AC97OUT_R 21
20 AC_ONLY HP_OUT_L 42 HIGH HIGH OFF
GND 43
h
HP_OUT_R
14 AC_SDIN0 21 SDATA_IN0
38 REF_FLT
REF_FLT VC_SCA
22 BIT_CLK VC_SCA 37
14 AC_BITCLK VREF_SCA
VREF_SCA 36
c
MR28 *0 11 ID0# MIC_BIAS
MBIAS/AVDD 34 MIC_BIAS 21
GND MR27 *0 12
MR24 MR23 ID1#
*10K *10K
<Conexant Name> S_PDIF 46
14
s
EAPD MR31 0
GPIO_4 47 HPSENSE_PR 24
2
1 BEEP 45 1
PC_BEEP MR32 0 MC28 MC31 MC33 MC34
48
-
GPIO_5 HPSENSE 21
13 0.1U_0402 0.1U_0402 0.1U_0402 1U/10V
DSPKOUT
AVSS_CLK
MR22 33
1
XTLO 24
GNDC19
AGND35
AGND41
MR21 *1M
GNDC2
GNDC9
XTLI 25
GND8
GND
MR33 MY2 AGND AGND
p
24.576MHZ
*0 20468-31
19
26
35
41
2
6
9
1 2
R365 R366
*10K *10K
to
MC29 MC30
33P 33P
GND AGND
PC BEEP CONTROL
GND GND
p
For Layout: +3.3VA
Place crystal and associated

Ground Tie B TEST Modified circuitry very near
l. a
SmartAMC Device. C293
0.1U_0402
MR2 0
C TEST modified ESD NORMAL : LOW
5
MR30 *0
1 C292 0.47U_0402
28 PCMSPK# BEEP
4
MR29 *0 MR9 *0 2
15 PCSPK
U38
w
MR8 0 7SH86
3
SGND
w
AGND
GND RCDR C291 10U R196 4.7K

CDAUDR 18
RCDL C289 10U R192 4.7K
CDAUDL 18
CDGND1 C290 10U R194 4.7K
CDGND 18
w
R193 R191 R195
4.7K 4.7K 4.7K
AGND
A B C D
A B C D E
SMARTDAA_20493-21 20
o m
c
Vdd
Revision History REV:B MODIFY FOR USE
NEW MODEM MODULE MC978 0.1uF
.
REV Description Date
00 February 14, 2002 MTP58 1
Initial Release 1 1 1
MTP59 MTP36 MTP37
DGND_LSD 1 MTP39
s
01 27mmx27mm form factor. July 5, 2002 1 MTP35 1 MTP38
RING_2 MFB902 RING_1 MTP41
24
1
AC
02 6 pins J1 connector-T/R traces for specific uses-100V C902/C904 September 24, 2002 MMZ1608D301B
DVdd
21 RAC1 MR902 1M RAC1/RING MC902 0.033uF/100V
RAC1
it c
MBR904
MRV902
03 add J1B - remove T903 October 9, 2002 8 MC906
NC1 TAC1 MR904 1M TAC1/TIP MC904 0.033uF/100V MMBD3004S *470pF MJ2
TAC1 20
22 NC2
04 Change J1 & J1B. Change R938 size. Add TP60 to TP71. November 12, 2002
1
A
25 NC3 RAC2 19 2
Removed J1B. Change size for C978, C984, R902, R904, R906, R908,
05 R910 and R978. Changed BR904 and BR906 to different manufacture. November 26, 2002
KU10S31N
29 18 AGND_LSD GND FI-S2P-HF(JAE)
PADDLE TAC2
06 Corrected error in Q904 PCB footprint. January 3, 2003 MC908
*470pF
a
AGND_LSD
07 Added DIB data transformer footprint, added MC966, deleted ring September 24, 2003 MU902 MBR906
AC
impedance circuit. Added the letter "M" prefix to all reference MTP34 1 MMBD3004S
designators.
Changed value for MC966 from 3.3nF to 10nF, 100V, +/-20%, Y5V. By 12 TRDC MR906 6.8M TIP_2 MFB904 TIP_1 MTP42
08 November 06, 2003 TRDC MTP40 1 1
default, MC966 will be populated. Also, changed CX20493 revision from
11 to 21. MMZ1608D301B
MC918 MC966
1 MTP33 0.01U
0.1uF
m
C906 and C908 must be Y3 type
11 EIC MC958 15nF Capacitors for Nordic
EIC
AGND_LSD Countries only
MTP28 1 MTP70
1
AGND_LSD
e
MTP29 1
RXI 9 RXI MR910 RXI-1
1
C test modofoed
MTP52 C926 must be placed
237K MTP71
(change part number )
MR932 near pin 26 (CLK). R910 must be placed
1 15K near pin 9 (RXI).
h
CLK2 CLK 26 1
MTP26 MC926 10pF CLK GPIO1
5 RBias
1 BR908_CC MFB906 PWR+ RBias
7 PWR+ MR954
MMZ1608D301B 1 MTP32
AGND_LSD
c
19 PWRCLKN Vdd 1 MTP69 59.0K
MTP30 1
AC1
MC970 2 AVdd 1 MTP68

MTP22 C1 A1 0.1uF MC930 MC928
MT902 BR908_AC1 C2 A2
s
PWRCLKN 1 4
1
AC2
MC962 + - 2.2uF 0.1uF 10 VZ MR908 MC910 BRIDGE_CC

1 47pF VZ 348K 0.047uF/100V 1
6 AGnd
MBR908 R908 must be placed
19 PWRCLKP
-
MJ1 PWRCLKP 2 3 PCLK BAV99DW C970 must be C928, C930 must be near pin 10 (VZ).
1 MID82154 placed near pins 7 placed near pins 2 17 EIO MQ902
1 EIO MMBTA42
2 2 (PWR+) and 6 (AVdd) and 6
MTP23 MTP27 AGND_LSD
3 3 (AGnd). (AGnd).
4 MQ904
4 1 1 1 MTP67 MTP31 1 SB29003
5 5
p
6 6
MTP72 MTP60 EIF MTP66
7 7 EIF 16 1
MTP24
8 8 19 DIB_DATAP 1 1
*HEADER8 1 TXO MQ906 MR928
TXO 14
DIB_DATAP MC922 10pF DIB_P1 MR922 0 DIB_P2 27 MMBTA42 27
DIB_P
to
13 TXF
TXF 1 MTP64
MJ3
1 DIB_DATAN MC924 10pF DIB_N1 MR924 0 DIB_N2 28
1 DIB_N 1 MTP49
2 2 DC_GND 15 1
MTP25 MTP73 MTP61 MTP65
3
VRef
3 MR938
4 23
Vc
4 1 1 1 DGnd 110
5 5
MT922 20496-21
6 6 GND 19 DIB_DATAN 1 4
3
p
7 7 AGND_LSD
8 C944, C974, and C976 DGND_LSD AGND_LSD
8
Vref_LSD
must be placed near
*HEADER8 (omit) 2 3 pins 3 (Vc) and 4
Vc_LSD
*MID82157(omit)
(VRef).
MTP62 MTP63
AGND_LSD
l. a
Depending of the design target and DIB length, 1 1
DIB components can be: REV:B MODIFY
-C922/C924 10pF
-C922/C924 47pF (Validation in progress) DEL L9 / L10 / RV1 / C458
MC974 MC944 MC940 MC976
*0.001uF(omit) 0.1uF 1uF .001uF
C922, C924, C906, and C908, must be Y3 type Capacitors in order

to comply with Nordic Countries deviations of IEC60950 2nd and 3rd ed. C940 is X5R ceramic.
Y3 type capacitors must also be certified for a 2.5KV impulse test. AGND_LSD
This must be checked in vendors' specifications (see AVL).
w
Circuit traces for C922 and C924 should be less
than 2 inches.
A
w w B C D
5 4 3 2 1
21
m
+5V 12,13,16,18,19,22,23,24,25,30,33,36
AUDIO
AMPLIFIER-GMT_1428 To Port-Replicator
o
U36
c
2 INR_SPK+
IA0
3
.
IA1 SPK_R_PR 24
D R_SPK+ 4 5 INL_SPK+ D
L_SPK+ YA IB0
7 YB IB1 6 SPK_L_PR 24
9 YC IC0 11
+5V R179 10K 12 10
+5V_AUG YD IC1
s
ID0 14
L44 13
+5V_AUG ID1
16 VCC SEL 1
HI0805R800R-00(5A) 8 15 HPSENSE_PR 24
GND /E
1
AGND
it c
C284 C269 C282 C283 C275 C279 74CBT3257
10U 10U .1U .1U .1U U34 .1U
R180
2
R187 19 21 R_SPK+ 10K
AGND VDD ROUT+ R_SPK-
15K ROUT- 16
7 PVDD1
18 4 L_SPK+ AGND +5V AGND
C280 .047U PVDD2 LOUT+ L_SPK-
LOUT- 9
AOUT_R 23
R186 1K C281 .47U/10V HPINR RLINEIN A_BEEP T49
19 AC97OUT_R 20 RHPIN PC-BEEP 14 1 2 C285
a
AGND C272 .47U/10V 8 *PAD .1U
RIN+
SE/BTL 15 U35
5
AGND C273 .47U/10V 10 17 R184 1K +3V
R173 1K C271 .47U/10V HPINL 6
LIN+ HP/LINE 7SH32
19 AC97OUT_L AOUT_L LHPIN
5 22 AMP_SHDN# 2 HPSENSE
LLINEIN SHUTDOWN HPSENSE 19
C270 .047U 4
AGND C274 4.7U/10V 11 1 1
BYPASS GND4 HPSENSE_PR 24
GND3 24
m
R174 R177 *1K 2 13
+5V_AUG R175 *1K GAIN0 GND2
15K 3 GAIN1 GND1 12
R185
3
GND5 25
change from 26 20K
GND6
GND7 27
0.47U to R178 10K 28
e
C
AGND R176 10K GND8 AGND AGND C
4.7U B satge GND9 29
GND10 30
modified 31
GND11
GND12 32
AGND 33
Gain Table GND13
h
AGND
INT. SPEAKER
+5V_AUG
Gain0 Gain1 Av CN12
GMT1428/TPA0212 R_SPK+ L52 LZA10-2ACB104MT R_SPK+_1
c
R_SPK- L53 LZA10-2ACB104MT R_SPK-_1 4
0 0 2 times R183 L_SPK+ L54 LZA10-2ACB104MT L_SPK+_1 3
100K L_SPK- L55 LZA10-2ACB104MT L_SPK-_1 2
0 1 6 times 1
1 0 12 times
s
R-L-SPEAKERS
1 2 AMP_SHDN#
22 VOLMUTE# D23 CH500H-40
1 1 24 times
Headphone out
p - Mic in
to
MIC_BIAS
19 MIC_BIAS
B B
C267 CN23 MR20

100U/6.3V 1 7
INL_SPK+ 1 INL_SPK+_1 L38 HPOUT_L 3K
CN22
+
p
2 2
LZA10-2ACB104MT 6 1 7
INR_SPK+ 1 INR_SPK+_1 L37 HPOUT_R R172 0
+
2 3 19 MIC1 2
LZA10-2ACB104MT 4 6
C266 HPSENSE 5 8 3
1
100U/6.3V 4
l. a
1
R182 R181 C276 C277 HP-JACK-GREEN stereo MIC T48 5 8
1
1K 1K 180P 180P C268 *PAD

C278 can not *180P
2
MIC-JACK-PINK
.1U
2
recording
2
AGND AGND AGND AGND AGND VER : B

modified
AGND AGND
w w A
5
w 4 3 2
5 4 3 2 1
5VPCU
KBC-NS97551L 22
3VPCU 3VPCU
m
D28 *CH500H-40 3VPCU
U40
2 1
EC-AVCC 5 1
OUT IN
+3V GND 2
C343 R122 0 4 3 C313 C308 C342 C327 ENV1 R248 10K
BYP EN
EC-AVCC
0.1U C311 0.1U 0.1U 0.1U 0.1U
C326 0.1U POP FOR 97551 AAT3218
0.1U C309 C314 C315 BADDR0 R250 10K
2.2U 0.01U 1U/16V Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the
c
supply. BADDR1 R251 *10K
123
136
157
166
161
16
34
45
95
U41
.
D TINT- R220 10K D
B TEST Modified
VDD
AVCC
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VBAT
3VPCU SHBM R258 10K
s
SERIRQ 7 81 TEMP_MBAT
14,15,28,30 SERIRQ SERIRQ AD0 TEMP_MBAT 34
T63 8 82 MBATV SHBM=1: Enable shared memory with host BIOS
LDRQ AD1 MBATV 34 3VPCU
LFRAME#/FWH4 9 83 I/O Address
14,30 LFRAME#/FWH4 LFRAME AD2 T41
R228 LAD0/FWH0 15 84 ABATV BADDR1-0 Index Data
14,30 LAD0/FWH0 LAD0 AD3 T54
470K LAD1/FWH1 14 87 ID0 R367 *10K 0 0 2E 2F
it c
14,30 LAD1/FWH1 LAD1 IOPE0AD4
LAD2/FWH2 13 AD Input 88 ID1 R368 10K 0 1 4E 4F
14,30 LAD2/FWH2 LAD2 IOPE1/AD5 ID2
LAD3/FWH3 10 89 R371 *10K 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
14,30 LAD3/FWH3 LAD3 IOPE2/AD6
PCLK_591 18 90 KBC_NC02 1 1 Reserved
2 PCLK_591 LCLK IOPE3/AD7 T56
591RESET# 19 93 KBC_TP_11
KBSMI# KBSMI#591 LREST DP/AD8 KBC_TP_12 T42
15 KBSMI# 2 1 22 SMI Host interface DN/AD9 94 T40
D31 CH500H-40 23 R372 R369 R370 3VPCU
SWI#2 PWUREQ R218 0 CC-SET
T31 DA0 99 CC-SET 34
C324 D29 100 10K 10K *10K MBCLK R121 10K
DA1 VADJ T36
0.1U SCI# 2 1 31 DA output 101 R219 0
15 SCI# IOPD3/ECSCI DA2 VADJ 13
102 ADREF MBDATA R120 10K
a
DA3 T38
CH500H-40
GATEA20 5 32 200HZ-LED 3VPCU
14 GATEA20 GA20/IOPB5 IOPA0/PWM0 T32
RCIN# 6 33
14 RCIN# KBRST/IOPB6 IOPA1/PWM1
PWM or 36 VFAN_1
IOPA2/PWM2 VFAN_1 23
PORT-A 37 LPCPD# R267 10K
IOPA3/PWM3 T39
MX0 71 38
23 MX0 KBSIN0 IOPA4/PWM4
MX1 72 39 6648_ALERT# R257 *10K
23 MX1 KBSIN1 IOPA5/PWM5 PCICGRST# T43
MX2 73 40
m
23 MX2 KBSIN2 IOPA6/PWM6 PCICGRST# 28
MX3 74 43 ID1 (pin88) ID0 (pin87)
23 MX3 KBSIN3 IOPA7/PWM7 T46
MX4 77
23 MX4 KBSIN4 0 (PATA HDD)(R370) 0 (PCMCIA)(R369)
MX5 78 153 MBATLED1
23 MX5 KBSIN5 IOPB0/URXD MBATLED1 23
MX6 79 154 MBATLED0 0 (PATA HDD)(R370 1( new card >PCI express) (R367)
23 MX6 KBSIN6 IOPB1/UTXD MBATLED0 23
MX7 80 162 PWR_LED
23 MX7 PWR_LED 23
e
C KBSIN7 IOPB2/USCLK MBCLK 1 (SATA HDD)(R368) 0 (PCMCIA) (R369) C
PORT-B IOPB3/SCL1 163 MBCLK 34
MY0 49 164 MBDATA 1 (SATA HDD)(R368) 1( new card > PCI express)(R367)
23 MY0 KBSOUT0 IOPB4/SDA1 MBDATA 34
MY1 50 165 PCIRST#
23 MY1 KBSOUT1 IOPB7/RING/PFAIL PCIRST# 14,25,28
MY2 51 Key matrix scan R119 *10K
23 MY2 KBSOUT2
MY3 52 168 BATLOW# ID2 --- 0 EF6
23 MY3 KBSOUT3 IOPC0 BATLOW# 15
h
MY4 53 169
23 MY4
MY5 56
KBSOUT4 IOPC1/SCL2
170
THCLK_SMB 3 --- 1 LW1
23 MY5 KBSOUT5 IOPC2/SDA2 THDAT_SMB 3 +3V
MY6 57 171
23 MY6 KBSOUT6 IOPC3/TA1 T68
MY7 58 PORT-C 172 FANSIG_1
23 MY7 KBSOUT7 IOPC4/TB1/EXWINT22 FANSIG_1 23
MY8 59 175 RF_OFF#
23 MY8 RF_OFF# 25
c
MY9 KBSOUT8 IOPC5/TA2 LPCPD# R266 *0 HWPG R211 10K
23 MY9 60 KBSOUT9 IOPC6/TB2/EXWINT23 176 SUS_STAT# 15,30
MY10 61 1 6648_ALERT#
23 MY10 KBSOUT10 IOPC7/CLKOUT 6648_ALERT# 3
MY11 64 +3V
23 MY11 KBSOUT11 PR_INSERT1#
MY12 65 26 SUSB# R216 10K
+5V +5V 23 MY12 KBSOUT12 IOPD0/RI1/EXWINT20 SUSB# 15
MY13 66 PORT-D-1 IOPD1/RI2/EXWINT21 29 ACIN
s
23 MY13 KBSOUT13 ACIN 34
MY14 67 30 MXLID#
23 MY14 KBSOUT14 IOPD2/EXWINT24 MXLID# 13 3VPCU
MY15 68
23 MY15 KBSOUT15 NBSWON#
2
-
IOPE4/SWIN
2
4
6
8
TINT- 105 44 PR_INSERT1# 2 1

TINT IOPE5/EXWINT40 PR_INSERT# 26
106 PORT-E 24 D27 RB500 MBATLED1 R143 *10K
T34 TCK IOPE6/LPCPD/EXWIN45 CLKRUN# S5LAN_PME# 26
RN3 R225 R229 107 25
T61 TDO IOPE7/CLKRUN/EXWINT46 CLKRUN# 14,25,26,28,30
10KX4 10K 10K 108 JTAG debug port MBATLED0 R141 *10K
T37 TDI
109 124 ENV0
T35 TMS IOPH0/A0/ENV0
p
125 ENV1 FOR EC debug ...
IOPH1/A1/ENV1 BADDR0
1
3
5
7
24 MSCLK 110 126

111
PSCLK1/IOPF0 IOPH2/A2/BADDR0
127 BADDR1 layout ..place to close
24 MSDATA PSDAT1/IOPF1 IOPH3/A3/BADDR1
114 128 TRIS K/B connector
24 KPCLK PSCLK2/IOPF2 IOPH4/A4/TRIS
115 PORT-H 131 SHBM
24 KPDATA PSDAT2/IOPF3 IOPH5/A5/SHBM
to
116 132 A6
23 TPCLK PSCLK3/IOPF4 IOPH6/A6
117 PS2 interface 133 A7
23 TPDATA PSDAT3/IOPF5 IOPH7/A7
23 CAPSLED 118 PSCLK4/IOPF6
119 138 D0
B 23 NUMLED PSDAT4/IOPF7 IOPI0/D0 B
139 D1
IOPI1/D1 D2
IOPI2/D2 140
141 D3
591_32KX1 IOPI3/D3 D4
158 32KX1/32KCLKOUT PORT-I IOPI4/D4 144
p
145 D5
R264 20M 591_32KX2 IOPI5/D5 D6
160 32KX2 IOPI6/D6 146
147 D7
IOPI7/D7
150 RD#
Y6 IOPJ0/RD U18 3VPCU
l. a
PORT-J-1 151 WR#
591_32KX3 R270 120K IOPJ1/WR0 D0
1 4 12 A0 D0 13
152 SELIO# 11 14 D1
32.768KHZ
BAYSWAP 62
SELIO
41
T30
10
9
A1
A2
D1
D2 15
17
D2
D3
POWER SWITCH
IOPJ2/BST0 IOPD4 SCROLED 23 A3 D3
T53 HWPG 63 42 CELL_ SLT 8 18 D4 R169
31,32,33,35 HWPG IOPJ3/BST1 IOPD5 CELL_SLT 34 A4 D4
C344 C349 D26 69 PORT-D-2 54 D/C# 7 19 D5
15 SUSC# IOPJ4/BST2 IOPD6 D/C# 34 A5 D5 10K
20P 5.6P 2 1 70 PORTJ-2 55 BL/C# 6 20 D6
15 SWI# IOPJ5/PFS IOPD7 BL/C# 34 A6 D6
75 5 21 D7
T45 IOPJ6/PLI A8 A7 D7
CH500H-40 76 143 27
21 VOLMUTE# IOPJ7/BRKL_RSTO IOPK0/A8 A9 A8 NBSWON#
IOPK1/A9 142 26 A9 2 1
148 135 A10 23 1 A18 4 3
31,36 S5_ON
w
IOPM0/D8 IOPK2/A10 A11 A10 VPP
32,36 SUSON 149 IOPM1/D9 IOPK3/A11 134 25 A11 5
155 PORT-K 130 A12 4 SW2
32,34,36 MAINON IOPM2/D10 IOPK4/A12 A12
156 129 A13 28 C262
36 LAN_POWER IOPM3/D11 IOPK5/A13/BE0 A14 A13 0.1U
31,35,36 VRON 3 IOPM4/D12 PORT-M IOPK6/A14/BE1 121 29 A14
2 1 4 120 A15 3
15 DNBSWON# IOPM5/D13 IOPK7/A15/CBRD A15
D32 CH500H-40 27 2
15 RSMRST# IOPM6/D14 A16
2 1 EC_28 28 113 A16 30 32
w
15 PWROK IOPM7/D15 IOPL0/A16 A17 VCC 3VPCU
D30 CH500H-40 112 A17
R221 1K R222 *0 CS# IOPL1/A17 A18 CS#
+3V 173 SEL0 PORT-L IOPL2/A18 104 22 CE#
591SEL1# 174 103 A19 RD# 24 C169
T71 SEL1 IOPL3/A19 T33 OE# 0.1U
591CLK 47 48 WR1# WR# 31 16
A T52 CLK IOPL4/WR1 T51 WE# GND A
PLCC32
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
NC10
C test modified
w
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
122
159
167
137
Pin 103 internal is

PC97551VPC
17
35
46
96
11
12
20
21
85
86
91
92
97
98
"A19",Can't use to
AGND_591
GPIO
R217
10 C319
1U/16V
5 4 3 2
A B C D E
SCROLED
23
m
1st FAN OUT CONNECTOR LED 22 SCROLED
2
DTC144EUA
Q16
D22 LED_BLUE +5V
o
+5V 1 3
R167 330
C TEST modified EMI 22 NUMLED
2
c
U43 C307 DTC144EUA
+5V Q15 D21 LED_BLUE
.
1U D11 LED_BLUE
4 1 VEN GND 8 4
2 7 1 3 R165 330
+5V_FAN VIN GND R71 330
R359 3 6 CN8 37 WL_LED#
VO GND +5V_FAN D20 LED_BLUE
22 VFAN_1 4 5
s
SET GND 1 D10 LED_BLUE
2 4
C509
1 3 R164 330
G993P1U 3 5
1
180K 18 ODDLED# R52 330
1
C513 C544 FAN
Q14
it c
1000P D9 LED_BLUE
1
DTC144EUA
22U
2 .1U/50V/X7R
C512 R41 *330
2
18 HDDLED#
1000P
2
22 CAPSLED
2
R35
22 MBATLED0
2
0 5VPCU
a
R40 220 DTC144EUA
+3V Q6 D3
14 SATA_LED#
+3V 1 3 R22 330
1 3 R20 330
1
m
For PATA/SATA option LED-RED/GREEN
Q5
2 DTC144EUA
Q27
2
22 MBATLED1
e
3 PDTA124EU 3
3
22 FANSIG_1
D6 LED_BLUE
R355 1 3 R33 330
h
100K
Q7
DTC144EUA
2
22 PWR_LED
s
KEYBOARD TOUCHPAD
-
C TEST modified
CP7 220PX4
1 2 MY15
3 4 MY10
p
5 6 MY11
7 8 MY14
CN14
MX1 CP6 220PX4
to
1 1 MX1 22
MX7 MY13 L6
2 2
3 MX6
MX7 22 1
3
2
4 MY12 12 MIL 5VTP C84 0.1U
3 MX6 22 +5V
4 MY9 5 6 MY3
2 4 MY9 22 2
5 MX4 7 8 MY6 HI0805Q310R
5 MX4 22
6 MX5
6 MX5 22
7 MY0 CN11
7 MY0 22
MX2 CP5 220PX4
p
8 8 MX2 22 1
9 MX3 1 2 MY8 L68 FCM1608K221 TPDATA-1
9 MX3 22 22 TPDATA TPCLK-1 2
10 MY5 3 4 MY7
10 MY5 22 22 TPCLK 3
11 MY1 5 6 MY4 L67 FCM1608K221
11 MY1 22 4
12 MX0 7 8 MY2
12 MX0 22
l. a
13 MY2
13 MY2 22
14 MY4 TOUCH_PAD_4P
14 MY4 22
15 MY7 CP4 220PX4
15 MY7 22
16 MY8 1 2 MX0
16 MY8 22
17 MY6 3 4 MY1
17 MY6 22
18 MY3 5 6 MY5 C486 C483
18 MY3 22
19 MY12 7 8 MX3 *10P *10P
19 MY12 22
20 MY13
20 MY13 22
21 MY14
21 MY14 22
22 MY11 CP3 220PX4
22 MY11 22
MY10 MX2
23 1 2
C TEST modified
w
23 MY10 22
24 MY15 3 4 MY0
24 MY15 22
25 5 6 MX5
25 MX4
7 8
KEYBOARD CONNECTOR
CP2 220PX4
w
1 2 MY9
3 4 MX6
5 6 MX7
1 7 8 MX1 1
3VPCU 3VPCU
RP39 RP38
w
10 1 MY11 10 1 MY3
MY12 9 2 MY10 MY4 9 2 MY2
MY13 8 3 MY9 MY5 8 3 MY1
MY14 7 4 MY8 MY6 7 4 MY0
MY15 6 5 3VPCU MY7 6 5 3VPCU
10KX8 10KX8
A B C D
5 4 3 2 1
PORT REPLICATOR 24
m
PD[0..7]
PD[0..7] 30
c o
CN16
VAD 102
PD8 FG2
.
D H6 H20 H22 H21 H7 H3 1 VA_PR 100 50 D
EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD 100 50 VA_PR
3 99 99 49 49
2 98 98 48 48
1
1
97 47
s
SBM1040 97 47
96 96 46 46
+5V 95 45
95 45
94 94 44 44
93 43
COM PORT 30 -MDSR1 93 43
it c
30 BRI# 92 92 42 42 AGNDNBQ160808T-700Y-S
SGND 91 41 L50
H2
CPU
H10 H18 H5 H4 H11
30 INIT#
C test modofoed
PD0
90
89
91
90
89
41
40
39
40
39
L49 NBQ160808T-700Y-S
-MCTS1 30
SPK_R_PR 21
SPK_L_PR 21 HEADPHONE
EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD PR_INSERT# 88 38
26 PR_INSERT#
PD1 87
88
87
38
37 37
-MDCD1
MRXD1
30
30 COM PORT
1
PD2 86 36
86 36 M_TXD1 30
85 85 35 35 AFD# 30
PD3 84 34
PRT PORT PD4 83
84 34
33
-MDTR1 30
a
83 33 ERROR# 30
PD5 82 32
PD6 81
80
82
81
80
32
31
30
31
30
-MRTS1
SLIN#
SLCT
30
30
30
PRT PORT
79 29
H8 H15 H16 H19 H17 H12

CRT PORT 12
12
PR_BLU
PR_GRN
PD7 78
77
79
78
77
29
28
27
28
27
STRB#
PE
30
30
EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD 76 26
76 26 ACK# 30
m
12 PR_RED 75 75 25 25 BUSY 30
1
74 74 24 24 MSDATA 22
12 PR_VSYNC 73 73 23 23 MSCLK 22
72 72 22 22
C TEST MODIFIED 12 PR_HSYNC 71 21 KPCLK 22
e
C 71 21 C
70 20
19,21 HPSENSE_PR
+5VSUS 69
68
70
69
68
20
19
18
19
18
+5VSUS
KPDATA
EXT_TX1N
22
26
PS/2 PORT
CPU CPU CPU DDCCLK2 67 17
H9 H14 H13
12
12
DDCCLK2
DDCDAT2
DDCDAT2 66
67 17
16
EXT_TX1P
EXT_TX0P
26
26 10/100M LAN
h
EMIPAD EMIPAD EMIPAD 66 16
65 65 15 15 EXT_TX0N 26
LAN_ACT_LED# 64 14
26,27 LAN_ACT_LED# 64 14
1
LAN_LINK_LED# 63 13
26,27 LAN_LINK_LED# 63 13
62 62 12 12
c
USBP2+ 61 11
15 USBP2+ 61 11 EXT_TX3N 26
USBP2- 60 10
AVDDL
15
15
USBP2-
USBP1+
USBP1+
59
58
60
59
58
10
9
8
9
8
PR_INSERT#
EXT_TX3P 26
EXT_TX2N 26
GIGA LAN
LANVCC 57 7
s
57 7 EXT_TX2P 26
USBP1- 56 6
15 USBP1- 56 6
-
52 52 2 2
HPSENSE_PR PR_INSERT#
101
p
FG1
C227 C312 FCI_52456
PA1 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 DOCK-10007221-001-100P-H-EF6
EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD *330P_0402 *330P_0402
to
1
B B
p
PR_VSYNC PR_HSYNC DDCCLK2 DDCDAT2
l. a
C304 C303
C306 C305
10P_0402 10P_0402
10P_0402 10P_0402
+5V
C TEST modified EMI
w
VA_PR LAN_LINK_LED#
1
C302
C318 C317 C204 C203 C310
1000P_0402 100P_0402 *10P_0402 4.7U/10V .1U_0402 1000P_0402
w
2
PA13 PA14 PA15 PA16 PA17
A EMIPAD EMIPAD EMIPAD EMIPAD EMIPAD A
1
5
w 4 3 2
1 2 3 4 5 6 7 8
25
m
+5V 12,13,16,18,19,21,22,23,24,30,33,36
+3V 2,3,8,10,12,13,14,15,16,18,21,22,23,26,30,33,35,36,37
c o
AD[0..31]
AD[0..31] 14,26,28
.
A A
TYPE III MINI PCI SOCKET
s
+3V +3V
CN26
1 2
C TEST modified
it c
TIP RING
R135 3 4
8PMJ-3 8PMJ-1
5 8PMJ-6 8PMJ-2 6
10K 7 8
8PMJ-7 8PMJ-4
9 8PMJ-8 8PMJ-5 10
RF_LINK_0 11 12 BROADCOM_LINK
RF_OFF# LED1_GRNP LED2_YELP
22 RF_OFF# 1 2 13 LED1_GRNN LED2_YELN 14
D16 CH500H-40 15 16 FOR 80 PORT USED
CHSGND RESERVED
a
PIRQC# 17 18 +5V
14,28 PIRQC#
19
INTB# 5V
20 PIRQB# VER : B modified
3.3V INTA# PIRQB# 14,28
T58 21 RESERVED RESERVED 22 T62
23 GROUND 3.3VAUX 24 +3VSUS
PCLK_MINI 25 26 PCIRST#
2 PCLK_MINI CLK RST# PCIRST# 22,26
27 GROUND 3.3V 28
REQ1# 29 30 GNT1#
14 REQ1# REQ# GNT# GNT1# 14
m
31 3.3V GROUND 32
AD31 33 34 MINIPCI_PME# +5V
AD29 AD31 PME# C190
35 AD29 RESERVED 36 BT_AVTIVE 37
37 38 AD30 +5V C519
AD27 GROUND AD30
39 40 1 2
AD27 3.3V U19
e
B AD25 41 42 AD28 1 2 .1U B
AD25 AD28 AD26 .1U
37 WLAN_ACTIVE 43 RESERVED AD26 44 7SH08
5
C/BE3# 45 46 AD24
14,26,28 C/BE3# C/BE3# AD24
5
AD23 47 48 R130 33 AD20 U46 2 RF_OFF#
AD23 IDSEL
49 GROUND GROUND 50 2 4
h
AD21 51 52 AD22 4 1 RF_LINK_0
AD21 AD22 37 RF_LINK
AD19 53 AD19 AD20 54 AD20 1 BROADCOM_LINK
55 56 PAR
GROUND PAR PAR 14,26,28
AD17 57 58 AD18 7SZ32
C/BE2# AD17 AD18 AD16
c
14,26,28 C/BE2# 59 C/BE2# AD16 60
IRDY# 61 62 R373 *0 R134 *0
14,28 IRDY# IRDY# GROUND FRAME#
63 3.3V FRAME# 64 FRAME# 14,26,28 change value
CLKRUN# 65 66 TRDY#
14,22,26,28,30 CLKRUN# SERR# 67
CLKRUN# TRDY#
68 STOP# TRDY# 14,26,28 and footprint
s
14,26,28 SERR# SERR# STOP# STOP# 14,26,28
69 GROUND 3.3V 70 100K 0402 to
PERR# 71 72 DEVSEL# R374 R132
14,28 PERR# C/BE1# PERR# DEVSEL# DEVSEL# 14,26,28 1M 1M 1M 0603
73 74
-
14,26,28 C/BE1# AD14 C/BE1# GROUND AD15
75 AD14 AD15 76
77 78 AD13
AD12 GROUND AD13 AD11
79 AD12 AD11 80
AD10 81 82
AD10 GROUND AD9
83 84
p
AD8 GROUND AD9 C/BE0#
85 AD8 C/BE0# 86 C/BE0# 14,26,28
AD7 87 88
AD7 3.3V AD6
89 3.3V AD6 90
AD5 91 92 AD4
AD5 AD4 AD2
to
AD3
93
95
RESERVED
AD3
AD2
AD0
94
96 AD0 C TEST modified
+5V 97 98
AD1 5V RESERVED
C
99 AD1 RESERVED 100 C
101 GROUND GROUND 102
103 104 Z1701 R131 10K
AC_SYNC M66EN
105 AC_SDATA_IN AC_SDATA_OUT 106
107 108
p
AC_BIT_CLK AC_CODEC_ID0#
FOR 80 PORT USED 109 AC_CODEC_ID1# AC_RESET# 110
111 112
VER: B modified 113
MOD_AUDIO_MON RESERVED
114
AUDIO_GND GROUND
115 SYS_AUDIO_OUT SYS_AUDIO_IN 116
117 118
l. a
SYS_AUDIO_OUT GND SYS_AUDIO_IN GND
119 AUDIO_GND AUDIO_GND 120
121 RESERVED MCPIACT# 122
+5V 123 124
VCC5A 3.3VAUX +3VSUS
MINI-PCI
+3V +3V
w
R129
2
10K
+3V +3VSUS
w
MINIPCI_PME# 1 3 ICH_PME#
ICH_PME# 14,26,28
D D
C183 C184 C182 C195 C187 C186 C194 C185 Q10
0.1U *0.1U *0.1U *0.1U *10U 0.1U *0.1U *0.1U CH2507S
1
w 2 3 4 5 6
5 4 3 2 1
C236
0.1U LANVCC
LAN SWITCH 26
m
C241
0.1U
12
19
36
46
43
40
37
33
1
6
SEL FUNCTION(COM)
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
TX3N
LOW IN_B1 2 A0 0B1 48 EXT_TX3N 24
o
1B1 47 EXT_TX3P 24
HIGH IN_B2 TX3P 4 A1
2B1 42 EXT_TX2N 24
PI3L301 3B1 41 EXT_TX2P 24
TX2N 8 35 LANVCC
A2 4B1 EXT_TX1N 24
c
5B1 34 EXT_TX1P 24
TX2P 10 A3
2
6B1 29 EXT_TX0N 24 8bit/16bit
.
D B STAGE 7B1 28 EXT_TX0P 24 D
R138
MODIFIED TX1N 15 45 INT_TX3N U20 3.6K LANVCC
A4 0B2 INT_TX3N 27
44 INT_TX3P U22
TX1P 1B2 INT_TX3P 27 14,25,28 AD[31..0]
1
17 A5
39 INT_TX2N AD0 104 106 EECS 1 8
s
2B2 INT_TX2N 27 AD0 EECS CS VCC
38 INT_TX2P AD1 103 111 EESK 2 7
3B2 INT_TX2P 27 AD1 EESK SK NC
AD2 102 109 EEDI/AUX 3 6 R146 *0 C218
TX0N INT_TX1N AD3 AD2 EEDI EEDO DI NC 0.1U
21 A6 4B2 32 INT_TX1N 27 98 AD3 EEDO 108 4 DO GND 5
31 INT_TX1P AD4 97
TX0P 5B2 INT_TX1P 27 AD4
23 AD5 96
A7 AD5 AT93C46-10SC-2.7
it c
26 INT_TX0N AD6 95 26
6B2 INT_TX0N 27 AD6 VDD33
12,22,24 PR_INSERT# 1 2 24 25 INT_TX0P AD7 93 41
SEL 7B2 INT_TX0P 27 AD7 VDD33
D19 AD8 90 56
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CH500H-40 AD9 AD8 VDD33
NC
89 AD9 VDD33 71
AD10 87 84
U26 TSSOP48-8_1-5 AD11 AD10 VDD33
86 94
11
13
16
18
20
22
27
30
14
LANVCC R159 10K PI3L301 AD12 AD11 VDD33
3
5
7
9
85 AD12 VDD33 107 LANVCC
SWITCH AD13 83
AD14 AD13
82 AD14 VDD18 24 DVDD
AD15 79 32
AD16 AD15 VDD18
59 AD16 VDD18 45
AD17 58 54
a
AD18 AD17 VDD18
57 AD18 VDD18 64
AD19 55 78 C189 0.1U B STAGE
AD20 AD19 VDD18
53 99
AD21 50
AD20 VDD18
110
MODIFIED
AD22 AD21 VDD18
49 AD22 VDD18 116
RTL8110S(B)/8100C
AD23 47
For 8110SB LANVCC on/off will control by EC. AD24 43
AD23
AD24 VDD18 126 L70 NBQ160808T-700Y-S
DVDD
AD25 42
AD26 AD25
40 AD26 AVDDH 10
m
AVDDH LANVCC AD27 39 AD27 AVDDH 120 AVDDH
AD28 37
AD29 AD28
36 AD29 AVDDL 3
R223 0 AD30 34 7
AD30 AVDDL
C193
C180
C202
C242
C188
C217
C214
C215
C200
C237
C243
AD31 33 16
AD31 AVDDL
AVDDL 20 AVDDL
1
e
C C
14,25,28 C/BE0# 92 CBE0B AVDD25 12 V_12P

0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
22U
14,25,28 C/BE1# 77 CBE1B

2
14,25,28 C/BE2# 60 CBE2B

3VPCU
14,25,28 C/BE3# 44 CBE3B GND 21
GND 22
3
h
GND 35
Q9 L56 25 38
14 PIRQD# INTAB GND
CTRL25 1 27 48
14,25,28 PCIRST# RSTB GND
2SB1188 *PBY201209T-300Y-S 28 51
50mils 2 PCLK_LAN CLK GND
14 GNT2# 29 GNTB GND 52
AVDDL
5
6
7
8
30 62
c
14 REQ2# REQB GND
LANVCC AD16 R133 100
2
PQ39 46 IDSEL GND 66

AO4414 14,25,28 FRAME# 61 73
FRAMEB GND
LAN_ON 4 14,28 IRDY# 63 IRDYB GND 80
36 LAN_ON
C178
C179
C173
C174
C171
C172
14,25,28 TRDY# 67 TRDYB GND 81

14,25,28 DEVSEL# 68 DEVSELB GND 91
LANVCC AVDDL
s
14,25,28 STOP# 69 STOPB GND 100
LANVCC 70 101
14,28 PERR# PERRB GND
0.1U
0.1U
0.1U
0.1U
10U
+3V
*10U
14,25,28 SERR# 75 SERRB GND 112

14,25,28 PAR 76 PAR GND 118
-
R224 R238 119
3
2
1
*0 0 GND
GND 123
R124 124
LANVCC GND
1
1K LAN_PME# 31 PMEB
PC78 VSS 4
Q24 .1U/16V/X7R 15K R123 9
VSS
3
p
Q21 *2SB1197K ISOLATEB 23 17
2
2SB1188 ISOLATEB VSS
VSS 13
CTRL18 1 2 CTRL25 128
DVDD VSS
T57 105 LWAKE
LANVCC
125 CTRL18
CTRL18
to
R128 2.49K RSET CTRL25
C198 2
127 RSET CTRL25 8

C191
C175
C176
C216
C316
C208
C213
C199
C197
R127
1
10K 11 R125 0
TX0P NC R145 0
B
1 MDI0+ CLKRUNB 65 CLKRUN# 14,22,25,28,30 B
TX0N
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
22U
2 MDI0- SMBCLK 72
LAN_PME#
2
14,25,28 ICH_PME# 2 1 SMBDATA 74

88 R144 15K
D15 TX1P M66EN
5 MDI1+
CH500H-40 TX1N
p
6 MDI1-
LED0 117 LAN_ACT_LED# 24
AVDDH 115
22 S5LAN_PME# TX2P LED1 LAN_LINK_LED# 24
14 MDI2+ LED2 114 T60
TX2N 15 113
MDI2- LED3 T59
l. a
R126 V_12P R249 TX3P 18 121 XTAL1 C196 20P
0 *0 C320 C321 TX3N MDI3+ XTAL1
19 122
For 8100CL MDI3- XTAL2
1
0.01U 0.01U
Y5
25.0000MHz
0.1U C177
XTAL2 C192 20P
2
R230 R231 R232 R233
49.9/F 49.9/F 49.9/F 49.9/F
TX1N
w
TX1P
TX0N
TX0P
w
TX3P
TX3N
RTL8100C(L) _10/100M RTL8110SB(L) _ 1G TX2N
A A
3.3VD 3.3VD TX2P
VDD33
26,41,56,71,84,94,107 26,41,56,71,84,94,107
w
3.3VA 2.5VA
AVDDL
3,7,16,20 3,7,16,20
R236 R237 R235 R234
2.5VD 1.2VD 49.9/F 49.9/F 49.9/F 49.9/F
DVDD
32,54,78,99 24,32,45,54,64,78,99,110,116,126
2.5VA 3.3VA
AVDD25 12
12
C323 C322
3.3VA
AVDDH NC 0.01U 0.01U
10,120
Pin 127 5.6k (1%) pull-low 2.49k (1%) pull-low
5 4 3 2
5 4 3 2 1
27
m
AVDDL
At RTL8100C(L) 10/100M application , use TN8515C transformer

At RTL8110SB(L) 1G application , use GSN5009 transformer
o
R157 C244 C248
0 0.01U 0.01U
U31
. c
1 24 MCT1 R201 75
D TCT1 MCT1 D
INT_TX1N 2 23 X-TX1N
26 INT_TX1N TD1+ MX1+
INT_TX1P 3 22 X-TX1P
26 INT_TX1P TD1- MX1-
s
4 21 MCT2 R202 75
TCT2 MCT2
it c
26 INT_TX0N INT_TX0N 5 20 X-TX0N
TD2+ MX2+
7 18 MCT3 R203 75
TCT3 MCT3
a
10 15 MCT4 R204 75
TCT4 MCT4
26 INT_TX2P
m
TD4- MX4-
LAN_1
C245 C247 GSN5009(10/100/1G)
e
C
0.01U 0.01U C258 C
1500P
CC1808
h
C TEST Modified
c
RJ45 and RJ11 CONNECTOR
-s CN19
p
R170 150
LANVCC 2 1 A2 11 LED1_YELP
A3 13
24 LAN_LINK_LED# LED1_YELN
to
X-TX2P 4 RJ45_TERM4 2+
B X-TX2N 5 B
RJ45_TERM5 2-
X-TX1N 6 RDN 1-
X-TX3P
p
7 RJ45_TERM7 3+
C TEST modified X-TX3N 8 RJ45_TERM8 3-
X-TX1P 3 RDP 1+ GND_LAN_CHASIS_1
l. a
X-TX0N 2 TDN 0-
X-TX0P 1 TDP 0+ C263 *1000P
CN24 B3
24 LAN_ACT_LED# 16 LED2_GREENN NC 12
RING_RJ11 R168 150 R171 0
1
2 LANVCC 2 1 B1 14 LED2_GREENP NC2 15 C TEST modified ESD
TIP_RJ11 C259 1000P
GND1 17
JAE-F1-S2P-HF RING_RJ11_1 9 RING
w
GND2 18
C261 C260 TIP_RJ11_1 10 R166 0
470P/CC1808 470P/CC1808 TIP
RJ45+RJ11 GND_LAN_CHASIS_2
w
MFB3
RING_RJ11 RING_RJ11_1
MMZ1608D301B
KU10S31N
MRV2
A A
w
MFB2
TIP_RJ11 TIP_RJ11_1
MMZ1608D301B
5 4 3 2
5 4 3 2 1
+3VSUS +3VSUS
VCCCA
28
m
U11-1
U11-3 U11-2 W3 H8
VCCP VCC
D19 VCCB VCCA A5 W10 VCCP VCC H9
K19 A11 +3VSUS 14,25,26 AD[0..31] AD[0..31] H10
VCCB VCCA +3VSUS AD31 VCC
U2 AD31 VCC H11
o
B15 D1 A_D10 AD30 V1 H12
B_CAD31/B_D10 A_CAD31/A_D10 A_D9 AD29 AD30 VCC
A16 B_CAD30/B_D9 A_CAD30/A_D9 C1 V2 AD29 VCC J8
B16 D3 A_D1 AD28 U3 M7
B_CAD29/B_D1 A_CAD29/A_D1 A_D8 C449 C151 C153 C154 C155 C460 C439 C441 C459 C448 AD27 AD28 VCC +3VSUS
A17 B_CAD28/B_D8 A_CAD28/A_D8 C2 W2 AD27 VCC J12
c
C16 B1 A_D0 0.1U 1U 1U 10U 10U 0.1U 0.1U 0.1U 0.1U 0.1U AD26 V3 M9
B_CAD27/B_D0 A_CAD27/A_D0 A_A0 AD25 AD26 VCC
D17 B_CAD26/B_A0 A_CAD26/A_A0 B4 U4 AD25 VCC M10
A_A1 AD24
.
C19 B_CAD25/B_A1 A_CAD25/A_A1 A4 V4 AD24 VCC M12
D D18 E6 A_A2 AD23 V5 K8 D
B_CAD24/B_A2 A_CAD24/A_A2 A_A3 +3VSUS AD22 AD23 VCC R45
E17 B_CAD23/B_A3 A_CAD23/A_A3 B5 U5 AD22 VCC K12
E19 C6 A_A4 AD21 R6 N7 10K
B_CAD22/B_A4 A_CAD22/A_A4 A_A5 AD20 AD21 VCC
G15 B6 P6
s
B_CAD21/B_A5 A_CAD21/A_A5 A_A6 AD19 AD20
F18 B_CAD20/B_A6 A_CAD20/A_A6 G9 W6 AD19 SUSPEND R2
H14 C7 A_A25 AD18 V6
B_CAD19/B_A25 A_CAD19/A_A25 A_A7 R68 AD17 AD18 TPS_DATA
H15 B_CAD18/B_A7 A_CAD18/A_A7 B7 U6 AD17 DATA N1
G17 A7 A_A24 10K AD16 R7 L6 TPS_CLOCK
it c
B_CAD17/B_A24 A_CAD17/A_A24 A_A17 D12 AD15 AD16 CLOCK TPS_LATCH
K17 B_CAD16/B_A17 A_CAD16/A_A17 A10 V9 AD15 LATCH N2
L13 E11 A_IOWR# PCICGRST# 1 2 PCICGRST_7411 AD14 U9 PCMSPK#
B_CAD15/B_IOWR A_CAD15/A_IOWR 22 PCICGRST# AD14 PCMSPK# 19
K18 G11 A_A9 AD13 R9
B_CAD14/B_A9 A_CAD14/A_A9 A_IORD# AD12 AD13 R198 10K
L15 B_CAD13/B_IORD A_CAD13/A_IORD C11 N9 AD12 SPKROUT L7
L17 B11 A_A11 CH500H-40 C145 AD11 V10
B_CAD12/B_A11 A_CAD12/A_A11 A_OE# *0.22U +3VSUS AD10 AD11
L18 B_CAD11/B_OE A_CAD11/A_OE C12 U10 AD10
L19 B12 A_CE2# AD9 R10 N3 PIRQA#
B_CAD10/B_CE2 A_CAD10/A_CE2 AD9 MFUNC0 PIRQA# 14
M17 A12 A_A10 AD8 N10 M5 PIRQB# +3VSUS
B_CAD9/B_A10 A_CAD9/A_A10 AD8 MFUNC1 PIRQB# 14,25
M14 E12 A_D15 AD7 V11 P1 PIRQC#
a
B_CAD8/B_D15 A_CAD8/A_D15 AD7 MFUNC2 PIRQC# 14,25
2
M15 C13 A_D7 AD6 U11 P2 SERIRQ
B_CAD7/B_D7 A_CAD7/A_D7 A_D13 Q8 AD5 AD6 MFUNC3 R324 10K SERIRQ 14,15,22,30
N19 B_CAD6/B_D13 A_CAD6/A_D13 F12 R11 AD5 MFUNC4 P3 +3VSUS
N18 A13 A_D6 DTC144EUA AD4 W12 N5
B_CAD5/B_D6 A_CAD5/A_D6 AD4 MFUNC5 FM_LED 29
N15 C14 A_D12 AD3 V12 R1 R49 *10K
B_CAD4/B_D12 A_CAD4/A_D12 A_D5 7411_PME# AD2 AD3 MFUNC6
M13 B_CAD3/B_D5 A_CAD3/A_D5 E13 14,25,26 ICH_PME# 3 1 U12 AD2
P18 A14 A_D11 AD1 N11 R53 0
B_CAD2/B_D11 A_CAD2/A_D11 AD1 CLKRUN# 14,22,25,26,30
P17 B14 A_D4 AD0 W13 M1
m
B_CAD1/B_D4 A_CAD1/A_D4 AD0 CLK_48 CLK48_7411 2
P19 E14 A_D3 CN27
B_CAD0/B_D3 A_CAD0/A_D3 C/BE3# R325 220
1 GND1 14,25,26 C/BE3# W4 C/BE3 TEST0 P12
F15 C5 A_REG# 35 C/BE2# W7 W17
B_CC/BE3/B_REG A_CC/BE3/A_REG GND2 14,25,26 C/BE2# C/BE2 NC
G18 F9 A_A12 A_D3 2 C/BE1# W9 T19
B_CC/BE2/B_A12 A_CC/BE2/A_A12 D3 14,25,26 C/BE1# C/BE1 VCO_LF
e
K14 B10 A_A8 A_CD1# 36 C/BE0# W11
C B_CC/BE1/B_A8 A_CC/BE1/A_A8 CD1# 14,25,26 C/BE0# C/BE0 C
M18 G12 A_CE1# A_D4 3
B_CC/BE0/B_CE1 A_CC/BE0/A_CE1 A_D11 D4 PAR R337 10K
37 D11 14,25,26 PAR P9 PAR SC_PWR_CTRL L5 +5VSUS
K13 G10 A_A13 A_D5 4
B_CPAR/B_A13 A_CPAR/A_A13 A_D12 D5 FRAME#
38 D12 14,25,26 FRAME# V7 FRAME SC_CD L2
h
G19 C8 A_A23 A_D6 5 TRDY# R8 K5
B_CFRAME/B_A23 A_CFRAME/A_A23 D6 14,25,26 TRDY# TRDY SC_CLK
H17 A8 A_A22 A_D13 39 IRDY# U7 K3
B_CTRDY/B_A22 A_CTRDY/A_A22 D13 14,25,26 IRDY# IRDY SC_RST
J13 B8 A_A15 A_D7 6 STOP# W8 K7
B_CIRDY/B_A15 A_CIRDY/A_A15 D7 14,25,26 STOP# STOP SC_VCC_5V +5VSUS
J17 A9 A_A20 A_D14 40 DEVSEL# N8 L1
B_CSTOP/B_A20 A_CSTOP/A_A20 D14 14,25,26 DEVSEL# DEVSEL SC_DATA
c
H19 C9 A_A21 A_CE1# 7 AD25 R77 100 W5 L3
B_CDEVSL/B_A21 A_CDEVSL/A_A21 A_A19 A_D15 CE1# IDSEL SC_OC
J19 B_CBLOCK/B_A19 A_CBLOCK/A_A19 E10 41 D15
A_A10 8 PERR# V8
A10 14,25,26 PERR# PERR
J18 F10 A_A14 A_CE2# 42 SERR# U8 G7
B_CPERR/B_A14 A_CPERR/A_A14 CE2# 14,25,26 SERR# SERR GND
s
B18 B3 A_WAIT# A_OE# 9 G8
B_CSERR/B_WAIT A_CSERR/A_WAIT A_VS1# OE# REQ0# GND
43 VS1# 14 REQ0# U1 REQ GND G13
E18 E7 A_INPACK# A_A11 10 GNT0# T2 H13
B_CREQ/B_INPACK A_CREQ/A_INPACK A11 14 GNT0# GNT GND
-
J15 B9 A_WE# A_IORD# 44 J9
B_CGNT/B_WE A_CGNT/A_WE A_A9 IORD# GND
11 A9 2 PCLK_7411 P5 PCLK GND J10
F14 B2 A_STSCHG# A_IOWR# 45 PCIRST# R3 J11
B_CSTSCHG/B_BVD1(STSCHG/RI) A_CSTSCHG/A_BVD1(STSCHG/RI) IOWR# 22,26 PCIRST# PRST GND
A18 C3 A_IOIS16# A_A8 12 PCICGRST_7411 T1 K9
B_CCLKRUN/B_WP(IOIS16) A_CCLKRUN/A_WP(IOIS16) A_A16 A_A17 A8 GRST GND
H18 E9 46 K10
p
B_CCLK/B_A16 A_CCLK/A_A16 A_A13 A17 7411_PME# GND
13 A13 T3 RI_OUT/PME GND K11
B19 C4 A_IREQ# A_A18 47 L8
B_CINT/B_READY(IREQ) A_CINT/A_READY(IREQ) A_A14 A18 GND
14 A14 GND L9
F17 A6 A_RESET A_A19 48 +3VSUS R34 10K E2 L10
B_CRST/B_RESET A_CRST/A_RESET A_WE# A19 R36 10K A_USB_EN GND
to
15 WE# E1 B_USB_EN GND L11
C17 A2 A_SPKR# A_A20 49 L12
B_CAUDIO/B_BVD2(SPKR) A_CAUDIO/A_BVD2(SPKR) A_IREQ# A20 GND
16 M8
N13 B_CCD1/B_CD1 A_CCD1/A_CD1 C15 A_CD1# 40 MIL A_A21 50
RDY
A21
R39 100 H2 VR_EN
GND
B B17 E5 A_CD2# 17 B
B_CCD2/B_CD2 A_CCD2/A_CD2 VCCCA VCC1
C18 A3 A_VS1# 51 M19
B_CVS1/B_VS1 A_CVS1/A_VS1 A_VS2# VCC2 1.5V_1
F19 B_CVS2/B_VS2 A_CVS2/A_VS2 E8 VPP 18 VPP1 H1 1.5V_2
p
52 VPP2
N17 B13 A_D14 A_A16_P 19 PCI7411GHK
A15
B_RSVD/B_D14
B_RSVD/B_D2
A_RSVD/A_D14
A_RSVD/A_D2 D2 A_D2 40 MIL A_A22 53
A16
A22
C110 C123
K15 C10 A_A18 A_A15 20 0.1U 0.1U
B_RSVD/B_A18 A_RSVD/A_A18 A_A23 A15
54 A23
l. a
A_A12 21 ID Select : AD25
PCI7411GHK PCI7411GHK A_A24 A12
55 A24
A_A7 22 Interrupt Pin : PIRQA# ,PIRQB# ,PIRQC#
A_A25 A7 +5VSUS +5VSUS
56 A25
A_A6 23 Request indicates : REQ0#
A_VS2# A6 U42
57 VS2#
A_A5 24 1 24 Grant indicates : GNT0#
A_RESET A5 5V_0 5V_2
58 RESET 2 5V_1 NC_3 23
A_A4 25 TPS_DATA 3 22
A_WAIT# A4 TPS_CLOCK DATA NC_2
59 WAIT# 4 CLOCK SHDN# 21
w
A_STSCHG# R357 0 A_STSCHG#_P A_A3 26 TPS_LATCH 5 20
A3 LATCH 12V_1 T115
A_INPACK# 60 6 19
A_SPKR# R356 0 A_SPKR#_P A_A2 INPACK# NC_0 BVPP/BVCORE
27 A2 T116 7 12V_0 BVCC1 18
A_REG# 61 8 17
REG# VPP AVPP/AVCORE BVCC0
A_A16 R358 47 A_A16_P A_A1 28 9 16
A1 VCCCA AVCC0 NC_1
A_SPKR#_P 62 10 15
BVD2 AVCC1 OC#
w
A_A0 29 11 14
A0 GND 3.3VIN0 +3VSUS
A_STSCHG#_P 63 PCICGRST_7411 12 13
A_D0 BVD1 RESET# 3.3VIN1
30 D0
A_D8 64 TPS2220ADBR
A_D1 D8
A
31 D1 A
A_D9 65
VPP +3VSUS +5VSUS VCCCA D9
w
A_D2 32 69
A_D10 D2 GND5
66 D10 GND6 70
A_IOIS16# 33 71 VCCCA
A_CD2# WP GND7
67 CD2# GND8 72
34 GND3
C508 C511 C488 C506 C507 C510 68
10U 0.1U 1U 1U 10U 0.1U GND4
CARDBUS-SANTA C89 C90 C91
C TEST modified ESD 10U/10V_8 0.1U 0.1U
5 4 3 2
A B C D E
3VSUS_7411
IEEE 1394 29
m
U11-4 L9
R13 +3VSUS 3VSUS_7411
AVDD BLM11A121S
AVDD R14
AVDD V17
MC_PWR_CTRL_0# F1 V19 C150 C419 C152
MC_PWR_CTRL_0 AVDD
o
T18 7621_T18 1U 0.1U 10U
VDPLL
F2 MC_PWR_CTRL_1
U18 1394_R0
R0
c
SD_CDZ# E3 SD_CD R295
MS_CDZ# 6.34K/F C370 1U
.
F5 MS_CD
5
6
4 U19 1394_R1 4
R1 1394BIAS0 R285 56.2 EB7 1632090
F6 U15
5
6
SM_CD TPBIAS0 R286 56.2 1394_TPA0- 1394_TPA0-_C 1394_TPA0+_C
2 2 1 1 4 4
V15 1394_TPA0+ 1394_TPA0+ 3 4 1394_TPA0+_C
s
TPA0+ 1394_TPA0- 3 4 1394_TPA0-_C
TPA0- W15 3 3
R341
MS_CLK_SM_ELWPZ G5 V14 1394_TPB0+ 1394_TPB0- 2 1 1394_TPB0-_C 1394_TPB0+_C 2
33 MS_CLK/SD_CLK/SM_EL_WP TPB0+ 1394_TPB0- 1394_TPB0+ 2 1 1394_TPB0+_C 2
W14 3 4
it c
MS_BS_SM_WEZ TPB0- R283 56.2 C371 220P 3 4 1394_TPB0-_C
F3 1
1
MS_BS/SD_CMD/SM_WE R317 4.7K R284 56.2 R287 5.11K/F EB6 1632090 1
PHY_TEST_MA R17 +3VSUS
MS_DATA3_SD_DAT3_SM_D3 H5 MS_DATA3/SD_DAT3/SM_D3
CN4
MS_DATA2_SD_DAT2_SM_D2 G3 M11 R338 0
MS_DATA2/SD_DAT2/SM_D2 CPS 1394_CONNECTOR
MS_DATA1_SD_DAT1_SM_D1 G2 P15
MS_DATA1/SD_DAT1/SM_D0 CNA
MS_DATA0_SD_DAT0_SM_D0 G1 B TEST Modified +3VSUS
a
MS_SDIO(DATA0)/SD_DAT0/SM_D0 1394_XOUT C120 12P
XO R19
1
J5 Y3
SD_CLK/SM_RE/SC_GPIO1 24.576MHZ
J3 R112 R113
SD_CMD/SM_ALE/SC_GPIO2 1394_XIN C148 12P 2.7K 2.7K
2
R18
m
XI U15
H3 SD_DAT0/SM_D4/SC_GPIO6
M3 1394_SCLK 1394_SCLK 6 1
SCL 1394_SDATA 1394_SDATA SCL A0 +3VSUS
J6 SD_DAT1/SM_D5/SC_GPIO5 SDA M2 5 SDA A1 2
A2 3
e
3
J1 SD_DAT2/SM_D6/SC_GPIO4 3
7 WP VCC 8
J2 SD_DAT3/SM_D7/SC_GPIO3 GND 4
SD_WP_SM_CEZ H7 R12 R312 220 NM24C02-WMN6T C166

SD_WP/SM_CE PC0 (TEST1)
h
U13 R305 220 0.1U
PC1 (TEST2) R76 220
PC2 (TEST3) V13
J7 T17 C406 1U 7621_T18

SM_CLE/SC_GPIO0 VSPLL
c
AGND N12
K1 SM_R/B/SC_RFU AGND P14
AGND U14
K2 SM_PHYS_WP/SC_FCB AGND U16
s
TPBIAS1 U17
TPA1+ V18
-
TPA1- W18
TPB1+ V16
TPB1- W16
p
PCI7411GHK
to
VCC_XD
3 IN1 CARD READER
2 2
CON2
+3VSUS SD_CDZ# 20
+3VSUS CARD DETECT (CD)
p
22 DETECT GND
C13 C14 C11 C15 SD_WP_SM_CEZ 21
0.01U 0.1U 1U 10U SD_WP MS_BS_SM_WEZ
MS_BS 11
13 MS_DATA0_SD_DAT0_SM_D0
MS_SDIO
B test modified
l. a
R7 MS_CLK_SM_ELWPZ 5 15 MS_CDZ#
8.2K +3VSUS MS_BS_SM_WEZ SD_CLK MS_INS
2 SD_CMD
12 MS_DATA1_SD_DAT1_SM_D1
MS_DATA1
1
MS_DATA1_SD_DAT1_SM_D1 8 14 MS_DATA2_SD_DAT2_SM_D2
MS_DATA0_SD_DAT0_SM_D0 SD_DAT1 MS_DATA2 MS_DATA3_SD_DAT3_SM_D3
7 SD_DAT0 MS_DATA3 16
5
MC_PWR_CTRL_0# 1 MS_DATA3_SD_DAT3_SM_D3 1
VCC_XD_CTRL MS_DATA2_SD_DAT2_SM_D2 SD_DAT3 MS_CLK_SM_ELWPZ
4 2 P 9 SD_DAT2 MS_SCLK 17
2
U6 Q3 VCC_XD 10
TC7SH08FU AO3403 MS VSS0
3
MS VSS1 19
w
18 MS_VCC1 SD VSS0 6
R8 8.2K R6 VCC_XD
3
4 SD_VDD SD VSS1 3
+3VSUS VCC_XD
SHIELD1 23
3
SHIELD2 24
43K 25
SHIELD3
w
C12 PR152 26
FM_LED 10U 22C SHIELD4
28 FM_LED 2
CLOSE TO XD SOCKET FOXCONN_3_1

3
Q2
1 1
CH2507S PQ59 Supporting MMC/SD/MS Cards
D2 CH500H-40
w
1
SD_CDZ# 1 2 R5 100K VCC_XD_CTRL 2 2N7002E

+3VSUS
WORKAROUND PROPOSAL
1
B test modified
A B C D
A B C D E
SUPER I/O - PC87383 +3V

FIR 30
m
40mil: Power/ GND
C211 C228 C224 35mil: VCC_LED, VCC_IC, GND_IC
0.1U_0402 0.1U_0402 10U/6.3V
o
10mil: TXD, RXD, IRSEL, IRTX,
IRRX1
18
17
11
32
45
U23
1
R269 5.6_1206
NC
NC
NC
NC
VDD
VDD
VDD
c
LAD0/FWH0 R262 5.6_1206 VCC_LED
.
14,22 LAD0/FWH0 42 LAD0 GPIO00 15 +5V
4 4
LAD1/FWH1 46 16 C341
14,22 LAD1/FWH1 LAD1 GPIO01
1
LAD2/FWH2 51 19 10U U17
s
LEAD
LAD3/FWH3 53 23
2 T66 PAD
+3V PCLK_SIO IRTX R260 22 TXD LED_C
2 PCLK_SIO 33 LCLK GPIO03 20 3 TXD
it c
IRRX1 R256 22 RXD 4
LPC_DRQ0# T64 RXD
LPC_DRQ0# 22 LDRQ/XOR_OUT GPIO04 21 7 FIR_SELMOD
1
PAD
LFRAME#/FWH4 38 40
14,22 LFRAME#/FWH4 LFRAME GPIO05
R140
10K PLTRST# 35 7
5,14,37 PLTRST# LRESET GPIO06 IRSEL 5
SERIRQ SD/MODE
2
14,15,22,28 SERIRQ 36 SERIRQ GPIO07 41

D17
1 2 SUS_STAT_1# 29
GND
VCC
15,22 SUS_STAT# LPCPD/GPIO21
CLKRUN# 27
14,22,25,26,28 CLKRUN# CLKRUN/GPO22
CH500H-40 TFDU6102F
14M_SIO
8
6
CLKIN 58 14M_SIO 2
PCLK_SIO
INIT# 56 R239 0_8 VCC_IC
24 INIT# INIT +3V
m
8 IRRX1
ERROR# IRRX1 C325 C332 C333
24 ERROR# 54 ERR
R147 9 IRTX
*33 BUSY IRTX 10U .1U/10V_4 1000P_4
24 BUSY 26 BUSY_WAIT
10 IRSEL
e
3 AFD# IRRX2_IRSL0/GPIO17 3
24 AFD# 57 AFD_DSTRB/TRIS
1
C223 ACK# 28
24 ACK# ACK/GPO24
*22P
STRB#
2
24 STRB# 14
h
STB_WRITE/TEST
SLIN# 55 3 -MCTS1
24 SLIN# SLIN_ASTRB CTS1/GPIO11 -MCTS1 24
SLCT 24 59 -MDCD1 +3V
24 SLCT SLCT DCD1/GPIO16 -MDCD1 24
c
PE 25 60 -MDSR1
24 PE PE DSR1/GPIO15 -MDSR1 24
PD7 30 62 -MRTS1
PD7/PGIO23 RTS1/GPIO13 -MRTS1 24
RN2 10KX4
s
PD6 34 61 MRXD1 M_TXD1 8 7
PD6 SIN1/GPIO14 MRXD1 24
-MRTS1 6 5
PD5 37 63 M_TXD1 -MDSR1 4 3
-
PD5 SOUT1/GPIO12 M_TXD1 24 -MDCD1 2 1
PRINT PORT PD4 39 PD4 RI1/GPIO10 5 BRI#
BRI# 24
-MCTS1 R152 10K
PD[0..7] PD3 6 4 -MDTR1
24 PD[0..7] PD3 DTR1_BOUT1/BADDR -MDTR1 24 BRI# R149 10K
p
PD2 43 PD2
PD1 50 PD1 R151 SET ADDRESS
PD0 10K For PC87383 Use
VCORF
52
to
PD0
164E ~ 164F
VSS
VSS
VSS
NC
NC
NC
NC
2 2
PC87383
12
31
44
13
47
48
49
64
p
C222
0.1U_0402
l. a
1
w w 1
A
w B C D
1 2 3 4 5
31
o m
. c
A A
5VPCU
s
10A Current limit B-stage
15mil 15mil 1.5V_S5
VIN_1845
it c
PC102
PR159 VIN_1845
PL13
VIN
6A
VCCP 120mil 1U/10V 0 0805/5A
1
120mil 160mil S0-S5
1
PD18
1.05V
8
7
6
5
2
15mil
+ CHP202U
1
VCCP B-stage PC91 PC90 PQ44 PC92 PC94 PC98 PC86
+ +
8.5A Current
5
6
7
8
7A 10U/25V/X5R/1210 .1U/50V AO4404 1845AGND VIN_1845 .1U/50V
10U/25V/X5R/1210 PC93
.1U/50V
10U/25V/X6S/1206 limit
1
4
15mil
*10U/25V/X5R/1210
2
1845VCC PR110 15mil
S0 PC103 B-stage 18
4
PQ45
.1U/50V AO4404
22
PU7
4
B-stage B-stage PC104 PC105
2 11845_BST2 PR153
19 21 4.7U/10V .1U/50V 1.5V_S5
V+
VCC
2.2 BST2 VDD
1
2
3
m
PL16 20mil 1845_DL2 20 DL2 BST1 25 PR154 1845_BST1 2 1 B-stage
1.5UH_SIL104R-1R5_10A/8.1 mohm 2.2
3
2
1
VCCP_1 160mil 1 2 120mil 1845_LX2 17 LX2 DH1 26 1845_DH1 20mil PL14
1.5UH_SIL104R-1R5_10A/8.1 mohm
8
7
6
5
PC87 PC101 20mil 1845_DH2 18 27 1845_LX1 120mil 1 2 160mil 1.5V_S5_1
e
B PC95 10U/25V/X6S/1206 330U/2.5V-12m_7343 DH2 LX1 B
1
5
6
7
8
.1U/50V + + 16 CS2 DL1 24 1845_DL1 20mil
1
PD17 4 PC113
1
PD15 PC100 *EC10QS04_PSM 15 28 PC89
*220U/2.5V-18m_7343 PQ43 OUT2 CS1 10U/25V/X6S/1206 PD19
2
4 + +
2
EC10QS04_PSM PR120 PC112 AO4704 1845FB2 PD16
2
14 FB2 OUT1 1
499/F *100P 330U/2.5V-12m_7343 PC96 EC10QS04_PSM
2
2
PR127 1845FB1 PQ46 *EC10QS04_PSM PC88 .1U/50V
2
2
Rc 0 PP5 FB1 AO4704 *330U/2.5V-12m_7343
1
22,32 HWPG 7 PGOOD
c
51845TON1 1845VCC
1
2
3
TON 2
B-stage PR126 0 PP6 11 PR128 *0
Rds on =10.5mohm 22 S5_ON ON1
3
2
1
PR125 0 PP7 12
MAX1845 1845REF Rds on =10.5mohm
22,35 VRON ON2 B-stage
10
s
REF
20mil
1845ILIM2
C TEST 13 ILIM2 SKIP 6
PC122
Rd
-
Modified HWPG
1845ILIM1 3 ILIM1
23
.22U/25V/0805/X7R
OVP
UVP
PR124 PR123 GND
10K/F *0
2
1.5V_S5_1
p
D34
8
1845VCC 1845VCC
CH500H-40 Re
1845AGND 1845AGND 1845AGND PR131
Vout=(1+Re/Rf)*1
1
to
VRON *5K1/F PC118
*100P Or
C C
Vout=(1+Rc/Rd)*1 1845REF
Vout=1845FB1 connect to 1845VCC
Fix Vout=1.5V
p
2V
PJ3 SHORT PR129
Rf
PR103 PR102 0 PR130
75K/F 48.7K/F *10K/F
l. a
1845VCC
1845AGND 1845ILIM1 1845ILIM2
PR104 PR101 1845AGND

100K/F 100K/F 1.5V_S5
1.5V_S5
w
PC99 1845AGND 1845AGND C545 C546
.1U/16V/X7R 0.1U 0.1U

5
6
7
8
PR12=75K Current PR13=48.7K Current

PQ42
Limit=8.5A Limit=10A
SI4810DY
w
33,36 MAIND MAIND 4
+1.5V
D
6A +1.5V D
w
3
2
1
S0-S1 C547 C548 C549 C550 C551

+1.5V
0.1U 0.1U 0.1U 0.1U 0.1U C TEST modified EMI
PC82
.1U/16V/X7R
1 2 3 4
5 4 3 2 1
32
m
VIN 486_VIN
PL5
o
FBMJ3216HS800-T
486_VIN +5VSUS
B-stage
1
c
1
1
PC14 PC13
PC15 + PC12 PR162
.
+
D 0.1U/50V 2200P D
10U/25V/X5R/1210 10U/25V/X5R/1210 0
2
2
2
10A Current PR27 10
s
limit 486VCCA
8
7
6
5
1
1.8VSUS
2
it c
B-stage PQ19 PD4 PC29 PC19
AO4406 RB751V 1U/10V 1U/10V
2
4
1
PU2
20
5
SC486IMLTRT
1.8V_BST
VDDP1
VCCA
PR18 0
1
2
3
a
24 PR22 0
PL4 BST
POK 7 HWPG 22,31,33,35
1.5UH_SIL104R-1R5_10A/8.1_mohm
1.8V_P 1 2 1.8V_DH 23
PC22 DH PR144 0
8
7
6
5
1
0.1U/50V 1 SUS_R
EN/PSV SUSON 22,36
1
PQ18 PR26 0 1.8VSUS
m
PR21 AO4704 1.8V_LX 22 11 RUN_ON_D_R
LX EN/VTT MAINON 22,34,36
1
1
+ PC9 2K/F PR25
2
4
1
PC10 + PC7 1 2 21 12 1.8VSUS

ILIM VDDP2
1
1
PC11 PC20 PD3 12.1K/F 13
VDDP2
1
220U/2.5V-18m_7343 0.1U/16V 220U/2.5V-18m_7343 22P/NC *EC10QS04 1.8_DL PC150 PC25 PC27
2
19
e
C 10U/25V/X6S/1206 DL 0.1U/16V C
2
RDS(ON)=13m 10U/25V/X6S/1206 10U/25V/X6S/1206

2
2
B-stage
18mOhm 18mOhm
2
ohm
PGND2 16 B-stage
1
2
3
18 PGND1 PGND2 17
1
PC28 PC24 PC26
h
PR19 10 0.1U/16V
1.8V_OUT 3 10U/25V/X6S/1206 10U/25V/X6S/1206
VDDQS
1
0.9V_P 0.9V_P
2
VTT 14 SMDDR_VTERM
PR20 1.8V_FB 6 15
FB VTT
c
10K/F 10 1 2
+1.8VSUS PR145 1M VTTS R11 0ohm
REFOUT
1
486_VIN 2 1486TON 2 TON
PC23
5.1A
VSSA
PC18 486COMP C60 PC34
2
COMP 9 2 1 +
1U/10V
s
PR24 1000P/50V/NC 1000P_NC *220U_7343_2.5V
2
1
10
S0-S1 PC17
8
-
1000P MVREF
SMDDR_VREF
2
1.8VSUS 8,9,10,36
PR23
10
p
1.8VSUS
PC4 PQ8 C TEST Modified
1
0.1U
6
5
2
1
PC21
to
AO6402
1U/10V
2
3 MAIND 33,36
D35 CH500H-40
B B
1 2
4
p
PR72 1 5
PR73 10 200K NC0 NC2
22,34,36 MAINON
MAINON 2 EN VO 6 80mil 2.5VPCU +2.5V
+1.8V
3 8 1500mA
l. a
PC63 VIN GND
+1.8V 36
1
PC5 .1U/50V/X7R 80mil 4 NC1 GND 9 PC66 + PC71 PC72 PC76
ADJ
1
0.1U .1U/50V/X7R
*220U_7343_2.5V 10U/25V/X6S/1206
1
PC60 PC61 PU5 10U/25V/X6S/1206
2
PC62 SC4215
2
+1.8V 10U/25V/X6S/1206 .1U/50V/X7R
2 10U/25V/X6S/1206
2
R1
C552 C553
C TEST modified EMI
w
PR78
0.1U 0.1U PR76 PR77 *52.3K/F
3.3V *0 0 Vo=0.8(R1+R2)/R2
3VPCU R2
w
PR75
PQ26
100K MMBT3904
22,34,36 MAINON C TEST Modified
3
A 1.8VSUS A
0.99V 2
w
PR74
1
C554 C555
1
43K PC65
0.1U 0.1U 1U/X5R
2
5 4 3 2
5 4 3 2 1
33
m
PR70 VIN_3V VIN
10R
o
PR61 PL9
0R PR68 HI0805R800R-00(5A)
3 SYS_SHDN#
c
390K/F PR71
10R
1
PR63 PC59 PC53 PC54
.
D PC58 100K/F .1U/50V/X7R PC56 PC57 D
C TEST modified EMI .1U/50V/X7R 1000P *10U/25V/X6S/1206 10U/25V/X6S/1206 .01U/50V/X7R PR141 PC144
*0R *1000P
2
D D
1
PR64 FB3
S2
G2
0R
D1
+3V 1999_DL3 PQ25
it c
SI4814DY
PR140 PC143
C578 C579 C580 22 m ohm 0R *1000P
S1D2
.1U/50V/X7R .1U/50V/X7R .1U/50V/X7R
4A
G1
3V_AL
B-stage
8
+3V PC142
2 1 PL8
a
1999_LX3 PC32 3VPCU
+
1 2 3VPCU
.1U/50V/X7R
4.7U/10V B-stage PC145 3.3UH/6.9A
5
PR142 .1U/50V/X7R PC31
PU9
1
*150U/6.3V/7343
PD24 *10K PR155 0R 1999_BST3 PD7 PC30
1 N.C BST3 28 + +
0R *EC10QS04 PQ53
m
1999PG 2 27 220U/6.3V/7343 AO4812
22,32 HWPG PGOOD LX3
1999_DH3
2
3 ON3 DH3 26
VIN_5V
PR59 0R 4 25 PL17
5V_AL
e
C ON5 LDO3 HI0805R800R-00(5A) PC149 C
REF2V_1999 ILIM3 4.7U_1206_16V_X6S
4
5 ILIM3 DL3 24 VIN
1
6 23 SUSD
SHDN- GND SUSD 36
1
REF2V_1999 REF2V_1999 PC127 + PC128 PC129
h
FB3 7 22 3VPCU 1000P +3V
PC141 1U FB3 OUT3 10U/25V/X5R/1210 *10U/25V/X6S/1206 C
5
6
7
8
5VPCU PC146
2
8 REF OUT5 21 +3VSUS
PC140 .1U/50V/X7R
FB5
c
PR46=40.2K PR62 PR66 C
+
9 FB5 V+ 20 1 2
PR67 PC148
=>Ilimit=5.5A 40.2K 26.1K 4
0R 10 19 4.7U/25V 1999_DL5 MAIND .1U/50V/X7R
PRO- DL5 31,32 MAIND
ILIM3 PR47=26.1K ILIM5 11 18
s
ILIM5 LDO5 PC132 1UB/10V/X7R PQ52
=>Ilimit=6A SI4800DY
12 SKIP- VCC 17
ILIM5
-
1999_DH5
3
2
1
13 16
TON DH5
PL10
5VPCU
6A
PR60 PR65 14 15 1 2 5VPCU
100K/F 100K/F PR69 BST5 LX5
0R MAX1999 3.3UH/6.9A
1
PC135 PC75
1
+
C TEST modified EMI .1U/50V/X7R
+ +
5
6
7
8
PR156 B-stage PC64 PC74 .1U/50V/X7R
1999_BST5 PC70
PD21 220U/6.3V/7343 4.7U/10V
2
0.1U
to
5
6
7
8
0R 4 *EC10QS04
2
1
5V_S5
2
B-stage PR137 PD23 PC68 36 MAIND
B 150U/6.3V/7343 MAIND 4 B
4.7 CHP202U PQ51 PQ27
SI4810DY PR138 SI4810DY
*0R
1
p
*1000P
3
3
2
1
5V_AL
C574 C575 PC136
+5V
1
.1U/50V/X7R .1U/50V/X7R FB5
3
2
1
+ PC137
l. a
4.7U/10V
PC130 PR139
.1U/50V/X7R PC139 PC67
2
2 5VPCU 0R B-stage
*1000P
5VPCU 5VPCU .1U/16V/X7R
3
5V_S5 5VSUS 1
10V_1
PR136
10V
PD22
A 2.5A CHN217
PC133
0B
PC73 PC131 4.7U_1206_16V_X6S
w
3VPCU
S0-S5 PC125 S0-S3 0.1U C TEST modified EMI .1U/50V/X7R
0.1U
1
2
5
6
C556 C557 C558 C559

1
2
5
6
36 SUSD SUSD 3 PQ31 +5V .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R
w
36 S5_OND S5_OND 3 PQ50 AO6402
AO6402
+5VSUS
5V_S5
4
A A
4
PC77 C560 C561
w
PC126 .1U/16V/X7R
.1U/16V/X7R .1U/50V/X7R .1U/50V/X7R
C TEST modified EMI
5 4 3 2
1 2 3 4 5
ADAPTER 19V 65W 3.4A VIN

B-stage
PQ36
34
m
AO4407
BATTERY CHARGER BATTERY 4400mAH 8cell/6cell 1

2
8
7
4800mAh 8cell/6cell VIN-V
3 6
o
4 5
VA
B-stage PQ41 SI4814DY
VAD
c
PL3 PR2 PQ3 PL15 1 D1 G1 8 PR94 PC84 PC79
CN3 FBJ3216HS480NT_1206 1 PD2 SBM1040 0.033/3720/1W AO4407 FBJ3216HS480NT_1206 PL11 0.05/3720/1W 10U/25V/X5R/1210 10U/25V/X5R/1210
VA-1 2 VAD-2 VIN_1772 S1D2 7 1772-1 1 120mil BAT-V
.
1 3 1 1 8 2 2
A 2 2 2 7 10uH/4.5A_SIQ124-100 A
3 3 6 3 G2 6
1P
2P
1P
2P
4 4 5 PR108
1
CSIP
CSIN
POWER_JACK 5 PC152 PC2 4 S2 5
s
.1U/50V_0805 .1U/50V_0805 VAD-1 200K + + +
1 3
CSSN
CSSP
VA-2 PR117 PR114
PR171 4.7 4.7
2
it c
0 PR109 PC97
PC153 4.7U_1210/25V-X5R
PR135 *0.01U 100K PC80
PR87 4.7 *10U/25V/X5R/1210
2
10K PR134
C TEST modified ESD 4.7 PQ2 PC3 0.01U PC16 PC116
VAD-5
DTA124EUA 4.7U_1210/25V-X5R .1U/50V
5VPCU 1772_5.4V PR119 PD20 PC110 PC106

PC124 PC119 33 2 1 .1U/50V .1U/50V
a
.1U/50V .1U/50V PC115 1772_5.4V
14,22,23,31,33 5VPCU 15mil SW1010
3
1U/10V/X7R
3VPCU PR91
15mil
100K 1772_CSIP
ACOK ACOK-1 2
PQ37 1772_CSIN PR116
13,14,22,23,26,32,33,36 3VPCU
20mil
20mil
2N7002E 1772_CSSN 100K
1772_BST
BAT-V
VIN 3VPCU PD10 1772_CSSP
SW1010 1772_CELLS
1772_DLOV
1772_DLO
13,31,32,33,36 VIN
1772_DHI
ACOK-2
B B
1772_LX
5VPCU B-stage PR157
3
10K/F 3VPCU PR115
PR89 AC_C 0R PR111 100K
14,22,23,31,33 5VPCU
100K
h
1
2 D/C# 1772-2
D/C# 22
28
27
26
25
24
23
22
21
20
19
18
17
16
15
3
PD9 PR92 PC120 PR112
5
SW1010 475K/F PR172 PQ35 .1U/50V PR133 PU8
INP
CSSP
CSSN
BST
LX
DLOV
DLO
PGND
CSIP
CSIN
BATT
DHI
CELLS
VCTL
VIN 3.4K
c
1 + 0 2N7002E 10K
VAD PQ48
2
4 2 CELL_SLT 22
P331 3 - VA-5 2N7002E
PU6
1772_ICHG
LMV331 PR173 MAX1772EEI
s
3
1
2
*0 PQ40
1
REFIN
2
ACOK
PR90 PR88 PD14
ICHG
DCIN
ACIN
GND
GND
-
ICTL
CCS
CCV
LDO
REF
CLS
*UMD2
3
CCI
100K SW1010
332K/F
CELL-SET
10
11
12
13
14
1772_CCV
PD13 PR132
9
2 BL/C# 22
*SW1010 0 1U25V_X6S/0805 0 = 4 CELL
4
p
VA-6
PQ38 VA-4 2 1 VA-3
1772_CCS
1772_CLS
1772_CCI
1772_DCIN
2N7002E 1 = 3 CELL
2
1772_5.4V 3VPCU
PC123
1
PR93 15mil PR118
to
3VPCU 13,14,22,23,26,32,33,36
1K
1
*0
1772_ICTL
REF4.096 1772-3
PC121
C 1U/10V/X7R C
PC109 PC107
22,32,36 MAINON
AC can not power on PC117 .1U/50V CC-SET = 1.05V/A
1U/10V/X7R .1U/50V PR113
when plug in docking
p
100K
ver : B modified CC-SET
CC-SET 22
ACOK#
3VPCU PC114 PC111
REF4.096
0.01U 0.01U
PR105
l. a
3
10K/F PR100
12.1K/F 1772_ACIN
C TEST modified EMI
B:For 65W adapter PC108 2 D/C#
D/C# 22
PC85 PR97 .1U/50V
PR81=11K =>P PQ47
.01U/50V 10K/F PL12 *2N7002E
limit=61.75W
2
CN25 FBMJ3216HS480NT(6A) VAD
BAT-V1 BAT-V VIN
1
5 5
4 4
SMC TEMP_MBAT 22
w
7 3 SMD PC83 PR96 ACOK C564 C565 C566 C567 C568 C569
6 2 2 3 1 1772_5.4V
1 PR107
1 .01U/50V 100K/F 75K/F .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R .1U/50V/X7R
PQ49
1ST_BAT_CONN PR99 PR121
PR98 100 10K DTA124EUA
100
w
MBATV
MBATV 22
22 ACIN
MBDATA MBCLK PC81
MBCLK 22
22 MBDATA
D .01U/50V PR106 D
1
PR95 10K/F PR122

15K
w
PD11 PD12 14K/F
ZD5.6V ZD5.6V
2
1 2 3 4
1 2 3 4 5
35
m
CPU VCC_CORE 24,28,32,33,36 +5VSUS
13,14,22,23,26,32,33,36 3VPCU +5VSUS
(MAX1907) 10,12,13,15,16,18,21,22,23,25,26,30,33,36,37 +3V
+3V
B-stage
C-stage
o
PR165
0
c
PR33
C570
10K PC47
.
A SFI0603-050E101NP 1U/X5R PR40 PC44 A
1 21907VCC 10
C:For Intel change C4 Deeper PL6 VIN
160mil VIN_1907
20mil
sleep voltage 4ms delay to ICH4-M. 3216-800T40
s
1907AGND 20mil
4.7U/10V
PC42 PC43
5,15 IMVP_PWG VIN 13,31,32,33,36
2
1907VCC 1907REF
VIN_1907 PD5
10
30
1
2200P/50V
it c
PU4 CH500H-40 0.1U PC39
1
HWPG 36 34 + + PC40 PC33
VCC
VDD
22,32 HWPG SYSPOK V+ PR158
PR45 PR46 PC36 .22U/25V/0805/X7R
PR34 10K 1907BST PC38 10U/25V/X5R/1210 10U/25V/X5R/1206
2
+3V 37 IMVPOK BST 31
*0 *0 10U/25V/X5R/1206 PC41
2
4
38 0 B-stage PQ22
1907S0
2 CLK_EN# CLKEN CPU_CORE
DH 33 1907DH 20mil 1 AOD404 10U/25V/X5R/1206 10U/25V/X5R/1210
21
PR50
4 CPU_VID5 D5 0.844V ~ 1.356V
3
22 30V/52A_14m
a
4 CPU_VID4 D4
23
0
4
4
CPU_VID3
CPU_VID2 24
D3
D2
27A
25 32 1907LX
4 CPU_VID1 D1 LX CPU_CORE
4 CPU_VID0 26 D0 PL7 PR49
1907AGND 1907S2 6 0.62uH 0.001
T3 S2
1907VCC
1907S1 5 S1 DL 29 1907DL 20mil 160mil 1907_7 1 2 PC147 PC49 PC48 PC138 PC134
CPU_CORE 4,36
m
0.748V for suspend mode 1907S0 4 S0
1
(Deeper sleep)
1P
2P
4
1
1907B0 1 PQ24 *330U/2.5V/7343 330U/2.5V/7343 330U/2.5V/7343
1907B1 B0 1907AGND PD25 + + + + +
2 B1 GND 11
CM+
1907B2 PQ21 AOD414 SSM24 PD6
CM-
B-stage 3 28 1 1
e
B B2 PGND 1907VCC AOD414 SSM24 B
330U/2.5V/7343 330U/2.5V/7343
2
PR166 0
2
15 DPRSLPVR 35 SUS
40 1907TON *10K PR56 PR57
PR167 0 TON PR36
2,15 STP_CPU# 20 30V/70A_9m
h
DPSLP 1.5K 2K/F
PR43 0 VRON-1 7
22,31,36 VRON SHDN
PR47
c
49.9K/F 17 1907_OA+
PR35 1907TIME 39 OA+ PC51
TIME OA- 16
1907AGND C:For Load line. *0
270P 15 1907FB PR58 2K/F 1907_OA- *470P
PC52 1907CC FB
12
s
CC PC55 100P
CSN 19
0.22U 20mil
C TEST modified EMI PC45 8 PC50 CM-1 PR54 200 CM-
-
REF CM+1 PR55 200 CM+
1907REF 4700P D5 D4 D3 D2 D1 D0 Output D5 D4 D3 D2 D1 D0 Output
18 1 0 0 0 0 0 1.196V 0 0 0 0 0 0 1.708V
1907ILIM CSP 1 0 0 0 0 1 1.180V 0 0 0 0 0 1 1.692V
9 ILIM
PR51 1 0 0 0 1 0 1.164V 0 0 0 0 1 0 1.676V
p
27 14 1 0 0 0 1 1 1.148V 0 0 0 0 1 1 1.660V
GND
1907FB
POS
MR955 0 232K/F DDO NEG 1 0 0 1 0 0 1.132V 0 0 0 1 0 0 1.644V

B:For offset.
1 0 0 1 0 1 1.116V 0 0 0 1 0 1 1.628V
MAX1907AETL PR52 1 0 0 1 1 0 1.100V 0 0 0 1 1 0 1.612V
41
13
1907VCC 1907REF 1907VCC 1907REF 1907VCC 1907REF 1 0 0 1 1 1 1.084V 0 0 0 1 1 1 1.596V
to
PJ2 SHORT 1.24K/F 1 0 1 0 0 0 1.068V 0 0 1 0 0 0 1.580V
PR48 PC46 1 0 1 0 0 1 1.052V 0 0 1 0 0 1 1.564V
1907POS 1 0 1 0 1 0 1.036V 0 0 1 0 1 0 1.548V
C 40.2K/F 100P PR44 PR42 PR39 PR37 PR32 PR30 1 0 1 0 1 1 1.020V 0 0 1 0 1 1 1.532V C
1 0 1 1 0 0 1.004V 0 0 1 1 0 0 1.516V
1907AGND PR53 *0 0 0 *0 0 *0 1 0 1 1 0 1 0.988V 0 0 1 1 0 1 1.500V
1 0 1 1 1 0 0.972V 0 0 1 1 1 0 1.484V
p
1907AGND 1907AGND 100K/F 1907B2 1907B1 1907B0 1 0 1 1 1 1 0.956V 0 0 1 1 1 1 1.468V
1 1 0 0 0 0 0.940V 0 1 0 0 0 0 1.452V
1 1 0 0 0 1 0.924V 0 1 0 0 0 1 1.436V
PR41 PR38 PR31 1 1 0 0 1 0 0.908V 0 1 0 0 1 0 1.420V
1907AGND 1 1 0 0 1 1 0.892V 0 1 0 0 1 1 1.404V
l. a
*0 *0 *0 1 1 0 1 0 0 0.876V 0 1 0 1 0 0 1.388V
1 1 0 1 0 1 0.860V 0 1 0 1 0 1 1.372V
1 1 0 1 1 0 0.844V 0 1 0 1 1 0 1.356V
1 1 0 1 1 1 0.828V 0 1 0 1 1 1 1.340V
1907AGND 1907AGND 1907AGND 1 1 1 0 0 0 0.812V 0 1 1 0 0 0 1.324V
+5VSUS 1 1 1 0 0 1 0.796V 0 1 1 0 0 1 1.308V
MAXIM Change MAXIM Change MAXIM Change 1 1 1 0 1 0 0.780V 0 1 1 0 1 0 1.292V
1 1 1 0 1 1 0.764V 0 1 1 0 1 1 1.276V
1 1 1 1 0 0 0.748V 0 1 1 1 0 0 1.260V
PR28 SUSPEND MODE (SUS=HIGH) VCC_BOOT 1 1 1 1 0 1 0.732V 0 1 1 1 0 1 1.244V
PC35 *12.4K/F S2 S1 S0 Output B2 B1 B0 Output 1 1 1 1 1 0 0.716V 0 1 1 1 1 0 1.228V
w
0.1U PP4 1907TIME GND GND GND 1.708V 1 1 1 1 1 1 0.700V 0 1 1 1 1 1 1.212V
OPEN VCC GND 0.748V REF REF REF 1.372V
3
OPEN OPEN OPEN 1.036V

5
PU3 1907AGND PR29 VCC VCC VCC 0.700V

CLK_EN# 2 *49.9K/F REF VCC VCC 1.212V
2 CLK_EN#
4 N1 2
w
DPRSLPVR 1
15 DPRSLPVR
PQ20
74SH02 2N7002E
3
D
B-stage D
1
PR143 1907AGND
100K
w
1907AGND
1907AGND
1907AGND
For Yonah
1 2 3 4
1 2 3 4 5
36
o m
VIN CPU_CORE VCCP
c
PR85 PR84 PR83
1M 22C 22C
.
A A
VRON_D
Z2788 Z2789
s
S5_OND 33
3
3
VIN 5V_S5 1.5V_S5 3V_S5 VIN 10V
3VPCU
2 PR86 2 2
22,35 VRON 1M
it c
PR147 PR151 PR150 PR149 PR148 PR168 PQ32
1
2
5
6
1M 22C 22C 22C *1M 1M DTC144EUA
1
S5_ONG S5_OND 3 PQ23
AO6402
Z2724 Z2711 Z2712 PQ34 PQ33
3
2N7002E 2N7002E
3
4
3V_S5
a
3V_S5
S5_ON 2 2 2 2 2
22 S5_ON
PQ54
PR146
1M
PC151
2200P
PC37
.01U
72mA
DTC144EUA VIN 1.8VSUS +3VSUS +5VSUS VIN 10V
1
S0-S5
1
1
m
PQ58 PQ57 PQ56 PQ55 PR6 PR17 PR16 PR15 PR7 PR169
2N7002E 2N7002E 2N7002E 2N7002E 1M 22C 22C 22C *1M 1M
e
B SUSON_G SUSD B
SUSD 33
3
Z2708 Z2709 Z2710
3
h
SUSON 2 2
22,32 SUSON PR8 PC6
2 2 2
1M 2200P
PQ6
c
DTC144EUA
1
1
1
s
PQ17 PQ16 PQ15 PQ5
2N7002E 2N7002E 2N7002E 2N7002E
VIN +1.8V SMDDR_VTERM +2.5V +1.5V +5V +3V VIN 10V
-
PR4 PR10 PR12 PR11 PR9 PR13 PR14 PR5 PR170
p
1M 22C 22C 22C 22C 22C 22C *1M 1M
MAINON_G MAIND
MAIND 31,32,33
3
Z2726 Z2725 Z2704 Z2705 Z2706 Z2707 VIN LANVCC VIN
to
3
3
2 PR3 2 PC8
C 22,32,34 MAINON 1M 2200P C
2 2 2 2 2 2
PR80 PR82 PR81
1M 22C 1M
1
p
LAN_POWER_G LAN_ON
1
LAN_ON 26
1
3
Z2713
3
PQ4 PQ10 PQ12 PQ11 PQ9 PQ13 PQ14 PQ7
DTC144EUA 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E
l. a
2 PR79 2
22 LAN_POWER 1M PC69
2
2200P
PQ29
DTC144EUA
1
1
PQ30 PQ28
2N7002E 2N7002E
w w D
1
w 2 3 4
A B C D E
37
m
BLUETOOTH CONNECTOR
o
CN15
1 GND1
15 USBP3+ 2 USB_D+
c
15 USBP3- 3 USB_D-
4 RSVD
BT_AVTIVE_R
.
5 BT_AVTIVE(PIO5) 23 WL_LED#
D HW_RADIO_DIS# 6 D
15 HW_RADIO_DIS# WLAN_ACTIVE_R HW_RADIO_DIS#
7 WLAN_ACTIVE(PIO6)
3
8 Q19 Q20
+3V +3.3V
BLUELED 9
s
LED BLUELED
10 GND2 25 RF_LINK 2 2
BLUETOOTH
DTC144EUA DTC144EUA
it c
1
R213 1 2 *0 WLAN_ACTIVE_R
25 BT_AVTIVE
R214 1 2 0 BT_AVTIVE_R
a
25 WLAN_ACTIVE
R212 1 2 0 WLAN_ACTIVE_R C TEST Modified
R215 1 2 *0 BT_AVTIVE_R
m
For bluetooth V1.2 spec option and combine intel wireless
lan module use ,BC2-ext also provide the co-existence
solution .
e
C C
c h
3V_NEWCARD
+3V
s
R361
2
*4.7K
-
R78 3 1 NEW_CGCLK_SMB
2,15 PCLK_SMB
10K
NEWCARD (PCIEXPRESS*1 + USB*1)
NEWCARDCLKREQ# *CH2507S
NEWCARDCLKREQ# 2 Q29
3
p
3V_NEWCARD
2 Q28
*CH2507S R362
to
2
3V_NEWCARD *4.7K
NEW_CGDAT_SMB
1
2,15 PDAT_SMB 3 1
B B
RCLKEN
3V_NEWCARD *CH2507S
Q30
R360
p
3
CN28 *10K
1 GND_1
-USBCONP7 2
15 USBP7- +USBCONP7 USB- CLKREQ#
3 2 Q31
15 USBP7+ USB+
l. a
CPUSB# 4 CPUSB# *CH2507S
5 RSV_0
6 RSV_1
NEW_CGCLK_SMB 7
NEW_CGDAT_SMB SMBCLK
1
8 SMBDATA
9 +1.5V
1.5V_NEWCARD 10 +1.5V
15 PCIE_WAKE# 11 WAKE#
3VAUX 12 +3.3VAUX
PERST# 13 PERST#
w
14 +3.3V_1
15 U44
CLKREQ# +3.3V_2
16 CLKREQ#
CPPE# 17 1 4 3VAUX 1.5V_NEWCARD
CPPE# 5,14,15,30 PLTRST# SYSRST# 3.3V_IN1 +3V
18 T117 PAD 2231_SHDN# 2 5
2 CLK_PCIE_NEWC# REFCLK- 2231_STBY# SHDN# 3.3V_IN2
2 CLK_PCIE_NEWC 19 REFCLK+ 3 STBY# 3.3V_OUT1 6 3V_NEWCARD
w
20 T118PAD PERST# 8 7
R363 1 GND_2 PERST# 3.3V_OUT2
15 PCIE_RXN0 2 *0 21 PERn0
CPUSB# 11 CPUSB#
C514 C515
R364 1 2 *0 22 CPPE# 12 18 *0.1U
15 PCIE_RXP0 PERp0 RCLKEN CPPE# 3.3VAUX_IN +3VSUS
23 19 17 *0.1U
GND_3 RCLKEN AUX_OUT 3VAUX
A 15 PCIE_TXN0 24 PETn0 20 OC# A
25
NC1
NC2
NC3
NC4
15 PCIE_TXP0 PETp0
w
26 GND_4 1.5V_IN1 15 +1.5V
1.5V_IN2 16
*NEW_CARD_SLOT 13 1.5V_NEWCARD
27
28
29
30
1.5V_OUT1
9 NC 1.5V_OUT2 14
GND 10
C TEST modified ESD *TPS2231
A B C D

Toshiba Laptop Schematic Diagram

Uploaded by

Document Information

Copyright

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Toshiba Laptop Schematic Diagram

Uploaded by

Copyright:

5 4 3 2 1

DISCHARGE SODIMM1 S-VIDEO

PCLK_7411 C122 *10P

R281 0 CG_BSEL1 R282 1K

R294 R289 R318

B18 THERMDA 5 DINV#1 J26 AD20 DINV#3 5

NMI LINT0 ITP_CLK0 T25

VCCP R24 1K/F H_GTLREF AD26 C5 H_TEST1

TCK R109 27.4

R100 200 6648VCC

PREQ# R103 56 C162

AF15 VSS70 VSS167 R22

HD36# BREQ0# HBREQ0# 3 10 CLK_SDRAM3# SM_CK3#

R59 R343 R64 24.9/F HXRCOMP R353

EXP_TXP15 W36 CFG17 : Reserved

DDR SYSTEM MEMORY B

SADQ26 SA_DQS4# SBDQ35 SB_MA4

VCC_DDRDLL VCCA_SM0 VTT29

AP8 VTT21 K10

AD11 VTT16 T10

Note: All VCCSM pins

AE16 VCCA_CRTDAC0 F19

AH25 VCC45 V18

AP25 VCC39 T20

AD28VCCSM3 VCC26 K27

Note: All VCCSM pins

AH37VCCSM1 VCC24 M27

H17 VCCDQ_TVDAC VCC11

D19 VCCD_TVDAC VCC10 P28

G18 VSSA_TVBG VCC8

H18 VCCA_TVBG VCC7

VCC_NCTF51 VSS_NCTF41 VSS101 VSS237

N26 VCC_NCTF6 L33 VSS56 AJ11

VCC_NCTF1 VTT_NCTF14 T33 VSS51

AC14VCCSM_NCTF25 VTT_NCTF5 P13 AB34VSS42 AN14

AD16VCCSM_NCTF20 VTT_NCTF0 B35 VSS37

AC17VCCSM_NCTF19 D35 VSS36

AC22VCCSM_NCTF9 P35 VSS26

AD24VCCSM_NCTF4 W35 VSS21

AC26VCCSM_NCTF1 C36 VSS18

75 DQ27 DQ31 76 75 DQ27 DQ31 76

ESD PORTECTION CRT PORT CRTVDD_5V

+2.5V R162 2.2K

+2.5V R207 2.2K

CDDCDATA 1 3 *33P *33P *33P *33P

CRT SWITCH TV-OUT

SEL FUNCTION(COM) C TEST Modified

24 PR_HSYNC 3 2Y 1Y 6 CRTHS_VGA C TEST Modified

PANEL VCC CONTROL

BLON 1 CN20 L13

LID CC0805 CC0805

FPBACK# 2 VADJ L51 BK1608HS121-T VADJ_1

MMBT3904 AD19 L6 F7 REQ4#

G3 AD20 REQ5#/GPI1 E8 T103

H5 AD23 GNT0# C1 GNT0# 28

+3V R255 8.2K C492 3900P

PDD5 DD4 SATA0_TXN SATA_TXP0_C SATA_TXP0_C SATA_TXP0

PDD6 AD11 DD6

PIORDY AF16 F11 R27 33

USBP5+ D21 B20 USBP2+

2 SRC_ICH# SRC_ICH# AD25 F24

T87 K24 HSIP1 HSIP3 P23

AC5 RSVD1 RSVD6 AD9

C167 *NC7WZ14P6X *NC7WZ14P6X

3V_S5 C346 C348

C433 C357 C447 C410 0.1U 0.1U

0.1U 0.1U 0.1U 0.1U

CDDCDATA 1 3 33P 33P 33P 33P

C167 NC7WZ14P6X NC7WZ14P6X