a AN-545

APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com

Designing a Watt-Hour Energy Meter Based on the AD7750

INTRODUCTION
The AD7750 integrates two high resolution sigma-delta HPF DIGITAL F1
S -TO-
ADCs and the digital signal processing necessary to CH1 ADC
LPF FREQUENCY F2

implement an electrical energy measurement IC. All MULTIPLIER

signal processing (e.g., filtering and multiplication) is CH2 ADC DIGITAL

carried out in the digital domain. This approach provides S -TO- FOUT
FREQUENCY
a high degree of stability over time and temperature. The INSTANTANEOUS
POWER SIGNAL p(t) = v(t)xi(t)
AD7750 also incorporates two digital-to-frequency con- V3I
WHERE:
v(t) = V3cos(v3t)
INSTANTANEOUS
verters with a pulse output. The output pulse rate of the i(t) = I3cos(v3t)
V3I{1+cos(2v3t)} REAL POWER SIGNAL
p(t) =
digital-to-frequency converters is generated by accumu- V3I
2
2

lating real power over time and is therefore proportional V3I

to the average real power. The AD7750 has a range of
user selectable output frequencies that will accommo-
date most meter constant requirements. One of the
digital-to-frequency converters produces a high frequency
output called FOUT. This output is provided for calibration
purposes.
THEORY OF OPERATION
The two ADCs digitize the voltage signals from the
current and voltage transducers. These ADCs are 16-bit
second order sigma-delta with an over sampling rate of
900 kHz. This analog input structure greatly simplifies
transducer interfacing by providing a wide dynamic range
for direct connection to the transducer and also simplify-
ing the antialiasing filter design. A programmable gain
stage in the current channel further facilitates easy trans-
ducer interfacing. A high-pass filter in the current chan-
nel removes any dc component from the current signal.
This eliminates any inaccuracies in the real power calcu-
lation due to offsets in the voltage or current signals.
2
TIME
TIME
Figure 1. Real Power Calculation
The low frequency output of the AD7750 is generated by
accumulating this real power information. This low fre-
quency inherently means a long accumulation time be-
tween output pulses. The output frequency is, therefore,
proportional to the average real power. This average real
power information can in turn be accumulated (e.g., by a
counter) to generate real energy information. Because of
its high output frequency and hence shorter integration
time, the FOUT output is proportional to the instantaneous
real power. This is useful for system calibration purposes
which would take place under steady load conditions.
COUNTER
PSU
0005147
5V

AD7750
The real power calculation is derived from the instanta- ..101110..
ADC 1
neous power signal. The instantaneous power signal is PGA DIGITAL
..10110..
X -TO-
generated by a direct multiplication of the current and FREQUENCY
..101010..
voltage signals. In order to extract the real power compo- ADC 2
NEUTRAL

nent (i.e., the dc component) the instantaneous power

PHASE

signal is low-pass filtered. Figure 1 illustrates the instan- REVERSE CALIBRATION

taneous real power signal and shows how the real power POLARITY

information can be extracted by low-pass filtering the

instantaneous power signal. This scheme calculates real Figure 2. Basic Energy Meter Implementation
power correctly for nonsinusoidal current and voltage
waveforms at all power factors.
AN-545
Eliminating Offset Effects Again it can be seen that the real power is determined by
Figure 3 shows the effect of offsets on the real power extracting the dc component of the instantaneous power
calculation. As can be seen from Equation 1 below, an signal p(t).
offset on Channel 1 (IOS ) and Channel 2 (VOS) will contrib-
INSTANTANEOUS INSTANTANEOUS REAL
ute a dc component after multiplication. Since this dc POWER SIGNAL POWER SIGNAL
component is preserved by the LPF to generate the real
power information, the offsets will have contributed an
error to the real power calculation. This problem is easily V3I
2
avoided by enabling the HPF (i.e., pin ACDC is set logic
high) in Channel 1. By removing the offset from at least
one channel no error component can be generated at dc
by the multiplication. Error terms at cos(ω × t) and CURRENT
harmonics are removed by the LPF and digital-to- VOLTAGE

frequency conversion.
INSTANTANEOUS INSTANTANEOUS REAL
POWER SIGNAL POWER SIGNAL

p(t ) = VOS × IOS + VOS × I × cos(ω × t ) + IOS × V × VOLTAGE

cos(ω × t ) +
[ (
V × I × 1 + cos 2 × ω × t )] (1) V3I
2
cos(608 )

where:
p(t) = v(t) × i(t), CURRENT
608

v(t) = VOS + V cos(ω × t) and

i(t) = I OS + I × cos(ω × t) Figure 4. Effect of Channel Offsets on the Real Power
Calculation
Nonsinusoidal Waveforms
DC COMPONENT (INCLUDING ERROR TERM) IS
PRESERVED BY THE LPF FOR REAL POWER The method also holds true for nonsinusoidal current and
CALCULATION
voltage waveforms. All voltage and current waveforms in
VOS 3 IOS
a practical applications will have some harmonic content.
V3 I
2 Using the Fourier Transform instantaneous voltage and
current wave forms can be expressed in terms of their
IOS3 V harmonic content.
VOS3 I
∞
0 v 2v v (t ) = V0 + 2 × ∑Vh × sin(hωt + αh ) (2)
FREQUENCY – RAD/S h≠0

Figure 3. Effect of Channel Offsets on the Real Power where:

Calculation
v(t) is the instantaneous voltage
Power Factor Considerations V0 is the average value
The method used to extract the real power information Vh is the rms value of the voltage harmonic h and
from the instantaneous power signal (i.e., by low-pass α h is the phase angle of the voltage harmonic.
filtering) is still valid even when the voltage and current
signals are not in phase. Figure 4 shows the current ∞
signal lagging the voltage by 60° (Displacement Power i (t ) = I 0 + 2 × ∑ Ih × sin(hωt + βh ) (3)
Factor = 0.5). If we assume the voltage and current h≠0

waveforms are sinusoidal, the instantaneous power sig- where:

nal is given by:
i(t) is the instantaneous current
I0 is the dc component
p(t ) = V cos(ωt ) × I cos(ωt – 60 °)
Ih is the rms value of the current harmonic h and
βh is the phase angle of the current harmonic.

p(t ) =
[
V × I cos(60 °) + cos(2 ωt – 60 °) ] Using Equations 2 and 3, the real power, P, can be
expressed in terms of its fundamental real power (P1) and
2
harmonic real power (PH).

P = P1 + PH

–2–
 AN-545
where: the outputs F1 and F2 operate at a much lower frequency
P1 = V1 × I1cosφ1 significant averaging of the instantaneous real power
(4) signal is carried out. The result is a greatly attenuated
φ1 = α1 – β1
sinusoidal content and a virtually ripple free frequency
and
output.
∞
PH = ∑Vh × Ihcos φh F1
h =1
(5)

FREQUENCY
φh = αh − βh DIGITAL F1
V S -TO-
F2
FREQUENCY
LPF
Since we have already shown the real power calculation MULTIPLIER TIME
FOUT
to be valid in the case of a pure sinusoidal signal, the
I DIGITAL

FREQUENCY
same must hold true for each sinusoidal component of S -TO- FOUT
LPF TO PRESERVE FREQUENCY
the harmonic real power term. Hence the real power is REAL POWER
(DC TERM)
V3I
correctly computed for nonsinusoidal voltage and cur- 2
cos(2v3t)
rent waveforms. ATTENUATED TIME
BY LPF

Note that the input bandwidth of the analog inputs is

0 v 2v
3.5 kHz with a master clock frequency of 3.5795 MHz. FREQUENCY – RAD/S

INSTANTANEOUS REAL POWER SIGNAL–

Digital-to-Frequency Conversion FREQUENCY DOMAIN

As previously described, the digital output of the low-

pass filter after multiplication contains the real power
information. However, since this LPF is not an ideal "brick
wall" filter implementation, the output signal also con-
tains attenuated components at the line frequency and its
harmonics, cos (h × ω × t), where h = 1, 2, 3, . . . etc., where
cos (ωt) is the line frequency.
The dominating harmonic will be at twice the line fre-
quency. This is due to the instantaneous power signal.
Figure 5 shows the instantaneous real power signal,
which still contains a significant amount of instantaneous
power information. This signal is then passed to the
digital-to-frequency converter where it is integrated (ac-
cumulated) over time in order to produce an output
frequency. This accumulation of the signal will suppress
or average any non-dc components in the instantaneous
real power signal. The average value of a sinusoidal
signal is zero. Hence the frequency generated by the
AD7750 is proportional to the average real power. Figure
5 shows the digital-to-frequency conversion for steady
load conditions, i.e., constant voltage and current. As can
be seen in the diagram, the frequency output, FOUT, is
seen to vary over time, even under steady load condi-
tions. This frequency variation is primarily due to the
cos(2 × ω × t) component in the instantaneous real power
signal. The output frequency on FOUT can be up to 32 times
higher than the frequency on F1 and F2.
This higher output frequency is generated by accumulat-
ing the instantaneous real power signal over a much
shorter time while converting it to a frequency. This
shorter accumulation period means less averaging of the
cos (2 × ω × t) component. As a consequence, some of this
instantaneous power signal passes through the digital-
to-frequency conversion. This will not be a problem in the
application—see Calibrating the Energy Meter. Because
Figure 5. Digital-to-Frequency Conversion of the Real
Power
ENERGY METER IMPLEMENTATION
In the following example the AD7750 will be used to
implement an Active Energy Meter. As explained before,
the frequency outputs F1 and F2 have a pulse rate that is
proportional to the average real power. This power is
accumulated to give an indication of energy used by
storing these output pulses. For example the F1 and F2
pulses can be used to drive a mechanical counter. For the
purpose of this example some basic assumptions will be
made about the operating environment of the Energy
Meter.
• Line Voltage is 220 V rms @ 50 Hz
• The Basic Current (Ib) of the Meter is 5 A rms
• The Meter Rating is 100 imp/kWhr
The analog inputs of the AD7750 are voltage inputs. They
have a maximum differential input signal range of 2 V
peak in the case of Channel 1 (or 125 mV peak with a Gain
of 16) and 1 V peak for Channel 2. With its high-
pass filter and PGA (programmable gain amplifier) Chan-
nel 1 is intended to be used with a current transducer. One
of the simplest current transducers available is a resistor
or shunt. The voltage across the shunt is directly propor-
tional to current through it. For this example a 400 µΩ
shunt will be used. By biasing the meter around the live
(or phase) wire the voltage transducer is greatly simpli-
fied. A simple resistor divider network can be used to
provide the attenuation needed on the voltage channel.
Figure 6 shows a simplified implementation of a meter.
The frequency outputs are used to drive an electrome-
chanical counter. The counter is based on a two-phase
stepper motor. The nonoverlapping active low pulse
outputs of the AD7750 are specifically designed to drive
such a counter. However any impulse counter may be

–3–
AN-545
used. The active high logic output FOUT is used to drive an The output frequency at the basic current (Ib) of 5 A is
LED for calibration purposes. A calibration constant of calculated as follows:
3200 imp/kWhr will be used. This calibration constant of Meter Constant = 100 imp/kWhr
32× the meter constant (100 imp/kWhr) is selected by the
100 imp/hr = 0.02777 Hz
logic inputs FS, S1 and S0—see Table I in the AD7750 data
Watts at Ib = 5 A × 220 V = 1.1 kW
sheet.
Frequency at Ib = 0.02777 Hz × 1.1 = 0.03055 Hz
+5V
0005147 The shunt size selected is 400 µΩ; therefore, the rms
R f1 voltage signal on Channel 1 with a current of 5 A is easily
VDD F1
C f1
V1+
100imp/kWhr calculated as 400 µΩ × 5 A = 2 mV rms.
400mV F2
R f1 AD7750 3200imp/kWhr
V1– FOUT The gain in Channel 1 should be set to 16 to compensate
C f1
REVP for the small signal level across the shunt. The AD7750
REFIN G1 Mode 6 operation is selected by setting FS = S2 = 1 and
REFOUT ACDC S1 = 0. This selects a Power Measurement Mode and an
Ra Rc FS +5V
C f2
V2+ FOUT frequency that is 32 times the F1 and F2 frequency.
S2
R f2 S1
This will give the required meter calibration constant of
NEUTRAL

Rb XTAL
V2– 3200 imp/kWhr. The signal level on Channel 2 is calcu-
PHASE

3.5795MHz
C f2
33pF lated using the AD7750 equation. This will give the
AGND DGND
33pF
attenuation needed on the resistor divider network to
PSU +5V adjust the AD7750 output frequency to 100 imp/kWhr.
MOV
Freq = 0.03055 (Hz) @ Ib
220V V1 = 0.002 (Volts) @ Ib

Figure 6. Simplified Schematic of Meter V2 = ? (Volts)

Implementation Gain = 16
VREF = Nominal Value of 2.5 V Selected
Meter Design Equation
The output frequency (on F1 and F2) of the AD7750 is FMAX = 13.6 Hz , Mode 6 Selected—see Table I AD7750
given by the equation: Data Sheet
1.32 × V 1 × V 2 × Gain × FMAX From Equation 6, the required voltage on Channel 2 is
Freq = 2 (6)
VREF calculated as 332 mV. Given a nominal line voltage of
220 V the required attenuation on the voltage channel is
where: 1/663.
Freq = Output frequency on F1 and F2 (Hz) Selecting Components for the Resistor Divider Network
V1 = Differential rms voltage signal on Channel 1 To understand some of the issues behind the choice of
(volts) passive components for the resistor divider network,
the functionality of the antialias filters first needs to be
V2 = Differential rms voltage signal on Channel 2
understood.
(volts)
Gain = 1 or 16, depending on the PGA gain selection The Antialias Filters
made using logic input G1 As mentioned in the introduction, the sigma-delta modu-
lators, or specifically their high oversampling ratio, sim-
VREF = The reference voltage (2.5 V ± 8%) (volts) plify the design of the antialias filters on the analog
FMAX =
One of two possible frequencies selected by inputs. An antialias filter is required on the analog inputs
using the logic input FS—see Table I AD7750 of an ADC to prevent signals above the Nyquist frequency
Data Sheet (i.e., half the sampling rate) of the ADC from being aliased
This equation shows how the output frequency of the into the band of interest. In this case the band of interest
AD7750 is related to the product of the of the rms signals is approximately dc to 2 kHz. Figure 7 shows how signals
on Channel 1 and Channel 2. Since the meter constant has can be aliased into this band of interest.
been defined, the required output frequency is easily
calculated.

–4–

ALIASING EFFECTS
IMAGE
FREQUENCIES
0 2k 450k
FREQUENCY – Hz
Figure 7. Aliasing of High Frequency Components after
Sampling
The oversampling rate of the AD7750 is approximately
900 kHz. This means that frequencies above 450 kHz (i.e.,
the Nyquist frequency) are aliased after sampling. As can
be seen from Figure 7, only those frequencies near
900 kHz will appear in the band of interest (dc to
2 kHz). Therefore, the function of the antialias filter is to
attenuated these high frequency components.
When selecting the f –3 dB (or corner frequency) of the
antialias filters the following considerations must be kept
in mind.
1. The filter must attenuate any high frequency signals
to prevent aliasing.
2. f–3 dB must not be so low as to cause phase mis-
matches between Channel 1 and Channel 2 due to
poor component tolerances etc.
Phase Response of the Antialias Filters
By selecting a corner frequency of approximately 10 kHz
an attenuation of some 40 dB is achieved at 1 MHz using
a simple RC filter. This should satisfy the antialias re-
quirements. The Magnitude and Phase responses of this
simple RC filter are shown in Figures 8 and 9. The corner
frequency of the filter is set at 9.6 kHz.
0
9.6kHz, –3dB
dBs
–20
–40
1 100 10k
FREQUENCY – Hz
Figure 8. Magnitude Response of RC Filter
(f–3 dB = 9.6 kHz)
Figure 9 shows that the filter introduces a phase lag of
0.297° at 50 Hz. This phase lag is not significant if the
antialias filters on Channel 1 and Channel 2 are matched.
However, due to component tolerances etc., the f–3 dB may
vary slightly from filter to filter. The f–3 dB is selected to be
AN-545
high enough so that the phase response variation at 50 Hz
is kept minimal. For example, with a +10% variation in
both the R and C values, the phase response at 50 Hz is
now –0.359°. This results in an increased phase lag of
0.062° at 50 Hz. The error seen in the power calculation
due to this phase mismatch will be greatest at low PF
(Power Factor). For example at PF = 0.5 the error would be
900k
cos(60.062°)/cos(60°) × 100% = 0.2%.
This error is greatly reduced by selecting passive compo-
nents with tighter tolerance for the antialiasing networks.
0
50Hz, –0.2978
PHASE – Degrees
–0.2
–0.4
–0.6
1 10 100 1k
FREQUENCY – Hz
Figure 9. Phase Response of RC Filter (f –3 dB = 9.6 kHz)
— Phase Lag of 0.297° at 50 Hz
Attenuation Network
The same phase matching concerns must be taken into
account when selecting components for the attenuation
network for Channel 2. First, the resistance values used
must be large enough to reduce the power dissipation in
the attenuation network. Second, care must be taken to
ensure that the frequency response of the attenuation
network is the same as the antialias filters used on
Channel 1.
Figure 10 shows a typical network that could be used to
provide the necessary attenuation of the line voltage for
Channel 2. The topology of the network was chosen to
ensure minimal effect on the phase response of the
network due to calibration. The attenuation ratio is ad-
justed by varying Rb. Varying Rb will, of course, cause the
frequency response of the network to vary and this is
what must be minimized. The effective resistance of the
network is given by Rc plus the parallel combination of Ra
and Rb. Because the required attenuation is always high
1M
(1/663 is this case), the effective resistance is approxi-
mated by Rb + Rc if Rb << Ra. Now, by keeping Rb much
smaller than Rc, the effect on the frequency response will
be minimized.
The f–3 dB of the network is 9.6 kHz and this is achieved by
using a 3.3 nF capacitor and an effective resistance
of 5 kΩ. Rc is chosen to be 4.5 kΩ and Rb is, therefore,
500 Ω. In order to achieve the required attenuation Ra is
–5–
AN-545
selected to be 330 kΩ (Rb × 663). Note: Rb cannot be made Adjusting the resistance value in order to calibrate the
much smaller as this would mean a smaller value of Ra meter does affect the f–3 dB of the network. In the example
and increased power dissipation. shown the worst case phase error at 50 Hz is when the
effective resistance is at its highest value. For the ex-
Rf1 V1+ ample shown in Figure 11 the worst case effective resis-
Cf1 tance is 5.25 kΩ. The phase response is give by:

E3397–1–7/98
Rf1 V1–
–tan–1(2 × π × 50 Hz × 5.25 kΩ × 3.3 nF) = –0.312°
Cf1
H(f) = Rb 3 1
Rb + Ra 1 + sCR* Assuming an ideal phase lag of –0.297° on Channel 1, this
*R = Rc + Ra 3 Rb
H(f)
V2+
means a maximum error of 0.015° due to calibration. The
Ra* Rc* Rb + Ra
worst case power calculation error would be seen at
Rb* C
PF = 0.5,
NEUTRAL

V2–
PHASE

Rf2 Cf2 i.e., cos(60.015°)/cos(60°) × 100% = 0.05%

220V It should be possible to calibrate the meter by calibrating

Figure 10. Phase Considerations for the Attenuation
Network
Calibrating the Energy Meter
As previously mentioned, the energy meter is calibrated
by adjusting the value of Rb. The energy meter will need
to be calibrated to remove errors due to component
tolerances and the AD7750 on-chip reference tolerance of
±8%. Remember that the attenuation ratio for the resistor
divider on Channel 2 was calculated using the nominal
reference voltage of 2.5 V. However, a reference toler-
ance of ±8% produces a gain error of approximately
±16%. In addition, budgeting for inaccuracies in the cur-
rent transducer of ±10% means that a trim range of at
least ±30% should be provided in the design. Figure 11
shows the component choice for this example. A calibra-
tion range of ±50% has been provided in this example.
330kV 4.5kV
0.33V
250V
5kV
NEUTRAL
the output frequency at only one point. In order to cali-
brate as accurately as possible, the meter should not be
calibrated near the upper end of its current rating. With a
large current load, the output frequency will be high.
Therefore the ripple of the FOUT frequency will be larger—
see Digital-to-Frequency Conversion. Unless a signifi-
cant amount of averaging is carried out, the small error
introduced by calibration at this point may become sig-
nificant with small current loads. Also, in order to make
the calibration as quick as possible, it is preferable not to
calibrate with a very small load. A good calibration point
would be Ib. In the case of this example the value of Rb
(Figure 10) would be adjusted until the mean frequency
on FOUT is 32 × 0.03055 Hz or 0.9776 Hz. As described in the
Digital-to-Frequency Conversion section, the frequency
output on FOUT will have some ripple as a result of the
instantaneous power signal. This ripple is due to a purely
sinusoidal component in the real power signal and is
V2+ easily removed by averaging the FOUT frequency. There-
3.3nF fore, it is recommended to average the FOUT frequency by
V2–
recording some 10 to 20 pulses and calculating the aver-
3.3nF
age frequency. This will greatly improve the accuracy of

PHASE

500V the calibration.

500V = 1
330kV + 500V 661
220V
500V
NOMINAL

Figure 11. Component Choice for the Attenuation

PRINTED IN U.S.A.
Network

–6–