LOVELY INSTITUTE OF MANAGEMENT

NAME: SAGAR KAPOOR

ROLL NUMBER: 7114233721

CLASS: BCA 6TH Sem, Sec ‘C ’

SUBMITTED TO : Lect. NeelKamal Randhawa

TOPIC:

AMD PROCESSOR RANGE

CONTENTS

• WHAT IS A PROCESSOR

• AMD PROCESSOR

• ARCHITECTURE OF AMD PROCESSOR

• AMD PROCCESOR RANGE

 AMD ATHLON X2 DUAL CORE PROCESSORS

 AMD PHENOM PROCESSOR

 AMD OPTERON PROCESSOR

 AMD DURON PROCESSOR

 AMD TURION PROCESSOR

• SUMMARY
 WHAT IS A PROCESSOR?

The processor is the portion of a computer system that carries out the instructions of
a computer program, and is the primary element carrying out the computer's
functions. This term has been in use in the computer industry at least since the early
1960s . The form, design and implementation of CPUs have changed dramatically
since the earliest examples, but their fundamental operation remains much the same

The processor (called CPU, for Central Processing Unit) is an electronic circuit that
operates at the speed of an internal clock thanks to a quartz crystal that, when
subjected to an electrical currant, send pulses, called "peaks". The clock
speed (also called cycle), corresponds to the number of pulses per second, written
in Hertz (Hz). Thus, a 200 MHz computer has a clock that sends 200,000,000 pulses
per second. Clock frequency is generally a multiple of the system frequency
(FSB, Front-Side Bus), meaning a multiple of the motherboard frequency.

With each clock peak, the processor performs an action that corresponds to an
instruction or a part thereof. A measure called CPI (Cycles Per Instruction) gives a
representation of the average number of clock cycles required for a microprocessor
to execute an instruction. A microprocessors power can thus be characterized by the
number of instructions per second that it is capable of processing. MIPS(millions of
instructions per second) is the unit used and corresponds to the processor frequency
divided by the CPI.

AMD PROCESSORS

AMD stands for ADVANCED MICRO DEVICES is an American multinational

semiconductor company based in Sunnyvale, California, that develops computer
processors and related technologies for commercial and consumer markets. Its main
Product is motherboard chipsets, embedded processors and graphics processors for
servers, workstations and personal computers, and processor technologies
for handheld devices, digital television, automobiles, game consoles, and
other embedded systems applications.

AMD Athlon processors are the world’s most powerful x86 processors, outperforming
Intel’s Pentium® III processor and delivering the highest integer, floating point and
3D multimedia performance for applications running on x86 system platforms.1 The
AMD Athlon processors provide industry-leading processing power for cutting-edge
software applications, including digital content creation, digital photo editing, digital
video, image compression, video encoding for streaming over the Internet, soft DVD,
commercial3Dmodeling, workstation-class computer-aided design (CAD),
commercial desktop publishing, and speech recognition. They also offer the
scalability and “peace-of-mind” reliability that IT managers and business users
require for networked enterprise computing.

AMD Athlon processors are members of a new family of seventh-generation AMD

processors designed to meet the computation-intensive requirements of cutting-edge
software applications running on high-performance desktop systems, workstations,
and servers. With the introduction of the AMD Athlon processor with performance-
enhancing cache memory, AMD continues to deliver superior solutions for high-
performance computing.

AMD Athlon processors feature the industry’s first seventh-generation x86

microarchitecture, which is designed to support the growing processor and system
bandwidth requirements of emerging software, graphics, I/O, and memory
technologies.The high-speed execution core includes multiple x86 instruction
decoders, a dual-ported large 128KB split-L1 cache, a large 256KB2 or 512KB L2
cache, three independent integer pipelines, three address calculation pipelines, and
the x86 industry’s first superscalar, fully pipelined, out-of-order, three-way floating
point engine.

The AMD Athlon processor’s microarchitecture incorporates enhanced 3DNow!™

technology, a high-performance cache architecture, and a 200MHz, 1.6-
Gigabyte/sec system bus—the first bus of its kind for x86 system platforms. Based
on the Alpha EV6 interface protocol licensed from Digital Equipment Corporation, the
AMD Athlon processor system bus combines the latest technological advances, such
as point-to-point topology, source synchronous packet-based transfers, and low-
voltage signaling, to provide the most powerful, scalable bus available for any x86
processor.

ARCHITECTURE OF AMD64 PROCESSOR

AMD designed a 64-bit PC processor that offers industry-leading performance and

native compatibility with current 32-bit applications. Architectural improvements
specifically designed to increase instructions per clock (IPC) include:

• AMD64

When utilizing the AMD64 Instruction Set Architecture, 64-bit mode is designed to
offer:

Support for 64-bit operating systems to provide full, transparent, and simultaneous
32-bit and 64-bit platform application multitasking. A physical address space that
can support systems with up to one terabyte of installed RAM, shattering the 4
gigabyte RAM barrier present on all current x86 implementations. Sixteen 64-bit
general-purpose integer registers that quadruple the general purpose register space
Available to applications and device drivers.Sixteen 128-bit XMM registers for
enhanced multimedia performance to double the register space of any current
SSE/SSE2 implementation.
• Integrated DDR memory controller

 This feature allows for a reduction in memory latency, thereby increasing

overall system

• An advanced Hyper Transport link

 This feature dramatically improves the I/O bandwidth, enabling much faster
access to peripherals such as hard drives, USB 2.0, and Gigabit Ethernet
cards.

• Very large level one (L1) and level 2 (L2) on-die cache

 With 128 kbytes of L1 cache and 1 Mbyte of L2 cache, the AMD Athlon 64
processor is able to excel at performing matrix calculations on arrays.
 Programs that use intensive large matrix calculations will benefit from fitting
the entire matrix in the L2 cache.

• Processor core clock-for-clock improvements

 These features drive improvements to the IPC, by delivering a more efficient

pipeline for CPU intensive applications.
 CPU-intensive games like Comanche 4 and Unreal Tournament benefit
from these core improvements.

• 64-bit processing

 A 64-bit address and data set enables the processor to process in the
terabyte space.
 Many applications improve due to the removal of the 32-bit collar.
 AMD PROCESSORS RANGE
There Exist Various Range Of Amd Processors According To their Type And
Configurations Which Are As Follows:

1)AMD ATHLON X2 DUAL CORE PROCESSORS:

The Athlon 64 X2 is the first dual-core desktop CPU designed by AMD. It is

essentially a processor consisting of two Athlon 64 cores joined together on
one die with additional control logic. The cores share one dual-channel memory
controller, are based on the E-stepping model of Athlon 64 and, depending on the
model, have either 512 or 1024 KB of L2 Cache per core. The Athlon 64 X2 is
capable of decoding SSE3 instructions (except those few specific to Intel's
architecture), so it can run and benefit from software optimizations that were
previously only supported by Intel chips. This enhancement is not unique to the X2,
and is also available in the Venice and San Diego single core Athlon 64s.

The main benefit of dual-core processors like the X2 is their ability to process
more software threads at the same time. The ability of processors to execute
multiple threads simultaneously is called thread-level parallelism (TLP). By placing
two cores on the same die, the X2 effectively doubles the TLP over a single-core
Athlon 64 of the same speed. The need for TLP processing capability is dependent
on the situation to a great degree, and certain situations benefit from it far more than
others. Certain programs are currently only written with one thread, and are therefore
unable to utilize the processing power of the second core.

2)AMD PHENOM PROCESSOR:

Phenom is the AMD desktop processor line based on the K10 (not "K10h")
microarchitecture, or Family 10h Processors, as AMD calls them. Triple-core
versions (codenamed Toliman) belong to the Phenom 8000 series and quad cores
(codenamed Agena) in the AMD Phenom X4 9000 series.

AMD considers the quad core Phenoms to be the first "true" quad core design, as
these processors are a monolithic multi-core design (all cores on the same piece of
silicon die), unlike Intel's Core 2 Quad series which are a multi-chip module (MCM)
design. The processors are on the Socket AM2+ platform.

Before Phenom's original release, a flaw was discovered in the translation lookaside
buffer (TLB) that could cause a system lock-up in rare circumstances. Phenom
processors up to and including stepping "B2" and "BA" are affected by this bug.
BIOS and software workarounds disable the TLB, and typically incur a performance
penalty of at least 10%. This penalty was not accounted for in pre-release previews
of Phenom, hence the performance of early Phenoms delivered to customers is
expected to be less than the preview benchmarks. "B3" stepping Phenom processors
were released March 27, 2008 without the TLB bug and with "xx50" model numbers.

3)AMD OPTERON PROCESSOR:

The Opteron is AMD's x86 server and workstation processor line, and was the first
processor to implement the AMD64 instruction set architecture (known generically
as x86-64). It was released on April 22, 2003 with the SledgeHammer core (K8) and
was intended to compete in the server and workstation markets, particularly in the
same segment as the Intel Xeon processor. Processors based on the AMD
K10 microarchitecture (codenamed Barcelona) were announced on September 10,
2007 featuring a new quad-core configuration.

The Main Two Features Include:

1. native execution of legacy x86 32bit applications without speed

penalties
2. native execution of x86-64 64-bit applications

The first capability is notable because at the time of Opteron's introduction, the only
other 64-bit architecture marketed with 32-bit x86 compatibility (Intel's Itanium)
ran x86 legacy-applications only with significant speed degradation. The second
capability, by itself, is less noteworthy, as major RISC architectures such as
(SPARC, Alpha, PA-RISC, PowerPC, MIPS) have been 64-bit for many years. In
combining these two capabilities, however, the Opteron earned recognition for its
ability to run the vast installed base of x86 applications economically, while
simultaneously offering an upgrade-path to 64-bit computing.
The Opteron processor possesses an integrated memory controller supporting DDR
SDRAM, DDR2 SDRAM or DDR3 SDRAM (depending on processor generation).
This both reduces the latency penalty for accessing the main RAM and eliminates
the need for a separate northbridge chip.

The main other feature it includes:

MULTIPROCESSOR: In multi-processor systems (more than one Opteron on a

single motherboard), the CPUs communicate using the Direct Connect Architecture
over high-speed HyperTransport links. Each CPU can access the main memory of
another processor, transparent to the programmer. The Opteron approach to multi-
processing is not the same as standard symmetric multiprocessing; instead of having
one bank of memory for all CPUs, each CPU has its own memory. Thus the Opteron
is a Non-Uniform Memory Access (NUMA) architecture. The Opteron CPU directly
supports up to an 8-way configuration, which can be found in mid-level servers.
Enterprise-level servers use additional (and expensive) routing chips to support more
than 8 CPUs per box.

In a variety of computing benchmarks, the Opteron architecture has demonstrated

better multi-processor scaling than the Intel Xeon. This is primarily because adding
an additional Opteron processor increases memory bandwidth, while that is not
always the case for Xeon systems, and the fact that the Opterons use a switched
fabric, rather than a shared bus. In particular, the Opteron's integrated memory
controller allows the CPU to access local RAM very quickly. In contrast,
multiprocessor Xeon system CPUs share only two common buses for both
processor-processor and processor-memory communication. As the number of
CPUs increases in a typical Xeon system, contention for the shared bus causes
computing efficiency to drop. Intel is migrating to a memory architecture similar to the
Opteron's for the Intel Core i7 family of processors and their Xeon derivatives.

4)AMD DURON PROCESSOR:

The AMD Duron was an x86-compatible computer processor manufactured
by AMD. It was released on June 19, 2000 as a low-cost alternative to AMD's
own Athlon processor and the Pentium III and Celeron processor lines from
rival Intel. The Duron was discontinued in 2004 and succeeded by the Sempron.

The Duron was pin-compatible with the Athlon and carried all of the computational
resources from it, operating on the same motherboards in most cases. The original
Duron was limited to operating on a 100 MHz front-side bus speed (FSB 200), while
the Athlon at the time could run on a bus clock of 133 MHz (FSB 266). Later Durons
supported a 133 MHz bus (FSB 266) while Athlon XP ran at 166/200 MHz FSB (FSB
333/400). The original Duron, using the "Spitfire" core, was manufactured in 2000
and 2001 at speeds ranging from 600 to 950 MHz. It was based on the 180 nm
"Thunderbird" Athlon core. The second-generation Duron, the "Morgan" core, was
sold in speed grades between 900 and 1300 MHz, and was based on the 180 nm
"Palomino" Athlon XP core. As a result, it featured a few important enhancements
namely full Intel SSE support, enlarged TLBs, hardware data prefetch, and an
integrated thermal diode. Like the "Palomino" core, "Morgan" was also expected to
reduce the core heat dissipation, however in "Morgan"'s case this did not happen
due to its increased core voltage. The final generation Duron was called "Applebred",
sometimes called "Appalbred", and was based on the "Appaloosa" Duron along with
the 130 nm "Thoroughbred" Athlon XP. "Appaloosa" was never officially announced but it
did see very limited circulation.

Duron's biggest difference from Athlon was its reduction in cache size to 64 KB, in
contrast to the 256 KB or even 512 KB of Athlon. This was a relatively tiny amount of
L2 cache, even smaller than the 128 KB L2 on Intel's Celeron. However, the K7-
architecture enjoyed one of the largest L1 caches, at 128 KB (split 64+64 KB). And,
with the arrival of the socketed Athlon/Duron chips, AMD switched to an exclusive
cache design which did not mirror data between the L1 and L2 like the inclusive
cache used on the Slot A K7, a critical feature in a low-cache situation. An exclusive
design greatly favors L1 cache as the primary caching resource, while the slower L2
cache stores victim or copy-back cache blocks to be written back to main memory
(LRU). The L2 cache essentially acts as an overflow from the L1 cache. Because of
the lack of duplication between caches, Duron can be said to have 192 KB cache
onboard, whereas an inclusive chip such as Athlon Slot-A, with 512 KB L2, would
only have, in practice, 512 KB total (640K-128K). Celeron was in the same boat with
its inclusive cache for a total of 128 KB (160K-32K).

5)AMD TURION PROCESSOR:

Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete
with Intel's Core and Core 2CPUs. The Turion 64 X2 was launched on May 17,
2006[2], after several delays. These processors use Socket S1, and
feature DDR2 memory. They also include AMD Virtualization Technology and more
power-saving features.

AMD first produced the Turion 64 X2 on IBM's 90 nm Silicon on insulator (SOI)

process (cores with the Taylor codename). As of May 2007, they have switched to
a 65 nm Silicon-Germanium stressed process which was recently achieved through
the combined effort of IBM and AMD, with 40% improvement over comparable
65 nm processes. The earlier 90 nm devices were codenamed Taylor and Trinidad,
while the newer 65 nm cores have codename Tyler.

Turion 64 X2 Ultra (codenamed Griffin) is the first processor family from AMD solely
for the mobile platform, based on the Athlon 64 (K8 Revision G) architecture with
some specific architectural enhancements similar to current Phenom processors
aimed at lower power consumption and longer battery life. The Turion Ultra
processor was released as part of the "Puma" mobile platform in June 2008.

The Turion Ultra is a dual-core processor to be fabricated on 65 nm technology using

300 mm SOI wafers. It will support DDR2-800 SO-DIMMs and features a DRAM
prefetcher to improve performance and a mobile-enhanced northbridge (memory
controller, HyperTransport controller, and crossbar switch). Each processor core
comes with 1 MiB L2 cache for a total of 2 MiB L2 cache for the entire processor.
This is double the L2 cache found on the current Turion 64 X2 processor. Clock
rates range from 2.0 GHz to 2.4 GHz, and thermal design power (TDP) will range
from 32 watts to 35 watts.

A new feature of the Turion Ultra processor is that it implements three voltage
planes: one for the northbridge and one for each core. This, along with
multiple phase-locked loops (PLL), allows one core to alter its voltage and operating
frequency independently of the other core, and independently of the northbridge.
Indeed, in a matter of microseconds, the processor can switch to one of 8 frequency
levels and one of 5 voltage levels. By adjusting frequency and voltage during use,
the processor can adapt to different workloads and help reduce power consumption.
It can operate as low as 250 MHz to conserve power during light use.

Additionally, the processor features deep sleep state C3, deeper sleep state C4
(AltVID), and HyperTransport 3.0 up to 2.6 GHz, or up to 41.6GB/s bandwidth per
link at 16-bit link width and dynamic scaling of HT link width down to 0-bit
("disconnected") in both directions from and to the chipset for four different usage
scenarios . It also implements multiple on-die thermal sensors through integrated
SMBUS (SB-TSI) interface (replaces and eliminates the thermal monitor circuit chip
through SMBUS in its predecessors) with additional MEMHOT signal sent from
embedded controller to the processor, and reduces memory temperature.

The Turion Ultra processor will share the same socket S1 as its predecessor (Turion
64 X2) but will not have the same pinout. It is designed to work with
the RS780M chipset.
Given the above enhancements on the architecture, the cores were minimally
modified and are based on the K8 instead of the K10 microarchitecture. AMD Fellow
Maurice Steinman has said the cores are almost transistor-for-transistor identical to
those found in the 65 nm Turion 64 X2 processors. This makes it more likely that
Turion Ultra will avoid the clock rate scaling difficulties present in AMD's K10
product.

SUMMARY
The processor is the portion of a computer system that carries out the instructions of
a computer program, and is the primary element carrying out the computer's
functions

AMD stands for ADVANCED MICRO DEVICES is an American multinational

semiconductor company based in Sunnyvale, California, that develops computer
processors and related technologies for commercial and consumer markets. Its main
Product is motherboard chipsets, embedded processors and graphics processors for
servers, workstations and personal computers, and processor technologies
for handheld devices, digital television, automobiles, game consoles, and
other embedded systems applications.

There Exist Various Range Of Amd Processors According To their Type And
configuration as:

AMD ATHLON X2 DUAL CORE PROCESSORS

AMD PHENOM PROCESSOR

AMD OPTERON PROCESSOR

AMD DURON PROCESSOR

AMD TURION PROCESSOR

So these are all about processor and their range of AMD.