http://www.unitysemi.com/technology-demonstration.

html

CMOx™ Memory Technology

According to the Wall Street Journal, a new memory technology, to be commercialised within two years, will take over from NAND flash which is seen to have scaling difficulties
after the 32nm generation.
After working in stealth mode for seven years,Unity Semiconductor is reported to be on the verge of taping out a 64Gbit memory which will scale to 20nm.

"We see ourselves in the two year horizon for production volumes of our first product, a 64 Gigabit storage class memory," said Unity Semiconductor chairman, president &
CEO, Darrell Rinerson, a former executive at Micron.
Unity, founded in 2002, says it has created the world's first passive rewritable crosspoint memory array that requires no transistors in a memory cell. Unity Semiconductor has
been processing 64K products for 2 years, 64Mbit products for 1 year, and is in design of a 64Gbit product that is now close to tape-out and slated for pilot production in 2H
2010, with volume production in 2Q 2011.

Unity has closed its Series C round of financing of $22m. The financing came primarily from August Capital, Lightspeed Venture Partners, and Morgenthaler Ventures and a
major hard disk drive (HDD) manufacturer, also a repeat investor. The latest round brings total funding to nearly $75m.
The company's says it has produced 'the world's first R/W passive cross-point memory array. There is no transistor in memory cell. It is a non-volatile, multi-layer, multi-cell
memory with 0.5F2 memory cell size and a fast write spead. The write speed is said to be between five and ten times faster than NAND.
'CMOx is a next-generation NVM technology based upon a Unity-proprietary switching effect that occurs in certain metal oxide combinations', says the web-site, 'the switching
concept is different from that used in today's flash technology. The memory effect of CMOx technology is based upon the movement of ionic charge carriers. CMOx can be
utilized to form a passive cross-point multi-layer memory array, as it does not require a transistor per cell. Other memory technologies, such as phase-change memory (PCM)
and magneto-resistive random access memory (MRAM), use a transistor per cell and are not amenable to the cross-point multi-layer chip architecture.
The site adds: 'The multi-layer cross-point array utilizes a resistance change element (although it's not a Resistive RAM (RRAM) memory cell such as is being developed by a
few other companies). Rather, in the CMOx technology, conduction is uniform across the device instead of being filamentary. The cross-point memory array architecture allows
for the densest memory devices of all the next-generation NVM technologies. Further, it enables the physical stacking of multiple layers of memory. Unity Semiconductor's
CMOx based designs use 4 physical layers of multi-level cell (MLC) memory, and is the key to increasing the density of its storage-class memory products. A proprietary next-
generation nonvolatile memory technology, CMOx will yield products with 4x the density and 5-10x the write speed of today's NAND flash.'
As well as manufacturing its own discrete memory products based on CMOx, the technology will be available for 'selective IP licensing' says Unity.
"The technology can be scaled below 20nm, says Unity, with a volumetric density better than 4bits/cell NAND. It uses less than 1 microamp of write
current per cell, has a 10x write performance and better endurance compared to NAND, and at a much lower cost," stated Alan Niebel, CEO of WebFeet Research.
Unity is looking at innovative business models. 'Key among these', states Unity, 'is the separation of the processing of the front-end-of-line (FEOL) CMOS base wafer from the
Back-end-of-line (BEOL) memory layer processing'.
'No new process technology is needed in the CMOS base wafer, which can be fabricated at a CMOS logic foundry with existing production capability and capacity on a trailing
edge CMOS (90 nm) process'.
'The BEOL memory concept enables a CMOS logic foundry to be in the memory business without taking significant risks associated with being in the memory business'.
'Unity Semiconductor's CMOS FEOL strategy allows it to be a moderate follower in CMOS transistor technology. Its shrink path is unconventional in that a higher density
memory core doesn't require base CMOS technology migration. Instead, Unity can use the same 90nm base CMOS for multiple generations, as well as use proven design IP to
reduce risk and time to market.'
Unity's BEOL Memory manufacturing strategy calls for it to form a joint venture partnership(s) for volume production with a top-tier IDM already in the memory business. This
joint-venture BEOL Memory manufacturing facility will procure the CMOS base wafers from existing CMOS logic foundries. The CMOx memory layers will then be deposited on
the CMOS base wafers in the joint venture BEOL memory fab.

Unity's CMOx memory technology, in a multi-layer cross-point array architecture using MLC, achieves an industry leading cell size of 0.5F2.
 CMOx™ is a next-generation NVM technology based upon a Unity-proprietary switching effect that occurs in certain metal oxide
combinations. The switching concept used by Unity in CMOx™ is different from that used in today’s flash technology. The memory effect of CMOx™ technology is based
upon the movement of ionic charge carriers. CMOx™ can be utilized to form a passive cross-point multi-layer memory array, as it does not require a transistor per cell.
Other memory technologies, such as phase-change memory (PCM) and magneto-resistive random access memory (MRAM), use a transistor per cell and are not
amenable to the cross-point multi-layer chip architecture.

Unity Semiconductor’s multi-layer cross-point array utilizes a resistance change element (although it’s not a Resistive RAM (RRAM) memory cell such as is being
developed by a few other companies). Rather, in the CMOx™ technology, conduction is uniform across the device instead of being filamentary. The cross-point memory
array architecture allows for the densest memory devices of all the next-generation NVM technologies. Further, it enables the physical stacking of multiple layers of
memory. Unity Semiconductor’s CMOx™ based designs use 4 physical layers of multi-level cell (MLC) memory, and is the key to increasing the density of its storage-
class memory products. A proprietary next-generation nonvolatile memory technology, CMOx™ will yield products with 4x the density and 5-10x the write speed of
today’s NAND flash.

Download the Unity Semiconductor paper presented at the 2008 NVMTS conference. The paper discusses the fundamental switching mechanism in conductive metal
oxides on which CMOx™ is based.

The 0.5F2 Memory Cell

Memory cells are often compared on the basis of a measure termed F2 , or “feature size squared”. The
F2measure permits comparison of memory cell sizes regardless of the process technology used for manufacturing. The smaller the F 2 measure, the more memory cells
per unit area.

Example F2 measures for major memory technologies:

 DRAM 8F2 or 6F2 cell size

 SLC NAND Flash 4.5F2 cell size
 MLC NAND Flash 2.25F2 cell size

Unity's CMOx™ memory technology, in a multi-layer cross-point array architecture using MLC, achieves an industry leading cell size of 0.5F 2.
Intellectual Property

Unity has obtained over 60 issued patents, with another 90+ applications pending in the US Patent and Trademark Office, covering all of the key aspects (cell structure,
processing, design, manufacturing, application) of the innovative, Unity invented, multi-layer CMOx™ memory technology.

Click here for the US Patent and Trademark Office list of Unity Semiconductor patents.

 
 

 Next-Generation DDR4 Memory to Reach 4.266GHz - Report.

DDR4 Memory to Feature Point-to-Point Topology

[08/16/2010 12:43 PM]
by Anton Shilov

The next-generation DDR4 SDRAM memory will bring rather ultimate performance improvements to both desktops and laptops as well as servers and workstations. But the new
performance heights will demand a rather radical change to topology of memory sub-system.

At a recent MemCon conference in Tokyo, Japan, Bill Gervasi, vice president of engineering at US Modular and a member of the JEDEC board of directors, revealed that the
target effective clock-speeds for DDR4 memory would be 2133MHz - 4266MHz, an increase from previously discussed frequencies.  Apparently, JEDEC and memory
manufacturers decided that the progress of DDR3 leaves no space for DDR4 data rates below 2133Mb/s.

The designers of DDR4 memory are looking forward 1.2V and 1.1V voltage settings for the new memory type and are even considering 1.05V option to greatly reduce power
consumption of the forthcoming systems. It is expected that manufacturers of dynamic random access memory (DRAM) will have to use advanced fabrication technology to
make the DDR4 chips. The first chips are likely to be made using 32nm or 36nm process technologies.

At present JEDEC expects to finalize the DDR4 specification in 2011 and start commercial production in 2012. Actual mass transition to the next-generation memory is projected
to occur towards 2015.

But extreme performance will require a tradeoff. In DDR4 memory sub-systems every memory channel will only support one memory module, reports PC Watch web-site, since
the developers substituted current multi-drop bus in facour of point-to-point topology. In order to overcome potential inability to install appropriate amount of memory into high-
end clients as well as servers, the developers have reportedly presented two approaches:

 DRAM manufacturers will need to dramatically increase capacities of memory chips by using multi-layer technique with through silicon via (TSV) technology. As a
result, DDR4 memory chips with very high density will become relatively inexpensive. Obviously, this will naturally make memory upgrades slightly more
complicated as in order to sustain multi-channel memory performance, all memory modules will have to replaced with more advanced DIMMs.
 In case of server multi-layer DRAM IC approach only will not be viable for high-end machines. As a result, it is proposed that special switches are installed onto
mainboards to allow multiple memory modules to work on a single memory channel.

The transition to DDR3 memory has taken a long time already and will take a couple more years to complete. But the transition to DDR4 memory will take even longer since it
will be much more complicated for all the participants of the ecosystem: the DRAM chip makers, memory module manufacturers, mainboard makers, microprocessor producers,
system builders and end-users.

Super Speedy Next Gen DDR4 Memory Outlined

August 18th, 2010 in .Blogs .Tech

Looking to the future, DDR3 will be around for a few years still so your recent or even upcoming memory purchases are still an investment, although Japanese website PC
Watch has obtained a few slides on the next generation of SDRAM technology: DDR4.
JEDEC – a committee of industry members that hammer out the specification of all PC memory – will finalise the details next year, so right now the information is more in the
“ideas” stage before everyone agrees to it. Once ratified, it’ll go into initial production in 2012 with mainstream acceptance all the way into 2015. We’ve still got a way to go – but
remember that DDR3 has been around in some form since 2007, and it’s only this year we’ve seen DDR3 sales greatly over-riding DDR2 – mostly because of Intel’s adoption
with its mainstream LGA1156 CPUs.

Super Speed!
DDR4 is set to bring a raft of changes to the design of memory that will let it scale to 4.2GHz (and likely beyond). In comparison, most DDR3 is sold at 1,333MHz or 1,600MHz
and ultra high performance hits range above 2-2.5GHz these days. So DDR4 is set to double the highest of the high performance DDR3 and will be introduced at speeds of
2,133MHz. Wow!
Not only that though, but we’re also going to see yet another voltage reduction to 1.1-1.2V. Right now, most DDR3 is 1.5-1.65V (down from 1.8+V with DDR2), but newer “low
power” DDR3 ICs can operate at just 1.35V, albeit at a sub-2GHz performance. Clearly some clever engineering is going to be needed to simultaneously reduce the
voltage and increase performance.
PC memory roadmap to DDR4

Sounds Great, but is it really all that?

In order to achieve such lofty goals a change limitation seems like we will only be afforded a single memory stick (DIMM) per channel. Right now we can have two per channel,
which means we can double the capacity by just adding one more memory kit. With one DIMM per channel it means less (questionably ugly) slots on the motherboard but less
future memory upgradability, unless youreplace your memory entirely with higher density parts.

TSV is the future!

To compensate for such an issue the memory manufacturers will use a technique called chip stacking – with a specific new technology call TSV, or Through Silicon Via. To put it
simply, this is where memory dies (the silicon bit that holds the data) get layered on top of each other to increase the capacity at the expense of making the memory chips a little
thicker. To connect it all up they have vertical pillars that shoot right through the middle of them so the electrodes in the bottom can talk to  all the dies in the stack. Very clever!
The old way of memory stacking was to have multiple, extremely tiny metal (usually gold or copper) wires connecting up to the edges of each individual die. The end result is an
extremely delicate and engineering intensive product (read: very high cost), so not suitable for a mass market application, which is why the TSV method was developed.

How does this affect your PC?

Right now it doesn’t, so don’t worry about it. DDR3 is still mainstream for several more years and DDR4 isn’t even on Intel’s or AMD’s CPU roadmaps yet. When it does arrive
we’ll get a lot more memory bandwidth for our brand new computer parts, but at the expense of making a firm decision of exactly how much memory we will need. That’s not a
big issue though as big jumps in memory needs take years to transition from “nice to have” to “is now useful” to “absolutely needed”, so replacing your PC memory
with more capacity will likely co-incide with a frequency and performance bump too. That’s win-win.

Unity brings CMOx to non-volatile memory, 10x faster than NAND

May. 19, 2009 (12:30 pm) By: Rick Hodgin
A Silicon Valley startup company called Unity Semiconductor Corporation is doing what a lot of Silicon Valley startups do; making big claims about their wares.
However, in Unity’s case many people are listening.

A technology called CMOx is being touted, one which promises 4x the density and 5x to 10x the write speed of today’s highest-end NAND flash, the non-volatile
form of storage used in SSDs, iPods, cell phones and more. CMOx could serve as a replacement technology offering 4x the capacity with up to 10x faster
read/write speeds.

The company has targeted a 64 Gigabit class of NVM (non-volatile memory, which is 8GB per chip). It’s described as a “passive rewritable cross-point memory
array” with no transistors in the memory cell, and the company has 64 Megabit products (8MB per chip) in production for one year. The 64Gb chips are “close to
tape-out and slated for pilot production in 2H’2010, with volume production in 2Q’2011″.

Unity Semiconductor Chairman, President & CEO Darrell Rinerson (who is also a former executive at both Micron Technology and AMD), said “We see ourselves
in the 2-year horizon for production volumes of our first product, a 64-gigabit storage class memory”.

Unity’s goals for CMOx are not just as a NAND flash replacement technology (which means you drop it in and physically replace today’s flash), but rather they’re
looking toward a NAND flash successor. The company will create a line of products they believe will totally displace flash as a viable NVM over time. They call it “A
Technology for Terabits”, meaning greater-than-128GB per single chip products are in the company’s sights.

The technology is scalable below 20nm, with a volume density in excess of 4bits/cell NAND flash. It uses less than 1 microamp of write current per cell, offers 10x
write performance with better endurance, and at a much lower cost, according to Alan Niebel, CEO of Web-Feet Research, Monterey, CA.

Initially, Unity will target the high-performance NAND flash replacement market in the 2011/2012 timeframe. After that, the CMOx technology will be applied to
SSDs for PCs, net/notebooks, MIDs and cell phones, which according to some estimates will exceed a 90% penetration by 2012 — due primarily to power savings
and lower read/write latencies, which means greater overall system performance without increasing other power-hungry components, such as faster CPU, bus or
memory subsystems.

According to the press release:

CMOx is a next-generation NVM technology based upon a Unity-proprietary switching effect that occurs in certain metal oxide combinations. The switching
concept used by Unity in CMOx is different from that used in today’s flash technology. The memory effect of CMOx technology is based upon the movement of
ionic charge carriers. CMOx can be utilized to form a passive cross-point multi-layer memory array, as it does not require a transistor per cell. Other memory
technologies, such as phase-change memory (PCM) and magneto-resistive random access memory (MRAM), use a transistor per cell and are not amenable to
the cross-point multi-layer chip architecture.

Unity Semiconductor’s multi-layer cross-point array utilizes a resistance change element (although it’s not a Resistive RAM (RRAM) memory cell such as is being
developed by a few othercompanies). Rather, in the CMOx technology, conduction is uniform across the device instead of being filamentary. The cross-point
memory array architecture allows for the densest memory devices of all the next-generation NVM technologies. Further, it enables the physical stacking of multiple
layers of memory. Unity Semiconductor’s CMOx based designs use 4 physical layers of multi-level cell (MLC) memory, and is the key to increasing the density of
its storage-class memory products. A proprietary next-generation nonvolatile memory technology, CMOx will yield products with 4x the density and 5?10x the write
speed of today’s NAND flash. “We believe only CMOx has the small cell size to beat NAND flash in cost and density,” Rinerson stated.
According to the company, no new process technology is needed in the CMOS base wafer, which can be fabricated at a CMOS logic foundry with existing
production capability and capacity on a trailing edge CMOS (90 nm) process. Unity refers to this manufacturing adaptation/process as BEOL, or back-end-of-line.

See Unity’s press release (PDF, 143KB), the company’s home page, and a brief Adobe Flashslideshow demo for CMOx.

Rick’s Opinion

There is only one major form of memory on the horizon that has the opportunity to supplant Flash in the long term, in my opinion. And that is MRAM, or magneto-
resistive random access memory. This one may fill the gap between Flash and MRAM, but it will not have staying power (outside of niche applications) because,
next to MRAM, it pales by comparison.

MRAM has the speed of SRAM, the density of DRAM, and is non-volatile as well — meaning it is truly a single, unified memory architecture. No need for separate
cache, memory and permanent storage on hard drive or SSD. MRAM can do it all, and do it all without losing its contents when the power is shut off.

PCs using MRAM will not only be “instant-on”, but rather “always on”. Whenever a user desires to use the PC, it will operate (so long as there is power). However,
when not in use, the entire system can literally be turned off, thereby providing massive power savings — because as soon as it’s turned back on, everything is
exactly where it was before, including cache access, main memory/permanent storage (which, in this design, are wholly unified).

Users with MRAM-based systems will not install Windows to their hard drive. They will install it into memory, and it will never leave memory. It will always be there,
except for when it copies out forbackup purposes, etc. Such a system also lends itself ideally to virtualization, because an in-memory system can be completely
transferred from one machine to another, or from one MRAM memory chip to another, allowing true, easy, categorical distribution of any
operational computersystem, including its current operational state (such as what programs were running at the time, what files were loaded, what data was on-
screen, etc.).
MRAM is currently in production by companies like Freescale, Toshiba, IBM, NEC, Hynix and several universities, though it is cost prohibitive in most commercial
markets due to its complex manufacturing process. However, these technical issues in production will be overcome in time. Provided there is not another form of
startup memory that provides MRAM-like abilities, to be used for DRAM, SRAM and Flash, then MRAM will win.

Future CPUs could also include on-die, or in-package MRAM, which allows you to buy a CPU already installed with Windows, Linux or other operating system.
You install the CPU in your computer, and when you turn the system on the first time it is wholly operational with all softwareinstalled… and those are the days
worth living for, so to speak.