tn120r PDF

Downloaded from www.Manualslib.
com manuals search engine

Downloaded from www.Manualslib.com manuals search engine
Preface
Notebook Computer
TN120R
Service Manual
Preface
I

Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
January 2008
Trademarks
Intel, Celeron and Intel Core are trademarks/registered trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and./or registered trademarks of their respective companies.
II

Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the TN120R series
notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
III

Preface
IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (DC Output 19V, 3.42A or 18.5V, 3.5A (65W) AC/DC Adapter).
Preface
CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.
TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,

TELECOMMUNICATION LINE CORD
This Computer’s Optical Device is a Laser Class 1 Product
IV

Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.

Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:
• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
VI

Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Preface

Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommend-
ed by the manufacturer. Discard used battery according to the manufacturer’s instructions.
VII

Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
Preface
VIII

Preface
Contents
Introduction ..............................................1-1 LCD (TN120R) .............................................................................. A-5
Combo (TN120R) .......................................................................... A-6
Overview .........................................................................................1-1 DVD-DUAL-RW (TN120R) ......................................................... A-7
System Specifications .....................................................................1-2 HDD (TN120R) ............................................................................. A-8
External Locator - Top View with LCD Panel Open ......................1-5
External Locator - Front & Rear Views ..........................................1-6 Schematic Diagrams................................. B-1
External Locator - Right & Left Side Views ...................................1-7 SYSTEM BLOCK DIAGRAM ......................................................B-2
External Locator - Bottom View .....................................................1-8 Merom CPU-1 ................................................................................B-3
Mainboard Overview - Top (Key Parts) .........................................1-9 Merom CPU-2 ................................................................................B-4
Mainboard Overview - Bottom (Key Parts) ..................................1-10 GM965 Crestline 1/5 ......................................................................B-5
Mainboard Overview - Top (Connectors) .....................................1-11 GM965 Crestline 2/5, DRAM ........................................................B-6
Mainboard Overview - Bottom (Connectors) ...............................1-12 GM965 Crestline 3/5 .....................................................................B-7
Disassembly ...............................................2-1 GM965 Crestline 4/5 ......................................................................B-8
Preface
GM965 Crestline 5/5 ......................................................................B-9
Overview .........................................................................................2-1
DDRII SO-DIMM 0 .....................................................................B-10
Maintenance Tools ..........................................................................2-2
DDRII SO- DIMM 1 ....................................................................B-11
Connections .....................................................................................2-2
PANEL, INVERTER, CRT, FTP .................................................B-12
Maintenance Precautions .................................................................2-3
ICH8-M 1/4, SATA ......................................................................B-13
Removing the Battery ......................................................................2-5
ICH8-M 2/4, PCI, USB ................................................................B-14
Removing the Hard Disk Drive .......................................................2-6
ICH8-M 3/4 ..................................................................................B-15
Removing the Modem Module .......................................................2-8
ICH8-M 4/4 ..................................................................................B-16
Removing the System Memory (RAM) ..........................................2-9
CLOCK GENERATOR ................................................................B-17
Removing the Processor ................................................................2-11
NEW CARD, MINI PCIE ...........................................................B-18
Removing the Wireless LAN Module ...........................................2-14
IEEE 1394 VT6311S ....................................................................B-19
Removing the Bluetooth Module ..................................................2-15
ENE MR510, 7 IN 1 .....................................................................B-20
Removing the Optical (CD/DVD) Device ....................................2-16
AUDIO CODEC ALC883 ............................................................B-21
Removing the Keyboard ................................................................2-17
AUDIO AMP2056A .....................................................................B-22
Part Lists ..................................................A-1 KBC-ITE IT8512E .......................................................................B-23
Part List Illustration Location ........................................................ A-2 ODD, CCD, BT, Multi I/O ...........................................................B-24
Top (TN120R) ................................................................................ A-3 LED, FAN, CLICK, LID ..............................................................B-25
Bottom (TN120R) .......................................................................... A-4 3VS, 5VS, POWER S/W ..............................................................B-26
IX

Preface
POWER GPU/1.25VS .................................................................. B-27

POWER 3.3V/5V ......................................................................... B-28
POWER 1.5VS/1.05VS ............................................................... B-29
POWER 1.8V/0.9V ...................................................................... B-30
CHARGER ................................................................................... B-31
VCORE FOR MEROM CPU ....................................................... B-32
Multi Board, PCIE LAN RTL8111B ........................................... B-33
Multi Board, LED, USB ............................................................... B-34
Multi Board, 3G, MDC, RJ11, LID ............................................. B-35
FPT ExBoard FINGERPRINT ..................................................... B-36
FPT MBoard FINGERPRINT ..................................................... B-37
FPT MBoard TP, KEY, CIR ........................................................ B-38
CLICK BOARD ........................................................................... B-39
Preface

Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the TN120R series notebook computer. Information
about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about driv-
ers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the computer.
Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
The TN120R series notebook is designed to be upgradeable. See “Disassembly” on page 2 - 1 for a detailed description
1.Introduction
of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the
“” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1

Introduction
System Specifications

Latest Specification Information
The specifications listed in this Appendix are correct at the time of going to press. Certain items (particularly processor types/speeds and
CD/DVD device types) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center
for details.
Feature Specification
1.Introduction
Processor Intel® Core™2 Duo Processor 45nm (45 Nanometer) Process Technology
(478-pin) Micro-FC-PGA Package, Socket P 3MB On-die L2 Cache & 800MHz FSB
T8100/ T8300 2.1/ 2.4 GHz
Intel® Core™2 Duo Processor 45nm (45 Nanometer) Process Technology

T9300/ T9500 2.5/ 2.6 GHz

T7100/ T7250 1.8/ 2.0 GHz

T7300/ T7500/ T7700/ T7800 2.0/ 2.2/ 2.4/ 2.6 GHz
Intel® Celeron® M Processor 65nm (65 Nanometer) Process Technology

(478-pin) Micro-FCPGA Package, Socket P 1MB On-die L2 Cache & 533MHz FSB
530/ 540/ 550/ 560 1.73/ 1.86/ 2.0/ 2.3 GHz
Core Logic Intel® GM965 + ICH8M Chipset
LCD 12.1" WXGA (1280 * 800) TFT LCD Touch Panel
BIOS One 8Mb SPI Flash ROM Phoenix™ BIOS
1 - 2 System Specifications

Introduction
Memory Two 200 Pin SO-DIMM Sockets Supporting DDRII (DDR2) 667 MHz
Memory Expandable up to 4GB (512/ 1024/ 2048 MB DDRII Modules)
512MB Or 1GB Intel® Turbo Memory Module (Option)
Security Security (Kensington® Type) Lock Slot BIOS Password

Fingerprint ID Reader Module (Factory Option)
Storage One Changeable 12.7mm(h) Optical Device (CD/DVD) Type Drive (see “Optional” on page 4) Easy Changeable 2.5"
9.5 mm (h) SATA (Serial) HDD
Video Adapter Intel GM965 Integrated Video

Shared Memory Architecture - Supports up to 256MB of Video Memory (dynamically allocated from system memory
where needed)
Supports DirectX9.0 3D Graphics Engine Accelerator
1.Introduction
Supports DualView™
Audio Integrated Azalia Compliant Interface 2 * Built-In Speakers

3D Stereo Enhanced Sound System Built-In Microphone
Sound-Blaster PRO™ Compatible
Keyboard & Winkey Keyboard Built-In TouchPad with Scrolling Function
Pointing Device Stylus Pen for Touch Panel
Card Reader Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS MMC/ MS Duo)
Note: MS Duo/ Mini SD/ RS MMC Cards require a PC adapter
Card SlotS One ExpressCard/34(54) Slot
Interface Three USB 2.0 Ports One RJ-45 LAN Jack

One Headphone-Out Jack One DC-in Jack
One Microphone-In Jack One External Monitor Port
One S/PDIF Out Jack One Mini-IEEE 1394 Port
One RJ-11 Modem Jack 2 Built-In Instant Keys (Menu, Rotation)
Power Supports ACPI 3.0 Supports Wake on USB
Management Supports Wake on LAN Supports Resume from Modem Ring
Power Full Range AC/DC Adapter AC input 100 - 240V, 50 - 60Hz, DC Output 19V, 3.42A / 18.5V, 3.5A (65 Watts)
Battery 4 Cell Smart Lithium-Ion Battery Pack, 14.8V/2.4AH

8 Cell Smart Lithium-Ion Battery Pack, 14.8V/4.4AH (Option)
System Specifications 1 - 3

Introduction
Communication 1000/100/ 10 Mb Fast Ethernet LAN
*Note: The Intel

Azalia 56K Plug and Play Fax Modem V.90 & V.92 Compliant
Turbo Memory and Wireless LAN Module Options: UMTS Modes
3.5G Modules can- 802.11 b/g MiniCard USB Wireless LAN Module (Option)
Intel PRO/Wireless 3945ABG MiniCard PCIe Wireless LAN Module (Option) Note that UMTS
not coexist. If one of
modes CAN NOT be
these factory options Intel PRO/Wireless 4965AGN MiniCard PCIe Wireless LAN Module (Option)
used in North Amer-
is included in your ica.
1.3M or 2.0M Pixel USB PC Camera Module (Factory Option)
purchase option, then
the other is unavail- Bluetooth 2.0 + EDR (Enhanced Data Rate) Module (Factory Option)
able.
*UMTS/HSPDA-based 3.5G Module with MiniCard Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800 MHz, 1900 MHz)
1.Introduction
UMTS WCDMA FDD (2100 MHz)

Environmental Temperature Relative Humidity
Spec Operating: 5°C ~ 35°C Operating: 20% ~ 80%
Non-Operating: -20°C ~ 60°C Non-Operating: 10% ~ 90%
Dimensions 306mm (w) * 224mm (d) * 35 - 37.5mm (h) 2.1 kg With 4 Cell Battery and ODD
& Weight
Optional Optical Drive Module Options: Bluetooth 2.0 + EDR (Enhanced Data Rate) Module
DVD/CD-RW Combo Drive Module (Factory Option)
Super Multi Drive Module
*Note: The Intel
1.3M or 2.0M Pixel USB PC Camera Module (Factory
Turbo Memory and
Wireless LAN Module Options: Option)
3.5G Modules can-
802.11 b/g MiniCard USB Wireless LAN Module
not coexist. If one of
Intel PRO/Wireless 3945ABG MiniCard PCIe Wireless Fingerprint ID Reader Module (Factory Option)
these factory options
LAN Module
is included in your
purchase option, then
Intel PRO/Wireless 4965AGN MiniCard PCIe Wireless *512MB Or 1GB Intel® Turbo Memory Module(Robson)
LAN Module NAND Flash Memory Card Module (Factory Option)
the other is unavail-
or
able.
8 Cell Smart Lithium-Ion Battery Pack *UMTS/HSPDA-based 3.5G Module with MiniCard
Interface (Factory Option)
1 - 4 System Specifications

Introduction
External Locator - Top View with LCD Panel Open Figure 1

Top View with LCD
1 Panel Open
1. Built-In PC
Camera
(Optional)
2. LCD
3. Fingerprint
2
Reader Module
(Optional)
4. Menu & Screen
3 Rotation Buttons
1.Introduction
5. Speakers
6. Screen Hinge
4 7. LED Status
Indicators
5 5 8. Keyboard
9. Touchpad &
6 Buttons
7
10. LED Power &
Communication
Indicators
8 11. Power Switch
12. Built-In
Microphone
9
10 11 12
External Locator - Top View with LCD Panel Open 1 - 5

Introduction
Figure 2 External Locator - Front & Rear Views

Front View
1. LED Power &
Communication
Indicators
2. Power Switch
1 2
3. S/PDIF-Out Jack 6
3 4 5 Front 7
4. Microphone-In Jack
5. Headphone-Out
Jack
6. 7-in-1 Card Reader
7. Stylus Pen Holder
1.Introduction
Figure 3
Rear View
1. Security Lock Slot
2. 2 * USB 2.0 Ports
3. DC-In Jack 2
4. Battery 1
3 Rear 4
1 - 6 External Locator - Front & Rear Views

Introduction
External Locator - Right & Left Side Views

Figure 4
Right Side View
1. Stylus Pen Holder
2. Optical Device (for
DVD Device)
3. Emergency Eject
5 6 Hole
2 4 4. 1 * USB 2.0 Port
1 3
Right 5. RJ-11 Phone Jack
6. RJ-45 LAN Jack
1.Introduction
Figure 5
Left Side View
1. External Monitor
Port
2. Mini-IEEE 1394
Port (supports
1 4
2 SELF Powered
3
Left IEEE 1394 devices
only)
3. Vent
4. ExpressCard/
54(34) Slot
External Locator - Right & Left Side Views 1 - 7

Introduction
External Locator - Bottom View

Figure 6
Bottom View
1. Battery 1
2. Hard Disk Bay
Cover
(3.5G Module
Location) 2
3. RAM & CPU Bay
Cover
4. Vent
1.Introduction
3
4

Overheating 4
To prevent your com-

puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
1 - 8 External Locator - Bottom View

Introduction
Mainboard Overview - Top (Key Parts) Figure 7

Mainboard Top
Key Parts
1. Clock Buffer
2. ITE 8512E
3. Card Reader
Controller ENE
MR510
4. RTL 8111B
1.Introduction
2
1
3
Mainboard Overview - Top (Key Parts) 1 - 9

Introduction
Figure 8 Mainboard Overview - Bottom (Key Parts)

Mainboard Bottom Key
Parts
1. CPU Socket (no

CPU installed)
2. Northbridge-intel
GM965
3. ExpressCard
Assembly 8 7
4. Southbridge-ICH8-M
5. Memory Slots DDRII 6 1
So-DIMM
1.Introduction
6. WLAN Mini Card

Slot
7. SIM Card Slot
8. 3.5G Mini Card Slot
5 2
4 3
1 - 10 Mainboard Overview - Bottom (Key Parts)

Introduction
Mainboard Overview - Top (Connectors) Figure 9

Mainboard Top
4 Connectors
1. USB Port
3 2. RJ-11 Phone Jack
2 3. RJ-45 LAN Jack
4. 2 *USB Port
5. Keyboard Cable
Connector
1
6. Internal
Microphone Cable
Connector
7. Touch Pad Cable
1.Introduction
ConnectorBattery
Connector
6
7
Mainboard Overview - Top (Connectors) 1 - 11

Introduction
Figure 10 Mainboard Overview - Bottom (Connectors)

Mainboard Bottom
Connectors
5 4
1. Mini-IEEE 1394 Port
2. External Monitor Port
3. Battery Connector
4. DC-In Jack 18
5. 2 * USB 2.0 Ports
6. USB 2.0 Ports 17 16 15 3
6
7. Optical Device Drive
Connector 14
8. 7-in-1 Card Reader 2
1.Introduction
9. Headphone-Out Jack
10. Microphone-In Jack
11. S/PDIF-Out Jack 1
12. Fan Cable
Connector
13. Bluetooth Cable
Connector
14. Speaker Cable
Connector
15. LCD Cable
ConnectorDC-In 13 12
Jack
16. Inverter Cable
Connector 7
17. CCD Cable
Connector
18. Fingerprint Cable 8
Connector
9 10 11
1 - 12 Mainboard Overview - Bottom (Connectors)

Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the TN120R series notebook’s parts and subsystems.
When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, CD device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.

Warning
Overview 2 - 1

Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview

Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines). It is
damaged. advisable to also re-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. move your battery in
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. order to prevent acci-
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. dentally turning the
machine on.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3

Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove the Bluetooth:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the bluetooth page 2 - 15
To remove the HDD:
1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 6 To remove the Optical Device:
2.Disassembly

To remove the Modem : 2. Remove the Optical device page 2 - 16
2. Remove the HDD page 2 - 6 To remove the Keyboard:
3. Remove the modem page 2 - 8
2. Remove the keyboard page 2 - 17
To remove the System Memory:
2. Remove the system memory page 2 - 9
To remove the Processor:

2. Remove the processor page 2 - 11
To remove the Wireless LAN Module:

2. Remove the Wireless LAN page 2 - 14
2 - 4 Overview

Disassembly
Removing the Battery

Figure 1
1. Turn the computer off, and turn it over.
Battery Removal
2. Slide the latch 1 in the direction of the arrow, and hold latch 2 in place.
3. Slide the battery 64 in the direction of the arrow 3 . a. Slide the 2 latches and
hold latch 2 in place.
b. Slide the battery in the di-
a. rection of the arrow.
2.Disassembly
3
b.
3
4. Battery
Removing the Battery 2 - 5

Disassembly
Removing the Hard Disk Drive

Figure 2 The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
HDD Assembly (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Removal Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Locate the HDD bay cov- Hard Disk Upgrade Processl

er and remove the
screws.
1. Turn off the computer, and remove the battery (page 2 - 5).
b. Remove the bay cover. 2. Locate the hard disk bay cover and remove the screws ( 1 - 2 ).
3. Remove the bay cover 63 .
a. b.
2.Disassembly
1 2

HDD System Warning
New HDD’s are blank. Before you begin make sure:
You have backed up any data you want to keep from your old HDD.
3. HDD Bay Cover
You have all the CD-ROMs and FDDs required to install your operating system and programs.
If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan
• 2 Screws to install. Copy these to a removable medium.
2 - 6 Removing the Hard Disk Drive

Disassembly
4. Carefully grip the mylar tab 4 and slide the hard disk in the direction of arrow
5. Lift the hard disk up (Figure d) in the direction of arrow. Figure 3
HDD Assembly
6. Remove the screws 5 - 6 and separate the mylar cover 67 from the hard disk 68 .
Removal Sequence
7. Reverse the process to install any new hard disk.
c. Slide the HDD in the di-
c. d. rection of the arrow.
d. Lift the HDD out of the
bay.
e. Remove the screws
and separate the mylar
cover from the HDD .
2.Disassembly
e.
6
8
7. Mylar Cover
8. HDD
5
• 2 Screws
Removing the Hard Disk Drive 2 - 7

Disassembly
Figure 4 Removing the Modem Module

Modem Removal
1. Turn off the computer, remove the battery (page 2 - 5) and the hard disk (page 2 - 6).
2. The modem will be visible at point 1 under the hard disk.
a. Remove the hard disk
b. Remove the screws. 3. Remove screws 2 - 3 .
c. Lift the modem up off 4. Lift the modem up off the socket 4 and disconnect the connector 5 from the modem.
the socket and discon- 5. Lift the modem 6 up and off the computer.
nect the connector from
the modem.
d. Remove the modem. a. d.
6
2.Disassembly
b. c.
2 5

6. Modem
• 2 Screws
2 - 8 Removing the Modem Module

Disassembly
Removing the System Memory (RAM) Figure 5

The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting RAM Module
DDRII 533/667MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are 256MB, Removal
512MB and 1024MB DDRII Modules. The total memory size is automatically detected by the POST routine once you
turn on your computer. a. Remove the screws.
b. Disconnect the fan
Memory Upgrade Process cable and the cover.
c. Locate the RAM
1. Turn off the computer, remove the battery (page 2 - 5).
module.
2. Locate the CPU/RAM bay cover, and remove screws 1 - 4 .
3. Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
4. Carefully disconnect the fan cable 5 .
5. Remove the bay cover 6 .

2.Disassembly
6. The RAM will be visible at point 7 on the mainboard.
Contact Warning
a. b. Be careful not to touch
2
the metal pins on the
module’s connecting
3 4 edge. Even the clean-
1 5 est hands have oils
which can attract parti-
6 cles, and degrade the
module’s perfor-
mance.
c.

Fan Cable
Make sure you reconnect the fan 6. CPU/RAM Bay Cover
7 cable 5 before screwing down
the bay cover.
• 4 Screws
Removing the System Memory (RAM) 2 - 9

Disassembly
Figure 6 7. Gently push the two release latches ( 8 & 9 ) on the sides of the memory socket in the direction indicated by the
Memory Removal arrows (Figure d).
Sequence 8. The RAM module(s) 10 will pop-up (Figure e), and you can then remove it.
d. Push the release d. e. f.

latch(es).
e. Remove the module(s).
f. Make sure you recon-
nect the fan cable. 8
10
2.Disassembly
9. Push the latches to release the second module if necessary.

10. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
11. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
as it will go. DO NOT FORCE IT; it should fit without much pressure.
12. Press the module down towards the mainboard until the slot levers click into place to secure the module.
13. Replace the bay cover and the screws (make sure you reconnect the fan cable before screwing down the bay cover
- Figure f).
14. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.

10 RAM Module(s)
2 - 10 Removing the System Memory (RAM)

Disassembly
Removing the Processor Figure 7

Processor Removal
1. Turn off the computer, and remove the battery (page 2 - 5) and the CPU/RAM bay cover (page 2 - 9).
2. Loosen the heat sink screws 3 - 1 (IN THE ORDER 3, 2, 1 AS INDICATED ON THE HEAT SINK - See below).
a. Remove the cover and
a. Iocate the heat sink.
b. Remove the 3 screws in
the order indicated.
CPU Heat Sink Screws
In order to prevent damage to the

CPU it is very important that the
heat sink screws are loosened in
the correct order.
2.Disassembly
There are numbers printed on the
heat sink. The order in which the
screws should be loosened, de-
pends on whether you are re-
moving the CPU, or installing the b. HEAT SINK REMOVAL
CPU. Loosen screw 3
FIRST. 3
When REMOVING the heat sink
unit loosen the screws in the or- 1
der 3, 2, 1 (as printed on the heat 4
sink). Figure b indicates the correct
2
order to loosen the screws when re-
moving the heat sink unit.
Loosen screw 1
Loosen screw 2 THIRD.
SECOND.

4. Heat Sink
• 3 Screws
Removing the Processor 2 - 11

Disassembly
3. When the screws are loosened sufficiently, carefully lift up the heat sink 4 (Figure c) off the computer.
Figure 8 4. Turn the release latch 5 towards the unlock symbol , to release the CPU (Figure d).
Processor Removal 5. Carefully (it may be hot) lift the CPU 6 up out of the socket (Figure e).
Sequence 6. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
c. Remove the heat sink.
d. Turn the release latch to
unlock the CPU. c. d.
e. Lift the CPU out of the
socket.
5
2.Disassembly
4 5
Unlock Lock
e.

Caution 7
The heat sink, and CPU area in

6 general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
4. Heat Sink ing these parts.
6. CPU
2 - 12 Removing the Processor

Disassembly
7. Tighten the screws 1 - 3 (IN THE ORDER 1, 2, 3 AS INDICATED ON THE HEAT SINK - See below). Figure 9
8. Replace the CPU/RAM bay cover and screws. Processor Removal
Sequence
f. Tighten the 3 screws in

Tighten screw 3
f. HEAT SINK INSTALLATION
the order indicated.
CPU Heat Sink Screws THIRD. 3
In order to prevent damage to the CPU it
is very important that the heat sink screws
are loosened in the correct order.
1
2
There are numbers printed on the heat
sink. The order in which the screws Tighten screw 1
Tighten screw 2 FIRST.
2.Disassembly
should be loosened, depends on
whether you are removing the CPU, or SECOND.
installing the CPU.
When INSTALLING the heat sink unit

tighten the screws in the order 1, 2, 3
(as printed on the heat sink). Figure f in-
dicates the correct order to tighten the
screws when installing the heat sink unit.
Removing the Processor 2 - 13

Disassembly
Figure 10 Removing the Wireless LAN Module

Wireless LAN Module
1. Turn off the computer, remove the battery (page 2 - 5) and the CPU/RAM bay cover (page 2 - 9).
Removal
2. The Wireless LAN module will be visible at point 1 on the mainboard.
3. Carefully disconnect cable 2 , then remove the screw 3 from the module socket.
a. Remove the cover and Io-
cate the heat sink. 4. The Wireless LAN module 4 will pop-up.
b. Disconnect the cable and 5. Lift the Wireless LAN module (Figure d) up and off the computer.
remove the screw.
c. The WLAN module will pop
up. a. b.
d. Remove the WLAN mod-
ule.
1 3
2.Disassembly
Note: Make sure you re-

connect the antenna ca-
ble to the “Main” socket
2
(Figure b).
c.
4 d.
4

4. WLAN Module
• 1 Screw
2 - 14 Removing the Wireless LAN Module

Disassembly
Removing the Bluetooth Module Figure 11

Bluetooth Removal
1. Turn off the computer, remove the battery (page 2 - 5), and the CPU/RAM bay cover (page 2 - 9).
2. The Bluetooth module will be visible at point 1 on the mainboard.
3. Remove screw 2 and turn it over. locate the Bluetooth
4. Carefully disconnect the cable 3 and separate the module from the connector 4 . module.
5. Lift the Bluetooth module 5 up and off the computer. b. Remove the screw.
c. Disconnect the cable
a. c. and seperate the con-
nector.
d. Lift the Bluetooth module
out.
2.Disassembly
1
4
b.
2 d.

5. Bluetooth Module
• 1 Screw
Removing the Bluetooth Module 2 - 15

Disassembly
Figure 12 Removing the Optical (CD/DVD) Device

Optical Device
1. Turn off the computer, remove the battery (page 2 - 5), and the CPU/RAM bay cover (page 2 - 9).
Removal
2. Remove the screw at point 1 , and use a screwdriver to carefully push out the optical device at point 2 .
3. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
locate the screw. screw holes should line up.
b. Remove the screw and 4. Insert the new device and replace the optical device screw 1 .
push the optical device 5. Reconnect the fan cable before replacing the bay cover ( 5 in Figure 5 on page 2 - 9).
out off the computer at 6. Replace the bay cover and screws.
point 2 and remove the 7. Restart the computer to allow it to automatically detect the new device.
optical device.
a. b.
2.Disassembly
1 33

3. Optical Device
• 1 Screw
2 - 16 Removing the Optical (CD/DVD) Device

Disassembly
Removing the Keyboard Figure 13

1. Turn off the computer, and remove the battery (page 2 - 5). Keyboard Removal
2. Press the three keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
a. Press the three latches
may need to use a small screwdriver to do this).
to release the keyboard.
3. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable (Figure b). b. Lift the keyboard up and
4. Disconnect the keyboard ribbon cable 4 from the locking collar socket 5 . disconnect the cable
5. Carefully lift up the keyboard 6 (Figure c) off the computer. from the locking collar.
c. Remove the keyboard.
a. b.
1 2 3
2.Disassembly
4
Re-Inserting the Key-
board
5
When re-inserting the
keyboard firstly align
c. the three keyboard
tabs at the bottom of
the keyboard with the
slots in the case.
6
6. Keyboard Module.
Keyboard Tabs
Removing the Keyboard 2 - 17

Disassembly
2.Disassembly
2 - 18

Part Lists
Appendix A:Part Lists

This appendix breaks down the TN120R series notebook’s construction into a series of illustrations. The component part
numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1

Part Lists
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
Part Pages#
Location
Top (TN120R) page A - 3
Bottom - (TN120R) page A - 4
LCD - (TN120R) page A - 5
Combo - (TN120R) page A - 6
DVD-DUAL-RW - (TN120R) page A - 7
A.Part Lists
HDD - (TN120R) page A - 8
A - 2 Part List Illustration Location

Part Lists
Top (TN120R)
Figure A - 1
A.Part Lists
Top (TN120R)
無鉛
白色無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
Top (TN120R) A - 3

Part Lists
Bottom (TN120R)
無鉛
無鉛
無鉛
無鉛
無鉛
變更無鉛
無鉛
無鉛
無鉛
無鉛
Figure A - 2
無鉛
無鉛
Bottom (TN120R)
無鉛
A.Part Lists
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
藍天3 互億無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
A - 4 Bottom (TN120R)

Part Lists
LCD (TN120R)
Figure A - 3
LCD (TN120R)
A.Part Lists
扁頭無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
鐵氟龍無鉛
鐵弗龍無鉛
無鉛
(富晶通) 無鉛
富晶通無鉛
中性無鉛
無鉛
無鉛
無鉛
黑色惠貿無鉛
灰色惠貿無鉛
黑色惠貿無鉛
無鉛
( 機構尺寸變更) 無鉛
黑色惠貿無鉛
無鉛
無鉛
無鉛
(鐵氟龍) 無鉛
(鐵氟龍) 無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
LCD (TN120R) A - 5

Part Lists
Combo (TN120R)
Figure A - 4
A.Part Lists
Combo (TN120R)
無鉛
寬降低無鉛
無鉛
無鉛
A - 6 Combo (TN120R)

Part Lists
DVD-DUAL-RW (TN120R)
Figure A - 5
DVD-DUAL-RW
A.Part Lists
(TN120R)
無鉛
寬降低無鉛
無鉛
無鉛
無鉛
DVD-DUAL-RW (TN120R) A - 7

Part Lists
HDD (TN120R)
Figure A - 6
A.Part Lists
HDD (TN120R)
無鉛
無鉛
A - 8 HDD (TN120R)

Schematic Diagrams
Appendix B:Schematic Diagrams

This appendix has circuit diagrams of the TN120R notebook’s PCB’s. The following table indicates where to find the
appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Table B - 1

Schematic
SYSTEM BLOCK DIAGRAM - Page B - 2 ICH8-M 4/4 - Page B - 16 POWER 3.3V/5V - Page B - 28
Diagrams
Merom CPU-1 - Page B - 3 ICH8-M 4/4 - Page B - 16 POWER 1.5VS/1.05VS - Page B - 29
B.Schematic Diagrams
Merom CPU-2 - Page B - 4 CLOCK GENERATOR - Page B - 17 POWER 1.8V/0.9V - Page B - 30
GM965 Crestline 1/5 - Page B - 5 NEW CARD, MINI PCIE - Page B - 18 CHARGER - Page B - 31
GM965 Crestline 2/5, DRAM - Page B - 6 IEEE 1394 VT6311S - Page B - 19 VCORE FOR MEROM CPU - Page B - 32
GM965 Crestline 3/5 - Page B - 7 ENE MR510, 7 IN 1 - Page B - 20 Multi Board, PCIE LAN RTL8111B - Page B - 33
GM965 Crestline 4/5 - Page B - 8 AUDIO CODEC ALC883 - Page B - 21 Multi Board, LED, USB - Page B - 34

GM965 Crestline 5/5 - Page B - 9 AUDIO AMP2056A - Page B - 22 Multi Board, 3G, MDC, RJ11, LID - Page B - 35
DDRII SO-DIMM 0 - Page B - 10 KBC-ITE IT8512E - Page B - 23 FPT ExBoard FINGERPRINT - Page B - 36
Version Note
DDRII SO- DIMM 1 - Page B - 11 ODD, CCD, BT, Multi I/O - Page B - 24 FPT MBoard FINGERPRINT - Page B - 37
The schematic dia-
grams in this chapter
PANEL, INVERTER, CRT, FTP - Page B - 12 LED, FAN, CLICK, LID - Page B - 25 FPT MBoard TP, KEY, CIR - Page B - 38
are based upon ver-
ICH8-M 1/4, SATA - Page B - 13 3VS, 5VS, POWER S/W - Page B - 26 CLICK BOARD - Page B - 39 sion 6-7P-T12R5-003.
If your mainboard (or
ICH8-M 2/4, PCI, USB - Page B - 14 POWER GPU/1.25VS - Page B - 27 other boards) are a lat-
er version, please
check with the Service
Center for updated di-
agrams (if required).
B - 1

Schematic Diagrams
SYSTEM BLOCK DIAGRAM

3VS, 5VS
AC-IN,CHARGER CLEVO TN120R System Block Diagram RD111 DESIGN
14.318 MHz
POWER GPU, 1.25VS
MULTI I/O BOARD Colck Generator
ICS9LPR363 Me mory Ter minatio n
USB0,1,2,Docking
3G Card,MDC,GLAN Intel Merom VDD3,VDD5,3.3V,5V
PROCESSOR DDRII
SO-DIMM0
FTP,T/P,CIR BOARD 478p ins uFC BGA 1.05VS,1.5VS
Finger print DDRII
TouchPanel,CIR SO-DIMM1
FSB 1.8V,0.9VS(VTT_MEM)
0.5"~5.5" 667/800 MHz
CLICK BOARD
LCD CONNECTOR, <8" VCORE
IVERTER, NOR TH BRIDGE SHEET20
CLICK BOARD CRT
TOUCH PAD Int el GM965 SPDIF MIC HP

Synaptic 533/6 67(/800 ) MHz OUT IN OUT
RJ-11
810602-1703
1 299 FCB GA
TP M1.2
Sheet 1 of 38 32.768 KHz
(Optional)
AZALIA
MDC Azalia Codec
AUDIO
INT SPK R
EC X4 MODULE Realtek
SYSTEM BLOCK ITE 8512E
128pins LQFP
SPI
<=8" DMI
SYSTEM SMBUS
ALC883
48pins LQFP
AMP.
APA2056A
INT SPK L
LPC 33 MH z MDC CON 9*9 *1. 6 mm

DIAGRAM 14 *14 *1. 6 mm
0.5"~11"
SOUTH BRIDGE 0.1"~13
AZALIA LINK 24 MH z
INT MIC
ICH8-M 33 MH z 1"~16"
INT. K/B EC SMBUS PCI BUS
67 6 B GA <12"
PCIE 100 M Hz
THERMAL SMART SMART
SENSOR FAN BATTERY SHEET 12,13,14,15
32.768KHz 25
F75383M MHz
New Card Mini PCIE
3G CARD CARD READER
SOCKET SOCKET IEEE
L AN EnE MR510
SATA I/II 3.0Gb/s <12" USB2.0 (USB3) (USB6) 1394
48 0 Mbps REALTEK 128-pin LQFP VT6113S
1"~18" SHEET 17 (Optional) RTL8111B 1 4 *1 4 *1. 4m m
PATA-133 1"~16"
24.576
MHz
ODD MINI PCIE 7IN1

RJ-45
USB0 USB1 USB2 (USB5) (USB8) (USB7) (USB9) (USB4) GOLAN SOCKET
point3 CCD FingerPrint TouchPanel
Bluetooth 3G CARD
point1 point2 Docking Multi
fuction B'd
SATA HDD (Optional)
12 MHz
(Optional)
Multi fuction B'd
FINGER PRINTER BOARD
B - 2 SYSTEM BLOCK DIAGRAM

Schematic Diagrams
Merom CPU-1
JSKT1A
4 H_A#[ 3
5:3]
H_A#3 J4 H1
A[3]# ADS# H_ADS# 4
H_A#4 L5 E2
A[4]# BNR# H_BNR# 4
H_A#5 L4 G5 H_BPRI# 4 4 H_D#[63:0] JSKT1B H_D#[63:0] 4
H_A#6 K5 A[5]# BPRI# H_D#0 E22 Y22 H_D#32
A[6]# D[ 0]# D[32]#
GROUP 0
ADDR
H_A#7 M3 H5 H_D#1 F24 AB24 H_D#33

A[7]# DEFER# H_DEFER# 4 D[ 1]# D[33]#
H_A#8 N2 F2
1 H_D#2 E26 V24 H_D#34
A[8]# DRDY# H_DRDY# 4 D[ 2]# D[34]#
H_A#9 J1 E1 H_D#3 G22 V26 H_D#35
A[9]# DBSY# H_DBSY# 4 D[ 3]# D[35]#
H_A#10 N3 H_D#4 F23 V23 H_D#36
CONTRO L
A[10]# D[ 4]# D[36]#
DATA GRP 0
H_A#11 P5 F1 H_D#5 G25 T22 H_D#37
DAT A GRP 2
A[11]# BR0# H_BR0# 4 D[ 5]# D[37]#
H_A#12 P2 H_D#6 E25 U25 H_D#38
H_A#13 L2 A[12]# D20 H_IERR# H_D#7 E23 D[ 6]# D[38]# U23 H_D#39
A[13]# IERR# D[ 7
]# D[39]#
H_A#14 P4 B3 H_D#8 K24 Y25 H_D#40
A[14]# INIT# H_INIT# 12 D[ 8
]# D[40]#
H_A#15 P1 H_D#9 G24 W22 H_D#41
H_A#16 R1
A[15]#
H4 H_LOCK# 4
Zo = 5 5O ? 5% H_D#10 J24
D[ 9
]# D[41]#
Y23 H_D#42
M1 A[16]# LOCK# H_D#11 J23 D[ 10] # D[42]# W24 H_D#43
4 H_ADSTB#0 ADSTB[0]# D[ 11] # D[43]#
C1 H_D#12 H22 W25 H_D#44
4 H_REQ#[4:0] RESET# H_CPURST# 4 D[ 12] # D[44]#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
K3
H2
K2
J3
REQ
REQ
REQ
[0
]#
[1
]#
[2
]#
RS[0]#
RS[1]#
RS[2]#
F3
F4
G3
G2
H_RS#0 4
H_RS#1 4
H_RS#2 4
H_D#13
H_D#14
H_D#15
F26
K22
H23
J26
D[ 1
D[ 1
D[ 1
3] #
4] #
5] #
D[45]#
D[46]#
D[47]#
AA23
AA24
AB25
Y26
H_D#45
H_D#46
H_D#47
Sheet 2 of 38
H_TRDY# 4 4 H_DSTBN#0 H_DSTBN#2 4
Merom CPU-1
H_REQ#4 L1 REQ[3
]# TRDY# H26 DSTBN[0]# DSTBN[2]# AA26
REQ[4
]# 4 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 4
G6 H25 U22
4 H_A#[ 3
5:3]
H_A#17 Y2
HIT#
E4
H_HI T
# 4 4 H_DINV#0 DI NV[0]# DINV[2]# H_DINV#2 4 Zo= 5 5O ? 5 %
H_A#18 U5
A[17]# HITM# H_HI T
M# 4 Zo= 5 5O ? 5 %
H_A#19 R3 A[18]# AD4 H_BPM 0# 4 H_D#[63:0] H_D#16 N22 AE24 H_D#48 H_D#[63:0] 4
H_A#20 W6 A[19]# BPM[0]# AD3 H_BPM 1# H_D#17 K25 D[ 16] # D[48]# AD24 H_D#49
A[20]# BPM[1]# D[ 17] # D[49]#
1
ADDR GROUP
XDP/ ITP SI GNALS
H_A#21 U4 AD1 H_BPM 2# H_D#18 P26 AA21 H_D#50

A[21]# BPM[2]# D[ 18] # D[50]#
H_A#22 Y5 AC4 H_BPM 3# H_D#19 R23 AB22 H_D#51
A[22]# BPM[3]# D[ 19] # D[51]#
H_A#23 U1 AC2 H_PRDY# H_D#20 L23 AB21 H_D#52
A[23]# PRDY# D[ 20] # D[52]#
DATA GRP 1
H_A#24 R4 AC1 H_PREQ# H_D#21 M24 AC26 H_D#53
DAT A GRP 3
H_A#25 T5 A[24]# PREQ# AC5 H_TCK H_D#22 L22 D[ 21] # D[53]# AD20 H_D#54
H_A#26 T3 A[25]# TCK AA6 H_TDI H_D#23 M23 D[ 22] # D[54]# AE22 H_D#55
A[26]# TDI D[ 23] # D[55]#
H_A#27 W2 AB3 H_TDO H_D#24 P25 AF23 H_D#56
A[27]# TDO D[ 24] # D[56]#
H_A#28 W5 AB5 H_TMS H_D#25 P23 AC25 H_D#57
A[28]# TMS D[ 25] # D[57]#
H_A#29 Y4 AB6 H_TRST# H_D#26 P22 AE21 H_D#58
H_A#30 U2 A[29]# TRST# C20 I TP_DBRST# H_D#27 T24 D[ 26] # D[58]# AD21 H_D#59
H_A#31 V4 A[30]# DBR# H_D#28 R24 D[ 27] # D[59]# AC22 H_D#60
H_A#32 W3 A[31]# H_D#29 L25 D[ 28] # D[60]# AD23 H_D#61
A[32]# D[ 29] # D[61]#
H_A#33 AA4 THERM AL H_D#30 T25 AF22 H_D#62
A[33]# D[ 30] # D[62]#
H_A#34 AB2 H_D#31 N25 AC23 H_D#63
A[34]# D[ 31] # D[63]#
H_A#35 AA3 D21 H_PROCHOT# 4 H_DSTBN#1 L26 AE25 H_DSTBN#3 4
V1 A[35]# PROCHOT# A24 H_THERMDA M26 DSTBN[1]# DSTBN[3]# AF24
4 H_ADSTB#1 ADSTB[1]# THERMDA 4 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 4
B25 H_THERMDC N24 AC20
THERMDC 4 H_DINV#1 DI NV[1]# DINV[3]# H_DINV#3 4
A6
12 H_A2
0M# A20M#
A5 C7 AD26 R26 COMP0
12 H_FERR# FERR# T
HERMTRIP# PM_THRMTRIP# 5,12 GTLREF COMP[0]
C4 CPU_TEST1 C23 U26 COMP1
12 H_IGNNE# IGNNE# T286 CPU_TEST2 D25 TEST1 COMP[1] AA1 COMP2
T287 TEST2 COMP[2]
D5 Z0218 C24 Y1 COMP3
12 H_STPCLK# STPCLK# TEST3 COMP[3]
C6 HCL K CPU_TEST4 AF26 M ISC
12 H_INTR LINT0 T288 TEST4
I CH
B4 A2
2 Z0216 AF1 E5
12 H_NM I LINT1 BCLK[ 0] CLK_CPU_
BCLK 16 TEST5 DPRSTP# H_DPRSTP# 5,12,31
A3 A2
1 Z0217 A26 B5
12 H_SMI# SMI# BCLK[ 1] CLK_CPU_
BCLK# 16 TEST6 DPSLP# H_DPSLP# 12
D24 H_DPWR# 4
Z0201 M4 B22 DPWR# D6
RSVD[01] 4 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGD 1 2
Z0202 N5 B23 D7
RSVD[02] 4 CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# 4
Z0203 T2 C21 AE6
RSVD[03] 4 CPU_BSEL2 BSEL[2] PSI# PSI# 31
RESERVED
Z0204 V3
RSVD[04]
Z0205 B2 Me
rom Ball- o
ut Rev 1a
Z0206 C3 RSVD[05]
RSVD[06]
Layout note:
Z0207 D2
Z0208 D22 RSVD[07] Zo=55 ohm, 0.5"max f or GTLREF
RSVD[08]
Z0209 D3
Z0210 F6
RSVD[09] 10mils CPU_GTLREF R2
66 1K_1%_04
RSVD[10] 1.05VS
6-86-2 7479-006
6-86-2 7479-007 C343 C342 R265
Me
rom Ball- o
ut Rev 1a 6-86-2 7479-008
0.1u_1
0V_X
7R_04 2K_1%_04
2.2u_6.3V_06
1.05VS
If PROCHOT# is routed between CPU, IMVP and MCH,
R291 56_04 H_
I ERR# Layout no te:
R16 *54. 9
_1%_04 H_
PREQ # pull-up resistor has to be 75 ohm ? 5%. If not
R279 68.1_1%_06 H_PROCHOT# use, pull-up resistor has to be 58 ohm ? 5% COMP0, CO MP2: 0.5" Max, Zo=27 .4 Ohms
COMP1, CO MP3: 0.5" Max, Zo=55 Ohms
R264 39_1%_04 H_
TMS Layout Note: Best esti mate is 18 mils wide trace for outer
R268 150_1%_0
4 H_
TDI VDD3
Within 2.0" 3.3V

layers an d 14 mils wide trace if on internal
V_THRM
R263 27.4_1%_04 H_
TCK of the CPU layers.
R262 680_1%_04 H_
TRST# R288
R289 0_04
C402 COMP0
10K_04 COMP1
R2
90 C40
3 0.1u_16V_04 COMP2
3.3VS R280 R278 COMP3
100K_04 1u_6.3V_04
R298 150_1%_0
4 ITP_DBRST# 4. 7
K_04 4
. 7K_04
U19 R14 R15 R269 R270

THERM_ALERT# 22
1 4
H_THERMDAR417 0_04 2 VDD THERM
D+
6 -06-75140-061
6 Z0215 C A
ALERT PM_THRM# 14 54.9_1%_04
C394 27.4_1%_04 54.9_1%_04 27.4_1%_04
R28
7 *0_0
4 D20 SCS751V-40
1000p
_50V_04
3 7
H_THERMDCR418 0_04 5 D- SDATA 8 SMD_CPU_THERM 2
2
GND SCLK SMC_CPU_THERM 2
2
ASC7511M8
6-02- 01032-HJ1
Layout Note : Layout Note: ASC7525
6-02-07525-LD0
Route H_THE RMDA and Near to Ther mal
H_THERMDC o n same layer. IC 11
, 13
. .15,17, 23
,24, 2
6.. 29 3.3V
12,22,24,25,27 , 30 VDD3
10 mil trac e on 10 mil spacing. 3..5,7,8,12,15,28 1.05VS
5,8..26,31 3.3VS
Merom CPU-1 B - 3

Schematic Diagrams
Merom CPU-2
PLACE NEAR CPU
VCORE
C380 C3
78 C376 C347 C345 C337 C400 C396 C35 C335
10u_10V_08 10u_10V_08 10u_10V_08 10u_

10V_08 10u_10V_08 10u_10V_08 10u_10V_08 10u_1
0V_08 10u_10V_08 10u_10V_08
VCORE VCORE JSKT1D

JSKT1C A4 P6 VCORE
A7 AB20 A8 VSS[001] VSS[ 082
] P21
A9 VCC[001] VCC[068] AB7 A11 VSS[002] VSS[ 083
] P24
VCC[002] VCC[069] VSS[003] VSS[ 084
]
A10 AC7 A14 R2
VCC[003] VCC[070] VSS[004] VSS[ 085
]
A12 AC9 A16 R5 C379 C377 C375 C3
46 C338
VCC[004] VCC[071] VSS[005] VSS[ 086
]
A13 AC12 A19 R22
VCC[005] VCC[072] VSS[006] VSS[ 087
]
A15 AC13 A23 R25 22u_6
. 3V_08 22u_6.3V_08 22u
_6. 3
V_08 22u_6.3V_0
8 22u_6.3V_08
A17 VCC[006] VCC[073] AC15 AF2 VSS[007] VSS[ 088
] T1
A18 VCC[007] VCC[074] AC17 B6 VSS[008] VSS[ 089
] T4
A20 VCC[008] VCC[075] AC18 B8 VSS[009] VSS[ 090
] T23
VCC[009] VCC[076] VSS[010] VSS[ 091
]
B7 AD7 B11 T26
VCC[010] VCC[077] VSS[011] VSS[ 092
]
B9 AD9 B13 U3 C336 C398 C36 C3
8 C339
VCC[011] VCC[078] VSS[012] VSS[ 093
]
B10 AD10 B16 U6
VCC[012] VCC[079] VSS[013] VSS[ 094
]
B12 AD12 B19 U21 22u_6.3V_08 22u_6.3V_08 22u_6.3V_08 22u_6.3V_08 22u_6.3V_
08
VCC[013] VCC[080] VSS[014] VSS[ 095
]
B14 AD14 B21 U24
B15 VCC[014] VCC[081] AD15 B24 VSS[015] VSS[ 096
] V2
B17 VCC[015] VCC[082] AD17 C5 VSS[016] VSS[ 097
] V5
B18 VCC[016] VCC[083] AD18 C8 VSS[017] VSS[ 098
] V22
VCC[017] VCC[084] VSS[018] VSS[ 099
] VCORE
B20 AE9 C11 V25
VCC[018] VCC[085] VSS[019] VSS[ 100

]
C9 AE10 C14 W1
VCC[019] VCC[086] VSS[020] VSS[ 101
]
C10 AE12 C16 W4
VCC[020] VCC[087] VSS[021] ]
VSS[ 102
C12 AE13 C19 W23
C13 VCC[021] VCC[088] AE15 C2 VSS[022] VSS[ 103
] W26 C352 C358 C348 C357 C341 C399
] Y3
] Y6
VCC[024] VCC[091] VSS[025] VSS[ 106
] 1u_6.3V_04 1u_6.3V_04 1u_6.3V_04 1u
_6.3V_04 1u_6.3V_04 1u_6.3V_04
C18 AE20 D1 Y21
VCC[025] VCC[092] VSS[026] VSS[ 107
]
D9 AF9 D4 Y24
VCC[026] VCC[093] VSS[027] VSS[ 108
]
Sheet 3 of 38 D10
D12
D14
D15
VCC[027]
VCC[028]
VCC[029]
VCC[094]
VCC[095]
VCC[096]
AF10
AF12
AF14
AF15
D8
D11
D13
D16
VSS[028]
VSS[029]
VSS[030]
VSS[ 109
]
VSS[ 110
]
VSS[ 111
]
AA2
AA5
AA8
AA11
VCORE
Merom CPU-2 D17

D18
E7
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AF17
AF18
AF20
D19
D23
D26
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[ 112
]
VSS[ 113
]
VSS[ 114
]
VSS[ 115
]
AA14
AA16
AA19
C395 C351 C37 C401 C383 C350
E9 E3 AA22
E10
VCC[034]
G21 80mils E6
VSS[035] VSS[ 116
]
AA25
1u_6.3V_04 1u_6.3V_04 1u_6.3V_04 1u_6.3V_04 1u_6.3V_04 1u_6.3V_04
VCC[035] VCCP[01] 1.05VS VSS[036] VSS[ 117
]
E12 V6 E8 AB1
E13 VCC[036] VCCP[02] J6 E11 VSS[037] VSS[ 118
] AB4
E15 VCC[037] VCCP[03] K6 C367 C366 E14 VSS[038] VSS[ 119
] AB8 VCORE
E17 VCC[038] VCCP[04] M6 22u_
6. 3V_08 22u_6
. 3V_08 E16 VSS[039] VSS[ 120
] AB11
E18 VCC[039] VCCP[05] J21 E19 VSS[040] VSS[ 121
] AB13
VCC[040] VCCP[06] VSS[041] VSS[ 122
]
E20 K21 E21 AB16
VCC[041] VCCP[07] VSS[042] VSS[ 123
]
F7 M21 E24 AB19 C355 C354 C340 C397 C349 C344
VCC[042] VCCP[08] VSS[043] VSS[ 124
]
F9 N21 F5 AB23
VCC[043] VCCP[09] VSS[044] VSS[ 125
]
F10 N6 F8 AB26 0.01u
_16V_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_
04 0.1u_10V_X7R_04 0.01u_16V_04
F12 VCC[044] VCCP[10] R21 1.5VS F11 VSS[045] VSS[ 126
] AC3
VCC[045] VCCP[11]
Layout not e: VSS[046] VSS[ 127
]
F14 R6 F13 AC6
F15 VCC[046] VCCP[12] T21 20mils Near pin B26,C26 F16 VSS[047] VSS[ 128
] AC8
VCC[047] VCCP[13] VSS[048] VSS[ 129
]
F17 T6 F19 AC11
VCC[048] VCCP[14] VSS[049] VSS[ 130
]
F18 V21 C392 C393 F2 AC14
VCC[049] VCCP[15] VSS[050] VSS[ 131
]
F20 W21 F22 AC16
VCC[050] VCCP[16] VSS[051] VSS[ 132
]
AA7 10u_10V_08 0.01u_16V_04 F25 AC19
VCC[051] VSS[052] VSS[ 133
]
AA9 B26 G4 AC21
AA10 VCC[052] VCCA[01] C26 G1 VSS[053] VSS[ 134
] AC24
AA12 VCC[053] VCCA[02] G23 VSS[054] VSS[ 135
] AD2
AA13 VCC[054] AD6 G26 VSS[055] VSS[ 136
] AD5
VCC[055] VID[0] H_VID0 31 VSS[056] VSS[ 137
]
AA15 AF5 H3 AD8
] 1.05VS
AA17 AE5 H6 AD11
]
AA18 AF4 H21 AD13 EMI
]
AA20 AE3 H24 AD16
AB9 VCC[059] VID[4] AF3 H_VID4 31 J2 VSS[060] VSS[ 141
] AD19
]
AC10 AE2 J5 AD22 C415 C360 C373 C36
2 C33 C19 C422
] +
AB10 J22 AD25
AB12 VCC[062] J25 VSS[063] VSS[ 144
] AE1 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10
V_X7R_04 0. 1u
_10V_X
7R_04 0.1u_10V_X7R_04
VCC[063] VSS[064] VSS[ 145
] 22
0u_4V_
D
AB14 AF7 VCCSENSE K1 AE4
VCC[064] VCCSENSE VCCSENSE 31 VSS[065] VSS[ 146
]
AB15 K4 AE8
VCC[065] VSS[066] VSS[ 147
]
AB17 K23 AE11
VCC[066] VSS[067] VSS[ 148
]
AB18 AE7 VSSSENSE VSSSENSE 31 K26 AE14
VCC[067] VSSSENSE L3 VSS[068] VSS[ 149
] AE16
Merom Ball-out Rev 1a L6 VSS[069] VSS[ 150
] AE19 1.05VS
R260 R261 L21 VSS[070] VSS[ 151
] AE23
. VSS[071] VSS[ 152
]
Layout note : L24 AE26
VSS[072] VSS[ 153
]
6-86-27 479-006 M2 A2
VSS[073] VSS[ 154
]
0_06 0_06 Route VCCSENSE and M5 AF6 C363 C359 C3
71 C34 C39
6-86-27 479-007 M22
VSS[074] VSS[ 155
]
AF8
VSSSENSE traces at 27.4Ohm M25 VSS[075] VSS[ 156
] AF11 0.1u_10V_X7R_04 0.1u_10V_X7R_0
4 0.1u_10V_X7R_04 0.1u_1
0V_X7
R_04 0. 0
1u_16V_04
6-86-27 479-008 VSS[076] VSS[ 157
]
VCORE with 50 mil spacing. N1 AF13
N4 VSS[077] VSS[ 158
] AF16
Place PU and PD within 1 VSS[078] VSS[ 159
]
N23 AF19
inch of CPU. VSS[079] VSS[ 160
]
N26 AF21
P3
VSS[080]
VSS[081]
VSS[ 161
]
VSS[ 162
]
A25 +VCC P = 1.05 V (0 .997 V~1 .102 V)
AF25
VSS[ 163
]
Me
r om Ball-out Rev 1a
.
8,12,13,15,17,23,26,28 1.5VS
2,4,5,7,8,12,15,28 1.05VS
31 VCO RE
B - 4 Merom CPU-2

Schematic Diagrams
GM965 Crestline 1/5
U2A
J13 H_A#3 H_A#[35:3] 2
2 H_D#[63:0] H_D#0 E2 H_A#_3 B11 H_A#4
H_D#1 G2 H_D#_0 H_A#_4 C11 H_A#5
H_D#2 G7 H_D#_1 H_A#_5 M11 H_A#6
H_D#3 M6 H_D#_2 H_A#_6 C15 H_A#7
H_D#4 H7 H_D#_3 H_A#_7 F16 H_A#8
H_D#5 H3 H_D#_4 H_A#_8 L13 H_A#9
H_D#6 G4 H_D#_5 H_A#_9 G17 H_A#10
H_D#7 F3 H_D#_6 H_A#_10 C14 H_A#11
H_D#8 N8 H_D#_7 H_A#_11 K16 H_A#12
H_D#9 H2 H_D#_8 H_A#_12 B13 H_A#13 Host Clock
H_D#_9 H_A#_13 BSEL2
H_D#10 M10 H_D#_10 H_A#_14 L16 H_A#14 BSEL1 BSEL0 Frequency
H_D#11 N12 H_D#_11 H_A#_15 J17 H_A#15
H_D#12 N9 B14 H_A#16 0 0 1 133 MHz 533 MHz
H_D#13 H5 H_D#_12 H_A#_16 K19 H_A#17
H_D#14 P13 H_D#_13 H_A#_17 P15 H_A#18
H_D#_14 H_A#_18 0 1 0 200 MHz 800 MHz
H_D#15 K9 H_D#_15 H_A#_19 R17 H_A#19
H_D#16 M2 B16 H_A#20
H_D#17 W10 H_D#_16 H_A#_20 H20 H_A#21
H_D#18 Y8 H_D#_17 H_A#_21 L19 H_A#22
H_D#_18 H_A#_22
L ayout Noti ce: H_D#19 V4 H_D#_19 H_A#_23 D17 H_A#23
H_D#20 M3 H_D#_20 H_A#_24 M17 H_A#24
0 .1uF shoul d be p laced H_D#21 J1 N16 H_A#25
H_D#22 N5 H_D#_21 H_A#_25 J19 H_A#26
1 00mil s or less f rom G MCH H_D#23 N3 H_D#_22 H_A#_26 B18 H_A#27
p in. H_D#_23 H_A#_27 1.05VS
H_D#24 W6 H_D#_24 H_A#_28 E19 H_A#28
H_D#25 W9 B17 H_A#29
H_D#26 N2 H_D#_25 H_A#_29 B15 H_A#30
H_D#27 Y7 H_D#_26 H_A#_30 E17 H_A#31
H_D#_27 H_A#_31
H_D#28 Y9 H_D#_28 H_A#_32 C18 H_A#32 R294
H_D#29 P4 H_D#_29 H_A#_33 A19 H_A#33
L ayout Notic e:
1 0 mil s wide , 20 mils spaci ng
H_D#30
H_D#31
H_D#32
W3
N1
AD12
H_D#_30
H_D#_31
H_A#_34
H_A#_35
B19
N19
H_A#34
H_A#35
R284 0_04
*56_04
Sheet 4 of 38
H_D#_32 2 CPU_BSEL0 CLK_BSEL0 16
H_D#33 AE3 G12
1.05VS
H_D#34
H_D#35
AD9
AC9
H_D#_33
H_D#_34
H_D#_35
HOST H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H17
G20
H_ADS# 2
H_ADSTB#0 2
H_ADSTB#1 2
R283 1K_1%_04 R295
GM965 Crestline 1/5
H_D#36 AC7 H_D#_36 H_BNR# C8 H_BNR# 2
R300 54.9_1%_04 MCH_HSCOMP H_D#37 AC14 H_D#_37 H_BPRI# E8 H_BPRI# 2 1K_1%_04
H_D#38 AD11 H_D#_38 H_BREQ# F12 H_BR0# 2
R301 54.9_1%_04 MCH_HSCOMP# H_D#39 AC11 D6
H_D#40 AB2 H_D#_39 H_DEFER# C10 H_DEFER# 2 MCH_BSEL0 5
R303 24.9_1%_04 MCH_HRCOMP H_D#41 AD7 H_D#_40 H_DBSY# AM5 H_DBSY# 2
H_D#_41 HPLL_CLK CLK_MCH_BCLK 16
H_D#42 AB1 H_D#_42 HPLL_CLK# AM7 CLK_MCH_BCLK# 16
H_D#43 Y3 H8 1.05VS
H_D#44 AC6 H_D#_43
H_D#_44
GM 965 H_DPWR#
H_DRDY#
K7 H_DPWR# 2
H_DRDY# 2
H_D#45 AE2 H_D#_45 H_HIT# E4 H_HIT# 2
H_D#46 AC5 H_D#_46 H_HITM# C6 H_HITM# 2
H_D#47 AG3 H_D#_47 H_LOCK# G10 H_LOCK# 2 R292
H_D#48 AJ9 B7
H_D#49 AH8 H_D#_48 H_TRDY# H_TRDY# 2 1K_1%_04
L ayout Notic e: H_D#_49
H_D#50 AJ14 H_D#_50
M CH_HS WING a 10 m ils t races H_D#51 AE9 H_D#_51 2 CPU_BSEL1 R281 0_04 CLK_BSEL1 16
a nd 20 mils spaci ng H_D#52 AE11 H_D#_52
H_D#53 AH12 K5
H_D#54 AJ5 H_D#_53 H_DI NV#_0 L2 H_DINV#0 2 R293
H_D#55 AH5 H_D#_54 H_DI NV#_1 AD13 H_DINV#1 2
H_D#_55 H_DI NV#_2 H_DINV#2 2
H_D#56 AJ6 H_D#_56 H_DI NV#_3 AE13 H_DINV#3 2 1K_1%_04
1.05VS H_D#57 AE7
H_D#58 AJ7 H_D#_57 M7
H_D#59 AJ2 H_D#_58 H_DSTBN#_0 K3 H_DSTBN#0 2 MCH_BSEL1 5
H_D#_59 H_DSTBN#_1 H_DSTBN#1 2
H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 2
R304 H_D#61 AJ3 AH11 1.05VS
H_D#62 AH2 H_D#_61 H_DSTBN#_3 H_DSTBN#3 2
221_1%_04 H_D#63 AH13 H_D#_62 L7
H_D#_63 H_DSTBP#_0 K2 H_DSTBP#0 2
H_DSTBP#_1 H_DSTBP#1 2
10mils H_DSTBP#_2 AC2 H_DSTBP#2 2 R297
MCH_HSWING B3 AJ10
MCH_HRCOMP C2 H_SWING H_DSTBP#_3 H_DSTBP#3 2 1K_1%_04
H_RCOMP M14 H_REQ#0 H_REQ#[4: 0] 2
1.05VS H_REQ#_0
R305 C416 C417 MCH_HSCOMP W1 H_SCOMP H_REQ#_1 E13 H_REQ#1 2 CPU_BSEL2 R285 0_04 CLK_BSEL2 16
MCH_HSCOMP# W2 H_SCOMP# H_REQ#_2 A11 H_REQ#2
100_1%_04 0.1u_10V_X7R_04 2.2u_6. 3V_06 H13 H_REQ#3
B6 H_REQ#_3 B12 H_REQ#4 R296
R306 2 H_CPURST# E5 H_CPURST# H_REQ#_4
2 H_CPUSLP# H_CPUSLP#
H_RS#_0 E12 H_RS#0 2 1K_1%_04
1K_1%_04 H_RS#_1 D7 H_RS#1 2
10mils D8
Z0401 B9 H_RS#_2 H_RS#2 2 MCH_BSEL2 5
H_AVREF
A9 H_DVREF
GM965 CRESTLINE
R307 C421 C420 C419
6-0 3-009 65-0S0
2K_1%_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 2.2u_6.3V_06
2, 3,5,7,8,12, 15,28 1.05VS
GM965 Crestline 1/5 B - 5

Schematic Diagrams
GM965 Crestline 2/5, DRAM

22 L _ B K _ CT R
DMI X2 select
U 2B R 50 R 54 2 4 . 9 _ 1 % _ 04
1 .0 5 VS
MC H _C F G _ 5
Z 0 50 1 P3 6 * 0_ 0 4 U2 C
Z 0 50 2 P3 7 R SVD 1 AV2 9
R SVD 2 S M _ C K _0 M _ CL K _ D DR 0 9
R3 2 Z 0 50 3 R 35 BB2 3 L _ B K _ C T RL J4 0
R SVD 3 S M _ C K _1 M _ CL K _ D DR 1 9 11 BL O N L _B K L T _C T R L
Z 0 50 4 N 35 BA2 5 H3 9 N4 3 Z 0 5 1 3 9
*4 . 0 2 K _ 1 % _ 0 4 Z 0 50 5 AR 1 2 R SVD 4 S M _ C K _3 AV2 3 M _ CL K _ D DR 2 1 0
M _ CL K _ D DR 3 1 0
Z di ff= 3 .3 V S
R 323 1 0 K_ 0 4 Z 05 1 4 5 E 3 9 L _B K L T _E N P E G _ C OM P I M4 3
Z 0 50 6 AR 1 3 R
R
SVD
SVD
5
6
S M _ C K _4 7 0O ? 0 % R 325 1 0 K_ 0 4 Z 05 1 4 6 E 4 0 L _C
L _C
T RL _ C L K
T RL _ D A T A
P E G _C O MP O
Z 0 50 7 AM 1 2 AW 3 0 C3 7
R SVD 7 S M _ C K # _0 M _ CL K _ D DR 0 # 9 11 P _ D D C _C L K L _D D C_ C L K
Z 0 50 8 AN 1 3 BA2 3 M _ CL K _ D DR 1 # 9 1 1 P _ D D C _ D A TA D3 5 J 51
Z 0 50 9 J12 R SVD 8 S M _ C K # _1 AW 2 5 K4 0 L _D D C_ D A T A P E G_ R X #_ 0 L 51
R SVD 9 S M _ C K # _3 M _ CL K _ D DR 2 # 1 0 11 E NA VDD L _V DD _ E N P E G_ R X #_ 1
Z 0 51 0 AR 3 7 AW 2 3 N4 7
R SVD 10 S M _ C K # _4 M _ CL K _ D DR 3 # 1 0 P E G_ R X #_ 2
PCI express graphics lane Z 0 51 1 AM 3 6 R 51 2 .3 7 K _ 1 % _ 0 4 L VD S _ IB G L4 1 T 45
R SVD 11 L V DS _I B G P E G_ R X #_ 3
MUXING
Z 0 51 2 AL 3 6 BE2 9 M _ CK E 0 9 L VD S_ VBG L4 3 T 50
reverse option for layout Z 0 51 3 AM 3 7 R SVD 12 S M _C K E _0 AY 3 2 N4 1 L V DS _V B G P E G_ R X #_ 4 U4 0
R SVD 13 S M _C K E _1 M _ CK E 1 9 L V DS _V R E F H P E G_ R X #_ 5
convenience Z 0 51 4 D 20 BD 3 9 N4 0 Y4 4
R SVD 14 S M _C K E _3 M _ CK E 2 10 L V DS _V R E F L P E G_ R X #_ 6
BG 3 7 D4 6 Y4 0
S M _C K E _4 M _ CK E 3 10 11 L V D S -L C L K N L V DS A_ CL K# P E G_ R X #_ 7
C 70 11 L V D S - LC L K P C4 5 AB5 1
L V DS A_ CL K P E G_ R X #_ 8
L VDS
MC H _C F G _ 9 BG 2 0 Z 05 1 3 7 D 4 4 W49
S M _ C S # _0 M _ CS 0 # 9 Z o= L V DS B_ CL K# P E G_ R X #_ 9
RSVD
0 .1 u _ 1 6 V_ 0 4 BK1 6 Z 05 1 3 8 E 4 2 A D 44
S M _ C S # _1
S M _ C S # _2
BG 1 6
M _ CS 1 #
M _ CS 2 #
9
10
5 5O? 5% L V DS B_ CL K P E G_ R X # _1 0
P E G_ R X # _1 1
A D 40
R3 1 Z 0 51 5 H 10 BE1 3 G5 1 A G 46
R SVD 20 S M _ C S # _3 M _ CS 3 # 10 11 L V D S -L 0 N L V D S A _ D A TA # _0 P E G_ R X # _1 2
Z 0 51 6 B5 1 E5 1 A H 49
R SVD 21 11 L V D S -L 1 N L V D S A _ D A TA # _1 P E G_ R X # _1 3
*4 . 0 2 K _ 1 % _ 0 4 Z 0 51 7 BJ 2 0 BH 1 8 F49 A G 45
DDR
R SVD 22 S M _O D T _0 M _ OD T 0 9 11 L V D S -L 2 N L V D S A _ D A TA # _2 P E G_ R X # _1 4
Z 0 51 8 BK2 2 BJ 1 5 1 .8 V L V D S A _D A T A # 3 C4 8 A G 41
Z 0 51 9 BF1 9 R SVD 23 S M _O D T _1 BJ 1 4 M _ OD T 1
M _ OD T 2
9
10
Zd iff = L V D S A _ D A TA # _3 P E G_ R X # _1 5
Z 0 52 0 BH 2 0 R SVD 24 S M _O D T _2 BE1 6 10 0O? 0% G5 0 J 50
GRAP HICS
R SVD 25 S M _O D T _3 M _ OD T 3 10 11 L V D S -L 0 P L V D S A _ D A TA _ 0 P E G _ R X_ 0
Z 0 52 1 BK1 8 E5 0 L 50
R SVD 26 11 L V D S -L 1 P L V D S A _ D A TA _ 1 P E G _ R X_ 1
MC H _C F G _ 1 2 Z 0 52 2 BJ 1 8 BL 1 5 S M _ R C O MP F48 M4 7
Z 0 52 3 BF2 3 R
R
SVD
SVD
27
28
GM96 5 S M _ R C OM P
S M _ R C O MP #
BK1 4 S M _ R C O MP # 11 L V D S -L 2 P L V D S A _D A T A 3 D4 7 L V D S A _ D A TA _ 2
L V D S A _ D A TA _ 3
P E G _ R X_ 2
P E G _ R X_ 3
U4 4
Z 0 52 4 BG 2 3 R 69 T 49
R SVD 29 P E G _ R X_ 4
Sheet 5 of 38
R3 0 Z 0 52 5 BC 2 3 BK3 1 S M _ R C O MP _V OH 1 K_ 1 % _ 0 4 Z05131 G4 4 T 41
R SVD 30 S M_ R C O M P _ V O H L V D S B _ D A TA # _0 P E G _ R X_ 5
Z 0 52 6 BD 2 4 BL 3 1 S M _ R C O MP _V OL Z05132 B4 7 W45
*4 . 0 2 K _ 1 % _ 0 4 R SVD 31 S M_ R C O MP _ V OL Z05133 B4 5 L V D S B _ D A TA # _1 P E G _ R X_ 6 W41
AR 4 9 M _ V R E F _ MC H L V D S B _D A T A # 3 B4 4 L V D S B _ D A TA # _2 P E G _ R X_ 7 AB5 0
S M_ V R E F _0 L V D S B _ D A TA # _3 P E G _ R X_ 8
GM965 Crestline 2/5, M C H _ C F G_ 1 3

Z 0 52 7
Z 0 52 8
Z 0 52 9
BH 3 9
A W20
BK2 0
R SVD 3 4
R SVD 3 5
R SVD 3 6
S M_ V R E F _1
AW 4
C 159 R 68 C 160 C 54
Z05134
Z05135
Z05136
E4 4
A4 7
A4 5
L V D S B _ D A TA _ 0
L V D S B _ D A TA _ 1
GM965 P E G _ R X_ 9
P E G_ R X _1 0
P E G_ R X _1 1
Y4 8
A C 45
A C 41
A H 47
DRAM
L V D S B _ D A TA _ 2 P E G_ R X _1 2
B4 2 0 .0 1 u _ 1 6 V_ 0 4 L V D S B _D A T A 3 C4 4 A G 49
D P L L _ RE F _ CL K C L K_ D REF 1 6 2 .2 u _ 6 .3 V _ 0 6 2 .2 u _ 6 .3 V _ 0 6 L V D S B _ D A TA _ 3 P E G_ R X _1 3
C4 2 1 K_ 1 % _ 0 4 A H 45
PCI- EXPR ESS

D P L L _ RE F _ CL K # C L K_ D REF # 1 6 P E G_ R X _1 4
R3 3 H4 8 A G 42
CLK
D P LL _ R E F _ S S C L K C L K_ D REF S S 1 6 P E G_ R X _1 5
Z 0 53 2 A3 5 H4 7
R SVD 41 D P L L_ R E F _ S S C L K # C L K_ D REF S S# 1 6
*4 . 0 2 K _ 1 % _ 0 4 Z 0 53 3 B3 7 E2 7 N4 5
R SVD 42 T V A _ DA C P E G _ T X #_ 0
Z 0 53 4 B3 6 K4 4 C L K_ P C IE_ 3 G PL L 1 6 3 .3 V S G2 7 U3 9
Z 0 53 5 B3 4 R SVD 43 PE G _ CL K K4 5 K2 7 T V B _ DA C P E G _ T X #_ 1 U4 7
R SVD 44 P E G _ CL K # C L K _ P C I E _ 3 G P L L # 16 T V C_ D A C P E G _ T X #_ 2
TV
Z 0 53 6 C 34 P M _ E X T TS 0 # R3 2 7 10 K _0 4 N5 1
R SVD 45 P E G _ T X #_ 3
F27 R5 0
clock un-gating P M _ E X T TS 1 # R3 2 6 10 K _0 4 J2 7 T V A _ RT N P E G _ T X #_ 4 T 42
AN 4 7 L2 7 T V B _ RT N P E G _ T X #_ 5 Y4 3
D MI _R X N _0 D M I _ TX N 0 1 3 T V C_ R T N P E G _ T X #_ 6
AJ 3 8 M CH _ CL K R E Q # R3 6 10 K _0 4 W46
D MI _R X N _1 D M I _ TX N 1 1 3 P E G _ T X #_ 7
FSB Dynamic ODT AN 4 2 Z05129 M3 5 W38
D MI _R X N _2 AN 4 6 D M I _ TX N 2 1 3 Z05130 P3 3 T V _ D C ON S E L_ 0 P E G _ T X #_ 8 A D 39
D MI _R X N _3 D M I _ TX N 3 1 3 T V _ D C ON S E L_ 1 P E G _ T X #_ 9 A C 46
P E G _ T X # _1 0
AM 4 7 A C 49
P2 7
D M I _ R X P _0
AJ 3 9
D M I _ TX P 0 1 3 Z o= 55O ? 5% 08/16/2007
P E G _ T X # _1 1
A C 42
4 M C H _ B S E L0 N 27 C FG _0 D M I _ R X P _1 AN 4 1 D M I _ TX P 1 1 3 C 454 4 7 p _ 50 V _0 4 P E G _ T X # _1 2 A H 39
4 M C H _ B S E L1 C FG _1 D M I _ R X P _2 D M I _ TX P 2 1 3 P E G _ T X # _1 3
M C H _ C F G_ 1 6 N 24 AN 4 5 C 450 4 7 p _ 50 V _0 4 AE4 9
4 M C H _ B S E L2 C FG _2 D M I _ R X P _3 D M I _ TX P 3 1 3 P E G _ T X # _1 4
Z0537 C 21 C 443 4 7 p _ 50 V _0 4 A H 44
C FG _3 P E G _ T X # _1 5
Z0538 C 23 AJ 4 6 D M I_ RXN 0 1 3
R2 9 M C H _ C F G_ 5 F2 3 C FG _4 D MI _ T X N _0 AJ 4 1 H3 2 M4 5
DMI
C FG _5 D MI _ T X N _1 D M I_ RXN 1 1 3 11 D A C _B L U E CR T _ BL UE P E G _ T X_ 0
Z0539 N 23 AM 4 0 R3 1 7 *1 5 0 _ 1 % _ 04 G3 2 T 38
C FG _6 D MI _ T X N _2 D M I_ RXN 2 1 3 Z o= CR T _ BL UE # P E G _ T X_ 1
CFG
*4 . 0 2 K _ 1 % _ 0 4 Z0540 G 23 AM 4 4 K2 9 T 46
Z0541 J20
C
C
FG
FG
_7
_8
D MI _ T X N _3 D M I_ RXN 3 1 3 3 7. 5O? 5% 11 D A C _G R E E N
R3 1 4 *1 5 0 _ 1 % _ 04 J2 9
CR
CR
T _ GR E E N
T _ GR E E N #
P E G _ T X_ 2
P E G _ T X_ 3
N5 0
M C H _ C F G_ 9 C 20 AJ 4 7 F29 R5 1
C FG _9 D M I _ TX P _0 D M I_ RXP 0 1 3 11 DA C _ R E D CR T _ RE D P E G _ T X_ 4
VGA
Z0542 R 24 AJ 4 2 R3 1 3 *1 5 0 _ 1 % _ 04 E2 9 U4 3
C FG _10 D M I _ TX P _1 D M I_ RXP 1 1 3 CR T _ RE D # P E G _ T X_ 5
Z0543 L23 AM 3 9 W42
C FG _11 D M I _ TX P _2 D M I_ RXP 2 1 3 P E G _ T X_ 6
M C H _ C F G_ 1 2 J23 AM 4 3 D M I_ RXP 3 1 3 Y4 7
3 .3 VS M C H _ C F G_ 1 3 E2 3 C FG _12 D M I _ TX P _3 K3 3 P E G _ T X_ 7 Y3 9
DMI lane reversal 11 D A C _ D D C A C L K
Z0544 E2 0 C FG _13 G3 5 CR T _ DD C_ C L K P E G _ T X_ 8 A C 38
C FG _14 1 1 D A C _ DD C A DA T A CR T _ DD C_ D A T A P E G _ T X_ 9
Z0545 K2 3 R 322 3 0 .1 _ 1 % _ 0 4 CR T _ HS F33 A D 47
R 43 M C H _ C F G_ 1 6 M 20 C FG _15 Zo= 11 D AC _ HSY N C R 318 1 .2 7 K _ 1 % _ 0 4 CR T _ T V O C3 2 CR T _ HS Y N C P E G _ T X _1 0 A C 50
GRAPHICS VID
Z0546 M 24 C
C
FG
FG
_16
_17
55O ? 5 % 11 D A C_ V S Y N C
0410 R 320 3 0 .1 _ 1 % _ 0 4 CR T _ V S E3 3 C R T _ TV O_ I R E F
CR T _ VSY NC
P E G _ T X _1 1
P E G _ T X _1 2
A D 43
* 4 . 0 2 K _ 1 % _ 04 Z0547 L32 A G 39
C FG _18 P E G _ T X _1 3
M C H _ C F G_ 1 9 N 33 AE5 0
M C H _ C F G_ 2 0 L35 C FG _19 P E G _ T X _1 4 A H 43
M C H _ C F G _ 19 C FG _20 C 46 7 C 4 70 P E G _ T X _1 5
MAX=0.5"
E3 5 * 30 P _5 0 V _ 0 4 * 3 0 P _ 50 V _0 4 GM 9 6 5 C R E S T L I N E
G 41 G F X _ V I D _0 A3 9 D F G T_ V I D _ 0 2 6 1. 8V
1 4 PM _ BM BU SY# D F G T_ V I D _ 1 2 6 Minimize REFSET
L39 P M_ B M _ B U S Y # G F X _ V I D _1 C3 8
2 ,1 2 ,3 1 H _ DP R S T P # P M_ D P R S T P # G F X _ V I D _2 D F G T_ V I D _ 2 2 6 routing length and
PM _ EXT TS0 # L36 B3 9
9 P M_ E X T T S 0 # P M_ E X T _ T S # _ 0 G F X _ V I D _3 D F G T_ V I D _ 3 2 6 shield with VSS
PM
10 P M_ E X T T S 1 # PM _ EXT TS1 # J36 E3 6 D F G T_ V R _ E N 2 6 R 319

A W49 P M_ E X T _ T S # _ 1 G F X _ V R _E N 1 .8 V
1 4 , 3 1 D E L A Y _P W R GD P W R OK
Z05140 AV2 0 1 K _1 % _ 0 4
1 3, 17 P L T_ R S T # R S T IN # 1 .2 5 VS
R 34 1 0 0 _1 % _ 0 4 N 20 S M _R C OM P R 310 2 0 _1 % _ 0 6 S M_ R C O M P _ V O H
2 , 1 2 P M _T H R MT R I P # T H E R MT R I P #
14 , 3 1 P M_ D P R S L P V R Z05141 G 36
R 46 0_04 D PR SL PVR S M_ R C O M P # R 309 2 0 _1 % _ 0 6 C4 6 2 C 459
AM 4 9 C4 2 3
C L _ CL K C L_ C L K 0 1 4
AK5 0 C L_ D A T A 0 1 4 R6 6 R 316
C L_ D A T A 0 .0 1 u _ 1 6 V _ 0 4 2 . 2 u _6 . 3 V _ 0 6
BJ 5 1 AT 4 3 0 . 1 u_ 1 6 V _ 0 4
ME
N C _1 CL _ P W RO K MP W R O K 14
BK5 1 AN 4 9 1 K _ 1 % _ 04 L VD S -L 0 N 3 .0 1 K _ 1 % _ 0 4
BK5 0 N C _2 C L _ R S T# AM 5 0 Z 0 5 14 4 CL _ R ST # 0 1 4 L VD S -L 0 P
N C _3 CL _ V R E F L VD S -L 2 N S M_ R C OM P _ V O L
SDVO/PCIE BL 5 0
3 .3 VS BL 4 9 N C _4 L VD S -L 2 P
Concurrent mode N C _5
BL 3 C 162 R 67 L VD S -L 1 N C4 4 5 C 447 R 315
N C _6
BL 2 L VD S -L 1 P
N C _7
NC
R 45 B K1 0 . 1 u _ 1 0 V _ X 7R _ 0 4 3 9 2 _1 % _ 0 4 L VD S -L C L K N 1 K _1 % _ 0 4
BJ 1 N C _8 H3 5 S D V O _C T _ C L K 6-13-39201-28B L VD S -L C L K P 0 .0 1 u _ 1 6 V _ 0 4 2 .2 u _ 6 .3 V _ 0 6
* 4 . 0 2 K _ 1 % _ 04 E1 N C _9 S D V O _ CT R L _ CL K K3 6 S D V O _C T _ D A T A
N C _1 0 S D V O _C T R L_ D A T A
C 42
A5 G3 9 M CH _ CL K R E Q #
C 48
C 44
C 47
C5 2
C 51
C5 0
C4 9
N C _1 1 C L K _ R E Q# MC H _C L K R E Q # 1 6
C 51 G4 0
MISC
M C H _ C F G _ 20 B5 0 N C _1 2 IC H_ S Y N C# MC H _I C H _ S Y N C # 1 4
A5 0 N C _1 3
*1 0 P _ 5 0 V _ 0 4
*1 0 P _ 5 0 V _ 0 4
* 1 0P _ 50 V _0 4
* 1 0 P _ 5 0 V _ 04
*1 0 P _ 5 0 V _ 0 4
*1 0 P _ 5 0 V _ 0 4
* 10 P _5 0 V _ 0 4
* 1 0 P _ 5 0V _ 04
N C _1 4
A4 9 A3 7 Z0 51 42 R 3 24 0_04
N C _1 5 T E S T _1
2 . . 4 , 7 , 8 , 1 2 , 1 5 , 2 8 1 . 0 5V S B K2 R3 2 Z0 51 43 R 39 2 0 K_ 1 % _ 0 4
N C _1 6 T E S T _2
2 ,8 ..2 6 ,3 1 3 .3 V S
GM 9 6 5 C R E S T L I N E
7 ..1 0 ,2 9 1 .8 V
8 , 1 5 , 2 6 1 . 2 5V S EMI
6-03-00965-0S0
B - 6 GM965 Crestline 2/5, DRAM

Schematic Diagrams
GM965 Crestline 3/5
U2E
10 M_B_DQ[63:0]
U2D M_B_DQ0 AP49 AY17
9 M_A_DQ[6
3: 0] SB_DQ_0 SB_
BS_0 M_
B_BS0# 10
M_
A_DQ0 AR43 BB19 M_B_DQ1 AR51 BG18
M_
A_DQ1 AW44
SA_DQ_0 SA_BS_0
BK19
M_A_BS0
# 9 Zo = 55 O? 5 % M_B_DQ2 AW50
SB_DQ_1 SB_
BS_1
BG36
M_
B_BS1# 10
Zo = 55 O? 5 % M_
A_DQ2 BA45 SA_DQ_1 SA_BS_1 BF29
M_A_BS1
# 9
M_A_BS2
# 9
M_B_DQ3 AW51 SB_DQ_2 SB_
BS_2 M_
B_BS2# 10
M_
A_DQ3 AY46 SA_DQ_2 SA_BS_2 M_B_DQ4 AN51 SB_DQ_3 BE17
SA_DQ_3 SB_DQ_4 SB_CAS# M_
B_CAS# 10
M_
A_DQ4 AR41 BL17 M_B_DQ5 AN50
SA_DQ_4 SA_CAS# M_A_CAS# 9 SB_DQ_5
M_
A_DQ5 AR45 M_B_DQ6 AV50 AR50
SA_DQ_5 SB_DQ_6 SB_DM_0 M_
B_DM0 10
M_
A_DQ6 AT42 AT45 M_B_DQ7 AV49 BD49
SA_DQ_6 SA_DM_0 M_A_DM0 9 SB_DQ_7 SB_DM_1 M_
B_DM1 10
M_
A_DQ7 AW47 BD44 M_B_DQ8 BA50 BK45
B_DM2 10
M_
A_DQ8 BB45 BD42 M_B_DQ9 BB50 BL39
M_
A_DQ9 BF48 SA_DQ_8 SA_DM_2 AW38 M_A_DM2 9 M_B_DQ10 BA49 SB_DQ_9 SB_DM_3 BH12 M_
B_DM3 10
B_DM4 10
M_
A_DQ10 BG47 AW13 M_B_DQ11 BE50 BJ7
SA_DQ_1
0 SA_DM_4 M_A_DM4 9 SB_DQ_11 SB_DM_5 M_
B_DM5 10
M_
A_DQ11 BJ45 BG8 M_B_DQ12 BA51 BF3
SA_DQ_1
B_DM6 10
M_
A_DQ12 BB47 AY5 M_B_DQ13 AY49 AW2
SA_DQ_1
B_DM7 10
M_
A_DQ13 BG50 AN6 M_B_DQ14 BF50
SA_DQ_1
3 GM96 5 SA_DM_7 M_A_DM7 9 SB_DQ_14 GM96 5
M_
A_DQ14
M_
A_DQ15
M_
A_DQ16
M_
A_DQ17
BH49
BE45
AW43
BE44
SA_DQ_1
4
SA_DQ_1
5
SA_DQ_1
6
SA_
SA_
DQS_0
DQS_1
AT46
BE48
BB43
M_A_DQ
M_A_DQ
S0 9
S1 9
M
M
M
M
_B_DQ15
_B_DQ16
_B_DQ17
_B_DQ18
BF49
BJ50
BJ44
BJ43
SB_DQ
SB_DQ
SB_DQ
_15
_16
_17
SB_DQS_0
SB_DQS_1
SB_DQS_2
AT50
BD50
BK46
BK39
M_
B_DQS0 10
M_
B_DQS1 10
M_
B_DQS2 10
Zo = 55 O? 5 % Sheet 6 of 38
M_A_DQ S2 9 Z o= 5 5O? 5 % M_
B_DQS3 10
GM965 Crestline 3/5

M_
A_DQ18 BG42 SA_DQ_1
7 SA_DQS_2 BC37 M_B_DQ19 BL43 SB_DQ_18 SB_DQS_3 BJ12
B
M_A_DQ S3 9 M_
B_DQS4 10
A
M_
A_DQ19 BE40 SA_DQ_1
8 SA_DQS_3 BB16 M_B_DQ20 BK47 SB_DQ_19 SB_DQS_4 BL7
SA_DQ_1
9 SA_DQS_4 M_A_DQ S4 9 SB_DQ_20 SB_DQS_5 M_
B_DQS5 10
M_
A_DQ20 BF44 BH6 M_B_DQ21 BK49 BE2
SA_DQ_2
B_DQS6 10
M_
A_DQ21 BH45 BB2 M_B_DQ22 BK43 AV2
SA_DQ_2
B_DQS7 10
M_
A_DQ22 BG40 AP3 M_B_DQ23 BK42 AU50
SA_DQ_2
2 SA_DQS_7 M_A_DQ S7 9 SB_DQ_23 SB_DQS#_0 M_
B_DQS0 # 10
M_
A_DQ23 BF40 AT47 M_B_DQ24 BJ41 BC50
MEMORY
M_A_DQ S0# 9 M_
B_DQS1 # 10
MEMORY
M_
A_DQ24 AR40 SA_DQ_2
3 SA_DQS#_0 BD47 M_B_DQ25 BL41 SB_DQ_24 SB_DQS#_1 BL45
SA_DQ_2
4 SA_DQS#_1 M_A_DQ S1# 9 SB_DQ_25 SB_DQS#_2 M_
B_DQS2 # 10
M_
A_DQ25 AW40 BC41 M_B_DQ26 BJ37 BK38
SA_DQ_2
B_DQS3 # 10
M_
A_DQ26 AT39 BA37 M_B_DQ27 BJ36 BK12
SA_DQ_2
B_DQS4 # 10
M_
A_DQ27 AW36 BA16 M_B_DQ28 BK41 BK7
SA_DQ_2
B_DQS5 # 10
M_
A_DQ28 AW41 BH7 M_B_DQ29 BJ40 BF2
SA_DQ_2
B_DQS6 # 10
M_
A_DQ29 AY41 BC1 M_B_DQ30 BL35 AV3
SA_DQ_2
B_DQS7 # 10
M_
A_DQ30 AV38 AP2 M_B_DQ31 BK37
M_
A_DQ31 AT38 SA_DQ_3
0 SA_DQS#_7 M_A_DQ S7# 9 M_B_DQ32 BK13 SB_DQ_31 BC18 M_B_A0 M_
B_A[13:0] 10
SA_DQ_3
1 M_A_A[13:0] 9 SB_DQ_32 SB_MA_0
M_
A_DQ32 AV13 BJ19 M _A_
A0 M_B_DQ33 BE11 BG28 M_B_A1
M_
A_DQ33 AT13 SA_DQ_3
2 SA_MA_0 BD20 M _A_
A1 M_B_DQ34 BK11 SB_DQ_33 SB_MA_1 BG25 M_B_A2
M_
A_DQ34 AW11 SA_DQ_3
3 SA_MA_1 BK27 M _A_
A2 M_B_DQ35 BC11 SB_DQ_34 SB_MA_2 AW17 M_B_A3
SA_DQ_3
4 SA_MA_2 SB_DQ_35 SB_MA_3
M_
A_DQ35 AV11 BH28 M _A_
A3 M_B_DQ36 BC13 BF25 M_B_A4
SA_DQ_3
M_
A_DQ36 AU15 BL24 M _A_
A4 M_B_DQ37 BE12 BE25 M_B_A5
SYSTE M
SYSTEM
SA_DQ_3
M_
A_DQ37 AT11 BK28 M _A_
A5 M_B_DQ38 BC12 BA29 M_B_A6
SA_DQ_3
M_
A_DQ38 BA13 BJ27 M _A_
A6 M_B_DQ39 BG12 BC28 M_B_A7
M_
A_DQ39 BA11 SA_DQ_3
8 SA_MA_6 BJ25 M_A_A7 M_B_DQ40 BJ10 SB_DQ_39 SB_MA_7 AY28 M_B_A8
M_
A_DQ40 BE10 SA_DQ_3
9 SA_MA_7 BL28 M_A_A8 M_B_DQ41 BL9 SB_DQ_40 SB_MA_8 BD37 M_B_A9
M_
A_DQ41 BD10 SA_DQ_4
0 SA_MA_8 BA28 M _A_
A9 M_B_DQ42 BK5 SB_DQ_41 SB_MA_9 BG17 M_B_A10
SA_DQ_4
M_
A_DQ42 BD8 BC19 M _A_
A10 M_B_DQ43 BL5 BE37 M_B_A11
SA_DQ_4
M_
A_DQ43 AY9 BE28 M _A_
A11 M_B_DQ44 BK9 BA39 M_B_A12
SA_DQ_4
M_
A_DQ44 BG10 BG30 M _A_
A12 M_B_DQ45 BK10 BG13 M_B_A13
SA_DQ_4
M_
A_DQ45 AW9 BJ16 M _A_
A13 M_B_DQ46 BJ8 BE24 M_B_A14
M_
A_DQ46 BD7 SA_DQ_4
5 SA_MA_13 BJ29 M_A_A14 M_B_DQ47 BJ6 SB_DQ_46 SB_MA_14 AV16
SA_DQ_4
6 SA_MA_14 SB_DQ_47 SB_RAS# M_
B_RAS# 10
M_
A_DQ47 BB9 M_B_DQ48 BF4 AY18 Z0602
M_
A_DQ48 BB5 SA_DQ_4
7 BE18 M_B_DQ49 BH5 SB_DQ_48 SB_RCVEN#
SA_DQ_4
8 SA_RAS# M_A_RAS# 9 SB_DQ_49
DDR
M_
A_DQ49 AY7 AY20 Z0601 M_B_DQ50 BG1 BC17
DDR
SA_DQ_4
9 SA_RCVEN# SB_DQ_50 SB_WE# M_
B_WE# 10
M_
A_DQ50 AT5 M_B_DQ51 BC2
SA_DQ_5
0 SB_DQ_51
M_
A_DQ51 AT7 BA19 M_B_DQ52 BK3
SA_DQ_5
1 SA_WE# M_A_WE# 9 SB_DQ_52
M_
A_DQ52 AY6 M_B_DQ53 BE4
SA_DQ_5
2 SB_DQ_53
M_
A_DQ53 BB7 M_B_DQ54 BD3
M_
A_DQ54 AR5 SA_DQ_5
3 M_B_DQ55 BJ2 SB_DQ_54
M_
A_DQ55 AR8 SA_DQ_5
4 M_B_DQ56 BA3 SB_DQ_55
M_
A_DQ56 AR9 SA_DQ_5
5 M_B_DQ57 BB3 SB_DQ_56
SA_DQ_5
6 SB_DQ_57
M_
A_DQ57 AN3 M_B_DQ58 AR1
SA_DQ_5
7 SB_DQ_58
M_
A_DQ58 AM8 M_B_DQ59 AT3
SA_DQ_5
8 SB_DQ_59
M_
A_DQ59 AN10 M_B_DQ60 AY2
SA_DQ_5
9 SB_DQ_60
M_
A_DQ60 AT9 M_B_DQ61 AY3
M_
A_DQ61 AN9 SA_DQ_6
0 M_B_DQ62 AU2 SB_DQ_61
M_
A_DQ62 AM9 SA_DQ_6
1 M_B_DQ63 AT2 SB_DQ_62
M_
A_DQ63 AN11 SA_DQ_6
2 SB_DQ_63
SA_DQ_6
3
GM965 CRESTLINE
GM965 CRESTLINE
6-03-0096 5-0S0

Schematic Diagrams
GM965 Crestline 4/5
VGFX_CORE NEAR NB
R26 0_04
GPUVCCSENSE 26
1.05VS U2I
U2G VGFX_CORE R27 0_04
GPUVSSSENSE 26
A13 AW24 U2J
AT35 1.05VS A15 VSS_1 VSS_100 AW29 C46 W11
VCC_1 VSS_2 VSS_101 VSS_199 VSS_287
AT34 T17 A17 AW32 C50 W39
AH28 VCC_2 VCC_AXG_NCTF_1 T18 U2F A24 VSS_3 VSS_102 AW5 C7 VSS_200 VSS_288 W43
AC32 VCC_3 VCC_AXG_NCTF_2 T19 AA21 VSS_4 VSS_103 AW7 D13 VSS_201 VSS_289 W47
AC31
AK32
VCC_5
VCC_4
VCC_6
VCC_AX
VCC_AX
VCC_AX
G_NCTF_3
G_NCTF_4
G_NCTF_5
T21
T22
1A AB33
AB36 VCC_NCTF_1
VCC_NCTF_2
AA24
AA29
VSS_5
VSS_6
VSS_7
VSS_104
VSS_105
VSS_106
AY10
AY24
D24
D3
VSS_202
VSS_203
VSS_204
VSS_290
VSS_291
VSS_292
W5
W7
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AB37 VCC_NCTF_3 AB20 VSS_8 VSS_107 AY37 D32 VSS_205 VSS_293 Y13
AJ28 T25 AC33 T27 AB23 AY42 D39 Y2
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_4 VSS_NCTF_1 VSS_9 VSS_108 VSS_206 VSS_294
AH32 U15 AC35 T37 AB26 AY43 D45 Y41
AH31 VCC_9 VCC_AXG_NCTF_8 U16 AC36 VCC_NCTF_5 VSS_NCTF_2 U24 AB28 VSS_10 VSS_109 AY45 D49 VSS_207 VSS_295 Y45
AH29 U17 AD35 U28 AB31 AY47 E10 Y49
AF32 U19 AD36 V31 AC10 AY50 E16 Y5
VCC CORE

U20 AF33 V35 AC13 B10 E24 Y50
VCC_AXG_NCTF_12 U21 AF36 VCC_NCTF_9 VSS_NCTF_6 AA19 AC3 VSS_14 VSS_113 B20 E28 VSS_211 VSS_299 Y11
VCC_AXG_NCTF_13 U23 AH33 VCC_NCTF_10 VSS_NCTF_7 AB17 AC39 VSS_15 VSS_114 B24 E32 VSS_212 VSS_300 P29
VCC_AXG_NCTF_14 U26 AH35 VCC_NCTF_11 VSS_NCTF_8 AB35 AC43 VSS_16 VSS_115 B29 E47 VSS_213 VSS_301 T29
VCC_AXG_NCTF_15 V16 AH36 VCC_NCTF_12 VSS_NCTF_9 AD19 AC47 VSS_17 VSS_116 B30 F19 VSS_214 VSS_302 T31
VSS NCTF
VCC_AXG_NCTF_16 V17 AH37 VCC_NCTF_13 VSS_NCTF_10 AD37 AD1 VSS_18 VSS_117 B35 F36 VSS_215 VSS_303 T33
VCC_AXG_NCTF_17 V19 AJ33 VCC_NCTF_14 VSS_NCTF_11 AF17 AD21 VSS_19 VSS_118 B38 F4 VSS_216 VSS_304 R28
VCC_AXG_NCTF_18 VCC_NCTF_15 VSS_NCTF_12 VSS_20 VSS_119 VSS_217 VSS_305
V20 AJ35 AF35 AD26 B43 F40
VCC_AXG_NCTF_19 VCC_NCTF_16 VSS_NCTF_13 VSS_21 VSS_120 VSS_218
R30 VCC_13 VCC_AXG_NCTF_20 V21 AK33 VCC_NCTF_17 VSS_NCTF_14 AK17 AD29 VSS_22 VSS_121 B46 F50 VSS_219
V23 AK35 AM17 AD3 B5 G1

VCC_AXG_NCTF_21 VCC_NCTF_18 VSS_NCTF_15 VSS_23 VSS_122 VSS_220
1.8V V24 AK36 AM24 AD41 B8 G13 AA32
VCC_AXG_NCTF_22 Y15 AK37 VCC_NCTF_19 VSS_NCTF_16 AP26 AD45 VSS_24 VSS_123 BA1 G16 VSS_221 VSS_306 AB32
4A POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
Y16
Y17
AD33
AJ36
VCC_NCTF_20
VCC_NCTF_21
VSS_NCTF_17
VSS_NCTF_18
AP28
AR15
AD49
AD5
VSS_25
VSS_26
VSS_124
VSS_125
BA17
BA18
G19
G24
VSS_222
VSS_223
VSS_307
VSS_308
AD32
AF28
VCC NCTF
AU32 VCC_AXG_NCTF_25 Y19 AM35 VCC_NCTF_22 VSS_NCTF_19 AR19 AD50 VSS_27 VSS_126 BA2 G28 VSS_224 VSS_309 AF29
AU33 VCC_SM_1 G M96 5 VCC_AXG_NCTF_26 Y20 AL33 VCC_NCTF_23 VSS_NCTF_20 AR28 AD8 VSS_28 VSS_127 BA24 G29 VSS_225 VSS_310 AT27
AU35 VCC_SM_2 VCC_AXG_NCTF_27 Y21 AL35 VCC_NCTF_24 VSS_NCTF_21 AE10 VSS_29 VSS_128 BB12 G33 VSS_226 VSS_311 AV25
VCC_SM_3 VCC_AXG_NCTF_28 VCC_NCTF_25 VSS_30 VSS_129 VSS_227 VSS_312
AV33 Y23 AA33 AE14 BB25 G42 H50
Sheet 7 of 38 AW33
AW35
AY35
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
Y24
Y26
Y28
AA35
AA36
AP35
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
AE6
AF20
AF23
VSS_31
VSS_32
VSS_33
VSS_34 VSS
VSS_130
VSS_131
VSS_132
VSS_133
BB40
BB44
BB49
G45
G48
G8
VSS_228
VSS_229
VSS_230
VSS_231
VSS_313
BA32 Y29 AP36 AF24 BB8 H24

GM965 Crestline 4/5 BA33
BA35
BB33
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17
AB16
AR35
AR36
Y32
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
POWER
AF31
AG2
AG38
VSS_35
VSS_36
VSS_37 GM96 5
VSS_134
VSS_135
VSS_136
BC16
BC24
BC25
H28
H4
H45
VSS_232
VSS_233
VSS_234
VGFX_CORE
BC32 VCC_SM_11 VCC_AXG_NCTF_36 AB19 Y33 VCC_NCTF_33 AG43 VSS_38 VSS_137 BC36 J11 VSS_235
BC33 VCC_SM_12 VCC_AXG_NCTF_37 AC16 Y35 VCC_NCTF_34 AG47 VSS_39 VSS_138 BC40 J16 VSS_236
VCC_SM_13 VCC_AXG_NCTF_38 VCC_NCTF_35 VSS_40 VSS_139 VSS_237
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
BC35 AC17 Y36 GM96 5 AG50 BC51 J2
BD32 AC19 Y37 A3 AH3 BD13 J24
VCC_SM_15 VCC_AXG_NCTF_40 VCC_NCTF_37 VSS_SCB1 VSS_42 VSS_141 VSS_239
BD35 VCC_SM_16 VCC_AXG_NCTF_41 AD15 T30 VCC_NCTF_38 VSS_SCB2 B2 AH40 VSS_43 VSS_142 BD2 J28 VSS_240
BE32 AD16 T34 C1 AH41 BD28 J33
VCC SM
BE33
BE35
VCC_SM_17
VCC_SM_18
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
AD17
AF16
T35
U29
VCC_NCTF_39
VCC_NCTF_40
VSS_SCB3
BL1
VSS_SCB4 BL51
AH7
AH9
VSS_44
VSS_45
VSS_143
VSS_144
BD45
BD48
J35
J39
VSS_241
VSS_242 VSS
VSS SCB
VCC_SM_19 VCC_AXG_NCTF_44 VCC_NCTF_41 VSS_SCB5 VSS_46 VSS_145 VSS_243

BF33 AF19 U31 A51 AJ11 BD5
VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_42 VSS_SCB6 VSS_47 VSS_146
BF34
VCC GFX NCTF
VCC_SM_21 VCC_AXG_NCTF_46 AH15 U32 VCC_NCTF_43 AJ13 VSS_48 VSS_147 BE1 K12 VSS_245 GM9 65
BG32 AH16 U33 AJ21 BE19 K47
BG33 VCC_SM_22 VCC_AXG_NCTF_47 AH17 U35 VCC_NCTF_44 AJ24 VSS_49 VSS_148 BE23 K8 VSS_246
C58
C68
C76
C96
BG35 AH19 U36 AJ29 BE30 L1
BH32 VCC_SM_24 VCC_AXG_NCTF_49 AJ16 V32 VCC_NCTF_46 AJ32 VSS_51 VSS_150 BE42 L17 VSS_248
BH34 VCC_SM_25 VCC_AXG_NCTF_50 AJ17 V33 VCC_NCTF_47 AJ43 VSS_52 VSS_151 BE51 L20 VSS_249
VCC_SM_26 VCC_AXG_NCTF_51 VCC_NCTF_48 1. 05VS VSS_53 VSS_152 VSS_250
BH35 AJ19 V36 AJ45 BE8 L24
BJ32 VCC_SM_27 VCC_AXG_NCTF_52 AK16 V37 VCC_NCTF_49 AJ49 VSS_54 VSS_153 BF12 L28 VSS_251
BJ33 AK19 AK20 BF16 L3
VCC_SM_29 VCC_AXG_NCTF_54 VSS_56 VSS_155 VSS_253
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 VCC_AXM_1 AT33 AK21 VSS_57 VSS_156 BF36 L33 VSS_254
BK32 AL17 AT31 AK26 BG19 L49 VGFX_CORE 1. 8V
VCC AXM
VCC_SM_31 VCC_AXG_NCTF_56 VCC_AXM_2 VSS_58 VSS_157 VSS_255

BK33 AL19 1.05VS AK29 AK28 BG2 M28
BK34 VCC_SM_32 VCC_AXG_NCTF_57 AL20 VCC_AXM_3 AK24 AK31 VSS_59 VSS_158 BG24 M42 VSS_256
BK35 VCC_SM_33 VCC_AXG_NCTF_58 AL21 VCC_AXM_4 AK23 AK51 VSS_60 VSS_159 BG29 M46 VSS_257
22u_6.3V_08
22u_6.3V_08
VCC_SM_34 VCC_AXG_NCTF_59 VCC_AXM_5 VSS_61 VSS_160 VSS_258
1u_6.3V_04
100u_6.3V_B2
10u_10V_08
BL33 AL23 AL24 AJ26 AL1 BG39 M49
AU30 VCC_SM_35 VCC_AXG_NCTF_60 AM15 AL26 VCC_AXM_NCTF_1 VCC_AXM_6 AJ23 AM11 VSS_62 VSS_161 BG48 M5 VSS_259
VCC_SM_36 VCC_AXG_NCTF_61 AM16 AL28 VCC_AXM_NCTF_2 VCC_AXM_7 AM13 VSS_63 VSS_162 BG5 M50 VSS_260
VCC_AXG_NCTF_62 VCC_AXM_NCTF_3 VSS_64 VSS_163 VSS_261
AM19 AM26 AM3 BG51 M9
VGFX_CORE VCC_AXG_NCTF_63 VCC_AXM_NCTF_4 VSS_65 VSS_164 VSS_262
VCC_AXG_NCTF_64 AM20 AM28 VCC_AXM_NCTF_5 AM4 VSS_66 VSS_165 BH17 N11 VSS_263
AM21 AM29 AM41 BH30 N14
VCC_AXG_NCTF_65 VCC_AXM_NCTF_6 VSS_67 VSS_166 VSS_264 +
R20 AM23 AM31 AM45 BH44 N17
VCC AXM NCTF
4A T14 VCC_AXG_1 VCC_AXG_NCTF_66 AP15 AM32 VCC_AXM_NCTF_7 AN1 VSS_68 VSS_167 BH46 N29 VSS_265
C128
VCC_AXG_2 VCC_AXG_NCTF_67 VCC_AXM_NCTF_8 VSS_69 VSS_168 VSS_266
C53
C57
C75
C477
W13 AP16 AM33 AN38 BH8 N32
W14 VCC_AXG_3 VCC_AXG_NCTF_68 AP17 AP29 VCC_AXM_NCTF_9 AN39 VSS_70 VSS_169 BJ11 N36 VSS_267
Y12 VCC_AXG_4 VCC_AXG_NCTF_69 AP19 AP31 VCC_AXM_NCTF_10 AN43 VSS_71 VSS_170 BJ13 N39 VSS_268
AA20 VCC_AXG_5 VCC_AXG_NCTF_70 AP20 AP32 VCC_AXM_NCTF_11 AN5 VSS_72 VSS_171 BJ38 N44 VSS_269
AA23 VCC_AXG_6 VCC_AXG_NCTF_71 AP21 AP33 VCC_AXM_NCTF_12 AN7 VSS_73 VSS_172 BJ4 N49 VSS_270
AA26 VCC_AXG_7 VCC_AXG_NCTF_72 AP23 AL29 VCC_AXM_NCTF_13 AP4 VSS_74 VSS_173 BJ42 N7 VSS_271
AA28 AP24 AL31 AP48 BJ46 P19 1.8V
AB21 AR20 AL32 AP50 BK15 P2
AB24 VCC_AXG_10 VCC_AXG_NCTF_75 AR21 AR31 VCC_AXM_NCTF_16 AR11 VSS_77 VSS_176 BK17 P23 VSS_274
AB29 AR23 AR32 AR2 BK25 P3
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0. 1u_10V_X7R_04
0.1u_10V_X7R_04
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 AR33 VCC_AXM_NCTF_19 AR39 VSS_80 VSS_179 BK29 P50 VSS_277
AC21 AR26 AR44 BK36 R49
AC23 VCC_AXG_14 VCC_AXG_NCTF_79 V26 AR47 VSS_81 VSS_180 BK40 T39 VSS_278
VCC_AXG_15 VCC_AXG_NCTF_80 VSS_82 VSS_181 VSS_279
VCC GFX
AC24 V28 AR7 BK44 T43

AC26 VCC_AXG_16 VCC_AXG_NCTF_81 V29 AT10 VSS_83 VSS_182 BK6 T47 VSS_280
AC28 VCC_AXG_17 VCC_AXG_NCTF_82 Y31 GM965 CRESTLINE AT14 VSS_84 VSS_183 BK8 U41 VSS_281
AC29 VCC_AXG_18 VCC_AXG_NCTF_83 AT41 VSS_85 VSS_184 BL11 U45 VSS_282
AD20 VCC_AXG_19 VSS_86 VSS_185 VSS_283
VCC_AXG_20 6 -03-009 65-0S0 AT49
VSS_87 VSS_186
BL13 U50
VSS_284
AD23 AU1 BL19 V2
VCC_AXG_21 VSS_88 VSS_187 VSS_285
AD24 AW45 VCCSM_LF1 AU23 BL22 V3
C127
C124
VCC_AXG_22 VCC_SM_LF1 VSS_89 VSS_188 VSS_286
C125
C126
AD28 BC39 VCCSM_LF2 VGFX_CORE AU29 BL37
VCC_AXG_23 VCC_SM_LF2 VSS_90 VSS_189
AF21 BE39 VCCSM_LF3 AU3 BL47
AF26 VCC_AXG_24 VCC_SM_LF3 BD17 VCCSM_LF4 AU36 VSS_91 VSS_190 C12 GM965 CRESTLINE
AA31 BD4 VCCSM_LF5 AU49 C16
VCC SM LF

0. 1u_10V_X7R_04
0.1u_10V_X7R_04
AH20 AW8 VCCSM_LF6 AU51 C19

0.22u_10V_04
AH21 AT6 VCCSM_LF7 AV39 C28 6-06-003 55-061

AH23 VCC_AXG_28 VCC_SM_LF7 AV48 VSS_95 VSS_194 C29 3.3VS_VCCSYNC 1.05VS
VCC_AXG_29 VSS_96 VSS_195
0.22u_10V_04
0.22u_10V_04
0.47u_10V_04
AH24 AW1 C33 D4 SCS355V

0. 1u_16V_04
0.1u_16V_04
1u_6.3V_04

1u_6.3V_04
AH26 VCC_AXG_31 AW12 VSS_98 VSS_197 C36 R47 10_04 Z0701 C A

AD31 AW16 C41
AJ20
AN14 VCC_AXG_33
VCC_AXG_34
GM965 CRESTLINE
C61
C71
C86
C413
C140
C155
C56
C60
C141
C55
8 3.3VS_VCCSYNC
2,5,8..26,31 3.3VS
26 VGFX_CORE
GM965 CRESTLINE
5,8..10,29 1.8V
2..5,8,12,15, 28 1.05VS
B - 8 GM965 Crestline 4/5

Schematic Diagrams
GM965 Crestline 5/5

3.3VS
L22
HCB1608KF-121T25
6-19- 31001-164-1
1.05VS
10 m ils 10 0m A 3.3VS 4 0m ils 8 50m A
VCCA_CRT_DAC R44
C31 C405 C3
2 C142 C404
C466 C4
63 +
3.3VS_VCCSYNC U2H 10u_10V_08 10u_10V_08 10u_10V_08 10u
_10V_08
100u_6.3V_B2
22u_6.3V_08 0.1u_10
V_X7R_04 0_04 10 m ils 1 0m A
J32 U13
VCCSYNC VTT_1 U12
VTT_2
C121 A33 U11
VCCA_CRT_DAC_1 VTT_3
VCCA_CRT_DAC B33 U9
CRT
VCCA_CRT_DAC_2 VTT_4
3.3VS 0.1u_10V_X
7R_04 U8 C409 C18 C123 C131 C25 C115
VTT_5 U7
VCCA_DAC_BG A30 VTT_6 U5 0.1u_10V_X7R_04 0.1u_10V_X7R_
04 0.1u_10V_X7R_04 1u_6.3V_04 1
u_6.3V_04
0.01u_16V_04
VCCA_DAC_BG VTT_7 U3
VTT_8
B32 U2
VSSA_DAC_BG VTT_9
L19 U1
VTT_10
T
13
VTT
HCB1608KF-121T25 VCCA_DPLLA B49 VTT_11 T

11
VCCA_DPLLA VTT_12
10 m ils 10 0m A T
10 C116 C148 C122 C412 C23 C26
PLL
VCCA_DPLLB H49 VTT_13 T

9
VCCA_DPLLB VTT_14
VCCA_DAC_
BG T
7 0.1u_10V_X7R_04 0.1u_10V_X7
R_04 0.1u_10V_X7R_
04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0
.1u_10V_X7R_04
VTT_15
VCCA_HPLL AL2 T
6
VCCA_HPLL VTT_16
C452 C4
60 T
5
VCCA_MPLL AM2 VTT_17 T
3
VCCA_MPLL VTT_18
22u_6.3V_08 0.1u_10
V_X7R_04 10 m ils 1 0m A VTT_19
T
2
R3 4 0m ils 51 5m A
A LVDS
1
. 8V VTT_20
A41 R2 Z0803 R42 0_06
VCCA_LVDS VTT_21 1.25VS
Sheet 8 of 38
C4
80 C48
3 R1
B41 VTT_22 C106 C95
1.25VS 1000p_50V_04 0.1u_10V_X7R_04 VSSA_LVDS C1
07
AT23 1u_6.3V_04 10u_10V_08
VCC_AX
D_1
10 m ils
GM965 Crestline 5/5
AU28 0.1u_10V_X7R_04
VCC_AX
D_2
3.3VS
K50
VCCA_PEG_BG VCC_AX
D_3
AU24 2 0m ils
AT29 Z0804 R308 0_
06
L24 C5
06 K49 VCC_AX
D_4 AT25 1.25VS
A PEG
AXD
VSSA_PEG_BG VCC_AX
D_5 AT30 C427 C4
28 C425
HCB1608KF-121T25 VCC_AX
D_6
0.1u_10
V_X7R_04 10 m ils
10 m ils 10 0m A 1.25VS
U51
VCCA_PEG_PLL VCC_AXD_NCTF
AR2
9 1u_6.3V_04 0.1u_10V_X7R_04 22u_6.3V_08
VCCA_DPLLA
40 m ils 7 50 m A
R28 0_06 Z0801 AW18 B23 1 0m ils 10 0m A
AXF
C494 C493 C495 1. 2

5VS AV19 VCCA_SM_1 VCC_AXF_1 B21 Z0805 R331 0_04
22u_6.3V_08 0.1u_10V_X7R_04
+ C62 C81 AU19
AU18
VCCA_SM_2
VCCA_SM_3 POW ER VCC_AXF_2
VCC_AXF_3
A21
C500 C501
1.25VS
100u_6.3V_B2 VCCA_SM_4
0.1u_10V_X7
R_04 22u_6.3V_08 AU17 AJ50
VCCA_SM_5 G M965 VCC_DMI
0.1u_10V_X7R_04 10u_10V_08
1.25VS AT22
VCCA_SM_7
AT21 BK24 2 5m ils 20 0m A
A SM
SM CK
VCCA_SM_8 VCC_SM_CK_1
AT19 BK23 Z0806 R311 0_
06
VCCA_SM_9 VCC_SM_CK_2 1.8V
L25 C7
2 C64 C74 AT18 BJ24
VCCA_SM_10 VCC_SM_CK_3
AT17 BJ23 C440 C4
39 C43
0
HCB1608KF-121T25 1u_6.3V_04 4. 7u_6.3V_
06 22u_6.3V_08 AR17 VCCA_SM_11 VCC_SM_CK_4
VCCA_SM_NCTF_1
10 m ils 10 0m A AR16
VCCA_SM_NCTF_2
1u_6.3V_04 0.1u_10V_X7R_04 22u_6.3V_08
1 0m ils 1 00m A 6-08- 22611-2B0
VCCA_DPLLB 10 m ils 1 50 m A A43 Z0807 R330 0_04
A CK
VCC_TX_LVDS 1.8V
R35 0_04 1.25VSM_CLK BC29
1.25VS VCCA_SM_CK_1
C167 C163
+
C496
3.3VS C9
7 C98 C83
BB29
VCCA_SM_CK_2 C40
1 00 m A VCC_HV
VCC_HV
C485 C4
90 C488
+
C489 Co-LAY
C586
HV
22u_6.3V_08 0.1u_10V_X7R_
04 C25 VCC_HV_1 B40 0.1u_10V_X7R_04 10u_10V_08
100u_6.3V_B2 1000p_50V_04 *100u_
6. 3
V_B2
0.1u_10
V_X7R_04 4.7u_6.3V_06 22u_6.3V_08 B25 VCCA_TVA_DAC_1 VCC_HV_2 22u_6.3V_12
VCCA_TVA_DAC_2
R312 C27
VCCA_TVB_DAC_1 8 0m ils 1 .3 A
B27 AD51 Z08
08 R332 0_06 1.05VS
TV
VCCA_TVB_DAC_2 VCC_PEG_1
0_06 30 m ils 1 20m A Z0802
B28
A28 VCCA_TVC_DAC_1 VCC_PEG_2
W50
W51 Co-LAY
VCCA_TVC_DAC_2 VCC_PEG_3 V49 C498 C5
03 C170 C587
PEG
VCC_PEG_4 +
C588 Co-LAY C42
6 C432 C433 C436 V50
VCC_PEG_5
LVDS D TV/CRT
1.25VS + M32 1u_6.3V_04 0.1u_10V_X7R_04 22u_6.3V_12

VCCD_CRT *100u_6.3V_B2
22u_6.3V_12 1u_6.3V_
04 0.1u_10V_X7R_04 10u_10V_08 L29
*100u_6.3V_B2 VCCD_TVDAC AH5
0 2 0m ils 2 60m A
DMI
N28 VCC_RXR_DMI_1 AH5

1 Z08
09 R333 0_06
VCCD_QDAC VCC_RXR_DMI_2 1.05VS
R299
20 m ils 1 20m A AN2
VCCD_HPLL
Co-LAY
A7 VTTLF_CAP1 C497 C508 C502 C169 C589
VTTLF
1.5VS VTTLF1 +
U48 F2 VTTLF_CAP2
VCCD_PEG_PLL VTTLF2
0_04 10 m ils 15 0m A VTTLF3
AH1 VTTLF_CAP3 1u_6.3V_04 10u_1
0V_0
8 0.1u_10V_X7R_04
*100u_6.3V_B2
22u
_6.3V_12
C80 C102 C92 C63 J41
0.47u_10V_04
0.47u_10V_04
VCCD_LVDS_1
0.47u_10V_04
VCCA_HPLL H42
VCCD_LVDS_2
4.7u
_6.3V_06 1u_6.3V_04 0.1u_10V_X7R_04 22u_6.3V_08
C407 C4
08
22u_6.3V_08 0.1u_10
V_X7R_04 GM965 CREST
LI NE
20 m ils 2 50m A
1. 0
5VS 6 -03-00965-0S0
1.25VS
1.25VS C504 C499 C166
A
C411
C418
C414
1u_6.3V_04 0.1u_10V_X7R_04 22u_6.3V_08 D5
SCS355V
R302
3.3VS
6-06-0035 5-061
C
10 m ils 15 0m A
1.8V
0_04 10 m ils 15 0m A R48 R57
C479 C484 C475
VCCA_MPLL 10_04 VCC_HV
1u_6.3V_04 0.1u_10V_X7R_04 10u_10V_08 0_06
5,7,9,10,29 1.8V
C406 C4
10
7 3.3VS_VCCSYNC
3,12,13,15,17,23,26,28 1.5VS
22u_6.3V_08 0.1u_10
V_X7R_04 C149
2,5,9..26,31 3.3VS
5,15,26 1.25VS
1u_6.3V_04
2..5,7,12,15,28 1.05VS

Schematic Diagrams
DDRII SO-DIMM 0
SO-DIMM 0 +VTT_ME M RES ISTORS

16-56034-45A VTT_MEM
M_CS0# 4 1 RN37 C435 0.1u_10V_X7R_04

M_A_RAS# 3 2 33_4P2R_04
JDIMM_1A C438 0.01u_16V_04
6 M_A_A[13:0] M_A_DQ[63:0] 6
M_A_A0 102 5 M_A_DQ0 M_ODT1 1 4 RN6
M_A_A1 101 A0 DQ0 7 M_A_DQ1 M_CS1# 2 3 33_4P2R_04
M_A_A2 100 A1 DQ1 17 M_A_DQ2 C442 0.1u_10V_X7R_04
M_A_A3 99 A2 DQ2 19 M_A_DQ3 M_A_A13 4 1 RN35
A3 DQ3
M_A_A4 98 4 M_A_DQ4 M_ODT0 3 2 33_4P2R_04
A4 DQ4 1.8V
M_A_A5 97 6 M_A_DQ5 C448 0.1u_10V_X7R_04
A5 DQ5
M_A_A6 94 14 M_A_DQ6 JDI MM_1B M_A_A2 4 1 RN40
A6 DQ6
M_A_A7 92 16 M_A_DQ7 112 18 M_A_A4 3 2 33_4P2R_04
M_A_A8 93 A7 DQ7 23 M_A_DQ8 111 VDD1 VSS16 24 C453 0.1u_10V_X7R_04
Layout No te: A8 DQ8 VDD2 VSS17
M_A_A9 91 25 M_A_DQ9 117 41 M_A_A3 1 4 RN12
M_A_A10 105 A9 DQ9 35 M_A_DQ10 96 VDD3 VSS18 53 M_A_A1 2 3 33_4P2R_04
signal/sp ace/signal: A10/AP DQ10 VDD4 VSS19
M_A_A11 90 37 M_A_DQ11 95 42 C109 0.1u_10V_X7R_04
A11 DQ11 VDD5 VSS20
9 / 5 / 9 M_A_A12 89 20 M_A_DQ12 118 54 M_A_A5 2 3 RN15
A12 DQ12 VDD6 VSS21
M_A_A13 116 22 M_A_DQ13 81 59 M_A_A8 1 4 33_4P2R_04
A13 DQ13 VDD7 VSS22
86 36 M_A_DQ14 82 65 C117 0.1u_10V_X7R_04
84 A14 DQ14 38 M_A_DQ15 87 VDD8 VSS23 60 M_A_A9 2 3 RN19
M_A_BS2# 85 A15 DQ15 43 M_A_DQ16 103 VDD9 VSS24 66 M_A_A12 1 4 33_4P2R_04
6 M_A_BS2#
A16_BA2 DQ16 45 M_A_DQ17 88 VDD10 VSS25 127 C130 0.1u_10V_X7R_04

DQ17 3.3VS VDD11 VSS26
M_A_BS0# 107 55 M_A_DQ18 104 139 M_A_CAS# 1 4 RN10
6 M_A_BS0# BA0 DQ18 VDD12 VSS27
M_A_BS1# 106 57 M_A_DQ19 20 m ils 128 M_A_WE# 2 3 33_4P2R_04
6 M_A_BS1# BA1 DQ19 VSS28
M_CS0# 110 44 M_A_DQ20 199 145 C136 0.1u_10V_X7R_04
5 M_CS0# S0# DQ20 VDDSPD VSS29
5 M_CS1# M_CS1# 115 46 M_A_DQ21 165 M_CKE0 1 4 RN23
30 S1# DQ21 56 M_A_DQ22 C41 C43 83 VSS30 171 M_A_BS2# 2 3 33_4P2R_04
5 M_CLK_DDR0 CK0 DQ22 NC1 VSS31
32 58 M_A_DQ23 120 172 C473 0.1u_10V_X7R_04
5 M_CLK_DDR0# CK0# DQ23 NC2 VSS32
164 61 M_A_DQ24 50 177 M_A_BS0# 2 3 RN7
5 M_CLK_DDR1 CK1 DQ24 2.2u_6. 3V_06 0.1u_16V_04 NC3 VSS33
166 63 M_A_DQ25 69 187 M_A_A10 1 4 33_4P2R_04
Sheet 9 of 38 5 M_CLK_DDR1#
5
5
6
M_CKE0
M_CKE1
M_A_CAS#
M_CKE0
M_CKE1
M_A_CAS#
79
80
113
CK1#
CKE0
CKE1
CAS#
DQ25
DQ26
DQ27
DQ28
73
75
62
M_A_DQ26
M_A_DQ27
M_A_DQ28
20 m ils
MVREF_DIM0
5 PM_EXTTS0#
163
1
NC4
NCTEST
VREF
VSS34
VSS35
VSS36
VSS37
178
190
9
M_A_A6
M_A_A7
4
3
1 RN42
2 33_4P2R_04
C457 0.1u_10V_X7R_04
M_A_RAS# 108 64 M_A_DQ29 21 C465 0.1u_10V_X7R_04
DDRII SO-DIMM 1 6
6
M_A_RAS#
M_A_WE#
M_A_WE#
SA0_DIM0
SA1_DIM0
109
198
200
RAS#
WE#
SA0
SA1
DQ29
DQ30
DQ31
DQ32
74
76
123
M_A_DQ30
M_A_DQ31
M_A_DQ32
C171 C178
Z0901
Z0902
201
202 GND0
GND1
VSS38
VSS39
VSS40
VSS41
33
155
34
M_A_A11
M_CKE1
4
3
1 RN44
2 33_4P2R_04
C469 0.1u_10V_X7R_04
197 125 M_A_DQ33 2.2u_6.3V_06 0.1u_16V_04 132 M_A_BS1# 4 1 RN38
10,14,16 ICH_SMBCLK0 SCL DQ33 VSS42
195 135 M_A_DQ34 47 144 M_A_A0 3 2 33_4P2R_04
R23 R22 10,14,16 ICH_SMBDAT0 SDA DQ34 137 M_A_DQ35 133 VSS1 VSS43 156 C105 0.1u_10V_X7R_04
M_ODT0 114 DQ35 124 M_A_DQ36 183 VSS2 VSS44 168
5 M_ODT0 ODT0 DQ36 VSS3 VSS45
10K_04 10K_04 M_ODT1 119 126 M_A_DQ37 77 2 C114 0.1u_10V_X7R_04
5 M_ODT1 ODT1 DQ37 VSS4 VSS46
134 M_A_DQ38 12 3
DQ38 VSS5 VSS47
10 136 M_A_DQ39 48 15 C87 0.01u_16V_04
6 M_A_DM0 DM0 DQ39 VSS6 VSS48
26 141 M_A_DQ40 184 27
52 143 M_A_DQ41 78 39 C99 0.1u_10V_X7R_04
6 M_A_DM2 67 DM2 DQ41 151 M_A_DQ42 71 VSS8 VSS50 149
130 153 M_A_DQ43 72 161
6 M_A_DM4
147 DM4 DQ43 140 M_A_DQ44 121 VSS10 VSS52 28
La y out not e :
170 142 M_A_DQ45 122 40
6 M_A_DM6
185
DM6 DQ45
152 M_A_DQ46 196
VSS12 VSS54
138
Pl a c e one c a p c l ose to e v e ry 2 pul l- up re sis tors
6 M_A_DM7 DM7 DQ46
154 M_A_DQ47 193
VSS13 VSS55
150 te rm in a te d to + V TT_M EM
DQ47 VSS14 VSS56
6 M_A_DQS0 13 157 M_A_DQ48 8 162
31 DQS0 DQ48 159 M_A_DQ49 VSS15 VSS57
6 M_A_DQS1 DQS1 DQ49
51 173 M_A_DQ50 2-1734073-1
70 175 M_A_DQ51 CLOSE TO SO-DIMM_0
131 158 M_A_DQ52
148 160 M_A_DQ53
169 174 M_A_DQ54
6 M_A_DQS7 188 176 M_A_DQ55
DQS7 DQ55 179 M_A_DQ56 R82 1K_1%_04 MVREF_DIM0
DQ56 1.8V
11 181 M_A_DQ57
6 M_A_DQS0# DQS0# DQ57
29 189 M_A_DQ58 R81
49 191 M_A_DQ59 C179 C176
68 180 M_A_DQ60
129 182 M_A_DQ61 1K_1%_04 1u_6.3V_04 0.1u_10V_X7R_04
6 M_A_DQS4# 146 DQS4# DQ61 192 M_A_DQ62
167 194 M_A_DQ63
186
6 M_A_DQS7# DQS7#
2-1734073-1
6-86-24200-0 49 (AMP 9.2)
6-86-24200-0 32(FOXCONN 9 .2)
1. 8V 5,7,8,10,29 1.8V
1.8V
10,29 VTT_MEM
2, 5, 8,10..26,31 3.3VS
C491 C486 C112 C152 C133 C146 C153 C139 C90 C79 C91 C424
+ +
1u_6.3V_04 1u_6.3V_04 1u_6.3V_04 0.22u_10 0.22u_10V_04 VTT_MEM
0u_6.3V_B2 10u_10V_08 10u_10V_08 10u_10
10 V_08 4.7u_
6. 3V_06 4.7u_6.3V_06 V_04 *220u_4V_D
C478 C144
C73 C1
00 C101 C78 C120 C137 C138 C4
31 10u_10V_08 10u_10V_08
0.1u_10V_X7R_04 0.1u_10V_X7
R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_0
4 0.1u_10V_X7R_04 0.1u_10V_X7R_04
B - 10 DDRII SO-DIMM 0

Schematic Diagrams
DDRII SO- DIMM 1

SO-DIMM 1 +VTT_MEM RES ISTORS
16-56034-45A V T T_ M E M
M _B _ A 1 3 4 1 RN 8 C8 4 0. 1 u _ 1 0 V _ X 7 R _ 0 4
J D I MM _ 2 A M _B _ R A S # 3 2 33 _ 4 P 2 R _ 0 4
6 M_ B _ A [ 1 3: 0] M _ B_ A0 102 5 M _B _ DQ 0 M_ B _D Q [ 6 3 : 0 ] 6 C8 5 0. 1 u _ 1 0 V _ X 7 R _ 0 4
M _ B_ A1 101 A0 D Q0 7 M _B _ DQ 1 M _B _ B S 1 # 4 1 RN 1 1
A1 D Q1
M _ B_ A2 100 17 M _B _ DQ 2 M _B _ A 0 3 2 33 _ 4 P 2 R _ 0 4
A2 D Q2
M _ B_ A3 99 19 M _B _ DQ 3 C1 4 3 0. 1 u _ 1 0 V _ X 7 R _ 0 4
M _ B_ A4 98 A3 D Q3 4 M _B _ DQ 4 M _B _ A 5 3 2 RN 4 1
M _ B_ A5 97 A4 D Q4 6 M _B _ DQ 5 M _B _ A 8 4 1 33 _ 4 P 2 R _ 0 4
A5 D Q5
M _ B_ A6 94 14 M _B _ DQ 6 C8 9 0. 1 u _ 1 0 V _ X 7 R _ 0 4
A6 D Q6 1 .8 V
M _ B_ A7 92 16 M _B _ DQ 7 M _B _ A 2 4 1 RN 1 4
M _ B_ A8 93 A7 D Q7 23 M _B _ DQ 8 J D I M M_ 2 B M _B _ A 4 3 2 33 _ 4 P 2 R _ 0 4
Layout Note: A8 D Q8
M _ B_ A9 91 25 M _B _ DQ 9 112 18 C1 1 9 0. 0 1 u _ 1 6 V _ 0 4
A9 D Q9 V DD 1 V SS1 6
M _ B_ A1 0 105 35 M _B _ DQ 10 111 24 M _B _ B S 2 # 3 2 RN 2 2
signal/space/signal: M _ B_ A1 1 90 A 1 0 /A P D Q 10 37 M _B _ DQ 11 117 V DD 2 V SS1 7 41 M _B _ A 7 4 1 33 _ 4 P 2 R _ 0 4 C1 1 3 0. 1 u _ 1 0 V _ X 7 R _ 0 4
M _ B_ A1 2 89 A1 1 D Q 11 20 M _B _ DQ 12 96 V DD 3 V SS1 8 53
9 / 5 / 9 A1 2 D Q 12 V DD 4 V SS1 9
M _ B_ A1 3 116 22 M _B _ DQ 13 95 42 M _B _ A 1 0 2 3 RN 3 6
A1 3 D Q 13 V DD 5 V SS2 0
86 36 M _B _ DQ 14 118 54 M _B _ B S 0 # 1 4 33 _ 4 P 2 R _ 0 4 C4 6 8 0. 1 u _ 1 0 V _ X 7 R _ 0 4
84 A1 4 D Q 14 38 M _B _ DQ 15 81 V DD 6 V SS2 1 59
M_ B _ B S 2 # 85 A1 5 D Q 15 43 M _B _ DQ 16 82 V DD 7 V SS2 2 65 M _B _ A 3 2 3 RN 3 9
6 M_ B _ B S 2 # A1 6 _ BA2 D Q 16 V DD 8 V SS2 3
45 M _B _ DQ 17 87 60 M _B _ A 1 1 4 33 _ 4 P 2 R _ 0 4 C4 6 4 0. 0 1 u _ 1 6 V _ 0 4
D Q 17 V DD 9 V SS2 4
6 M_ B _ B S 0 # M_ B _ B S 0 # 107 55 M _B _ DQ 18 103 66
M_ B _ B S 1 # 106 BA0 D Q 18 57 M _B _ DQ 19 3 .3 V S 88 V DD 10 V SS2 5 127 M _C S 2 # 4 1 RN 4
6 M_ B _ B S 1 # BA1 D Q 19 V DD 11 V SS2 6
M_ C S 2 # 110 44 M _B _ DQ 20 104 139 M _O D T 2 3 2 33 _ 4 P 2 R _ 0 4 C4 5 8 0. 1 u _ 1 0 V _ X 7 R _ 0 4
5 M _ C S2 # S0 # D Q 20 V DD 12 V SS2 7
5 M _ C S3 #
M_ C S 3 # 115
S1 # D Q 21
46 M _B _ DQ 21 2 0m ils V SS2 8
128
5 M_ C L K _ D D R 2 30 56 M _B _ DQ 22 199 145 M _B _ A 1 2 4 1 RN 4 3
32 C K0 D Q 22 58 M _B _ DQ 23 V DD S P D V SS2 9 165 M _B _ A 9 3 2 33 _ 4 P 2 R _ 0 4 C4 5 5 0. 1 u _ 1 0 V _ X 7 R _ 0 4
5 M _ CL K_ D D R2 # C K0 # D Q 23 V SS3 0
164 61 M _B _ DQ 24 C 46 C 45 83 171
5 M_ C L K _ D D R 3 C K1 D Q 24 NC 1 V SS3 1
166 63 M _B _ DQ 25 120 172 M _B _ W E # 2 3 RN 3 4
5 M _ CL K_ D D R3 # C K1 # D Q 25 NC 2 V SS3 2
R2 5
5
5
6
M _ C KE2
M _ C KE3
M _B _ C A S #
M_ C K E 2
M_ C K E 3
M_ B _ C A S #
79
80
113
C KE0
C KE1
C AS#
D Q 26
D Q 27
D Q 28
73
75
62
M
M
M
_B
_B
_B
_ DQ
_ DQ
_ DQ
26
27
28
2 .2 u _ 6 .3 V _ 0 6
5
0 . 1 u _ 16 V _0 4
P M_ E X T T S 1 #
50
69
163
NC
NC
NC
3
4
T EST
V
V
V
SS3 3
SS3 4
SS3 5
177
187
178
M _B _ C A S #
M _C S 3 #
1
2
4
3
33 _ 4 P 2 R _ 0 4
RN 3 3
C4 5 1 0. 1 u _ 1 0 V _ X 7 R _ 0 4
Sheet 10 of 38
10 K _0 4 M_ B _ R A S # 108 64 M _B _ DQ 29 20 mils 190 M _O D T 3 1 4 33 _ 4 P 2 R _ 0 4 C4 4 4 0. 1 u _ 1 0 V _ X 7 R _ 0 4
6
6
M _B _ R A S #
M _ B_ W E #
M_ B _ W E #
S A 0 _ D I M1
S A 1 _ D I M1
109
198
200
R AS#
WE #
SA0
SA1
D Q 29
D Q 30
D Q 31
D Q 32
74
76
123
M
M
M
_B
_B
_B
_ DQ
_ DQ
_ DQ
30
31
32 C1 7 5
MV R E F _D I M 1
C 173 Z1 001 201

1
V RE F
GN D 0
V
V
V
V
SS3 6
SS3 7
SS3 8
SS3 9
9
21
33
M _C K E 2
M _C K E 3
3
4
2
1
RN 2 5
33 _ 4 P 2 R _ 0 4 C4 4 1 0. 1 u _ 1 0 V _ X 7 R _ 0 4
DDRII SO-DIMM 1
9 ,1 4 ,1 6 ICH _ S M B C L K 0 197 125 M _B _ DQ 33 Z1 002 202 155
195 SC L D Q 33 135 M _B _ DQ 34 2. 2u _ 6 . 3 V _ 0 6 0 .1 u _ 1 6 V _ 0 4 GN D 1 V SS4 0 34 M _B _ A 6 4 1 RN 1 8
9 ,1 4 ,1 6 ICH _ S M B D A T 0 SD A D Q 34 V SS4 1
R2 4 137 M _B _ DQ 35 132 M _B _ A 1 1 3 2 33 _ 4 P 2 R _ 0 4 C4 3 7 0. 1 u _ 1 0 V _ X 7 R _ 0 4
D Q 35 V SS4 2
M_ O D T 2 114 124 M _B _ DQ 36 47 144
5 M _ O DT 2 O DT 0 D Q 36 VSS1 V SS4 3
10 K _0 4 5 M _ O DT 3 M_ O D T 3 119 126 M _B _ DQ 37 133 156 C4 3 4 0. 1 u _ 1 0 V _ X 7 R _ 0 4
O DT 1 D Q 37 134 M _B _ DQ 38 183 VSS2 V SS4 4 168
10 D Q 38 136 M _B _ DQ 39 77 VSS3 V SS4 5 2 C4 2 9 0. 1 u _ 1 0 V _ X 7 R _ 0 4
6 M _ B_ DM 0 D M0 D Q 39 VSS4 V SS4 6
26 141 M _B _ DQ 40 12 3
3 .3 VS 6 M _ B_ DM 1 52 D M1 D Q 40 143 M _B _ DQ 41 48 VSS5 V SS4 7 15 C1 0 4 0. 1 u _ 1 0 V _ X 7 R _ 0 4
6 M _ B_ DM 2
67 D M2 D Q 41 151 M _B _ DQ 42 184 VSS6 V SS4 8 27
La y out note :
6 M _ B_ DM 3 D M3 D Q 42 VSS7 V SS4 9
130 153 M _B _ DQ 43 78 39
6 M _ B_ DM 4 D M4 D Q 43 VSS8 V SS5 0
147 140 M _B _ DQ 44 71 149
6 M _ B_ DM 5 170 D M5 D Q 44 142 M _B _ DQ 45 72 VSS9 V SS5 1 161
6 M _ B_ DM 6
185 D M6 D Q 45 152 M _B _ DQ 46 121 VSS1 0 V SS5 2 28
P la c e one ca p c lose to e ve ry 2 pull -up re s ist ors
6 M _ B_ DM 7 D M7 D Q 46 VSS1 1 V SS5 3
D Q 47
154 M _B _ DQ 47 122
VSS1 2 V SS5 4
40 t e rmi na te d to + VTT_ M EM
6 M _B _ DQ S0 13 157 M _B _ DQ 48 196 138
31 D QS 0 D Q 48 159 M _B _ DQ 49 193 VSS1 3 V SS5 5 150
6 M _B _ DQ S1 D QS 1 D Q 49 VSS1 4 V SS5 6
51 173 M _B _ DQ 50 8 162
6 M _B _ DQ S2 D QS 2 D Q 50 VSS1 5 V SS5 7
70 175 M _B _ DQ 51
6 M _B _ DQ S3 D QS 3 D Q 51 CLOSE TO SO-DIMM_1
6 M _B _ DQ S4 131 158 M _B _ DQ 52 1 73 4 0 7 5 -2
148 D QS 4 D Q 52 160 M _B _ DQ 53
6 M _B _ DQ S5 D QS 5 D Q 53
169 174 M _B _ DQ 54
6 M _B _ DQ S6 D QS 6 D Q 54
188 176 M _B _ DQ 55
6 M _B _ DQ S7 D QS 7 D Q 55
179 M _B _ DQ 56 1 .8 V R 79 1K _ 1% _ 0 4 MV R E F _ D I M 1
11 D Q 56 181 M _B _ DQ 57
6 M_ B _ D Q S0 # D QS 0 # D Q 57
29 189 M _B _ DQ 58
6 M_ B _ D Q S1 # D QS 1 # D Q 58
49 191 M _B _ DQ 59 R 86 C1 7 4 C 18 0
6 M_ B _ D Q S2 # 68 D QS 2 # D Q 59 180 M _B _ DQ 60
6 M_ B _ D Q S3 # D QS 3 # D Q 60
129 182 M _B _ DQ 61 1 K_ 1 % _ 0 4 1u _ 6 . 3 V _ 0 4 0 . 1 u _ 10 V _X 7 R _ 0 4
6 M_ B _ D Q S4 # D QS 4 # D Q 61
146 192 M _B _ DQ 62
6 M_ B _ D Q S5 # D QS 5 # D Q 62
167 194 M _B _ DQ 63
6 M_ B _ D Q S6 # 186 D QS 6 # D Q 63
6 M_ B _ D Q S7 # D QS 7 #
1 7 3 4 07 5 -2
6-86-24200-018-1(AMP 5.2)
6-86-24200-031(FOXCONN 5.2)
Layout note:
SO-DIMM_1 is placed farther from
the GMCH than SO-DIMM_0
VTT _ M EM
1. 8V
C 4 74 C4 4 9 C 47 2 C 132 C 77 C 67 C 69 C 134
+
1 u _ 6 .3 V _ 0 4 1u _ 6 . 3 V _ 0 4 1 u _ 6. 3V _ 04 0 . 2 2 u _ 1 0V _ 04 0 . 2 2 u _ 10 V _0 4 2 2 0 u _ 4 V_ D 1 0 u _ 1 0V _ 08 1 0 u _ 1 0 V_ 0 8
2 ,5 ,8 ,9 ,1 1 ..2 6 ,3 1 3 .3 V S
1 .8 V Layout Note: 5 ,7 ..9 ,2 9 1 .8 V
9 ,2 9 V TT _ M E M
Co-layout
C 147 C 154 C8 2 C 59 C9 3 C1 5 0 C 88 C1 0 8 C 103 C 1 29 C 94 C1 1 1 C 118 C 1 35
+
1 0 0 u _6 . 3 V _B 2 1 0 u _ 10 V _0 8 1 0 u _ 10 V _0 8 1 0 u _ 1 0 V_ 0 8 4. 7u _ 6 . 3 V _ 0 6 4 . 7 u_ 6 . 3 V _ 0 6 0 . 1 u _ 1 0V _ X7 R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _0 4 0 .1 u _ 1 0 V _ X 7 R_ 0 4 0 . 1 u _ 1 0V _ X7 R _ 0 4 0 . 1 u _ 1 0 V _ X 7R _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _0 4 0 .1 u _ 1 0 V _ X 7 R_ 0 4 0 . 1 u _ 1 0V _ X7 R _ 0 4
DDRII SO- DIMM 1 B - 11

Schematic Diagrams
PANEL, INVERTER, CRT, FTP
CRT C3 8 9 0 . 1 u _ 16 V _ 0 4
3 .3 V S
C4 0 0 . 1 u _ 16 V _ 0 4
3 .3 VS
Q1 3
2N 7 0 02 W G
R2 7 6 2 . 2 K _ 04 3 .3 V S Zo=75 Ohm
CR T _ DD CA DA T D S
DA C_ D DC A D A T A 5
5
1
5
1
0529 Z11 08
R2 7 4 4. 7 K _ 0 4 D1 9 S C S 7 5 1 V -4 0 6-06-75140-061
C RT _ V S Y N C 4 2 C RT _ H S Y N C 4 2 C A DA C_ B L U E 4 5 DA C_ B L U E _ R
D A C _V S Y N C 5 D A C _H S Y N C 5 5 VS
DA C_ G RE E N 3 6 DA C_ G RE E N_ R
R2 7 5 4. 7 K _ 0 4 DA C_ R E D 2 7 DA C_ R E D_ R
U1 8 U1 7 0409 1 8
S N 7 4 A H C 1 G 1 25 D C K R S N 7 4 A H C 1 G 1 25 D C K R CR T _ DD CA CL K D S
3
3
D A C _ D D C A C LK 5 LP 2
6-01-74112-UD0
Q 14 G F C A 3 2 1 6 K F 4 -1 2 1 T0 3
2 N7 0 0 2 W 6-19-41001-173-1
6-15-27002-7B5 R2 7 7 2 . 2 K _ 04
Zo=75 Ohm 3 .3 V S
3 .3 V S J _ C R T1
C
C
A
C 1 0 5 0 9 -9 15 0 5 -L
D1 6 D1 7 D1 8
6-20-14X00-115
BA V9 9 BA V9 9 BA V9 9 DA C _ RE D _ R 1
AC
AC
AC
6-06-00099-011 9
DA C _ RE D D A C _ GR E E N _ R 2
5 DA C_ R E D
D A C _ GR E E N 10
5 D A C _ GR E E N
DAC _ BL UE DA C _ B L UE _ R 3
5 D A C _ B L UE 11 LP 3
4 F C A 3 2 1 6 K F 4 -1 2 1 T0 3
R 2 71 R 2 72 R 2 73 C 3 68 C3 6 9 C3 7 0 C3 5 3 C 3 56 C3 6 1 12 C R T _ D D C A D A T_ R C R T_ D D C A C L K 4 5 CR T _ DD CA CL K _ R
5 C R T_ V S Y N C 3 6 CR T _ V S Y NC _ R
7 5 _ 1 %_ 0 4 7 5 _ 1 %_ 0 4 7 5 _ 1 %_ 0 4 2 2 p _ 50 V _ 0 4 2 2 p_ 5 0 V _ 0 4 22 p _ 5 0 V _ 04 22 p _ 5 0 V _ 04 2 2 p _ 50 V _ 0 4 2 2 p_ 5 0 V _ 0 4 13 CR T _ HS Y N C_ R C R T_ H S Y N C 2 7 CR T _ HS Y N C_ R
6 C R T_ D D C A D A T 1 8 CR T _ DD CA DA T _ R
0413 14 CR T _ V S Y NC _ R
Sheet 11 of 38 7
8
15 C RT _ DD C A CL K _ R
PANEL, INVERTER,
G ND 1
GN D 2
C 3 65 C3 7 4 C3 8 4 C 3 86
1 0 0 0 p_ 5 0 V _ 0 4 22 0 p _ 5 0V _0 4 2 2 0p _ 5 0 V _ 0 4 1 0 0 0 p_ 5 0 V _ 0 4
CRT, FTP
L V DS -L 0N
PANEL PL VD D
L V DS
L V DS
L V DS
-L 0P
-L 2N
-L 2P
L VD
L VD
L VD
L VD
S - L 0N 5
S - L 0P 5
S - L 2N 5
S - L 2P 5
INVERTER CONNECTOR
L V DS -L 1N
2A L VD S - L 1N 5
L V DS -L 1P
L V DS -L C L K N L VD S - L 1P 5
L VD S -L CL K N 5
C7 C 5 C1 1 L V DS -L C L K P
L VD S -L CL K P 5
0. 1 u _ 1 6 V _ 04 * 10 p _ 5 0 V _ 0 4 4 . 7 u_ 6 . 3 V _ 0 6
J _ L CD 1 L1 3
3 .3 V 3 .3 V V IN H C B 2 0 1 2 K F -5 0 0 T4 0 V IN_ IN V
1 2
4
3
2
1
1
2
3
4
3 4
6-19-31001-163-1
LV D S -L 0 N CP 1
5 6 3. 3V S
LV D S -L 0 P Z 1 10 1 U1 6 B
7 8 P _ D D C _ C LK C 3 R1 1M _ 0 4 U1 6 A 7 4 LV C 0 8 P W C1 C 3 32 C3 3 1
14
LV D S -L 2 N 9 10 P _ DD C_ D A T A CP 2 74 L V C 0 8P W
40 mil
14
LV D S -L 2 P
11 12
0 . 1 u _ 16 V _ 0 4 *1 0 p _ 8P 4 C _ 0 4 *1 0 p_ 8 P 4 C _ 04 1
6-01-07408-Q70 0. 1 u _ 1 6 V _ 04 0 . 1 u _ 25 V _ 0 6 0. 1 u _ 2 5 V _ 06
5
6
7
8
8
7
6
5
13 14 LV D S - L C L K N 14 SB_ BL O N 3 Z11054
LV D S -L 1 N 15 16 LV D S - L C L K P 2 6
17 18 22 BKL _ EN
LV D S -L 1 P 5
19 20
8 7 2 1 6-2 0 0 6 U1 6 C J_ I N V 1
7
14
R2 1M _ 0 4 7 4 LV C 0 8 P W
7
3. 3 V S Z 1 10 6 9 1
6-20-41A10-210 SY S1 5 V S Y S 15 V 0529 2
8 I N V _ B L ON
5 B L ON 3 .3 V 3
Z 1 10 7 10
4
U 16D 5
Q1 C9
14
7 4 LV C 0 8 P W 6
R 13 R1 2 1 6 R3 C 2
7
D D
0 . 1 u_ 1 6 V _ 0 4 22 , 2 3 L ID _ S W # 12 8 7 21 2 -0 6 G0
1 M _0 4 1 M_ 0 4 2 5 11 1 M_ 0 4 1 0 0 p _5 0 V _ 0 4 6-20-41A10-106
D D
13
Z11 02 Z1 103 3 4 2A PL VD D
14 , 2 2 , 3 1 P M _ P W R OK
Q3 G S
D
C 2 N7 0 0 2 W S I 3 45 6 D V -T 1 -E 3
7
5 EN AVD D B 6-15-03456-7B1 R1 0 R 9 J_INV1

G R1 1
2 2 B R I GH TN E S S
Q 4 E C 10 20 0 _ 1 % _0 6 * 20 0 _ 1 % _ 06 1
D T C1 1 4 E UA 1 M_ 0 4
S
6-15-0C114-1B0 0 . 1 u _ 16 V _ 0 4 Z 1 10 4
6
FTP/TP/CIR
D
Q 2
G 2 N 70 0 2 W J_ F P TT P 1
VD D5 25 , 2 7 , 2 8
1 U SB_ PP4 1 3 3 .3 V 2, 1 3 . . 1 5 , 1 7 , 2 3 , 24 , 2 6 . . 2 9
2 U SB_ PN 4 1 3 5V 15 , 2 3 , 2 4 , 2 6. . 2 9, 3 1
S
3 .3 V V DD 5 5V J_FPTTP1
3 3 .3 V S 2, 5 , 8 . . 1 0 , 1 2 . . 2 6 , 3 1
4 U SB_ PP9 1 3 5 VS 12 , 1 4 , 1 5 , 2 0, 21 , 2 3 . . 2 5
1
3 .3 V S 5 U SB_ PN 9 1 3 SY S1 5 V 25 , 2 7
6 V IN 25 . . 3 1
C 5 90 C5 9 1 C 5 92 E N T E R K E Y # 22
R4 R5 7
8 PO PM EN U# 2 2
0 . 1 u _ 16 V _ 0 4
0 . 1 u_ 1 6 V _ 0 4
0 . 1 u _ 16 V _ 0 4
9 C IR_ R X 22
4. 7 K _ 0 4 4 . 7 K _ 04 12
10 3. 3V
11 V DD 5
12 5V
5 P _ D DC _ DA T A
87 2 1 2 -1 2G 0
5 P _ D DC _ CL K
6-20-41A00-112
B - 12 PANEL, INVERTER, CRT, FTP

Schematic Diagrams
ICH8-M 1/4, SATA
X2
32 . 7 6 8 K H z
RT C V C C 6-22-32R76-0B1
20 m ils C 53 3 1 5 p _ 5 0 V_ 0 4
2 0m ils 2
1
D 29 R 3 47
S C S 75 1 V -4 0 C 58 1 3
6-06-75140-061 1 0 M_ 0 4
1 u _6 . 3 V _0 4 U6 A
4
V D D3 A C R T C_ X 1 AG 2 5 E5
C 52 8 1 5 p _ 5 0 V_ 0 4
Zo = 5 0O? 5% R T C_ X 2 AF 2 4
R T CX 1 F W H0 /L AD 0
F5
L P C _A D 0 1 7 , 2 2
LP C _ A D 1 1 7 , 2 2
R T CX 2 F W H1 /L AD 1 G 8
LPC
F W H2 /L AD 2 LP C _ A D 2 1 7 , 2 2
R T CR S T # AF 2 3 F6
RTC
R T CR S T # F W H3 /L AD 3 L P C _A D 3 1 7 , 2 2
R 4 0 6 6 8 K_ 1 % _ 0 4
A C IN T RU D E R# AD 2 2 C 4
IN T RU DE R# F W H4 /L F R A M E # L P C_ F R A M E # 1 7 ,2 2
1
D 32 ICH _ INT V R M E N AF 2 5 G 9 L P C_ D RQ 0 #
IN T VRM EN L D RQ 0 #
S C S 7 5 1V -4 0 C2 1 7 J O PEN 1 LA N 1 0 0 _ S L P AD 2 1 E6 L D RQ 1 #
R 401 R1 1 9 * O P E N _1 0 m i l -1 MM L A N 1 00 _ S L P L D R Q 1# / G P I O 2 3 R 152 1 0 K_ 0 4
3 .3 VS
1 0m ils 1 u _6 . 3 V _ 0 4 RTC CLEAR G L A N_ C L K B2 4
G L AN_ C L K A 2 0 GA TE
A F 13
G A2 0 22
1 K_ 1 % _ 0 4 1 M_ 0 4 AG 2 6
LAN / GLAN
2
JCBAT J C B A T1 L A N _ R S TS Y N C D 22 A2 0 M # H _ A 2 0 M# 2
L A N _ RS T S Y N C A F 26 I C H _D P R S T P # R 91 0_04
1 D P RS T P # H_ D P RS T P # 2 ,5 ,3 1
L A N _ RXD 0 C 21 A E 26 I C H _D P S L P # R 90 0_04
L A N _ RX D 0 DPS L P# H_ D PS L P # 2
1 .5 V S L A N _ RXD 1 B2 1
2 L A N _ RXD 2 C 22 L A N _ RX D 1 AD 2 4
1 2 L A N _ RX D 2 F E RR # H_ F ER R # 2
8 5 2 0 5 -0 20 0 1
6-20-41100-002 L A N _ T XD 0 D 21 AG 2 9 R1 2 2 56 _ 0 4
L A N _ T XD 1 E2 0 L A N _ TX D 0 CP U P W RG D/G P IO 4 9 H _ PW R G D 2 R9 3 *5 6 _ 04 1. 0 5 V S
C 5 37 R 111 L A N _ T XD 2 C 20 L A N _ TX D 1 A F 27 R9 2 *5 6 _ 04
L A N _ TX D 2 I GN N E # H _ IG NN E # 2
0 .1 u _ 1 6 V _ 0 4 2 4 . 9 _ 1 % _ 04 G L A N_ D O CK # AH 2 1 A E 24 Z 12 0 8 R1 0 6 0_ 0 4
G L A N _ D OC K # / G P I O 1 3 IN IT # H _ IN IT # 2
AC 2 0
I NT R H _ I N TR 2
D 25 AH 1 4
CPU
G L A N _ C OM P I RC IN # I CH _ KB C _ RST # 2 2
Z 12 0 1 C 25 R1 4 3 1 0K _ 04
3 .3 VS
2 0, 23 A Z _ B I T C LK
2 0 ,2 3 A Z _ S Y NC
AJ 1 6
AJ 1 5
G L A N _ C OM P O
H D A _B I T _C L K
H D A _S Y N C
N MI
S M I#
AD 2 3
AG 2 8
H _ N MI
H _ SM I#
2
2
3 .3 V S
Sheet 12 of 38
A A 24
3 .3 VS
R 151
2 0 ,2 3
20
A Z _R S T #
A Z _ SD IN 0
AE1 4
AJ 1 7
H D A _R S T #
ST PC L K#
T H RM T RI P #
A E 27 SB _ T H RM T RIP # R 89
H _ ST PC L K# 2
2 4 . 9 _ 1 % _0 4
P M_ T H R M TR I P # 2 , 5
ICH8-M 1/4, SATA
* 1 K _ 1 % _0 4 AH 1 7 H D A _S D I N 0 A A 23 Z 12 0 7 R 87 56_04
IHDA
23 A Z _ SD IN 1 H D A _S D I N 1 T P8 1 .0 5 VS
C2 9 6 R 162 HD A _ S D IN2 AH 1 5
H D A _S D I N 2
HD A _ S D IN3 AD 1 3 V1 ID E_ PD D0
0. 1u _ 1 6 V _ 0 4 * 1 0 K_ 0 4 H D A _S D I N 3 DD 0 U 2 ID E_ PD D1
AE1 3 DD 1 V3 ID E_ PD D2
2 0, 23 A Z _ S D OU T H D A _S D O U T DD 2
T1 ID E_ PD D3
DD 3
H D A _ DO C K _ E N# _ R AE1 0 V4 ID E_ PD D4
HD A _ DO C K _ RST # A G 1 4 H D A _D O C K _ E N # / G P I O 33 DD 4 T5 ID E_ PD D5
H D A _D O C K _ R S T # / GP I O3 4 DD 5 Layout note:
AB 2 ID E_ PD D6
DD 6
S A T A _ LE D # AF 1 0 T6 ID E_ PD D7 24.9_1% needs to placed within 2" of ICH8,
S A TA LE D # DD 7 T3 ID E_ PD D8
DD 8 56 Ohm must be placed within 2" of 24.9_1%
SA T A _ R XN0 _ C A F6 R 2 ID E_ PD D9
S A TA 0R X N DD 9 w/o stub.
R T CVC C R T CVC C SATA_ R XP0 _ C A F5 T4 ID E_ PD D1 0
S A TA T XN 0 C 267 3 9 00 p _ 5 0 V _ X 7R _ 0 4 S A T A _ TX N 0 _ C AH 5 S A TA 0R X P DD 1 0 V6 ID E_ PD D1 1
Zd iff = 1 00O ? 0 % S A TA T XP 0 C 258 3 9 00 p _ 5 0 V _ X 7R _ 0 4 S A T A _ TX P 0_ C AH 6 S A TA 0T X N DD 1 1 V5 ID E_ PD D1 2
S A TA 0T X P DD 1 2
U 1 ID E_ PD D1 3
S A T A 1 R XN DD 1 3
AG 3 V2 ID E_ PD D1 4 I D E _ P D D [ 1 5: 0] 23
R 103 R 3 40 S A T A 1 R XP AG 4 S A TA 1R X N DD 1 4 U 6 ID E_ PD D1 5
SATA1 T XN AJ 4 S A TA 1R X P DD 1 5
IDE
S A TA 1T X N
3 3 2 K _ 1 % _ 06 3 3 2 K _ 1 % _0 6 SATA1 T XP AJ 3 AA 4
S A TA 1T X P D A0 AA 1 I DE_ PD A0 2 3
D A1 I DE_ PD A1 2 3
S A T A 2 R XN A F2 AB 3
Z o= 55O ? 5 %
SATA
LA N 1 0 0 _ S L P S A T A 2 R XP S A TA 2R X N D A2 I DE_ PD A2 2 3
ICH _ INT V R M E N A F1
S A TA 2R X P
SATA2 T XN A E4 Y 6 I DE_ PD C S1 # 2 3
SATA2 T XP A E3 S A TA 2T X N DC S 1 # Y 5
S A TA 2T X P DC S 3 # I DE_ PD C S3 # 2 3
16 C LK _S A T A # A B7 W4
16 C L K_ SATA AC 6 S A TA _C L K N D I OR # W3 I DE _ P D IO R# 2 3
S A TA _C L K P D I OW # Y 2 I DE _ P D IO W # 2 3
DD A C K# ID E _ P D DA CK # 2 3
Z 12 0 6 AG 1 Y 3
S A TA R B I A S # I DE IR Q I DE_ IR Q 2 3
AG 2 Y 1 ID E _ P D IO RD Y
S A TA R B I A S IO RD Y W5 I DE _ P D IO RD Y 2 3
D DR E Q I DE _ P D D RE Q 2 3
Within 500mil
8 2 8 0 1 HBM IC H8 M
R 39 9 6-03-82801-0FF
2 4 . 9 _1 % _ 0 4
SATA HDD SATA & ODD LED

J _ H DD 1
S1
S2 SAT AT XP0
S3 S A T A T X N0 3 .3 V S 3 .3 V S
S4
S5 S AT AR XN0 C2 9 3 9 0 0 p _5 0 V _ X 7 R _0 4 S A T A _ R X N0 _ C
S6 SAT AR XP0 C2 4 3 9 0 0 p _5 0 V _ X 7 R _0 4 S A T A _ R X P 0 _C 3. 3 V S
S7 R2 1 6 D 34 R2 1 4
3 .3 V S S CS 3 5 5 V
10 K _ 0 4 6-06-00355-061 10 0 K _ 0 4
P1 R 203 4 .7 K _ 0 4 ID E _ P D IO RD Y
P2 SATA_ L ED # C A
H D_ L E D # 2 4
P3 C1 5 C 388
P4 R 194 1 0 K _ 04 ID E_ IR Q
P5 0. 0 1 u _ 1 6 V _ 0 4 1 0 u _ 1 0 V_ 0 8
P6 D 33 S C S 3 5 5V
P7 5 VS C A
23 C D_ D AS P#
P8
P9
P1 0
P1 1 Z 1 2 02
P1 2 C4 C8 C 6 C3 8 7 C 390 C 391
P1 3 Z 1 2 03 +
2 , 2 2 , 2 4 , 2 5 , 2 7, 30 V D D 3
P1 4 Z 1 2 04 0. 1 u _ 1 0 V _ X 7 R _ 0 4 0 . 1 u _1 0 V _ X 7 R _ 0 4 0 . 1 u _ 1 0V _ X7 R _ 0 4 1u _ 6 . 3 V _ 0 4 1 0 u _ 1 0 V_ 0 8 1 0 0 u _ 6 .3 V _ B 2
2 , 5 , 8 . . 1 1 , 1 3. . 2 6, 3 1 3 . 3 V S
P1 5 Z 1 2 05
1 1 , 1 4 , 1 5 , 20 , 2 1 , 2 3 . . 2 5 5 V S
3 , 8 , 1 3 , 1 5 , 1 7 , 2 3 , 2 6, 2 8 1 . 5 V S
C 1 6 6 2 3- 12 2 A 4
1 1 , 2 5 , 2 7, 2 8 V D D 5
P I N G N D1 ~ 2 = G N D 15 RT C V C C
6-20-43720-122 2 . . 5 , 7 , 8 , 1 5, 2 8 1 . 0 5 V S
ICH8-M 1/4, SATA B - 13

Schematic Diagrams
ICH8-M 2/4, PCI, USB
ICH 8M B oot B IOS select

U6D
St rap P CI_GNT#0 SP I_CS #1 P27 V27
17 PCIE_RXN1_WLAN PERN1 DMI0RXN DMI_RXN0 5
P26 V26
Direct Media Interface

17 PCIE_RXP1_WLAN PERP1 DM I 0RXP DMI_RXP0 5
C525 0.1u_
10V_X
7R_04 PCIE_T
XN1_C N29 U29
FW H (default ) 11 St uf f St uf f 17 PCIE_TXN1_WLAN
C526 0.1u_
10V_X
7R_04 PCIE_T
XP1_C N28
PETN1 DMI0TXN
U28
DMI_TXN0 5
17 PCIE_TXP1_WLAN PETP1 DMI0TXP DMI_TXP0 5
M27 Y27
PC I 10 St uf f Uns taff 17 PCIE_RXN2_NEW_CARD
M26 PERN2 DMI1RXN Y26
DMI_RXN1 5
17 PCIE_RXP2_NEW_CARD PERP2 DM I 1RXP DMI_RXP1 5
C523 0.1u_
10V_X
7R_04 PCIE_T
XN2_C L29 W29
1
7 PCIE_TXN2_NEW_CARD PETN2 DMI1TXN DMI_TXN1 5
C524 0.1u_
10V_X
7R_04 PCIE_T
XP2_C L28 W28
SP I 01 Uns taff St uf f
PCI-Express
1
7 PCIE_TXP2_NEW_CARD PETP2 DMI1TXP DMI_TXP1 5
K27 AB26
Zo = 5 5O ? 5%
23 PCI E_RXN3_3G PERN3 DMI2RXN DMI_RXN2 5
K26 AB25
23 PCI E_RXP3_3G C521 0.1u_
10V_X
7R_04 XN3_C J29
PCIE_T PERP3 DM I 2RXP AA29 DMI_RXP2 5
23 PCIE_TXN3_3G PETN3 DMI2TXN DMI_TXN2 5
PCI RST#: LAN ,Cardbus,KBC C522 0.1u_
10V_X
7R_04 PCIE_T
XP3_C J28 AA28
23 PCIE_TXP3_3G PETP3 DMI2TXP DMI_TXP2 5
PLT _RST#: N/B,I DE,FWH H27 AD27

23 PCIE_RXN4_GLAN PERN4 DMI3RXN DMI_RXN3 5
H26 AD26
23 PCIE_RXP4_G LAN PERP4 DM I 3RXP DMI_RXP3 5
BUF _PLT_RST#: NEW CARD,M INI CARD C519 0.1u_
10V_X
7R_04 XN4_C G
PCIE_T 29 AC29
23 PCIE_TXN4_GLAN PETN4 DMI3TXN DMI_TXN3 5
23 PCIE_TXP4_GLAN C520 0.1u_
10V_X
7R_04 XP4_C G
PCIE_T 28 AC28 DMI_TXP3 5
PETP4 DMI3TXP
Z1301 F27 T26
PERN5 DMI_CLKN CL
K_PCIE_ICH# 16
Z1302 F26 T25
PERP5 DMI_CLKP CL
K_PCIE_ICH 16
3.3VS 3.3VS Z1303 E29
R17
7 R141 PETN5
Z1304 E28 Y23 Z1312 R127 24.9_1%_04
PETP5 DMI_ZCO MP 1.5VS
PCI_GNT#0 PCI_GNT#2 Y24 Pla ce within 50 0
DMI_IRCOMP
Z1305 D27 mil s of ICH
Z1306 D26 PERN6/GLAN_RXN G3
PERP6/GLAN_RXP USBP0N USB_PN0 23
*10K_0
4 10
K_04 Z1307 C29 G2
PETN6/GLAN_TXN USBP0P USB_PP0 23
R176 R137 Z1308 C28 H5
Z o= 5 5O? 5 % PETP6/GLAN_TXP USBP1N
H4
USB_PN1 23
USB0: P ort 0 / Dock ing
SPI_SCLK R367 USBP1P USB_PP1 23
*10K_04 *10K_04 15_04 Z1325C23 H2
SPI _
CLK USBP2N USB_PN2 23 USB1: P ort 1
Sheet 13 of 38 R366
R126
*10K_04
*10K_04
SPI_CS0# R362
SPI_CS1#
15_04 Z1326B23
E22 SPI _
CS0# USBP2P
H1
J3 USB_PP2
USB_PN3
23
17 USB2: P ort 2
SPI
SPI _
CS1# USBP3N J2
USBP3P USB_PP3 17
R123 *10K_04 SPI_SI R118 15_04 Z1327D23 K5
USB_PN4 11 Zd if f= USB3: N ew card
ICH8-M 2/4, PCI, 3. 3VS R99 *10K_04 SPI_SO F21 SPI _
MOSI USBP4N K4
SPI _
MISO USBP4P
USBP5N
K2
USB_PP4
USB_PN5
11
23
90 O? 5 % USB4: T ouch Panel
4 5 PCI_REQ#2 AJ19 K1 USB5: B luetooth
23 USB_OC#1 OC0# USBP5P USB_PP5 23
RN27 3 6 PCI_REQ#1 AG16 L3
USB 8.2K_8P4R_04 2
1
8
7
8
1
PCI_DEVSEL#
PCI_REQ#3
AD20 :CardReader
AD25 :1394
23
17
USB_OC#2
USB_OC#3
3. 3V
R140 10K_04 Z1316
AG15
AE15
AF15
O
O
O
O
C1#/GPIO40
C2#/GPIO41
C3#/GPIO42
C4#/GPIO43
USB
USBP6N
USBP6P
USBP7N
USBP7P
L2
M5
M4
USB_PN6
USB_PP6
USB_PN7
USB_PP7
17
17
23
23
USB6:
USB7:
M ini Card
C CD
RN29 7 2 PCI_I NT#G R375 10K_04 Z1317 AG17
OC5#/GPIO29 USBP8N
M2
USB_PN8 23
USB8: 3 G card
8.2K_8P4R_04 6 3 PCI_FRAM E# R150 10K_04 Z1318 AD12 M1
5 4 PCI_STO P# R373 10K_04 Z1319 AJ18
OC6#/GPIO30 USBP8P
N3
USB_PP8 23 USB9: F inger Print
OC7#/GPIO31 USBP9N USB_PN9 11
8 1 PCI_I NT#C REQ# 0:C ardReader R148 10K_04 Z1320 AD14 N2
RN32 7 2 PCI_REQ#0 R371 10K_04 Z1321 AH18 OC8# USBP9P USB_PP9 11
8.2K_8P4R_04 6 3 PCI_I NT#B OC9# F2
REQ# 2:1 394 USBRBIAS#
5 4 PCI_PERR# F3 Z1313 R402 20_1%_0
6
8 1 PCI_I NT#E
USBRBIAS Z o= 6 0O ? 5%
RN30 7 2 PCI_I NT#F 82801
HBM ICH8M Pla ce within 50 0
8.2K_8P4R_04 6 3 PCI_SERR# INTA #: mil s of ICH
5 4 PCI_I NT#A
8 1 PCI_LOCK# INTB #:C ardReader
RN31 7 2 PCI_I NT#D
8.2K_8P4R_04 6 3 PCI_TRDY# INTC #:
5 4 PCI_I RDY#
INTD #:1 394 U6B
18,19 PCI_AD[ 31: 0]
R19
1 8.2K_04 PCI_I NT#H PCI_AD0 D20 A4 PCI_REQ#0
AD0 REQ0# PCI _REQ#0 19
PCI_AD1 E19 D7 PCI_GNT#0 PCI _GNT#0 19
PCI_AD2 D19 AD1 GNT0# E18 PCI_REQ#1
3.3V PCI_AD3 A20 AD2 REQ1#/GPIO50 C18 PCI_GNT# 1
PCI_AD4 D17 AD3 GNT1#/GPIO51 B19 PCI_REQ#2
AD4 REQ2#/GPIO52 PCI _REQ#2 18
PCI_AD5 A21 F18 PCI_GNT# 2
AD5 GNT2#/GPIO53 PCI _GNT#2 18
PCI_AD6 A19 A11 PCI _REQ#3
AD6 REQ3#/GPIO54
C216 0.1u_16V_04 PCI_AD7 C19 C10 PCI_GNT# 3
U9 PCI_AD8 A18 AD7 GNT3#/GPIO55
5
74LVC1G08GW PCI_AD9 B16 AD8 C17

AD9 C/BE0# PCI _C/BE#0 18,19
PLT_RST# 1 6-01-74108 -Q61 PCI_AD10 A12 E15 R380
AD10 C/BE1# PCI _C/BE#1 18,19
4 PCI_AD11 E16 F16
BUF_PLT_RST# 17,22,23 AD11 C/BE2# PCI _C/BE#2 18,19 *1K_1%_04
2 PCI_AD12 A14 E17
AD12 C/BE3# PCI _C/BE#3 18,19
PCI_AD13 G16
AD13
R104 PCI_AD14 A15 C8 PCI_IRDY#
PCI_AD15 B6 AD14 IRDY# D9 PCI _IRDY# 18,19
3
AD15 PAR PCI _PAR 18,19

100K_04 PCI_AD16 C11 G6 PCI_RST#
PCI_AD17 A9 AD16 PCI PCIRST# D16 PCI_DEVSEL#
AD17 DEVSEL# PCI _DEVSEL# 18, 19
PCI_AD18 D11 A7 PCI_PERR#
AD18 PERR# PCI _PERR# 18,19
PCI_AD19 B12 B7 PCI_LOCK#
AD19 PLOCK#
PCI_AD20 C12 F10 PCI_SERR#
AD20 SERR# PCI _SERR# 19
PCI_AD21 D10 C16 PCI_STOP#
PCI_AD22 C7 AD21 STOP# C9 PCI_TRDY# PCI _STOP# 18,19
AD22 TRDY# PCI _T
RDY# 18,19
PCI_AD23 F13 A17 PCI_FRAM E#
AD23 FRAME# PCI _FRAME# 18,19
PCI_AD24 E11
AD24
PCI_AD25 E13 AG24 PLT_RST#
AD25 PLTRST# PLT_RST# 5,17
PCI_AD26 E12 B10 PCLK_ICH
AD26 PCICLK PCLK_ICH 16
PCI_AD27 D8 G7
AD27 PME# PME# 18,19,22
PCI_AD28 A6
PCI_AD29 E8 AD28
PCI_RST# R232 0_04 PCI_AD30 D6 AD29
19 PCI_RST# AD30
PCI_AD31 A3
AD31
PLT_RST# R98 *0_04

PCIRST# 18,23
PCI_I NT#A F9
Interrupt I/F F8 PCI_INT#E
19 PCI_INT
#A PIRQA# PIRQE#/GPIO2
19 PCI_INT
#B PCI_I NT#B B5 G11 PCI_INT#F
PCI_I NT#C C5 PIRQB# PIRQF#/GPIO3 F12 PCI_INT#G
PCL
K_ICH R387 *100K_04 Z1309 C551 *10p_50V_04 PCI_I NT#D A10 PIRQC# PIRQG#/GPIO4 B3 PCI_INT#H
18 PCI_INT
#D PIRQD# PIRQH#/GPIO5
82801HBMI CH8M
2,5,8..12,14..26,31 3.3VS
2,11,14,15,17,23,24,26..29 3.3V
3,8,12,15,17,23,26,28 1.5VS
11,12,14,15,20,21,23..25 5VS
B - 14 ICH8-M 2/4, PCI, USB

Schematic Diagrams
ICH8-M 3/4
3.3VS
3.3VS 9,10,16 ICH_
SMBCLK0
DDR2, CLK GEN LCDID0 R390 10K_04
9,10,16 ICH_
SMBDAT0
U6C LCDID1 R386 10K_04
ICH_SMBCLK0 AJ26 AJ12 SB_GPIO21
SMBCLK SATA0GP/GPIO21
R132 ICH_SMBDAT0 AD19 AJ10 SB_GPIO19
CL_RST#1 AG21 SMBDATA SATA1GP/GPIO19 AF11 LCDID0 SB_GPIO21 R385 10K_04
SATA
GPIO
VCORE PWRGD 100K_04 Z o= 55 O? 5% 17 CL_
RST#1
ICH_SMBCLK1
AC17
AE19
LINKALERT
SMLI NK0
#
SMB SATA2GP/GPIO36
SATA3GP/GPIO37
AG11 LCDID1 SB_GPIO19 R175
R384
10K_04
*10K_04
17 ICH_
SMBCLK1 SMLI NK1
NEW CARD, MINI CARD ICH_SMBDAT1 AG9 CLK_ICH14 R166 *10K_04
VRM_PWRGD 17 ICH_
SMBDAT1 PM_RI# AF17 CL
K14 G5 CLK_ICH48 CLK_
I CH14 16
CLK_
I CH48 16
Clocks
RI# CL
K48
Q7 R1
78 0
_04 SB_SUSSTAT# F4 D3 SUSCLK
17 LPCPD# SUS_STAT#/LPCPD# SUSCLK
2N7002W PM_SYSRST# AD15
D
C239 SYS_RESET# AG23 I CH_SUSB#

6-15-2 7002-7B5 SLP_
S3# Layout note:
AG12 AF21 I CH_SUSC#
5 PM_BMBUSY# BMBUSY#/GPIO0 SLP_
S4#
G *0.1u_1
0V_X
7R_04 AD18 SLP_S5# It"s for internal testing
31 CLKEN# SLP_
S5#
SWI# AG22 purposes only
22 SWI # SMBALERT#/GPIO11 AH27 S4_
STATE
S
PM_STPPCI# AE20 S4_STATE#/GPIO26

16 PM_STPPCI# STP_PCI#/GPIO15
PM_STPCPU# AG18 AE2
3 SB_PWROK R1
46 100K_04
16 PM_ST
PCPU# STP_CPU#/GPIO25 PWROK
GPIO SYS
3.3V
PM_CLKRUN# AH11 AJ14 Z1421 R377 100_1%_0
4
17,22 PM_CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 PM_
DPRSLPVR 5
,31
R129 *10K_04 PM_STPPCI# PCIE_WAKE# AE17 AE2
1 SB_BATLOW# R128 10K_04
SMI# 1
7,23 PCI E_WAKE# WAKE# BATLOW# 3.3V
R138 10K_04 SERIRQ AF12
ICH_SMBDAT0 17, 19
,22 SERIRQ SERIRQ
R134 2.2K_04 2 PM_THRM# PM_THRM# AC13 C2 PWR_BTN# R190 *1
0K_
04 3.3V
THRM# PWRBTN#
Power MGT
R130 2.2K_04 ICH_SMBDAT1

PWR_BTN# 22
R116 2.2K_04 ICH_SMBCLK0 R1
36 1M_04 VRM_PWRGD AJ20 AH20 Z1420 R370 10K_04
VRMPWRGD LAN_RST#
R131 2.2K_04 ICH_SMBCLK1
Z1401 AJ22 AG27 Z1419 R338 100_1
%_04 RSMRST# 22
R149 1K_1%_04 PCIE_WAKE# TP7 RSMRST# R33
9 10K_04
R145 10K_04 PM_SYSRST# Z1499
AJ8 E1
Z1498 TACH1/GPIO1 CK_PWRGD CLK_
PWRGD 16 3.3VS
8 1 SWI# AJ9 C51
6 10
0p_50V_04
TACH2/GPIO6
RN26 7 2 CL_RST#1 1
1 SB_BLON R395 0_04 Z1422 AH9 E3 MPWROK MPWROK 5
10K_8P4R_04 6 3 ICH_SUSB# SCI# AE16 TACH3/GPIO7 CLPWROK
22 SCI# GPIO8
5 4 07/23/2007 SMI# AC19 AJ25 Z14
18 R343 *0_04 PM_SLP_M# R10
9
22 SMI# GPIO12 SLP_M#
Sheet 14 of 38
GPIO
8 1 SCI# SB_AL I EN_DET# AG 8

TACH0/GPIO17
RN28 7 2 FWH_TBL# AH12 F23 CL_CLK0 5 3.24K_1%_06
GPIO18 CL_CLK0
Controller Link
10K_8P4R_04 6 3 PM_RI# AE11 AE18

2
1 SB_M UTE# GPIO20 CL_CLK1 CL_CLK1 1
7
5 4 SB_SUSSTAT# R394 10K_04 FWH_WP# AG 10
3.3VS
3.3VS
R154 *0_04
Z14
Z14
Z14
04 AH25
05 AD16
23 AG 13
SCL
Q
Q
OCK/GPIO22
RT_STATE0/GPIO27
RT_STATE1/GPIO28
CL_DATA0
CL_DATA1
F22
AF19
CL_DATA0 5
CL_DATA1 17
Zo= 5 5O? 5%
R10
8
C209 3.3VS
ICH8-M 3/4
1
6 PWRSAVE#
Z1406 AF9 SATACLKREQ# /GPIO35 D24 Z1428 12mils 453_1
%_06 0.1u_10V_X7R_04
SLOAD/GPIO38 CL_VREF0
R1
60 100K_04 SB_ALIEN_DET# R165 10K_04 Z1424 AJ11 AH23 Z1427 R3
61
SDATAOUT0/GPIO39 CL_VREF1
R153 10K_04 Z14 25 AD10
SDATAOUT1/GPIO48
R1
57
R1
55
10K_04
8.2K_04
SERIRQ
PM_THRM#
3.3VS
R161 *1K_1%_04
AD9 CL_RST#
AJ23 Zo = 5 5O? 5 % CL
_RST#0 5
3.24K_1%_06
R1
44 *10K_04 PM_STPCPU#
20 ICH_SPKR
R381 *10K_04
SPKR
AJ27 Z1417 R342 10K_04
C L_ VRE T0 /1= 0.4 05 V 12mils
3.3VS MEM_LED/GPIO24 3.3V
MISC
R1
58 8.2K_04 PM_CLKRUN# AJ13 AJ24 Z1416 R354 10K_04
5 MCH_ICH_ SYNC# MCH_
SYNC# ALERT/GPIO10 AF22 Z1415 0410 C539
R365 Z1426 AJ21 NETDETECT/GPIO14 AG19 Z1414 10
0K_ 04 R3
59
TP3 WO L_EN/GPIO9 R368
3
.3V 0.1u_10V_X7
R_04
*1K_
1%_04 828
01HBM ICH8M 453_
1%_06
C584
0.1u_16V_04
14
U23B
74LVC0
8PW C30
3 4.7u_
6.3V_0
6
RSMRST# 4
6
SUSB# 17,19
,22,27
ICH_
SUSB# 5
R22
2 1
50K_04
R404 5VS
D8
7
1M_04 3.3V SCS355

V
6-06-00355-061
R206 10
0K_
04
14
U23A Z1
413 C A R207 1M_04
74LVC08PW
PM_PWROK 1 R407 0
_04
3.3V 1
1,22,31 PM_PWROK
3 Z14
07 SB_PWROK D7 SCS355V
U23C 2 C A
5
,31 DEL
AY_PWRGD 26 1
.25VS_PWRGD
74LVC08PW C582
R408 3.3V
6-01-07408-Q70
4
1
*0.1u_16V_04
RSMRST# 9 1M_0
4
8
SUSC# 2
2
14
ICH_SUSC# 10 U23D
74LVC08PW
12
2
8 VCCP_PWRGD
R4
03 11 MPWROK
7
13
2
9 1
.8V_PWRGD
1M_04
7
CLK_ICH14 R179 *10

K_0
4 Z1411 C274 *0.1u_10
V_X
7R_04
CLK_ICH48 R189 *10

K_0
4 Z1412 C287 *0.1u_10
V_X
7R_04
POWER OK
3.3VS U14 R229
2 Z14
09 PM_PWROK
RST# PM_PWROK 11,22,31
3
VCC 1 100_04
GND R223
C307 G690L
293T73
6-03-69029-0D0 100K_04
0.1u_16V_04
(IMP809)
11,12,15,20,21,23 . .25 5VS
2,11,13,15,17,23,24,26 . .29 3.3V
2,5,8..13,15..26,31 3.3VS
ICH8-M 3/4 B - 15

Schematic Diagrams
ICH8-M 4/4
Layo ut not e: RTCVCC

U6F 8 0m ils 1 . 2A U6E
Place within 100 mils AD25 VCCRTC A13 1. 05VS A23 K7
VCC1_05[ 01] VSS[001] VSS[099]
of pin A16 and T7 of VCC1_05[ 02] B13 A5 VSS[002] VSS[100] L1
C205 C202 C515 A16 V5REF[1] VCC1_05[ 03] C13 C253 C226 +
C242 AA2 VSS[003] VSS[101] L13
ICH8M on the bottom VCC5REF T7 V5REF[2] C14 AA7 L15
VCC1_05[ 04] VSS[004] VSS[102]
side or 140 mils on 0.1u_10V_X7R_04 0. 1u_16V_04 10u_10V_08 VCC1_05[ 05] D14 0.1u_10V_X7R_04 1u_6.3V_04 100u_6.3V_B2 A25 VSS[005] VSS[103] L26
the top side V5REF_SUS G4 V5REF_SUS VCC1_05[ 06] E14 AB1 VSS[006] VSS[104] L27
F14 AB24 L4
CLOSE TO pin AD25 AA25 VCC1_05[ 07] G14 AC11 VSS[007] VSS[105] L5
VCC1_5_B[01] VCC1_05[ 08] La yout n ote: VSS[008] VSS[106]
AA26 L11 AC14 M12
5VS AA27 VCC1_5_B[02] VCC1_05[ 09] L12 Place at MCH edge AC25 VSS[009] VSS[107] M13
D31 AB27 VCC1_5_B[03] VCC1_05[ 10] L14 AC26 VSS[010] VSS[108] M14
A
SCS751V-40 AB28 VCC1_5_B[04] VCC1_05[ 11] L16 AC27 VSS[011] VSS[109] M15
6-06 -75140 -061 AB29 VCC1_5_B[05] VCC1_05[ 12] L17 AD17 VSS[012] VSS[110] M16
D28 VCC1_5_B[06] VCC1_05[ 13] L18 L ayout note: AD20 VSS[013] VSS[111] M17
D29 VCC1_5_B[07] VCC1_05[ 14] M11 Place within 100mils of ICH on the AD28 VSS[014] VSS[112] M23
CORE
3.3VS 1.5VS E25 VCC1_5_B[08] VCC1_05[ 15] M18 bottom side or 140 mils on the top AD29 VSS[015] VSS[113] M28
20 m ils VCC1_5_B[09] VCC1_05[ 16] VSS[016] VSS[114]
C
E26 P11 AD3 M29

E27 VCC1_5_B[10] VCC1_05[ 17] P18 1. 5VS AD4 VSS[017] VSS[115] M3
A
Z1501 F24 VCC1_5_B[11] VCC1_05[ 18] T11 1 0m ils 2 3m A L28 AD6 VSS[018] VSS[116] N1
D30 0409 R133 F25 VCC1_5_B[12] VCC1_05[ 19] T18 Z1505 AE1 VSS[019] VSS[117] N11
R400 G24 VCC1_5_B[13] VCC1_05[ 20] U11 AE12 VSS[020] VSS[118] N12
SCS751V- 40 H23 VCC1_5_B[14] VCC1_05[ 21] U18 C518 C514 HCB1608KF- 121T25 AE2 VSS[021] VSS[119] N13
1.5VS_PCIE_ICH VCC1_5_B[15] VCC1_05[ 22] VSS[022] VSS[120]
100_1%_04 0_08 80 m ils 6 57 m A H24 VCC1_5_B[16] VCC1_05[ 23] V11 AE22 VSS[023] VSS[121] N14
C
J23 V12 10u_10V_08 0.01u_16V_04 AD1 N15

VCC1_5_B[17] VCC1_05[ 24] VSS[024] VSS[122]

VCC5REF J24 VCC1_5_B[18] VCC1_05[ 25] V14 AE25 VSS[025] VSS[123] N16
K24 VCC1_5_B[19] VCC1_05[ 26] V16 AE5 VSS[026] VSS[124] N17
C578 C577 +
C212 C219 C210 C193 C206 K25 VCC1_5_B[20] VCC1_05[ 27] V17 AE6 VSS[027] VSS[125] N18
L23 VCC1_5_B[21] VCC1_05[ 28] V18 AE9 VSS[028] VSS[126] N26
1u_6.3V_04 0.1u_10V_X7R_04 100u_6. 3V_B2 10u_10V_08 0. 1u_10V_X7R_04 0.1u_16V_04 0.1u_16V_04 L24 VCC1_5_B[22] AF14 VSS[029] VSS[127] N27
VCCA3GP
L25 VCC1_5_B[23] VCCDMIPLL R29 2 0m ils 5 0m A 1. 25VS AF16 VSS[030] VSS[128] N4
La yout n ote: M24 VCC1_5_B[24] Z1506 L29 HCB1608KF- 121T25 AF18 VSS[031] VSS[129] N5
M25 AE28 AF3 N6
VCC1_5_B[25] VCC_DMI[1] 1. 05VS VSS[032] VSS[130]
Sheet 15 of 38
Place above Caps within 100 mils of ICH on the bottom N23 AE29 C517 10u_10V_08 AF4 P12
VCC1_5_B[26] VCC_DMI[2] VSS[033] VSS[131]
side or 140 mils on the top near D28, T28, AD28 N24
VCC1_5_B[27] 2 0m ils 5 0m A AG5
VSS[034] VSS[132]
P13
N25 AC23 AG6 P14
P24 VCC1_5_B[28] V_CPU_I O[1] AC24 AH10 VSS[035] VSS[133] P15
Layo ut not e: VCC1_5_B[29] V_CPU_I O[2] VSS[036] VSS[134]
ICH8-M 4/4 Place within 100 mils
of pin G4 of ICH8M on
L5
HCB1608KF- 121T25
6-1 9-3100 1-164- 1 1 0m ils 4 7m A
P25
R24
R25
R26
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC3_3[ 01]
AF29
AD2
C248
0.1u_10V_X7R_04
C228
1u_6.3V_04
C237
10u_10V_08
AH13
AH16
AH19
AH2
VSS[037]
VSS[038]
VSS[039]
VSS[135]
VSS[136]
VSS[137]
P16
P17
P23
P28
the bottom side of Z1502 R27 VCC1_5_B[33] VCC3_3[ 02] AF28 VSS[040] VSS[138] P29
1. 5VS T23 VCC1_5_B[34] AC8 AH22 VSS[041] VSS[139] R11
140mils on the top
VCCP_CORE
Lay out no te: C289 C576 T24 VCC1_5_B[35] VCC3_3[ 03] AD8 C257 C197 C276 AH24 VSS[042] VSS[140] R12
T27 VCC1_5_B[36] VCC3_3[ 04] AE8 AH26 VSS[043] VSS[141] R13
Place within 100mils 10u_10V_08 0.1u_10V_X7R_04 T28 VCC1_5_B[37] VCC3_3[ 05] AF8 0.1u_10V_X7R_04 0.1u_16V_04 0.1u_16V_04 AH3 VSS[044] VSS[142] R14
T29 VCC1_5_B[38] VCC3_3[ 06] AH4 VSS[045] VSS[143] R15
of ICH on the bottom VCC1_5_B[39] VSS[046] VSS[144]
09/26/2006
side or 140 mils on
U24 AA3 2 0m ils 2 78 m A AH8 R16
0409 U25 VCC1_5_B[40] VCC3_3[ 07] U7 AJ5 VSS[047] VSS[145] R17
VCC1_5_B[41] VCC3_3[ 08] 3. 3VS VSS[048] VSS[146]
the top V23 VCC1_5_B[42] VCC3_3[ 09] V7 B11 VSS[049] VSS[147] R18
V24 VCC1_5_B[43] VCC3_3[ 10] W1 C247 C268 B14 VSS[050] VSS[148] R28
5V 3. 3V V25 W6 B17 R4
VCC1_5_B[44] VCC3_3[ 11] VSS[051] VSS[149]
IDE
10 m ils W25 VCC1_5_B[45] VCC3_3[ 12] W7 0.1u_16V_04 10u_10V_08 B2 VSS[052] VSS[150] T12
Y25 Y7 B20 T13
A
VCC1_5_B[46] VCC3_3[ 13] VSS[053] VSS[151]

B22 VSS[054] VSS[152] T14
R204 D9 8 0m ils 1 . 5A AJ6 VCCSATAPLL VCC3_3[ 14] A8 B8 VSS[055] VSS[153] T15
VCC3_3[ 15] B15 C24 VSS[056] VSS[154] T16
ARX
10_04 SCS751V- 40 1.5VS AE7 VCC1_5_A[01] VCC3_3[ 16] B18 C26 VSS[057] VSS[155] T17
AF7 B4 C254 C302 C270 C27 T2
AG7 VCC1_5_A[02] VCC3_3[ 17] VSS[058] VSS[156]
C
La yout n ote: B9 C6 U12

V5REF_SUS C271 C277 C280 C295 AH7 VCC1_5_A[03] VCC3_3[ 18] C15 0.1u_10V_X7R_04 0.1u_16V_04 0.1u_10V_X7R_04 D12 VSS[059] VSS[157] U13
AJ7 VCC1_5_A[04] VCC3_3[ 19] D13 D15 VSS[060] VSS[158] U14
PCI
C291 C290 1u_6.3V_04 1u_6. 3V_04 0.01u_16V_04 VCC1_5_A[05] VCC3_3[ 20] D5 D18 VSS[061] VSS[159] U15
0.1u_10V_X7R_04 AC1 VCC3_3[ 21] E10 D2 VSS[062] VSS[160] U16
1u_6.3V_04 0.1u_10V_X7R_04 AC2 VCC1_5_A[06] VCC3_3[ 22] E7 D4 VSS[063] VSS[161] U17
AC3 VCC1_5_A[07] VCC3_3[ 23] VSS[064] VSS[162]
ATX
F11 1 0m ils 3 2m A E21 U23

Place within 100mils of ICH on the bottom AC4 VCC1_5_A[08] VCC3_3[ 24] E24 VSS[065] VSS[163] U26
side or 140 mils on the top near pin AE7 AC5 VCC1_5_A[09] AC12 Z1507 R159 0_04 E4 VSS[066] VSS[164] U27
VCC1_5_A[10] VCCHDA 3. 3VS 3. 3V VSS[067] VSS[165]
1 0m ils 3 2m A E9 U3
AC10 AD11 F15 VSS[068] VSS[166] U5
AC9 VCC1_5_A[11] VCCSUSHDA E23 VSS[069] VSS[167] V13
VCC1_5_A[12] J6 TP_VCCSUS105_ICH1 C234 F28 VSS[070] VSS[168] V15
1.5VS AA5 VCCSUS1_05[1] AF20 TP_VCCSUS105_ICH2 F29 VSS[071] VSS[169] V28
1 0m ils 1 0m A AA6 VCC1_5_A[13] VCCSUS1_05[2] 0. 1u_10V_X7R_04 F7 VSS[072] VSS[170] V29
VCC1_5_A[14] AC16 TP_VCCSUS15_ICH1 G1 VSS[073] VSS[171] W2
VCCSUS1_5[1] VSS[074] VSS[172]
R358 1.5VS R405 0_04 Z1503 G12 VCC1_5_A[15] E2 VSS[075] VSS[173] W26
0_06 10 m ils G17 VCC1_5_A[16] VCCSUS1_5[2] J7 TP_VCCSUS15_ICH2 G10 VSS[076] VSS[174] W27
C579 C580 H7 VCC1_5_A[17] 3.3V G13 Y28
VSS[077] VSS[175]
VCCSUS3_3[ 01] C3 G19 VSS[078] VSS[176] Y29
VCCGLANPLL 0.1u_10V_X7R_04 0.1u_16V_04 AC7 VCC1_5_A[18] G23 Y4
VCCPSUS
VSS[079] VSS[177]
AD7 VCC1_5_A[19] VCCSUS3_3[ 02] AC18 C235 C284 G25 VSS[080] VSS[178] AB4
C541 VCCSUS3_3[ 03] AC21 G26 VSS[081] VSS[179] AB23
D1 VCCUSBPLL VCCSUS3_3[ 04] AC22 0.1u_10V_X7R_04 0.01u_16V_04 G27 VSS[082] VSS[180] AB5
0.1u_16V_04 AG20 H25 AB6
F1 VCCSUS3_3[ 05] AH28 H28 VSS[083] VSS[181] AD5
Layo ut not e: 1. 5VS L6 VCC1_5_A[20] VCCSUS3_3[ 06] 3.3V VSS[084] VSS[182]
USB CORE
2 0m ils 1 70 m A H29 U4
Place within 100mils of ICH C269 L7 VCC1_5_A[21] P6 H3 VSS[085] VSS[183] W24
on the bottom side or 140 mils M6 VCC1_5_A[22] VCCSUS3_3[ 07] P7 H6 VSS[086] VSS[184]
3.3VS 3.3VS
on the top near pin F1 0.1u_10V_X7R_04 M7 VCC1_5_A[23] VCCSUS3_3[ 08] C1 C283 C227 +C583 J1 VSS[087] A1
VCC1_5_A[24] VCCSUS3_3[ 09] N7 J25 VSS[088] VSS_NCTF[01] A2
W23 VCCSUS3_3[ 10] P1 0.1u_10V_X7R_04 0.1u_16V_04 J26 VSS[089] VSS_NCTF[02] A28
R120 R124 VCC1_5_A[25] VCCSUS3_3[ 11] P2 100u_6.3V_B2 J27 VSS[090] VSS_NCTF[03] A29
TP_VCCLAN105_ICH1 F17 VCCSUS3_3[ 12] P3 J4 VSS[091] VSS_NCTF[04] AH1
VCCPUSB
0_0610 m ils 0_06 1 0m ils TP_VCCLAN105_ICH2 G18 VCCLAN1_05[ 1] VCCSUS3_3[ 13] P4 J5 VSS[092] VSS_NCTF[05] AH29
VCCLAN1_05[ 2] VCCSUS3_3[ 14] P5 K23 VSS[093] VSS_NCTF[06] AJ1
VCCGLAN3_3 VCCLAN3_3 VCCLAN3_3 F19 VCCSUS3_3[ 15] R1 K28 VSS[094] VSS_NCTF[07] AJ2
G20 VCCLAN3_3[ 1] VCCSUS3_3[ 16] R3 K29 VSS[095] VSS_NCTF[08] AJ28
C213 C230 VCCLAN3_3[ 2] VCCSUS3_3[ 17] R5 K3 VSS[096] VSS_NCTF[09] AJ29
VCCGLANPLL A24 VCCSUS3_3[ 18] R6 K6 VSS[097] VSS_NCTF[10] B1
0.1u_16V_04 0. 1u_16V_04 1 0m ils 8 0m A VCCGLANPLL VCCSUS3_3[ 19] VSS[098] VSS_NCTF[11] B29
VSS_NCTF[12]
GLAN POWER
1.5VS R351 0_06 Z1504 A26 VCCGLAN1_5[1] VCCCL1_05 G22 TP_VCCCL_105

A27 VCCGLAN1_5[2] 82801HBM ICH8M
C531 C530 B26 VCCGLAN1_5[3] VCCCL1_5 A22 TP_VCCCL_15
B27 VCCGLAN1_5[4]
0.1u_16V_04 0.1u_16V_04 B28 VCCGLAN1_5[5] VCCCL3_3[1] F20 Z1508 C543 C544
11,23,24,26. .29,31 5V VCCCL3_3[2] G21 R125 0_04
VCCGLAN3_3 B25 VCCGLAN3_3 3.3VS *0. 1u_10V_X7R_04 *1u_6.3V_04
2, 11,13,14,17,23,24, 26..29 3.3V
3,8,12,13,17, 23,26,28 1.5VS 10 m ils 6 4m A
82801HBM I CH8M
12 RTCVCC
2,5,8..14,16. .26,31 3.3VS
11,12,14,20,21, 23..25 5VS
5,8, 26 1.25VS
2..5,7, 8,12,28 1.05VS
B - 16 ICH8-M 4/4

Schematic Diagrams
CLOCK GENERATOR
CLOCK GENERATOR
Layout note:
3. 3VS
Insatlled: Differential clock
C45 6 3 .3VS level is higher
L2 0
HC B1 608 KF- 121 T25 1u_ 6.3 V_04
6-19-31001-164-1 3 .3VS
3 .3VS_C LK
40mil s R 40
3 .3VS 1K_1%_0 4 L23
Layout note: C6 5 C4 71 C46 1 C44 6
Z160 9 R41 300 _1%_0 4 HCB1 608 KF- 121 T25
PLACE CRYSTAL WITHIN 500 10u _10 V_ 08
0. 1u_ 10V_X7R_ 04 0. 1u_ 10V_X7R_ 04 0. 1u_ 10V_X7R_ 04 30mi ls
Z1 610
MILS OF ICS9LPR363 L 21
X1 C482 C 487 C 492 C 145
HCB16 08KF-1 21T25
FSX8L _14. 31 8MHz 20mi ls Z1 601 0.1 u_1 0V_X7 R_0 4 1 u_6 .3V_ 04 0 .1u _10 V_X7 R_04 1 0u_ 10V_0 8
6-22-14R31-1BK
42
21
28
50
47
56
1
7
4 3
C6 6 C 110 C4 76 U1
VDDPC IEX
VR EF
VDD REF
VDDCPU
VDDPCI
VDDPCI
VDDPCI EX
VD DPCIEX
1 2 10 u_1 0V_08 1 u_6 .3V_0 4 0 .1u _10 V_ X7R _04 11 49 Z16 11 1 4 R N17 C LK_MC H_BCL K
VDD48 C PUT_L 1F CL K_MCH _BCLK 4
45 VDDA CPUC_L 1F 48 Z16 12 2 3 3 3_4 P2R_0 4 C LK_MC H_BCL K# CL K_MCH _BCLK# 4
C 157 C 158
52 Z16 13 1 4 R N21 C LK_CPU_ BC LK
C PU T_L 0 CL K_CPU_ BC LK 2
2 2p_ 50V_0 4 2 2p_ 50V_ 04 XTAL _IN 58 51 Z16 14 2 3 3 3_4 P2R_0 4 C LK_CPU_ BC LK#
X1 C PU C_L 0 CL K_CPU_ BC LK# 2
XTAL _OUT 57
X2 PCI eT_ L8/ CPUITPT_L 2
PCI eC_ L8/ CPUI TPC_L 2
44
43
Z16 15
Z16 16
3
4
2 R N13 C LK_PCI E_ ICH
1 3 3_4 P2R_0 4 C LK_PCI E_ ICH # CL K_PCIE_I CH 13
CL K_PCIE_I CH# 1 3 Sheet 16 of 38
41 Z16 17 R3 8 47 5_1 %_ 04
? ? ? ! 19 CLK_4 8M_C ARD
14 CLK_I CH48
CLK_4 8M_ CARD R5 5
C LK_IC H48 R5 2
12_ 06
12_ 06
FSLA 12
PCIe T_L 7/PEREQ1 #
PCIe C_L 7/PEREQ2 #
40
39
Z16 18
Z16 19
R3 7 47 5_1 %_ 04
LAN_CL KREQ# 23
MCH_ CLKREQ# 5 CLOCK
FSL A/ USB_48 MHz PCIe T_L 6
4
4
C LK_BSEL2
CL K_ BSEL 0 R4 9
R5 3
2.2 K_ 04
10K_0 4
REF_1 4.3 18M 60
REF0_1 4.3 18M
PCIe C_L 6
PCIe T_L 5
38
36
Z16 20
Z16 21 1 4 R N3 C LK_PCI E_ MIN I

CL K_PCIE_MINI 17
GENERATOR
14 CL K_IC H14 CLK_I CH1 4 R5 6 33_ 04 FSLC 61 35 Z16 22 2 3 3 3_4 P2R_0 4 C LK_PCI E_ MIN I# CL K_PCIE_MINI # 17
REF1/FSLC /TEST_SEL PCIe C_L 5
62 30 Z16 23 2 3 R N2 C LK_PCI E_ GLAN
1 4 PM_STPCPU# 63 CPU_STOP# PCIe T_L 4 31 Z16 24 1 4 3 3_4 P2R_0 4 C LK_PCI E_ GLAN# CL K_PCIE_G LAN 23
1 4 PM_STPPCI# PCI/ PC IEX_ STOP# PCIe C_L 4 CL K_PCIE_G LAN# 2 3
R63 3 3_04 Z16 02 5 26 Z16 25 3 2 R N1 C LK_SATA
17 PCL K_TPM R7 0 1 0K_04 PCICL K3/*SELPCI EX0_L CD# SATACLKT_ L 27 Z16 26 4 1 3 3_4 P2R_0 4 C LK_SATA# CL K_SATA 1 2
SATACLKC_ L CL K_SATA# 12
PCLK_ KBC R 62 33 _04 Z16 03 4 24 Z16 27 4 1 R N5 C LK_PCI E_ MIN I_3 G
22 PC LK_KBC PCICL K2 PCIe T_L 3 CL K_PCIE_MINI _3G 2 3
25 Z16 28 3 2 3 3_4 P2R_0 4 C LK_PCI E_ MIN I_3 G# CL K_PCIE_MINI _3G # 23
PCIe C_L 3 33
PCLK_ CARD R 61 33 _04 Z16 04 3 *PEREQ4 # WL AN _CL KR EQ # 17 ,23
1 9 PCLK_C AR D PCICL K1
22 Z16 29 4 1 R N9 C LK_PCI E_ NEW_CAR D CL K_PCIE_N EW _CARD 1 7
PCIe T_L 2
18 PC LK_13 94 PCLK_ 139 4 PCIe C_L 2 23 Z16 30 3 2 3 3_4 P2R_0 4 C LK_PCI E_ NEW_CAR D# CL K_PCIE_N EW _CARD # 17
R5 9 1 0K_04 R60 3 3_04 Z16 05 64 32
3 .3VS **PC ICL K0 /REQ_ SEL *PEREQ3 # NEWC AR D_C LKREQ# 17
19 Z16 31 4 1 R N16 C LK_PCI E_ 3GPLL
PCIe T_L 1 CL K_PCIE_3 GPLL 5
13 PCL K_IC H PCLK_ ICH R64 33_ 04 Z160 6 9 20 Z16 32 3 2 3 3_4 P2R_0 4 C LK_PCI E_ 3GPLL # CL K_PCIE_3 GPLL# 5
R7 1 1 0K_04 *SEL LCD_ 27# /PCI CLK_F5 PCIe C_L 1 34
3.3 VS R3 28 1 0K_04 Z160 8 R32 9 0_0 4 Z160 7 8 *PWRSAVE# PWRSAVE# 14
PCICL K_F4/I TP_EN
17 Z16 33 4 1 R N20 C LK_DR EFSS CL K_DREFSS 5
2 7FIX/ LCD _SSCGT/ PCIe T_L 0
9,1 0,1 4 IC H_SMBCL K0 54 18 Z16 34 3 2 3 3_4 P2R_0 4 C LK_DR EFSS# CL K_DREFSS# 5
55 SCLK 2 7SS/LCD _SSCGC/ PCIe C_L 0 16 FSLB
9,1 0,1 4 IC H_SMBDAT0 SDATA FSL B/ TEST_MODE R 321 0 _04
CL K_ BSEL1 4
3. 3VS R 65 100 K_ 04 CLK_ PW RGD_ T 10
VTT_ PW R_GD /PD# 14 Z16 35 4 1 R N24 C LK_DR EF
PC IeT_L9 /DO TT_ 96MH zL CL K_DREF 5
GN DA
C4 81 15 Z16 36 3 2 3 3_4 P2R_0 4 C LK_DR EF#

GN D
GN D
G ND
GND
GND
GND
GND
PC IeC _L9 /DO TC_ 96MH zL CL K_DREF# 5

R58 0_0 4 C1 51 6-16-33034-45C
14 C LK_PWRG D
*0. 1u_ 10V_ X7R_ 04 IC S9 LPR36 3DG LF
29
46
13
37
53
59
0. 1u _10 V_ X7R _04 6-02-09363-E61

2
6
RTM 875 T-36 3

6-0 2-8 7536 -EL0
PEREQ1#: P CIECLK 0, 6
PEREQ2#: P CIECLK 1, 8
PEREQ3#: P CIECLK 2, 4 Host Clo ck
BSEL 2 BSEL 1 B SEL0 F requ enc y
PEREQ4#: P CIECLK 3, 5, 7
0 0 1 13 3 M Hz 5 33 MHz
PEREQ[1..4]# have
internal pull up 1 20 0 M Hz 8 00 MHz
0 0
3 .3VS 2,5 ,8. .1 5,1 7.. 26, 31
CLOCK GENERATOR B - 17

Schematic Diagrams
NEW CARD, MINI PCIE
3 .3 V S
C1 8 2 0 .1 u _ 1 6 V _ 0 4 WLAN POWER
NEW CARD
5
B U F _P L T_ R S T # 1 Q 5 W L A N 3 .3 V S
4 3 .3 V S A O3 4 0 9
2 6-15-03409-7E0
3 .3 V U 4
U 5 7 4 L V C 1G 0 8 GW J _N E W 1 S D
C 1 72 0 . 1 u_ 1 6 V _ 0 4 21 9 N C _R S T # 3 6-01-74108-Q61 N C _ PER ST # 13
A UX IN PER ST# C 2 20 0 . 1 u_ 1 6 V _ 0 4 PER ST# G
3 .3 V S N C _ 3. 3V 20 mil
20 12 C2 2
A U X OU T +3 . 3 V A U X C 30
6-01-74108-Q61
C 1 81 0 . 1 u_ 1 6 V _ 0 4 6 40 mil C 2 22 0 . 1 u_ 1 6 V _ 0 4
3 .3 V IN N C _ 3. 3V S
C 1 77 0 . 1 u_ 1 6 V _ 0 4 5 8 14 1 0 u _ 1 0 V_ 0 8 1 u _ 6. 3V _ 04 R 17 R1 8 C1 4
3 .3 V IN 3 . 3 V OU T +3 . 3 V
7 C 2 29 0 . 1 u_ 1 6 V _ 0 4 15
1 .5 V S 3 . 3 V OU T +3 . 3 V 2 0 K _ 1 % _ 04 0 . 1 u_ 1 6 V _ 0 4
40 mil C 2 11 0 . 1 u_ 1 6 V _ 0 4 R1 9 10 0 K _ 0 4
N C _ 1. 5V S
C 1 85 0 . 1 u_ 1 6 V _ 0 4 18 16 9
1 .5 V IN 1 . 5 V OU T +1 . 5 V
C 1 86 0 . 1 u_ 1 6 V _ 0 4 19 17 C 2 08 0 . 1 u_ 1 6 V _ 0 4 10
D
1 .5 V IN 1 . 5 V OU T +1 . 5 V 1 0 0 K_ 0 4
15 N C _ CPP E # 17 Q 6
CP P E # CP P E #
B U F _ P L T _ R S T# 2 14 N C_ C P U S B# 4 G
13 , 2 2 , 2 3 B U F _ P L T _ R S T # 23 S YSR ST# C P US B # P C IE_ W A K E # 11 CP U S B # 2 2 W L AN _ PW R 2 N7 0 0 2 W
13 U S B _ O C #3 OC # 14 , 2 3 P C I E _W A K E # W AKE #
R 95 * 1 0 0K _ 04 16
6-15-27002-7B5
S
1 6 N E W C A R D _C L K R E Q # CL KR E Q #
4 R 1 35 1 0 K_ 0 4
14 , 1 9 , 2 2 , 2 7 S U S B # S TB Y # 3 .3 V S
R 88 * 1 0 0K _ 04 3 .3 V 1 6 C LK _ P C I E _ N E W _ C A R D 19 From SB GPIO Pin
18 RE F CL K +
1 6 C L K _ P C I E _N E W _C A R D # RE F CL K - default HI
1 22
N C RC L K E N
R 78 1 0K _0 4 10 3 Z1 7 0 1 R 7 7 1 0 K_ 0 4 22 Power Plane:Suspend
3 .3 V 12 N C S H DN # 13 P C I E _ R X P 2 _ N E W _ C A R D 21 P E R p0
N C 13 P C I E _ R X N 2 _N E W _C A R D P E R n0 S3:Defined
13 11 25
N C G ND 1 3 P C IE _ T XP 2 _ NE W _ CA R D PETp 0
24 25 24 5 Z1702
N C G ND 1 3 P C IE _ T XN2 _ N E W _ C A RD PETn 0 R ESER VED
Sheet 17 of 38 P 2 23 1 T H LF C 1
6-02-22311-9L1 3
R ESER VED
6 Z1703
Port 3 13
13
U SB_ PP3
U SB_ PN 3
2
U S B _D +
U S B _D - G ND
1
NEW CARD, MINI ENE P2231 pin3,4,14,15,22

has internally pulled high
14
14
I C H _S MB D A T 1
I C H _S MB C L K 1
8
7 S MB _D A T A
S MB _C L K
G ND
G ND
G ND
20
23
26
WLAN_PWR Signal default HI for WLAN
1.BIOS Setup HI for Intel PCIE WLAN
PCIE ( 170K ohmS ) 1 30 8 3 2 -1
G ND 1 ~ 4 = G ND
6-21-G3A30-126
2.USB WLAN BIOS Setup LOW for
Fn+F11
TPM 1.2
U1 5
3 .3 V S MINI CARD P C IE _ W A K E # 1
J _ MI N I 1
2
20 mil
W L A N 3 .3 V S
26 10 3 W AK E# 3 .3 V _ 0 6
20 mil
1 2 ,2 2 L P C _A D 0 L AD0 V DD 1 B T _ D A TA 1 .5 V _ 0 1 .5 V S
23 19 R 26 7 1 0 K_ 0 4 5 8 U IM _P WR
1 2 ,2 2 L P C _A D 1 L AD1 V DD 2 3 . 3V S B T _ C H C LK U I M_ P W R
20 24 C3 2 8 C 32 3 C 32 2 C 3 20 10 U IM _D ATA
1 2 ,2 2 L P C _A D 2 17 L AD2 V DD 3 7 U I M_ D A T A 12 U IM _C LK
1 2 ,2 2 L P C _A D 3 L AD3 1 6 ,2 3 W L A N _ CL K R E Q # CL K R E Q # U I M _C L K
0 . 1 u _1 6 V _ 0 4 0 . 1 u _ 16 V _ 0 4 0 . 1 u _ 16 V _0 4 1 u _ 6 . 3 V _ 04 11 14 U IM _R ST
1 6 CL K _ P C IE _ M IN I# RE F CL K - U I M_ R E S E T
21 TPM 13 16 U IM _V PP
16 P C LK _T P M L CL K 1 6 C L K _P C I E _M I N I RE F CL K + U I M _V P P
9
22 5 15 GN D 0 4
1 2 , 2 2 L P C _ F R A ME # L F R A ME # VSB GN D 1 G N D5
16
5 ,1 3 P L T _R S T # L RE S E T #
27
1 4, 19 , 2 2 S E R I R Q S ER IRQ
15
1 4, 2 2 P M_ C L K R U N # CL K R U N# K EY
R2 5 0 0_04 28 6 21 18
14 LP C P D # L PCP D# G P IO GN D 2 G N D6
2 27 26
T PM _ BAD D 9 G PIO 2 29 GN D 3 G N D7 34
T E S T B I/B A DD 13 GN D 4 G N D8 40
X TA L I G N D9
T PM _ PP 7 35 50
PP 22 W L A N_ D E T # GN D 11 GN D 1 0
1 3 P C I E _ R X N 1 _W L A N 23
14 25 PETn 0 20
XT AL O 1 3 P C I E _R X P 1 _ W L A N PETp 0 W _ DI S A B L E # W LA N _ E N 2 2 ,2 4
1 31 22 B U F _ P L T_ R S T #
NC _ 1 1 3 P C I E _T X N 1 _W L A N PER n 0 PER SET#
3 4 33 30 Z 17 0 4 R 20 * 0 _ 04
12 NC _ 2 G ND _ 1 11 1 3 P C IE _ T XP 1 _ W L A N PER p 0 N C (S MB _ C L K ) 32 Z 17 0 5 R 21 * 0 _ 04 I C H _S MB C L K 1 1 4
NC _ 3 G ND _ 2 N C (S M B _ D A T A ) I C H _S MB D A T 1 1 4
18 17 36
G ND _ 3 NC 3 N C (U S B _ D -) U S B _P N 6 1 3
R 247 1 00 _ 1 % _ 0 4 8 25 19 38
T EST I G ND _ 4 NC 4 N C (U S B _ D + ) U S B _P P 6 1 3
37 20 mil
L18 1 2 3 G- P OW E R 39 NC 6 24 R4 2 1 0_04
3 .3 V NC 7 3 .3 V A UX 3 .3 V
SSX3 5 BC B 41 28 40 mil
NC 8 1 .5 V _ 1
6-03-00035-0H0 * H C B 2 0 1 2 K -5 0 0 T 40 43 48
NC 9 1 .5 V _ 2 1 .5 V S
14 C L_ C L K 1 45 52 W L A N 3 .3 V S
47 NC 10 3 .3 V _ 1 42
14 C L_ D A T A 1 NC 11 N C (L E D _ W W A N # )
20 mil
49 44
SINSUN
P CL K _ T P M R 2 45 * 33 _ 0 4 C 32 7 *1 0 p _ 50 V _ 0 4
14 C L_ R S T # 1
0529
51
NC
NC
12
13
L E D _ W LA N #
N C (L E D _ W P A N # )
46
Port 6
T P M _P P R 2 48 * 10 K _0 4 8 8 90 8 -5 2 0 4
PIN 5,13,14 NC
3 .3 VS For Kedr on WLAN De vice 6-21-84D10-226
T P M _B A D D R 2 39 1 0 K_ 0 4 3 .3 VS
PIN 8 100 R TO GND
R 2 46 * 10 K _0 4
asserted before entering S3 1 .5 V S 3 , 8 , 1 2 , 1 3 , 1 5 , 2 3, 26 , 2 8

3 .3 V 2 , 1 1 , 1 3 . . 1 5 , 2 3 , 2 4, 26 . . 2 9
LPC reset timing: 3 .3 V S 2 ,5 ,8 ..1 6 ,1 8 ..2 6 ,3 1
5V 1 1 , 1 5 , 2 3 , 2 4, 26 . . 29 , 3 1
LPCPD# inactive to LRST# inactive 32~96us
3 .3 VS 1 .5 V S 3 .3 V
HI : ACCESS C 28 C 27 C3 7 2 C3 8 5 C3 6 4
TPM _PP LOW : 0 .1 u _ 1 6 V _ 0 4 0 .1 u _ 1 6 V _ 0 4 0 . 1 u_ 1 6 V _ 0 4 1 0 u_ 1 0 V _ 0 8 0. 1u _ 1 6 V _ 0 4
HI : 4 E/4F h
NORM AL (
LOW : 2E /
TPM _BADD Int e rn al PD ) 2 Fh
B - 18 NEW CARD, MINI PCIE

Schematic Diagrams
IEEE 1394 VT6311S

PVA_1
394
IEEE1394 3.3VS
C240 C201 C223 C2

21
10u_10
V_08 0.1u
_10V_X7R_04 0.1u_
10V_
X7R_04 0.1u_1
0V_X
7R_04
C21
4 0.33u_1
0V_
X7R_06 R15
6
L2
1394_TPBIAS0 R11
7 54.9_1%_
04 6-13-54R91-28B 0_08
J_13
94 HCB1608KF-121
T25
LP1 R11
5 54.9_1%_
04
13,19,22 PME# 6-19-31001-1 64-1
GND1 4 Z1801 8 1 1394_TPA0+
shield TPA+ PVA_1
394 VCC_1394
GND2 3 Z1802 7 2 1394_TPA0-
shield TPA-
2 Z1803 6 3 1394_TPB0+ 3.3VS
TPB+ 1 Z1804 5 4 1394_TPB0-
TPB-
160 OHM #9
44CM-00
51 Z1805 R10
7 54.9_1%_04 C252 C250 C238 C225 C243 C233 C195 C24
9
VDD_1
394 VCC_
1394
94_PHYRST#
C131
16-104A1 R11
2 54.9_1%_04 R97 R94 10u_10V_08 0.1u_1
0V_
X7R_04 0
.1u_10V_X7R_0
4
1394_I2CEN
6-21-B4D10-104 0.1u_10
V_X7
R_04
1394_XREXT
4_XCPS
R11
3 4.99K_1%_06 *10K_04
1394_XO
*0_04 0
.1u_10V_X7R_0
4 0.1u
_10V_X7R_04 0.1u_
10V_
X7R_04 0.1u_1
0V_X
7R_04
1394_XI
C204 270p_5
0V_0
6
139
VDD_1394
13
Note: Note: Z1806 VCC_139

4
Close to 1394 CONN. Close to VT6311S
R110 1394_X
I C189 15p_50V_04
U10
Crys ta l Pla ce me nt
1
4.7K_04
63
62
61
60
58
57
56
55
54
53
52
51
50
49
48
47
46
44
43
42
41
39
38
37
36
35
34
33
6-03-06311-0P0 X3 Cr yst al must be p a

l ce a s
4
0
6
FSX_8L 24
. 57
6MHz
close as
XO
PVA1
GND10
PVA0
GND9
NC12
NC8
GND8
VDD4
NC5
GND7
VCC5
GND6
CEN
XI
XCPS
XREXT
PHYRST#
NC9
NC7
NC6
NC4
NC3
NC2
NC1
NC0
NC15
NC14
NC13
NC11
NC10
PME#
C200 0.1u_16V_04 6-22-24R57-1B4 pos sible to the Chip. Ke ep
Sheet 18 of 38
I2
1394_X
O C188 15p_50V_04
2
tra ces
65 32 Z1807 VDD_
1394 all on o ne PCB laye r.
VDD_1394 GNDARX1 PWRDET
66 31
GNDAT X1 GND5
1394_TPB0-
1394_TPB0+
1394_TPA0-
1394_TPA0+
67
68
69
70
XTPB0M
XTPB0P
XTPA0M
VDD3
SCL/EECK
SDA/ EEDI
30
29
28
27
1394-EECK
1394-EEDI
1394-EEDO
IEEE 1394 VT6311S
1394_TPBIAS0 71 XTPA0P EEDO 26 1394-EECS
C218 C251 C232 PVA_1
394 72 XTPBIAS0 EECS 25 PCI_AD0 1394
_XREXT R102 6.2K_1%_04
73 PVA2 AD0 24 PCI_AD1
PVA3 AD1
1u
_6.3V_
04 0.1u_10V_X7R_04 10u_10V_08 74 23 C199 47p_50V_04
NC20 GND4
75 22
76 NC21 GND3 21
77 NC22 VDD2 20 PCI_AD2
NC23 AD2
78 19 PCI_AD3
79
80
NC24
GNDARX2
GNDAT X2
IEEE-1394 AD3
AD4
VCC4
18
17
PCI_AD4 1394_
PHYRST#
VDD_1394
81
82
83
NC1
NC1
6
7
VT6113S AD5
AD6
16
15
14
PCI_AD5
PCI_AD6
PCI_AD7
C190
NC18 AD7 1u_6.3V_04

84 13
PVA_1
394 REG_FB GND1
85 12 PCI_C/ BE#0 13,19
86 NC19 CBE0# 11 PCI_AD8
87 PVA4 AD8 10 PCI_AD9 PCI_AD[31:0]
PVA5 AD9 13,19 PCI_AD[31:0]
88 9 PCI_AD10
13 PCI_INT#D INTA# AD10
89 8 PCI_AD11
13,23 PCIRST# 90 PCIRST# AD11 7 PCI_AD12 VCC_139
4
16 PCLK_1394 PCICLK AD12
91 6
92 GND15 GND2 5
13 PCI_GNT#2 GNT# VCC3
93 4 PCI_AD13
13 PCI_REQ#2 PCI_AD31 REQ# AD13
94 3 PCI_AD14 13
94_XCPS R100 1K_1%_04
PCI_AD30 95 AD31 AD14 2 PCI_AD15
PCI_AD29 96 AD30 AD15 1
AD29 CBE1# PCI_C/BE#1 13,19
DEVSEL#
FRAME#
GND16
ND18
GND19
TRDY#
RA
#
ND17
CBE2#
IRDY#
STOP#
PERR#
VCC6
CBE3
IDSEL
VCC1
ND0
AD28
AD26
AD25
AD23
AD22
AD21
VDD1
AD20
AD19
AD18
AD17
VCC2
7
AD24
1394_I2CEN R96 *4.7K_04

PAR
AD2
AD1
VCC_1
394
G
G
100
101
103
104
105
107
108
109
110
112
113
114
115
117
118
119
120
122
123
124
126
127
128
EEPROM RA
02
16
21
5
98
99
10
11
12
97
VT6
311S
4-Wire X
PCI_PAR 13,19 I2C 4.7K

PCI_PERR# 13,19
394
4
4
VDD_1394
VCC_139
VCC_139
VCC_1
PCI_STOP# 13,19
PCI_AD27
PCI_AD24
AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD16
PCI _AD28
6
AD25
PCI _AD17
PCI_DEVSEL# 13,19
PCI_AD2
PCI_AD2
Z1808
PCI_TRDY# 13,19 Note:

PCI _
Close to VT6311S
PCI _
PCI_IRDY# 1
3,19
PCI_FRAME# 13, 1
9
PCI_C/BE#2 13
, 19 VCC_1394
U7
1
3, 1
9 PCI_C/BE#3
8 1 1394-EECS
7 VCC CS 2 1394-EECK
NC SK
R163 C191 6 3 1394-EEDI
ORG DI
5 4 1394-EEDO
1394_TPA0+, 1394_TPA0- & 1394_TPB0+, 1394_TPB0- 0.1u_10V_X7R_04 GND DO
100_04
Layout Note: CAT93C46
S-2649
0T
PCI_AD25
1. VT6311S to Connector max length is 5" 6-04 -00S10-A92

2. Differentia l pair impedance is 110 ohms +- 6 ohms
3. Differentia l pair trace layout from VT6311S to 1394
connector m ust be parallel
4. Trace Layou t 18/4/6/4/18
1394_TPA0+ Equal length
1394_TPA0- +- 50 mils
1394_TPB0+ 2,11
,13. .15
,17, 2
3,24,26..29 3. 3
V
Equal length
1394_TPB0-
2,5,8.. 1
7,19..26,31 3. 3
VS
IEEE 1394 VT6311S B - 19

Schematic Diagrams
ENE MR510, 7 IN 1
xD_BSY# MFUNC7
xDWP#
SUSB# 14,17,22,27
MS_D1 MFUNC6
3.3VS MS_D0 MFUNC5
MS_D2 MFUNC4
R172 47K_04 MS_
I NS# MS_D3 PCI RST#
MSCLK R192 *0_04
SERIRQ 14,17,22
R233 47K_04 SD_CD# MFUNC2 R188 *0_04
PCI _
I NT#B 13
R228 47K_04 SD_WP SD_WP 3.3VS
SD_CD# MFUNC1 VCC_CARD
R184 47K_04 MFUNC2 XMDAT4B SD_CLK MS_CLK
VCC_CARD
R198 47K_04 MFUNC5 xDSMCE#
3. 3
VS
Z1901
R199 47K_04 MFUNC6
R205 47K_04 MFUNC7 C571 C570 C569
*10p_50V_04 *10p_5
0V_0
4 0.1u_16V_04
R173 47K_04 SM_CD#

127
126
125
124
122
121
120
119
118
116
115
114
113
111
110
109
108
106
105
104
103
102
100
28
123
17
112
107
01
99
98
97
R181 47K_04 XMDAT4B
1
1
R182 47K_04 xDSMCE# U13
R202 47K_04 xD_BSY#
GND_SD
VSS
XMSDAT0BSMDAT2B
XMSDAT1BSMDAT6B
XMFUNC3B
XMFUNC2B
XMDAT4B
VSS
XPMPWR_ENIZ
XSDWPISMWPDI Z
XSUSPENDIZ
RSTIZ
XMDAT7BSMCEOZ
O
NC
XPMPWR_VCC
NC
NC
VCC
VCC_SD
VCC
XMSDAT3BSMDAT3B
BSMDAT5B
XMFUNC7B
B
XMFUNC5B
XMFUNC4B
XMFUNC1B
XSDCDIZ
XMSCLKOSMREOZ
Z
XMDAT6BSMBSYIZ
XPMPWR_
XMDAT5BSMWPO
XMFUNC6
R213 47K_04 xDWP# Near Ca rdreader CONN
XG
VCC_
CARD XMSDAT2
R243 47K_04 SD_D0

R244 47K_04 SD_D1 96 MS_BS
MSBSOSMDAT1
R236 47K_04 SD_D2 CARD_PWREN# 1 95 CARD_PWREN# R170 0_04
XSDPWR33OZ MS_SM PWROZ PCI_INT#
A 13
R237 47K_04 SD_D3 2 94 ENEINT R171 *0_0
4 PCI_INT#
B 13
R238 47K_04 SD_CMD 3 NC MFUNC0 93
GND_SD RIOUTZ_PMEOZ 92 PME# 13,18,22
SD_D2 4
SDDAT2SMCLE VSS
R218 47K_04 MS_
D0 SD_D3 5 91 PCI_AD0
SDDAT3SMDAT4 PCIAD0
R215 47K_04 MS_
D1 SD_CM D 6 90 MS_INS#
SDCMDSMALE MSINSI Z
R219 47K_04 MS_
D2 SDCLK 7 89 SM_CD#
Sheet 19 of 38 R225
R164
47K_04
47K_04
M
M
S_
D3
S_BS
VCC_CARD
SD_D0
SD_D1
8
9
10
SDCLKSMWEOZ
SDDAT0SMDAT7
SDDAT1SMDAT0
VCC_SD
SMCDI Z 88
PCIAD1 87
PCIAD2 86
PCIAD3
PCI_AD1
PCI_AD2
PCI_AD3
ENE MR510, 7 IN 1
R185 47K_04 MFUNC1 11 85 PCI_AD4
NC PCIAD4
R193 47K_04 MFUNC4 12 84 PCI_AD5
13 NC PCIAD5 83 PCI_AD6 MS_INS#
14
15
16
NC
NC
NC
ENE MR510 PCIAD6 82
PCIAD7 81
VCC
80
PCI_AD7
3. 3
VS
SD_CD#
C315 C263
13 PCI_REQ#0 PCIREQOZ VSS
17 79
13 PCI_GNT#0 PCIGNTIZ NC
PCI_AD31 18 78 *0. 1u_16V_04 *0.1u_16V_04
PCI_AD30 19 PCIAD31 NC 77
PCI_AD29 20 PCIAD30 NC 76
PCIAD29 NC
21 75
VSS NC
PCI_AD28 22 74
PCIAD28 PCICBE0Z PCI_C/BE#0 13,18
PCI_AD27 23 73 PCI_AD8
PCI_AD26 24 PCIAD27 PCIAD8 72 PCI_AD9
PCI_AD25 25 PCIAD26 PCIAD9 71 PCI_AD10
PCIAD25 PCIAD10
PCI_AD24 26 70 PCI_AD11
Card Reader Power 27
PCIAD24 PCIAD11
69
13,18 PCI_C/BE#3 PCICBE3Z VCC 3. 3
VS
PCM_IDSEL 28 68 PCI_AD12
29 PCIIDSELI PCIAD12 67 PCI_AD13
3.3VS VCC PCIAD13 66
30 PCI_AD14
PCIDEVSELZ
PCISERROZ
NC PCIAD14 65
PCI FRAMEZ
31 PCI_AD15 J_CARD-REV1
PCITRDYZ
PCISTOPZ
PCIPERRZ
PCI CBE1Z
NC PCIAD15
PCICBE2Z
PCIIRDYZ
PCIRSTIZ
32 SD_
CD# P1
PCI AD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD18
PCIAD17
PCIAD16
NC CD_SD
PCICLKI
SDCLKI
PCIPAR
SD_
D2 P2
SD_
D3 P3 DAT2_SD
VCC
VCC
VSS
VSS
CD/DAT3_SD
NC
NC
NC
NC
NC
NC
SD_
CMD P4
NC
P5 CMD_SD
VSS_SD
P6
33
34
35
36
37
38
39
40
41
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
59
60
61
62
63
64
VCC_CARD VDD_SD
2
8
4
MR510 SD_
CLK P7
CLK_SD
P8
SD_
D0 P9 VSS_SD
SD_
D1 P10 DAT0_SD
DAT1_SD
SD_
WP P11
WP_SD
P12
VSS_MS
VCC_CARD P13
MS_
CLK P14 VCC_MS
3.3VS SCLK_M S
MS_
D3 P15
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
DAT3_MS
MS_
I NS# P16
INS_M S
PCI_AD20 R2
40 *100_1%_04 PCM_IDSEL MS_
D2 P17
PCI_C/ BE#1 13,18 DAT2_MS
MS_
D0 P18
PCI_AD23 R2
41 100_04 PCI_PAR 13,18 MS_
D1 P19 SDIO/ DAT
0_MS
PCI_SERR# 13 DAT1_MS
MS_
BS P20 P22
PCI_PERR# 13,18 BS_MS GND
MS_CL
K R226 0_04 MSCLK P21 P23
PCI_STOP# 13,18 VSS_MS GND
PCI_DEVSEL # 13, 18
SD_CL
K R242 0_04 SDCLK PCIRST# MDR019
- C0-0010
13 PCI_RST# PCI_TRDY# 13,18
16 PCLK_CARD PCI_IRDY# 13,18 6-21-G4010-123
PCI_AD[31:0]
13,18 PCI_AD[31:0] 16 CLK_48M_CARD PCI_FRAME# 13,18
PCI_C/ BE#2 13,18
VCC_CARD
CLOSE TO CHIP
Card Reader Power
6-15-0 3409-7E0 C326 C301
30 m il Q8 30 mil 0.1u_
16V_
04 0.1u_16V_04
S D
3.3VS VCC_CARD
G
R169 AO34
09 C256 R17
4
R414
100K_04 0.1u_16V_04 *100K_04
470_06
3.3VS 3.3VS 2,5,8.. 1
8,20.. 2
6, 3
1
CARD_PWREN#
CLOSE TO CHIP
D
C311 C264 C308 C3

05 C324 C265 C282 C294 Q22
G
2N7002W
0.1u_16V_04 0
.1u_16V_04 0.1u_16V_04 0.1u_16
V_04 0.1u
_16V_04 0.1u_16V_04 0.1u_16V_04 1
0u_10V_08
S
B - 20 ENE MR510, 7 IN 1

Schematic Diagrams
AUDIO CODEC ALC883
L 35
3 .3 VS H C B 1 6 0 8 K F -1 2 1 T2 5 3 .3 VS _ A UD 5 V S_ AUD 5V S
6-19-31001-164-1
L34 H C B 1 6 0 8 K F -1 2 1 T 2 5
C5 5 2
C5 6 6 C5 7 4 C5 7 2 C5 6 5 C2 7 2 C2 6 6 C 25 5 C5 6 0
1 u _6 . 3 V _ 0 4
0 . 1 u _1 6 V _ 0 4 10 u _ 1 0 V _ 0 8 0. 1u _ 1 6 V _ 0 4 0. 1u _ 1 6 V _ 0 4 0 . 1 u _1 6 V _ 0 4 0 . 1 u_ 1 6 V _ 0 4 1 0 u _1 0 V _ 0 8 10 u _ 1 0 V _ 0 8
JSPDIF
3
A U DG
38
1
25
4
7
1
9
U 12
0529 5
D VS S1
D VSS2
D VD D1
D VDD 2
A V D D1
A V D D2
2
21 E A P D _ MO D E G P IO 0
Z2001 3 27 Z2 01 2 C2 7 9 1 0 u _ 1 0 V _ 08
C2 9 8 2 2 p _ 50 V _ 0 4 G P IO 1 VRE F
Layout Note: 2
R2 1 1 3 3 _0 4 A Z _ S D O U T _R 5 28 M I C 1 -V R E F O -L A U DG Very close to Audio Codec TOP VIEW
1 2 , 2 3 A Z _S D O U T R2 0 1 3 3 _0 4 A Z _ B I T C L K _R 6 S D A T A - OU T MI C 1 -V R E F O -L 32 M I C 1 -V R E F O -R
1 2 , 2 3 A Z _B I T C L K B I T- C L K M I C 1 -V R E F O-R
R1 9 5 2 2 _0 4 A Z _ SDI N0 _ R 8
12 A Z _ S D IN0 S D AT A- IN
R1 8 7 3 3 _0 4 A Z_ SYN C _ R 10 29 Z2 01 3
1 2, 2 3 A Z_ SYN C
R1 8 3 3 3 _0 4 A Z _ RS T # _ R 11
SY N C DIGITAL L I N E 1 -V R E F O -L
37 Z2 01 4
1 2, 2 3 AZ_ R ST # R E S E T# LI N E 1 -V R E F O-R JHP,JMIC
Z2002 47 30 M I C 2 -V R E F O
S P DIF I/E A P D MI C 2 -V R E F O
31 Z2 01 5 5
S P DIF O 48 L I N E 2 -V R E F O
4
S P DIF O 35
1
F R ON T -O U T -L F R O N T -L 21
3
BEE P R3 9 2 1 0 K_ 0 4 Z 2 0 03 Z2004 12 36
PC BE EP F R O N T -O U T -R F R O N T -R 21
2
R3 9 3 1 K_ 1 % _ 0 4 C 2 7 3 1 u _ 6 .3 V_ 0 4 39 6
S U R R -O U T -L L _ H P _ OU T _ A 2 1
41
S U R R -O U T -R R _ H P _ OU T _A 2 1
AU D G C 5 68 1 00 p _ 5 0 V _ 0 4 J D _S E N S E 13 SOLDER SIDE VIEW
Z2005 34 S e n s e A (J D 1 ) 43 Z2 01 6
M IC_ S E NS E R1 6 8 2 0 K _ 1 % _ 04 S e n s e B (J D 2 ) C E N -OU T 44 Z2 01 7
H P_ SEN SE R1 6 7 3 9 . 2 K _ 1 % _ 04
Z2006 14
Z2007 15 L I N E 2 -L
L I N E 2 -R ANALOG
L F E -OU T
S I D E S U R R -O U T -L
S I D E S U R R -O U T -R
45
46
Z2 01 8
Z2 01 9
Sheet 20 of 38
C 2 62 1 u _6 . 3 V _0 4 Z2008 16
I N T _ MI C C 2 61 1 u _6 . 3 V _0 4
C_ C D_ L
Z2009 17
18
M I C 2- L
M I C 2- R D CV O L
33
40
Z2 02 0
Z2 02 1
R2 2 4
R2 2 7
1 0K _0 4
2 0K _1 % _ 0 4
5 VS_ AU D
3
5
J S PD IF 1 AUDIO CODEC
C_ C D_ G C D- L J D RE F
C_ C D_ R
19
20 C D - GN D
C D- R L I N E 1 -L
LI N E 1 -R
23
24
Z2 02 2
Z2 02 3
C5 6 2
C5 6 3
1 u _ 6 .3 V _ 0 4
1 u _ 6 .3 V _ 0 4 S PDI F O
C 316 R2 3 4
Z 2 02 5
4
2 ALC883
AVS S1
AVSS2
M I C 1 -L C 260 4 . 7 u _6 . 3 V _0 6 Z2010 21 1
M I C 1 -R C 259 4 . 7 u _6 . 3 V _0 6 Z2011 22 M I C 1- L 0 . 0 1 u_ 1 6 V _ 0 4 1 0 0_ 1 % _ 0 4 2 S J -S 8 7 0 -0 10
M I C 1- R A U DG R2 3 5 C 317 6-20-B4I00-005
A LC 8 8 3
42
6-03-00883-0P0 *2 2 0 _ 0 4 6 8 0 p _ 5 0V _0 4
26
SP DIF OU T
BLACK
Layout Note:
AU D G Codec pin 1 ~ pin 11 and pin 47 and pin 48 M IC _ S EN S E J _M I C 1
5
are Digital signals. 4
The others are Analog signals. M I C 1 -R L 10 F C M 16 0 8 K -1 2 1 T 0 6 3
Z2 02 6 6
M I C 1 -L L8 F C M 16 0 8 K -1 2 1 T 0 6 2
1
2 S J -S 3 5 1 -0 18
C 321 C 319 6-20-B2800-006
6 8 0 p _ 5 0V _ 04 6 8 0 p _ 5 0V _0 4
MI C I N
PI NK
M I C 1 -V R E F O-L M I C 1- V R E F O- R
R 200 R2 0 9 H P_ SEN SE
J _H P 1
2 .2 K_ 0 4 2 . 2 K _ 04 5
21 HP _ P L U G
4
M I C 1 -L M I C 1 -R R 419 1 00 _ 1 % _ 0 4 L9 F C M1 6 0 8 K -1 2 1T 0 6 3
2 1 H E A D P H O N E -R
6
C 297 C3 0 4 R 420 1 00 _ 1 % _ 0 4 L11 F C M1 6 0 8 K -1 2 1T 0 6 2
2 1 H E A D P H O N E -L
1
6 8 0 p _ 5 0V _0 4 6 80 p _ 5 0 V _ 0 4 2 S J -S 3 5 1 -0 17
C3 1 3 C3 1 2 C 318 R 230 R2 3 1 6-20-B2820-006
A UD G A U DG 68 0 p _ 5 0 V _ 04 68 0 p _ 5 0V _ 04 0 .1 u _ 1 6 V _ 0 4 1 K_ 1 % _ 0 4 1K _ 1% _ 0 4
H EAD PHONE
GREEN
MI C 2 -V R E F O J_INTMIC1
PC BEEP R 74
2 1
C5 5 5 2 .2 K_ 0 4
1 u _ 6 . 3V _ 04 J _I N T M I C 1
BEE P INT _ M IC
22 KBC _ BEE P 1
2
C 165
8 82 6 6 -0 2 0 0 1
C5 6 1 6 8 0 p _ 5 0V _0 4 6-20-63120-102
1 u _ 6 . 3V _ 04
P C B F o o t p ri n t = 8 82 6 6 -2 L
14 IC H_ S P K R
3 .3 V S 2 , 5 , 8 . . 1 9 , 2 1 . . 2 6, 31
5V 1 1 , 1 5 , 2 3, 2 4 , 2 6 . . 2 9 , 3 1
5 VS 1 1 , 1 2 , 1 4, 1 5 , 2 1 , 2 3 . . 2 5
AUDIO CODEC ALC883 B - 21

Schematic Diagrams
AUDIO AMP2056A
3.3VS 5
VS 5VS_
AMP
C546 0.1u_10V_X7R_04
40 m ils
5VS 5
VS_AMP
6-06 -00355-061 HCB201

2KF-500T40
R372 C548 R382 L4 1 2
C A C556 C554 C575
14 SB_MUTE# 0. 1
u_10V_X7R_04
D27 SCS355V 5 C549 C567 C573 C275 C281 C278
10K_04 U22 1u_6.3V_04 0.1u_16V_04 0.1u_16V_04
C A OPMUTEAPM# 1 100K_
04 0.1u_10
V_X7R_04 10u_10V_08 10u_10V_08 0.1u_16V_04 0.1u_16V_04 0.1u_16V_04
20 EAPD_MODE
D26 *SCS355V 4 MUTEAPM#
2
22 KBC_MUTE#
74AHC1G08GW
C559 0.1u_16V_04 Z2119
3
AUDG AUDG
6-01-74108-V 60
28
26
20
10
1
AUDG U11
R210 8.2K_04 Z2101 C292 1u_6.3V_04 Z2
105 3
PVDD
PVDD
BEEP
SD#
VDD
20 FRONT
-R R_IN_AMP
22 R_
OUT+_C L
33 2 1 FCM160
8K-121T
06 SPKOUTR+
R_OUT+
R212 8.2K_04 Z2102 C293 1u_6.3V_04 Z2
106 5
20 FRONT
-L L_IN_AMP 21 R_
OUT-_C L
32 2 1 FCM160
8K-121T
06 SPKOUTR-
R221 0_
04 Z2103 C299 4.7u_6.3V_06 Z2
107 R196 39K_04 Z2109 4 R_OUT-
20 R_HP_OUT_A R_IN_HP 8 L_OUT+_C L
6 2 1 FCM160
8K-121T
06 SPKOUTL+
L_OUT+
R220 0_
04 Z2104 C300 4.7u_6.3V_06 Z2
108 R197 39K_04 Z2110 6
20 L_HP_OUT_
A L_IN_HP
9 L_OUT-_C L
7 2 1 FCM160
8K-121T
06 SPKOUTL-
L_OUT-
*10K_04
0K_04
*10K_04
*10K_04
R378 R38
3
Z2111 Z2112 27 AP A2 05 6A
*1
5
VS AMP_EN# 17 R_
HP_OUT_C L
30 2 1 FCM160
8K-121T
06
R_HP_OUT HEADPHONE-R 20
100K_04 10K_04 24
HP_EN
18 L_HP_OUT_C L
31 2 1 FCM160
8K-121T
06
L_HP_OUT HEADPHONE-L 20
C near CP+ and CP-
Z2113 12
Sheet 21 of 38 R379 R374 C288

CP+
11 Z2116 R208 0_
06 5VS_AMP
R217
R397
R396
CPVDD
R398
10
0K_04 100
K_04 06 Z2114
1u_6.3V_ 14 19 C306 C309
CP- HPVDD
AUDIO AMP2056A
D
BYPASS
CPGND
15 1u
_6.3V_04 0.1u_1
6V_04
ND
Z2115 CPVSS PGND

GND
16
GND
PG
HPVSS
G
C564
Q18
S
29
13
23
AUDG 2N7002W 1u_

6. 3
V_04 AUDG Z21
17 R391 0_04
2
3.3VS
D
APA2056A
6-02 -02056-AL0 C553
20 HP_PLUG G
0
. 1u
_16V_
04
Q20
S
2N7002W Z2118
6-15-2700 2-7B5
AUDG
AUDG C557 C558
1u_6.3V_04 0.1u_16V_04
AUDG
5VS
S PEAKER CONNECT OR
J_SPK1
SPKOUT
R+ L17 FCM1608K-121T06 SPKOUTR+_R 1
1
C59
8 SPKOUT
R- L16 SPKOUTR-_R 2
2
SPKOUT
L- L15 FCM1608K-121T06 SPKOUTL-_L 3
0.1u_10V_X7R_04 L3 SPKOUT
L+ L14 SPKOUTL+_L 4 3
5
U2
6 1 2 FCM1608K-121T06 4
HP_PLUG 1 HCB2012
KF-500T40
4 Z2111 Z2112 C17 C16 C13 C12 8
7212-04G0
MUTEAPM# 2 C285 0.1u_16V_04
*74AHC1G08GW 18
0p_50V_04 180p_50V_04 180p_50V_04 180p_50V_04
C5
99 C314 0.1u_16V_04
6-20-41A00-104
3
C310 0.1u_16V_04
*1u_6.3V_04
C286 0.1u_16V_04
AUDG
2, 5,8..20,22..26,31 3.3VS
11,15,23,24,26..29,31 5V
11,12,14,15,20,23..25 5VS
B - 22 AUDIO AMP2056A

Schematic Diagrams
KBC-ITE IT8512E
L1 K B -S I 3 1 8
KBC _ AVD D H C B 1 6 0 8K F -1 2 1 T 25 K B -S O3 2 7 CP 3
6-19-31001-164-1 K B -S I 2 3 6 *1 5 0 p _ 8P 4 C _ 0 4 R 364 1 0K _ 04 W D T_ E N
VD D 3 V D D3
K B -S I 1 4 5
V D D3
C5 2 7 C 19 6 C 1 84 C 550
C 1 98 C 192 C 187 K B -S O6 1 8 R 363 V D D3
1 0 u_ 1 0 V _ 0 8 0 . 1 u _ 16 V _ 0 4 0 . 1 u _ 16 V _0 4 0 . 1 u _ 1 6V _ 04 K B -S I 6 2 7 CP 4 R 355 1 0K _ 04
0 . 1 u _ 1 6V _ 04 0 .1 u _ 1 6 V_ 0 4 0 .1 u _ 1 6 V _ 0 4 K B -S I 7 3 6 *1 5 0 p _ 8P 4 C _ 0 4 1 0 0 K_ 0 4
K B -S O7 4 5
C 21 5 R 357 W D _ DIS A B L E R3 6 0
K B -S O0 1 8
0 . 1 u _ 10 V _ X 7 R _ 04 K B C _ A G ND K B -S O1 2 7 CP 5 1 0 K_ 0 4 U 21 G 10 0 K _ 0 4
3 .3 V S K B -S O2 3 6 *1 5 0 p _ 8P 4 C _ 0 4 Z2201 3
K B -S I 0 4 5 M R# 1 Z220 2S D KBC _ W R ESET#
1 J_KB1 24 5 R ESET#
V DD 3 VC C
114
121
127
K B -S O4 1 8 4 Q1 7 C5 4 0
26
50
74
WD I
11
92
U8 J _ KB1 K B -S O5 2 7 CP 6 C 529 2 2 N7 0 0 2 W
3
K B -S I 4 3 6 *1 5 0 p _ 8P 4 C _ 0 4 G ND 1u _ 6 . 3 V _ 0 4
6-15-27002-7B5
V STBY
VS TBY
VST BY
VST B Y
V STBY
VS TBY
VB AT
VC C
AVC C
10 58 KB -S I 0 4 K B -S I 5 4 5 0 . 1 u _ 1 6V _ 04 A A T 3 51 0 I G V -2 . 9 3 -C -C -T 1
1 2 , 17 L PC _ AD 0 L A D0 K S I0 /S T B #
9 59 KB -S I 1 5 6-03-35102-0D0 3 IN1
1 2 , 17 L PC _ AD 1 8 L A D1 K S I 1/ A F D # 60 KB -S I 2 6 K B -S O8 1 8
1 2 , 17 L PC _ AD 2 L A D2 K S I2 /IN IT #
7 61 KB -S I 3 8 K B -S O9 2 7 CP 7
1 2 , 17 L PC _ AD 3 L A D3 K S I3 /S L IN #
P CL K _ K B C 13 62 KB -S I 4 11 K B -S O1 0 3 6 *1 5 0 p _ 8P 4 C _ 0 4
16 PC L K_ KBC L P CC L K KSI 4 J1
12 , 1 7 L P C _ F R A M E # 6 63 KB -S I 5 12 K B -S O1 1 4 5
5 L F RA M E # KSI 5 64 KB -S I 6 14 W D _D I S A B L E 1 2
1 4 ,1 7 ,1 9 S E R IR Q S E R IRQ
LPC K/B MATRIX KSI 6
22 65 KB -S I 7 15 K B -S O1 2 1 8
1 3 ,1 7 ,2 3 B U F _ P L T _ RS T # L P CR S T # /W U I4 /G P D2 ( P U ) KSI 7
K B -S O1 3 2 7 CP 8
K B C _W R E S E T # 14 36 KB -S O 0 1 K B -S O1 4 3 6 *1 5 0 p _ 8P 4 C _ 0 4 2 0 m il
W RS T # K S O 0 /P D 0 37 KB -S O 1 2 K B -S O1 5 4 5
K S O 1 /P D 1
H 8 _ GA 2 0 126 38 KB -S O 2 3
G A 2 0 /G P B 5 K S O 2 /P D 2
4 39 KB -S O 3 7
24 L E D _ A C IN# 16 K B R S T # / GP B 6 ( P U ) K S O 3 /P D 3 40 KB -S O 4 9
30 A C _ IN# P W U R E Q# / G P C 7( P U ) K S O 4 /P D 4
20 41 KB -S O 5 10 VER. MODEL_ID VOLTAGE
2 T H E R M _A L E R T # L 8 0 L L A T /G P E 7 ( P U ) K S O 5 /P D 5
42 KB -S O 6 13
K S O 6 /P D 6
1 1 E N TE R K E Y # 23 43 KB -S O 7 16 V1.0 HIGH 3.3V TN120R
Sheet 22 of 38
15 E CS CI# /G P D 3 ( P U ) K S O 7 /P D 7 44 KB -S O 8 17 VD D 3 VD D 3
1 1 P O P ME N U # E C S MI # / G P D 4 ( P U ) K S O 8/ A C K # 45 KB -S O 9 18 D 36 * S C S 7 51 V -4 0
K S O 9 /B U S Y
DAC 46 KB -S O 10 19 C A R6 1 0 K_ 0 4
CP U _ F A N _ R 76 K S O1 0 / P E 51 KB -S O 11 20 R7 4 .7 K _ 0 4 M OD E L _ I D R3 4 9 1 0 K_ 0 4
KBC-ITE IT8512E
D AC 0 /G PJ 0 K S O1 1 / E R R # V D D3
S Y S _F A N _R 77 52 KB -S O 12 21 R8 4 .7 K _ 0 4
D AC 1 /G PJ 1 K S O 1 2 /S L C T
78 53 KB -S O 13 22 R3 5 2 * 1 0K _ 04
17 W L AN _ PW R D AC 2 /G PJ 2 KSO 1 3
79 54 KB -S O 14 23 C
1 7 , 24 W L AN _ EN S R S _E N 80
81
D
D
AC
AC
3 /G
4 /G
PJ 3
PJ 4 IT8512E
KSO 1 4
KSO 1 5
55 KB -S O 15 24 S M C_ B A T
D 3
AC
A
RX
21 K B C _ MU T E # D AC 5 /G PJ 5
BA V9 9
ADC FLASH 8 5 2 02 -2 4 0 5 1 C
B A T _ DE T 66 100 6-20-94A90-124 S M D_ B A T AC VD D 3
B A T _ V O LT _ R 67 A DC 0 /G P I0 F L F R A M E # /G P G 2 101 K B C_ S P I_ CE # D 2 A
A DC 1 /G P I1 F L A D 0/ S C E #
C H G_ C U R _ R 68 102 K B C_ S P I_ S I BA V9 9 3G _ D E T # R 3 50 1 0 K_ 0 4
TO T A L _ C U R _ R 69 A DC 2 /G P I2 F L A D1 /S I 103 K B C_ S P I_ S O C CC D_ D E T # R 3 46 1 0 K_ 0 4
70 A DC 3 /G P I3 F L A D 2/ S O 104 BAT_ D ET AC
A DC 4 /G P I4 F L A D3 /G P G 6 30 BAT_ D ET
3G _ D E T # 71 105 K B C _ S P I _ S C LK D 1 A
23 3 G_ D E T # A DC 5 /G P I5 F L CL K /S CK
CC D_ D E T # 72 106 BA V9 9 C 207
23 C CD _ D E T # MO D E L_ I D 73 A DC 6 /G P I6 ( P D )F L R S T# / W U I 7/ TM / G P G 0 C CD _ E N 23 C P C L K _K B C R 11 4 * 1 0 _0 4
A DC 7 /G P I7 BAT_ VO L T AC
GPIO 30 B A T _ V O LT
SMBUS 56 D 22 A *1 0 p _ 5 0V _ 04
( P D )K S O1 6 / G P C 3 SU SB# 1 4 , 1 7 , 1 9, 2 7
30 S M C_ B A T S MC _ B A T R 422 1 00 _ 0 4 110 57 SU SC # 14 BA V9 9 R 4 15 0_ 0 8
S MD _ B A T R 423 1 00 _ 0 4 111 S MC L K 0 /G PB3 ( P D )K S O1 7 / G P C 5 C
30 S M D_ B A T S MD A T 0 /G PB4 D 35
S MC _ C P U _ T H E R M 1 1 5 93 CH G _ CU R AC
2 S M C _ C P U _ TH E R M S MC L K 1 /G P C1 ( P D )I D0 /G PH 0 P M _ CL K R U N# 1 4 ,1 7 30 C H G_ C U R
S MD _ C P U _ T H E R M 1 1 6 94 D 23 A K B C _ RS T # C A
2 S M D _ C P U _ TH E R M 117 S MD A T 1 /G P C2 ( P D )I D1 /G PH 1 95 C TX 1 H OL D _ S W # 2 3 BA V9 9 IC H_ K B C_ R S T # 1 2
2 4 S M C_ M DM S IC S MC L K 2 /G PF6 ( PU ) ( P D )I D2 /G PH 2
118 96 W DT _ E N C
2 4 S M D_ M E M S IC S MD A T 2 /G PF7 ( PU ) ( P D )I D3 /G PH 3
97 T OT A L _ C U R AC * S C S 7 5 1 V -4 0 Co-layout
( P D )I D4 /G PH 4 W L AN _ D ET# 1 7 30 T OT A L_ C U R
98 D 24 A 07/18/2007
LC D _B R I G H T N E S S 24
PWM ( P D )I D5 /G PH 5 99 BT_ D ET# 2 3 BA V9 9 B A T _ V O LT _ R
P W M 0 / GP A 0( PU ) ( P D )I D6 /G PH 6 D D_ O N 2 5 ,2 7 30 BAT_ VO L T
25 6-06-00099-011 R3 4 8 1 0 0 _ 1 % _ 04 C 53 2 1u _ 6 . 3 V _ 0 4
20 KBC _ BEE P P W M 1 / GP A 1( PU )
28 107 C H G_ C U R _ R
2 3 L E D _ S C RO L L # P W M 2 / GP A 2( PU ) ( P D )I D 7 / G P G 1 3 G _E N 2 3 ,2 4 30 C H G_ C U R
23 L E D _N U M# 29 R3 5 3 1 0 0 _ 1 % _ 04 C 53 6 *1 u _ 6 . 3 V _ 04
30 P W M 3 / GP A 3( PU ) TO T A L _ C U R TO T A L _ C U R _ R
23 L E D _ CA P # P W M 4 / GP A 4( PU )
EXT GPIO
LOW ACTIVE 31 82 R3 5 6 1 0 0 _ 1 % _ 04 C 53 8 *1 u _ 6 . 3 V _ 04
2 4 L E D _ B A T _C H G#
2 4 L E D _B A T _ F U LL #
32
P
P
W
W
M
M
5 / GP A
6 / GP A
5(
6(
PU
PU
)
)
( P D )E G A D / GP E 1
( P D )E G C S #/ GP E 2
83
S M I#
S C I#
14
14
NEAR BATTE RY CONNEC T
34 84
24 L E D_ P W R# P W M 7 / GP A 7( PU ) ( P D )E G C L K / GP E 3 P W R_ B T N # 1 4
R 36 9 10 K _0 4
V D D3
PS/2 WAKE UP D2 5
80 C L K 85 35 R1 4 2 CIR _ IN
3I N 1 86 P S 2 C L K 0/ G PF 0( PU ) ( P D )W U I 5/ GP E 5 17 K B C_ R S T # R S MR S T # 1 4 V D D3 C I R _R X 11 A C H8 _ G A 2 0
P S 2 D A T 0/ G PF 1( PU ) ( P D )L P C P D # / W U I 6/ GP E 6 12 G A2 0
80 D E T # 87 10 K _0 4
P S 2 C L K 1/ G PF 2( PU )
88 PWM/COUNTER
1 3 , 18 , 1 9 P ME # P S 2 D A T 1/ G PF 3( PU )
24 TP_ C L K 89 47 C P U_ F A NS E N 24 S C S 7 5 1V -4 0
90 P S 2 C L K 2/ G PF 4( PU ) ( P D )T A C H 0 / G P D 6 48 S Y S _ F A NS E N
24 TP_ D AT A P S 2 D A T 2/ G PF 5( PU ) ( P D )T A C H 1 / G P D 7
6-06-75140-061
WAKE UP 120
TH E R M_ R S T # 125 ( P D )T MR I 0 / W U I 2 / G P C 4 124 V C OR E _ O N 3 1 V DD 3 C 509
P W R S W /G P E 4 ( P U ) P M _ P W R O K 1 1 ,1 4 ,3 1 8Mbit KBC_SPI_*_R = 0.1"~0.5"
CIR( P D )T MR I 1 / W U I 3 / G P C 6 0 . 1 u_ 1 0 V _ X 7 R _ 0 4
18 119 C IR_ IN
25 P W R_ S W # R I 1 # / W U I 0 / G P D 0( P U ) ( P D )C R X / G P C 0
1 1 , 23 L I D _S W # 21 123 D OC K _ O N 2 3 U2 0
R I 2 # / W U I 1 / G P D 1( P U ) ( P D )C T X/ GP B 2 8 5 K B C_ S P I_ S I_ R K B C_ S P I_ S I
V DD SI R 344 47_04 C5 3 4 3 0 p _ 5 0 V _ 04
GP INTERRUPT LPC/WAKE UP
33 19 2 K B C _ S P I _ S O _R K B C_ S P I_ S O
5 L _B K _ C T R G I N T / GP D 5 ( P U ) ( P D )L 8 0 H L A T/ GP E 0 S W I# 14 SO
R 33 5 1 K_ 1 % _ 0 4 R 336 15_04 C5 1 0 3 0 p _ 5 0 V _ 04
112 KBC _ FL ASH 3 1 K B C _ S P I _ C E #_ R K B C_ S P I_ CE #
( P D )R I N G# / P W R F A I L # / L P C R S T #/ GP B 7 C HG _ E N 30 W P# C E#
UART R 337 15_04 C5 1 1 3 0 p _ 5 0 V _ 04
108 CLOCK 6 K B C _ S P I _ S C LK _ R K B C _ S P I _ S C LK
2 3 , 24 BT_ EN 109 R X D / GP B 0 ( P U ) 2 R 34 1 4 .7 K _ 0 4 SC K R 345 47_04 C5 3 5 3 0 p _ 5 0 V _ 04
AV SS
V SS
VS S
V SS
VS S
11 B KL _ EN T X D /G P B 1 ( P U ) C K3 2 KE
VSS
VSS
VSS
128 Z 22 0 3 7 4
CK 3 2 K HO L D# VS S
R 139 1 0 M_ 0 4
I T 85 1 2 E / E X SST2 5 VF0 8 0 B
113
12 2
12
49
91
75
6-03-08512-0P1 6-04-25080-A70
27
1
X4
VD D 3 2 , 1 2 , 2 4 , 2 5 , 2 7, 30
24 CP U_ F A N C P U _F A N _ R 3 2 .7 6 8 K H z J _H 8 D B G1 3 .3 V 2 , 1 1 , 1 3 . . 1 5 , 1 7 , 2 3, 24 , 2 6 . . 2 9
R1 0 5 1 2 0 K_ 1 % _ 0 4 NC 1 S H OR T 6-22-32R76-0B1 J_H8DBG1 W D T_ E N
2 1 V DD 3 3 .3 V S 2 ,5 ,8 ..2 1 ,2 3 ..2 6 ,3 1
1 2 2 1 4 3
C1 9 4 0 . 1 u _ 1 0 V _ X 7R _ 0 4 1 4
2 3 10 9 3I N 1 6 5 8 0 CL K
K B C_ A G ND C2 4 4 C 24 5 8 7 8 0 DE T #
10 9
L C D_ B R IG HT N E S S
11 B R I GH T N E S S
R1 0 1 100_04 1 5 p _ 5 0 V _ 04 1 5 p _5 0 V _ 0 4 S P U F Z -1 0 S 3 -V B -0 -B
6-21-C2A00-210
C2 0 3 * 0 . 1 u _1 0 V _ X 7 R _0 4
KBC-ITE IT8512E B - 23

Schematic Diagrams
ODD, CCD, BT, Multi I/O

MULTI I/O CONN J_ M F B 1
ODD 12 I D E _ P D D [ 1 5 : 0 ]
I D E _P D D [ 1 5 : 0 ]
6-21-C3DB0-225
J _ O DD 1
VA
2
4
6
1
3
5
VA
Z 23 0 1 Z2304 08/09/2007
Z 23 0 2 1 2 8 7 C2 0 0 .1 u _ 1 6 V _ 0 4
3 4 3. 3V 10 9
R1 8 6 3 3_ 0 4 C D _R S T # ID E _ P DD 8
1 3 ,1 8 P C IRS T # 5 6 12 11
ID E _ P D D 7 ID E _ P DD 9
ID E _ P D D 6
7 8
ID E _ P DD 10 C2 1
14 13 5V 5V NE ED 3A
9 10 2 2 HO L D_ S W # 16 15
ID E _ P D D 5 ID E _ P DD 11 0 .1 u _ 1 6 V _ 0 4 3 G_ E N
ID E _ P D D 4
ID E _ P D D 3
11
13
15
12
14
16
ID
ID
E _ P DD
E _ P DD
12
13
Port 2 13
13
13
U S B _P N 2
U S B _P P 2
U S B _O C #2
18
20
22
17
19
21
3 G_ E N 2 2, 24
U S B _ P N 0 13
US B _ P P 0 1 3
17 18 VA 1 2 ,2 0 A Z _ S DO UT 24 23
ID E _ P D D 0
19
21
23
20
22
24
IDE _ P DD R E Q 1 2
I D E _ P D I OR # 1 2
1 2, 20 A Z _ S Y N C
12 A Z _ S D IN1
1 2 ,2 0 A Z _ R S T #
26
28
30
25
27
29
Po rt 0
12 I D E _ P D I OW # 25 26 12 , 2 0 A Z _ B I T C LK 32 31 L A N _ C L K R E Q# 16
C 38 1 C3 8 2 C5 9 3 C5 9 4
1 2 I D E _ P D I OR D Y 27 28 IDE _ P DD A C K # 1 2 R4 1 6 0_ 0 4 34 33
ID E _ IRQ Z2305 3 .3 V S
12 ID E _ IR Q 29 30 ID E _ P DD IA G # 36 35 1 .5 V S
12 I DE _ PD A 1 31 32 C 59 5
0 . 1 u _2 5 V _ 0 6
0 . 1 u_ 2 5 V _ 0 6
0. 1u _ 2 5 V _ 0 6
12 I DE _ PD A 0 33 34 IDE _ P DA 2 1 2
* 22 p _ 5 0 V _ 0 4
0 . 1 u _ 25 V _ 0 6
5V S 12 ID E _ P D CS 1 # 35 36 IDE _ P DC S 3 # 1 2
12 CD _ DA S P # 37 38 5F 1- 23 3 A 1 -A 20 0 0 -2 1 8
39 40
C 23 1 *0 . 0 1 u _5 0 V _ 0 4 6-21-C4700-218
41 42
43 44
45 46 J _ MF B 2
R 376 R 121 0_04 C D _C A B S E L

47 48
Z 23 0 3 Z2306
1 0 K_ 0 4 49 50 1 6 C L K _ P C I E _ M I N I _ 3G # 2 1 3G _ D E T # 2 2
1 6 C L K _ P C IE _ M INI_ 3 G 4 3 PC IE _ W A K E # 1 4 ,1 7
C D R -5 0 D P 1
5 VS 3 .3 V S 1 .5 V S 6 5
CD _ DA S P # PIN GND1~GND2=GND
1 3 PC IE _ R XN3 _ 3 G
1 3 P C I E _ R XP 3_ 3 G
8
10
12
7
9
11
U S B _P N 8 1 3
U S B _P P 8 1 3 Port 8
1 3 P C IE _ T X N3 _ 3 G 14 13 P C I E _ W A K E # 1 4, 17
1 3 P C I E _ T X P 3 _ 3G 16 15 W L A N _C L K R E Q # 1 6, 17
Sheet 23 of 38
C 2 24 C 2 36 C 2 41 C 246 C 547 C 545 C 542 C 59 6 C5 9 7
+ 18 17 D O C K _O N 2 2
R1 4 7 *1 0 K _ 0 4 I D E _ P D D I A G #
1 3 P C I E _ T X P 4 _ GL A N 20 19
0 . 1 u _ 1 6V _0 4 0 . 1 u _ 1 6V _ 04 0 . 1 u _ 1 6V _ 04 0 . 1 u _ 1 6V _ 04 1 u _ 6 .3 V _ 0 4 1 0 u _ 1 0V _ 08 1 0 0 u _ 6. 3V _ B 2
1 3 P C I E _ T X N 4_ G L A N 22 21 CL K _ P C IE _ G L A N 1 6
R1 8 0 *5 . 6 K _ 0 4 I D E _ P D D 7
0 . 1 u _ 16 V _ 0 4
0 . 1 u _1 6 V _ 0 4
24 23 C L K _ P C I E _ G L A N # 16
ODD, CCD, BT, 1 3 P C I E _ R X P 4 _ GL A N

1 3 P C I E _R X N 4_ G L A N
26
28
30
25
27
29
LI D _ S W # 1 1 , 2 2
B U F _P L T_ R S T # 1 3 , 1 7 , 2 2
Multi I/O Port 1 13

13
13
U SB_ PN 1
U SB_ PP1
U S B _ O C# 1
32
34
36
31
33
35
L E D _ N U M# 2 2
L E D _ C A P # 22
L E D _ S C R OL L # 2 2
5 F 1 -2 3 3 A 1 -A 2 0 0 0 -2 1 8
Bluetooth CCD Q 12
N D S 3 52 A P _ N L
5V 5V _ C C D
6-15-00352-7B1
3 .3 V L26 L 12 H C B 2 01 2 K F -5 00 T 4 0 S D
48 mil
H C B 2 0 1 2 K F -5 0 0 T 4 0 3 .3 V _ B T
6-19-31001-163-1 50mil G J_CCD1
C3 2 9 C3 3 0 R 25 9 C 334 C 333
Z 2 30 7 Z 2 30 8 1
C 5 07 C 5 05 1 0u _ 1 0 V _ 0 8 1 0 0 K_ 0 4 0 .1 u _ 1 6 V_ 0 4 1 0 u _ 1 0 V _ 08
0 . 1 u _1 6 V _ 0 4
0 . 1 u _ 1 6V _ 04 1 0 u _ 10 V _0 8 R 2 58 5
J _ BT 1 1 0 0 K_ 0 4
R 257 3 3 0K _0 4 J _ CC D 1
6 J_BT1 Z 2 30 9
5 1
13 U SB_ PN 5 4 13 US B _ P N7 2
D
1 6
Port 5 13
22
U SB_ PP5
B T _ D E T#
3. 3V _B T
R 33 4 1 0 K_ 0 4 BT_ EN #
3
2
1 22 CC D_ EN
G
Q 11
2 N 70 0 2 W
13
22
US B _ P P 7
C C D _D E T #
3
4
5
8 7 2 1 2- 05 G 0
S
D
8 7 2 12 -0 6 G 0 From H8 default HI 6-20-41A00-105

G 6-20-41A10-106
2 2 ,2 4 B T _E N
Q 15
S
2 N7 0 0 2 W
6-15-27002-7B5 VA 2 5 ,3 0
1 .5 V S 3 , 8 , 1 2 , 1 3, 15 , 1 7 , 2 6 , 2 8
3 .3 V 2 , 1 1 , 1 3. . 1 5, 17 , 2 4 , 2 6 . . 2 9
3 .3 V S 2 , 5 , 8 . . 2 2 , 2 4 . . 2 6, 31
5V 1 1 , 1 5, 24 , 2 6 . . 2 9 , 3 1
5 VS 1 1 , 1 2, 14 , 1 5 , 2 0 , 2 1 , 2 4 , 2 5
B - 24 ODD, CCD, BT, Multi I/O

Schematic Diagrams
LED, FAN, CLICK, LID

SYS1 5V
Power Plane
6-15-04468-7B0
VDD5 8 PQ51 5VS
PR189 7 3
6 2
1 M_04 5 1
0. 1u_10 V_X7R_ 04
0.1 u_10V_X7R_0 4
0. 1u_10 V_X7R_ 04
4 5VS
10 u_10V_0 8
0 .01u _50V_04
0.0 1u_50 V_0 4
0. 01u_50 V_ 04
0. 01u_5 0V_ 04
100u _6.3V_B2
SYS3V VDD5 SYS15V AO446 8
0.01 u_50V_04
PC243
PR1 17
EN_5VS PC22 3 PC215
1
PJ 8 PR120 PR1 91 100K_04 0.1u_ 10V_X7R_ 04 0. 1u_10 V_X7R_04

220 0p_50 V_0 4
D
PC2 38
*10K_04 100K_04 PQ20 +
PR116
PC22 0
PC233
PC224
PC2 28
PC 216
PC227
PC214
PC2 40
PC234
PC229
DIS_5VS_3VS
2
20mil G 1000 p_50V_04

2N 7002W
47K_04
S
D
PC1 05
PQ19
G SYS15 V *0. 1u_1 0V_ X7R_04 Power Plane
27 ..29 SUSBL 2N7 002W 8 PQ49
7 3 3.3 VS
S
6-15-27002-7B5 VDD3 6 2
PR190 5 1
4
10 0K_ 04 AO446 8
PR121
PR1 18
0.1 u_10V_X7R_0 4
0.1 u_10V_X7R_0 4
0. 1u_10 V_X7R_ 04
0 .1u_1 0V_ X7R _04

10 0K_ 04 EN_3. 3VS
2 200p_ 50V_04
0. 01u_ 50V_04
0 .01u _50V_04
0. 01u_5 0V_ 04
0.01 u_50V_04
0.01 u_50V_04
0.01 u_50V_04
100K_04
Sheet 24 of 38
10 u_10V_08
LED, FAN, CLICK,

D
PR122 PQ 21
LID
PC21 9
PC2 31
PC225
PC241
PC217
PC239
PC2 35
PC2 36
PC226
PC218
PC232
G
PC24 4
2N700 2W
0_04
S
PC1 06
0 .1u_ 10V_X7R_0 4
VA VIN1
PD13 SCS751 V- 40
6-06-75140-061 VI N
PQ32 A C
C A 2SB1198KR/T146
6-15-21198-2B1 PD14 SCS355V
E C A C
PR163 10K_04
VDD3
PD16 SCS355V
6-06-00355-061
PR1 56
B
PWR_SW# 100K_04
22 PWR_ SW# PR15 9 1 0K_ 04 DDON#
PQ36
To KBC 2 N7002W
D
PQ34
S
2N 7002W
PR17 2 PQ35
MM_BTN G 2N7 002W G DD_ ON
PQ 37 DD_ON 22, 27
POWER SW E C M_BTN 10 0K_ 04
S
VIN From KBC

PC161 PC1 60
DTA114 EUA PR17 0
0 .1u_1 6V_ 04 6-15-0A114-2B0 0.1u _16V_04
1 00K_04
B
POWER SWITCH
3 1 M_ BTN # PR171 10K_04 MBTN#

2
PC24 2
GND2
GND1
0.1u_ 16V_04
SW8
SS3 N-CMSCF- V- T/R
11,27 SYS15V
6-53-20508-030 1 1,27 ,28 VDD5
2,12, 22,2 4,27 ,30 VDD3
23 ,30 VA
11 ,26. .31 VIN
2,5, 8..2 4,26 ,31 3.3 VS
11, 12,1 4,15, 20,2 1,23 ,24 5VS
2 7 VIN1
LED, FAN, CLICK, LID B - 25

Schematic Diagrams
3VS, 5VS, POWER S/W
SYS1 5V
Power Plane
6-15-04468-7B0
VDD5 8 PQ51 5VS
PR189 7 3
6 2
1 M_04 5 1
0. 1u_10 V_X7R_ 04
0.1 u_10V_X7R_0 4
0. 1u_10 V_X7R_ 04
4 5VS
10 u_10V_0 8
0 .01u _50V_04
0.0 1u_50 V_0 4
0. 01u_50 V_ 04
0. 01u_5 0V_ 04
100u _6.3V_B2
SYS3V VDD5 SYS15V AO446 8
0.01 u_50V_04
PC243 PR1 17
EN_5VS PC22 3 PC215
1
PJ 8 PR120 PR1 91 100K_04 0.1u_ 10V_X7R_ 04 0. 1u_10 V_X7R_04

220 0p_50 V_0 4
D
PC2 38
*10K_04 100K_04 PQ20 +
PR116
PC22 0
PC233
PC224
PC2 28
PC 216
PC227
PC214
PC2 40
PC234
PC229
DIS_5VS_3VS
2
20mil G 1000 p_50V_04

2N 7002W
47K_04
S
D
PC1 05
PQ19
G SYS15 V *0. 1u_1 0V_ X7R_04 Power Plane
27 ..29 SUSBL 2N7 002W 8 PQ49
6-15-27002-7B5 7 3 3.3 VS
S
VDD3
6 2
PR190 5 1
4
10 0K_ 04 AO446 8
PR121
PR1 18
0.1 u_10V_X7R_0 4
0.1 u_10V_X7R_0 4
0. 1u_10 V_X7R_ 04
0 .1u_1 0V_ X7R _04

10 0K_ 04 EN_3. 3VS
2 200p_ 50V_04
0. 01u_ 50V_04
0 .01u _50V_04
0. 01u_5 0V_ 04
Sheet 25 of 38 0.01 u_50V_04
0.01 u_50V_04
0.01 u_50V_04
100K_04
10 u_10V_08
3VS, 5VS, POWER
D
S/W PR122 PQ 21
PC21 9
PC2 31
PC225
PC241
PC217
PC239
PC2 35
PC2 36
PC226
PC218
PC232
G
PC24 4
2N700 2W
0_04
S
PC1 06
0 .1u_ 10V_X7R_0 4
VA VIN1
PD13 SCS751 V- 40
6-06-75140-061 VI N
PQ32 A C
C A 2SB1198KR/T146
6-15-21198-2B1 PD14 SCS355V
E C A C
PR163 10K_04
VDD3 PD16 SCS355V
6-06-00355-061
PR1 56
B
22 PWR_ SW# PWR_SW# 100K_04

PR15 9 1 0K_ 04 DDON#
PQ36
To KBC 2 N7002W
D
PQ34
S
2N 7002W
PR17 2 PQ35
PQ 37 MM_BTN G 2N7 002W G DD_ ON DD_ON 22, 27
POWER SW E C M_BTN 10 0K_ 04
S
VIN From KBC

PC161 PC1 60
DTA114 EUA PR17 0
0 .1u_1 6V_ 04 6-15-0A114-2B0 0.1u _16V_04
1 00K_04
B
POWER SWITCH
3 1 M_ BTN # PR171 10K_04 MBTN#

2
PC24 2
GND2
GND1
0.1u_ 16V_04
SW8
SS3 N-CMSCF- V- T/R
11,27 SYS15V
6-53-20508-030 1 1,27 ,28 VDD5
2,12, 22,2 4,27 ,30 VDD3
23 ,30 VA
11 ,26. .31 VIN
2,5, 8..2 4,26 ,31 3.3 VS
11, 12,1 4,15, 20,2 1,23 ,24 5VS
2 7 VIN1
B - 26 3VS, 5VS, POWER S/W

Schematic Diagrams
POWER GPU/1.25VS
5V VI N
P C1 9 7 PC2 0 0 P C 1 96
A
PD 4 P C2 0 5 PC2 0 6 P C1 9 9
P C6 7 P C4 5 F M 0 5 40 -N
5
6
7
6-06-00540-021 8 0 . 0 1 u _ 50 V _ 0 4 0 . 01 u _ 5 0 V _ 04 0 . 0 1 u_ 5 0 V _ 0 4
1 0u _ 2 5 V _ 1 2 1 0 u _2 5 V _ 1 2 0. 1 u _ 2 5 V _ 06
* 1u _ 6 . 3 V _ 0 4 1 u _ 6. 3V _0 4
4
C
PR7 2 P Q 45
1
2
3
I R F 7 41 3 Z P B F
6-15-07413-7B0 PR 1 9 3 PC 2 4 5
0_04 * 1 0_ 0 6 * 1 00 0 p _ 5 0V _0 6 G PU V GF X _ C OR E
P R7 1 P C6 5 PL 9 PJ 1 7
2 1
8A 1 2
0 . 1 u _ 1 0V _ X 7 R _ 0 4
0_04 1 u _ 6 . 3V _ 04 1 u H _ 7 * 7* 3 . 5
6-15-07832-7B0
OP E N _ 8 A
P Q 4 6 I R F 7 8 32 Z T R P B F
FM 5822
6-19-41001-231
0 . 0 1 u _5 0 V _ 0 4
0 . 0 1u _ 5 0 V _ 0 4
6-06-05822-061
2 2 0 u_ 4 V _ D
2 20 u _ 4 V _ D
C
5
6
7
3. 3 V S D RN D R N 8 P R 79 P R8 0
4
1 8 . 2K _ 1% _ 0 6 3 3 K _ 1 % _0 6
+ +
1
PR 8 3 3 .3 VS
1
2
3
PJ 3 PC6 8 P R6 7 PC 7 8 P C7 7
A
P R 85
P R 81 1 0K _1 % _ 0 4
PD 2 4
P C2 0 2
PC 2 0 1
P C 1 98
P C1 9 1
P C 20 7
2 0 m il 1 0 0 0 p_ 5 0 V _ 0 4 P R7 3
24
23
22
21
20
19
1 6 . 2K _ 1% _ 0 6
22 K _ 0 4 2 2 K _ 04 10 0 0 p _ 50 V _ 0 4 3 3 n _X 7 R _ 06
2
V5
TG
BG
DR N
PM O N
PR8 6
BST
1 0K _0 4
1 18
5 D F GT _ V I D _ 3 2 V ID 4 PG D 17 V GA P W R _ E N 1 0K _0 4
5 D F GT _ V I D _ 2 3 V ID 3 E N 16 R A M P
5 D F GT _ V I D _ 1 V ID 2
PU6 RAM P P R9 0
5 D F GT _ V I D _ 0 PR 1 0 1 0_04
4
5
6
V ID 1
V ID 0
H YS
SC472B
CS +
C S-
FB+
15
14
13 PC8 0 1 0 0 _1 % _ 0 4 Sheet 26 of 38
E R R OU T
PR 9 5
CL SE T
POWER GPU/
A G ND
VR EF
10 0 p _ 5 0 V _ 04
G ND
5 . 1 K _ 1% _ 0 6
1
FB -
SS
1
P R8 8 PJ 4 P R 92 P R 1 03
PJ 5
25
E _O U T 1 0
11
12
1.25VS
2 2 K _ 04 2 0 m li 2 2 K _ 04 GH Y S 6-02-00472-CQ0
G CL S E T 7
G VRE F 8
9
2 0 m il 10 0 _ 1 % _ 04
2
GS S PC 8 3
2
V GA P W R _ E N P R 82 1 0 K_ 0 4
5V
G PU 1 0 0p _ 5 0 V _ 0 4
P Q1 3
D
P R1 0 2 1 0 _ 04
0 . 0 1u _ 5 0 V _ 0 4
2 N7 0 0 2 W
PC7 3
1 3 0K _1 % _ 0 4
1 3 0 K _ 1 % _0 4
8 . 2 K _ 1 %_ 0 4
*1 0 0 p _5 0 V _ 0 4
6-15-27002-7B5
10 0 0 p _ 5 0V _0 4
PR 1 1 5 0 _ 04 G P R 74 4 7 K_ 0 4
P R1 0 4
PR 1 1 4
P R1 0 5
GP U V C C S E N S E 7
PR 1 1 1 0 _ 04 P R 58
S
GP U V S S S E N S E 7 0 . 1 u _ 1 0V _X 7 R _ 04 PQ 1 2
5 6 0 p _ X 7 R_ 0 4
2
1 0 0 p _ 50 V _ 0 4
1 0 0 p _ 50 V _ 0 4
D
1 0 0 p _5 0 V _ 0 4
PJ 2 4 7 K _ 04
1 00 p _ 5 0 V _ 04
2 N 70 0 2 W
P R 11 2
P C 91
P C 93
2 0 m il G
PC9 8
D F GT _ V R _ E N 5
1 0 0 K_ 0 4
1 2 0K _1 % _ 0 4
Not e: All Gro un ds Tied togeth er at outpu t C ap s.

1
P R 11 3
P R 57
S
P R 10 6
1 0_ 0 4
PR 1 1 0 0_06
P C8 9
P C9 4
PC 8 7
P C1 0 0
1 0 0K _0 4
PC9 9
GVREF 0529
5V
1 .5 V S
P C 49 1. 25 V S
PU 4 APL 5913 1 u_ 6 . 3 V _ 0 4
3. 3V PR 4 9 1 0 K_ 0 4 5 6
V IN V C N TL
9 PJ 7
1 4 1 . 2 5V S _ P W R GD
7 V IN 4 1. 25 V B D 2A 1 2
P OK V O UT
3 O P E N _2 A
P R4 8 1 0 K _ 04 E N1 .2 5 V S 8 V O UT
0. 1u _ 1 6 V _ 0 4
2 2 0u _ 4 V _ D
5V EN
1 2 1 . 2 5 V F B P R 84 1 0 K _ 1% _ 0 4
GN D VFB
D
PQ 1 0
P C5 2 P C7 2 6 8 p _ 50 V _ 0 4 P C1 0 1
G +
28 SU SBL #
6-02-05913-320
1 u _ 6 . 3 V _ 04 PC 5 7 P C 61 PC 6 6
2 N 7 00 2 W 10 u _ 1 0 V _ 08
PC 8 4
S
PC8 2
1 0u _ 1 0 V _ 0 8 10 u _ 1 0 V _ 08 0 . 1 u _ 10 V _ X 7 R _ 0 4
PR 7 8
1 7 . 4 K _ 1 % _0 4
3 , 8, 12 , 1 3 , 1 5 , 1 7 , 2 3, 2 8 1 . 5 V S
2 , 1 1 , 13 . . 1 5 , 1 7 , 2 3 , 2 4, 27 . . 2 9 3 . 3 V
5, 8, 1 5 1 . 2 5 V S
7 V GF X_ C OR E
1 1 , 2 5, 27 . . 3 1 V I N
1 1, 1 5 , 2 3 , 2 4 , 2 7. . 2 9, 3 1 5 V
2 , 5 , 8. . 2 5, 3 1 3 . 3 V S
POWER GPU/1.25VS B - 27

Schematic Diagrams
POWER 3.3V/5V
PQ52 Power Plane VIN
AO4468 Power Plane
6-15-04468-7B0 VIN
VDD5 8 5V PQ50 EMI
7 3 AO4468
3A 6 2 3A 5V SYS15V VDD3 8 3.3V VI N1
5 1 7 3 PR154 2.2_04 Z30
31 PC221 PC194
PR1
88
4 3A 6
5
2
1
3A
EN_15V Z3
028 PR187 4 0.1u_25V_06 0. 1
u_25V_06
PC148
0_
04 PC230 1M_04
D
PR186 0.1u_25V_06
EN_15V Z3029
*0.01u_50V_04 G DD_ON# PQ47 PD1
2
100K_04 PC237 FM0
540-N LDO5V
D
1
PC222 6-06-00540-021
S
2N7002W
PQ48 PJ18 0.01u_50V_04
2N7002W 2200p_50V_04 G DD_
ON# Z3002 C A LDO5V
6-15-27002-7B5 20mli
S
2
PD11 FM0540-N
C A PC152 PR157
PC147
*1
M_04
PC126 PC125 4.7u

_6.3V_
06 0. 1
u_10V_X7R_04 PC130 PC131
PJ9 10u_25V_12 10u_25V_12 10u_25V_12 10u_25V_12

1 2 Z3003
14,17,19,22 SUSB# SUSBL 25
,28,29
20mli
18
19
15
PQ29
1
2
0529 PC145 PC155
PC246 PR194 AO4468 PR195 PC247
INTVCC
VIN
BOOST1
BOOST2
*1
000p_50V_06 *10
_06 6-15-04800-7B1 0.1u_10V_X7R_04 *10_06 *10
00p_50V_06
Sheet 27 of 38
7
6
5
5
6
7
8 0
.1u_10V_X7R_
04 8
4 Z3005 22 14 Z3
016 4 PQ2
7 08/16/2007
TG1 TG2
POWER 3.3V/5V
VDD5 SYS5V PL4 AO4
468
3
2
1
1
2
3
PR149 4.7uH_6.8*7.3*3.5
10m_12 6-19-41001-242 PL3 PR150 SYS3V VDD3
PJ13 6-13-R0101-13B-B 4.7uH_6. 8
*7.3*3.5 10m_12 PJ14
5A 1 2 5A 1 2 Z3006 23 13 Z3
017 1 2 5A 1 2 5A
C
SW1 SW2
C
1 25mohm_NEC
150u_6.3V_V
0.1u_10V_X7R_04
OPEN-5mm PD9 OPEN- 5
mm
1
7
6
5
5
6
7
8 PQ30 8
PC137 PC136 + PC135 PD10 AO44
68
FM5822 4 20
LGATE1 17 LGATE2 4 FM5
822
0.1u_1
0V_X
7R_04 0.1u
_10V_X7R_04 150u_6.3V_V 6-06-05822-061 BG1 BG2
A
25mohm_NEC PQ3
1
A
2
3
2
1
1
2
3
AO4
468
+
Z3040 PR148 10_04 Z30
34 27 8 Z3
032 PR1
66 10_04 Z3041
SENSE1+ SENSE2+
2
1
000p_50V_04 PC1
42 PC156
PC144
PC134
1000p_50V_0
4
PR147 10_04 Z3035 28 7 Z3033 PR165 10_04
SENSE1- SENSE2-
PC141 PR1
53 PC143 PR164 Change pull up 5V
PR143 Z3030 220p_50V_04 Z3011 2 11 Z3
019 0_06 5V
22p_50V_04 10
5K_1%_06 47K_
04
IT
H1 EXTVCC 2007/2/27
PC139 *100
p_50V_04 PC151 PC1
46 PR158
SGND4 Z3012 3 5 020 2
Z3 20p_50V_04 022 PR161
Z3 47K_04
VFB1 ITH2
*100p
_50V_04 63.4K_1%_06
PR145 12 PC149 100P_5
0V_0
4
PGOOD
LDO5V Z3013 24 SGND4
20K_1%_06 MODE/PLLIN 4 Z3
021
VFB2
PR146 LDO5V Z3037 25
FREQ/PL
LFL
TR
TK/SS1
TK/SS2
SGND4 0_04 PR151

RUN2
RUN1
SYS5V SYS15V 10K_04 PR144 16

ILIM
PR1 52 3.32K_1%_06 PGND PR155

*0_04
SYS5V PR167 *0_04 TK/SS2 PU8 C A 20K_1%_04
26
10
PR173 PR192 LTC3850 PC158 SYS5V

9
Z3039 1
TK/SS2
07/30/2007 PIN 29 = SGND4 LGATE1 PD19 SCS355V

PC154
PC138
*10K_04 100K_04 6-02-03850-CQ0 Z3026

Z3025
SGND4 0.1u_16V_04 A C
2200P_50V_04
PR162 PR168 0_04 LDO5V SYS10V

SGND4
EN_3V
DD_ON# *0
_04 SGND4 PD18 SCS35
5V
DD_ON# 29
0.01u_16V_04
0.01u_16V_04
PC157
PR169 2200p_50V_04
C A PJ12
D
*10K_04 PC153 1 2 SHORT

PQ33 SGND4 PD17 SCS35
5V
DD_ON G PC162 Z3027
22
,25 DD_ON
0.1u_16V_
04 A C
PC159
PR160 0
.1u_10V_X7R_
04 5
V SGND4 SGND4 SYS15V
S
2N7002W E MI EN_5V PC140 1000P_

50V_04 PD15 SCS35
5V
SGND4
6-06-00355-061 PC150
2200p_50V_04
100K_04
PC1 PC16 PC34 PC1
63 PC164 PC174
0
.1u_16V_04 0.1u_16V_
04 0.1u_16V_04 0.1u
_16V_04 0.1u_16V_0
4 0.1u_16V_04
5V 1
1,15,23,24,26,28,29,31 5V
11,25,28 VDD5
2,12,22,24,25,30 VDD3
PC209 PC211 PC213 PC1
70 PC192 PC210
25 VIN1
0
.1u_16V_04 0.1u_16V_
04 0.1u_16V_04 0.1u
_16V_04 0.1u_16V_0
4 0.1u_16V_04
11,25,26,28..31 VIN
2,5,8..26,31 3.3VS
2
,11,13..15,17,23,24,26,28,29 3.3V
11,25 SYS15V
B - 28 POWER 3.3V/5V

Schematic Diagrams
POWER 1.5VS/1.05VS
VI N
PC110 PC118 PC116
PC1
13 PC122 PC124 PR129 0_06 PR136 1
0_04 PC121 1u_6.3V_04 0.1u_25
V_06 *10u_25V_12 1
0u_25V_12
VDD5
0.1u_25V_06 *10u_25V_12 10u_25

V_12
3.3V
PR137 10K_04 PR133 1
0_04 PC117 1u_6.3V_04
VCCP_PWRGD
14 VCCP_PWRGD
SGND1 SGND2
A
PD6
FM0540-N PD5
6-06-00540-021 FM0540-N
PQ24 PU7 PC123 1000p_

50V_04
C
AO44
68
2
7 13
PGOOD1 PGOOD2 PC127 1000p_
50V_04
Power P lane PC248 PR196 2A PC128 1u_6
.3V_04 3
VDDP1 VCCA1
25
*1000p
_50V_
06 *10_06
PC1
20 1u_6.3V_04
1
7 11 SGND1 SGND2
1.05 VS UP TO 1. 1VS VDDP2 VCCA2
7
6
5
6 23 PR142 1M_04 PR197 PC249
1.05VS V1. 0
5 PL1 4 PR134
DH1 T
ON1
2A *10_06 *1000p_50V_06
PJ10 2.5
uH_7*7*3.5 4 9 PR132 75
0K_0
4
8A ILIM1 T
ON2
3
2
1
6-19-41001-233 23
. 7K_1%_06
1 2 1 2 5 20
5
6
7
LX1 DH2 8
C
PR13
9 Power Pl ane
6V_04
0.01u_16V_04
0p_50V_04
8mm 2 21 PC132 0.1u_25V_06 PQ25

7
6
5
DL1 BST2 V1.5 1.5VS

PC111 PC112 PD7 8 4
+ +
7 SC41 3 18
0_04 PR14
1
AO4
468 PJ11
Sheet 28 of 38
0.01u_1
4 PC119 0.1u_2
5V_0
6 BST
1 ILIM2 PL2 0605
6A
1
2
3
PR1
25 220u_4
V_D *220u_4V_D FM5822 2
6 19 18.2K_1%_06 1 2 1 2
10
FBK1 LX2
A
3
2
1
PQ23
Ra
AO4468 2
4 16
2.5uH_7*7
*3.5
POWER 1.5VS/
C
4V_D
5
6
7
VOUT
1 DL2
220u_4V_D
4
11K_1%_04 8 PR1
26 PC115 6mm
PC11
PC108
PC109
EN_1.5VS 8 12 PD8 Ra
*220u_
EN/PSV2 FBK2
2
2
EN/PSV1 VOUT2
10
4 FM5822
6-06-05822-061
2
0K_1
%_04 20p_50V_04
1.05VS
1
2
3
+ +
ND1
AGND1
AGND2
PGND2
PC267
PR128 PQ26 PC133

Rb
PG
AO4468 PR1
27
1
0K_1
%_04 Rb
1
0K_1
%_04
28
14
5
1
SGND1
SGND2
SGND2
6-02-00413-CL0
SGND1
5V
PR135 PR140
0_04 0_04
PR124
1.05VS
E MI 5V
PR138
EN_1.05VS 10K_04
D
1
0K_0
4
PC212 PC102 PC10

3 PC129 SUSBL# PR1
30 PR131
SUSBL# G SUSBL# 26
0.1u_16V_04 0.1u_16V_04 0.1u_
16V_
04 0.1u_10V_X7R_04
PQ28 0
_06 0_06
S
2N7002W
6-15-27002-7B5 PQ22 SGND1 SGND2
25
, 27, 2
9 SUSBL G PC1
07
2N7002W
SGND1 0.1u
_10V_X7R_04
S
11,25..27,29.. 3 1 VIN
11, 2
5, 2
7 VDD5
11,15,23,24 , 26,2 7, 2
9, 3
1 5V
2,11,13. .15,17,23, 24, 26, 2
7, 2
9 3.3V
3,8,12,13, 15,1 7, 2
3, 2
6 1.5VS
2..5,7,8, 12, 1
5 1.05VS
POWER 1.5VS/1.05VS B - 29

Schematic Diagrams
POWER 1.8V/0.9V
VDDQ VIN 5V 3.3V
A
PR75 PR89 PD3
FM0540- N PR96
1.5M_04 10_04 6-06-00540-021 100K_04
PU5
PR87 10_04 3 7
C
1.8V_ PWRGD
VDDQS PGD 1.8V_PWRGD 14
PC90 Ra PC95 PC74 VIN

PR99 2
100p_50V_04 2K_1%_04 1u_6. 3V_04 1u_6.3V_04 TON PC64 PC79 PC70
6 10u_25V_12
FB PR68 1 0u_25V_12 0.1u_25V_06
8 24 08/17/2007
REF BST
PR97 9 0_06 PC56
5
6
7
COMP 8 PR1 98 PC250
10_04
PC85 PR77 0.1u_1 0V_X7R_04 *10_06 *1000p_50V_06

PR107 Rb 23 4 PQ15
DH
PR91 *0.1u_1 6V_04 AO4468
0_06
1
2
3
10_04 10K_1 %_04 10 VTTS PL8
PR69 2. 5uH_7*7*3.5
5 21 6-19-41001-233 VDDQ
VCCA ILIM PJ6
PC96 PC97 PR108
PC71 PC75
LX
22 23.7K_1%_06 1 2 6A 1 2
1.8V
Sheet 29 of 38 1u_6.3V_ 04 *68n_50V_06 19 OPEN_6A
C
5
6
7
0_06 DL
1000p_50V_04 1u_6. 3V_04 8
VSSA 4 PC195 PC204 PC88 PC92
POWER 1.8V/0.9V 2
PJ16
1 1 .5A 14
15
VSSA
VTT VDDP1
20
5V
4
PQ16
+
220u_4V_D
+
220u_4V_D 0.1u_10V_X7R_04 0. 01u_50V_04
1
2
3
VTT_MEM VTT PC60 AO4468 PD23
A
OPEN_2A VDDQ 12 FM5822
13 VDDP2 6-06-05822-061
PC193 PC208 PC69 VDDP2
PC203
+
PR76 PC76 PC81 25 PR93
1 PGND2 18 VSSA
EN/PSV PGND1 16 1u_6.3V_04
150u_6.3V_ V 11 PGND1 17 0_06
*20K_1%_04 10u_10V_08 10 u_10V_08 10u_10V_08 *10u_10V_08 1u_6.3 V_04
VTTEN PGND2
SC486
5V PR63 220K_04 1.8VEN

D
PC62
PQ14
DD_ON# G 0.1u_10V_X7R_04 PR98
27 DD_ON# 2N7002W
S
*0_04
PR10 0
VTTEN
5V
100K_04
D
PC86
PR109 PQ17
G 0.1u_10V_X7R_04
2N7002W
100K_04
S
D
PQ18
25,27,28 SUSBL PR94 0_04 G 2N7002W
S
6-15-27002-7B5
11,25..28,30 ,31 VIN

11,15, 23,24,26..28 ,31 5V
2, 11,13..15, 17,23,24,26. .28 3.3V
5,7.. 10 1.8V
9,10 VTT_MEM
B - 30 POWER 1.8V/0.9V

Schematic Diagrams
CHARGER
PF1
U25 5A
VDD3 5 VP NC 1 6-26-15001-717
VN 2 VB
J_MBAT1
SMC_BAT 4 3 SMD_ BAT 1
CH2 CH1 2 1
*CM1213- 02ST 22 SMC_BAT 3 2 PC251
22 SMD_BAT 4 3
22 BAT_DET 4 0. 1u_25V_06
PC3 PC2 PC4 PC8 PC16 6 5
5
30p_ 50V_04 3 0p_50V_04 30p_5 0V_ 04 10u _25V_12 10u_25 V_1 2 BTC-0 5AL1
VIN 6-21-D3 400-105
PR39 0_04 ACOK
VDD3 PR40 1 0K_ 04 AC_I N# AC_IN# 22 PQ40

4A 160 mil PC181 AM4835P
8
0. 01u_50 V_04 3 7
PR199 PC252 2 6
*10_0 6 *1000p_ 50V_06 1 5
4
PQ41 PL5 VA
VA AM4835P 15uH_ 10*10*4 PR177
6-15-04835-7 B3 6 -19-41001-244-1 25m_25 VB
PD22 PR183 20m_ 25 8
8A 32 0m il 3 A 1 20 mil 6-1 3-R0256-14B-2
A C 3 7 Z3504 1 2
2 6
0. 1u_25 V_0 6
10u_ 25V_12
10u_25 V_1 2
10u _25V_12
1 5 PC6 PC7 PC1 71 PC1 68

C
PR6 5 FM1040- T1 4 PC 176 PC25 PC1 77

0.1 u_25V_06
6-0 6-10401-061 PD25
Sheet 30 of 38
220 K_1%_04
0.1 u_25V_06 1 0u _2 5 V_1 2 0.01 u_50V_04

*1 0K_0 6
Z3505 FM582 2 10 u_25V_12 10u_ 25V_12 10u_ 25V_ 12 10u_ 25V_12

6-06-05822-06 1
0 _06
CHARGER
PC189
PC63
PC190
PC55
ACI N
PC183
Z3516
PR18 4
PR182
PR6 4
Hi: 16. 8V
20K_1%_04
Z3517 PR62 0_ 06 VREF
PR 61 Low :12 .6V

*0_06 CHG_C UR 22
PC59
0. 01u_5 0V_ 04
VA PR34 0_06 CTL
PR30 *100K_04 PU3

PC21 22p_ 50V_04 13 +I NC1 -INC 1 12
PR31 0 _06 Z350 6 14 11
Z350 7 15 CTL OUTD/SEL
Z350 8 16 FB123 OUTC 1 10 9
PR60 100K_04
PC1 4 6800p _X7R_06
PC22 PR2 5 3 0K_1 %_04 Z351 0 17 - INE3 +INE1 8 Z35 18 PR59 10K_04 Z3521 PR24
PR17 RT - INE1 7
Z3509 18 XACOK ACI N 6 Z35 19 PR66 0_06 ACIN
PC33 0. 1u_25V_06 Z351 1 19 *10K_04
33K_1%_06 Z351 2 20 VH VREF 5 ACOK PC1 3 6800p _X7R_06
2200 p_50V_04 PR3 3 10_ 04 Z351 3 21 OUT ACOK 4 Z35 20 PR4 10K_04 Z3522
VIN PC32 Z351 4 22 VCC - INE2 3
0.2 2u_10 V_04 23 CS +INE2 2 PR6 10 0K_ 04
GND OUTC 2
Z351 5 24 +I NC2 -INC 2 1 TOTAL_CUR 22
PC31 1 u_6.3 V_04 MB3 9A126 MB3 9A1 26 PC11 0.0 1u_50V_04
6-02-39126 -C60 PR29
*2.2 M_06
T_CUR_ CONT
CUR_CONT
VREF
PR42 PR43
PC58 VDD3
3 0K_ 1%_0 4 30K_ 1%_0 4
0. 22u_10 V_0 4
PR185 A DJ C. V PO IN T
PR54 PQ4 2
VB E C Z352 3 BAT1_VOLT 1 0K_ 04
D
30 K_1%_04 BAT_VOLT 22 PR50 PR51 2N70 02W

6.0 4K_1 %_04
PQ7
0.1 u_16V_04
DTA11 4EUA G Z3525

6-15-0A114-2 B0 7.5K_1%_04 10.2K_1%_04 PQ11
Z352 4
B
D
1
2N70 02W
PJ1 5
2mm_ OP G CHG_EN
D
C HG_EN 22
Ch an ge
S
2
PC54
VDD 3 G
PR 90 t o
PR 55
PQ8 6. 04 K
S
2N70 02W
6-15 -27002-7B5 20 07 /2 /2 7
VI N 1 1,25. .29, 31
VA 2 3,25
VDD3 2 ,12, 22,24 ,25, 27
CHARGER B - 31

Schematic Diagrams
VCORE FOR MEROM CPU

V IN
VCORE FOR MERO M CPU V IN
V -R C 1
6-06-00540-021
5V
PC 2 5 3 P C2 5 4 P C2 5 5 P C2 5 6 V IN
100_1% _04 0. 1u _ 2 5 V _ 0 6 0 . 1 u_ 2 5 V _ 0 6 0 . 1 u _2 5 V _ 0 6 0 . 1 u _ 25 V _0 6
A
PC 2 6 P C1 8
PD 1 P C2 5 7 P C 2 58 P C 25 9 P C2 6 0 PC 2 6 1 P C2 6 2 P C2 6 3 PC 2 6 4 P C2 6 5 P C 26 6
1 u _ 6 .3 V _ 0 4
F M0 5 4 0 -N PR 2 8
0 .1 u _ 2 5 V _ 0 6
0 .1 u _ 2 5 V _ 0 6
0 .1 u _ 2 5 V _ 0 6
0 .1 u _ 2 5 V _ 0 6
0 . 1 u _ 2 5 V _ 06
0 . 1 u _ 2 5V _ 06
0 . 1 u _ 2 5V _0 6
0 . 1 u _ 25 V _0 6
0 . 1 u _2 5 V _ 0 6
0 . 1 u _2 5 V _ 0 6
1 0 00 p _ 5 0 V _ 0 4 1 0 _ 04 V IN
C
B S T1
P C3 8 PC 3 6 P C 18 8
P R2 1
PC 1 7 +
5
6
7
P R8 * 0_04 8
PR 1 0 0 . 1 u_ 2 5 V _ 0 6 * 1 0 u _2 5 V _ 1 2
1 u _ 6 .3 V _ 0 4 4 2 2u _ 2 5 V _ 1 0 *5 _ O S C O N
S GN D 3 P Q6
0_04
PC 1 5 I R F 7 4 1 3Z P B F
22A
1
2
3
PR 1 3
H_ D P R S T P # PR9 0 _0 4 D PR SL _ ST P PL 6
2 , 5 , 1 2 H _D P R S T P # 7. 5K _ 1% _ 0 4
E N _ V C OR E 1 5 n _ 50 V _0 6 0 . 5 u H _1 0 * 10 * 4 . 5 V C OR E
P M _D P R S L P V R PR1 8 *4 9 9 _ 1 % _0 6 D PR SL T G1 P Q3 8 PQ 3 9 6-19-41001-256
5 , 1 4 P M _D P R S L P V R
close to IMVP6 IR F 7 8 3 2 Z T RP B F IR F 7 8 3 2 Z T RP B F 44A
V PN 1
DR N1 2 1
B G1
D RN 1
IS H
C
5
6
7
5
6
7
8 8
3 .3 VS
P D2 PC 1 8 5 PC 1 8 6 P C 1 82
44
43
42
41
40
39
38
37
35
34
36
PR 1 9 P C2 7 4 4 + + +
6 8 0 _ 1% _ 0 4 F M5 8 2 2 PR 1 6
IS H
D P RS L
VPN 1
V IN1
BS T1
TG 1
B G1
V5 _ 1
EN
DR N1
P RS T P #
P R2 3 * 0_ 0 6 4 70 u _ 2 . 5 V _ D 4 7 0u _ 2 . 5 V _ D *4 7 0 u _2 . 5 V _D
1
2
3
1
2
3
PC 2 4 1 0 0 p_ 5 0 V _ 0 4 0 .1 u _ 1 6 V _ 0 4
A
C L KEN # 1 33
PR 2 2 14 CL KE N# C L KEN # C S1 +
6 8K _ 1% _ 0 4 13 0 K _ 1 % _ 0 6 V C OR E _ V R E F 2 32 C S1 N
V C OR E _ H Y S 3 V RE F C S1 - 31 C S2 N
PU2
C S1 N
V C OR E _ C L S E T 4 H Y S C S2 - 30
Sheet 31 of 38 PR 3 5
PC 2 9
3 57 K _1 % _ 0 6
1 0 0 p_ 5 0 V _ 0 4
PR 2 7
3
3
H_ V
H_ V
ID6
ID5
H _ V ID 6
H _ V ID 5
H _ V ID 4
5
6
7
C
V
V
L SET
ID6
ID5
C S2 +
E R R OU T
VC C A
29
28
27
VC C A
P C2 0 *1 0 0 0 p _ 5 0V _0 6
PR 1 5 0 _ 06
1 K_ 1 % _ 0 4
3 H_ V ID4
H _ V ID 3 8
V ID4
SC452 A G ND
26 D AC PR 3 8 0 _ 06
PR 2 6
VCORE FOR 1 3 0 K_ 1 % _ 0 6 3
3
H_ V
H_ V
ID3
ID2 H _ V ID 2 9
V
V
ID3
ID2 6-02-00452-CM0
D AC
S S
25 VC _ SS
C S2 N
PC 3 0 1 0 0 0p _ 5 0 V _ 0 4 H _ V ID 1 1 0 24
10 0 0 p _ 5 0V _ 04
3 H_ V ID1 V ID1 DR P +
H _ V ID 0 1 1 23
0 . 0 1 u _ 50 V _0 4
1 u _ 6 .3 V _ 0 4
3 H_ V ID0 V ID0 D RP -
P W RG D
MEROM CPU
PC 1 8 7 PC 1 7 3 P C1 7 5
3 .3 V S E -R C + + +
S GN D 3
VPN 2
BS T2
DR N2
1 50 0 p _ 5 0 V _ 0 6
V IN2
V5 _ 2
GN D
TG 2
B G2
P S I#
F B-
FB+
1 0 0 p _5 0 V _ 0 4
4 70 u _ 2 . 5 V _ D *4 7 0 u _ 2. 5V _ D 4 7 0 u _ 2 .5 V _ D
PR 4 4 V IN
1 K_ 0 4
45
12
V PN 2 1 3
14
15
16
17
18
19
21
22
20
P C1 9
PC 3 9
P C4 0
5, 14 DE L A Y_ P W RG D D E L A Y _ P W R GD P R 45 0_04 PC 4 4 P C3 7 PC 5 1
+
5
6
7
V CC S EN S E P R 53 10_04 FB+ 8
P C 23
PC 2 8
3 V CC S E N S E
V S S S ENS E P R 41 10_04 FB- 0 . 1 u _2 5 V _ 0 6 *1 0 u _ 2 5 V _ 1 2
3 VS SSEN SE
P S I# 4 15 u _ 2 5 V _ D
2 P S I# DR P - V C O R E _V R E F PQ 9 V CO R E
DR P + S G ND 3 I R F 7 4 13 Z P B F
EMI
1
2
3
* 1 00 p _ 5 0 V _ 0 4
* 1 0 0p _ 5 0 V _ 0 4
P R 52
*1 0 0 p _ 50 V _0 4
*1 0 0 p _ 5 0 V _ 04
PC 5 3
6-15-07413-7B0
*6 8 0 _ 1% _ 0 4 P R4 6 7. 5K _1 % _ 0 4 C S2 P 1 5 n _ 5 0V _ 06
PQ 4 3
D RN 2
22 A
100_1% _04
0 .1 u _ 1 6 V _ 0 4
0 .1 u _ 1 6 V _ 0 4
TG 2 PR 5 6 0 _ 04 P Q4 4 IR F 7 8 3 2 Z T RP B F PL 7
0 . 1 u _1 6 V _ 0 4
0 . 1 u_ 1 6 V _ 0 4
0 . 1 u_ 1 6 V _ 0 4
0. 1u _ 1 6 V _ 0 4
0. 1 u _ 1 6 V _ 0 4
BG 2 IR F 7 8 3 2 Z T R P B F 6-15-07832-7B0
D RN 2 2 1
P C 5 0 1 0 0 0 p _ 50 V _0 4
3. 3V S
5V
0 . 5 u H _ 1 0 *1 0 * 4. 5
PC 4 6
PC 4 2
P C4 1
P C 43
C
1 u _ 6 .3 V _ 0 4
5
6
7
5
6
7
8 8
1 u _ 6 . 3 V _ 04
P D 21 P R1 8 1
4 4 * 0_06
P C2 6 8
P C2 6 9
P C 1 78
P C 16 5
P C 17 2
P C1 8 4
P C1 8 0
A
F M 5 82 2
P R4 7
PC 1 7 9
S GN D 3S G N D 3S G N D 3S G N D 3 P D2 0
1
2
3
1
2
3
F M0 5 4 0 -N P R7 0 0_06
PC 4 7
PC 4 8
V -R C 2
* 10 0 0 p _ 5 0 V _ 06
C
B S T2 6-06-05822-061 S GN D 3
V IN
VC _ SS
1 0 K_ 0 4 3. 3V S
P R 11 E N_ V CO RE
5V
5V PC 1 0 PC 9
R T2
PR7 P R1 2 *0 . 1 u _ 10 V _X 7 R _ 0 4
PR 2 * 0_04 PR 1 8 0 DR P _ L 1 2 1 C S1 N 0523 PR 5 P R1 P C1 2
22 V C O R E _O N
D
K B CV RO N
10 0 K _ 0 4 * 1 0 K_ 0 4 2 8 K _ 1% _ 0 4
N T C _1 0 0 K _ 0 6 * 1 0 K _ 04 *1 0 K _ 0 4 * 2 2 n_ X 7 R _0 4 * 2 2 n _X 7 R _ 04
G PU 1
D
PR 1 7 4 PR 1 7 8
5
P Q5 DR N1 P C1 6 9 33 n _ X 7 R _ 0 4 *7 4 A H C T 1 G 0 2 S G ND 3
1
2N 7 0 0 2W C L KEN # 1 PQ 2
S
4 7K _ 04
D
PJ 1 6-15-27002-7B5 1 7 . 4 K _ 1% _ 0 4 4 G
P Q1 DC R_ D R1 PR 1 7 5 47 K _0 4 D RP + 2
* 2 N7 0 0 2 W
PR 3 0 _0 4 G 2 0 m il
S
1 1 , 1 4, 22 P M_ P W R O K 2 N 7 0 02 W
D
DC R_ D R 2 PR 1 7 9 47 K _0 4
PC 1 6 7 P R1 7 6
2
P R2 0 P Q4
S
PC 5 1 0 . 5 K _ 1 %_ 0 6 D PR SL G
PR 3 6 PR 3 2 68 0 p _ 5 0 V _ 0 4
DR N2 P C3 5 33 n _ X 7 R _ 0 4 D RP - *2 N 7 00 2 W
D
* 0 _ 04 S G N D3
0 .1 u _ 1 0 V _ X 7 R_ 0 4
S
4 7K _ 04
S GN D 3 1 7 . 4 K _ 1% _ 0 4 PQ 3 S G ND 3
R T1 PR 1 4
D PR SL _ ST P G SG ND 3
0509 PR 3 7 DR P _ L 2 2 1 C S2 N * A O 3 41 4
S G ND 3 * 0 _ 04
S
2 8 K _ 1% _ 0 4
N T C _ 1 00 K _0 6
6-17-10420-730 S GN D 3
3 V C OR E
2, 5, 8. . 2 6 3 . 3 V S
1 1 , 1 5 , 2 3 , 2 4 , 2 6. . 2 9 5 V
1 1 , 2 5. . 3 0 V I N
B - 32 VCORE FOR MEROM CPU

Schematic Diagrams
Multi Board, PCIE LAN RTL8111B
Sheet 32 of 38
Multi Board, PCIE
LAN RTL8111B
Multi Board, PCIE LAN RTL8111B B - 33

Schematic Diagrams
Multi Board, LED, USB
Port 0
MJ_MFB1
5P1-251A4-13V00-218
USB PORT
6-21-C1700-218 M_USBVCC02
MR21 ML8 M_USBVCC2
2 1
470K_04 HCB3
216KF-800T30 60 mil
MVINA 4 3 MVINA MUSB_OC#2
6 5 MGND
8 7
MC3
7 0.1u_16V_04 MR20 6-19-31001-1 62-1 MC43 MJ_USB1
M_3.3V 10 9
560K_04 C107B3-10403-Y
12 11
0.1u_16V_04 6-21-B4950-104
MC34 14 13 M_5V M_5V NEED 3A
3
4 MHOLD_SW# 16 15
0. 1u_16V_04 MUSB_PN2 M3G_EN 1
18 17 M3G_EN 34 V+
MUSB_PP2 MGND MGND
Port 2 MUSB_OC#2
20
22
19
21
M
M
USB_PN0 34
USB_PP0 34 Port 0 MUSB_PN2 1 2 MUSB_PN2_R 2
DATA_L
MGND
3
4
3
4
MAZ_SDOUT
MAZ_SYNC
24
26
23
25 Port 2 MUSB_PP2 4
ML9
3 MUSB_PP2_R 3
DATA_H
shield
3
4 MAZ_SDI N1 28 27
GND2shield
shield
shield
WCM3216F2S-161T03 4
3
4 MAZ_RST# 30 29 GND
3
4 MAZ_BITCLK 32 31 MLAN_
CLKREQ# 32
GND1
GND3
GND4
34 33
6-19-41001- 097
M_3.3VS 36 35 M_1.5VS
MGND M_5V M_USBVCC02 MGND MGND

MU3 100 MIL
MJ_MFB2 4 1
Sheet 33 of 38 34 MCLK_PCI E_MI NI_3G#

5P1-251A4-13V00-218
2 1 M3G_DET# 34
M_3.3V
MC40 3
VIN
VIN
VO
VO
UT
UT
5 MC42 MC41 MC38
+
MC39
Multi Board, LED, USB

10u_10V_08 2 0.1u_16V_04 0
. 1u_16V_04 10u_10V_0
8 100u_6.3V_B2
34 MCLK_PCIE_MINI_3G 4 3 MPCIE_WAKE# 32,34 GND
6 5 MR31 RT97
01-CPL
34 M
34 M
PCIE_RXN3_3G
PCIE_RXP3_3G
8
10
12
7
9
11
MUSB_PN8 34
MUSB_PP8 34 Port 8 10K_04
MGND 6-02-09701-9C2
MGND
34 MPCIE_TXN3_3G 14 13 MPCI E_WAKE# 32,34
34 MPCIE_TXP3_3G 16 15 MWLAN_CLKREQ# 34
MDOCK_ON
18 17
32 MPCIE_TXP4_GLAN 20 19
32 MPCIE_T
XN4_GLAN 22 21 MCLK_PCIE_GLAN 32
32 MPCIE_RXP4_GLAN
32 MPCIE_RXN4_GLAN
24
26
28
23
25
27
MCLK_PCIE_GLAN# 32
MLI D_SW# 34
MBUF_PLT_RST# 3
2,34
Dock C onnector
30 29 MNUM_LED# 10pin MVINA
Port 1 34
34
34
MUSB_PN1
MUSB_PP1
MUSB_OC#1
32
34
36
31
33
35
MCAP_LED#
MSCROLL_LED#
MCN1
1
1 2
MGND MGND 2
3
4
3
4
MGND
D OCK U SB
5
5 6 MDOCK_ON MH10 MH11
6 7 MDOCKI N# C256D146 C256D146
7 8
8 USBDOCK_EN 34
11 9
11 9 ML16
12 10 4 3 MUSB_PN0_DOCK 34
12 10
MVINA MVINA MVINA 1 2
MUSB_PP0_DOCK 34
BT
K-10HE1G-SD001
MGND MPR3 *WCM3216F2S- 161T03
6-21-D 4900-110 MGND MGND
MPC1 MPC3 MPC2 1K_
04 MR44 0_04
0 .1u_ 25V_06 0. 1u_2 5V_06 0. 1u_2 5V_06 MR45 0_04
MGND MGND
MGND MGND MGND
NUM LOCK CAPS LOCK SCROLL

LED LED LOCK LED
MVA++ MVINA
M_3.3VS M_3.3VS M_3. 3VS
MDC_JACK1
MVA++ MPR1 0_20 MVINA

1 MR8 MR7 MR6
2
GND1
MPC8 220_
04 220_04 2
20_04
GND2
MPC11 MPC6 MPC5 MPC10 MPC7 MPC9 MPC4
GND3 MNUM MCAP MSCROL
L
A
A
GND4 0.1u_
25V_06 0.1u_25V_06 0.1u_25V_06 10u_25V_12 10u_25V_12 10u_25V_12 10u_25V_12 0.1u _25V_0 6
MD3 MD2 MD1
2DC-G2
13-B200
MPGND MPR2 0_20 KP-2012SGC KP-2012SGC KP-2012SGC
6- 20-B3430-103
6-52-5200 1-022
C
MGND MNUM_LED# MCAP_LED# MSCROLL_LED#

MPGND
M_1.5VS 34
M_3.3V 32,34
M_3.3VS 32,34
M_5V 34
B - 34 Multi Board, LED, USB

Schematic Diagrams
Multi Board, 3G, MDC, RJ11, LID

M UIM _ CL K M R 40 * 4 .7 K _ 0 4 MU I M _ D A T A
MU S B _ P P 0 _ R MR 2 7 *0 _ 0 4 MU S B _ P P 0
3G M C5 5
MR 4 1
M R 42
MU S B _ P N 0 _ R MR 2 8 *0 _ 0 4 MU S B _ P N 0
20 mil 2 2 0 u _ 4V _D M J _S I M1
0_04
+
M G ND 0_ 0 4
LOCK
(TOP VIEW) M_ 3 . 3 V
S MU I M _ C L K C 3 C 7 S MU I M _ D A T A
U I M_ C L K U I M _D A T A
M J_ 3 G 1 M C5 7 0 .1 u _ 1 6 V_ 0 4 MU I M _R S T C 2 C 6 M U I M_ V P P
1 2 MU I M _P W R C 1 U I M_ R S T UIM _ V P P C 5
3 2 , 3 3 MP C I E _ W A K E #
3
5
W AK E#
B T _ D A TA
B T _ C H C LK
3 . 3 V _0
1 . 5 V _0
U I M_ P W R
6
8 MU IM _ PW R
M _ 3 .3 VS
M _ 1 .5 VS
U I M_ P W R U I M _ GN D
USB0 MU 5
M_ 3 . 3 V M R2 9
10 MU IM _ DA T A OPEN M GN D 3 0 K_ 0 4
M R2 6 0_04 7 U I M_ D A T A 12 MU IM _ CL K M C5 8 C 1 77 0 6 6 1 -1 1 10
3 3 M W L A N _ CL K R E Q # CL K RE Q # U IM _ CL K 3 3 M U S B _ P P 0 _ D OC K DAT A 1 + VCC
11 14 MU IM _ RS T 6-86-2B006-001
33 M C L K _ P C I E _ MI N I _ 3 G# R E F C LK - U I M_ R E S E T
13 16 MU IM _ VPP 0 .1 u _ 1 6 V _ 0 4 2 9 M R 3 0 1 K _0 4
3 3 MC L K _ P C I E _ M I N I _ 3 G R E F C LK + U IM _ V P P 3 3 M U S B _P N 0 _ D OC K DAT A 1 - S U S B D OC K _ E N 33
9 Layout?
15 GN D 0 4 MU S B _ P P 0 _R 3 8
GN D 1 GN D 5 1. SIM? ? ? ? ? ? ? ? (10mil) DAT A 2 + D ATA0 + M U SB_ PP0 33
M G ND
2. ? ? ? ? ? ? ? ? GND MU S B _ P N 0 _ R 4 7
MG N D M GN D DAT A 2 - D ATA0 - M U SB_ PN 0 3 3
K EY 3. SIM hold ? ? ? ? ? GND? ? 5 6
GN D O E#
21 18 4.SIM CONN ? ? MINI CARD
27
29
GN D 2
GN D 3
GN D 4
GN D 6
GN D 7
GN D 8
26
34 CONN Port 0
40 TS3 U SB2 2 1
GN D 9
35 50 MG N D
33 M 3 G_ D E T # 23 GN D 1 1 GN D 10 M G ND
3 3 MP C I E _R X N 3 _ 3 G PETn 0
25 20 S M UIM _ CL K M C7 3 *2 2 p _ 5 0V _ 04
3 3 M P C I E _ R X P 3 _ 3G PETp 0 W _ DI SA B L E# M 3G _ E N 33
DOCKU SB
31 22
3 3 M P C IE_ T X N3 _ 3 G PER n 0 P E R S E T# M B U F _ P L T _R S T # 3 2 , 3 3 S M UIM _ DA T A M C7 4
3 3 M P C I E _ T X P 3 _ 3G 33 30 *2 2 p _ 5 0V _ 04
PER p 0 N C (S MB _C L K ) 32
17 N C (S M B _ D A T A ) 36 MU I M _ D A T A M C7 5 *2 2 p _ 5 0V _ 04
NC 3 N C (U S B _D -) M US B _ P N 8 3 3
19 38
NC 4 N C (U S B _ D + ) M US B _ P P 8 3 3 MU I M _ V P P
37 M C7 6 *2 2 p _ 5 0V _ 04
39 NC 6 24 M R4 3 0_04
M _ 3 .3 V S
41
NC 7 3 .3 V A UX
28
M _3 . 3 V
Port 8 USB SWITH:USB0 AND DOCKUSB
Sheet 34 of 38
NC 8 1 . 5 V _1
M C5 4 M C5 6 43 48
45 NC 9 1 . 5 V _2 52 M _ 1. 5V S MG N D
NC 10 3 . 3 V _1 M _ 3. 3V S
0 . 1 u _ 16 V _0 4 1 0 u _ 10 V _ 0 8 47 42
NC 11 N C (L E D _ W W A N # )
49 44 M C5 3
Multi Board, 3G,

NC 12 L E D_ W L A N# +
51 46 M_ 1 . 5 V S M _3 . 3 V
M GN D M GN D NC 13 N C (L E D _ W P A N # ) 2 2 0 u_ 4 V _ D USBDOCK_EN
8 8 9 10 -5 2 0 4 A C E S M C 52 MC 5 9
6-21-82D40-262
M GN D M GN D 0 .1 u _ 1 6 V _ 0 4 0 . 1u _ 1 6 V _ 0 4 L DOCKUSB
MDC, RJ11, LID
MG N D MG N D H(NORMAL) USB0 Port
M R2 4 U S B V CC 0 1 U S B_ V C C0 1 _ 0
MDC MODULE M J _ MD C 1
ML 7
F C M1 6 0 8 K -1 2 1 T 0 6
33 M U S B _ OC # 1
4 7 0 K_ 0 4
M L11 H C B 3 2 1 6 K F -8 0 0 T 3 0
60 mil USB PORT 33 MA Z _ S D OU T
M R 19 3 3 _ 0 4 MA Z _ S D O U T_ R
1
3
5
G ND
A z a il a _ S D O
RE S E R V E D
RE S E R V E D
2
4
6 10mil
6-19-31001-129-1 M _ 3. 3 V
M R2 5 MC 6 8 MC 4 6 M R 18 3 3 _ 0 4 MA Z _ S Y N C _R 7 G ND 3 . 3 V M a ni / a u x 8
33 M AZ_ SY N C A z a il a _ S Y N C G ND
5 6 0 K_ 0 4 M R 17 2 2 _ 0 4 MA Z _ S D I N 1 _ R 9 10
33 M A Z _ S D IN 1 A z a il a _ S D I G ND
*2 2 u _ 6 . 3 V _ 0 8 0 . 1 u _1 6 V _ 0 4 M R 16 3 3 _ 0 4 MA Z _ R S T # _ R 11 12 MA Z _ B I T C L K _R M R 15 33_04
33 MA Z _ R S T# A z a il a _ R S T # A z a il a _ B C L K M A Z _ BIT C L K 3 3
MU J U S B 1 8 8 0 1 8 -1 20 G MC 3 6 MC 3 5
MG N D 0509 MJ_MDC1
6-20-C2D10-206
M L 14 M G ND 1 0 . 1 u_ 1 6 V _ 0 4 *2 2 p _ 5 0V _ 04
W C M3 2 1 6 F 2 S -1 6 1 T 0 3 V C C0 9 12 11
MU S B _ P N 0 _ R 1 2 2 S
D A TA 0 - 2 1
Port 0 MU S B _ P P 0 _ R 4 3 3
D A TA 0 +
S
10
M GN D M GN D
4
GN D 0
5
US B V C C0 1 U S B _V C C 0 1 _1
60 mil
M GN D
6
V C C1
D A TA 1 -
S
11
LID SWITCH IC HOLD SENSOR SWITCH
ML 1 2 H C B 3 21 6 K F -8 00 T 3 0 7
D A TA 1 + 12
S
6-19-31001-162-1 M C6 9 M C4 8 8
GN D 1
* 2 2u _ 6 . 3 V _ 0 8 0 . 1 u _ 1 6 V _ 04 M _ 3 .3 V M _ 3. 3V
M GN D C 1 0 7 B 4 -1 0 8 0 3- L MG N D
6-21-B4960-104 MR 3 * 10 K _0 4 M R 32 *1 0 K _ 0 4
ML 1 3 MG N D PSU 1 P S U2
W C M3 2 1 6 F 2 S -1 6 1 T 03 1 3 1 3
V CC O UT ML I D _ S W # 3 3 VC C OU T M HO L D_ S W # 3 3
1 2 U S B _ P N 1 _R
G N D
33 M US B _ PN 1
G ND
Port 1 33 M US B _ PP 1
4 3 U SB_ PP1 _ R M C1
A H 99 9 W L A PSU1, PSU2
MC 7 0
A H9 9 9 W L A PSU1, PSU2
6-19-41001-097 0 . 1 u _ 1 6V _ 04 2 0 . 1 u_ 1 6 V _ 0 4 2
2
1 3 1 3
M GN D MG N D MG N D M G ND
M_ 5 V U S B V C C 01
MU 4 100 MIL
4 1
V IN V O UT
MC 4 5 3 5 M C4 7 M C4 9 M C5 1 M C5 0
V IN V O UT +
1 0u _ 1 0 V _ 0 8 2 0 . 1 u _ 16 V _0 4 0 . 1 u _ 16 V _0 4 1 0 u _ 10 V _0 8 1 0 0 u _ 6. 3V _B 2
G ND
MG N D R T 9 7 0 1 -C P L
M _ 1 .5 V S 33
6-02-09701-9C2 MG N D M _ 3 .3 V 3 2 ,3 3
M _ 3 .3 V S 3 2 ,3 3
M _5V 33
Multi Board, 3G, MDC, RJ11, LID B - 35

Schematic Diagrams
FPT ExBoard FINGERPRINT

F
P
T
E
X
B
'
D
F
I
N
G
E
R
P
R
I
N
T
FPU1
A1 FPESD_RING
EXT_RING2
B1 FPGRID0/SENSE
CRIDO
C1
RING FPGND
D1 FPMUXOUT
MUXOUT
AVDD E1 FPAVDD
F1 FPMCS
MCS
G1
Sheet 35 of 38 PAD_VDD1B FPTC_VDD
H1 FPMISO/MODE3
FPT ExBoard MISO
J1
FPJ1
DVDD FPDVDD1
FINGERPRINT A2 FPGPIO1 FPGND FPMUXOUT
1
3
2
4 FPAVDD
GPIO1 FPTC_VDD
FPGRID0/SENSE 5 6
FPDVDD1
B2 FPMCS 7 8 FPMOSI
AGND FPMISO/MODE3 9 10 FPPD_REG
C2 FPDATA0 FPGPIO1 11 12 FPNRESET
DATA0 13 14 FPDATA2
D2 FPDATA1 FPGND FPDATA0 15 16 FPESD_RING
DATA1 FPDATA1 17 18 FPMCLK
GPIO0 E2 FPGPIO0/INT FPGPIO0/INT 19 20 FPXIN
FPUSB_PN 21 22 FPXOUT
F2 FPMCLK FPUSB_PP 23 24 FPGND
MCLK
G2 FPUSB_PN
USB_DN SPNZ-24S2-VB-017-1-R
H2 FPUSB_PP
USB_DP
MOSI J2 FPMOSI
FPJ1
A3 FPPD_REG 1 23 23 1
PD_REG
B3 FPNRESET
NRESET 2 24 24 2
C3 BOTT ON VIEW TOP V IEW
DGND
D3 FPDATA2
DATA2
E3 FPESD_RING
EXT_RING1
F3 FPTC_VDD
PVDD
G3 FPXIN
XTALIN
H3
PGND
XTALOUT J3 FPXOUT
TCS4B
6-03-00004-0F0 FPGND
B - 36 FPT ExBoard FINGERPRINT

Schematic Diagrams
FPT MBoard FINGERPRINT

FINGERPRINT
F3.3V
FGRID0/ SENSE
FC4
FPTESD FR6 100_04
1 0MIFES
L D_RING 1
FU1
3
0. 1u_16V_04 2
FR24 FC32 FR5 FC1 RClamp0502B

FTC_ VDD 6-06 -00 502 -061
*330K_04 *0. 1u_16V_0 4 3 30K_04 *18p_50V_04
FDATA2 FR20 47K_04 ES D ICP PIN2
FPD_REG FDATA1 FR19 47K_04
FDATA0 FR21 47K_04 FGND

C
FR25 FD1 FGPI O1 FR23 330 K_04

2 pin mus t
0_04
*SCS551V
FMISO/MODE3 FR7 47K_04
co nnect t o GND
co pper on Top
A
FGND la yer
FESD_GND FGND
FGPIO0/I NT FR4 1.5K_04
J _FP1
FUSB_PP1_ R FR2 27.4_1%_04 FUSB_PP4 23 1 1 23
6-04-25128-490
FTC_VDD
FC3 24
T OP VIEW
2 2 24
BOTTON V IEW FMI SO/MODE3 5
FU2
S VDD
8
Sheet 36 of 38
47P_5 0V_04 FMOSI 2
TJ_FP1
FMCS
FMCLK
1
6
Q
CS#
SCK
3 FC7
FPT MBoard
WP#
FGND
FESD_GND FPTTCS4BMUX
FGRID0/ SENSE
1
3
5
2
4
6
FAVDD
FTC_VDD
FDVDD1
0. 1u_16V_0 4 FINGERPRINT
FMCS 7 8 FMOSI 4 7
FMI SO/MODE3 9 10 FPD_ REG VSS HOLD#
FUSB_PN1_R FR3 27.4_ 1%_04 FUSB_PN4 FGPIO1 11 12 FNRESET AT25128A
FGND 13 14 FDATA2 FC6 FC34 FC33 FGND 6 -04 -251 28- 490 FGND
FDATA0 15 16 FESD_RING
1u_6. 3V_04 1u_6.3 V_04 0.1u_16V_04
FR1 FC2 FDATA1 17 18 FMCLK
FGPIO0/INT 19 20 FXIN
100K_04 47P_5 0V_04 FUSB_PN1_R 21 22 FXOUT
FUSB_PP1_R 23 24 FGND FGND FGND
CON24A
FGND FGND
FGND
6- 19- 3100 1-1 29- 1

FL1 JFPTLCD1
1 USB_PP_TUH 37
FCM160 8K-121 T06
JF PTLCD 2 USB_PN_TUH 37
3
FESD_ GND FGND 4 FUSB_PP4
F3. 3V 12 FUSB_PN4
5
FQ2
NDS352AP_NL F3. 3V 6
7 FENTERKEY# 37
6-1 5-00 352 -7B 1 FPOPMENU# 37
8 FGND
S
9 FCIR_RX 37
FG_FET G FR12 1 F3.3V
10 F3.3V
FNRESET FR22 47K_04 FTC_VDD 11 FR35 0 _06 FVDD5
*0_04 FC36 FC35 FR36 0 _06
FC31 0.1u_ 16V_04 FC14 12 F5V
FGND FAVDD
D
1u_6 .3V_04 0. 1u_16V_0 4

0. 022u_16V_04 87213- 1200G FC40 FC39
6 -20 -53A 00- 112
FR11 15_04 0. 1u_16V_04 0. 1u_16V_0 4
FTC_VDD FGND F3.3V
FC15
FPTTCS4BMUX FC5 33p_50V_04 FR10 FC12 FC8
FGND
1u_ 6.3V_0 4 0.1u_16V_04 FGND FGND
33_0 4
E
FQ1 0 .1u_16V_04
B 2 SB1 198KR/T14 6 FU3 FR8
FDVDD1
C
6 -15 -21 198- 2B1 FGND 1 8
A# VCC
330K_04
FPT123B 2
FXIN B 7 FPT123VCC
Rx/ Cx
FC11
3 6 FPT123CX
FGND 2 1 F3.3V CL R# Cx
1u_6 .3V_04 FR9 FC10 FC9 2.2u_6. 3V_06
FXOUT
3 4 FGND 1 00K_04 1u_6. 3V_04 4 5 FPT123Q FR26 10K_04 FG_FET
GND Q
FX1
HSX531 S/12MHZ
6-2 2-12 R00 -1B J FGND SN74LVC1 G12 3DCT
6-01 -74 112 -QD0
FR18 *47K_04
FC29 FC30
FGND FGND
22p _50V_04 22 p_50V_04 37 FVDD5
F5V
37 F5V
FGND FGND
FPT MBoard FINGERPRINT B - 37

Schematic Diagrams
FPT MBoard TP, KEY, CIR

TOUCH PANEL
UPPER
LEFT RIGHT
F5 V F U4
F5V
TOP VIEW
7 3
FC 16 FC 17
F R 13 1 M _ 04
V C C2 V CC 1
V CC 1
24
FC 37 F C2 3
4WIRE-PANEL
FC 20 1 5p _ 5 0 V _ 0 4 T UH O S 1 20
OS C 1
1 0 u _ 1 0V _ 08 1 u _ 6 .3 V _ 0 4 6-22-12R00-1BJ 0 . 1 u _1 6 V _ 0 4 1u _ 6 . 3 V _ 0 4
FR 15 F X2 27
FC 21 1 5p _ 5 0 V _ 0 4 4 3 H S X 53 1 S / 12 M H Z G PIO A 26
1 0 0 K_ 0 4 G PIO B 2 F G ND F GN D
FG N D F G ND
1 2 F G ND
19
OS C 0
GP I OC
GP I OD
5 LOWER
FG N D T U H OS 0 6
G PIO E 15
FR 14 1 0 K_ 0 4 T UH P L R S T 18 SC L /G PIO F 28 # T O UC H _ HO L D F R3 0 10 K _0 4
# RES # TO U C H _ H O L D / GP I OH
16
# M E MC S / S D A / GP I OG
FC 19 F C 22
1 u _ 6 .3 V_ 0 4 0 . 1 u_ 1 6 V _ 0 4
F GN D
F J _ T P1
FG N D F G ND
FR 31 1 .5 K_ 0 4 FP TV3 3 O 9 4 F PTX+ FR 16 0_04 F P T R i gh t F P T R i gh t
V3 3 O X+ 1
8 F PTY+ FR 17 0_04 F P T L o we r F PT L o we r
Y + 2
FC 38 FC 28 FC 27 12 F PTX- FR 28 0_04 F P T L e ft F PT L e ft
1 u _6 . 3 V _ 0 4 X- 13 F PTY- FR 29 0_04 F P T U p pe r F P T U p p er 3
4 7 p _5 0 V _ 0 4 4 7 p _ 5 0V _ 04 Y - 4
FR 33 33_04 F G ND T UH U S B N 11 F 5V
36 U S B _ P N _ TU H U S B D - / D A TA / R X D
25 T UH P E N IR Q FR 27 1 0 0 K_ 0 4 8 8 5 0 2-0 4 0 1
FR 32 33_04 T UH U S B P 10 # P E NI RQ 23
Sheet 37 of 38 36 US B_ PP _ T U H
F C2 5 FC 26
US B D+ /C L K /T X D V RE F
IN 4
IN 3
22
21 FC 24
6-21-94A20-104
FPT MBoard TP,

22 p _ 5 0 V _ 0 4 2 2 p _ 5 0V _ 04 1 0 .1 u _ 1 6 V_ 0 4
31 DC L K 14
DIN G ND
32 17
N.C G ND
29
DO U T
KEY, CIR F GN D FG N D 30
R T S / LE D / G P I O J
F G ND
FG N D
U T S 66 8 0
6-03-06680-0P0
F5 V F5V F5V F5 V
FD 2 FD 3 FD 5
FD 4
C
BAV9 9 B A V 99 B A V 99 BA V9 9 FH 5 F H2 FH 1 F H4 FH 3
6-06-00099-011 C 6 7D 6 7 N C 6 7 D6 7 N H 6_ 5 D 2 _ 5 H 6 _ 0 D 2 _ 3 B 6 _ 5H 6 _ 5 D 2 _3
A C F PT Rig h t AC F PT L o we r AC F PT L e ft AC F P T Up p e r
A
0509 FG N D F G ND FG N D
FG N D F GN D F GN D F G ND
MENU KEY CIR

F C IR 1
POP MENU KEY A

36 F C IR _ RX
ROTATION KEY B
F SW 1 FR 34 1 00 _ 1 % _ 0 4 F C IRV CC C
C.IR
6-53-3050B-A41 FVD D 5
TM G -5 33 -S -V -T / R FS W 2 6-53-3050B-A41
1 2 T M G-5 3 3 -S -V -T / R
F P OP ME N U # 3 6
3 4 1 2 P L- I R M 0 3 0 1- A 5 38
F E NT E RK E Y # 3 6
3 4 6-05-03015-010
F C 18 F GN D
FC 13 FC 41 F C4 2
5
6
0 . 1 u_ 1 6 V _ 0 4
5
6
0 . 1 u _ 16 V _0 4 0 .1 u _ 1 6 V_ 0 4 4 .7 u _ 6 .3 V_ 0 6
F GN D F G ND
F G ND F G ND
F GN D
36 F V DD 5
36 F5V
B - 38

Schematic Diagrams
CLICK BOARD
CLICK BOARD
C+5VS
C JTP1
CJTPZ 01 C TP1
1 CTPBU TTO N _R CTP
CJTP 2 CTPBU TTO N _L C C1 CTP_DATA 1
3 CJTPZ 02 CTP_CLK 2 4
4 CJTPZ 03 0.1u_16V_04 3
1 1
5 CJTPZ 04 4
6 85201-04051
7 C GN D
8 CTP_C LK
9 6 -20 -94A50 -10 4
CTP_D ATA
12
10
11 C +5VS
CG ND Sheet 38 of 38
12 CLICK BOARD
87151-1207G
6 -20 -94 A20 -11 2
CSW1
C SW 2 TMG -533-S- V- T/R 6- 53 -30 50B -A4 1
TMG- 533-S-V-T/ R 6-5 3-3 050 B- A41 1 2
1 2 CSW1~2 3 4 C TPBU TTON _R
3 4 CTPBUTTO N_L
2 4
1 3
5
6
5
6
CG ND
C GN D
C H2 CH 3 C H1
C 87D87N H6_5D 2_3 H 6_5D2_3
C G ND C GN D
CLICK BOARD B - 39

Schematic Diagrams
B - 40

tn120r PDF

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

tn120r PDF

Uploaded by

Copyright:

Available Formats

Downloaded from www.Manualslib.

com manuals search engine

Downloaded from www.Manualslib.com manuals search engine

Downloaded from www.Manualslib.com manuals search engine

About this Manual

The following information is included:

Appendix A, Part Lists

Downloaded from www.Manualslib.com manuals search engine

IMPORTANT SAFETY INSTRUCTIONS

TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,

This Computer’s Optical Device is a Laser Class 1 Product

Downloaded from www.Manualslib.com manuals search engine

Instructions for Care and Operation

Downloaded from www.Manualslib.com manuals search engine

Use only approved brands of Unplug the power cord before

The computer has specific power requirements:

Downloaded from www.Manualslib.com manuals search engine

Downloaded from www.Manualslib.com manuals search engine

Downloaded from www.Manualslib.com manuals search engine

Downloaded from www.Manualslib.com manuals search engine

POWER GPU/1.25VS .................................................................. B-27

Downloaded from www.Manualslib.com manuals search engine

Downloaded from www.Manualslib.com manuals search engine

Intel® Core™2 Duo Processor 45nm (45 Nanometer) Process Technology

Intel® Core™2 Duo Processor 65nm (65 Nanometer) Process Technology

Intel® Core™2 Duo Processor 65nm (65 Nanometer) Process Technology

Intel® Celeron® M Processor 65nm (65 Nanometer) Process Technology

Core Logic Intel® GM965 + ICH8M Chipset

LCD 12.1" WXGA (1280 * 800) TFT LCD Touch Panel

BIOS One 8Mb SPI Flash ROM Phoenix™ BIOS

Downloaded from www.Manualslib.com manuals search engine

512MB Or 1GB Intel® Turbo Memory Module (Option)

Security Security (Kensington® Type) Lock Slot BIOS Password

Video Adapter Intel GM965 Integrated Video

Audio Integrated Azalia Compliant Interface 2 * Built-In Speakers

Card SlotS One ExpressCard/34(54) Slot

Interface Three USB 2.0 Ports One RJ-45 LAN Jack

Battery 4 Cell Smart Lithium-Ion Battery Pack, 14.8V/2.4AH

Downloaded from www.Manualslib.com manuals search engine

Communication 1000/100/ 10 Mb Fast Ethernet LAN

*Note: The Intel

UMTS WCDMA FDD (2100 MHz)

Downloaded from www.Manualslib.com manuals search engine

External Locator - Top View with LCD Panel Open Figure 1

External Locator - Top View with LCD Panel Open 1 - 5

Downloaded from www.Manualslib.com manuals search engine

Figure 2 External Locator - Front & Rear Views

1 - 6 External Locator - Front & Rear Views

Downloaded from www.Manualslib.com manuals search engine

External Locator - Right & Left Side Views

External Locator - Right & Left Side Views 1 - 7

Downloaded from www.Manualslib.com manuals search engine

External Locator - Bottom View

To prevent your com-

1 - 8 External Locator - Bottom View

Downloaded from www.Manualslib.com manuals search engine

Mainboard Overview - Top (Key Parts) Figure 7

Mainboard Overview - Top (Key Parts) 1 - 9

Downloaded from www.Manualslib.com manuals search engine

Figure 8 Mainboard Overview - Bottom (Key Parts)

1. CPU Socket (no

6. WLAN Mini Card

1 - 10 Mainboard Overview - Bottom (Key Parts)