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8/23/2010

MIPS’s Instruction Set


Architecture
Computer Architecture
I. Instructions and Addressing
II. Procedures and Data

Nguyen Kim Khanh, PhD.


Department of Computer Engineering
School of Information and Communication Technology (SoICT)
Hanoi University of Technology

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1. Abstract View of Hardware


I. Instructions and Addressing . ..
Loc 0 Loc 4 Loc 8 m ≤ 2 32
4 B / location Memory
up to 2 30 words Loc Loc
m−8 m−4
1. Abstract View of Hardware . ..

2. Instruction Formats EIU $0 Execution FPU $0 Floating-


(Main proc.) $1 & integer (Coproc. 1) $1 point unit
3. Simple Arithmetic / Logic Instructions $2 unit $2

4. Load and Store Instructions $31 $31


Integer FP
ALU
5. Jump and Branch Instructions mul/div arith

Hi Lo
6. Addressing Modes TMU BadVaddr Trap &
(Coproc. 0) Status memory
Cause unit
Chapter Chapter Chapter EPC
10 11 12

Memory and processing subsystems for MiniMIPS.

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Nguyễn Kim Khánh


8/23/2010

$0 0 $zero A 4-b yte word


3
$1 $at Reserved for assembler use sits in consecutive
$2 $v0 memory addresses 2
Procedure results
Data Types $3
$4
$v1
$a0
according to the
big-endian order
(most significant
1
0
Register
$5 $a1 Procedure
Saved byte has the
$6 $a2 arguments
lowest address) Conventions
Byte =Byte
8 bits $7
$8
$a3
$t0
Byte numbering: 3 2 1 0
$9 $t1
Used only for floating-point data, $10 $t2 When loading
Temporary
Halfword= 2 bytes
Halfword so safe to ignore in this course $11 $t3
values
a byte into a
$12 $t4 register, it goes
$13 $t5 in the low end Byte
$14 $t6
Word
Word =Word
4 bytes $15 $t7
$16 $s0 Doublew ord
$17 $s1
$18 $s2 Saved
Doubleword = 8 bytes
Doubleword $19 $s3
Operands
across
$20 $s4 procedure
$21 $s5 calls
$22 $s6
$23 $s7 A doubleword
More
Quadword (16 bytes) also used occasionally $24 $t8
temporaries
sits in consecutive
$25 $t9 registers or
$26 $k0 memory locations
Registers and
$27 $k1 Reserved for OS (kernel) according to the data sizes in
MiniMIPS registers hold 32-bit (4-byte) words. Other common $28 $gp Global pointer big-endian order
(most significant MiniMIPS.
data sizes include byte, halfword, and doubleword. $29 $sp Stack pointer
Saved word comes first)
$30 $fp Frame pointer
$31 $ra Return address

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Registers Used in This Chapter 2. Instruction Formats


High-level language statement: a = b + c
$8 $t0 10 temporary registers
$9 $t1
$10 $t2
Temporary Assembly language instruction: add $t8, $s2, $s1
$11 $t3
$12 $t4 values 8 operand registers
$13 $t5
Machine language instruction: 000000 10010 10001 11000 00000 100000
$14 $t6
ALU-type Register Register Register Addition
$15 $t7 instruction 18 17 24 Unused opcode
$16 $s0
$17 $s1 Register Register
Saved Instruction file Data cache file
$18 $s2
across cache (not used)
$19 $s3
Operands procedure
$20 $s4 P
calls $17 ALU
$21 $s5 C $18
$24
$22 $s6
$23 $s7
Instruction Register Data Register
$24 $t8 More Operation
fetch readout read/store writeback
$25 $t9 temporaries
A typical instruction for MiniMIPS and steps in its execution.

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Nguyễn Kim Khánh


8/23/2010

Add, Subtract, and Specification of Constants MiniMIPS Instruction Formats


MiniMIPS add & subtract instructions; e.g., compute: op rs rt rd sh fn
31 25 20 15 10 5 0
g = (b + c) − (e + f) R 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits

add $t8,$s2,$s3 # put the sum b + c in $t8 Opcode Source Source Destination Shift Opcode
register 1 register 2 register amount extension
add $t9,$s5,$s6 # put the sum e + f in $t9
sub $s7,$t8,$t9 # set g to ($t8) − ($t9) 31
op
25
rs
20
rt
15
operand / offset
0
I 6 bits 5 bits 5 bits 16 bits
Decimal and hex constants
Opcode Source Destination Imm ediate operand
Decimal 25, 123456, −2873 or base or data or address offset
Hexadecimal 0x59, 0x12b4c6, 0xffff0000 op jump target address
31 25 0

Machine instruction typically contains J 6 bits 1 0 0 0 0 0 0 0 0 0 0 0 260 bits


0 0 0 0 0 0 0 1 1 1 1 0 1
Opcode Memory word address (byte address di vided by 4)
an opcode
one or more source operands MiniMIPS instructions come in only three formats: register (R),
possibly a destination operand immediate (I), and jump (J).

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 9 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 10

3. Simple Arithmetic/Logic Instructions Arithmetic/Logic with One Immediate Operand


Add and subtract already discussed; logical instructions are similar An operand in the range [−32 768, 32 767], or [0x0000, 0xffff],
add $t0,$s0,$s1 # set $t0 to ($s0)+($s1) can be specified in the immediate field.
sub $t0,$s0,$s1 # set $t0 to ($s0)-($s1) addi $t0,$s0,61 # set $t0 to ($s0)+61
and $t0,$s0,$s1 # set $t0 to ($s0)∧($s1) andi $t0,$s0,61 # set $t0 to ($s0)∧61
or $t0,$s0,$s1 # set $t0 to ($s0)∨($s1) ori $t0,$s0,61 # set $t0 to ($s0)∨61
xor $t0,$s0,$s1 # set $t0 to ($s0)⊕($s1) xori $t0,$s0,0x00ff # set $t0 to ($s0)⊕ 0x00ff
nor $t0,$s0,$s1 # set $t0 to (($s0)∨($s1))′
For arithmetic instructions, the immediate operand is sign-extended
op rs rt rd sh fn
31 25 20 15 10 5 0
R op rs rt operand / offset
0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0 x 0 31 25 20 15 0

ALU Source Source Destination Unused add = 32 I 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1


instruction register 1 register 2 register sub = 34 1 0 Errors 0 1
addi = 8 Source Destination Immediate operand
The arithmetic instructions add and sub have a format that is common Instructions such as addi allow us to perform an arithmetic or logic
to all two-operand ALU instructions. For these, the fn field specifies the operation for which one operand is a small constant.
arithmetic/logic operation to be performed.

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 11 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 12

Nguyễn Kim Khánh


8/23/2010

4. Load and Store Instructions lw, sw, and lui Instructions


op rs rt operand / offset lw $t0,40($s3) # load mem[40+($s3)] in $t0
31 25 20 15 0
I 1 0 x 0 1 1 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 sw $t0,A($s3) # store ($t0) in mem[A+($s3)]
lw = 35 Base Data Offset relative to base # “($s3)” means “content of $s3”
sw = 43 register register lui $s0,61 # The immediate value 61 is
lw $t0,40($s3) Note on base and offset: # loaded in upper half of $s0
Memory lw $t0,A($s3) The memory address is the sum # with lower 16b set to 0s
of (rs) and an immediate value.
Address in
A[0] base register
Calling one of these the base op rs rt operand / offset
31 25 20 15 0
A[1] and the other the offset is quite
A[2] arbitrary. It would make perfect I 0 0 1 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1
sense to interpret the address
.
A($s3) as having the base A lui = 15 Unused Destination
. Offset = 4i Immediate operand
. and the offset ($s3). However,
Element i a 16-bit base confines us to a
A[i]
of array A small portion of memory space.
0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Content of $s0 after the instruction is executed
MiniMIPS lw and sw instructions and their memory addressing
convention that allows for simple access to array elements via a base The lui instruction allows us to load an arbitrary 16-bit value into the
address and an offset (offset = 4i leads us to the i th word). upper half of a register while setting its lower half to 0s.

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 13 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 14

Initializing a Register 5. Jump and Branch Instructions


Example Unconditional jump and jump through register instructions
Show how each of these bit patterns can be loaded into $s0: j verify # go to mem loc named “verify”
jr $ra # go to address that is in $ra;
0010 0001 0001 0000 0000 0000 0011 1101 # $ra may hold a return address
1111 1111 1111 1111 1111 1111 1111 1111 $ra is the
symbolic op jump target address
31 25 0

name for J 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1
Solution
reg. $31 j=2

The first bit pattern has the hex representation: 0x2110003d (return
address) x x x x 0 0 0 0 0 0 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

lui $s0,0x2110 # put the upper half in $s0 From PC


(incremented) Effective target address (32 bits)

ori $s0,0x003d # put the lower half in $s0 31


op
25
rs
20
rt
15
rd
10
sh
5
fn
0
R 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
Same can be done, with immediate values changed to 0xffff ALU Source Unused Unused Unused jr = 8
instruction register
for the second bit pattern. But, the following is simpler and faster:
The jump instruction j of MiniMIPS is a J-type instruction which is shown
nor $s0,$zero,$zero # because (0 ∨ 0)′ = 1 along with how its effective target address is obtained. The jump register
(jr) instruction is R-type, with its specified register often being $ra.

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 15 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 16

Nguyễn Kim Khánh


8/23/2010

Conditional Branch Instructions Comparison Instructions for Conditional Branching


Conditional branches use PC-relative addressing slt $s1,$s2,$s3 # if ($s2)<($s3), set $s1 to 1
bltz $s1,L # branch on ($s1)< 0 # else set $s1 to 0;
beq $s1,$s2,L # branch on ($s1)=($s2) # often followed by beq/bne
slti $s1,$s2,61 # if ($s2)<61, set $s1 to 1
bne $s1,$s2,L # branch on ($s1)≠($s2)
# else set $s1 to 0
op rs rt operand / offset
31 25 20 15 0 op rs rt rd sh fn
31 25 20 15 10 5 0
I 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1
R 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 1 1 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0
bltz = 1 Source Zero Relative branch distance in words
ALU Source 1 Source 2 Destination Unused slt = 42
op rs rt operand / offset instruction register register
31 25 20 15 0
I 0 0 0 1 0 x 1 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1
op rs rt operand / offset
31 25 20 15 0

beq = 4 Source 1 Source 2 Relative branch distance in words I 0 0 1 0 1 0 1 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1


bne = 5 slti = 10 Source Destination Immediate operand

Conditional branch instructions of MiniMIPS. Comparison instructions of MiniMIPS.

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Examples for Conditional Branching Compiling if-then-else Statements


If the branch target is too far to be reachable with a 16-bit offset Example
(rare occurrence), the assembler automatically replaces the branch Show a sequence of MiniMIPS instructions corresponding to:
instruction beq $s0,$s1,L1 with:
if (i<=j) x = x+1; z = 1; else y = y–1; z = 2*z
bne $s1,$s2,L2 # skip jump if (s1)≠(s2)
j L1 # goto L1 if (s1)=(s2) Solution
L2: ... Similar to the “if-then” statement, but we need instructions for the
Forming if-then constructs; e.g., if (i == j) x = x + y “else” part and a way of skipping the “else” part after the “then” part.
bne $s1,$s2,endif # branch on i≠j slt $t0,$s2,$s1 # j<i? (inverse condition)
add $t1,$t1,$t2 # execute the “then” part bne $t0,$zero,else # if j<i goto else part
endif: ... addi $t1,$t1,1 # begin then part: x = x+1
addi $t3,$zero,1 # z = 1
If the condition were (i < j), we would change the first line to: j endif # skip the else part
else: addi $t2,$t2,-1 # begin else part: y = y–1
slt $t0,$s1,$s2 # set $t0 to 1 if i<j add $t3,$t3,$t3 # z = z+z
beq $t0,$0,endif # branch if ($t0)=0; endif:...
# i.e., i not< j or i≥j

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Nguyễn Kim Khánh


8/23/2010

6 Addressing Modes Finding the Maximum Value in a List of Integers


Addressing Instruction Other elements involved Operand
Example
Implied Some place
in the machine List A is stored in memory beginning at the address given in $s1.
List length is given in $s2.
Extend,
Immediate if required Find the largest integer in the list and copy it into $t0.

Register
Reg spec Reg file Reg data Solution
Scan the list, holding the largest element identified thus far in $t0.
Constant offset Mem
Base
Reg base Reg Add addr Mem lw $t0,0($s1) # initialize maximum to A[0]
Reg file data Memory data
addi $t1,$zero,0 # initialize index i to 0
loop: add $t1,$t1,1 # increment index i by 1
Constant offset Mem
beq $t1,$s2,done # if all elements examined, quit
PC-relative
Add addr Mem
add $t2,$t1,$t1 # compute 2i in $t2
Memory data add $t2,$t2,$t2 # compute 4i in $t2
PC add $t2,$t2,$s1 # form address of A[i] in $t2
lw $t3,0($t2) # load value of A[i] into $t3
Pseudodirect PC
slt $t4,$t0,$t3 # maximum < A[i]?
Mem
addr Memory Mem beq $t4,$zero,loop # if not, repeat with no change
data addi $t0,$t3,0 # if so, A[i] is the new maximum
j loop # change completed; now repeat
Schematic representation of addressing modes in MiniMIPS. done: ... # continuation of the program

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The 20 MiniMIPS Instruction Usage op fn


Instructions Copy Load upper immediate lui rt,imm 15 II. Procedures and Data
Add add rd,rs,rt 0 32
Covered So Far Subtract sub rd,rs,rt 0 34
Arithmetic Set less than slt rd,rs,rt 0 42
Add immediate addi rt,rs,imm 8
Set less than immediate slti rd,rs,imm 10
AND and rd,rs,rt 0 36
1. Simple Procedure Calls
OR or rd,rs,rt 0 37 2. Using the Stack for Data Storage
XOR xor rd,rs,rt 0 38
Logic NOR nor rd,rs,rt 0 39 3. Parameters and Results
12
AND immediate
OR immediate
andi
ori
rt,rs,imm
rt,rs,imm 13
4. Data Types
XOR immediate xori rt,rs,imm 14 5. Arrays and Pointers
Load word lw rt,imm(rs) 35
Memory access Store word sw rt,imm(rs) 43 6. Additional Instructions
Jump j L 2
Jump register jr rs 0 8
Control transfer Branch less than 0 bltz rs,L 1
Branch equal beq rs,rt,L 4
Branch not equal bne rs,rt,L 5

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 23 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 24

Nguyễn Kim Khánh


8/23/2010

1 Simple Procedure Calls Illustrating a Procedure Call


Using a procedure involves the following sequence of actions: main
Prepare
1. Put arguments in places known to procedure (reg’s $a0-$a3) to call
2. Transfer control to procedure, saving the return address (jal) PC jal proc
Prepare
3. Acquire storage space, if required, for use by the procedure to continue proc
4. Perform the desired task Save, etc.
5. Put results in places known to calling program (reg’s $v0-$v1)
6. Return control to calling point (jr)

MiniMIPS instructions for procedure call and return from procedure:


Restore
jal proc # jump to loc “proc” and link; jr $ra
# “link” means “save the return
# address” (PC)+4 in $ra ($31)
jr rs # go to loc addressed by rs Relationship between the main program and a procedure.

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$0 0 $zero A 4-b yte word


3
$1 $at Reserved for assembler use sits in consecutive
$2 $v0
Procedure results
memory addresses
according to the
2
1
Recalling A Simple MiniMIPS Procedure
$3 $v1
$4 $a0 big-endian order
(most significant
0
Register
$5 $a1 Procedure
Saved byte has the Example
$6
$7
$a2
$a3
arguments
lowest address) Conventions
$8 $t0
Byte numbering:
Procedure to find the absolute value of an integer.
$9 $t1 3 2 1 0
$10
$11
$t2
$t3 Temporary
When loading
a byte into a
$v0 ← |($a0)|
$12 $t4 values register, it goes
in the low end Byte
$13
$14
$t5
$t6
Solution
$15 $t7 Word
$16 $s0 Doublew ord
The absolute value of x is –x if x < 0 and x otherwise.
$17 $s1
$18 $s2 Saved abs: sub $v0,$zero,$a0 # put -($a0) in $v0;
$19 $s3 across
Operands procedure # in case ($a0) < 0
$20 $s4
calls
$21 $s5 bltz $a0,done # if ($a0)<0 then done
$22 $s6
$23 $s7
add $v0,$a0,$zero # else put ($a0) in $v0
A doubleword
$24 $t8 More sits in consecutive done: jr $ra # return to calling program
$25 $t9 temporaries registers or
memory locations
Registers and
$26
$27
$k0
$k1 Reserved for OS (kernel) according to the data sizes in In practice, we seldom use such short procedures because of the
big-endian order
$28 $gp Global pointer
(most significant MiniMIPS. overhead that they entail. In this example, we have 3-4
$29 $sp Stack pointer
Saved word comes first)
$30 $fp Frame pointer instructions of overhead for 3 instructions of useful computation.
$31 $ra Return address

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Nguyễn Kim Khánh


8/23/2010

Nested Procedure Calls 2. Using the Stack for Data Storage


main
Prepare
sp b
to call
PC jal abc Procedure a
Prepare abc
to continue abc Procedure Push c Pop x
Save xyz
xyz

jal xyz sp c
b b
a sp a
Restore x = mem[sp]
sp = sp – 4
sp = sp + 4
jr $ra jr $ra mem[sp] = c

Effects of push and pop operations on a stack.

Example of nested procedure calls. push: addi $sp,$sp,-4 pop: lw $t5,0($sp)


sw $t4,0($sp) addi $sp,$sp,4

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Hex address 00000000


Memory Reserved 1 M words

Map in
00400000 3. Parameters and Results
Text segment
Program
MiniMIPS 63 M words Stack allows us to pass/return an arbitrary number of values
10000000
Addressable Static data $sp z
with 16-bit 10008000 y
signed offset Data segment Local Frame for
..
1000ffff
Dynamic data variables . current
Saved procedure
registers
$gp 448 M words
Old ($fp)
$28 $sp
$29
$sp c $fp c
$30 b Frame for b Frame for
$fp current previous
Stack Stack segment a a
.. procedure .. procedure
. .
7ffffffc
80000000 $fp
Second half of address
space reserved for
memory-mapped I/O Before calling After calling

Overview of the memory address space in MiniMIPS. Use of the stack by a procedure.

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8/23/2010

Example of Using the Stack


4. Data Types
Saving $fp, $ra, and $s0 onto the stack and restoring
them at the end of the procedure Data size (number of bits), data type (meaning assigned to bits)
Signed integer: byte word
proc: sw $fp,-4($sp) # save the old frame pointer Unsigned integer: byte word
addi $fp,$sp,0 # save ($sp) into $fp Floating-point number: word doubleword
addi $sp,$sp,–12 # create 3 spaces on top of stack Bit string: byte word doubleword
sw $ra,-8($fp) # save ($ra) in 2nd stack element
sw $s0,-12($fp) # save ($s0) in top stack element
$sp ($s0) . Converting from one size to another
($ra) .
Type 8-bit number Value 32-bit version of the number
($fp) .
$sp lw $s0,-12($fp) # put top stack element in $s0
$fp Unsigned 0010 1011 43 0000 0000 0000 0000 0000 0000 0010 1011
lw $ra,-8($fp) # put 2nd stack element in $ra
Unsigned 1010 1011 171 0000 0000 0000 0000 0000 0000 1010 1011
addi $sp,$fp, 0 # restore $sp to original state
$fp lw $fp,-4($sp) # restore $fp to original state
Signed 0010 1011 +43 0000 0000 0000 0000 0000 0000 0010 1011
jr $ra # return from procedure
Signed 1010 1011 –85 1111 1111 1111 1111 1111 1111 1010 1011

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ASCII Characters Loading and Storing Bytes


ASCII (American standard code for information interchange)
0 1 2 3 4 5 6 7 8-9 a-f Bytes can be used to store ASCII characters or small integers.
0 NUL DLE SP 0 @ P ` p
More More
MiniMIPS addresses refer to bytes, but registers hold words.
1 SOH DC1 ! 1 A Q a q
controls symbols lb $t0,8($s3) # load rt with mem[8+($s3)]
2 STX DC2 “ 2 B R b r
3 ETX DC3 # 3 C S c s # sign-extend to fill reg
4 EOT DC4 $ 4 D T d t lbu $t0,8($s3) # load rt with mem[8+($s3)]
5 ENQ NAK % 5 E U e u # zero-extend to fill reg
6 ACK SYN & 6 F V f v sb $t0,A($s3) # LSB of rt to mem[A+($s3)]
8-bit ASCII code
7 BEL ETB ‘ 7 G W g w
BS CAN ( 8 H X h x (col #, row #)hex
8 op rs rt immediate / offset
31 25 20 15 0
9 HT EM ) 9 I Y i y
a LF SUB * : J Z j z
e.g., code for + I 1 0 x x 0 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
b VT ESC + ; K [ k {
is (2b) hex or lb = 32 Base Data Address offset
c FF FS , < L \ l | (0010 1011)two lbu = 36 register register
d sb = 40
CR GS - = M ] m }
e SO RS . > N ^ n ~
f SI US / ? O _ o DEL
Load and store instructions for byte-size data elements.

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Nguyễn Kim Khánh


8/23/2010

Meaning of a Word in Memory 5. Arrays and Pointers


Index: Use a register that holds the index i and increment the register in
Bit pattern each step to effect moving from element i of the list to element i + 1
0000 0010 0001 0001 0100 0000 0010 0000
(02114020) hex
Pointer: Use a register that points to (holds the address of) the list element
being examined and update it in each step to point to the next element

Array index i Base Array A Pointer to A[i] Array A


00000010000100010100000000100000
Add instruction

00000010000100010100000000100000 Add 1 to i; Add 4 to get


Compute 4i; the address
Positive integer
Add 4i to base of A[i + 1]
A[i] A[i]
00000010000100010100000000100000 A[i + 1] A[i + 1]
Four-character string

A 32-bit word has no inherent meaning and can be interpreted in


a number of equally valid ways in the absence of other cues Stepping through the elements of an array using the indexing
(e.g., context) for the intended meaning. method and the pointer updating method.

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 37 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 38

Selection Sort Selection Sort Using the Procedure max


Example Example (continued)
A A A
To sort a list of numbers, repeatedly perform the following: first first first

Find the max element, swap it with the last item, move up the “last” pointer In $a0 max
Inputs to
x
Outputs from
y

In $v0 In $v1 proc max


A A A proc max
first first first In $a1 last
last last y x
max x y Start of iteration Maximum identified End of iteration

sort: beq $a0,$a1,done # single-element list is sorted


jal max # call the max procedure
lw $t0,0($a1) # load last element into $t0
last
sw $t0,0($v0) # copy the last element to max loc
last last y x sw $v1,0($a1) # copy max value to last element
Start of iteration Maximum identified End of iteration addi $a1,$a1,-4 # decrement pointer to last element
j sort # repeat sort for smaller list
One iteration of selection sort. done: ... # continue with rest of program

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 39 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 40

Nguyễn Kim Khánh


8/23/2010

6. Additional Instructions Logical Shifts


MiniMIPS instructions for multiplication and division:
Reg
MiniMIPS instructions for left and right shifting:
mult $s0, $s1 # set Hi,Lo to ($s0)×($s1) file
div $s0, $s1 # set Hi to ($s0)mod($s1) sll $t0,$s1,2 # $t0=($s1) left-shifted by 2
# and Lo to ($s0)/($s1) Mul/Div srl $t0,$s1,2 # $t0=($s1) right-shifted by 2
unit
mfhi $t0 # set $t0 to (Hi) sllv $t0,$s1,$s0 # $t0=($s1) left-shifted by ($s0)
mflo $t0 # set $t0 to (Lo) Hi Lo srlv $t0,$s1,$s0 # $t0=($s1) right-shifted by ($s0)

op rs rt rd sh fn
op rs rt rd sh fn
31 25 20 15 10 5 0 31 25 20 15 10 5 0
R 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 x 0 R 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 x 0
ALU Source Source Unused Unused mult = 24
instruction register 1 register 2 div = 26 ALU Unused Source Destination Shift sll = 0
instruction register register amount srl = 2
The multiply (mult) and divide (div) instructions of MiniMIPS.

op rs rt rd sh fn op rs rt rd sh fn
31 25 20 15 10 5 0 31 25 20 15 10 5 0
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 x 0 R 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 x 0
ALU Unused Unused Destination Unused mfhi = 16
instruction register mflo = 18 ALU Amount Source Destination Unused sllv = 4
instruction register register register srlv = 6
MiniMIPS instructions for copying the contents of Hi and Lo registers into
general registers . The four logical shift instructions of MiniMIPS.

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 41 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 42

Instruction Usage op fn
Unsigned Arithmetic and Miscellaneous Instructions The 20 MiniMIPS Move from Hi mfhi rd 0 16
Instructions Copy Move from Lo mflo rd 0 18
Add unsigned addu rd,rs,rt 0 33
MiniMIPS instructions for unsigned arithmetic (no overflow exception): Subtract unsigned subu rd,rs,rt 0 35
addu $t0,$s0,$s1 # set $t0 to ($s0)+($s1) Multiply mult rs,rt 0 24
Arithmetic Multiply unsigned multu rs,rt 0 25
subu $t0,$s0,$s1 # set $t0 to ($s0)–($s1)
Divide div rs,rt 0 26
multu $s0,$s1 # set Hi,Lo to ($s0)×($s1) Divide unsigned divu rs,rt 0 27
divu $s0,$s1 # set Hi to ($s0)mod($s1) Add immediate unsigned addiu rs,rt,imm 9
# and Lo to ($s0)/($s1) Shift left logical sll rd,rt,sh 0 0
op rs rt rd sh fn

addiu $t0,$s0,61 # set $t0 to ($s0)+61; R


31
6 bits
25
5 bits
20
5 bits
15
5 bits
10
5 bits
5
6 bits
0

Shift right logical srl rd,rt,sh 0 2


Opcode Source Source Destination Shift Opcode

# the immediate operand is register 1 register 2 register amount extension


Shift right arithmetic sra rd,rt,sh 0 3
I
31
op
6 bits
25
rs
5 bits
20
rt
5 bits
15
operand / offset
16 bits
0 Shift Shift left logical variable sllv rd,rt,rs 0 4
# sign extended Opcode Source Destination Immediate operand

op
or base or data

jump target address


or address offset
Shift right logical variable srlv rt,rd,rs 0 6
31 25 0
J 6 bits 1 0 0 0 0 0 0 0 0 0 0 0260 bits
0 0 0 0 0 0 0 1 1 1 1 0 1
Shift right arith variable srav rd,rt,rd 0 7
To make MiniMIPS more powerful and complete, we introduce later: Opcode Memory word address (byte address divided by 4)

Load byte lb rt,imm(rs) 32


Memory access Load byte unsigned lbu rt,imm(rs) 36
sra $t0,$s1,2 # sh. right arith (Sec. 10.5) 40
Store byte sb rt,imm(rs)
srav $t0,$s1,$s0 # shift right arith variable Jump and link jal L 3
syscall # system call (Sec. 7.6) Control transfer 0 12
System call syscall

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 43 Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 44

Nguyễn Kim Khánh


8/23/2010

The 37 + 3 MiniMIPS Instructions Covered So Far


Instruction Usage Instruction Usage
Load upper immediate lui rt,imm Move from Hi mfhi rd
Add add rd,rs,rt Move from Lo mflo rd
Subtract sub rd,rs,rt Add unsigned addu rd,rs,rt
Set less than slt rd,rs,rt Subtract unsigned subu rd,rs,rt
Add immediate addi rt,rs,imm Multiply mult rs,rt
Set less than immediate slti rd,rs,imm Multiply unsigned multu rs,rt
AND and rd,rs,rt Divide div rs,rt
OR or rd,rs,rt Divide unsigned divu rs,rt
XOR xor rd,rs,rt Add immediate unsigned addiu rs,rt,imm
NOR nor rd,rs,rt Shift left logical sll rd,rt,sh
AND immediate andi rt,rs,imm Shift right logical srl rd,rt,sh
OR immediate ori rt,rs,imm Shift right arithmetic sra rd,rt,sh
XOR immediate xori rt,rs,imm Shift left logical variable sllv rd,rt,rs
Load word lw rt,imm(rs) Shift right logical variable srlv rd,rt,rs
Store word sw rt,imm(rs) Shift right arith variable srav rd,rt,rs
Jump j L Load byte lb rt,imm(rs)
Jump register jr rs Load byte unsigned lbu rt,imm(rs)
Branch less than 0 bltz rs,L Store byte sb rt,imm(rs)
Branch equal beq rs,rt,L Jump and link jal L
Branch not equal bne rs,rt,L System call syscall

Jan. 2010 Computer Architecture – HEDSPI -HUT Slide 45

Nguyễn Kim Khánh

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