B.E.

(ELECTRONICS) SEMESTER VIII

(EXC -801)
CMOS VLSI Design (CVLSI)

Lectures: 4 hours / week

Theory Paper: 3 hours and 80 marks
Practical: 2 hours / week
Internal Test: 20 marks

(EXL-801)
Term-Work : 25 marks
Oral : 25 marks
Prepared by YP Sir (VESIT)
 Course Objectives

1. To teach analysis and design of building blocks of

CMOS Analog VLSI Circuits.

2. To highlight the issues associated with the CMOS

analog VLSI circuit design.

Prepared by YP Sir (VESIT)

 Course Outcomes

1. To discuss tradeoffs involved in analog VLSI

Circuits.
2. To analyze building blocks of CMOS analog VLSI
circuits.
3. To design building blocks of CMOS analog VLSI
circuits.
4. To carry out verifications of issues involved in
analog circuits via simulations

Prepared by YP Sir (VESIT)

Ch-1 : CMOS analog building blocks

1.1 MOS Models: Necessity of CMOS analog

design, Review of characteristics of MOS device,
MOS small signal model, MOS spice models .
1.2 Passive and Active Current Mirrors: Basic
current mirrors, Cascode current mirrors and
Active current mirrors.
1.3 Band Gap References: General
Considerations, Supply-independent biasing,
Temperature independent references, PTAT
current generation and Constant Gm biasing
Prepared by YP Sir (VESIT)
Ch-2 : Single Stage Amplifiers

2.1 Configurations: Basic concepts, Common

source stage, Source follower, Common gate
stage, Cascode stage

2.2 Frequency Response and Noise: General

considerations, Common-source stage, Source
followers, Common-gate stage, Cascode stage
and Noise in single stage amplifiers

Prepared by YP Sir (VESIT)

Ch-3 : Differential Amplifiers

3.1 Configurations: Single ended and

differential operation, Basic differential pair,
Common-mode response, Differential pair with
MOS loads, Gilbert cell

3.2 Frequency response and noise in

differential pair

Prepared by YP Sir (VESIT)

Ch-4 : MOS Operational Amplifiers

4.1 Op-amp Design: General Considerations,

performance parameters, One-stage opamps,
Two-stage op-amps, Gain Boosting, Common-
mode feedback, Input range limitations, Slew
Rate, Power supply rejection, Noise in op-amps

4.2 Stability and Frequency Compensation:

General Considerations, Multipole system, Phase
margin, Frequency compensation, compensation
of two stage opamps
Prepared by YP Sir (VESIT)
Ch-5 : Mixed Signal Circuits

5.1 Switch Capacitor Circuits: MOSFETs as

switches, Speed considerations, Precision
Considerations, Charge injection cancellation,
Unity gain buffer, Noninverting amplifier and
integrator
5.2 Oscillators: General considerations, Ring
oscillators, LC oscillators, VCO
5.3 Phase-Locked Loop: Simple PLL, Charge
pump PLL, Nonideal effects in PLL, Delay locked
loops and applications of PLL in integrated
circuits Prepared by YP Sir (VESIT)
Ch-6 : Analog Layout and other concepts

6.1 Analog Layout Techniques: Antenna effect,

Resistor matching, capacitor matching, current
mirror matching, floorplanning, shielding and
guard rings

6.2 AMS design flow, ASIC, Full custom design,

Semi custom design, System on Chip, System in
package, Hardware software co-design

Prepared by YP Sir (VESIT)

 Reference Books

[1] B Razavi, Desig of Analog CMOS Integrated

Circuits , Tata McGraw Hill, 1st Edition.
[2] R. Jacaob Baker, Harry W. Li, David E. Boyce,
CMOS Circuit Design, Layout,and Sti ulatio ,
Wiley, Student Edition
[3] P. E. Allen and D. R. Holberg, CMOS Analog
Circuit Desig , Oxford University Press, 3 rd
Edition.
[4] Gray, Meyer, Lewis, Hurst, A alysis and design
of Analog Integrated Circuits , Willey, 5 th Edition
Prepared by YP Sir (VESIT)
 Introduction
VLSI of present era
• Tech ology challe ges:
CMOS/BICMOS/BIPOLAR
Silicon, Si-Ge, SiN and compound semiconductors
and their combinations
• Market needs:- Wireless Systems,
Optical Systems , Sensors, High speed
microprocessors , High speed memories

• A alog desig s are like custo desig s

• Po er-speed is the challenge

Prepared by YP Sir (VESIT)
Why Analog?
• Some digital system designers predicted in
1980, the death of analog era . But 2000
onwards, one sees increased stress on analog
design.

Some Answers

• Nature is analog and hence at least

fro te ds will be Analog followed by A to D
converters and later to DSP.

Prepared by YP Sir (VESIT)

 Digitization of Analog signal

Addition of amplification and filtering for higher sensitivity

Prepared by YP Sir (VESIT)

Why Analog?
Sensors of all kind, e.g. mechanical, optical, and
thermal give electrical transduced signal in µV, and
susceptible to noise.

Signal processing thus needs low noise

amplification, filtering and A to D conversion

Digital data transmission on a long distance

leads to distractio . Hence analog kind of trans-
receiver will be needed.

Prepared by YP Sir (VESIT)

Wireless recei ers recei e ery eak sig als
from antenna. Hence amplification is needed.

Microprocessors and memories with ultra high

speeds use clocks/signals across large area chip.
Non-ideal interconnects, parasitics of devices and
package lead to tra s issio -li e effects in
signal flow.

Sense amplifiers of memories are essentially

Analog Devices

Prepared by YP Sir (VESIT)

Is analog design more difficult than
digital design?

Answer: Yes!!!

Prepared by YP Sir (VESIT)

Compared to digital design following problems are
there
Multidimensional trade off speed, power
dissipation, gain, precision, supply voltage etc.

Much sensitive to noise, crosstalk and interferes

Second order effects are dominant.

Manufacturing and design is rarely automated,

most of the time it is ha d crafted

Challenge in fabricate analog IC in digital world to

characterize digital behavior needs novel
Prepared by YP Sir (VESIT)
architecture and design
What is Analog VLSI Design?
•Analog IC design is the successful implementation
of Analog circuits and systems using Integrated
circuit technology.
• Unique Features of Analog IC Design.
• Geometry is an important part of the design.
• Electrical Design Physical Design Test Design.
• Usually implemented in a mixed analog-digital
circuit.
• Analog is 20% and digital 80% of the chip area.
• Analog requires 80% of the design time.
• Analog is designed at the circuit level.
• Passes for success: 2-3 for analog, 1 for digital.
Prepared by YP Sir (VESIT)
 Analog and Mixed Analog-Digital IC
•Analog Systems :- Amplifiers, Filters, Comparators,
Oscillators, Multipliers, PLL, Voltage/Current
References, Sample-And-Hold Circuits, A/D and
D/A Converters, High speed IO Interface, DC-DC
converters
•Analog Signal and Information Processing
Applications:- Telecommunication, Multimedia,
Automotive Electronics, Biomedical Electronics,
Consumer Electronics, Neural Networks, Sensing
and Sensor Networks, Space and Military
Electronics Prepared by YP Sir (VESIT)
Levels of abstraction
Prepared by YP Sir (VESIT)