DHARMS INH DESAI UNIVERS ITY, NADIAD

FACULTY OF TECHNOLOGY
THIRD S ESSIONAL EXAMINATION
SUBJ ECT: ( CI308 ) LINEAR EL ECTRONICS-I
Examination : B. Tech. Semester III [EC/ IC] Seat No : ____________________
Date : 06/10/2015 Day :Tues day
Ti me : 10:15 a.m. to 11:30 a.m. Max. Marks : 36
INSTRUCTIONS:
1. Figures to the right indicate maximu m marks for that question.
2. The symbols used carry their usual meanings.
3. Assume suitable data, if required & mention them clearly.
4. Draw neat sketches wherever necessary.
Q.1 Do as directed. [12]
a. represent: [1]
(A) output admittance, (B) output resistance, (C) input resistance, (D) None of these.
b. Which of the following cascading connections can provide low input resistance, low [1]
output resistance, high voltage gain.
(A) CC-CE-CB, (B) CB-CE-CC, (C) CC-CE-CC, (D) CB-CE-CB.
c. Prove . [2]
d. State true/false with reason; BVceo is less than BVcbo. [2]
e. Determine input and output time constant for Hybrid-π model of a transistor in the CE [2]
configuration with RL = 2 kΩ, Cc = 3 pF, rb’e = 1 kΩ, Ce = 100 pF and gm = 50 mA/V.
f. Discuss bias compensation technique for ICO germanium transistor with necessary [2]
equations.
g. State true or false with justification [2]
(i) “The The base spreading resistance rbb’ increases with temperature”.
(ii) “The diffusion capacitance is proportional to the emitter bias current I E”.
Q.2 Do as directed. (Any Two) [12]
a. (I) Prove: . [4]

(II)Why two separate diodes connected in series opposing cannot work as a transistor. [2]
b. Draw transistor amplifier circuit using h parameters. Derive the equation of AI, AV, Zi, [6]
AVs, AIs, Yo .
c. For the amplifier shown if Figure:1 calculate . [6]
[Assume ]
Q.3 Do as Directed. [12]
a. Design self-bias circuit using a silicon transistor to meet the following specification [6]
over the temperature range 25 to 65 ºC:
(ΔIc/Ic ) ≤ 21%, VBE at 25 ºC = 650 + 50 mV, Vcc= 20 V, β spread 150 to 600 at Ic = 1
mA and T = 25 ºC, Lowest β at 25 ºC= 150, highest β at 65 ºC= 1200, Ico at 25 ºC= 50
nA max, Ico at 65 ºC= 3 µA max.
b. Derive Hybrid-π input conductance gb’e, feedback conductance gb’c, and output [6]
conductance gce in terms of h parameters of CE configuration.
OR
Q.3 Do as Directed. [12]
a. Discuss compensation techniques using temperature sensitive resistive elements with [4]
necessary circuit diagrams.
b. Find the stability factor S’’ for the circuit of figure 2 with Rc= 2.3K, R=50K Vc=2V [4]
and =55.
c. Derive the CE short-circuit current gain Ai and the frequency at which gain drops to [4]
unity with the help of Hybrid-π model.

VCC

10kΩ

100kΩ Vo

10kΩ
Vs

Ri' Ri
Figure:1 Q. 2(c) Figure: 2 Q.3(b)

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