60LB5900UV

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED TV
SERVICE MANUAL
CHASSIS : LA43B
MODEL : 60LB5900 60LB5900-UV

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67988319(1404-REV00) Printed in Korea

CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 4
ADJUSTMENT INSTRUCTION .............................................................. 11
TROUBLE SHOOTING ............................................................................ 17
BLOCK DIAGRAM.................................................................................. 22
EXPLODED VIEW .................................................................................. 25
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 Mȍ and 5.2 Mȍ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE,IXQIRUHVHHQFLUFXPVWDQFHVFUHDWHFRQÀLFWEHWZHHQWKH sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
UHPRYDOGHYLFHVQRWFODVVL¿HGDV³DQWLVWDWLF´FDQJHQHUDWH
General Servicing Precautions HOHFWULFDOFKDUJHVVXI¿FLHQWWRGDPDJH(6GHYLFHV
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; HOHFWULFDOFKDUJHVVXI¿FLHQWWRGDPDJH(6GHYLFHV
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. IRRWIURPDFDUSHWHGÀRRUFDQJHQHUDWHVWDWLFHOHFWULFLW\VXI-
8QOHVVVSHFL¿HGRWKHUZLVHLQWKLVVHUYLFHPDQXDOFOHDQ ¿FLHQWWRGDPDJHDQ(6GHYLFH
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION7KLVLVDÀDPPDEOHPL[WXUH range or 500 °F to 600 °F.
8QOHVVVSHFL¿HGRWKHUZLVHLQWKLVVHUYLFHPDQXDOOXEULFDWLRQRI 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8VHZLWKWKLVUHFHLYHURQO\WKHWHVW¿[WXUHVVSHFL¿HGLQWKLV type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION'RQRWFRQQHFWWKHWHVW¿[WXUHJURXQGVWUDSWRDQ\ board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
GHYLFHVDUHLQWHJUDWHGFLUFXLWVDQGVRPH¿HOGHIIHFWWUDQVLVWRUV component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques RQO\XQWLOWKHVROGHUÀRZVRQWRDQGDURXQGERWKWKHFRPSR-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.
IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
ZKLFKWKH,&OHDGVDUHLQVHUWHGDQGWKHQEHQWÀDWDJDLQVWWKHFLU- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied LCD TV with LA43B/M chassis
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC

2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
Market Input voltage Frequency Remark
USA 100~240V 50/60Hz Standard Voltage of each
product is marked by
models
4) Specification and performance of each parts are followed

each drawing and specification by part number in
accordance with BOM
5) The receiver must be operated for about 20 minutes prior to
the adjustment
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
Safety : UL, CSA, IEC specification
EMC: FCC, ICES, IEC specification
4. General Specification
No Item 6SHFL¿FDWLRQ Result Remark
1. Receiving System ATSC / NTSC-M / 64 & 256 QAM
2. Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
5) CADTV : 01~135
3. Input Voltage AC 100 ~ 240V 50/60Hz Mark : 110V, 60Hz (N.America)
4. Market NORTH AMERICA
5. Screen Size 42/49 inch Wide (1920 × 1080) FHD + 60Hz All models without HD models
60 Inch Wide (1920X1080) FHD + M120Hz
32 inch Wide (1366 × 768) HD + 60Hz
6. Aspect Ratio 16:9
7. Tuning System FS
8. Module POLA HC600DUF-VHHS1 HS (Sharp Panel) 60LB6000-Ux
HC600DUF-VHHS2 60LB5900-Ux
LC550DUE-FGA3 LGD 55LB6000-Ux
LC550DUE-FGA4 55LB5900-Ux
T550HVF04.1 AUO 55LB6000-Ux.xxxJxxx
T550HVF04.2 55LB5900-Ux.xxxJxxx
HC550DUN-VSHS1 HS (CSOT Panel) 55LB6000-Ux.xxxCxxx
HC550DUN-VSHS2 55LB5900-Ux.xxxCxxx
LC500DUE-FGA3 LGD 50LB6000-Ux.xxxWxxx
LC500DUE-FGA4 50LB5900-Ux.xxxWxxx
NC500DUN-VXBP1 INX 50LB6000-Ux.xxxJxxx
NC500DUN-VXBP2 50LB5900-Ux.xxxJxxx
LC470DUE-FGA3 LGD 47LB6000-Ux
LC470DUE-FGA4 47LB5900-Ux
LC420DUE-FGP2 LGD 42LB6200-Ux
9. Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
10. Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
5. Supported video resolutions
5.1. Component input(Y, CB/PB, CR/PR)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
1 720*480 15.73 60.00 13.5135 SDTV ,DVD 480I
2 720*480 15.73 59.94 13.50 SDTV ,DVD 480I
3 720*480 31.50 60.00 27.027 SDTV 480P
4 720*480 31.47 59.94 27.00 SDTV 480P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1920*1080 33.75 60.00 74.25 HDTV 1080I
8 1920*1080 33.72 59.94 74.176 HDTV 1080I
9 1920*1080 67.50 60.00 148.50 HDTV 1080P
10 1920*1080 67.432 59.94 148.352 HDTV 1080P
11 1920*1080 27.00 24.00 74.25 HDTV 1080P
12 1920*1080 26.97 23.94 74.176 HDTV 1080P
13 1920*1080 33.75 30.00 74.25 HDTV 1080P
14 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.2. HDMI Input (DTV / PC)

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock(MHz) Proposed Remarks
DTV
1 720*480 31.500 60.000 27.027 SDTV 480P
2 720*480 31.470 59.940 27.000 SDTV 480P
3 1280*720 45.000 60.000 74.250 HDTV 720P
4 1280*720 44.960 59.940 74.176 HDTV 720P
5 1920*1080 33.750 60.000 74.250 HDTV 1080I
6 1920*1080 33.720 59.940 74.176 HDTV 1080I
7 1920*1080 67.500 60.000 148.500 HDTV 1080P
8 1920*1080 67.4320 59.940 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.250 HDTV 1080P
10 1920*1080 26.970 23.976 74.176 HDTV 1080P
11 1920*1080 33.750 30.000 74.250 HDTV 1080P
12 1920*1080 33.710 29.970 74.176 HDTV 1080P
PC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 VESA O
7 1280*1024 63.981 60.020 108.0 VESA (SXGA) O Full HD model Only
8 1360*768 47.712 60.015 85.50 VESA (WXGA) O
9 1920*1080 67.50 60.00 148.5 HDTV 1080P O Full HD model Only
6. 3D Mode ('LB6200' models)
6.1. RF Input(DTV)
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1920*1080 45.00 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
2 1280*720 45.00 60.00 74.25 HDTV 720P Side by Side, Top & Bottom
6.2. HDMI Input

(a) HDMI Input(1.4a)
- When connect the cable on TV or change the input mode, 3D display on automatically
- Display OSD information => 1920x2205 [1080p 24], 1280x1470 [720p 60]
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed 3D input proposed mode
1 1280*720 89.9 / 90 59.94/60 148.35/148.50 HDTV 720P Frame packing (720 60p)
2 1280*720 45 60 74.25 HDTV 720P Side by Side(half), Top & Bottom
3 1920*1080 53.95 / 54 23.98 / 24 148.35/148.50 HDTV 1080P Frame packing (1080 24p)
4 1920*1080 67.5 60 148.50 HDTV 1080P Side by Side(half), Top & bottom
5 1920*1080 33.7 60 74.25 HDTV 1080i Side by Side(half), Top & Bottom
6 1920*1080 27 24 74.25 HDTV 1080P Side by Side(half), Top & Bottom
7 1920*1080 33.7 30 74.25 HDTV 1080P Side by Side(half), Top &Bottom
(b) HDMI Input(1.3)

- Connect the HDMI cable & receiving the HDMI signal
- Press “3D” key of remote control & select 3D format below.
2 1920*1080 33.75 60.00 74.25 HDTV 1080I Side by Side, Top & Bottom
5 1920*1080 67.50 60.00 148.5 HDTV 1080P Side by Side, Top & Bottom,
Single Frame Sequential
6.3. USB Input

(a) Movie
E0323LFWXUH'ZKHQVHOHFWLQJWKH032¿OH$XWRPDWLFDOO\'RQ
(c) 3D Demo in store mode
1 1920*1080 33.75 30.00 74.25 HDTV 1080P Side by Side
6.4. 2D to 3D Mode
6.5. DLNA
6.6. Remark: 3D Input mode

No 2D to 3D Top & Bottom Side by Side Single Frame Sequential Frame Packing
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
ADJUSTMENT INSTRUCTION
1. Application 4. MAIN PCBA Adjustments
This spec. sheet applies to LA43B/M Chassis applied LED TV 4.1. ADC Calibration
all models manufactured in TV factory
4.1.1. Overview
ƒ$'&DGMXVWPHQWLVQHHGHGWRILQGWKHRSWLPXPEODFNOHYHO DQG
gain in Analog-to-Digital device and to compensate RGB
2. Specification deviation
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation 4.1.2. Equipment & Condition
transformer will help protect test instrument. (1) Protocol: RS-232C
(2) Adjustment must be done in the correct order. (2) Inner Pattern
(3) The adjustment must be performed in the circumstance of - Resolution : 1080p(Comp) / 1024*768(RGB)
25 ±5 ºC of temperature and 65±10% of relative humidity if - Pattern : Horizontal 100% Color Bar Pattern
there is no specific designation - Pattern level : 0.7±0.1 Vp-p
(4) The input voltage of the receiver must keep 100~240V,
50/60Hz 4.1.3. Adjustment
(5) At first Worker must turn on the SET by using Power Only 4.1.3.1. Adjustment method
key. - Connect to Jig by using RS-232(USB), adjust Component
(6) The receiver must be operated for about 5 minutes prior to
the adjustment when module is in the circumstance of over 䮝 Manual adj (If needed in Final Assembly)
15 ºC - Required equipment : Adjustment R/C
In case of keeping module is in the circumstance of 0°C, it - Enter Service Mode by pushing “ADJ” key,
should be placed in the circumstance of above 15°C for 2 6WDUWµ273¶$'&7\SHE\SXVKLQJµŹ¶NH\DW>$'&&DOLEUDWLRQ@
hours 䮝 In L13 case, Adjust ADC(OTP) is automatically ‘OK’
In case of keeping module is in the circumstance of below
-20°C, it should be placed in the circumstance of above 4.1.3.2. Adj. protocol (only Internal patten)
15°C for 3 hours.
Protocol CMD 1 CMD 2 Data 1 Data 2 Remark
䮝 Caution
Enter adj a a 00 00 When transfer
When still image is displayed for a period of 20 minutes or
mode the ‘Mode
longer (especially where W/B scale is strong. In’,Carry the
Digital pattern 13ch and/or Cross hatch pattern 09ch), there command.
can some afterimage in the black level area
Start a d 00 10 Automatically
ADC adj adjustment (Use
internal pattern)
3. Adjustment items
3.1. Main PCBA Adjustments
(1) ADC adjustment: Component 480i, 1080p / RGB-PC 1080p 4.2. EDID Download
(2) EDID download: HDMI and RGB-PC 4.2.1. Overview
ƒ, W LV D 9(6$ UHJXODWLRQ $ 3& RU D 017 ZLOO GLVSOD\ DQ
Ŷ$ERYH DGMXVWPHQW LWHPV FDQ EH DOVR SHUIRUPHG LQ )LQDO optimal resolution through information sharing without any
Assembly if needed. Adjustment items in both PCBA and necessity of user input. It is a realization of “Plug and Play”.
final assembly tages can be checked by using the INSTART
Menu(1.ADJUST CHECK) 4.2.2. Equipment
Component 1080p and RGB-PC Adjust will be calculated by ƒ6LQFH HPEHGGHG (',' GDWD LV XVHG (',' GRZQORDG -,*
480i adjust value. HDMI cable and D-sub cable are not need.
ƒ$GMXVWE\XVLQJUHPRWHFRQWUROOHU
3.2. Final assembly adjustment

(1) White Balance adjustment
(2) RS-232C functionality check
(3) Factory Option setting per destination
(4) Shipment mode setting (In-Stop)
(5) GND and HI-POT test
3.3. Appendix
(1) Shipment conditions
(2) Tool option menu
(3) USB Download (S/W Update, Option and Service only)
(4) Preset CH Information
4.2.3. Download method
1) Press Adj. key on the Adj. R/C,
2) Select EDID D/L menu.
3) By pressing Enter key, EDID download will begin
4) If Download is successful, OK is display, but If Download is
failure, NG is displayed.
5) If Download is failure, Re-try downloads.
䮝 Caution) When EDID Download, must remove RGB/HDMI

Cable.
4.2.4. EDID DATA
5. Final Assembly Adjustment

5.1. White Balance Adjustment
5.1.1. Overview
5.1.1.1. W/B adj. Objective & How-it-works
(1) Objective: To reduce each Panel’s W/B deviation
(2) How-it-works: When R/G/B gain in the OSD is at 192, it
means the panel is at its Full Dynamic Range.
Ɣ&DVH&RRO0RGH
- To adjust the white balance without the saturation, G gain
should be adjust at least 172 and change the others (R,B
Gain)
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172)
Ɣ&DVH0HGLXP:DUP0RGH
- To adjust the white balance without the saturation, Fix the
one of R/G/B gain to 192 (default data) and decrease the
others.
(3) Adj. condition: normal temperature
- Surrounding Temperature: 25±5 °C
- Warm-up time: About 5 Min
- Surrounding Humidity: 20% ~ 80%
- Before White balance adjustment, Keep power on status,
don’t power off
5.1.1.2. Adj. condition and cautionary items

(1) Lighting condition in surrounding area surrounding lighting
should be lower 10 lux. Try to isolate adj. area into dark
surrounding.
(2) Probe location: Color Analyzer (CA-210) probe should be
within 10cm and perpendicular of the module surface
(80°~ 100°)
(3) Aging time
- After Aging Start, Keep the Power ON status during 5
Minutes.
- In case of LCD, Back-light on should be checked using no
signal or Full-white pattern.
5.1.2. Equipment 5.1.5. Adjustment method
(1) Color Analyzer: CA-210 (NCG: CH 9 / WCG: CH12 / LED: 5.1.5.1. Auto WB calibration
CH14) (1) Set TV in ADJ mode using P-ONLY key (or POWER ON
(2) Adj. Computer (During auto adj., RS-232C protocol is key)
needed) (2) Place optical probe on the center of the display
(3) Adjust Remocon - It need to check probe condition of zero calibration before
(4) Video Signal Generator MSPG-925F 720p/204-Gray adjustment.
(Model: 217, Pattern: 49) (3) Connect RS-232C Cable
ĺ2QO\ZKHQLQWHUQDOSDWWHUQLVQRWDYDLODEOH (4) Select mode in ADJ Program and begin a adjustment.
䮝 Color Analyzer Matrix should be calibrated using CS-1000 (5) When WB adjustment is completed with OK message,
check adjustment status of pre-set mode (Cool, Medium,
5.1.3. Equipment connection Warm)
(6) Remove probe and RS-232C cable.
ƒ:% $GM PXVW EHJLQ DV VWDUW FRPPDQG ³ZE ´ DQG
finish as end command “wb 00 ff”, and Adj. offset if need
5.1.5.2. Manual adjustment

(1) Set TV in Adj. mode using POWER ON
(2) Zero Calibrate the probe of Color Analyzer, then place it on
the center of LCD module within 10cm of the surface..
3UHVV$'- NH\ ĺ (= DGMXVW XVLQJ DGM 5& ĺ :KLWH
%DODQFHWKHQSUHVVWKHFXUVRUWRWKHULJKW.(<Ź
:KHQ .(<Ź LV SUHVVHG *UD\,5( LQWHUQDO
pattern will be displayed)
5.1.4. Adjustment Command (Protocol) (4-a) Adjust modes (Cool) : Fix the G gain at least 172 and
(1) RS-232C Command used during auto-adj. change the others (R/B Gain).
ƒ,I5RU%JDLQLVRYHU*JDLQFDQEHDGMXVWEHORZ
RS-232C COMMAND (4-b) Adjust two modes ( Medium / Warm) : Fix the one of
Explanation
CMD DATA ID R/G/B gain to 192 (default data) and decrease the
others.
Wb 00 00 Begin White Balance adj.
Wb 00 ff End White Balance adj. 䮝 CASE : Cool mode
(internal pattern disappears ) First adjust the coordinate far away from the target value(x,
y).B
(2) Adjustment Map (1) x, y >target
Adj. item Command Data Range (2) x, y< target
(lower caseASCII) (Hex.) (3) x >target , y< target
(4) x < target , y >target
CMD1 CMD2 MIN MAX
(YHU\FDVHKDYHWR¿W\YDOXHE\DGMXVWLQJ%*DLQDQG
Cool R Gain j g 00 C0 WKHQ¿W[YDOXHE\DGMXVWLQJ5*DLQ
G Gain j h 00 C0 - In this case, increasing/decreasing of B Gain and R Gain
can be adjusted.
B Gain j i 00 C0
Medium R Gain j a 00 C0 Ź+RZWRDGMXVW
G Gain j b 00 C0 (1) Fix G gain at least 172 : Adjust R, B Gain ( In Case of
Mostly Blue Gain Saturation )
B Gain j c 00 C0
(2) When R or B Gain > 255, Release Fixed G Gain and
Warm R Gain j d 00 C0 Readjust
G Gain j e 00 C0
䮝 CASE : Medium / Warm mode
B Gain j f 00 C0 First adjust the coordinate far away from the target value(x, y).
(1) x, y >target
i) Decrease the R, G.
(2) x, y< target
i) First decrease the B gain,
ii) Decrease the one of the others.
(3) x >target , y< target
i) First decrease B, so make y a little more than the target.
ii) Adjust x value by decreasing the R
(4) x < target , y >target
i) First decrease B, so make x a little more than the target.
ii) Adjust x value by decreasing the G
5.1.6. Reference (White Balance Adj. coordinate and ** INX, AUO, Sharp, CSOT Models (Cool Mode Spec :
color temperature) 13000K)
ƒ/XPLQDQFH*UD\,5( ƒ6 WDQGDUG FRORU FRRUGLQDWH DQG WHPSHUDWXUH XVLQJ
CA-210(CH-14) – by aging time
** (normal line) LGD Cell (LB5xxx, LB6xxx, LB7xxx, LB8xxx) cool med warm
** Except Gumi winter season (Mar ~ Dec) & Global
x y x y x y
ƒ6 WDQGDUG FRORU FRRUGLQDWH DQG WHPSHUDWXUH XVLQJ
CA-210(CH-14) – by aging time spec 271 270 286 289 313 329
Cool Medium Warm target 278 280 293 299 320 339
Aging time
L14 X Y X Y X Y
(Min) 5.2. Option selection per country
271 270 286 289 313 329
1 0-2 282 289 297 308 324 348
5.2.1. Overview
(1) Tool option selection is only done for models in Non-USA
2 3-5 281 287 296 306 323 346 North America due to rating
3 6-9 279 284 294 303 321 343 (2) Applied model: LA43B/M Chassis applied to CANADA and
MEXICO
4 10-19 277 280 292 299 319 339
5 20-35 275 277 290 296 317 336
5.2.2. Country Group selection
6 36-49 274 274 289 293 316 333 (1) Press ADJ key on the Adj. R/C, and then select Country
7 50-79 273 272 288 291 315 331 Group Menu
(2) Depending on destination, select US, then on the lower
8 80-119 272 271 287 290 314 330
Country option, select US, CA, MX.
9 Over 120 271 270 286 289 313 329 Selection is done using +, - KEY
** (Aging chamber) LGD Cell (LB5xxx, LB6xxx, LB7xxx,

LB8xxx)
** (normal line) LGD Cell (LB5xxx, LB6xxx, LB7xxx, LB8xxx)

** Gumi winter season (Jan ~ Feb) & Global, except Cinema
Screen models
Cool Medium Warm
Aging time
GP4 X Y X Y X Y
(Min)
271 270 286 289 313 329
1 0-2 286 295 301 314 328 354
2 3-5 284 290 299 309 326 349
3 6-9 282 287 297 306 324 346
4 10-19 279 283 294 302 321 342
5 20-35 276 278 291 297 318 337
6 36-49 274 275 289 294 316 334
7 50-79 273 272 288 291 315 331
8 80-119 272 271 287 290 314 330
9 Over 120 271 270 286 289 313 329
5.3. 3D Module inspection 6. GND and HI-POT Test
5.3.1. Test equipment 6.1. GND & HI-POT auto-check preparation
(1) Pattern Generator MSHG-600 or MSPG-6100 (HDMI 1.4 (1) Check the POWER CABLE and SIGNAL CABE insertion
support) condition
(2) Pattern: HDMI mode (model No. 872, pattern No. 83)
6.2. GND & HI-POT auto-check
5.3.2. Test method (1) Pallet moves in the station. (POWER CORD / AV CORD is
(1) Start 3D pattern inspection tightly inserted)
(2) Connect the AV JACK Tester.
(3) Controller (GWS103-4) on.
(4) GND Test (Auto)
- If Test is failed, Buzzer operates.
- If Test is passed, execute next process (Hi-pot test).
(Remove A/V CORD from A/V JACK BOX)
(5) HI-POT test (Auto)
Fig.1 <model No. 872, pattern No. 83> - If Test is failed, Buzzer operates.
- If Test is passed, GOOD Lamp on and move to next process
(2) check the 3D patterm with 3D FPR Glasses or L/R Film. automatically.
6.3. Checkpoint
(1) Test voltage
- GND: 1.5KV/min at 100mA
- SIGNAL: 3KV/min at 100mA
(2) TEST time: 1 second
(3) TEST POINT
- GND Test = POWER CORD GND and SIGNAL CABLE GND.
- Hi-pot Test = POWER CORD GND and LIVE & NEUTRAL.
(4) LEAKAGE CURRENT: At 0.5mArms
7. AUDIO output check

7.1. Audio input condition
(1) RF input: Mono, 1KHz sine wave signal, 100% Modulation
(2) CVBS, Component: 1KHz sine wave signal (0.4Vrms)
(3) RGB PC: 1KHz sine wave signal (0.7Vrms)
(3) If 3D Module is correctly worked, The 3D FPR Glasses is
change Color. 7.2. Specification
Left is Red. Right is Blue
No Item Min Typ Max Unit Remark
1 Audio practi- 9.0 10.0 12.0 W (1) Measurement
cal max 8.5 8.9 9.9 Vrms condition
Output, L/R - EQ/AVL/Clear
(Distor- Voice: Off
tion=10% 6SHDNHU
max Output) Impedance)
(3) 60LB6000-UH
2 Audio practi- 9.0 10.0 12.0 W (1) Measurement
cal max 8.5 8.9 9.9 Vrms condition
Output, L/R - EQ/AVL/Clear
(Distor- Voice: Off
tion=10% 6SHDNHU
max Output) Impedance)
(3)
8. USB S/W Download
(optional, Service only)
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
- If your downloaded program version in USB Stick is lower
than that of TV set, it didn’t work. Otherwise USB data is
automatically detected.
(3) Show the message “Copying files from memory”
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically

(6) If your TV is turned on, check your updated version and
Tool option.
* If downloading version is more high than your TV have, TV
can lost all channel data. In this case, you have to channel
recover. If all channel data is cleared, you didn’t have a DTV/
ATV test on production line.
* After downloading, TOOL OPTION setting is needed again.

(1) Push "IN-START" key in service remote controller.
(2) Select "Tool Option 1" and Push “OK” button.
(3) Punch in the number. (Each model has their number.)
TROUBLE SHOOTING
1. Power-up boot check
Check stand-by Voltage. No ok Main B/D 3.5V Line ok
Check Power connector Replace Power board.
P401 3, 5, 6pin : +3.5V_ST Short Check
ok
Check Micom Voltage No Replace L206
L206 : +3.3V (AVDD_NODIE)
ok
Check X101 clock No Replace X101
24 MHz
ok
No
Check P401 PWR_ON. No Re-download sof tware.(IC102, IC1300) Replace Mstar(IC101) or Main board
1pin : 3.3V
ok
Check Multi Voltage No Replace Power Board
P401 9pin:24V ,13pin:12V
ok
Check IC403/4 Output Voltage
IC403 : 1.15V / IC404 : 1.5V No Replace IC403/4, Q406
Q406 : 3.3V
ok
Check LVDS Power Voltage No
Q405 : 12V Replace Q405
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board
ok
Check Inverter Control No Check Power Board or Module

P401 2 pin : High
ok
Change Module
2. Digital / Analog TV Video
Check RF Cable & Signal
ok
Check Tuner 3.3V Power No
Replace L1600
L1600
ok
Check IF_P/N Signal No
Bad Tuner. Replace Tuner.
TU1601 6/7 Pin
ok
No
Check Mstar LVDS Output Replace Mstar(IC101) or Main Board.
3. AV Video
Check input signal f ormat.

Is it supported?
ok
Check AV Cable f or damage
f or damage or open conductor
ok
Check JK1702, CVBS Signal Line No
Replace Jack
R1707
ok
Check CVBS_DET Signal No
Replace R1713 or R1710
R1713
ok
No
4. Component Video

Is it supported?
ok
Check Component Cable
f or damage or open conductor.
ok
Check JK1702 No
Replace Jack
Y/PB/PR signal Line
ok
No
Check COMP_DET Signal Replace R1709 or R1712
ok
No
5. HDMI Video

Is it supported?
ok
Check HDMI Cable conductors
f or damage or open conductor.
ok
Check EDID No
Re-download EDID data
R810,R811,R815,R816 I2C Signal
ok
No
Check JK800, JK801 Replace Jack
ok
No
Check HDMI_DET(HPD) Replace R809, R814
ok
No Check other set No

Check HDMI Signal Replace Main Board
If no problem, check signal line
ok
No
6. All Source Audio
Check the TV Speaker Menu Of f

Toggle the Menu
(Menu -> Audio -> Sound Out -> TV Speaker)
On
Check speaker resistance No
Replace speaker.
and connector damage.
ok
Check AMP IC(IC5600) Power No

Replace Amp IC(IC5600)
24V, 3.3V
ok
Check Mstar AUDIO_MASTER_CLK No
Replace Mstar(IC101) or Main Board.
IC5600 15 Pin
ok
Check AMP I2C Line No
Check signal line. Or replace Mstar(IC101)
IC5600 23,24 Pin
ok
Check Mstar I2S Output No
Check signal line. Or replace Mstar(IC101)
IC5600 20,21,22 Pin
ok
Check Output Signal P5600 No

Replace Audio AMP IC(IC5600)
1, 2, 3, 4 pin.
ok
No Replace connector
Check Connector & P5600
if f ound to be damaged.
7. Digital / Analog TV Audio
Check RF Cable & Signal
ok
Check Tuner 3.3V Power No
Replace L1600
L1600
ok
Check IF_P/N Signal No
Bad Tuner. Replace Tuner.
TU1601 6/7 Pin
ok
Follow procedure
‘6. All source audio’
trouble shooting guide.
8. AV/Comp Audio
Check AV Cable f or damage
f or damage or open conductor
ok
Check JK1702 Signal Line No
Replace Jack
R1714,R1715
ok
Follow procedure
‘7. All source audio’
trouble shooting guide.
Copyright ©
1. 2D Model
SIDE_USB_DM/DP IC1300
SPI_SCK/SDI/SDO/CS Serial Flash
+5V_USB USB1_OCD/CTL
USB TPS65282 (8Mbit)
(JK700)
IC104
SIDE I2C_SCL/SDA
CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC
System EEPROM
(256Kbit)

HDMI2(MHL)
(JK803) MHL_CD_SENSE
IC102
Headphone HP_L/ROUT, SIDE_HP_MUTE PCM_A[0-7],…
NAND FLASH
(JK1500) (1Gbit)
D_IF
LG Electronics. Inc. All rights reserved.

TU_SCL / SDA
SIF
CVBS
Main SOC
M1A -256MB
(IC101)
- 22 -
AUD_MASTER_CLK,
AUD_LRCH, SPK_L
AUD_LRCK, AUD_SCK
TAS5733
AMP_SCL/SDA (IC5600)
SPK_R
BLOCK DIAGRAM
KEY1/2, LED_R, IR
Connector
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2 (P600)
HDMI1 DDC_SCL/SDA_2, HDMI_CEC
(JK801)
(P1100)
SPDIF(Optic) SPDIF_OUT (P1101)
(JK1001) < FHD >
RXA0+/-~RXA4+/-, RXACK+/-
RXB0+/-~RXB4+/-, RXBCK+/-
REAR
< HD >
COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+ RXA0+/-~RXA3+/-, RXACK+/-
Comp1 & AV1
(JK1701) COMP2_L/R_IN
30P HD LVDS wafer
51P FHD LVDS wafer
LGE Internal Use Only

Copyright ©
2. 3D Model
SIDE_USB_DM/DP IC1300
SPI_SCK/SDI/SDO/CS Serial Flash
+5V_USB USB1_OCD/CTL
USB TPS65282 (8Mbit)
(JK700)
IC104
SIDE I2C_SCL/SDA
CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC
System EEPROM
(256Kbit)

HDMI2(MHL)
(JK803) MHL_CD_SENSE
IC102
Headphone HP_L/ROUT, SIDE_HP_MUTE PCM_A[0-7],…
NAND FLASH
(JK1500) (1Gbit)
D_IF

TU_SCL / SDA
IC1201
SIF
B-MDQL[0-7], B-MDQU[0-7],…
Main SOC DDR3 SDRAM
CVBS
DDR CLK (Max) : 792 MHz (1Gbit)
M1A -128MB ⇨㣙
(IC101)
- 23 -
AUD_MASTER_CLK,
AUD_LRCH, SPK_L
AUD_LRCK, AUD_SCK
TAS5733
AMP_SCL/SDA (IC5600)
SPK_R
KEY1/2, LED_R, IR
Connector
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2 (P600)
HDMI1 DDC_SCL/SDA_2, HDMI_CEC
(JK801)
(P1100)
SPDIF(Optic) SPDIF_OUT (P1101)
(JK1001) < FHD >
RXA0+/-~RXA4+/-, RXACK+/-
RXB0+/-~RXB4+/-, RXBCK+/-
REAR
< HD >
COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+ RXA0+/-~RXA3+/-, RXACK+/-
Comp1 & AV1
(JK1701) COMP2_L/R_IN
30P HD LVDS wafer
51P FHD LVDS wafer

Copyright ©
HW_I2C TUNER
3. I2C Map
I2C_SC(D)KM1/GPIO80(81)
SW_I2C

AMP
GPIO159(160)
DEMOD

LNB
- 24 -
SW_I2C EEPROM
I2C_SC(D)KM3/I2C_DDCR_CK/GPIO76/(77)
HW_I2C
URSA
SDAM2/GPIO55(56)
VCOM
HW_I2C
SCK(D)M0/GPIO58(59) Digital_Eye
HW I2C 4ea + SW I2C 1ea

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
900
400
521
410
540
350
LV1
121
530
120
LGD Module
200T
Set + Stand
200
A10
A2
TP for NON-EU models(except EU and China)
TP for CI slot TP for SCART TP for Headphone

/PCM_REG PCM_D[0] PCM_A[8] CI_TS_CLK SCART1_MUTE HP_LOUT
/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT
/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE
/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] HP_DET
/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT
/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout
/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout
/PCM_CD PCM_D[7] CI_TS_DATA[4]
/PCM_WAIT CI_TS_DATA[5] SC1_R+/COMP1_Pr+
PCM_RST CI_TS_DATA[6] SC1_G+/COMP1_Y+
PCM_5V_CTL CI_TS_DATA[7] SC1_B+/COMP1_Pb+
/CI_DET SC1/COMP1_DET
SC1/COMP1_L_IN
SC1/COMP1_R_IN
TP for S2 TP for FE_TS_DATA
FE_TS_DATA[1]
FE_TS_DATA[2]
FE_TS_DATA[3]
FE_TS_DATA[4]
FE_TS_DATA[5]
FE_TS_DATA[6]
FE_TS_DATA[7]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_L14 2013.05.09
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TP_NON_EN 3
Copyright © 2014 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
L14 POWER BLOCK (POWER DETECT 2)
+24V +12V +3.5V_POWER_DET +3.5V_ST FET_NXP

R435 Power_DET Q405-*1
FROM LIPS or POWER B/D 100K PD_+3.5V PANEL_VCC PMV48XP
OPT OPT R454-*1
S
D
+3.5V_ST OPT +12V PANEL_VCC
R457 R430 R432 300
Q401 R438
8.2K 2.7K 0
1% 5% 5% 4.7K
MMBT3906(NXP) 1% RESET_IC_ROHM
G
IC401
BD48K28G PD_+12V
R454 L408 FET_Diode
1 3 100 5% UBW2012-121F Q405
OPT VDD 3 2 VOUT
POWER_DET 120OHM DMP2130L
R412
RESET_IC_DIODES
S
D
R406 2 33K 1
10K C415 R431 IC401-*1
0.1uF GND C422 OPT
+3.5V_ST 1.2K APX803D29
R404 16V POWER_DET_RESET 0.1uF C425 R445 C427 R451 R452
1% 10uF 5.6K 5.6K
4.7K 0.1uF 33K G
VCC RESET 25V 16V
OPT OPT 3 2
R400 +3.5V_POWER_DET R436
10K +24V 1
C Q400 100K
R402 R446
10K B MMBT3904(NXP) GND
12K
RL_ON OPT OPT
OPT OPT
R401 R455 R427 R458 IC402 IC402-*1
E +3.3V_Normal 27K 0 BD48K28G OPT R442 C
10K 0 R437 APX803D29
1% 5% 100 5% 10K B Q403
OPT VDD 3 2 VOUT PANEL_CTL
R456 MMBT3904(NXP)
0 +3.5V_ST VCC 3 2 RESET
R420 OPT OPT 1 R441 E
1K C413 R428 GND 1 10K
ZD404 0.1uF 5.1K
5V R419 16V 1% GND
100 R426
+3.5V_POWER_DET 10K
P401 C Ready - Dual Power Det
R425 Power Detect activity
SMAW200-H18S5 B 10K
L400 INV_CTL
CB2012PK501T
+3.5V_ST Detect Valtage Now is Use Circuit Designator FET_2.5V_DIODE
E Q402 FET_NXP
PWR ON 1 2 DRV ON MMBT3904(NXP) Q406-*1
C407 C400 L401 Q406-*2
10uF 1uF ZD400 CB2012PK501T 3.5V PDIM#1 DMP2130L
10V 10V 3 4 PWM_DIM Power Detect +3.5V R432, R454-*1, R438 +3.3V_Normal PMV48XP
5V
S
D
S
D
2012 1005 3.5V 5 6 3.5V

OPT GND PDMI#2
L402 7 8 PWM1 * Notice Power Detect +12V O R430, R431, R454
MLB-201209-0120P-N2 24V 24V
+24V 9 10 PWM_DIM_PULL_DOWN PWM2_2CH_POWER - Applying all inch models for LCD L14 +3.5V_ST
G
G
OPT +3.3V_Normal
+24V_CAP GND GND R424 R423
C401 11 12 R467 - Dual Power Det is used
C432 3.9K 100 Power Detect +24V R457, R454
0.1uF 12V 13 14 12V 1K for detecting two kinds of voltage
4.7uF
50V 12V NC FET_2.5V_AOS
50V 15 16
Q406 L410
3216 GND 17 18 GND
L403 AO3435 BLM18PG121SN1D
MLB-201209-0120P-N2
S
D
+12V
+12V_CAP
C433 C402 19
4.7uF 0.1uF
.
+1.10V_VDDC
G
16V 16V R443 R447 C428 C429 C430

+3.5V_ST 2.2uF 0.1uF 22uF ZD402
3216 10K 22K 5V
IC403 +3.3V_Normal 10V 16V 10V
L406 TPS5432DDAR [EP]GND
CB2012PK501T
C418
OPT 0.01uF
C437 C436 C414 C435 BOOT SS R429 R448
1 8 2.2K
0.1uF 10uF 10uF 0.1uF 10K
16V 10V 10V 16V
VIN EN
9
+1.10V_VDDC C
2 7 R444
C417 POWER_ON/OFF_1 10K
THERMAL
Vout=1.25*(1+R2/R1)+Iadj*R2 L407 B Q404
+1.5V_DDR 3.6uH 0.1uF MMBT3904(NXP)
16V PH COMP
3 6 C416
+3.3V_Normal +1.5V_DDR 3A 0.33uF E
OPT R433 16V
ZD401 C424 C421 C420 GND VSENSE 2.7K
22uF 22uF 4 5
IC404 L411 2.5V 0.1uF 1%
L409 10V 10V
AZ1117EH-ADJTRG1 CB2012PK501T 16V C419 C434
BLM18PG121SN1D C423 R439 0.039uF 390pF
50V 20K
R1 50V 50V
270pF 1%
IN OUT
ADJ/GND
C426 R449 R453 ZD403
10uF 1K R1 0 2.5V R440 R2
10V 1/16W 47K
1% C431 1%
10uF
1.3A R450 10V
200 R2
1/16W
1%
Vout=0.808*(1+R1/R2)
+5V_Normal & +5V_USB with OCP

+12V
C405 C406
10uF 10uF
16V
OPT R410
100K
C403
[EP]GND
V7V
PGOOD
VIN_2
VIN_1
PGND_2
PGND_1
100pF +5V_Normal
50V C409 L405
0.047uF
24
23
22
21
20
19
25V 4.7uH
C404 EN BST
R408 4700pF 1 18
4.7K 50V THERMAL
+3.3V_Normal COMP
25
LX_2 R421 C411 C412
2 17 18K 82pF 22uF
+3.3V_Normal OPT SS LX_1 1% 50V 16V
R459 3 16
OPT OPT 0 IC400 R1
ROSC FB
R403 R405 4 15
4.7K 4.7K TPS65282REGR
EN_SW2 SW_IN_2 R2
MHL_5V_EN 5 14
MHL_SW_TR MHL_SW_TR R422
R463 R464 EN_SW1 4A SW_IN_1 3.3K
USB1_CTL 6 13 1%
2.7K 10K
7
8
9
10
11
12
MHL_SW_TR +3.3V_Normal C410
+5V_USB 10uF
Q408 10V
E C
RLIM
AGND
MHL_5V_EN R407 R409
FAULT2
FAULT1
SW_OUT2
SW_OUT1
MHL_SW_TR 10K 10K
C
R461 R415 5V_HDMI_4 AVDD5V_MHL
10K B R466
B 15K
/VBUS_EN 20K
5%
D401 R418
(Active Low) MHL_SW_TR MBR230LSFT1G
E MHL_SW_TR
Q407 R465 30V 10
10K
MHL_SW_TR C OPT C408
R462 R416 10uF
10K B 100K 10V
MHL_OCP_EN
MHL_SW_TR
(Active High) Q409 E
USB1_OCD
/MHL_OCP_DET
Vout=0.8*(1+R1/R2)

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 131123
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. Power_PD2 4
USB 3216 CAP(SIDE)
+5V_USB
JK700
ZD700 C703 C704
SD05 C700
1
5V 22uF 22uF 22uF
OPT 16V 16V 16V
2
SIDE_USB1_DM
3
SIDE_USB1_DP
OPT OPT OPT
C701 C702 D700
5pF 5pF
USB DOWN STREAM

RCLAMP0502BA
3AU04S-305-ZC-(LG)
4
50V 50V
5
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 13/11/16
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_S1 66
HDMI (REAR 1 / SIDE 1 MHL)
HDMI_1 HDMI_2 MHL
VA805
5V_HDMI_2 5V_DET_HDMI_2 5V_HDMI_4 5V_DET_HDMI_4
ESD_HDMI2
R808
HDMI-2
10K R814
HPD4
ESD_HDMI2 33
SHIELD
R803 GND VA808
C HDMI-2
20 R809 R815 100
1K 10K 20
Q800 B DDC_SDA_4
MMBT3904(NXP) HPD2
19 HP_DET R816 100
19 DDC_SCL_4
R802 E R810 100 HDMI-2
VA802 DDC_SDA_2 5V R812
18 1.8K 18
ESD_HDMI1 R811 100 VA809 VA810
VA800 1.8K R813
DDC_SCL_2 GND HDMI-2 ESD_HDMI2 ESD_HDMI2
17 3.3K
R805
3.3K
17
HDMI-2
VA803 VA804 16 DDC_DATA
16 ESD_HDMI1_VARISTOR
ESD_HDMI1 ESD_HDMI1
15 DDC_CLK HDMI_CEC
15 VA811
HDMI_ARC NC ESD_HDMI2
14 14
HDMI_CEC
13 CE_REMOTE
13
D803 12 CK-
12 D805
1 10 CK-_HDMI2
11 CK_GND 1 10
11 CK-_HDMI4
CK+ 2 9
10 CK+_HDMI2 CK+ 2 9
10
EAG59023302
D0- CK+_HDMI4
EAG62611204
9
3 8 D0-
9
3 8
D0_GND 4 7
8 D0-_HDMI2 D0_GND 4 7
8 D0-_HDMI4
D0+ 5 6
7 D0+_HDMI2 D0+ 5 6
7 D0+_HDMI4
D1- BODY_SHIELD
6 ESD_HDMI1_IP4294 D1-
6 ESD_HDMI2_IP4294
D1_GND IP4294CZ10-TBR 20
5 D1_GND
19 IP4294CZ10-TBR
HOT_PLUG_DETECT 5
18
D1+ D804 VDD[+5V]
17
DDC/CEC_GND
4 16
D1+
1 10 SDA D806
D1-_HDMI2 15
SCL
4
D2- 14
RESERVED
3 13 D2-
1 10
CEC D1-_HDMI4
12
2 9 D1+_HDMI2 TMDS_CLK-
3
11
D2_GND TMDS_CLK_SHIELD 2 9
10
2 TMDS_CLK+ D2_GND
9 D1+_HDMI4
TMDS_DATA0-
3 8 8
2
D2+ TMDS_DATA0_SHIELD
7
1 TMDS_DATA0+
D2+
3 8
6
4 7 TMDS_DATA1-
D2-_HDMI2 5
TMDS_DATA1_SHIELD
1
4
TMDS_DATA1+
3
4 7
TMDS_DATA2- D2-_HDMI4
VA801 2
5 6 D2+_HDMI2 TMDS_DATA2_SHIELD
1
ESD_HDMI1_VARISTOR TMDS_DATA2+ 5 6
JK800 D2+_HDMI4
JK801-*1 JK801 ESD_HDMI2
ESD_HDMI1_IP4294 DAADR019A HDMI-2
VA800-*1 VA806 ESD_HDMI2_IP4294
1uF IP4294CZ10-TBR HDMI-2_EMI_FOOSUNG
10V IP4294CZ10-TBR
ESD_HDMI1_CAP
MHL_CD_SENSE
VA801-*1
1uF C800
10V VA807 0.047uF R817
ESD_HDMI1_CAP 5.6V 25V 300K
OPT
MHL Spec
HDMI-2 HDMI-2
D803-*1 D804-*1 D805-*1 D806-*1
TMDS_CH1- NC_4 TMDS_CH1- NC_4 TMDS_CH1- NC_4 TMDS_CH1- NC_4

1 10 1 10 1 10 1 10
TMDS_CH1+ NC_3 TMDS_CH1+ NC_3 TMDS_CH1+ NC_3 TMDS_CH1+ NC_3

CEC 2 9 2 9 2 9 2 9
GND_1 GND_2 GND_1 GND_2 GND_1 GND_2 GND_1 GND_2

3 8 3 8 3 8 3 8
TMDS_CH2- NC_2 TMDS_CH2- NC_2 TMDS_CH2- NC_2 TMDS_CH2- NC_2

4 7 4 7 4 7 4 7
TMDS_CH2+ NC_1 TMDS_CH2+ NC_1 TMDS_CH2+ NC_1 TMDS_CH2+ NC_1

5 6 5 6 5 6 5 6
R804
100
HDMI_CEC CEC_REMOTE_S7 ESD_HDMI1_IP4283 ESD_HDMI1_IP4283 ESD_HDMI2_IP4283 ESD_HDMI2_IP4283
IP4283CZ10-TBA IP4283CZ10-TBA IP4283CZ10-TBA IP4283CZ10-TBA
D803-*2 D804-*2 D805-*2 D806-*2

1 10 1 10 1 10 1 10
5V_HDMI_4 +5V_Normal 2 9 2 9 2 9 2 9
5V_HDMI_2 +5V_Normal +3.5V_ST
3 8 3 8 3 8 3 8
4 7 4 7 4 7 4 7
A1
A2
A1
A2
5 6 5 6 5 6 5 6
A1
A2
MMBD6100 MMBD6100
MMBD6100 D801 D802
D800 ESD_HDMI1_SEMTECH ESD_HDMI1_SEMTECH ESD_HDMI2_SEMTECH ESD_HDMI2_SEMTECH
C
C
RCLAMP0524PA RCLAMP0524PA RCLAMP0524PA RCLAMP0524PA
C
R800 R801 R806 R807
2.7K 2.7K
2.7K 2.7K
DDC_SDA_4
DDC_SDA_2
DDC_SCL_4
DDC_SCL_2

HDMI_R1_S1 8
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPDIF
SPDIF OPTIC JACK

+3.3V_Normal
5.15 Mstar Circuit Application
SPDIF_OPTIC
JK1001
JST1223-001
GND
1
VCC
2
VINPUT
Fiber Optic
3
SPDIF_OUT
4
SPDIF_CAP_47pF
C1001 C1002
OPT 1uF 47pF
10V 50V
SPDIF_CAP_18pF
C1002-*1
FIX_POLE
ESD Ready 18pF
50V

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_L14 2013/10/29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SPDIF 10
LVDS (NON EU)
[51Pin LVDS Connector] FOR FHD REVERSE(10bit) [30Pin LVDS Connector]

(For FHD 60Hz) (For HD 60Hz_Normal)
Change in S7LR
MO_FHD MO_HD
P1100 MIRROR Pol-change P1101
FI-RE51S-HF-J-R1500 10031HR-30
RXA4+ RXA0+ RXA0-
. RXA4- RXA0- RXA0+

1 1
. RXA3+ RXA1+ RXA1-
2 2
. LVDS_SEL RXA3- RXA1- RXA1+
3 3 VCOM_SCL
. RXACK+ RXA2+ RXA2-
4 +3.3V_Normal 4
VCOM_SDA VCOM_SDA
. RXACK- RXA2- RXA2+
5 VCOM_SCL 5
. OPT RXA2+ RXACK+ RXACK-
6 R1103 6 RXA3+
3.3K RXA2- RXACK- RXACK+
.
7 7 RXA3-
. RXA1+ RXA3+ RXA3-
8 OPT 8
R1104
. RXA1- RXA3- RXA3+
9 10K 9 RXACK+
. RXA0+ RXA4+ RXA4-
10 10 RXACK-
. RXA0- RXA4- RXA4+
11 11
RXA0-
12 RXA4+ 12 RXA2+
RXA0+ RXB4+ RXB0+ RXB0-
13 RXA4- 13 RXA2-
RXA1- RXB4- RXB0- RXB0+
14 RXA3+ 14
RXA1+ RXB3+ RXB1+ RXB1-
15 RXA3- 15 RXA1+
16 RXACK+ 16 RXA1-
RXA2+ RXBCK+ RXB2+ RXB2-
17 RXACK- 17
. LVDS_SEL
18 RXBCK- RXB2- RXB2+ 18 RXA0+
RXACK- RXB2+ RXBCK+ RXBCK- +3.3V_Normal
19 RXA2+ 19 RXA0-
RXACK+ RXB2- RXBCK- RXBCK+
20 RXA2- 20
. OPT
21 RXB1+ RXB3+ RXB3- 21 R1109
3.3K
22 RXA1+ 22
RXA3+ PANEL_VCC
23 RXB0+ RXB4+ RXB4- 23 OPT
RXA1- R1110
RXA4- RXB0- RXB4- RXB4+ 10K
24 RXA0+ 24 MO_HD
RXA4+ L1101
25 RXA0- 25 120OHM
. UBW2012-121F
26 R1100 0 26
. MO_FHD
27 27
RXB0-
28 RXB4+ 28 MO_HD
RXB0+ C1101
29 RXB4- 29
0.1uF
RXB1- 16V
30 RXB3+ FOR FHD REVERSE(8bit) 30
RXB1+
31 RXB3- 31
RXB2- Change in S7LR
32 RXBCK+
RXB2+
33 RXBCK-
. MIRROR Pol-change Shift
34
RXBCK- RXA4+ RXA4+ RXA4- RXA0-
35 RXB2+
RXBCK- RXA4- RXA4- RXA4+ RXA0+
36 RXB2-
. RXA3+ RXA0+ RXA0- RXA1-
37
RXB3- RXA3- RXA0- RXA0+ RXA1+
38 RXB1+
RXB3+ RXACK+ RXA1+ RXA1- RXA2-
39 RXB1-
RXB4- RXACK- RXA1- RXA1+ RXA2+
40 RXB0+
RXB4+ RXA2+ RXA2+ RXA2- RXACK-
41 RXB0- MO_FHD
. RXA2- RXA2- RXA2+ RXACK+
42 R1101 0
. RXA1+ RXACK+ RXACK- RXA3-
43 R1102 0
PANEL_VCC
. RXA1- RXACK- RXACK+ RXA3+
44 MO_FHD
. MO_FHD RXA0+ RXA3+ RXA3- RXA4-
45
L1100
. 120OHM RXA0- RXA3- RXA3+ RXA4+
46
UBW2012-121F
.
47
. RXB4+ RXB4+ RXB4- RXB0-
48
. MO_FHD
49 RXB4- RXB4- RXB4+ RXB0+
C1100
. 0.1uF
50 RXB3+ RXB0+ RXB0- RXB1- EU pin assign is different from NON EU.
16V
. RXB3- RXB0- RXB0+ RXB1+
51 Because of position of HD wafer.
RXBCK+ RXB1+ RXB1- RXB2-
52
RXBCK- RXB1- RXB1+ RXB2+
. RXB2+ RXB2+ RXB2- RXBCK-
RXB2- RXB2- RXB2+ RXBCK+ V-COM I2C

RXB1+ RXBCK+ RXBCK- RXB3-
RXB1- RXBCK- RXBCK+ RXB3+ +3.3V_Normal
RXB0+ RXB3+ RXB3- RXB4-
RXB0- RXB3- RXB3+ RXB4+

VCOM_I2C_PULL_UP VCOM_I2C_PULL_UP
R1114 R1115
2K 2K
VCOM_I2C
R1105
0
VCOM_SCL URSA/VCOM_SCL URSA/VCOM_SCL
R1106
0
VCOM_SDA URSA/VCOM_SDA URSA/VCOM_SDA
VCOM_I2C

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_S7LR(M1A) 2013/05/22
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_NON_EU 11
+1.5V_DDR +1.5V_DDR Option : Ripple Check !!!
+1.5V_DDR +1.5V_DDR
R12011K1%
DDR_EXT
DDR_EXT
A-MVREFDQ A-MVREFCA
1K1%
1uF
1uF
1uF
1uF
1uF
C1219
C1220
C1221
C1222
C1223
0.1uF
0.1uF
0.1uF
C1217
C1218
C1224
C1216
10uF 10V
DDR_EXT
DDR_EXT
DDR_EXT
DDR_EXT
OPT OPT OPT OPT OPT OPT OPT OPT
DDR_EXT
DDR_EXT
R1205 1K 1% R1204 1K 1%
OPT
R1202
C1201 0.1uF
C1213 0.1uF
C1202 1000pF
C12141000pF
CLose to DDR3 CLose to Saturn7M IC
DDR_1600_1G_HYNIX
IC1201 M1A_256M M1A_128M
H5TQ1G63EFR-PBC IC101 IC101-*1
DDR_1600_1G_SS DDR_1600_2G_HYNIX_OLD DDR_1600_2G_HYNIX_NEW DDR_1600_2G_SS LGE2132(M1A_256M) LGE2131(M1A_128M)
EAN61829003
IC1201-*1 IC1201-*2 IC1201-*3 IC1201-*4
M8 N3
K4B1G1646G-BCK0 H5TQ2G63DFR-PBC H5TQ2G63FFR-PBC K4B2G1646Q-BCK0 A-MVREFCA VREFCA A0 A-MA0
EAN61836301 EAN61829203 EAN61829204 EAN61848803 P7
A1 A-MA1 E11 E11
N3 M8 N3 M8 N3 M8 N3 M8 P3 A-MA0
P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA
P7
A0 VREFCA B_DDR3_A[0] B_DDR3_A[0]
A1 A1 A1 A1 A2 A-MA2 F12 F12
P3 P3 P3 P3 H1 N2 A-MA1
N2
A2
H1 N2
A2
H1 N2
A2
H1 N2
A2
H1
B_DDR3_A[1] B_DDR3_A[1]
A3 VREFDQ A3 VREFDQ A3 VREFDQ A3 VREFDQ A-MVREFDQ VREFDQ A3 A-MA3 D10 D10
P8 P8 P8 P8 P8 A-MA2
P2
A4
P2
A4
P2
A4
P2
A4 B_DDR3_A[2] B_DDR3_A[2]
A5 A5 A5 A5 A4 A-MA4 B10 B10
R8 L8 R8 L8 R8 L8 R8 L8 P2 A-MA3
R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ
R2
A6 ZQ DDR_EXT B_DDR3_A[3] B_DDR3_A[3]
A7 A7 A7 A7 R1203 A5 A-MA5 E15 E15
T8 T8 T8 T8 L8 R8 A-MA4
R3
A8
B2 R3
A8
B2 R3
A8
B2 R3
A8
B2
A9 VDD_1 A9 VDD_1 A9 VDD_1 A9 VDD_1 ZQ A6 A-MA6 B11 B11
L7 D9 L7 D9 L7 D9 L7 D9 R2 A-MA5
R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 R7
A10/AP VDD_2
G7 240 B_DDR3_A[5] B_DDR3_A[5]
A11 VDD_3 A11 VDD_3 A11 VDD_3 A11 VDD_3 +1.5V_DDR A7 A-MA7 F14 F14
N7 K2 N7 K2 N7 K2 N7 K2 1% T8 A-MA6
T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8 T3
A12/BC VDD_4
K8
A13 VDD_5 A13 VDD_5 A13 VDD_5 A13 VDD_5 A8 A-MA8 C11 C11
N1 N1 N1 N1 B2 R3 A-MA7
M7
VDD_6
N9 M7
VDD_6
N9 M7
VDD_6
N9 M7
VDD_6
N9
NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 NC_5 VDD_7 VDD_1 A9 A-MA9 D14 D14
R1 R1 R1 R1 D9 L7 A-MA8
M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 M2
VDD_8
R9 DDR_EXT 10V C1203 10uF B_DDR3_A[8] B_DDR3_A[8]
BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 BA0 VDD_9 VDD_2 A10/AP A-MA10 A12 A12
N8 N8 N8 N8 G7 R7 A-MA9
M3
BA1
M3
BA1
M3
BA1
M3
BA1 DDR_EXT C1204 0.1uF B_DDR3_A[9] B_DDR3_A[9]
BA2 BA2 BA2 BA2 VDD_3 A11 A-MA11 F16 F16
A1 A1 A1 A1 K2 N7 A-MA10
J7
VDDQ_1
A8 J7
VDDQ_1
A8 J7
VDDQ_1
A8 J7
VDDQ_1
A8 DDR_EXT C1205 0.1uF B_DDR3_A[10] B_DDR3_A[10]
CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 CK VDDQ_2 VDD_4 A12/BC A-MA12 D13 D13
K7 C1 K7 C1 K7 C1 K7 C1 K8 T3 A-MA11
K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9 DDR_EXT C1206 0.1uF B_DDR3_A[11] B_DDR3_A[11]
CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 CKE VDDQ_4 VDD_5 NC_7 A-MA13 D15 D15
D2 D2 D2 D2 N1 A-MA12
L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9 L2
VDDQ_5
E9 DDR_EXT C1207 0.1uF B_DDR3_A[12] B_DDR3_A[12]
CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 CS VDDQ_6 VDD_6 C12 C12
K1 F1 K1 F1 K1 F1 K1 F1 N9 M7 A-MA13
J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 DDR_EXT C1208 0.1uF B_DDR3_A[13] B_DDR3_A[13]
RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 RAS VDDQ_8 VDD_7 NC_5 E13 E13
K3 H9 K3 H9 K3 H9 K3 H9 R1 A-MA14
L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9
L3
CAS VDDQ_9
DDR_EXT C1209 0.1uF B_DDR3_A[14] B_DDR3_A[14]
WE
J1
WE
J1
WE
J1
WE
J1
VDD_8
NC_1 NC_1 NC_1 NC_1 C1210 0.1uF R9 M2
T2 J9 T2 J9 T2 J9 T2 J9 DDR_EXT A-MBA0 A-MCK A9 A9
RESET NC_2
L1
RESET NC_2
L1
RESET NC_2
L1
RESET NC_2
L1
VDD_9 BA0
NC_3 NC_3 NC_3 NC_3 N8 A-MBA0 B_DDR3_BA[0] B_DDR3_BA[0]
1%
L9 L9 L9 L9 DDR_EXT C1211 0.1uF A-MBA1 D16 D16
F3
NC_4
T7 F3
NC_4
T7 F3
NC_4
T7 F3
NC_4
T7
BA1
DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 C1212 0.1uF M3 A-MBA1 B_DDR3_BA[1] B_DDR3_BA[1]
G3 G3 G3 G3 DDR_EXT A-MBA2 DDR_EXT A10 A10
DQSL DQSL DQSL DQSL BA2
R1207
56
A1 C1215 A-MBA2 B_DDR3_BA[2] B_DDR3_BA[2]
C7 A9 C7 A9 C7 A9 C7 A9
B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3
VDDQ_1
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 A8 J7
E1 E1 E1 E1
1%
VSS_3 VSS_3 VSS_3 VSS_3 VDDQ_2 CK 0.01uF C13 C13
E7 G8 E7 G8 E7 G8 E7 G8 C1 K7 50V A-MCK
D3
DML VSS_4
J2 D3
DML VSS_4
J2 D3
DML VSS_4
J2 D3
DML VSS_4
J2
B_DDR3_MCLK B_DDR3_MCLK
DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 VDDQ_3 CK B13 B13
J8 J8 J8 J8
R1208
56
VSS_6 VSS_6 VSS_6 VSS_6 C9 K9 A-MCKB B_DDR3_MCLKZ B_DDR3_MCLKZ
E3 M1 E3 M1 E3 M1 E3 M1 A-MCKE E17 E17
DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 VDDQ_4 CKE
DDR_EXT DDR_EXT
F7 M9 F7 M9 F7 M9 F7 M9 D2 A-MCKE
F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1
B_DDR3_MCLKE B_DDR3_MCLKE
DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 DQL2 VSS_9 VDDQ_5 A-MCKB
F8 P9 F8 P9 F8 P9 F8 P9 E9 L2
DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10 DQL3 VSS_10
H3 T1 H3 T1 H3 T1 H3 T1 A/B_DDR3_CS B8 B8
H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9
VDDQ_6 CS
DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 DQL5 VSS_12 F1 K1 A-MODT B_DDR3_ODT B_DDR3_ODT
G2 G2 G2 G2 A-MODT C8 C8
H7
DQL6
H7
DQL6
H7
DQL6
H7
DQL6 VDDQ_7 ODT
DQL7 DQL7 DQL7 DQL7 H2 J3 A-MRASB B_DDR3_RASZ B_DDR3_RASZ
B1 B1 B1 B1 A-MRASB +1.5V_DDR B9 B9
D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9 D7
VSSQ_1
B9
VDDQ_8 RAS
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 H9 K3 A-MCASB B_DDR3_CASZ B_DDR3_CASZ
C3 D1 C3 D1 C3 D1 C3 D1 D11 D11
C8
DQU1 VSSQ_3
D8 C8
DQU1 VSSQ_3
D8 C8
DQU1 VSSQ_3
D8 C8
DQU1 VSSQ_3
D8
VDDQ_9 CAS A-MCASB DDR_EXT
DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 DQU2 VSSQ_4 L3 A-MWEB B_DDR3_WEZ B_DDR3_WEZ
C2 E2 C2 E2 C2 E2 C2 E2 A-MWEB R1206
A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8
WE
DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 DQU4 VSSQ_6 J1
A2 F9 A2 F9 A2 F9 A2 F9 10K F10 F10
B8
DQU5 VSSQ_7
G1 B8
DQU5 VSSQ_7
G1 B8
DQU5 VSSQ_7
G1 B8
DQU5 VSSQ_7
G1
NC_1
DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 DQU6 VSSQ_8 J9 T2 A-MRESETB B_RESET B_RESET
A3 G9 A3 G9 A3 G9 A3 G9 A-MRESETB
DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 DQU7 VSSQ_9 NC_2 RESET A-MDQSU
A-MDQSL
L1
NC_3 D12 D12
L9 A/B_DDR3_CS B_DDR3_CS0 B_DDR3_CS0
NC_4
T7 F3 A-MDQSUB
A-MDQSLB
A-MA14 NC_6 DQSL A-MDQSL A19 A19

G3 B_DDR3_DQSL B_DDR3_DQSL
DQSL A-MDQSLB B18 B18
B_DDR3_DQSU B_DDR3_DQSU
A9 C7
VSS_1 DQSU A-MDQSU C16 C16
B3 B7 A-MDML B_DDR3_DQML B_DDR3_DQML
VSS_2 DQSU A-MDQSUB D21 D21
E1 A-MDMU B_DDR3_DQMU B_DDR3_DQMU
VSS_3
G8 E7
VSS_4 DML A-MDML C18 C18
J2 D3 B_DDR3_DQSBL B_DDR3_DQSBL
VSS_5 DMU A-MDMU C17 C17
J8 B_DDR3_DQSBU B_DDR3_DQSBU
VSS_6
M1 E3
VSS_7 DQL0 A-MDQL0 A20 A20
M9 F7 A-MDQL0 B_DDR3_DQL[0] B_DDR3_DQL[0]
VSS_8 DQL1 A-MDQL1 A16 A16
P1 F2 A-MDQL1 B_DDR3_DQL[1] B_DDR3_DQL[1]
VSS_9 DQL2 A-MDQL2 C19 C19
P9 F8 A-MDQL2 B_DDR3_DQL[2] B_DDR3_DQL[2]
T1 H3 A-MDQL3 B_DDR3_DQL[3] B_DDR3_DQL[3]
T9 H8 A-MDQL4 B_DDR3_DQL[4] B_DDR3_DQL[4]
G2 A-MDQL5 B_DDR3_DQL[5] B_DDR3_DQL[5]
DQL6 A-MDQL6 B21 B21
H7 A-MDQL6 B_DDR3_DQL[6] B_DDR3_DQL[6]
DQL7 A-MDQL7 B15 B15
B1 A-MDQL7 B_DDR3_DQL[7] B_DDR3_DQL[7]
VSSQ_1 F18 F18
B9 D7 A-MDQU0 B_DDR3_DQU[0] B_DDR3_DQU[0]
VSSQ_2 DQU0 A-MDQU0 D19 D19
D1 C3 A-MDQU1 B_DDR3_DQU[1] B_DDR3_DQU[1]
D8 C8 A-MDQU2 B_DDR3_DQU[2] B_DDR3_DQU[2]
VSSQ_4 DQU2 A-MDQU2 E21 E21
E2 C2 A-MDQU3 B_DDR3_DQU[3] B_DDR3_DQU[3]
VSSQ_5 DQU3 A-MDQU3 E19 E19
E8 A7 A-MDQU4 B_DDR3_DQU[4] B_DDR3_DQU[4]
F9 A2 A-MDQU5 B_DDR3_DQU[5] B_DDR3_DQU[5]
G1 B8 A-MDQU6 B_DDR3_DQU[6] B_DDR3_DQU[6]
VSSQ_8 DQU6 A-MDQU6 F20 F20
G9 A3 A-MDQU7 B_DDR3_DQU[7] B_DDR3_DQU[7]
VSSQ_9 DQU7 A-MDQU7
R1209
E9 E9
ZQ ZQ
240
1%

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_S7LR(M1A) 2013/05/20
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 1_DDR 12
Serial Flash for SPI boot
+3.5V_ST +3.5V_ST
SPI_FLASH_MACRONIX
OPT IC1300
R1301
+3.5V_ST 4.7K MX25L8006EM2I-12G
C1300
CS# VCC 0.1uF
/SPI_CS 1 8
OPT
R1300
10K SO/SIO1 HOLD#
SPI_SDO 2 7
WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1302
GND SI/SIO0 33
4 5 SPI_SDI
SPI_FLASH_WINBOND
IC1300-*1
W25Q80BVSSIG
CS VCC
1 8
DO[IO1] HOLD[IO3]
2 7
%WP[IO2] CLK
3 6
GND DI[IO0]
4 5

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_S7LR(M1A) 2013/04/29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. S_FLASH 13
FE_AGC_SPEED_CTL
FE_TS_SYNC IF_AGC_SEL
GLOBAL tuner block KR & AJ FE_TS_VAL_ERR
TUNER_RESET
RF_SWITCH_CTL
FE_TS_CLK
FE_TS_DATA[0]
TU_ATSC
TU1601 R1609 100
+3.3V_Normal
IF_AGC_MAIN +3.3V_TU
+3.3V_TU
TDJH-H101F should be guarded by ground
C1611 Size change,0929
0.1uF
16V L1600
UBW2012-121F
R1610-*1
1K
B1[+3.3V] TU_IIC_NON_ATSC_1K C1603 C1605 C1607
C1602
1 +3.3V_TU 22uF 0.1uF 22uF 0.1uF
R1611-*1 6.3V 16V 6.3V 16V
1K
TU_IIC_NON_ATSC_1K
NC_1 C1615 C1616
2 100pF 0.1uF
50V 16V
CHANGE TO CHANGE TO
IF_AGC 6.3V 2012 X5R 6.3V 2012 X5R
3 close to the tuner pin, add,09029
R1610 R1611
1.8K 1.8K
TU_IIC_ATSC_1.8K TU_IIC_ATSC_1.8K
SCL
4 R1607 33
TU_SCL
SDA
5 R1608 33
TU_SDA
C1610 OPT OPT
IF[P] C1609 18pF C1613 C1614
R1605 0 IF_FILTER_AJ 18pF 50V 20pF 20pF
6 R1605-*1 50V 50V 50V
IF_NON_FILTER_KR 10
IF[N] R1606 0
7 IF_FILTER_AJ
IF_NON_FILTER_KR R1606-*1
10
NC_2 Close to the tuner
8
NC_3
9
IF_P_MSTAR
A1 B1
A1 B1
IF_N_MSTAR
47
1. should be guarded by ground
2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
SHIELD Ground Width >= 24mils
TU_GND_A
GND seperation for ASIS tuner
TU_AJ_T/C
TU1601-*1
TDJH-G101D
B1[+3.3V]
1
NC_1
2
IF_AGC
3
SCL
4
SDA
5
IF[P]
6
IF[N]
7
NC_2
8
NC_3
9
A1 B1
A1 B1
47
SHIELD

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_KR_AJ 16
COMPONENT & AV1(COMMON), AV2
COMP_AV1/2_YG
JK1701
PPJ248-21
6C [RD3]E-LUG R1716
10K
AV2_R_IN
AV2
VA1706
5.6V R1700 C1701 R1718
AV2_LR_ZENER 470K 330pF 12K
AV2 50V AV2
5C [RD3]O-SPRING OPT
4C [RD3]CONTACT R1717
10K
AV2_L_IN
AV2
VA1704 R1701 C1702 R1719

5.6V 470K 330pF 12K
AV2_LR_ZENER AV2 50V AV2
AV2 5B [WH2]O-SPRING OPT
+3.3V_Normal
R1708
10K
AV2
4A [YL]CONTACT
R1711 1K
AV2_CVBS_DET
AV2
VA1705
5.6V
OPT
5A [YL]O-SPRING
SC1/AV2_CVBS_IN
ZD1706-*1
ZD1706 AV2
COMP_AV1_YG C1703 AV2_CVBS_ZENER_KEC
AV2_CVBS_ZENER_ROHM R1702 47pF
75 R1725 3216 ZD1707-*1
ZD1707 75 1% 50V
JK1702 [YL]E-LUG 1608 1/4W AV2 AV2_CVBS_ZENER_KEC
6A AV2_CVBS_ZENER_ROHM 1% OPT
PPJ245N2-01
Size Check !!!
6E [RD2]E-LUG 6H [RD2]E-LUG R1714

10K
COMP2_R_IN
VA1700
5.6V C1704 R1720
COMP_LR_ZENER R1703 330pF
470K 50V 12K
5E [RD2]O-SPRING 5H [RD2]O-SPRING OPT
R1715
10K
COMP2_L_IN
4E [RD2]CONTACT 4H [RD2]CONTACT VA1701

5.6V C1705 R1721
COMP_LR_ZENER R1704 330pF
470K 50V 12K
OPT
+3.3V_Normal
5D [WH]O-SPRING 5G [WH1]O-SPRING R1709

10K
COMP2_DET
R1712
[RD1]CONTACT [RD1]CONTACT 1K
4C 4F VA1702
5.6V
OPT
COMPONENT 5C [RD1]O-SPRING 5F [RD1]O-SPRING

COMP2_Pr+
& ZD1700 ZD1700-*1
COMP_Pr_ZENER_ROHM COMP_Pr_ZENER_KEC
R1705
AV1 ZD1701 75 ZD1701-*1
7C [RD1]E-LUG-S 7F [RD1]E-LUG-S COMP_Pr_ZENER_ROHM COMP_Pr_ZENER_KEC
5B [BL]O-SPRING 5E [BL]O-SPRING
COMP2_Pb+
ZD1702 ZD1702-*1
COMP_Pb_ZENER_ROHM COMP_Pb_ZENER_KEC
R1706
[GN/YL]CONTACT [YL/GN]CONTACT ZD1703 75 ZD1703-*1
4A 4D COMP_Pb_ZENER_ROHM COMP_Pb_ZENER_KEC
+3.3V_Normal
R1710
10K
5A [GN/YL]O-SPRING 5D [YL/GN]O-SPRING
AV_CVBS_DET
R1713
1K
VA1703
5.6V
OPT
6A [GN/YL]E-LUG 6D [YL/GN]E-LUG
COMP2_Y+/AV_CVBS_IN
ZD1704 ZD1704-*1
COMP_Y_ZENER_ROHM COMP_Y_ZENER_KEC
* One Ton Color Jack - Yellow/Green R1707 R1722 3216
ZD1705 75 75 1% ZD1705-*1
1/4W
COMP_Y_ZENER_ROHM 1608 COMP_Y_ZENER_KEC
1% OPT
JK1701-*1 CVBS_OUT_TEST
JK1702-*1 PPJ248-01 R1724
PPJ245-01 COMP_AV1/2_G Size Check !!! 0
7C [RD3]E-LUG DTV/MNT_VOUT
COMP_AV1_G
6C [RD3]C-SPRING
7E [RD2]E-LUG
4C [RD3]CONTACT R1723
75
6E [RD2]C-SPRING
5B [WH2]C-SPRING
CVBS_OUT_TEST
[RD2]CONTACT 4A [YL]CONTACT
4E
6A [YL]C-SPRING
5D [WH]C-SPRING
7A [YL]E-LUG
4C [RD1]CONTACT 7H [RD2]E-LUG
6H [RD2]C-SPRING
6C [RD1]C-SPRING
4H [RD2]CONTACT
8C [RD1]E-LUG-S
5G [WH1]C-SPRING
4F [RD1]CONTACT
5B [BL]C-SPRING
6F [RD1]C-SPRING
4A [GN]CONTACT
8F [RD1]E-LUG-S
[GN]C-SPRING 5E [BL]C-SPRING
6A
4D [GN]CONTACT
7A [GN]E-LUG
6D [GN]C-SPRING
7D [GN]E-LUG

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_S7LR(M1A) 2013.08.15
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_JACK_NON_EU 17
Headphone
*Option : HEAD_PHONE_EU
Close to the Main IC
HEAD_PHONE
L3000
5.6uH HEAD_PHONE
HP_LOUT
HEAD_PHONE C3000 OPT C
C3004 E
10uF C3002 HEAD_PHONE
4.7uF R3002 B
16V 1000pF 1K Q3002 Q3004
10V MMBT3904(NXP) MMBT3904(NXP)
50V B HEAD_PHONE_6pie HEAD_PHONE_5pie
OPT OPT JK3000 JK3000-*1
+3.5V_ST E +3.3V_Normal PEJ038-3B6
C KJA-PH-0-0177
GND 5 GND 5
E
OPT OPT HEAD_PHONE
Q3001 R3005
10K L 4 L 4
OPT B MMBT3906(NXP)
C R3001
R3000 3.3K
1K B C DETECT 3 DETECT 3
SIDE_HP_MUTE HP_DET
Q3000 R3004
MMBT3904(NXP) 1K
E HEAD_PHONE R 1 R 1
OPT
HEAD_PHONE
L3001 HEAD_PHONE
5.6uH
HP_ROUT
HEAD_PHONE C3001 OPT HEAD_PHONE C E
C3005 10uF C3003
4.7uF 16V 1000pF
R3003 Q3003 B Q3005
1K MMBT3904(NXP) MMBT3904(NXP)
10V 50V B
OPT OPT
E C
Close to the Main IC

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS NC5_M1A 2013.04.29
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HEAD_PHONE_EU 30
RS-232C 4PIN & MSTAR DEBUG 4PIN
RS-232C 4PIN
RS232C_DEBUG_4P
+3.5V_ST P4000
12507WS-04L
R4001
100 VCC
1
PM_TXD
R4000
100 PM_RXD
2
PM_RXD
GND
3
RM_TXD
4
GND
MSTAR DEBUG 4PIN
MSTAR_DEBUG_4P
P4001
12505WS-04A00
JP_GND1
JP_GND2
JP_GND3
JP_GND4
3 RGB_DDC_SCL
4 RGB_DDC_SDA

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_S7LR(M1A) 2013/04/30
RS232C_MSTAR_DEBUG_4P 40
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
IR/LED + Digital Eye + Control
+3.5V_ST
R4603 R4604
10K 10K
1% 1%
R4601
100 P4600 OPT
KEY1
KEY_CAP 12507WR-10L P4601
C4602 12507WR-08L
0.1uF
16V
R4602 1
100 1
KEY2
KEY_CAP
C4603 2
0.1uF 2
+3.5V_ST 16V
3
L4600 3
BLM18PG121SN1D
4
4
R4606
+3.5V_ST C4600 C4601 1.8K
0.1uF 1000pF LED_R/BUZZ 5
16V 50V 5
VA4600
LED_R_Zener
R4600 6
3.3K 6
IR 7
C4604 7
VA4601
100pF IR_Zener
50V 8
8
9 9
+3.3V_Normal
10
Digital Eye Digital Eye Digital Eye 11

R4605 R4607 C4605
1K 1K 18pF
50V
R4608 100
SENSOR_SCL
Digital Eye
R4609 100
SENSOR_SDA
Digital Eye Digital Eye
C4606
18pF
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR_EYE_SENSOR 46
IC102
H27U1G8F2CTR-BC
NAND FLASH MEMORY +3.3V_Normal +3.3V_Normal
NC_1 NC_29
1 NAND_FLASH_1G_HYNIX
48 IC101
NC_2 EAN35669103
NC_28 LGE2132(M1A_256M)
2 47
NC_3 NC_27 PCM_A[0-7]
3 46 EEPROM CI_TS_CLK
22 M1A_256M
NC_4 NC_26 <CHIP Config> (IC104) CI_TS_DATA[0-7]
4 45 AR101 Y1 V10
(SPI_SDI, PM_LED, PWM_PM) TUNER_RESET GPIO78 TS0CLK/GPIO92 CI_TS_DATA[0]
R106 R110 NC_5 I/O7 PCM_A[7] W4 T14 CI_TS_SYNC
1K 3.9K 5 44 LG-NonOS SB51_ExtSPI 3’b000 51boot from SPI 5V_DET_HDMI_4 GPIO79 TS0DATA[0]/GPIO82 CI_TS_DATA[1] CI_TS_VAL
LG-OS HEMCU_ExtSPI 3’b001 MIPS boot from SPI T13
NC_6 I/O6 PCM_A[6] TS0DATA[1]/GPIO83 CI_TS_DATA[2]
AR103 6 43 R129 22 K17 U13
22 I2C_SCL I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84 CI_TS_DATA[3] from CI SLOT
R/B I/O5 PCM_A[5] R128 22 J15 V15
7 42 I2C_SDA I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 CI_TS_DATA[4]
U8 U12
/F_RB RE I/O4 PCM_A[4] +3.5V_ST URSA/VCOM_SDA SDAM2/GPIO55 TS0DATA[4]/GPIO86 CI_TS_DATA[5]
8 41 T7 V13
/PF_OE URSA/VCOM_SCL SCKM2/GPIO56 TS0DATA[5]/GPIO87 CI_TS_DATA[6]
CE NC_25 U7 U14
9 40 DEMOD_SCL SENSOR_SCL SENSOR_SCL SCKM0/GPIO58 TS0DATA[6]/GPIO88
/PF_CE0 AUD_MASTER_CLK R123 V7 T11 CI_TS_DATA[7]
NC_7 NC_24 AUD_MASTER_CLK_0 DEMOD_SDA SENSOR_SDA SENSOR_SDA SDAM0/GPIO59 TS0DATA[7]/GPIO89
10 39 C102 R126 22 DVB_T2 F6 T12
OPT OPT 56 DEMOD_SCL I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91 FE_TS_CLK
NC_8 NC_23 10uF 10V R127 22 DVB_T2 G6 V12
R107 11 38 C112 DEMOD_SDA I2S_IN_SD/GPIO160 TS0VALID/GPIO90 FE_TS_DATA[0-7]
4.7K
+3.3V_Normal C101
4.7K
2.7K
1K AA4 Y14
0.1uF VCC_1 VCC_2 100pF AMP_SCL TU_SCL FE_TS_SYNC
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
OPT
OPT
12 37 50V Y4 Y16 FE_TS_DATA[0]
OPT FE_TS_VAL_ERR
C103 AMP_SDA TU_SDA I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93 FE_TS_DATA[1]
R104 VSS_1 VSS_2 AA15
13 36 0.1uF TS1DATA[1]/GPIO94
R115
R117
R121
1K FE_TS_DATA[2] Internal demod out
J6 Y13
NC_9 NC_22 AV_CVBS_DET ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95 FE_TS_DATA[3]
14 35 K6 AA16
AV2_CVBS_DET AV2_CVBS_DET EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96 FE_TS_DATA[4] FE_TS_DATA[0]
NC_10 NC_21 W12
15 34 TS1DATA[4]/GPIO97 FE_TS_DATA[0]
G7 AA13 FE_TS_DATA[5]
CLE NC_20 LED_R/BUZZ COMP2_DET I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98 FE_TS_DATA[6]
16 33 W14
AR102 TS1DATA[6]/GPIO99 FE_TS_DATA[7]
/PF_CE1 ALE I/O3 PCM_A[3] PM_LED J4 W13
17 32 DEMOD_RESET DEMOD_RESET ET_COL/GPIO60 TS1DATA[7]/GPIO100
PF_ALE J5 Y15
WE I/O2 PCM_A[2] SPI_SDI MODEL_OPT_0 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102
/PF_WE 18 31 W15
MODEL_OPT_1 TS1VALID/GPIO101
/PF_WP WP I/O1 PCM_A[1] H19
19 30 LCK/GPIO194
4.7K
4.7K
2.7K
MODEL_OPT_2 G20 B3 R133 33
AR104 NC_11 I/O0 PCM_A[0] LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13 /SPI_CS
OPT
22 R105 20 29 /MHL_OCP_DET G19 A3R134 33
R101 1K LHSYNC/GPIO196 PM_SPI_SCK/GPIO1 SPI_SCK
NC_12 NC_19 22 G21 A4
3.3K 21 28 FRC_RESET FRC_RESET LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0 SIDE_HP_MUTE
R116
R118
R122
33 R125 C3
NC_13 NC_18 PM_SPI_SDI/GPIO2 SPI_SDI
22 27 J17 A2 R135 33
HP_DET UART2_RX/GPIO69 PM_SPI_SDO/GPIO3 SPI_SDO
NC_14 NC_17 J16
23 26 SC1/COMP1_DET UART2_TX/GPIO70 for SERIAL FLASH
E8 B1
NC_15 NC_16 MHL_OCP_EN UART3_TX/GPIO52 RP EPHY_RP EPHY_RP
24 25 D7 C2
AMP_RESET UART3_RX/GPIO53 TN EPHY_TN EPHY_TN
U6 C1
MODEL_OPT_4 GPIO46[CTS] TP EPHY_TP
V6 B2 EPHY_TP
RF_SWITCH_CTL GPIO47[RTS] RN EPHY_RN EPHY_RN
/CI_CD1 33 R124 K15
/CI_CD1 UART1_TX/GPIO48
L16 D2
/CI_CD2 /CI_CD2 UART1_RX/GPIO49 SPDIF_IN/GPIO161 5V_DET_HDMI_2
D1
R132 100 SPDIF_OUT
SPDIF_OUT/GPIO162 SPDIF_OUT
H5 SPDIF_OPTIC
USB1_CTL ET_TX_EN/GPIO63
K5 D8 5V_DET_HDMI_2
MODEL_OPT_5 ET_RXD[0]/GPIO65 HWRESET SOC_RESET
NAND_FLASH_1G_TOSHIBA NAND_FLASH_2G_TOSHIBA NAND_FLASH_1G_SS NAND_FLASH_4G_HYNIX K4 E5
MODEL_OPT_6 ET_MDC/GPIO66 IRIN/GPIO5 IR
EAN61508002 EAN60991002 EAN61857001 EAN61950603 H6 G4
USB1_OCD ET_MDIO/GPIO67 DDCA_CK/UART0_RX RGB_DDC_SCL
IC102-*3 IC102-*4 IC102-*5 IC102-*6 L5 G5
NAND_FLASH_2G_HYNIX_OLD /CI_DET ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX RGB_DDC_SDA
EAN60708702 TC58NVG0S3HTA00 TC58NVG1S3HTA00 K9F1G08U0D-SCB0 H27U4G8F2ETR-BC
IC102-*1 PCM_A[0-14]
H27U2G8F2CTR
PCM_A[0] U17 J18
IC101-*1
NC_1 NC_29 PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71 PWM0
1 48 LGE2131(M1A_128M) PCM_A[1]
NC_2 NC_28
R18 K18
2 47
NC_3 NC_27
NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 NC_1 NC_29 PCM_A[2] PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72 PWM1
3 46 1 48 1 48 1 48 1 48 M1A_128M V17 K16
NC_4 NC_26 Y1 V10
4 45 GPIO78 TS0CLK/GPIO92 PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73 PWM2
NC_5 I/O7 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 NC_2 NC_28 W4 T14 PCM_A[3] R16 L18
5 44 GPIO79 TS0DATA[0]/GPIO82
T13
NC_6 I/O6 2 47 2 47 2 47 2 47 TS0DATA[1]/GPIO83 PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74 PWM3
6 43 K17 U13 PCM_A[4]
R/B I/O5 I2C_SCKM3/I2C_DDCR_CK/GPIO77 TS0DATA[2]/GPIO84 U16 L17
7 42 J15 V15
RE I/O4
NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 NC_3 NC_27 I2C_SDAM3/I2C_DDCR_DA/GPIO76 TS0DATA[3]/GPIO85 PCM_A[5] PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 PCM_5V_CTL
8 41 3 46 3 46 3 46 3 46 U8 U12 T17
SDAM2/GPIO55 TS0DATA[4]/GPIO86
CE NC_25 T7 V13
9 40 SCKM2/GPIO56 TS0DATA[5]/GPIO87 PCMADR[5]/NF_AD[5]/GPIO106
NC_7 NC_24 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 NC_4 NC_26 U7 U14 PCM_A[6] W18 T8
10 39 SCKM0/GPIO58 TS0DATA[6]/GPIO88
V7 T11 +3.3V_Normal
NC_8 NC_23 4 45 4 45 4 45 4 45 SDAM0/GPIO59 TS0DATA[7]/GPIO89 PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146 PF_ALE
11 38 F6 T12 PCM_A[7]
VCC_1 VCC_2 I2S_IN_BCK/GPIO159 TS0SYNC/GPIO91 U20 T9
12 37 G6 V12
VSS_1 VSS_2
NC_5 I/O8 NC_5 I/O8 NC_5 I/O7 NC_5 I/O7 I2S_IN_SD/GPIO160 TS0VALID/GPIO90 PCM_A[8] PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 /PF_CE0
13 36 5 44 5 44 5 44 5 44 AA4 Y14 Y19 U9 L101
I2C_SCKM1/GPIO80 TS1CLK/GPIO103
NC_9 NC_22 Y4 Y16 BLM18PG121SN1D
14 35 I2C_SDAM1/GPIO81 TS1DATA[0]/GPIO93 PCMADR[8]/GPIO113 NF_CLE/GPIO141 /PF_CE1
NC_10 NC_21 NC_6 I/O7 NC_6 I/O7 NC_6 I/O6 NC_6 I/O6 AA15 PCM_A[9] AA19 U11 HALF_NIM/EU_NON_T2
15 34 TS1DATA[1]/GPIO94
J6 Y13
CLE NC_20 6 43 6 43 6 43 6 43 ET_TXD[0]/GPIO62 TS1DATA[2]/GPIO95 PCMADR[9]/GPIO115 NF_RBZ/GPIO147 /F_RB
16 33 K6 AA16 PCM_A[10]
ALE I/O3 EXT_TX_CLK/GPIO64 TS1DATA[3]/GPIO96 AA20 V9
17 32 W12
WE I/O2
RY/BY I/O6 RY/BY I/O6 R/B I/O5 R/B I/O5 TS1DATA[4]/GPIO97 PCM_A[11] PCMADR[10]/GPIO119 NF_REZ/GPIO144 /PF_OE HALF_NIM/EU_NON_T2
18 31 7 42 7 42 7 42 7 42 G7 AA13 W21 U10 HALF_NIM/EU_NON_T2
I2S_IN_WS/GPIO158 TS1DATA[5]/GPIO98
WP I/O1 W14 C119
19 30 TS1DATA[6]/GPIO99 PCMADR[11]/GPIO117 NF_WEZ/GPIO145 /PF_WE R137
NC_11 I/O0 RE I/O5 RE I/O5 RE I/O4 RE I/O4 J4 W13 PCM_A[12] V20 T10 0.1uF
20 29 ET_COL/GPIO60 TS1DATA[7]/GPIO100 10K
J5 Y15
NC_12 NC_19 8 41 8 41 8 41 8 41 ET_TXD[1]/GPIO61 TS1SYNC/GPIO102 PCMADR[12]/GPIO109 NF_WPZ/GPIO199 /PF_WP
21 28 W15 PCM_A[13]
NC_13 NC_18 TS1VALID/GPIO101 Y17 R140
22 27 H19
NC_14 NC_17
CE NC_25 CE NC_25 CE NC_25 CE NC_25 LCK/GPIO194 PCM_A[14] PCMADR[13]/GPIO112 0
23 26 9 40 9 40 9 40 9 40 G20 B3 V18 W2
NC_15 NC_16 G19
LDE/GPIO195 PM_SPI_SCZ1/GPIO_PM[6]/GPIO13
A3
/PCM_CD
24 25 LHSYNC/GPIO196 PM_SPI_SCK/GPIO1 PCMADR[14]/GPIO111 IF_AGC IF_AGC_MAIN
NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 NC_7 NC_24 G21 A4 /PCM_CE V19 W1
LVSYNC/GPIO197 PM_SPI_SCZ0/GPIO0
C3
HALF_NIM/EU_NON_T2
10 39 10 39 10 39 10 39 PM_SPI_SDI/GPIO2 PCM_D[0-7] PCMCD_N/GPIO135 SIFM
J17 A2 W19 W3 C120
UART2_RX/GPIO69 PM_SPI_SDO/GPIO3
NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 NC_8 NC_23 J16
UART2_TX/GPIO70 PCMCE_N/GPIO120 SIFP 0.047uF
11 38 11 38 11 38 11 38 E8 B1 PCM_D[0] U18 V2
UART3_TX/GPIO52 RP
D7 C2 25V
UART3_RX/GPIO53 TN PCMDATA[0]/GPIO131 IM
VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 VCC_1 VCC_2 U6 C1 PCM_D[1] V16 V1
GPIO46[CTS] TP HALF_NIM/EU_NON_T2
12 37 12 37 12 37 12 37 V6 B2
GPIO47[RTS] RN PCMDATA[1]/GPIO132 IP
K15 PCM_D[2] W17
UART1_TX/GPIO48
VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 VSS_1 VSS_2 L16 D2
UART1_RX/GPIO49 SPDIF_IN/GPIO161 PCMDATA[2]/GPIO133
13 36 13 36 13 36 13 36 D1 PCM_D[3] Y20 AA2
SPDIF_OUT/GPIO162
H5
ET_TX_EN/GPIO63 PCMDATA[3]/GPIO125 XIN
NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 NC_9 NC_22 K5 D8 PCM_D[4] R15 Y2
ET_RXD[0]/GPIO65 HWRESET
14 35 14 35 14 35 14 35 K4 E5
ET_MDC/GPIO66 IRIN/GPIO5 PCMDATA[4]/GPIO124 XOUT
H6 G4 PCM_D[5] AA18
NAND_FLASH_2G_HYNIX_NEW ET_MDIO/GPIO67 DDCA_CK/UART0_RX
EAN60708703 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 NC_10 NC_21 L5 G5
IC102-*2 ET_RXD[1]/GPIO68 DDCA_DA/UART0_TX PCMDATA[5]/GPIO123
H27U2G8F2DTR-BD 15 34 15 34 15 34 15 34 T15
U17 J18 PCM_D[6]
PCMADR[0]/NF_AD[0]/GPIO130 PWM0/GPIO71 PCMDATA[6]/GPIO122
R18 K18
NC_1 NC_29 CLE NC_20 CLE NC_20 CLE NC_20 CLE NC_20 PCMADR[1]/NF_AD[1]/GPIO129 PWM1/GPIO72 Y21
1 48 V17 K16 PCM_D[7]
NC_2 NC_28
16 33 16 33 16 33 16 33 PCMADR[2]/NF_AD[2]/GPIO127 PWM2/GPIO73 PCMDATA[7]/GPIO121
2 47 R16 L18
NC_3 NC_27 PCMADR[3]/NF_AD[3]/GPIO126 PWM3/GPIO74 W20
3 46 ALE I/O4 ALE I/O4 ALE I/O3 ALE I/O3 U16 L17
NC_4 NC_26 T17
PCMADR[4]/NF_AD[4]/GPIO104 PWM4/GPIO75 /PCM_IORD PCMIORD_N/GPIO116
4 45 17 32 17 32 17 32 17 32 PCMADR[5]/NF_AD[5]/GPIO106 V21
NC_5 I/O7 W18 T8
5 44 PCMADR[6]/NF_AD[6]/GPIO107 NF_ALE/GPIO146 /PCM_IOWR PCMIOWR_N/GPIO114
U20 T9
NC_6 I/O6 WE I/O3 WE I/O3 WE I/O2 WE I/O2 PCMADR[7]/NF_AD[7]/GPIO108 NF_CEZ/GPIO142 Y18
6 43 Y19 U9
R/B I/O5
18 31 18 31 18 31 18 31 PCMADR[8]/GPIO113 NF_CLE/GPIO141 /PCM_IRQA PCMIRQA_N/GPIO110
7 42 AA19 U11 T16 Close to MSTAR
RE I/O4 PCMADR[9]/GPIO115 NF_RBZ/GPIO147
8 41 WP I/O2 WP I/O2 WP I/O1 WP I/O1 AA20 V9 TUNER_IF_0_ohm HALF_NIM/EU_NON_T2
CE NC_25 W21
PCMADR[10]/GPIO119 NF_REZ/GPIO144
U10
/PCM_OE PCMOE_N/GPIO118
9 40 19 30 19 30 19 30 19 30 PCMADR[11]/GPIO117 NF_WEZ/GPIO145 R17 IF_N_MSTAR
NC_7 NC_24 V20 T10 0
10 39 PCMADR[12]/GPIO109 NF_WPZ/GPIO199 /PCM_REG PCMREG_N/GPIO128 0.1uF C121
Y17
NC_8 NC_23 NC_11 I/O1 NC_11 I/O1 NC_11 I/O0 NC_11 I/O0 PCMADR[13]/GPIO112 T18 R138
11 38 V18 W2 C117 OPT
VCC_1 VCC_2
20 29 20 29 20 29 20 29 PCMADR[14]/GPIO111 IF_AGC PCM_RST PCM_RESET/GPIO134
12 37 V19 W1 W16 100pF DTV_IF
VSS_1 VSS_2 PCMCD_N/GPIO135 SIFM
13 36 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 NC_12 NC_19 W19 W3
NC_9 NC_22 U18
PCMCE_N/GPIO120 SIFP
V2
/PCM_WAIT PCMWAIT_N/GPIO105
14 35 21 28 21 28 21 28 21 28 PCMDATA[0]/GPIO131 IM U15 TUNER_IF_0_ohm HALF_NIM/EU_NON_T2
NC_10 NC_21 V16 V1
15 34 PCMDATA[1]/GPIO132 IP /PCM_WE PCMWE_N/GPIO198 IF_P_MSTAR
W17
CLE NC_20 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 NC_13 NC_18 PCMDATA[2]/GPIO133 0
16 33 Y20 AA2 0.1uF IF_FILTER_AJ/CSA
ALE I/O3
22 27 22 27 22 27 22 27 PCMDATA[3]/GPIO125 XIN R139 C118 C122
17 32 R15 Y2
WE I/O2 PCMDATA[4]/GPIO124 XOUT 33pF IF_FILTER_AJ/CSA
18 31 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 NC_14 NC_17 AA18 C124
PCMDATA[5]/GPIO123
WP I/O1 T15
19 30 23 26 23 26 23 26 23 26 PCMDATA[6]/GPIO122 33pF
NC_11 I/O0 Y21
20 29 PCMDATA[7]/GPIO121
W20
NC_12 NC_19 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 NC_15 NC_16 PCMIORD_N/GPIO116
21 28 V21
NC_13 NC_18
24 25 24 25 24 25 24 25 PCMIOWR_N/GPIO114 XTAL_LOAD_15pF
22 27 Y18
NC_14 NC_17 PCMIRQA_N/GPIO110 C113 15pF
23 26 T16
PCMOE_N/GPIO118
NC_15 NC_16 R17
24 25 PCMREG_N/GPIO128
T18
PCM_RESET/GPIO134 X101
W16
U15
PCMWAIT_N/GPIO105 XTAL_LOAD_18pF XTAL_LOAD_22pF XTAL_LOAD_27pF
PCMWE_N/GPIO198 24MHz
1M
C114 15pF C113-*1 18pF C113-*2 22pF C113-*3 27pF

R136
XTAL_LOAD_15pF XTAL_LOAD_18pF XTAL_LOAD_22pF XTAL_LOAD_27pF

C114-*1 18pF C114-*2 22pF C114-*3 27pF
TUNER_IF_100_ohm
DIMMING R138-*1 XTAL_LOAD_30pF
I2C +3.3V_Normal 100
PM MODEL OPTION PM_MODEL_OPT_0 C113-*4 30pF
- HIGH : LCD
+3.5V_ST IC101 TUNER_IF_100_ohm XTAL_LOAD_30pF
- LOW :: PDP R139-*1 C114-*4 30pF
R103 100 LGE2132(M1A_256M) 100
IC101-*1
PWM_DIM PWM2 LGE2131(M1A_128M)
M1A_128M
R102 10K R111 R112 R113 R114 M1A_256M U19 D5
PWM0 1K 1K 2.2K 2.2K LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35
U19 D5 T20 F8
R119 LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36
RXA4+ T21 E7
10K LVA4P/TTL_B[0]/HCONV/GPIO170 SAR0/GPIO35 KEY1 T19
LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37
E6
LCD T20 F8 LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38
R143 10K RXA4- R21 D6
LVA4M/TTL_B[1]/E_O/GPIO171 SAR1/GPIO36 KEY2 R20
LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39
PWM3 T21 E7 LVACKM/TTL_B[5]/GCLK/GPIO175
RXA3+ R19 W10
AMP_SDA PM_MODEL_OPT_0 LVA3P/TTL_B[2]/FB/GPIO172 SAR2/GPIO37 PM_MODEL_OPT_0 P20
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20
Y10
T19 E6 LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21
RXA3- P3
AMP_SCL LVA3M/TTL_B[3]/OPT_P/GPIO173 SAR3/GPIO38 PANEL_CTL P19
PM_LED/GPIO4
Y3
R21 D6 LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7
RXACK+ N20 Y5
LVACKP/TTL_B[4]/MCLK/GPIO174 SAR4/GPIO39 SCART1_MUTE N21
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17
W11
I2C_SDA R20 LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22
RXACK- N19 D3
LVACKM/TTL_B[5]/GCLK/GPIO175 M21
LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11
AA3
I2C_SCL R120 R19 W10 LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14
10K RXA2+ M20 W5
LVA2P/TTL_B[6]/GST/GPIO176 GPIO_PM[13]/GPIO20 MHL_CD_SENSE M19
LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15
D4
PDP P20 Y10 LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200
RXA2- L20 L15
LVA2M/TTL_B[7]/POL/GPIO177 GPIO_PM[14]/GPIO21 /VBUS_EN LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8
Y11
P3 PM_UART_RX/GPIO_PM[5]/GPIO12
L19
PM_LED/GPIO4 PM_LED K20
LVBCKP/TTL_R[0]/EPI4+/GPIO186
P19 Y3 LVBCKM/TTL_R[1]/EPI4-/GPIO187
RXA1+ K21
LVA1P/TTL_G[0]/EPI0+/GPIO178 GPIO_PM[0]/GPIO7 POWER_DET K19
LVB2P/TTL_R[2]/EPI5+/GPIO188
N20 Y5 LVB2M/TTL_R[3]/EPI5-/GPIO189
RXA1- J21
LVA1M/TTL_G[1]/EPI0-/GPIO179 PM_SPI_SCZ2/GPIO_PM[10]/GPIO17 AMP_MUTE J20
N21 W11 LVB1M/TTL_R[5]/EPI6-/GPIO191
RXA0+ J19
LVA0P/TTL_G[2]/EPI1+/GPIO180 GPIO_PM[15]/GPIO22 INV_CTL H20
N19 D3 LVB0M/TTL_R[7]/EPI7-/GPIO193
RXA0- LVA0M/TTL_G[3]/EPI1-/GPIO181 GPIO_PM[4]/GPIO11 POWER_ON/OFF_1
EEPROM M21 AA3
+3.3V_Normal RXB4+ LVB4P/TTL_G[4]/EPI2+/GPIO182 GPIO_PM[7]/GPIO14 RL_ON
M20 W5
RXB4- LVB4M/TTL_G[5]/EPI2-/GPIO183 GPIO_PM[8]/GPIO15 /FLASH_WP
M19 D4
RXB3+ LVB3P/TTL_G[6]/EPI3+/GPIO184 PWM_PM/GPIO200 LED_R/BUZZ
L20 L15
RXB3- LVB3M/TTL_G[7]/EPI3-/GPIO185 PM_UART_TX/GPIO_PM[1]/GPIO8 PM_TXD
Y11
NVRAM_ST NVRAM_RENESAS NVRAM_ATMEL NVRAM_ROHM PM_UART_RX/GPIO_PM[5]/GPIO12 PM_RXD
C105 L19
IC104 IC104-*1 RXBCK+ LVBCKP/TTL_R[0]/EPI4+/GPIO186
0.1uF IC104-*2 IC104-*3 K20
M24256-BRMN6TP RXBCK- LVBCKM/TTL_R[1]/EPI4-/GPIO187
R1EX24256BSAS0A AT24C256C-SSHL-T BR24G256FJ-3 K21
RXB2+ LVB2P/TTL_R[2]/EPI5+/GPIO188
K19
E0 VCC RXB2- LVB2M/TTL_R[3]/EPI5-/GPIO189
1 8 A0 VCC A0 VCC A0 VCC J21
1 8 1 8 1 8 RXB1+ LVB1P/TTL_R[4]/EPI6+/GPIO190
J20
E1 WC RXB1- LVB1M/TTL_R[5]/EPI6-/GPIO191
2 7 A1 WP A1 WP A1 WP J19
2 7 2 7 2 7 RXB0+
A0’h LVB0P/TTL_R[6]/EPI7+/GPIO192
H20
E2 SCL RXB0- LVB0M/TTL_R[7]/EPI7-/GPIO193
3 6 R108 22 I2C_SCL A2 SCL A2 SCL A2 SCL
3 6 3 6 3 6
VSS SDA
4 5 R109 22 VSS SDA GND SDA GND SDA
I2C_SDA 4 5 4 5 4 5
C104 C106
8pF 8pF
EAN61548301 OPT OPT
EAN62389501 EAN61133501 EAN62389502

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS M1A_L14 2013/09/16
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN1_NON_EU 51
L14 MHL SW AND GATE
+3.3V_Normal
MHL_SW_AND_GATE
IC5801
74LVC1G08GW
B VCC
1 5
MHL_CD_SENSE
A
2
MHL_OCP_EN
GND Y
3 4 MHL_5V_EN

FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS L14_M1A 2013.09.01
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MHL_SW_AND 58

60LB5900UV

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60LB5900UV

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Available Formats

Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 60LB5900 60LB5900-UV

P/NO : MFL67988319(1404-REV00) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

ADJUSTMENT INSTRUCTION .............................................................. 11

TROUBLE SHOOTING ............................................................................ 17

EXPLODED VIEW .................................................................................. 25

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

Fuse and Conventional Resistor

1) Temperature : 25 ºC ± 5 ºC(77 ± 9 ºF) , CST : 40 ºC±5 ºC

4) Specification and performance of each parts are followed

5.2. HDMI Input (DTV / PC)

6.2. HDMI Input

(b) HDMI Input(1.3)

6.3. USB Input

6.6. Remark: 3D Input mode

3.2. Final assembly adjustment

䮝 Caution) When EDID Download, must remove RGB/HDMI

4.2.4. EDID DATA

5. Final Assembly Adjustment

5.1.1.2. Adj. condition and cautionary items

5.1.5.2. Manual adjustment

** (Aging chamber) LGD Cell (LB5xxx, LB6xxx, LB7xxx,

** (normal line) LGD Cell (LB5xxx, LB6xxx, LB7xxx, LB8xxx)

7. AUDIO output check

(4) Updating is staring.

(5) Updating Completed, The TV will restart automatically

* After downloading, TOOL OPTION setting is needed again.

Check Inverter Control No Check Power Board or Module

Check RF Cable & Signal

Check input signal f ormat.

Check input signal f ormat.

Check input signal f ormat.

No Check other set No

Check the TV Speaker Menu Of f

Check AMP IC(IC5600) Power No

Check Output Signal P5600 No

Check RF Cable & Signal

Only for training and service purposes

LG Electronics. Inc. All rights reserved.

51P FHD LVDS wafer

LGE Internal Use Only

Only for training and service purposes

LG Electronics. Inc. All rights reserved.

51P FHD LVDS wafer

LGE Internal Use Only

Only for training and service purposes

LG Electronics. Inc. All rights reserved.

HW I2C 4ea + SW I2C 1ea

LGE Internal Use Only

TP for CI slot TP for SCART TP for Headphone

/PCM_OE PCM_D[1] PCM_A[9] CI_TS_VAL SC1_ID HP_ROUT

/PCM_WE PCM_D[2] PCM_A[10] CI_TS_SYNC SC1_FB SIDE_HP_MUTE

/PCM_IORD PCM_D[3] PCM_A[11] CI_TS_DATA[0] HP_DET

/PCM_IOWR PCM_D[4] PCM_A[12] CI_TS_DATA[1] DTV/MNT_VOUT

/PCM_CE PCM_D[5] PCM_A[13] CI_TS_DATA[2] SCART1_Lout

/PCM_IRQA PCM_D[6] PCM_A[14] CI_TS_DATA[3] SCART1_Rout

D803-1 D804-1 D805-1 D806-1

D803-2 D804-2 D805-2 D806-2

C114 15pF C113-1 18pF C113-2 22pF C113-*3 27pF