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Design of Power Electronics Converter:

beyond topology
---
On the use of optimization in Power Electronics

JL.Schanen
University Grenoble Alps – CNRS - G-INP

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2017
Introduction: Converter Design
What is a « good converter »?
Low cost
Good efficiency
Low Volume, weight
Safe operation, quite commutation,
no external disturbance
… in some cases accepting wide
input/output voltage

The definition may vary depending on


the industrial application (aerospace,
trains, grid converters, consumer
electronic equipments, …)

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Introduction: Converter Design
IEEE Xplore: « Design Power Electronics » - 147,049 hits !

It is our every day work

We are designing converters !

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Introduction: Converter Design
SMPS design:
Wide space of solutions
• Several topologies
• Several possible design
• Several candidate technologies
Multidisciplinary (Power Electronics & control, thermal,
electromagnetics, mechanics, …)
Evoluting requirements, especially during the preliminary
steps

A task for experienced engineers, but …


A lot of time spent in converter design (iterative design)
Often solutions are inherited by history
Are we using the emerging technologies at the best ?
What should be the next technological breakthrough ?

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What we usually do…
Local optimization
Local optimization

Experimental Experimental
Validation Validation

Components
Layout EMC
• Is it the good choice
one ? • Switching • Meeting
frequency Standards
• Component • Filter design
Topology & design Cooling
Mechanics
Control System
Experimental
Validation

Experimental
Experimental Validation
Validation

Local optimization Local optimization


Local optimization

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What we usually do…

Components
Layout EMC
• Is it the good choice
one ? • Switching • Meeting
frequency Standards
• Component • Filter design
Topology & design Cooling
Mechanics
Control System

Not easy to meet all criteria …

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What we usually do…
…in a reasonable amount of time!

Yes
Specifications Inputs Model Outputs OK?

No

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Illustration: DC-DC conversion
DC-DC conversion example: Aircraft application:
Vin=540V, Vout=28V, P=5kW, FS=50kHz
Minimum Weight
Respecting all aircraft criterion, especially the EMI
limits from DO160

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Illustration: DC-DC conversion
DC-DC conversion example

Hard switching Bridge Current Fed (half or full Bridge)

Dual Active Bridge Series resonant converter (unidirectional)

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Illustration: DC-DC conversion
All previous converters exhibit 8 switches, 1 output capacitor,
1 transformer, 1 Inductor
Design results from converter requirements + components
constraints
Topology Control parameter Transformer Main component
Hard Switching Bridge d = 88% m = 0.06 Lout = 10µH
2% current Ripple

Current Fed (Full Bridge) d = 80% m = 0.041 Lin = 200µH


SC Max Voltage 60% Current Ripple

Dual Active Bridge δ = π/2 m = 0.075 L = 100µH


d = 50% for both bridges fixed by the output
current at max Power

Series Resonant Converter FS/FR = 1.084 m = 0.055 LR = 238µH


Max voltage on CR CR = 50nF
* sizing constraint

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Illustration: DC-DC conversion
Input current is really different… and input EMC filter will be
part of the final weight

HBC CFC

DAB ISP3D - March 16, 2017 SRC • 11


Illustration: DC-DC conversion

Input currents are really different…


and input EMC filter will be part of
the final weight to fulfill the D0160
EMC standard

Current Fed converter’s input


inductance is very big, but helps in
reducing EMC spectrum

Comparison is not straightforward

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Outline
1. Introduction
2. Design by optimization methodology
1. Principle
2. Designing in a virtual world: order 1 method
3. Examples of application
3. From component choice to converter realization
Impact of Layout - Optimization again
1. Keep semiconductors in the SOA
2. Mitigate ground current
3. Accounting for stray couplings
4. Conclusion

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2.Design by optimization
Goal
Explore a wide space of solutions and find the « best » one regarding
one or several objectives, and satisfying several constraints

Final solution

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2.1. DbO Principle
Principle
Identifying coupled phenomena and solving them together
Not a step by step approach
Increases
switching
losses
• Example switching frequency

Decreases
Requirements passives’
weight
Analysis of all interactions
Defining the constraints
Defining one objective function
• Multiobjective optimization: Pareto fronts
Providing models
Defining an optimization strategy

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2.1. DbO Principle
Some design concepts
Design is not finding the solution to a well specified problem, but finding
the best way to formulate it, so as at least one possible solution can be
found
… and if several solutions exist, finding the best trade-off

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2.1. DbO Principle
The most straightforward idea: supervision of accurate
and detailed modeling tools
Opimization
supervisor

Circuit EM Thermal Mechanical


Simulator simulation simulation description

Functional Material
Material A unified framework for
Component Database
models computationally efficient power
Component level
converter design optimisation [Univ
Database
Bristol-Manchester]
Material An Optimization Approach for
Advanced
Wires Designing Multilevel Converters
Component
Core [University of British Columbia
level 1
Database Vancouver]
An advanced tool for optimized
design of power electronic circuits
ISP3D - March 16, 2017 [Aalborg University]

2.1. DbO Principle
Discussion
Practical issues:
• Optimization time, number of variables
• time simulation in the loop + convergence…
• Coherence of different descriptions: 3D geometries in different physics, electrical values, …
More complexity, less accuracy
%error
• Finding the best level of description
• Keep all phenomenon at equivalent
level of accuracy
Formulation of constraints
• Design constraints are huge: limits of
Nb parameters describing the phenomenon
parameters, physical limits –saturation,
max temperature, voltage, …
• Stochastics algorithms have limited ability to handle constrained problems (penalty in the
objective function)

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2.2. Designing in a Virtual World
Order 1 Method
Some optimization algorithms are more suited to handle
large number of variables and constraints
SQP, relaxation…
They need the derivative of functions Forbidden Area
and constraints: Order 1
All models have to be derivable
The difficulty is now to elaborate the model
Order 0: usual models, sophisticated algorithms

Derivable models = no discrete functions


Turn number, core reference, …
We optimise in a virtual world where all is possible
If no solution exists in this world, no solution will exist in the
real Power Electronics World

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2.2. Designing in a Virtual World
Order 1 Method

Derivable model example: Inductor


1 base core, homotetic variation
Turn number not integer
L = N²/Reluctance
Material property extrapolation: µr(Idc,F)
Copper and Core losses analytic evaluation
• skin effect, proximity effect
• Steinmetz, GSE, IGSE, Loss Surface, …
Heat exchange coefficient evaluation
Weight, Volume
Cost (BoM)

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2.2. Designing in a Virtual World
Order 1 Method

Derivable model example: Capacitor


Interpolation of adequate quantities function of capacitance
• Esr, esl
• RMS current
• Weight, volume
Interpolation has to be
performed for all
technologies

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2.2. Designing in a Virtual World
Order 1 Method
Derivable model example: Semiconductor
Analytic expression of voltage & current waveforms
Temperature dependence
Semiconductor parameters (transconductance, voltage drop,
threshold voltage, capacitors) extracted from datasheets and
extrapolated for voltage and current capability
• Ciss(Vb, I), Coss(Vb, I), Crss(Vb, I)
• The extrapolation is physic based (I ↔ S, V ↔ doping thickness)

Rds_on = f(Id)
350
Id à 25°C
300

Rds_on (mΩ)
Switching Energy (mJ)

250 Puissance (Id à


200 25°C)
150
100
50
0
0 20 40 60 80 100
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2.2. Designing in a Virtual World
Order 1 Method
Derivable model example: Heatsink
Pure analytic model from [Kolar]
Heatsink geometry
(area, fins height, …)
Heatsink weight
Heatsink model
Rth
Fan characteristics

Derivable model example:


Ripples, EMC
Solved in the frequency domain
using equivalent sources
High frequency effects (beyond
1MHz) are not impacting so much
the weight – Layout effect, see
part 3
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2.2. Designing in a Virtual World
Order 1 Method
Example of a SiC switching cell
SC Losses
Heatsink (Rth, Weight)
Thermal (SC temperature evaluation)
Inductors/transformers
(weight, saturation, leakage,
Losses)
Capacitors
(weight, max rms current)
Ripple
(at switching frequency)
EMC

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2.2. Designing in a Virtual World
Order 1 Method
Example of a SiC switching cell
Power Converter
Power 1kW
DC Input Voltage 400V
DC Output Current 5A
Duty Cycle 0.5
Input/output Voltage Ripples ∆Vin/out = 1%
EMC requirements DO160F
Technology
MOSFET Device Cree C2M0080120D
Diode Device Cree C4D20120D
Finned heatsink - Forced air cooled – 2 possible
Heatsink fans
Wound on torroidal core material µr = 5000 (CM
Inductors filter) or 160 (DM/output inductor)
Cx, Cy Ceramic
Cin Ceramic
Cout Electrolytic
Layout stray capacitance (generates CM
Layout Effect of EMC standard:
current) = 100pF
sudden need of EMC Filter
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2.2. Designing in a Virtual World
Order 1 Method: Summary
Order 1 method necessitates efforts for developping dedicated
models but is very powerful
Risk of local optimum – Hybrid Algorithm
Example « Stratobus Project »
Halfway between a drone and a satellite
• Autonomous airship, operating at an altitude of about 20
kilometers (stratosphere)
• Electrical airship: solar panels, fuel cell, electrolyze unit
Interleaved buck converter

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2.2. Designing in a Virtual World
Order 1 Method: Summary

Stratobus
3 month PHD student to develop and implement the models in a
dedicated framework, CADES
Optimization problem summary:
• Several set of specifications often evolving (≈10 versions)
• 1 objective function
• 15 design parameters
• 62 design constraints
≈10s each optimization
Ongoing project,
some improvements needed

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2.2. Designing in a Virtual World
Order 1 Method: Summary
Fréquence Masse self Pourcentage
Mode de
Matériau Densité de de sur la masse Limites atteintes par l’optimisation
conduction
découpage puissance totale

7,2
MPP 26 Discontinue 155 kHz 146 gr 80 % Température self, rendement, THD
kW/kg

7,5
MPP 60 Discontinue 125 kHz 91,1 gr 76 % Température self, rendement, THD
kW/kg

7,6 Température jonction MOSFET,


MPP 125 Continue 230 kHz 223 gr 85 %
kW/kg conduction Pmin, η, Température self

7
KoolMu 60 Discontinue 115 kHz 105 gr 78 % Température self, rendement
kW/kg

7,4
KoolMu 125 Continue 230 kHz 226 gr 83 % Température self, rendement
kW/kg

6,4
HighFlux 147 Continue 230 kHz 279 gr 86 % Température self, rendement
kW/kg

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2.2. Designing in a Virtual World
Order 1 Method: Summary
Other example: UPS design – NPC vs Half Bridge

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2.2. Designing in a Virtual World
Order 1 Method: Summary
Other example: UPS design – NPC vs Half Bridge
Half bridge, 1 phase, 10kVA, Filter, _40 Material

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2.2. Designing in a Virtual World
Order 1 Method: Summary

Other example: UPS design – NPC vs Half Bridge


NPC – 100kVA – Filter – Different materials
Cost

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2.2. Designing in a Virtual World
Order 1 Method: Summary

Other example: UPS design – NPC vs Half Bridge


10kVA, _40 Material, Filter
60

50
_40, NPC _40, Half Bridge
Coût
Cost

40

30

20
150 200 250 300 350 400 450

Losses

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2. Discussion & Conclusion
A « good » converter is a good adequation between
Well defined requirements
An adequation between the topology and technology
Optimization can help the designer in
Finding a solution
Choosing the best compromise
Order 1 method
takes some time to be implemented
but very powerful especially in the preliminary design phase
Optimization will never replace the designer
Help in formulating the problem
Shows possible designs compromises (Pareto analysis: e.g. Weight vs Cost, Weight
vs Losses, … )
Helpfull with new emerging technologies where no experience has been
accumulated
Key method for challenging the impact of requirements (EMC standards, …)
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4. Conclusion
Converter design is not only choosing an appropriate topology
and control strategy
Design by Optimization methodology may help engineers in
better formulating the design problem, and explore wide
space of solutions, especially with the new devices which may
challenge past solutions
Order one method applied to power electronics seems very
performant, even if derivable models are quite challenging to
develop

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4. Conclusion
New high speed devices necessitate improvements in
semiconductor packaging, both on power and gate part
Common mode generation can be mitigated at source
Stray interactions between components and layout tracks
have to be managed, and even used in a positive way

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Thank you !

M.Delhommais, PHD student


A.Baraston, PHD Student JP Ferrieux
P.Pelletier, MSc F.Wurtz
C.Martin, PHD PO.Jeannin
T.De Oliveira, PHD JM.Guichon

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