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Form A

Form No……
(for official use only)

1. Title of the Project:- CONTROL CHARGING OF CAPACITOR BANK

2. Discipline/ Subject Area- Electrical Engineering

3. Region - Udaipur

4. Designation & Address of the Person, in whose name, Demand


Draft/Bankers Cheque of grant is to be sent.

Director
GEETANJALI INSTITUTE OF TECHNICAL STUDIES,
Dabok,
Udaipur

5. Name & Class/Year of the Students


1. Choubisa Pritesh (B.Tech. IV Year, VIII semester, Electrical engineering)
2. Ravi Kumar Bairwa (B.Tech. IV Year, VIII semester, Electrical engineering)
3. Mukesh Kumawat (B.Tech. IV Year, VIII semester, Electrical engineering)
4. Sanware lal Kumawat (B.Tech. IV Year, VIII semester, Electrical engineering)

6. Address of the Students


(Institutional & Correspondence Address with E-mail ID & Fax, Mobile No.)
Institutional address:- - Deptt. Of Electrical Engg. ,
GEETANJALI INSTITUTE OF TECHNICAL STUDIES,
Dabok,
Udaipur
Fax:-0294-2657492
.
Name:- CHOUBISA PRITESH BHUPENDRAKUMAR
Address :-16, U.I.T.colony Dhikli road, Pratap Nagar,Udaipur.
E-mail id:- rajchoubisa_23688@yahoo.com
Mo.no.:- 9667767045,7737576400

Name:- RAVI KUMAR BAIRWA S\O UMMEDI LAL BAIRWA


Address:- Novel kheswer colony, in front of shiv temple, khari road,bhinmal
District:- jalore(rajasthan)
E.mail I.D.:- ravi5302@yahoo.com
Mo.no:-9460624675

Name :- Mukesh kumawat S/o Bheru lal kumawat


Address:- village post sawa.Dist chittorgarh(raj.)
Email id:- kumawat.mukesh2010@gmail.com
Mo.no.:-9694433704

Name:- Sanware lal kumawat S/o Basantilal kumawat


Address:- f-1/8 durga colony, vikram nagar, Khor. Dist:- Neemuch,(M.P.)
Mo no.:- 9784291678.

7. a) Name & Designation of the Supervisor/Guide


Mr. Shiv Shanker Sharma
Head of Department
Department of Electric Engineering, GITS, Dabok, Udaipur
b) Institutional & Correspondence Address of the Guide with Telephone No.
E-mail ID & Fax, Mobile No.
Institutional Address- Deptt. Of Electrical Engg. ,
GITS, Dabok, Udaipur
Mb- 9460005654,
E-mail- hodeegits@yahoo.com,
Fax:-0294-2657492

(i) CHOUBISA PRITESH


(ii) RAVI KUMAR BAIRWA
(iii) Mukesh kumawat Shiv Shanker Sharma
(iv) Sanware lal kumawat

Name & Signature of the Students Signature of Guide of the Project

CERTIFICATE

It is hereby certified that


(i) Institution takes the responsibility of implementing the Student Project within
stipulated period.
(ii) The Institution shall provide the Infrastructural & other facilities required for the
project.
(iii) The amount sanctioned by Department of Science & Technology, Rajasthan,
Jaipur shall be provided to the concerned Student/Guide timely and funds be
utilized for the purpose for which it has been sanctioned.

Dr. A.N. Mathur


Director

Date : 29/09/2010 Signature of the Head of Institution


Place: Udaipur Name and Designation with seal

 Title of the Project :-‘”CONTROL CHARGING OF CAPACITOR BANK “‘


 Project Summary

For improving the power factor, we use a large value Capacitor Bank in
parallel to the load for a single phase or three phase power systems.
Switching of these capacitor banks is made by using contactors or large
current carrying capacity relays. But switching one of the supplies causes
sudden charging of capacitor. This causes high peaks at the output of
capacitor for short period. Due to this sudden surging there is loss of dielectric
in the capacitor & life of capacitor reduces.
We control the switching operation of capacitor bank by using control
circuit. So, life of capacitor bank will increase.

 Technical details of the Projects

o Origin of the Proposal:-


While taking training in G.S.S. Bhinmal during 12 April to 12 May we
observe the following problem in switching capacitor bank. While
switching the capacitor banks there was degradation in their life
because of loss of dielectric in capacitor because of high surges.
We discuss this problem with site engineer and we can along for this
solution that if we can control the switching operation by using a circuit.

o Definition of the problem:-


In transmission lines for power factor improvement capacitor banks
are used. While switching of those capacitor banks surges of high voltage
are generated. Due to those high voltage surges , high dielectric loss take
place in capacitor and sometimes it flashes the capacitor bank. It results
that reduce in life of capacitor banks.

o Objectives:-
1) Reducing the surge voltage while switching the capacitor banks
using control circuit
2) Increasing in life of the capacitor connected in capacitor banks using
control circuit.

o Work Plan:-
1) Design blue print of circuit
2) Program creation for microprocessor used.
3) Do the simulation of the circuit
4) Create a hardware using components, CRO and bread board.
5) Make it for 3phase.
6) Increase the values of banks used.
7) Will be tested on transmission lines 220 Volt load end.
o Time schedule:-
1) 1phase model within 3 months
2) 3 phase model in next 7 months will be completed.

o Proposed outcome/ findings:-


Switching surges on the capacitor bank will reduce and hence long
life of capacitor banks.

o Details of facilities to be provided by the Institution:-


Function generator, Power System Lab for testing

 Budget Estimates (with details) –


Microprocessor and
Peripheral Devices = 3000/-
nterfacing circuit = 2500/-
Auxiliary supply Circuit = 3000/-

 Minor Equipment:-
Diode = 200/-
Driver circuit = 500/-
Latches = 100/-
Capacitors = 2500/-
Resistors = 200/-

 Report writing :- 80 pages*10/-=800/-

 Utilization of the outcome of project:-


For step-less power factor improvement of inductive load ,reduction of line
losses and improved voltage regulation

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