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B.E./B.Tech. DEGREE EXAMINATION, MAY/JUNE 2009
Sixth Semester
Electronics and Communication Engineering
CS 1251 - COMPUTER ARCHITECTURE
(Common to B.E. (part-time)Fith Semester Regulation 2005)
(Regulation 2004)
Time: Three hours Maximum: 100 marks

Answer ALL questions

PART A - (10 * 2 = 20 marks)

1. Define SPEC rating.

2. What are the major functions of system sotware in a typical computer?

3. Why is the implementation of logic operations easier than arithmetic operations using
combiation circuitry?

4. What is Von Neumann rounding?

5. Distinguish betwee static and dynamic branch prediction approaches.

6. Define the terms microroutine and microinstruction.

7. How many 128 * 4 RAM memory chips are required to construct RAM memory
system of 1 K bytes?

8. Compare SDRAM with DDE SDRAM.

9. What are vectored interrupts?

10. List the functions of I/O interface.

PART B - (5 * 16 = 80 marks)

11. (a) (i) Decribe the addressing modes for accessing memory content. (8)
(ii) Name and explain various special register in a typical computer (8)

OR

(b) (i) Explain Zero, one, two and three addressing instructions with example. (8)
(ii) What are the two ways of byte addressing? Explain. (8)
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12. (a) (i) Describe the design of 4-bit carry look ahead adder. (8)
(ii) Illustrate multiplication of signed 2's complement number 01101 and 11010 using bit-
pattern of the multipliers. (8)
OR
(b) (i) Explain nonrestoring division algorithm with the help of suitable example. (8)
(ii) What is half adder? Design a half adder as a two-level AND-OR circuit and show
how to implement a full adder using two half adders and a exteral logic gate. (8)

13. (a) (i) What are superscalar processors? Explain the typical structure of a typical
superscalar processor. (10)
(ii) Draw the timing diagram for memory read operation and explain. (6)
OR
(b) (i) Explain the basic organisation of a microprogrammed control unit and what
modification is required in the basic organization to support microprogram branching. (8)
(ii) What are the three types of hazards that cause performance degradation in pipelined
processors? Explai them in detail. (10)

14. (a) (i) Briefly explain any four nonvolatile memory in detail. (10)
(ii) Explain how virtual address is translated into physical address in a paged memory
system with the help of a diagram. (6)
OR
(b) (i) Describe the working principles of optical disks in detail. (10)
(ii) Draw a CMOS memory cell and explain its functions. (6)

15. (a) (i) Explain the block diagram of typical serial interface in detail (10)
(ii) With a neat diagram describe the implementation of distributed arbitration. (6)
OR
(b) (i) Describe the major phases involved in the operation of the SCSI bus. (8)
(ii) What are the handshaking signals and what are the sequences of events during an
input operation using handshake scheme? (8)

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