Professional Documents
Culture Documents
vi+
+ + +
vi− − − −
■ First stage:
polarity of Gm1 is inverted to reßect reversal of input terminals ... which is done
to make the overall gain positive for vd > 0
Gm1 = gm1
Rout1 = ro2 || ro4
■ Second stage:
Gm2 = gm5
Rout = ro5 || ro6
a vdo = g m1 ( r o2 r o4 )g m5 ( r o5 r o6 )
■ Design constraints
Typical situation for an internal op amp: area and power are both limited.
SimpliÞed area constraint -- set Wmax = 150 µm
(for minimize channel-length modulation, set Lmin = 3 µm)
Set DC power budget at 1.25 mW (including reference current) for case where
we have symmetrical supplies: V+ = 2.5 V and V - = - 2.5 V.
+2.5 V
M8 M7 M6
(75/3) 1 (150/3) (150/3)
2
_ + +
M1 M2 CL v
vI− (150/3) (150/3) vI+ Cc O
−
50 µA
4
M3 3 M4 M5
(75/3) (75/3) (150/3)
−2.5 V
n-channel MOSFET
µA
µnCox = 50 tox = 15 nm Cov = 0.5 fF/µm φBn = 0.95 V
V2
0.1(µm/V)
VTOn = 1.0 V λn = Cjno = 0.1 fF/µm2 mjn = 0.5
L
γn = 0.6 V1/2 2φp = −0.8 V Cjswno = 0.5 fF/µm mjswn = 0.33
p-channel MOSFET
µA
µpCox = 25 tox = 15 nm Cov = 0.5 fF/µm φBp = 0.95 V
V2
0.1(µm/V)
VTOp = −1.0 V λp = Cjpo = 0.3 fF/µm2 mjp = 0.5
L
γp = 0.6 V1/2 2φn = 0.8 V Cjswpo = 0.35 fF/µm mjswp = 0.33
room for improvement in the upper limit -- possible at the expense of increased
area (W/L) ratios must be increased.
■ Small-signal parameters:
gm1 = gm2 = 357 µS
gm5 = 2 gm1 = 714 µS
ro2 = ro4 = 600 kΩ
ro5 = ro6 = 300 kΩ
4
a vdo = ( 0.357 ) ( 600 600 ) ( 714 ) ( 300 300 ) = 1.15 ×10
vs(t) +
_ Op Amp vo(t)
vs(t) = vssin(ωst)
Feedback is to negative terminal of op amp, which tends to stabilize the output
voltage vo(t) to be nearly equal to vs(t)
■ What happens when the phase of avd(jωs) = 180o?
... the sign of avd is ßipped! Consider + and - terminals to be reversed!
... if |avd(jωs)| > 1, then the output is destabilized if the input is perturbed.
■ If the gain of the op amp is less than 1 (in magnitude) when the phase is 180o,
then the unity-gain non-inverting configuation (worst-case) will be stable
■ One solution: locate the second pole of the op amp ω2 at approximately the unity
gain frequency
ω 2 ≈ a vdo ω 1
C'c
+
+
Is C1 Vi2 R1 Gm2Vi2 Rout C'L Vo
−
−
The compensation capacitor Cc sets the dominant pole ω1 by the Miller effect:
Ð1
ω 1 ≈ R 1 C 1 + R 1 ( 1 + G m2 R out )C c ′
where R1 = Rout1
1
ω 2 ≈ G m2 ⁄ C L ′ = --------------------------------
( 1 ⁄ G m2 )C L ′
■ Interpretation:
At frequencies around ω2 (>> ω1), the impedance Zc = (1 / jω2 Cc) is small
enough that M5 can be considered diode-connected
Load capacitance sees a ThŽvenin resistance of 1 / gm5 -->
357 µS
C c ′ ≈ ------------------ C L ′ = 3.9 pF
714 µS
■ Area requirement with a 500 • thick oxide is less than 100 x 100 µm2 -->
not a signiÞcant addition to the op amp area
■ Pole locations: