Home Assignment No-3

Subject: Digital Logic Design Marks: 100

Course: BIT-11 Issue: 08 Nov 2010
Instructor: Arshad Nazir Due on: 15 Nov 2010
(09:00 AM)
Note:

Attempt the given problem set in a sequential order. Be neat and show
complete work.

Make an index on the first page showing summary of the problems
solved along-with page numbers and also specify the missing ones.

No late submissions will be accepted unless prior approval from the
teacher has been obtained under extreme exigencies. The assignments
submitted after due date/time will be graded zero.

Plagiarism is the unacknowledged use of other people’s work, including
the copying of assignments from the other students. Plagiarism is
considered as a serious offence by the university and serious penalties
apply. Any assignment found copied will be graded zero and strict
disciplinary action will also be initiated against the students involved in
cheating.

All the students will submit a certificate with the assignment work stating
the originality of their efforts with no copying from others.

Note that Twenty Marks are reserved for presentation, quality work,
table of contents, and certificate attached with the assignment work.

Problem No-1 Optimize the following Boolean functions together with the
don’t care conditions d in sum-of-products form using map
method by finding all the prime implicants and essential
prime implicants and applying the selection rule:
a. f(a,b,c,d)= ∑m (2,4,5,6,9,10,11,12,13,15)
b. F1 (A,B,C,D)=(A +B + D )(A+B +C )(A + B+D )(B+C +D )
c. F2(W,X,Y,Z)=∑m (0,1,5,5,8,9,11,13,)+∑d (7,10,12)

Problem No-2 Four large tanks at a chemical plant contain different liquids
being heated. Liquid-level sensors are being used to detect
whenever the level in tank A or tank B rises above a
predetermined level. Temperature sensors in C and D detect
when the temperature in either of the tanks drops below a
prescribed temperature limit. Assume that the liquid-level
sensor outputs A and B are LOW when the level is
satisfactory and HIGH when the level is too high. Also, the
temperature sensor outputs C and D are LOW when the
temperature is satisfactory and HIGH when the temperature
is too LOW.

1
 Design a logic circuit that will detect whenever, the level in
tank A or tank B is too high at the same time that the
temperature in either tank C or tank D is too low.
Implement the design using two-level (a) NAND-AND, (b)
AND-NOR, (c) OR-NAND, and (d) NOR-OR forms.

Problem No-3 Find a minimum sum-of-products expression for the

following function together with the don’t care conditions d
using map method. Underline the essential prime implicants
in this expression.
f(v,w,x,y,z)= ∑m(0,2,6,7,8,10,11,12,13,14,16,18,19,29,30)
d(v,w,x,y,z)= ∑d(4,9,21)

Problem No-4 Obtain the minimum sum-of-products expression for the

following function using
G(A,B,C,D,E,F)= (1,3,6,8,9,13,14,17,19,24,25,29,32,33,34,
35,38,40,46,49,51,53,55,56,61,63)
a. Map method
b. Quine-McCluskey(Tabulation)method

Problem No-5 Implement the given two-level function using

f(x1,x2,x3,x4,x5,x6,x7)=x1x4x5+x1x4x6+x1x7+ x2x3x4x5+
x2x3x4x6+x2x3x7)
a. Multi-level NAND gates
b. Multi-level NOR gates only
Assume that NAND and NOR gates have a fan-in of three
and two respectively and the input variables are available in
un-complemented form only.

Problem No-6 Derive the circuits for a four-bit parity generator and five-bit
parity checker using odd parity.
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“Good Luck”