GPS-GSM Based Public Transportation

System

Abstract

Due to non-availability of prior information about the buses arrival schedule,

people have to wait longer on bus stops especially in morning when they have to reach
the offices in time. The buses are overloaded for most of the times which often results in
some kind of fault occurrence in buses and people get late further. This project proposes
and implements a solution for enhancing public transportation management services
based on GPS and GSM. The system consists of three modules: BUS Station Module, In-
BUS Module, BASE Station Module equipped with PC and GSM modem, BUS Station
Module sends the initialization information containing the bus for particular destination
to the BASE Station Module using SMS.
The microcontroller based In-BUS Module consisting mainly of a GPS receiver
and GPRS enabled GSM modem then starts transmitting its location and number of
passengers to BASE Station Module. BASE Station Module equipped with a
microcontroller unit and GSM modems interfaced to PCs is designed to keep track record
of every bus, processes user request about a particular bus location out of BUS Station
and updates buses location on bus stops. Server in the base station will have the IP
address which is assigned to each GSM module fixed in the Bus to transmit the data
continuously from longer distance. Pair of IR Sensors are fixed in the bus module to
count the passenger of entry and exit and transmit the status of the crowd at that time.
 Scope:
This project proposes and implements a solution for enhancing public
transportation management services based on GPS and GSM. The system consists of
three modules: BUS Station Module, In-BUS Module, BASE Station Module equipped
with PC and GSM modem, BUS Station Module sends the initialization information
containing the bus for particular destination to the BASE Station Module using SMS.
The microcontroller based In-BUS Module consisting mainly of a GPS receiver
and GPRS enabled GSM modem then starts transmitting its location and number of
passengers to BASE Station Module. BASE Station Module equipped with a
microcontroller unit and GSM modems interfaced to PCs is designed to keep track record
of every bus, processes user request about a particular bus location out of BUS Station
and updates buses location on bus stops
.

Literature Survey:

Literature 1:

The paper “The mobile robot GPS position based on neural network adaptive
Kalman filter” by Wei Wu in the year 2009 presented a GPS positioning method based on
neural network adaptive Kalman filter. Using the innovation vector which reflects the
degree how the model fits the data, and real-timely accessing to the innovation vector’s
ratio of the theoretical variance to the actual of variance, we can get the working
conditions of Kalman filter. Then track the change of system parameters through neural
network, where the adaptive regulatory factors are generated which can correct the
Kalman filter, improve the performance of the Kalman Filter, and prevent the filter
divergence. Because neural network has a strong learning and adaptive ability, the system
noise covariance matrix can be corrected real-timely, and can be adjusted online.
 Literature 2:

In the paper “Remote Data Monitoring System Design Based on GSM

Short Message Service “ by Yan Hongwei , and Pan Hongxia design and implementation
of a remote data collection and monitoring system was investigated. The proposed system
utilized GSM short message service to perform remote data collection and monitoring.
The communication software written in VB programming language achieved efficient
control of serial interface ports and real-time synchronization of remote data into system
database, thus the multi-directional data monitoring was accomplished effectively

Block Diagram
Bus Block

IR Sensor Pair
GPS

Microcontroller
Power Supply

RS232 GSM Modem

RTC GPRS

Explanation:

Bus module consist of Controller section interfaced to IR Sensor pair,

GSM (GPRS) enabled module and GPS module. GPS will measure the location of the
vehicle with RTC timer part to indicate the exact time of the location. Two pair of IR
sensors will be used to display the current status of the passengers in the bus (One pair
 for incrementing and other pair for decrementing). GPRS module will be assigned with
server ip address to which data is to transmitted.

Bus Depo Module

Server Controller GSM Modem

RS232

Explanation:
Depo block will consist of PC, Controller section and GSM modem. Data
received by the PC(Server) via GPRS module can be transmitted to the users via other
GSM module connected to it. Controller section will be used for interfacing PC and GSM
via RS232 communication.

User Module

Mobile
Module Description:
Bus Module:

Bus module will be the base module for the entire process
which has the three sensors connected to the ARM processor and Output will be via
GPRS. Two pair of IR sensors is connected to the processor, one to count the entry value
and other to count exit value. GPS will provide the latitude and longitude location. RTC
is interfaced a timer.

Depo Module

In the Depo module web server is created to receive the data

from all the buses and display in the front panel. This server in turn also provides
response for the request received from all mobile users in each station.

User Module:

User module will be the collection of users in all bus stops

holding a mobile to know the status of the buses of their route. So users can send the
request to the server using his mobile.

ARM
INTRODUCTION

The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S

CPU with real-time emulation and embedded trace support, that combines the
microcontroller with embedded high speed flash memory ranging from 32 kB to 512 kB.
A 128-bit wide memory interface and unique accelerator architecture enable 32-bit code
execution at the maximum clock rate. For critical code size applications, the alternative
16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for
applications where miniaturization is a key requirement, such as access control and point-
of-sale. A blend of serial communications interfaces ranging from a USB 2.0 Full Speed
device, multiple UARTS, SPI, SSP to I2Cs and on-chip SRAM of 8 kB up to 40 kB,
make these devices very well suited for communication gateways and protocol
converters, soft modems, voice recognition and low end imaging, providing both large
buffer size and high processing power. Various 32-bit timers, single or dual 10-bit
ADC(s), 10-bit DAC, PWM channels and 45 fast GPIO lines with up to nine edge or
level sensitive external interrupt pins make these microcontrollers particularly suitable for
industrial control and medical systems.

FEATURES

• 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.

• 8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program
memory.
128 bit wide interface/accelerator enables high speed 60 MHz operation.
• In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader
software.
Single flash sector or full chip erase in 400 ms and programming of 256 bytes in1
ms.
• EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with
the on-chip RealMonitor software and high speed tracing of instruction execution.
• USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM. In
addition, the LPC2146/8 provides 8 kB of on-chip RAM accessible to USB by
DMA.
• One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total
of 6/14 analog inputs, with conversion times as low as 2.44 µs per channel.
• Single 10-bit D/A converter provides variable analog output.
 • Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.
• Low power real-time clock with independent power and dedicated 32 kHz clock
input.
• Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus
(400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
• Vectored interrupt controller with configurable priorities and vector addresses.
• Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.
• Up to nine edge or level sensitive external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with
settling time of 100 µs.
• On-chip integrated oscillator operates with an external crystal in range from 1
MHz to 30 MHz and with an external oscillator up to 50 MHz.
• Power saving modes include Idle and Power-down.
• Individual enable/disable of peripheral functions as well as peripheral clock
scaling for additional power optimization.
• Processor wake-up from Power-down mode via external interrupt, USB, Brown-
Out Detect (BOD) or Real-Time Clock (RTC).
• Single power supply chip with Power-On Reset (POR) and BOD circuits:
– CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V
tolerant I/O pads.

APPLICATIONS

• Industrial control
• Medical systems
• Access control
• Point-of-sale
• Communication gateway
• Embedded soft modem
• General purpose applications

ARCHITECTURAL OVERVIEW

The LPC2141/2/4/6/8 consists of an ARM7TDMI-S CPU with emulation support,

the ARM7 Local Bus for interface to on-chip memory controllers, the AMBA Advanced
High-performance Bus (AHB) for interface to the interrupt controller, and the VLSI
Peripheral Bus (VPB, a compatible superset of ARM’s AMBA Advanced Peripheral Bus)
for connection to on-chip peripheral functions. The LPC2141/24/6/8 configures the
ARM7TDMI-S processor in little-endian byte order. AHB peripherals are allocated a 2
megabyte range of addresses at the very top of the 4 gigabyte ARM memory space. Each
AHB peripheral is allocated a 16 kB address space within the AHB address space.
LPC2141/2/4/6/8 peripheral functions (other than the interrupt controller) are connected
to the VPB bus. The AHB to VPB bridge interfaces the VPB bus to the AHB bus. VPB
peripherals are also allocated a 2 megabyte range of addresses, beginning at the 3.5
gigabyte address point. Each VPB peripheral is allocated a 16 kB address space within
the VPB address space. The connection of on-chip peripherals to device pins is controlled
by a Pin Connect Block (see chapter "Pin Connect Block" on page 75). This must be
configured by software to fit specific application requirements for the use of peripheral
functions and pins.

LPC2148:
This is nothing but the ARM controller. ARM means advanced RISC machine. It
is a 32 bit controller. Compared to pic microcontroller ARM has a wide range of
application. Speed of this controller is also very high compared to all others. It has an
inbuilt memory of 512kb for the program as well as data. But in pic microcontroller it has
an inbuilt memory of 368 bytes, which is very less compared to ARM. The pin diagram
of LPC2148 is shown below
PIN DESCRIPTION
EXTERNAL INTERRUPT INPUTS

The LPC2141/2/4/6/8 includes four External Interrupt Inputs as selectable pin

functions. The External Interrupt Inputs can optionally be used to wake up the processor
from Power-down mode.
REGISTER DESCRIPTION

The external interrupt function has four registers associated with it. The EXTINT
register contains the interrupt flags, and the EXTWAKEUP register contains bits that
enable individual external interrupts to wake up the microcontroller from Power-down
mode. The EXTMODE and EXTPOLAR registers specify the level and edge sensitivity
parameters.

EXTERNAL INTERRUPT FLAG REGISTER (EXTINT - 0XE01F

C140)
When a pin is selected for its external interrupt function, the level or edge on that
pin (selected by its bits in the EXTPOLAR and EXTMODE registers) will set its
interrupt flag in this register. This asserts the corresponding interrupt request to the VIC,
which will cause an interrupt if interrupts from the pin are enabled. Writing ones to bits
EINT0 through EINT3 in EXTINT register clears the corresponding bits. In level-
sensitive mode this action is efficacious only when the pin is in its inactive state. Once a
bit from EINT0 to EINT3 is set and an appropriate code starts to execute (handling
wakeup and/or external interrupt), this bit in EXTINT register must be cleared. Otherwise
the event that was just triggered by activity on the EINT pin will not be recognized in the
future.

GENERAL PACKET RADIO SERVICE (GPRS):

General packet radio service (GPRS) is a packet oriented mobile data service on
the 2G and 3G cellular communication systems global system for mobile
communications (GSM). The service is available to users in over 200 countries
worldwide. GPRS was originally standardized by European Telecommunications
Standards Institute (ETSI) in response to the earlier CDPD and i-mode packet switched
cellular technologies. It is now maintained by the 3rd Generation Partnership Project
(3GPP).

It is a best-effort service, as opposed to circuit switching, where a certain quality

of service (QoS) is guaranteed during the connection. In 2G systems, GPRS provides data
rates of 56-114 kbit/second.[3] 2G cellular technology combined with GPRS is
sometimes described as 2.5G, that is, a technology between the second (2G) and third
(3G) generations of mobile telephony. It provides moderate-speed data transfer, by using
unused time division multiple access (TDMA) channels in, for example, the GSM
system. GPRS is integrated into GSM Release 97 and newer releases.

GPRS usage charging is based on volume of data, either as part of a bundle or on

a pay as you use basis. An example of a bundle is up to 5 GB per month for a fixed fee.
Usage above the bundle cap is either charged for per megabyte or disallowed. The pay as
you use charging is typically per megabyte of traffic. This contrasts with circuit switching
data, which is typically billed per minute of connection time, regardless of whether or not
the user transfers data during that period.

PROTOCOL SUPPORTED:

GPRS supports the following protocols:

• Internet protocol (IP). In practice, mobile built-in browsers use IPv4 since IPv6 is
not yet popular.
• Point-to-point protocol (PPP). In this mode PPP is often not supported by the
mobile phone operator but if the mobile is used as a modem to the connected
computer, PPP is used to tunnel IP to the phone. This allows an IP address to be
assigned dynamically to the mobile equipment.
• X.25 connections. This is typically used for applications like wireless payment
terminals, although it has been removed from the standard. X.25 can still be
supported over PPP, or even over IP, but doing this requires either a network
based router to perform encapsulation or intelligence built in to the end-
device/terminal; e.g., user equipment (UE).

When TCP/IP is used, each phone can have one or more IP addresses allocated. GPRS
will store and forward the IP packets to the phone even during handover. The TCP
handles any packet loss (e.g. due to a radio noise induced pause).

HARDWARE:

Devices supporting GPRS are divided into three classes:

CLASS A
Can be connected to GPRS service and GSM service (voice, SMS), using both at the
same time. Such devices are known to be available today.
CLASS B
Can be connected to GPRS service and GSM service (voice, SMS), but using only one or
the other at a given time. During GSM service (voice call or SMS), GPRS service is
suspended, and then resumed automatically after the GSM service (voice call or SMS)
has concluded. Most GPRS mobile devices are Class B.
CLASS C
Are connected to either GPRS service or GSM service (voice, SMS). Must be switched
manually between one and the other service.

A true Class A device may be required to transmit on two different frequencies at the
same time, and thus will need two radios. To get around this expensive requirement, a
GPRS mobile may implement the dual transfer mode (DTM) feature. A DTM-capable
mobile may use simultaneous voice and packet data, with the network coordinating to
ensure that it is not required to transmit on two different frequencies at the same time.
Such mobiles are considered pseudo-Class A, sometimes referred to as "simple class A".
Some networks are expected to support DTM in 2007.

Huawei E220 3G/GPRS Modem USB 3G/GPRS modems use a terminal-like interface
over USB 1.1, 2.0 and later, data formats V.42bis, and RFC 1144 and some models have
connector for external antenna. Modems can be added as cards (for laptops) or external
USB devices which are similar in shape and size to a computer mouse, or nowadays more
like a pen drive.

RS232 SPECIFICATION, INRODUCTION:

 Communication as defined in the RS232 standard is an asynchronous serial
communication method. The word serial means, that the information is sent one bit at a
time. Asynchronous tells us that the information is not sent in predefined time slots. Data
transfer can start at any given time and it is the task of the receiver to detect when a
message starts and ends. Asynchronous communication has some advantages and
disadvantages which are both discussed in the next paragraph.
RS232 BIT STREAMS:
The RS232 standard describes a communication method where information is sent
bit by bit on a physical channel. The information must be broken up in data words. The
length of a data word is variable. On PC's a length between 5 and 8 bits can be selected.
This length is the netto information length of each word. For proper transfer additional
bits are added for synchronisation and error checking purposes. It is important, that the
transmitter and receiver use the same number of bits. Otherwise, the data word may be
misinterpreted, or not recognized at all.

With synchronous communication, a clock or trigger signal must be present which

indicates the beginning of each transfer. The absence of a clock signal makes an
asynchronous communication channel cheaper to operate. Less lines are necessary in the
cable. A disadvantage is, that the receiver can start at the wrong moment receiving the
information. Resynchronization is then needed which costs time. All data received in the
resynchronization period is lost. Another disadvantage is that extra bits are needed in the
data stream to indicate the start and end of useful information. These extra bits take up
bandwidth.

Data bits are sent with a predefined frequency, the baud rate. Both the transmitter and
receiver must be programmed to use the same bit frequency. After the first bit is received,
the receiver calculates at which moments the other data bits will be received. It will check
the line voltage levels at those moments.

With RS232, the line voltage level can have two states. The on state is also known as
mark, the off state as space. No other line states are possible. When the line is idle, it is
kept in the mark state.

START BIT

RS232 defines an asynchronous type of communication. This means, that sending of a

data word can start on each moment. If starting at each moment is possible, this can pose
some problems for the receiver to know which is the first bit to receive. To overcome this
problem, each data word is started with an attention bit. This attention bit, also known as
the start bit, is always identified by the space line level. Because the line is in mark state
when idle, the start bit is easily recognized by the receiver.

DATA BITS

Directly following the start bit, the data bits are sent. A bit value 1 causes the line to go in
mark state, the bit value 0 is represented by a space. The least significant bit is always the
first bit sent.

PARITY BIT
For error detecting purposes, it is possible to add an extra bit to the data word
automatically. The transmitter calculates the value of the bit depending on the
information sent. The receiver performs the same calculation and checks if the actual
parity bit value corresponds to the calculated value. This is further discussed in another
paragraph.

STOP BITS

Suppose that the receiver has missed the start bit because of noise on the transmission
line. It started on the first following data bit with a space value. This causes garbled date
to reach the receiver. A mechanism must be present to resynchronize the communication.
To do this, framing is introduced. Framing means, that all the data bits and parity bit are
contained in a frame of start and stop bits. The period of time lying between the start and
stop bits is a constant defined by the baud rate and number of data and parity bits. The
start bit has always space value, the stop bit always mark value. If the receiver detects a
value other than mark when the stop bit should be present on the line, it knows that there
is a synchronization failure. This causes a framing error condition in the receiving
UART. The device then tries to resynchronize on new incomming bits.

For resynchronizing, the receiver scans the incomming data for valid start and stop bit
pairs. This works, as long as there is enough variation in the bit patterns of the data
words. If data value zero is sent repeatedly, resynchronization is not possible for
example.

The stop bit identifying the end of a data frame can have different lengths. Actually, it is
not a real bit but a minimum period of time the line must be idle (mark state) at the end of
each word. On PC's this period can have three lengths: the time equal to 1, 1.5 or 2 bits.
1.5 bits is only used with data words of 5 bits length and 2 only for longer words. A stop
bit length of 1 bit is possible for all data word sizes.
VOLTAGES

The signal level of the RS232 pins can have two states. A high bit, or mark state
is identified by a negative voltage and a low bit or space state uses a positive value. This
might be a bit confusing, because in normal circumstances, high logical values are
defined by high voltages also. The voltage limits are shown below.

RS232 voltage values

Level Transmitter capable (V) Receivercapable (V)

Space state (0) +5 ... +15 +3 ... +25

Mark state (1) -5 ... -15 -3 ... -25

Undefined - -3 ... +3

More information about the voltage levels of RS232 and other serial interfaces
can be found in the interface comparison table.

The maximum voltage swing the computer can generate on its port can have
influence on the maximum cable length and communication speed that is allowed. Also,
if the voltage difference is small, data distortion will occur sooner. For example, my
Toshiba laptop mark's voltage is -9.3 V, compared to -11.5 V on my desktop computer.
The laptop has difficulties to communicate with Mitsubishi PLC's in industrial
environments with high noise levels where the desktop computer has no data errors at all
using the same cable. Thus, even far beyond the minimum voltage levels, 2 volts extra
can make a huge difference in communication quality.

Despite the high voltages present, it is not possible to destroy the serial port by
short circuiting. Only applying external voltages with high currents may eventually burn
out the driver chips. Still then, the UART won't be damaged in most cases.

RS232 cable length according to Texas Instruments

Baud rate Maximum cable length (ft)

19200 50

9600 500

4800 1000

2400 3000

GPS:
The Global Positioning System (GPS) is a space-based global navigation satellite
system that provides reliable location and time information in all weather and at all times
and anywhere on or near the Earth when and where there is an unobstructed line of sight
to four or more GPS satellites.

BASIC CONCEPTS OF GPS:

 A GPS receiver calculates its position by precisely timing the signals sent by GPS
satellites high above the Earth. Each satellite continually transmits messages that include
the time the message was transmitted precise orbital information (the ephemeris) the
general system health and rough orbits of all GPS satellites (the almanac).

The receiver utilizes the messages it receives to determine the transit time of each
message and computes the distance to each satellite. These distances along with the
satellites' locations are used with the possible aid of trilateration, depending on which
algorithm is used, to compute the position of the receiver. This position is then displayed,
perhaps with a moving map display or latitude and longitude; elevation information may
be included. Many GPS units show derived information such as direction and speed,
calculated from position changes.

Three satellites might seem enough to solve for position, since space has three
dimensions and a position near the Earth's surface can be assumed. However, even a very
small clock error multiplied by the very large speed of light — the speed at which
satellite signals propagate — results in a large positional error. Therefore receivers use
four or more satellites to solve for the receiver's location and time. The very accurately
computed time is effectively hidden by most GPS applications, which use only the
location. A few specialized GPS applications do however use the time; these include time
transfer, traffic signal timing, and synchronization of cell phone base stations.

Although four satellites are required for normal operation, fewer apply in special cases. If
one variable is already known, a receiver can determine its position using only three
satellites. For example, a ship or aircraft may have known elevation. Some GPS receivers
may use additional clues or assumptions (such as reusing the last known altitude, dead
reckoning, inertial navigation, or including information from the vehicle computer) to
give a less accurate (degraded) position when fewer than four satellites are visible.

POSITION CALCULATION:
 To provide an introductory description of how a GPS receiver works, error effects are
deferred to a later section. Using messages received from a minimum of four visible
satellites, a GPS receiver is able to determine the times sent and then the satellite
positions corresponding to these times sent. The x, y, and z components of position, and
the time sent, are designated as where the subscript i is the satellite number and has the
value 1, 2, 3, or 4. Knowing the indicated time the message was received , the GPS
receiver can compute the transit time of the message as . Assuming the message traveled
at the speed of light, c, the distance traveled or pseudorange, can be computed as .

A satellite's position and pseudorange define a sphere, centered on the satellite with
radius equal to the pseudorange. The position of the receiver is somewhere on the surface
of this sphere. Thus with four satellites, the indicated position of the GPS receiver is at or
near the intersection of the surfaces of four spheres. In the ideal case of no errors, the
GPS receiver would be at a precise intersection of the four surfaces.

If the surfaces of two spheres intersect at more than one point, they intersect in a circle.
The article trilateration shows this mathematically. A figure, Two Sphere Surfaces
Intersecting in a Circle, is shown below.

The intersection of a third spherical surface with the first two will be its
intersection with that circle; in most cases of practical interest, this means they intersect
at two points.[40] Another figure, Surface of Sphere Intersecting a Circle (not a solid
disk) at Two Points, illustrates the intersection. The two intersections are marked with
dots. Again the article trilateration clearly shows this mathematically.
Surface of sphere Intersecting a circle (not a solid disk) at two points

For automobiles and other near-earth vehicles, the correct position of the GPS receiver is
the intersection closest to the Earth's surface. For space vehicles, the intersection farthest
from Earth may be the correct one.

The correct position for the GPS receiver is also the intersection closest to the surface of
the sphere corresponding to the fourth satellite.

DEMODULATION AND DECODING:

 Since all of the satellite signals are modulated onto the same L1 carrier frequency,
there is a need to separate the signals after demodulation. This is done by assigning each
satellite a unique binary sequence known as a Gold code. The signals are decoded, after
demodulation, using addition of the Gold codes corresponding to the satellites monitored
by the receiver.

If the almanac information has previously been acquired, the receiver picks which
satellites to listen for by their PRNs, unique numbers in the range 1 through 32. If the
almanac information is not in memory, the receiver enters a search mode until a lock is
obtained on one of the satellites. To obtain a lock, it is necessary that there be an
unobstructed line of sight from the receiver to the satellite. The receiver can then acquire
the almanac and determine the satellites it should listen for. As it detects each satellite's
signal, it identifies it by its distinct C/A code pattern. There can be a delay of up to 30
seconds before the first estimate of position because of the need to read the ephemeris
data.

Processing of the navigation message enables the determination of the time of

transmission and the satellite position at this time. For more information see
Demodulation and Decoding, Advanced.

MAX 232:
The MAX232 is an integrated circuit that converts signals from an RS-232 serial port to
signals suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual
driver/receiver and typically converts the RX, TX, CTS and RTS signals.

The drivers provide RS-232 voltage level outputs (approx. ± 7.5 V) from a single + 5 V
supply via on-chip charge pumps and external capacitors. This makes it useful for
implementing RS-232 in devices that otherwise do not need any voltages outside the 0 V
to + 5 V range, as power supply design does not need to be made more complicated just
for driving the RS-232 in this case.

The receivers reduce RS-232 inputs (which may be as high as ± 25 V), to standard 5 V
TTL levels. These receivers have a typical threshold of 1.3 V, and a typical hysteresis of
0.5 V.

The later MAX232A is backwards compatible with the original MAX232 but may
operate at higher baud rates and can use smaller external capacitors – 0.1 μF in place of
the 1.0 μF capacitors used with the original device.[1]

The newer MAX3232 is also backwards compatible, but operates at a broader voltage
range, from 3 to 5.5V. [2]
[edit]
Voltage levels

It is helpful to understand what occurs to the voltage levels. When a MAX232 IC

receives a TTL level to convert, it changes a TTL Logic 0 to between +3 and +15V, and
changes TTL Logic 1 to between -3 to -15V, and vice versa for converting from RS232
to TTL. This can be confusing when you realize that the RS232 Data Transmission
voltages at a certain logic state are opposite from the RS232 Control Line voltages at the
same logic state.
IR SENSOR

The IR sensor is a very simple device that works by reflecting infrared light off of
an object and detecting the reflecting with a photo-transistor that is tuned to the same
frequency of light. The LED is mounted next to the photo-transistor, however, the
emitted light from the LED does not directly shine into the photo-transistor. Appropriate
values for resistance are in series with both the LED to limit current and the photo-
transistor in order to show a voltage drop based on distance to the object in front of the
sensor. The effective range of the sensor is a few centimeters. Object detection can be
enhanced by placing a reflective surface between the object and the sensor. When the
object passes between the sensor and reflective surface, a large drop will be observed in
the output signal.

Applications:
 CCD Camera
 Night Vision
 Infrared Applied System

Coding:

#include<lpc214x.h>
unsigned char at[46]={'A','T','+','C','M','G','F','=','1','A','T','+','C','N','M','I',
'=','2',',','2',',','0',',','0',',','0','A','T','+','C','M','G',
'S','=','"','9','7','8','9','6','7','0','6','2','7','"'};
unsigned char d[7]={'R','A','I','L','W','A','Y'},j,k;
void delay(int k)
{
unsigned int m,n;
for(m=0;m<k;m++)
{
for(n=0;n<0xfffff;n++);
}
}
main()
{
PINSEL0=0x00000005;
U0LCR=0x83;
U0DLL=93;
while(1)
{

for(k=0;k<=1;k++)
{
while(!(U0LSR & 0x20));
U0THR=at[k];
}
while(!(U0LSR & 0x20));
U0THR=13;
delay(7);
for(k=2;k<=8;k++)
{
while(!(U0LSR & 0x20));
U0THR=at[k];
}
while(!(U0LSR & 0x20));
U0THR=13;
delay(7);
for(k=9;k<=25;k++)
{
while(!(U0LSR & 0x20));
 U0THR=at[k];
}
while(!(U0LSR & 0x20));
U0THR=13;
delay(7);
for(k=26;k<=45;k++)
{
while(!(U0LSR & 0x20));
U0THR=at[k];
}
while(!(U0LSR & 0x20));
U0THR=13;
delay(7);
for(j=0;j<=6;j++)
{
while(!(U0LSR & 0x20));
U0THR=d[j];
}
while(!(U0LSR & 0x20));
U0THR=26;