ECOLE POLYTECHNIQUE DE TUNISIE

ROBOCEPT
 Compteur
 Zero=> déclenche une interruption

 PIC16F84: 1 timer (TIMER1).

 PIC16F877: 3 timer:

• Timer0: 8-bit timer/counter with 8-bit

prescaler
• Timer1: 16-bit timer/counter with prescaler,
can be incremented during SLEEP via
external crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period
register, prescaler and postscaler
 Le module TMR0 (Timer 0) possède deux modes
de fonctionnement :

1- Le mode timer
T0CS= 0 (bit 5 du registre OPTION_REG)

2- Le mode compteur
T0CS= 1 (bit 5 du registre OPTION_REG)
1- Le mode timer
 T0CS=0 (bit 5 du registre OPTION_REG)

 Incrémentation de TMR0 à chaque cycle de

l'horloge interne.
 1 cycle ->1 µs pour quartz de 4 MHz

 Notez que si le contenu du registre TMR0 est 255

(0xFF), il passera à 0 (0x00) à la prochaine
incrémentation.
OPTION REG
 bit 7 RBPU : PORTB Pull-up Enable bit
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
 bit 6 INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
 bit 5 T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
 bit 4 T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
 bit 3 PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
 bit 2-0 PS2:PS0: Prescaler Rate Select bits
PS2 PS1 PS0 PSA=0 PSA=1
0 0 0 2 1
0 0 1 4 2
0 1 0 8 4
0 1 1 16 8
1 0 0 32 16
1 0 1 64 32
1 1 0 128 64
1 1 1 256 128
INTCON

 Bit 7 GIE: Global Interrupt Enable bit

 Bit 6 PEIE: Peripheral Interrupt Enable bit
 Bit 5 T0IE: TMR0 Overflow Interrupt Enable bit
 Bit 4 INTE: RB0/INT External Interrupt Enable
bit
 Bit 3 RBIE: RB Port Change Interrupt Enable
bit
 Bit 2 T0IF: TMR0 Overflow Interrupt Flag bit
 Bit 1 INTF: RB0/INT External Interrupt Flag bit
 Bit 0 RBIF: RB Port Change Interrupt Flag bit
1 = At least one of the RB7:RB4 pins changed state
0 = None of the RB7:RB4 pins have changed state
2- Le mode compteur
•T0CS = 1 (bit 5 du registre OPTION_REG)

•Incrémentation à chaque front du signal présent sur la broche

RA4/T0CKI :
•Front montant si T0SE = 0 (bit 4 du registre OPTION_REG)
•Front descendant si T0SE = 1

•Prescaler réglé à 1 (bit 3 du registre OPTION_REG = PSA = 1)

Watchdog.

Avec un taux de prédivision de 32 (PSA = 0, PS2 = 1, PS1 = 0, PS0 =

0), le contenu du registre TMR0 est incrémenté tous les 32 cycles du
signal présent sur la broche RA4/T0CKI.
 Convertisseur analogique numérique
 2 register essentiel:
-ADCON0
-ADCON1
ADCON0
 Bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits
00 = FOSC/2
01 = FOSC/8
10 = FOSC/32
11 = FRC (clock derived from the internal A/D module RC oscillator)
 Bit 5-3 CHS2:CHS0: Analog Channel Select bits
000 = channel 0, (RA0/AN0)
001 = channel 1, (RA1/AN1)
010 = channel 2, (RA2/AN2)
……
 Bit 2 GO/DONE: A/D Conversion Status bit
If ADON = 1:
1 = A/D conversion in progress (setting this bit starts the A/D conversion)
0 = A/D conversion not in progress (this bit is automatically cleared by
hardware when the A/D conversion is complete)
 Bit 1 Unimplemented: Read as '0'
 Bit 0 ADON: A/D On bit
1 = A/D converter module is operating
0 = A/D converter module is shut-off and consumes no operating current
ADCON1 10000000

 bit 7 ADFM: A/D Result Format Select bit

 1 = Right justified. 6 Most Significant bits of
ADRESH are read as ‘0’.
 0 = Left justified. 6 Least Significant bits of
ADRESL are read as ‘0’.
 bit 6-4 Unimplemented: Read as '0'

 bit 3-0 PCFG3:PCFG0: A/D Port

Configuration Control bits
ADCON1
ADCON1
PIR1
bit 7 PSPIF(1): Parallel Slave Port Read/Write Interrupt Flag bit

bit 6 ADIF: A/D Converter Interrupt Flag bit

1 = An A/D conversion completed
0 = The A/D conversion is not complete

bit 5 RCIF: USART Receive Interrupt Flag bit

bit 4 TXIF: USART Transmit Interrupt Flag bit
bit 3 SSPIF: Synchronous Serial Port (SSP) Interrupt Flag
bit 1 TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
bit 0 TMR1IF: TMR1 Overflow Interrupt Flag bit
PIE1
bit 7 PSPIE(1): Parallel Slave Port Read/Write Interrupt Enable bit
bit 6 ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
bit 5 RCIE: USART Receive Interrupt Enable bit
bit 4 TXIE: USART Transmit Interrupt Enable bit
bit 3 SSPIE: Synchronous Serial Port Interrupt Enable bit
bit 2 CCP1IE: CCP1 Interrupt Enable bit
bit 1 TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
bit 0 TMR1IE: TMR1 Overflow Interrupt Enable bit
1. Configure the A/D module:
• Configure analog pins/voltage reference and
digital I/O (ADCON1 bit3-0)
• Select A/D input channel (ADCON0 bit5-3)
• Select A/D conversion clock (ADCON0 bit7-6)
• Turn on A/D module (ADCON0 bit0)

2. Configure A/D interrupt (if desired):

• Clear ADIF bit (PIR1 BIT6) conversion is not complete
• Set ADIE bit (PIE1 BIT6) Enables A/D interrupt
• Set PEIE bit (INTCON Bit6) Peripheral Interrupt
Enable bit
• Set GIE bit (INTCON bit7) Global Interrupt Enable
3. Wait the required acquisition time.

4. Start conversion:
• Set GO/DONE bit (ADCON0 2bit)
5. Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
(with interrupts enabled)
OR
• Waiting for the A/D interrupt (ADIF BIT6 OF PIR1)
6. Read A/D result register pair
(ADRESH:ADRESL), clear bit ADIF if required.
EXEMPLE SUR MICROC

 Exemple 1: Convertisseur Analogique/Numérique

 Exemple 2: Timer TMR0
EXEMPLE 1 :
int i,a,b;
int out;

void init(void)

void main ()
{
init();
while(1){
ADCON0.F2= 1; //remise à 1 de ADCON0F.2 pour car passe à 0 après conversion sinon on
relance pas la conversion
while(ADCON0.F2==1){ //Attente pour l'acquisition du résultat
nop();
}
PORTB=ADRESL;

PORTD=ADRESH;

}
}
EXEMPLE 1 :
void init(void){
//initialisation:
TRISA.F0=1; // initialisation comme entrée
TRISB=0; //initialisation comme sortie
TRISD=0; //initialisation comme sortie
ADCON0=0b10000101; //clock=FOSC/2 // channel RA0 entrée // start
ADCON1=0b10000000; // LSB configuration
out=0;
a=0;
b=0;
PORTB=0;
PORTD=0;
//fin initialisation
}
EXEMPLE 2 :
unsigned int cnt;
unsigned int a;
void prog();
void main() {

cnt = 0; // Initialize cnt

OPTION_REG = 0x84; // Assign prescaler to TMR0
TRISB = 0; // PORTB is output
INTCON = 0b10100000; // Enable TMRO interrupt
PORTB= 0 ; // Initialize PORTB à zero
a = 0; // Initialize a
while (1){
prog();
}
}
EXEMPLE 2 :
void interrupt() {
cnt++; // Increment value of cnt on every interrupt
INTCON = 0b00100000; // Set T0IE , clear T0IF
}

void prog()
{
while (a < 10) {
if (cnt==20) {
TMR0=0; // reset du TMR0
cnt = 0; // Reset cnt
if (a==0) PORTB= 0x3F;
else if (a==1) PORTB= 0x06; else if (a==2) PORTB= 0x5B;
else if (a==3) PORTB= 0x4F; else if (a==4) PORTB= 0x66;
else if (a==5) PORTB= 0x6D; else if (a==6) PORTB= 0x7D;
else if (a==7) PORTB= 0x07; else if (a==8) PORTB= 0x7F;
else if (a==9) PORTB= 0x6F;
a ++; // Increment value of a
}
}
if (a ==10) a=0;
}
SIMULATION ISIS
Merci Pour Votre Attention