2440
11, NOVEMBER 2006
1-V DTMOS-Based Class-AB Operational Amplifier:
Implementation and Experimental Results
Hervé Facpong Achigui, Student Member, IEEE, Christian Jésus B. Fayomi, Member, IEEE, and
Mohamad Sawan, Fellow, IEEE
Abstract—In this paper, we describe a novel low-voltage
class-AB operational amplifier (opamp) based on dynamic
threshold voltage MOS transistors (DTMOS). A DTMOS tran-
sistor is a device whose gate is tied to its bulk. DTMOS tran-
sistor pseudo-pMOS differential input pairs are used for input
common-mode range enhancement, followed by a single ended
class-AB output. Two versions of the proposed opamp (opamp-A
and opamp-B) were fabricated in a standard 0.18- m CMOS
process technology. Measurements under 5 pF and 10 k load
use of multi-process threshold technology, but unfortunately,
conditions gave, for opamp-A, a DC open-loop gain of 50.1 dB, and
a unity gain bandwidth (GBW) of 26.2 MHz. A common-mode
rejection ratio (CMRR) of 78 dB, and input and output swings of
0.7 V and 0.9 V, respectively, were achieved. Opamp-B has been
optimized for biomedical applications, and is implemented to build
the analog front-end part of a near-infrared spectroreflectometry
(NIRS) receiver of a multi-wavelength wireless brain oxymeter
apparatus. A DC open-loop gain of 53 dB, a GBW of 1.3 MHz,
and input and output swings of 0.6 V and 0.8 V, respectively, were
measured. Opamp-A consumes 550 W with an input referred
noise of 160 nV Hz at 1 kHz. Opamp-B consumes only 40 W
and exhibits a lower input referred noise of 107 nV Hz at 1 kHz.
Index Terms—CMOS analog integrated circuit, differential am-
plifier, DTMOS, low-voltage operational amplifier.
I. INTRODUCTION
ESIGN of high-performance analog IC circuits operating
D at low supply voltages has been gaining increasing im-
portance in the last decade, especially for applications such
as medical electronic implantable devices, as well as hand-
held and battery-powered electronic devices. Furthermore,
the increasing use of mobile electronic products has directed
the industry towards reducing dissipated power, especially for
analog and mixed signal circuits. In addition, large-scale inte-
grations are predicted to target 1-V operation, and even less [1].
However, the trend towards lowering the power supply voltage
of circuitries in mixed-signal (digital/analog) environments
often sacrifices the speed, noise requirements, dynamic range,
Manuscript received October 13, 2005; revised June 8, 2006. This work
was supported by the Natural Sciences and Engineering Research Council of
Canada (NSERC), the Microsystems Research Alliance of Quebec (ReSMiQ),
and CMC Microsystems.
H. F. Achigui was with the Polystim Neurotechnologies Laboratory, Elec-
trical Engineering Department, Ecole Polytechnique de Montreal, Montreal,
QC H3C 3A7 Canada. He is now with PMC-Sierra, Mont-Royal, QC H3R 3L5
Canada (e-mail: herve.achigui-facpong@polymtl.ca).
M. Sawan is with the Polystim Neurotechnologies Laboratory, Electrical
Engineering Department, Ecole Polytechnique de Montreal, Montreal, QC
H3C 3A7 Canada (e-mail: mohamad.sawan@polymtl.ca).
C. J. B. Fayomi is with the Microelectronics Laboratory, Computer Science
Department, Université du Québec à Montréal, Montreal, QC H2X 3Y7 Canada
(e-mail: cfayomi@ieee.org).
Digital Object Identifier 10.1109/JSSC.2006.883341
0018-9200/$20.00 © 2006 IEEE
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO.
gain, bandwidth, and linearity of their analog counterparts. This
poses a great challenge to circuit design.
The reduction of threshold voltage is necessary for
low-voltage operation; on the other hand, the threshold voltage
does not scale down with the supply voltage of future standard
CMOS technologies [2]. An obvious solution could be the
this kind of technology is more expensive and frequently not
easy to reproduce. Some additional design advantages, such
as low-noise structures, could be obtained by using BiCMOS
technology, but at a higher cost. Several design techniques
have been proposed for the implementation of 1-V operational
amplifiers (opamps); in fact, some authors reported circuit
techniques for facilitating 1-V operation based on bulk-driving
architectures [3]–[5]. However, substantially small input
transconductance is obtained when compared to a con-
ventional gate-driven MOS transistor, and furthermore, the
equivalent input referred noise is larger. Other circuit topolo-
gies using a standard CMOS technology process were reported,
[6]–[13]. The major drawback of the architectures based on N-P
complementary rail-to-rail input stage [7], [8], is the increase
in the total harmonic distortion (THD) related to the use of N-P
complementary transistors, which produces an offset voltage on
the common-mode input voltage swing. Since the introduction
of dynamic threshold voltage MOSFET (DTMOS) in 1994
[14], several low-supply voltage circuits have been proposed,
but most of them achieved low threshold voltage by modifying
the fabrication process, using the SOI technology [15], or by
using multiple-input floating-gate transistors [16]. In single
well process technology, a DTMOS transistor is made of only
a pMOS transistor by connecting its gate to the bulk, no further
manufacturing process or step is required, and the device can
be used in any standard CMOS process. This would result in a
partial forward bias of the source-to-bulk PN junction leading
to a reduced threshold voltage as the gate input voltage changes
with little drawback effects as the forward bias voltage is kept
below 0.7 V for modern submicron technology [17].
In this paper, novel class-AB opamps for low-voltage, as well
as low-power and low-noise applications have been fabricated
and tested. The circuits make use of the DTMOS folded cas-
code differential input pairs to increase the input common-mode
range (ICMR). Standard Miller compensation is used for band-
width enhancement. Section II describes the opamp architec-
ture, with a focus on the DTMOS transistor operation and mea-
surements. Experimental results are reported in Section III along
with the effectiveness of the proposed solution for the design of
low-voltage low-power analog circuits.
ACHIGUI et al.: 1-V DTMOS-BASED CLASS-AB OPERATIONAL AMPLIFIER: IMPLEMENTATION AND EXPERIMENTAL RESULTS
TABLE I
TRENDS IN LOW-VOLTAGE CMOS OPAMP
II. LOW-VOLTAGE DTMOS-BASED OPAMP
Various methods have been used to design opamps under
low-voltage operation. Table I gives a simplified overview of
the methods used to overcome the main limitations when im-
plementing 1-V opamp designs, along with their related perfor-
mances. The proposed implementation makes use of DTMOS
transistors. We have achieved an average threshold voltage of
0.35 V for pMOS-based DTMOS transistors, compared to
0.55 V for regular pMOS devices. Such threshold voltage
shift is similar to value obtained when using forward-biased
source-bulk junction design technique [18].
The opamp consists of a differential input stage and a
class-AB output stage capable of driving off chip resistive load
as described in the block diagram of Fig. 1(a). The biasing
circuit consists of a standard current source using a resistor and
an nMOS transistor. A wide-swing current mirror with high
output impedance is used to produce bias voltages and
as shown in Fig. 1(b), (c), and (d).
A. DTMOS Transistor
A DTMOS transistor is a device whose gate is tied to its
substrate. Therefore, the device can be seen either as a lat-
eral bipolar p-n-p, or as pMOS with a dynamically regulated
threshold. Consequently, the substrate voltage in DTMOS
changes with the gate input voltage, and causes to change
accordingly, as demonstrated in (1):
(1)
2441
where is the zero bias threshold voltage, the bulk
effect factor, and the Fermi potential. With the use of
standard digital technology, we can only implement p-type
DTMOS, as their n-well can be controlled. When the input
voltage at the gate of a pseudo-pMOS-based DTMOS transistor
is high, the transistor turns to the off-state, and presents the
same , off-current , and subthreshold slope as a regular
pMOS. When the input voltage decreases, the transistor is in
its on-state, and the bulk-to-source junction voltage is
forward biased and thus reduces of the DTMOS transistor
thanks to the body effect, resulting in a higher source-to-drain
current than that of regular pMOS. This phenomenon
enables us to take advantage of the maximum input range,
and makes the DTMOS transistor the choice for subthreshold
operation logic, without the need for any extra area [19], [20].
In addition, due to its gate-to-body tied structure, DTMOS
operating in the subthreshold region exhibit similar character-
istics to a lateral bipolar p-n-p transistor, without requiring its
relatively large base current to operate, and having lower flicker
noise than regular MOS [20].
B. Input Stage Design
We recently proposed two folded cascode class-AB opamp
architectures [19], [20] which are illustrated in Fig. 1(b) and (c).
Typically, pMOS threshold voltage is much larger than that of
nMOS; consequently, to achieve 1-V operation or less, we used
pMOS-based DTMOS transistor pairs in the differ-
ential input. In both proposed designs, the input stage uses a
2442 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 11, NOVEMBER 2006

Fig. 1. Schematic of the DTMOS-based opamp. (a) Block scheme. (b) Differential input stage for opamp-A. (c) Differential input stage for opamp-B. (d) Class-AB
output stage.

folded cascode wide-swing current mirror – . In addi- means of monitoring and imaging brain function and biological
tion, transistors and have been added to enhance tissues, because of the relatively low absorption of water and
the slew-rate limitation of the folded cascode configuration. high absorption of oxyhemoglobin and deoxyhemoglobin in the
When the opamp is slew-rate limited, these transistors prevent NIR region of 600–900 nm. The NIRS device is composed of
the drain of and from having large transients which two parts: the emitter and the receivers. The emitter consists of
change their small-signal voltages to levels close to the positive three NIR laser diodes emitting light at discrete wavelengths of
power-supply voltage. DTMOS transistors – provide 735 nm, 840 nm, and 940 nm. The receivers are a set of six sep-
the required bias current for the differential input transistors, arate identical sensors, optically and electrically isolated from
and for the cascode current mirror. For the opamp-A, which each other. Each sensor consists of a CMOS photodiode with a
is illustrated in Fig. 1(b), the use of DTMOS differential pairs built-in current-to-voltage converter, voltage opamp, filter, and
enables us to take advantage of the maximum input range, while mixer. The CMOS photodiode transforms the reflected light
having all transistors operating in the strong inversion region. into current. A transimpedance amplifier is used to transform
Also, transistors and ( and ) are designed the currents extracted from the photodiodes into voltages, and
to provide adequate bias voltage to , respectively. the low-noise, low-power, DTMOS-based class-AB opamp-B is
These transistors implement the gain boosting technique for used to selectively amplify the low-amplitude signal before it is
high DC gain enhancement [21]. filtered and then demodulated.
The opamp-B circuit depicted in Fig. 1(c) has been optimized The pMOS-based DTMOS and devices of the input
for biomedical applications and is implemented to build the stage of opamp-B are operated between weak and moderate in-
analog front-end part of a near-infrared spectroreflectometry version regions. Such operation ensures transconductance effi-
(NIRS) receiver of a multi-wavelength wireless brain oxymeter ciency for the lowest amount of input referred gate
apparatus.Such device would provide a portable, noninvasive noise voltage at the minimum possible bias current. However,
ACHIGUI et al.: 1-V DTMOS-BASED CLASS-AB OPERATIONAL AMPLIFIER: IMPLEMENTATION AND EXPERIMENTAL RESULTS
TABLE II
DEVICE SIZES OF DIFFERENTIAL INPUT STAGE FOR OPAMP-A AND OPAMP-B
Fig. 2. DTMOS transistor. (a) Micrograph of the device. (b) Test bench used.
(c) Measured total source current against source-gate voltage for various source-
drain voltage.
all other transistors are biased in the strong inversion region.
Typically, CMOS transistors operating in subthreshold are bi-
ased at very small drain currents in the order of a few nanoam-
peres, but provide a limited gain–bandwidth product (GBW).
However, for CMOS transistors designed with large width-to-
length ( ) ratios, subthreshold operation is possible at mod-
erately large currents, resulting in a lower input noise voltage
and higher GBW product. The input devices and have
2443
Fig. 3. Microphotograph of the DTMOS-based opamp-A.
Fig. 4. Microphotograph of the DTMOS-based opamp-B.
a ratio of 2733, to ensure subthreshold voltage operation
under a bias current of 3.88 A per device. Furthermore, oper-
ational transconductance amplifiers (OTAs) have been used to
provide adequate bias voltages to and , and to en-
hance small-signal operation stability. Since the negative feed-
back needed to stabilize the active cascode devices
in opamp-A is provided by transistors used in a
common-source configuration, for to operate in
their linear region, the minimum voltage at their gate should
be higher than one threshold voltage; thus, for very low level
signal amplitude, the feedback loop through be-
comes unstable. With the use of OTA in the feedback loop of ac-
tive cascode devices in the opamp-B as depicted in
Fig. 1(c), this requirement is no longer necessary. Consequently,
opamp-B exhibits enhanced stability while processing signals
with small amplitude. Table II gives the device parameters of
the differential input stage for both opamp-A and opamp-B.
2444 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 11, NOVEMBER 2006

Fig. 5. Measured transient results. (a) Step input response. (b) Sine response with an input signal amplitude of 0.7 V for opamp-A. (c) Step input response.
(d) Sine response with an input signal amplitude of 0.6 V for opamp-B.

C. Class-AB Output Stage metal-to-metal (MiM) capacitors. Nominal values for the
The output stage is a key point in the design of low-voltage threshold voltages are approximately 0.47 V and 0.55 V for
amplifiers since it greatly affects the final features of the ampli- nMOS and pMOS transistors, respectively.
fier itself. The low-voltage class-AB output stage that we used is
shown in Fig. 1(d) [22]. This architecture namely current sub-
tracting class-AB has been originally based on a bipolar low- A. DTMOS Measurements
voltage translinear loop that is used to perform the quiescent
current control [23], [24]. The signal is split to the output by the A DTMOS device m m was fabricated
output transistors , and current mirrors – and tested; its die micrograph is shown in Fig. 2(a). We used the
and – , which provide a low impedance signal path Keithley 236 Source-Measure Unit (SMU) with the test setup as
to the output. Quiescent current control is based on the current illustrated in Fig. 2(b) to measure the source current against
comparison performed at the drain of transistor . source-gate voltage for different values of the source-drain
voltage of the DTMOS transistor [Fig. 2(c)]. It is important
III. EXPERIMENTAL RESULTS to note that large leakage current is generated for larger
The proposed opamps were fabricated in a standard 0.18- m than 0.7 V, as the source-to-bulk p-n junction diode becomes
single-poly six-metal salicide CMOS process technology with forward biased.
ACHIGUI et al.: 1-V DTMOS-BASED CLASS-AB OPERATIONAL AMPLIFIER: IMPLEMENTATION AND EXPERIMENTAL RESULTS
Fig. 6. Measured step response for input signal with low amplitude (0.1 V
(a) Opamp-A. (b) Opamp-B.
B. Opamps Measurements
The die micrographs of opamp-A and opamp-B, using the
input stage of the circuit presented in Fig. 1(b) and (c), are
presented in Fig. 3 and Fig. 4, respectively. Measurements were
taken using the Agilent 33250A function waveform generator
and the Tektronix TDS7154 oscilloscope, with a 5-pF capac-
itive load in parallel with a 10-k load. The measured input
and output common-mode range voltages are 0.7 V and 0.9 V
for opamp-A, and 0.6 V and 0.8 V for opamp-B, respectively.
The measured transient results for a step input signal are
shown in Fig. 5(a) for opamp-A and in Fig. 5(c) for opamp-B.
Fig. 5(b) and (d) depict the response to a 0.7 and 0.6
sinusoid input signal for the proposed opamp-A and opamp-B,
respectively.
For opamp-A, the measured DC open-loop gain is 50.1 dB
with a GBW of 26.2 MHz and a common-mode rejection ratio
(CMRR) of 78 dB. It consumes 550 W of power, and has an
input referred noise of 160 nV Hz at 1 kHz. Also, for the
2445
).
Fig. 7. Measured DC transfers characteristics of the input common-mode
range. (a) Opamp-A. (b) Opamp-B.
opamp-B, which has been optimized for biomedical applica-
tions, we measured a DC open-loop gain of 53 dB, and a unity
frequency of 1.3 MHz. The latter has a lower input referred noise
of 107 nV Hz at 1 kHz, with a power consumption of only
40 W.
The measured transient responses for a low amplitude step
input signal of 0.1 are shown in Fig. 6(a) for opamp-A,
where the use of gain boosted transistors – introduced
small oscillations, due to instability in the feedback loop through
active cascode devices and as depicted in the graph
of Fig. 6(a). The OTA used in the folded cascode at the input
stage of opamp-B has enabled us to achieve higher stability
when the inputs are processing a signal with small amplitude,
as illustrated in Fig. 6(b). This ability for an opamp to linearly
process small levels of input signal is a key requirement for the
amplifier for modules of the analog front-end receiver [20].
The DC transfers characteristic of opamp-A and opamp-B are
depicted in Fig. 7(a) and (b), respectively. Moreover, Fig. 8(a)
2446 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 11, NOVEMBER 2006

Fig. 8. Measured common-mode input range. (a) Opamp-A. (b) Opamp-B. Fig. 9. Measured transient results for opamp-A. (a) Noninverting configuration
with a gain of 2; upper: input signal with amplitude of 0.299 V ; lower: output
signal. (b) Inverting configuration with a gain of 1; upper: input signal with an
and (b) illustrate the input common-mode range of opamp-A amplitude of 0.3 V ; lower: output signal.
and opamp-B, respectively.
In addition, the step input response measurements of
opamp-A when it is used in a noninverting configuration with a
gain of two is illustrated in Fig. 9(a), and the step input response
when it is used in the inverting configuration is illustrated in
Fig. 9(b). Similar results should be obtainable for the opamp-B.
The minimum experimental supply voltage is 0.8 V. In fact,
Fig. 10 depicts the ability of opamp-A to process the step
input signal of an amplitude as high as 0.57 when the
supply voltage is as low as 0.8 V. Table III summarizes the
performances of both opamp-A and opamp-B.

C. Harmonic Distortion Analysis

With the use of a class-AB output stage, it is important to
outline how far the proposed opamps can dependably reproduce
the signal applied at its input. Evaluation of the misshapen re-
sponses between the fundamental frequency at the input and at Fig. 10. Measured transient results for opamp-A under a supply voltage of
0.8 V with a step input signal of amplitude of 0.57 V .
the output is done by calculating the harmonic and inter-modu-
lation distortion levels between the sample data. A fast Fourier
transform (FFT) analysis was performed, and the power spec- with an input sinusoidal signal frequency of 4.0 kHz, and an am-
tral density of opamp-A’s output signals are shown in Fig. 11(a), plitude of 0.7 . Fig. 11(b) depicts the measured output signal
ACHIGUI et al.: 1-V DTMOS-BASED CLASS-AB OPERATIONAL AMPLIFIER: IMPLEMENTATION AND EXPERIMENTAL RESULTS 2447

TABLE III
PERFORMANCE SUMMARY OF THE MEASURED RESULTS

Fig. 12. Measured total harmonic distortion. (a) Opamp-A. (b) Opamp-B.

spectrum of opamp-B, with an input sinusoidal signal frequency

of 10 kHz and an amplitude of 0.6 . Fig. 12(a) and (b) show
the measured THD of the eighth first harmonics for opamp-A
and opamp-B, respectively, in unity-gain configuration for dif-
ferent peak-to-peak amplitude level of a 4-kHz input sinusoidal
signal.

IV. CONCLUSION
A novel opamp architecture was reported along with its exper-
imental measurements. Two versions of this opamp were fabri-
cated for 1-V applications using DTMOS transistors under stan-
dard 0.18- m CMOS process technology. Measurements show
that the use of dynamic threshold pMOS transistors permits im-
plementation of analog circuits at low supply voltage. For the
first design, opamp-A, the circuit operates with a power supply
as low as 1-V, while providing a DC open-loop gain of 50.1 dB
and a GBW of 26.2 MHz, under a load condition of 5 pF and
10 k . This opamp consumes 550 W of power. Applications
of this circuit could include switched-capacitor filters, data con-
verters or any sampled-data systems. However, the second de-
sign (opamp-B) exhibits a low power consumption of 40 W,
while presenting a DC open-loop gain of 53 dB, a GBW of
1.3 MHz, and an input referred noise of 107 nV Hz at 1 kHz.
These features were measured under the same load conditions
as opamp-A. Opamp-B is intended to build the analog front-end
part of a NIRS receiver of a multi-wavelength wireless brain
oxymeter apparatus. The minimum experimental supply voltage
is 0.8 V for the proposed circuits.

Fig. 11. Measured output spectrum. (a) Opamp-A with a sine input signal am-
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 11, NOVEMBER 2006
Hervé Facpong Achigui (S’01) received the B.Eng.
and M.Sc.A. degrees, both in electrical engineering,
from École Polytechnique de Montréal, Canada, in
2002 and 2006, respectively.
He worked at Motorola in 2001 during his studies
and joined Polystim Neurotechnologies Laboratory
at Ecole Polytechnique de Montréal in 2002. He was
a research and teaching assistant at both Polystim
Neurotechnologies and Université du Québec à
Montréal (UQÀM) in the Computer Science De-
partment from 2004 to 2006. He is currently with
PMC-Sierra, Montreal, working on low-voltage CMOS mixed-signal integrated
circuits and systems.
Christian Jésus B. Fayomi (M’97) received the
B.Eng. degree (with first in one’s year honors) in
electromechanical engineering from École Polytech-
nique de Thiès, Sénégal, in 1993 and the M.A.Sc.
(with first class honors) and Ph.D. degrees from
École Polytechnique de Montréal, Canada, in 1995
and 2003, respectively, all in electrical engineering.
From 1996 to 2001, he was with the mixed-signal
design group of Goal Semiconductors Inc. Montréal,
working on readout electronic circuits for bolome-
ters, phototransistors, microprocessor supervisory
circuits, and data converters. From 1998 to 1999, he was also a Teaching
Assistant at the Microelectronics and Computer Laboratory (MACS-Lab),
Electrical Engineering Department, McGill University, Montréal. From 2001 to
2002, he was with the Microelectronics Division of IBM, Essex Junction, VT,
as an Advisory Engineer, designing data converters for video applications. He
is currently Assistant Professor at Université du Québec à Montréal (UQÀM)
in the Computer Science Department and is leading the Wireless Smart Devices
Laboratory. Since June 2006, he has held the Adjunct Professor position in
the Electrical and Computer Engineering Department at the Université du
Québec à Trois-Rivières (UQTR). His funded research area is the design of
reliable low-voltage deep-submicron CMOS mixed-signal integrated circuits
and systems.
Mohamad Sawan (F’04) received the B.Sc. degree
in electrical engineering from Université Laval,
Quebec, Canada, in 1984, and the M.Sc. and Ph.D.
degrees in electrical engineering from Université
de Sherbrooke, Quebec, Canada, in 1986 and 1990,
respectively.
He then completed postdoctoral training at
McGill University, Montréal, Canada, in 1991,
and in that same year, joined École Polytechnique
de Montréal, where he is currently a Professor of
Microelectronics. He has published more than 350
papers in peer-reviewed journals and conference proceedings, and has been
awarded seven patents. His scientific interests focus on the design and testing
of mixed-signal (analog, digital, and RF) circuits and systems, digital and
analog signal processing, and the modelling, design, integration, assembly,
and validation of advanced wirelessly powered and controlled monitoring
and measurement techniques. These topics are oriented toward biomedical
implantable devices and telecommunications applications.
Dr. Sawan holds the Canada Research Chair in Smart Medical Devices. He
heads the Regroupement stratégique en microsystèmes du Québec (Microsys-
tems Strategic Alliance of Québec-ReSMiQ) and is the founder of the Eastern
Canada Chapter of the IEEE Solid-State Circuits Society. He also founded the
International IEEE NEWCAS conference, co-founded the International Func-
tional Electrical Stimulation Society, and founded the Polystim Neurotechnolo-
gies Laboratory at Ecole Polytechnique de Montréal. He is the editor of Springer
Mixed-Signal Letters, Distinguished Lecturer for the IEEE Circuits and Sys-
tems (CAS) Society, Chair of the IEEE Biomedical CAS (BioCAS) Technical
Committee, and member of the Biotechnology Council representing the IEEE
CAS Society. He received the Barbara Turnbull Award for spinal cord research
(2003), the Medal of Merit from the Lebanese President (2005), the J. Armand
Bombardier Award from the Association Francophone pour le savoir (ACFAS),
and the American University of Science and Technology Achievement Award.
Dr. Sawan is a Fellow of the Canadian Academy of Engineering and the IEEE.