IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 19, NO.
3, JULY 2004
Analysis of Series Compensation and DC-Link
Voltage Controls of a Transformerless Self-Charging
Dynamic Voltage Restorer
Eng Kian Kenneth Sng, Member, IEEE, S. S. Choi, Member, IEEE, and
D. Mahinda Vilathgamuwa, Senior Member, IEEE
Abstract—This paper describes a transformerless self-charging
dynamic voltage restorer (DVR) series compensation device used to
mitigate voltage sags. A detailed analysis on the control of the re-
storer for voltage sag mitigation and dc-link voltage regulation are
presented. A nonlinear element is shown to exist in the regulator,
the activation of which can adversely affect its stability. Active can-
cellation for this element is recommended. Simulation and experi-
mental results are presented for a 1-kVA prototype to validate the
analysis as well as demonstrate the DVR’s performance under both
voltage restoration and self-charging operating conditions.
Index Terms—AC-DC, DC-AC power conversion, dynamics,
inverters, power control, transformerless, voltage compensation,
voltage control, voltage sag.
I. INTRODUCTION
I T HAS BEEN recognized that among the many types of dis-
turbances that can appear in power systems, voltage sags
can lead to the highest level of undesirable impact on sensitive
loads [1]. Several devices have been proposed to alleviate the
problem, among which the dynamic voltage restorer (DVR) also
referred to as the static series compensator (SSC) is shown to be
very promising [2], [5]–[11]. The DVR is a series compensation
device, typically installed in a distribution system and the func-
tion of the restorer is to rapidly boost up the load-side voltage
in the event of upstream voltage sags. The restorer consists of
an energy storage device which supplies the required power over
the limited duration of the sags. The storage device can be made
up of capacitor banks [2], batteries [5], [6], or flywheels [8],
the capacity of which is in accordance to the sag duration and
magnitude.
This paper describes a DVR which uses a capacitor bank for
energy storage. The proposed DVR has features which are dis-
tinctively different from that described in [2], [5], and [6] as it
does not require an isolation transformer for series voltage injec-
tion. Furthermore, it differs from [7] because self charging under
normal supply conditions is done without a separate charging
circuit and transformer. This reduces size/cost of the restorer
and obviates the various complexities associated with the oper-
ation of the transformers [10].
Manuscript received July 11, 2003.
The authors are with the Centre for Advance Power Electronics, School
of Electrical and Electronic Engineering, Nanyang Technological University,
Singapore.
Digital Object Identifier 10.1109/TPWRD.2004.829866
0885-8977/04$20.00 © 2004 IEEE
1511
DVR sizing depends on the type of sag magnitude and du-
ration it is required to mitigate. The DVR here is suitable for
mitigating sags of 100% magnitude for 5–8 cycles.
The objective of this paper is to analyze the controls involved
in this device and to demonstrate its operation. A detailed de-
scription of the voltage restoration and self-charging processes
of the new restorer is given. This is followed by the analysis
of the functional relationship between the restorer series com-
pensation controller, dc-link voltage regulator and the external
power system. Special emphasis is made on the study of the
dc-link voltage regulation dynamics which reveals the presence
of a nonlinear element related to the magnetic energy of a fil-
tering inductor. The latter is shown to affect regulator perfor-
mance and could lead to closed-loop instability. A cancellation
technique is proposed to overcome this limitation. The study
here allows a systematic approach to the design of the DVR
so as to achieve improved regulation with a given dc-link ca-
pacitance; the latter being determined by cost. The authors are
unaware of any reported work which contains similar analysis
pertaining to the restorer control systems.
The proposed controllers are validated through simulation as
well as laboratory measurements on an experimental prototype.
Results are included to show the effectiveness of the restorer
design on series compensation and the self-charging process,
the effects of the nonlinear element in regulator dynamics, and
the effectiveness of the proposed cancellation method. The pro-
posed controllers are simple to implement in both analog and
digital forms, thus allowing the flexibility of choice in face of
device robustness and economic considerations.
II. DVR STRUCTURE
Fig. 1 shows the arrangement of the power system and
the proposed device. The upstream source is represented by
its equivalent voltage and impedance . The load is
assumed to be static. The output of the DVR is series inserted
between the source and load (this corresponds to the terminals
of ). The device can be further partitioned into the
voltage restorer unit (hereafter named restorer) and energy
storage unit. They are connected by dc-link capacitor .
The restorer controls the series injected voltage . Under
normal conditions, is maintained at 0 V either by
restorer inverter controls or by a bypass switch in parallel with
[6]. In the event of a sag in , provides the
1512 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 19, NO. 3, JULY 2004

required series voltage compensation. The energy storage unit

comprises and converter 2. Controlling power flow to
using converter 2 allows active regulation of the dc-link
voltage . This enables full voltage restoration during a sag.

III. RESTORER OPERATING MODES

The restorer has different functional modes for sag and
normal conditions. They shall be classified here as voltage
restoration mode and self-charging mode, respectively.
Voltage restoration mode occurs during a sag of . Here,
Inverter 1 attempts to restore the loss in phase voltage
through voltage control of . The step-down nature of In-
verter 1 requires sufficient dc-link voltage for this purpose and, Fig. 1. Schematic of the proposed transformerless self-charging DVR.
thus, the need for dc-link voltage regulation.
The self-charging mode occurs when returns to its normal
healthy state. Here, the DVR has to replenish the energy of the
storage capacitor to prepare for subsequent sags. This control of
power-flow control can be done through appropriate controls of
and dc-link voltage regulation.
From a control viewpoint, both modes involve primarily the
control of the series injection voltage and the regulation
of dc-link voltage . The analysis of these two processes Fig. 2. System model for the voltage restoration unit.
will presented in the following sections, which will lead to their
corresponding controller designs.

IV. SERIES INJECTION VOLTAGE CONTROLS

For voltage restoration, the immediate power system involved
consists of the filter capacitor and inductor ( , )
shown in Fig. 1. The determination of filter parameter values
will not be considered here. Instead, one may refer to [3] on the
detailed filter design procedure. Fig. 2 shows this system model
consisting of two integrators and two controlled states, namely Fig. 3. Controller of voltage restoration.
capacitor voltage and inductor current . repre-
sents the resistance of the filter inductor. The command voltage is nil under normal conditions.
With both states ( , ) readily measurable via sensors, Two phase-locked loops (PLLs) are employed with a fast PLL
conventional state feedback is applicable. One first achieves tracking the line voltage and a slow PLL tracking the former.
good current control for the inner loop, followed by outer-loop In the event of a sag, the slow tracking PLL acts as an in-
voltage control as shown in Fig. 3. Feedforward compensation dependent oscillator and generates a reference phase voltage
of the discharge current from the capacitor (due to load current) required for voltage restoration. This voltage
via the inner current loop controls further enhances the distur- provides the presag phase voltage and according to (1)
bance rejection of the controlled plant for the capacitor voltage. to compensate for the sag
Such controls are widely applied in uninterruptible power sup-
plies (UPS) design and is elaborated in [4]. The main bandwidth (1)
limitation for both loops is parameter uncertainty due to changes
in inductance (caused by magnetic saturation) or capacitance Once this occurs, power flows from the DVR to the load. If
(result of tolerance in commercial devices and aging). However, the dc-link voltage is well regulated, the energy in the dc-link
for utility applications where the mains signal has frequency capacitor will be constant and power will be drawn from the
components consisting of the network fundamental frequency storage capacitors in the process. The above controls assume
and its lower order harmonics, achieving bandwidths of (say) that the required driving voltage in Fig. 3 is available.
500 Hz for both loops is deemed sufficient. Such low bandwidth This requires the magnitude of to be within the range
requirements can be met without difficulty even after taking into of since Inverter 1 in Fig. 1 provides only an ac
account the parameter uncertainty. As such, the simplest form of voltage of magnitude which is only a fraction of . For full
the series compensator for the control loops, namely, the propor- voltage restoration during a 100% sag, has to exceed the
tional controller is used here. Fig. 3 shows the controller imple- peak of to cater for the voltage drop due to the rate of rise
mented. Capped notation for parameters here indicate estimated of inductor current in . The regulation of at this
values. required level involves the control of power flow between the
SNG et al.: ANALYSIS OF SERIES COMPENSATION AND DC-LINK VOLTAGE CONTROLS OF A DVR 1513

capacitors and . For self-charging, the load current

in Fig. 1 is measured and is controlled according to

(2)

is seen from the exterior of the DVR as a resistor in

series with the load. A small value (typically less than 5% of Fig. 4. Charging of the DC-link capacitor.
the rated load impedance) is chosen for to prevent ex-
cessive voltage drop across the DVR terminals. Power will flow
into the DVR at the rate of . and with the dc-link
voltage well regulated, the energy stored in the dc-link capacitor
will be constant and the power will be directed to . In the
following sections, the detailed analysis of the dc-link voltage
regulation problem will be presented.
Fig. 5. Intuitive controller for V regulation.
V. DC-LINK VOLTAGE REGULATION
A. Regulator Plant Dynamics
Referring to Fig. 1, neglecting converter losses, the charging
of the dc-link capacitor can be described by Fig. 4 in accordance
with

(3)

where
and
Fig. 6. Oscillatory L-C system.

current loop design in Fig. 3. If this current controller’s band-

B. Intuitive Controller width is , a first-order low-pass filter (LPF) can be used to
From Fig. 4 and (3), an intuitive approach to voltage regula- model the block between current command and actual cur-
tion is to control power flow toward the dc-link capacitor from rent as shown in Fig. 7. The notation P will replace that for
by controlling duty cycle of converter 2 using (4). In disturbance from this point onward. With as the
this approach, one compensates for the discharged power to In- controller output, the feedback controller shown in Fig. 8 for
verter 1 and includes a feedback term to establish the desired regulation is proposed.
dc-link voltage with a first-order time constant of 1/k, that is This is realized by including the feedback of with
an outer-loop gain of and a feedforward cancellation of
or disturbance P at the junction S2. The lead-lag compensator,
involving parameters and , is used to minimize the
phase-shift effects due to the current controller’s lag for low-
frequency components of P. Such phase shifts would degrade
(4) the effectiveness of the feedforward cancellation of P. The
signal y at S2 is used to cancel the contribution of inductor
where represents the desired . power of in this feedback loop. This will be discussed in
Such an approach, as shown in Fig. 5, results in an oscillatory a later section.
system due to the presence of and under the steady- Fig. 8 reveals two sources of disturbance at junction S1. The
state condition illustrated in Fig. 6. This is the case of zero power regulator system in Fig. 8 has a fast inner loop (lag due to current
transfer with . The control law (4) yields controller) and a slower outer feedback loop activated by closing
in this instance. switch . Theoretically, the gains are variable and commu-
tation between sequential blocks in Fig. 8 is not allowed. If one
C. Proposed DC-Link Voltage Regulator assumes the gains are constant as a first-order approximation,
To overcome the problem of the intuitive controller described the system is simplified to that in Fig. 9 where is the error
in the previous section, it is now proposed that instead of con- voltage due to both disturbances. The linearized transfer func-
trolling directly, the power charging the storage ca- tion for is
pacitor will be directly controlled and the rate of change
of inductor energy in will be treated as a disturbance to the
system.
One controls directly using a proportional current con- (5)
troller which can be designed in a way identical to the inner
1514 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 19, NO. 3, JULY 2004

Fig. 7. I as control output for V regulation.

Fig. 10. New loop due to inductor energy contribution.

Fig. 8. Controller for V regulation.

Fig. 11. Block diagram of Fig. 10 with constant gains approximation.

Fig. 9. Simplified regulator with constant gains.
where
As will be shown later, such approximation (5) provides
great insight into the design problem. In this voltage regulation
problem, the objective is to minimize due to the effects
of the two sources of disturbance, namely P and the power in
inductor . These will now be discussed.
1) Effects of Discharge Power : One can analyze the
system in Fig. 9 by neglecting initially the power contribution
due to the change in magnetic energy in . In this case, (5)
rewrites as (6) giving the error contribution due to P alone
(6)
From (6), the error in dc-link voltage can be considered as the
product of a fixed impedance due to and a current
attenuated by transfer functions
and . The factors
that affect regulation can then be separated into 2 categories.
First, there are those that depend on plant parameters and state.
This includes the dc-link capacitance and voltage ,
and clearly higher values for both improve regulation. How-
ever, cost consideration limits on how large and can
be made. On the other hand, for better regulation with given
and , one may judiciously select the other group of
parameters (i.e., the control parameters and , essentially
by increasing them to their allowable limits). Gain is limited
by the stability of the loop in the following manner: The term
is affected by the dy-
namics of the current controller. Its main limitation being the
switching frequency of the voltage source inverter (typically at
20 kHz) and the dc-link ceiling voltage. These will limit the
bandwidth of the current controller to, at most a few kilo-
hertz. Any attempt to increase the bandwidth further will am-
plify the switching currents. To avoid excessive oscillations due
to the outer feedback-loop, the poles of the system (i.e., roots
of ), should be close to that of a
critically damped system.
This places in the vicinity of which, for the special
case , would give double poles at . With the
above-mentioned considerations, practical values of would
be limited to a few hundred Hertz. Most attenuation will thus
rely on the accurate feedforward decoupling of P seen here in
the factor in (6). This arises from the use
of a lead-lag compensator on P.
2) Effects of Magnetic Energy in :
a) Stability consideration: In this section, the effects of
the inductor energy in the term in Fig. 8 are studied.
Again, under the constant-gains first-order approximation, the
block diagram in Fig. 8 can be simplified to that in Fig. 10.
A further simplification of the new loop due to the inductor
energy in shown in Fig. 10 gives Fig. 11. This loop has a gain
that is dependant and is nonlinear.
For a given value of , the closed-loop poles of the system
in Fig. 11 are the roots of
(7)
SNG et al.: ANALYSIS OF SERIES COMPENSATION AND DC-LINK VOLTAGE CONTROLS OF A DVR 1515

Since (7) shows both poles are of same polarity (product of

poles is positive), the condition of stability is given by

(8)

Equation (8) predicts instability when is greater than

. This poses a second limitation to the magnitude
Complete regulator for V
of controller feedback gain in Fig. 8. Viewed in another Fig. 12. regulation.
way, if has been assigned a high value based on disturbance
rejection considerations, the filtering inductor has to be smaller
than the limit given by (8). For the purpose of higher voltage
stiffness, higher values of are desirable. To achieve this
under the additional limiting condition (8), one can introduce
a term y in Fig. 8 to cancel actively the magnetic energy
contribution in the feedback loop using estimated inductance
. The term y is given by

(9)
The stability criteria will be eased in this case with being
replaced by in (8). The nonlinear feedback loop will,
however, still be present due to imperfect inductance estima-
tion. Furthermore, according to (8), instability will occur when
approaches zero. To overcome this in a practical way, one
enables the feedback loop only for to be above a certain
threshold value . For lower than this predeter-
mined value, the switches and in Fig. 8 open and only
feedforward cancellation of P is applied. The analytical results
here will be confirmed in simulation and verified by experiment.
b) Inductor energy disturbance consideration: As shown
in Fig. 8, the disturbance due to variation in inductor energy is
introduced at junction S1. To apply a feedforward cancellation
of this disturbance, a filtered (thus, realizable) canceling term
is introduced at junction as shown in Fig. 12. The corre-
sponding feedback loop’s contribution by inductor energy re-
lated terms will have to be cancelled by a signal in Fig. 12 to
enhance stability (as described earlier) and this is approximated
by (10), assuming the term is constant.
or
(10)
This feedforward cancellation of the inductor energy distur-
bance has introduced an internal loop as indicated in Fig. 12.
The stability of the system can be similarly investigated as in
the previous section using the approximation of small-signal
analysis with a linearized loop. This is represented in Fig. 13.
The poles for this feedback process are obtained using the loop
gain and are the roots of
(11)
Fig. 13. Internal loop due to inductor energy cancellation.
Equation (11) shows that the process in Fig. 13 is unstable if
. This will occur when
is negative and approaches zero. To stabilize the system
practically, condition (12) is ensured by using smaller values for
filter parameters ( , ) and by opening switches and
in Fig. 12 to disable the process when is too small
(12)
Parameter , however, will be chosen to be sufficiently high
compared to the pulsation of the power signal’s contribution to
(which has, for fundamental frequency, twice the line
frequency). This is to minimize the phase shift which would
otherwise degrade the cancellation results.
VI. SIMULATION AND EXPERIMENT RESULTS
A. Power System and Controller Details
The experiment setup is identical to the circuit in Fig. 1. The
load is resistive and the DVR is designed for a load of 1 kVA,
230 V. The controllers for both voltage restoration and dc link
voltage regulation are shown in Fig. 3 and Fig. 12, respectively.
Tables I and II provide details on the power system/DVR
components and the control hardware and parameters. The cur-
rent is clamped at a maximum of 10 A in the controller. This
limit was set due to power device limits and magnetic saturation
consideration for .
B. Verification of Effectiveness of Series Compensation and
Voltage Regulator
For all of the experimental verifications, the following con-
ditions were applied. The dc link voltage’s reference is 400 V
and the storage capacitor is given a targeted final charged value
of 320 V prior to any sag event. The load current was at 3.8 A
(0.87 kVA) at unity power factor. A severe voltage sag down to
0 V of excessively long duration of 22 cycles was introduced at
1516
TABLE I
POWER SYSTEM AND DVR COMPONENTS FOR LABORATORY SETUP AS IN FIG. 1
TABLE II
DETAILS OF CONTROLLER HARDWARE AND PARAMETERS
the voltage source. The purpose of introducing such an extreme
situation is for demonstrating the restorer’s dynamics/perfor-
mance to the point of complete exhaustion of the stored energy.
The effectiveness of the series compensation as controlled by
simple proportional controllers described in Fig. 3 with both
loop bandwidths at 500 Hz (Table II) is demonstrated in Fig. 14.
It is seen that is maintained at its presag level with min-
imum distortion for at least ten cycles before it collapses grad-
ually to 0 V, due to the limited capacity of the energy storage.
To demonstrate the effectiveness of the dc voltage regulator
proposed in Fig. 12, the waveforms of an identical sag showing
the dc link voltage and the load voltage is captured in Fig. 15.
remains well regulated for at least eight cycles from the
start of the sag. The deterioration of regulation after eight
cycles is due to the power requirement needing a value of
exceeding the maximum set by the controller (10 A). is thus
clamped and the regulator’s feedback mechanism is not active.
As was explained earlier, the limit placed on is necessary to
avoid saturation of inductor , the occurrence of which would
otherwise affect controller parameters significantly.
The peak instantaneous power required for this load is 2
0.87 kW or 1.74 kW (resistive load). The corresponding voltage
that delivers this power for a clamped current at 10 A
is 174 V. Fig. 16 confirms this, showing the beginning of deteri-
oration of regulation for close to this value. By sizing the
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 19, NO. 3, JULY 2004
Fig. 14. Source and load voltages for dip duration of 22 cycles. Channel 1:
V at 200 V/div. Channel 2: V at 200 V/div. Channel markers indicate
zero level. Time scale 100 ms/div.
Fig. 15. Load and dc-link voltages for dip duration of 22 cycles. Channel 1:
V at 200 V/div. Channel 2: V at 200 V/div. Channel markers indicate
zero level. Time scale 100 ms/div.
Fig. 16. Load and storage capacitor voltages for 22 cycle dip. Channel 1:
V at 100 V/div. Channel 2: V at 200 V/div. Channel markers indicate
zero level. Time scale 100 ms/div.
inductor with a higher saturation current, dc-link voltage regu-
lation can be maintained for lower values of storage capacitor
voltage. For this experimental unit, it means that complete ride-
through can be achieved for a 100% sag of duration of less than
eight cycles. Ridethrough for longer duration for 100% sag is
achieved with higher .
C. Validating Nonlinear Dynamics and Controls for
DC-Link Regulator
To validate the analysis of regulator dynamics presented in
Section V, the controller and the power system with parameters
in Tables I and II were simulated with an identical sag com-
mencing at the 0-s mark in Figs. 17 and 18, with the exception
of an increased regulator feedback gain of [a value
closer to the stability limit defined by (8)] and the absence of
SNG et al.: ANALYSIS OF SERIES COMPENSATION AND DC-LINK VOLTAGE CONTROLS OF A DVR 1517

Fig. 17. Simulated waveforms of (a) V (b) I (c) x, k = 2:540: without

inductor energy feedback cancellation (horizontal scale in seconds).

Fig. 19. Experimental waveforms of inductor current (I ) and DC link

voltage (V ) during sag (k = 2:578 rads ). (a) Without inductor
energy feedback cancellation. (b) With inductor energy feedback cancellation.
Channel 1: I at 5 A/div. Channel 2: V at 20 V/div. Time scale: 20 ms/div.

Fig. 18. Simulated waveforms of (a) V (b) I , k = 2:540: with inductor

energy feedback cancellation (horizontal scale in seconds).

feedforward cancellation of inductor energy (controller used is

shown in Fig. 8). Fig. 17(a)–(c) shows the simulation results
without active cancellation of the inductor energy feedback. Os-
cillations present (most visible in Fig. 17(b) from to
0.08 s) are current-magnitude dependent. The magnitude of the
oscillations increases for high values of x [as defined by (8)] and
reduces as x decreases. This indicates a nonlinear phenomenon.
Fig. 18(a) and (b) shows results for the identical sag with the
active cancellation of inductor energy indicated by (9) ideally
applied. Simulation results show the effectiveness of the can-
cellation to enhance stability.
The above results were verified experimentally [Fig. 19(a)
and (b)] with . No active cancellation was applied
for the test measurements shown in Fig. 19(a). Oscillations sim-
ilar to those in Fig. 17(a) and (b) are clearly seen. Fig. 19(b)
shows results with active cancellation and the oscillations are
significantly reduced, similar to that of simulation results in
Fig. 18.
Fig. 20(a) and (b) shows the experimental results with
Fig. 20. Experimental waveforms of inductor current (I ) and DC link
set at . Active cancellation of inductor energy feed- voltages (V ) during sag (k = 2:350 rads ). (a) Without inductor
back is applied and this enhances stability. Unfortunately, energy feedforward cancellation. (b) With inductor energy feedforward
this is achieved at the expense of lowering the disturbance cancellation. Channel 1: I at 5 A/div. Channel 2: V at 20 V/div. Time
scale: 20 ms/div.
rejection, seen by the presence of the 100-Hz pulsation in
in Fig. 20(a). Finally, voltage regulation is improved by
implementing the full controller shown in Fig. 12, with the D. Self-Charging Mechanism
feedforward cancellation of inductor energy. This is shown in Fig. 21 shows the self-charging process after a sag and
Fig. 20(b). the storage capacitor recharges to its full voltage of 320 V
1518
Fig. 21. DC link and storage capacitor voltages after dip of 22 cycles. Channel
1: V at 100 V/div. Channel 2: V at 200 V/div. Channel markers indicate
zero level. Time scale 5.0 s/div.
in approximately 40 s. The series compensator appears as a
resistor of 2 for this duration. This results in an
acceptable voltage drop across the DVR terminals of 0.038 p.u.
( 2 /53 ).
VII. CONCLUSION
The control of a transformerless and self-charging DVR using
a capacitor bank for energy storage has been presented. The pro-
posed DVR does not require an isolation transformer for series
injection and is capable of self charging under normal supply
conditions, without the need for a separate charging transformer.
Absence of both transformers reduces the restorer size and cost.
The voltage restoration and self-charging processes have been
described in detail and validated both by simulation and by
test measurements on an experimental prototype. The dc-link
voltage regulation mechanism involves a nonlinear element due
to the presence of the filter inductor’s energy. It affects stability
for high feedback gains. Verification of this aspect of the dy-
namics problem has been carried out and a cancellation method
is shown to be effective in enhancing stability when higher feed-
back gains are employed. A systematic approach to better reg-
ulator design has been presented, allowing cost saving with the
use of smaller dc-link capacitance.
The proposed controls are simple and can be realized using
either digital or analog devices. This allows greater flexibility
in the face of cost or robustness constraints. For designing
this DVR for higher kilovolt-ampere capacity with the same
response to voltage sags, the parameters for this 1-kVA pro-
totype can be rescaled readily at the same voltage level with
higher rated current, by assuming identical devices connected
in parallel.
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Eng Kian Kenneth Sng (M’92) received the Diplome d’Ingenieur degree from
Ecole Nationale Superieur dIngenieur Electricien de Grenoble (ENSIEG),
Grenoble, France, in 1988 and the Ph.D. degree in electrical engineering at the
National University of Singapore, Singapore, in 2000.
Currently, he is an Assistant Professor with the Nanyang Technological
University, Singapore. He was a Visiting Scholar with the Wisconsin Power
Electronics Center (WisPERC) in 1995. His research interests include applied
controls in power converters, motor drives, and power quality.
S. S. Choi (M’76) received the B.E. and Ph.D. degrees from the University of
Canterbury, Christchurch, New Zealand, in 1973 and 1976, respectively.
Currently, he is a Professor and Head of the Power Engineering Division
with Nanyang Technological University, Singapore, where he has been since
1992. He was with the New Zealand Electricity Department, Wellington, New
Zealand, before he took up a lecturing post with the National University of Sin-
gapore in 1978. He joined the State Energy Commission of Western Australia
(SECWA) in 1991, where he was responsible for system studies pertaining to
stabilities, voltage control, power quality, SVC applications, and network tran-
sients. From 1989 to 1992, he was Head of the System Analysis Section and
had the additional responsibility of specifying and conducting system accep-
tance and performance tests pertaining to the generating sets as well as on trans-
mission–subtransmission networks. His research interests include power system
dynamics, FACTS, and power quality.
Dr. Choi received the Institute of Electrical Engineers (IEE) S.Z. De Fen-Anti
Premium Award for the 1989/1990 session. He is a member of the IEE and the
Institution of Engineers, Australia.
D. Mahinda Vilathgamuwa (SM’01) received the B.Sc. degree in electrical
engineering from the University of Moratuwa, Sri Lanka, in 1985 and the Ph.D.
degree in electrical engineering from Cambridge University, Cambridge, U.K.,
in 1993.
Currently, he is an Associate Professor in the School of Electrical and Elec-
tronic Engineering at Nanyang Technological University, Singapore. His re-
search interests include power electronic converters, electrical drives, and power
quality.
Dr. Vilathgamuwa is Deputy Chairman of Industry Applications Chapter and
a committee member of IEEE Section Singapore.