PNSPO CJ1M

Motion & Interrupts

 Agenda
•System Configuration
•Motion Capabilities
•Applicable Literature
•Wiring
•Using the pulse output functions
•Using the High Speed Counting functions
•Using the Interrupt functions
•Using the Compare Table function
4 New CPUs introduced into the
CJ1 Family
The CJ1M has many of the same
features as the CJ1G/H
•Same instruction set as CJ1/CS1 (400 +)
•Compact Flash Card Support
•Serial PLC Link 1:9 among CJ1M only
•Uses standard CJ1 I/O and
communications modules (DeviceNet,
Controller Link, Ethernet, Protocol Macro).
Pulse Input and Output capabilities
of the CJ1M-CPU22/23

Note:
The 60 kHz refers to Transistor Output + Regular HSC Inputs.
The 100 kHz refers to Line Driver (RS422) inputs and outputs.
Feedback to CJ1M-CPU22/23
The CJ1M-CPU22/23 has 2 high speed pulse
outputs and 2 high speed encoder inputs. The
CPUs do not, however, create a close or semi-
closed positioning loop. The user can create a
ladder program to compare the position from the
encoder feedback after the completion of a
positioning command, but this is not dynamic.
Typical Configuration
CJ1M + Stepper
Typical Configuration
CJ1M + Inverter
 Typical Configuration
CJ1M + SmartStep Servo
 Typical Configuration
CJ1M + W Series Servo
 Addressing the Built in I/O for
use in ladder

•Inputs: CIO 2960.00 - CIO 2960.09

•Outputs: CIO 2961.00 - CIO 2961.05

 Input Wiring (pg 23 of W395)
24 VDC Inputs LD = Line Driver
Output Wiring (pg 23 of W395)
Pulse Output Programming

PULS
SPED
ACC
PULS2
ORG
INI
 Monitoring the Present Position
and Port Status
The present position of the pulse output ports can always be
monitored in the following channels:
Port 0 Present Position: A276-A277 (in HEX)
Port 1 Present Position: A278-A279 (in HEX)
The status of the pulse output ports can be monitored as
follows:
Port 0 Busy: A280.04 Port 0 Complete A280.03
Port 1 Busy: A281.04 Port 1 Complete A281.03
PULS – Set
Pulses
PULS - Details
 SPED – Set the
Motion Frequency
SPED - Details
 PULS + SPED

No Acceleration
or Deceleration
 PULS and SPED Example

5000 HEX Pulses

(20480 BCD Pulses)

Independent Mode

FFF HEX PPS

(4095 BCD PPS)
 ACC -
Accelerate
ACC - Details
 PULS +ACC

For stepper motors, this will pass through resonance frequencies of

the step motor on the way to the target frequency.
ACC will operate correctly even if the
target frequency cannot be achieved.
PULS + ACC Example
PLS2 – Pulse 2
PLS2 - Details
 PLS2 will operate if the target
frequency cannot be achieved.
This is an improvement over the CQM1-CPU43 and
CQM1H + PLB21.
PLS2 Example
PLS2 Example Continued
PLS2 Example Continued
INI – Mode
Control
INI – Details
for Stopping
Pulse Outputs

This is an immediate stop, with no deceleration.

INI Example
 Mark Registration
One of the key differences between a CJ1M-CPU22/23 and any
other CPU based motion control (CPM1A, CPM2A, CQM1H)
is the ability to start a motion movement while another is
already running. This allow the CJ1M to perform Mark
Registration. Ie move until you see a mark, label, product, etc,
and then start another movement without stopping the first
movement. PLS2 commands are the best to use for mark
registration applications. There are limitations when using
PLS, SPED, ACC for mark registration.
See appendix A of the CJ1M Built In I/O Installation Manual for details on these restrictions.
 PWM – Pulse
Width Modulation
PWM – Details
The Origin Search Function
Origin Search Setup
 ORG – Origin
Search or Return
ORG - Details
High Speed Counting
PRV
INI
High Speed Counter Setup
 Monitoring the Count
•Present Count Value is stored in A270 +
A271 for HSC0 (in HEX)
•Present Count Value is stored in A272 +
A273 for HSC1 (in HEX)
PRV – Present
Value Read
PRV - Details
PRV - Example
INI – For HSC
Reset
INI Example – HSC Reset
Interrupts
MSKS
CLI
 Using Input Interrupts
•Input Interrupts
–Interrupt Input 0 Task Int 140
–Interrupt Input 1 Task Int 141
–Interrupt Input 2 Task Int 142
–Interrupt Input 3 Task Int 143

Note: Inputs 0 and 1 will not function as interrupt inputs if origin search
has been enabled for axis 0 and 1.
Input Interrupt Setup
 Interrupt Masks

By default the Interrupt Inputs are ‘Masked’. ‘Masked’

inputs are buffered, but not processed until the mask is
cleared (disabled).
Because Interrupts are buffered, it is generally a good idea
to Clear the Interrupts, then Unmask the Interrupts. This
will erase any input interrupts that were buffered while the
interrupt was masked.
MSKS – Mask Set
MSKS - Details
 MSKS Details Continued
Specifying Rising or
Trailing Edge Trigger
MSKS Example
CLI – Clear
Interrupt
CLI - Details
CLI - Example
 Using Scheduled Interrupts
•Scheduled Interrupts
–Scheduled Interrupt 0 Task Int 02
–Scheduled Interrupt 1 Task Int 03
Scheduled Interrupt Setup
Setting the time until the first
scheduled interrupt with CLI
Using MSKS to set the time
between schedule interrupts
 CLI and MSKS Example

In this example, the time to the

first schedule interrupt and the
delay between subsequent
interrupts is the same. The
value is manipulated by the
program in D1201.
 Using Comparison Tables to
trigger events at various points in
a positioning profile.
INI
CTBL
 CTBL –
Compare Table

Note: This instruction works with the High Speed

Counter PV. If no encoder is available, the pulse outputs
to the stepper can be wired in parallel with the high speed
counter inputs to feed the pulses into the high speed
counter, thus creating a virtual encoder.
 Why use CTBL?
Using the compare table instruction is an easy way to turn on
and off outputs as a function of the position of an axis.
Pushers, blow off nozzles, etc. can be controlled with the
CTBL instruction.
CTBL-Details
CTBL – Target
Comparison
CTBL – Range
Comparison
Range
Comparison
Tables are
always 8
ranges log.
To disable a
particular
range, set the
Interrupt Task
Number to
FFFF.
Starting CTBL
with INI
CTBL Example

BCD

HEX
 CTBL
Example