API

07BT1A0452 AUTOMATIC WATER SPRINKLER
CHAPTER- 1
Introduction:
Improving irrigation efficiency of crop can contribute greatly to reducing production
costs, making the industry more competitive and sustainable. Through proper irrigation,
average wheat yields can be maintained (or increased) while minimizing environmental
impacts caused by excess applied water and subsequent agrichemical leaching. An
automatic irrigation control system is a potential solution to optimize water management
by sensing soil water conditions and site-specifically controlling irrigation sprinklers.
Recent technological advances have made soil water sensors available for efficient and
automatic operation of irrigation systems Automatic soil water sensor-based irrigation
seeks to maintain a desired soil water range in the root zone that is optimal for plant
growth. The target soil water status is usually set in terms of volumetric moisture
(expressed in percent of water volume in a volume of undisturbed soil).
Another benefit of automatic irrigation techniques is convenience. In a previous

experience working with a soil-moisture-based automatic irrigation system, this type of
system adapts the amount of water applied according to plant needs and actual weather
conditions throughout the season. This translates not only into convenience for the
manager but into substantial water savings compared to irrigation management based on
average historical weather conditions. An automated irrigation system was proposed for
remote infield sensing and variable-rate irrigation control .The system requires seamless
integration of the system input and output components, and software design for decision
support and monitoring. The automatic irrigation system is based on the feedback of the
soil water status to maintain soil water content with a specific range.
Irrigation is the key to a successful garden. Long gone are the days of manual
Watering or relying on a friend to water when you are on vacation or away on Business.
The objective of this project is to describe a user-friendly simple and cheap design for
continuous monitoring of soil water level and automatically irrigate the plants according
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to their needs of previously set water level. The system consists of humidity sensor,
sensor driver, and water controller.
The Project presented here waters your plants regularly when you are out for
vacation. The circuit comprises sensor parts built using op-amp ICLM324. Op-amp is
configured here as a comparator. Two stiff copper wires are inserted in the soil to sense
the whether the Soil is wet or dry. The comparator monitors the sensors and when sensors
sense the dry condition then the project will switch on the motor and it will switch off the
motor when the sensors are in wet. The comparator does the above job it receives the
signals from the sensors. A transistor is used to drive the relay during the soil wet
condition. 5V double Pole – double through relay is used to control the water pump. LED
indication is
Provided for visual identification of the relay / load status. A switching diode is
connected across the relay to neutralize the reverse EMF. This project works with 5V
regulated power supply. Power on LED is connected for visual identification of power
status. This project uses regulated 5V, 750mA power supply. 7805 three terminal voltage
Regulator is used for voltage regulation. Bridge type full wave rectifier is used to rectify
the ac output of secondary of 230/18V step down transformer.
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BLOCK DIAGRAM AND TOOLS REQUIRED
Figure 1.1 Block Diagram of project
1.2 Hardware and Software tools for project
Hardware Tools:
 AT89C52 Microcontroller unit
 Sensors
 OP AMP LM-324
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 Comparator Test Circuit

 Relay
 Microcontroller-AT2051/8051
 LCD
HT12E & HT12D Encoder and Decoder IC for RF Modules
1.3 Supply Modules Are:
 Step Down Transformer
 Bridge Rectifier With Filter
 Voltage Regulators
1.4 Software Tools:

 Kiel software
 Mu vision
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CHAPTER-2
AT89C52
2.1 Features:
• Compatible with MCS-51® Products

• 8K Bytes of In-System Programmable (ISP) Flash Memory
• Endurance: 1000 Write/Erase Cycles
• 4.0V to 5.5V Operating Range
• Fully Static Operation: 0 Hz to 33 MHz
• Three-level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Eight Interrupt Sources
• Full Duplex UART Serial Channel
• Low-power Idle and Power-down Modes
• Interrupt Recovery from Power-down Mode
• Watchdog Timer
• Dual Data Pointer
• Power-off Flag
Description
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with

8K bytes of in-system programmable Flash memory. The device is manufactured using
Atmel’s high-density nonvolatile memory technology and is compatible with the Indus-
try-standard 80C51 instruction set and pin out. The on-chip Flash allows the program
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memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-

grammar. By combining a versatile 8-bit CPU with in-system programmable Flash on a
monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a
highly-flexible and cost-effective solution to many embedded control applications. The
AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of
RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-
vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and
clock circuitry. In addition, the AT89S52 is designed with static logic for operation down
to zero frequency and supports two software selectable power saving modes. The Idle
Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt
system to continue functioning. The Power-down mode saves the RAM con-tents but
freezes the oscillator, disabling all other chip functions until the next interrupt or
hardware reset.
Key Parameters
Parameter Value
Flash (Kbytes) :8
ISP : SPI
RAM (Bytes) : 256
F.max (MHz) : 33
Vcc (V) : 4.0-5.5
I/O Pins : 32
UART :1
16-bit Timers :3
Watchdog : Yes
2.2 BLOCK
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Figure 2.1.1 Block Diagram of microcontroller
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PIN DIAGRAM:
Figure 2.1.2 Pin Diagram of microcontroller
PIN DESCRIPTION:
VCC -Supply voltage.

GND -Ground.
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin
can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order
address/data bus during accesses to external program and data memory. In this mode, P0
has internal pull-ups. Port 0 also receives the code bytes during Flash programming and
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outputs the code bytes during program verification. External pull-ups are required during
program verification.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are
pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that
are externally being pulled low will source current (IIL) because of the internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count
input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown
in the following table. Port 1 also receives the low-order address bytes during Flash
programming and verification.
Table 2.1.3: Port functions

are externally being pulled low will source current (IIL) because of the internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program memory
and during accesses to external data memory that uses 16-bit addresses (MOVX @
DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register. Port 2 also receives the high-order
address bits and some control signals during Flash programming and verification.
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are externally being pulled low will source current (IIL) because of the pull-ups. Port 3
receives some control signals for Flash programming and verification. Port 3 also serves
the functions of various special features of the AT89S52, as shown in the following.
Table 2.1.4: Port functions

RST: Reset input. A high on this pin for two machine cycles while the oscillator is
running resets the device. This pin drives high for 98 oscillator periods after the
Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to
disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is
enabled.
ALE/PROG: Address Latch Enable (ALE) is an output pulse for latching the low byte
of the address during accesses to external memory. This pin is also the program pulse
input (PROG) during Flash programming. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency and may be used for external timing or
clocking purposes. Note, however, that one ALE pulse is skipped during each access to
external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR
location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction.
Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the
microcontroller is in external execution mode.
PSEN: Program Store Enable (PSEN) is the read strobe to external program memory.
When the AT89S52 is executing code from external program memory, PSEN is activated
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twice each machine cycle, except that two PSEN activations are skipped during each
access to external data memory.
EA/VPP: External Access Enable. EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on
reset. EA should be strapped to VCC for internal program executions. This pin also
receives the 12-volt programming enable voltage (VPP) during Flash programming.
XTAL1: Input to the inverting oscillator amplifier and input to the internal clock
operating circuit. XTAL2: Output from the inverting oscillator amplifier.
2.2 REGISTERS:
8052 is a collection of 8 and 16 bit registers and 8 bit memory locations. These registers
and memory locations can be made to operate using the software instructions. The
program instructions control the registers and digital data paths that are contained inside
the 8052, as well as memory locations that are located outside the 8052.
Register are used to store information temporarily, while the information could be a
byte of data to be processed, or an address pointing to the data to be fetched. The vast
majority of 8051 register are 8-bit registers.
Generally there are two types of registers. They are General purpose Registers
(GPR’s) and Special Function Registers (SFR’s)
2.2.1General Purpose Register:

The 8 bits of a register are shown from MSB D7 to the LSB D0. With an 8-bit data
type, any data larger than 8 bits must be broken into 8-bit chunks before it is processed.
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Fig 2.2.2: General purpose registers
The most widely used registers

A (Accumulator)
For all arithmetic and logic instructions
B, R0, R1, R2, R3, R4, R5, R6, R7
2.2.3 DPTR (data pointer), and PC (program counter)
16 – bit General Purpose Register are Data Pointer (DPTR) and Program Counter (PC)
The program counter points to the address of the next instruction to be executed. DPTR.
As the name suggests, is used to point the data. It is used by a number of commands
which allows the microcontroller to access external memory. When the microcontroller
access external memory it will access at the address indicated by DPTR.
Fig 2.2.4: DPTR & PC
2.2.5 Special Function Registers:
The program status word (PSW)
PSW register, also referred to as the flag register, is an 8 bit register Only 6 bits are
used These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow)
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They are called conditional flags, meaning that they indicate some conditions that
resulted after an instruction was executed. The PSW3 and PSW4 are designed as RS0 and
RS1, and are used to change the bank. The two unused bits are user-definable
2.2.6 Timer/Counters Registers:
The Atmel 80C5 Microcontrollers implement two general purpose, 16-bit timers/
counters. They can be used either as timers to generate a time delay or as a counter to
count events happening outside the microcontroller. The microcontroller has two 16-bit
wide timers. They are identified as Timer 0 and Timer 1 and Timer 2, and can be
independently configured to operate in a variety of modes as a timer or as an event
counter. When operating as a timer, the timer/counter runs for a programmed length of
time, and then issues an interrupt request. When operating as a counter, the timer/counter
counts negative transitions on an external pin. After a preset number of counts, the
counter issues and interrupt request. Register pairs (TH0, TL0), (TH1, TL1), and (TH2,
TL2) are the 16-bit counting registers for Timer/Counters 0, 1, and 2, respectively.
2.2.7 TMOD Register (timer mode):
TMOD: Timer/Counter Mode Control Register: Not Bit Addressable.
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Timer 1 Timer 0
GATE When TRx (in TCON) is set and GATE=1, Timer/CounterX will run only while
INTx pin is high (hardware control). When GATE=0,
Timer/Counter will run only while TRx=1 (software
control).
C/T Timer or Counter selector. Cleared for Timer operation (input from internal
system clock). Set for Counter operation (input from TX input
pin).
M1 Mode selector bit.
M0 Mode selector bit.
M1 M0 Mode Operating Mode
0 0 0 13-bit Timer (8048 compatible) (TH1)
0 1 1 16-bit Timer/Counter
1 0 2 8-bit Auto-Reload Timer/Counter (TL1).
Reloaded from TH1 at overflow.
1 1 3 timer 1 halted. Retains count.
1 1 3 (Timer 1) Timer/Counter 1 stopped.
2.2.8 TCON: Timer/Counter Control Register
Bit Addressable.
The upper four The lower 4 bits

Bits are used to Are set aside for
Store the TF and Controlling the
TR bits of both Interrupt bits
Timer 0 and 1
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TF1 Timer1 overflow flag. Set by hardware when the Timer/Counter 1

overflows. Cleared by hardware as processor vectors to the interrupt
service routine.
TR1 Timer 1 run control bit. Set/cleared by software to turn Timer/Counter 1
ON/OFF.
TF0 Timer0 overflow flag. Set by hardware when the Timer/Counter 0 overflows.
Cleared by hardware as processor vectors to the service routine.
TR0 Timer 0 run control bit. Set/cleared by software to turn Timer/Counter 0
ON/OFF.
IE1 External Interrupt 1 edge flag. Set by hardware when External interrupt
edge is detected. Cleared by hardware when interrupt is processed.
IT1 Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low
level triggered External Interrupt.
IE0 External Interrupt 0 edge flag. Set by hardware when External Interrupt edge
is detected. Cleared by hardware when interrupt is processed.
IT0 Interrupt 0-type control bit. Set/cleared by software to specify falling edge/low
level triggered External Interrupt.
2.3 INTERRUPTS:
Interrupts: The AT89C52 has a total of six interrupt vectors: two external interrupts
(INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt.
These interrupts are all shown in Figure 13-1. Each of these interrupt sources can be
individually enabled or disabled by setting or clearing a bit in Special Function Register
IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note
that Table 13-1 shows that bit position IE.6 is unimplemented. User software should not
write a 1 to this bit position, since it may be used in future AT89 products. Timer 2
interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON.
Neither of these flags is cleared by hardware when the service routine is vectored to. In
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fact, the service routine may have to determine whether it was TF2 or EXF2 that
generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and
Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow.
The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag,
TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows.
Interrupt Service Routine:
For every interrupt, there must be an interrupt service routine (ISR). Or interrupt handler.
When an interrupt is invoked, the microcontroller runs the interrupt service routine. For
every interrupt, there is a fixed location in memory that holds the address of its ISR. The
group of memory locations set aside to hold the addresses of the ISRs is called interrupt
vector table.
Six Interrupts in 8052:
1. Reset : When the reset pin is activated, the 8052 jumps to address location 0000
2. Two interrupts are set aside for the timers: one for the Timer 0 and one for
Timer1.
3. Two interrupts are set aside for hardware external interrupts : one for INT0 and
one for INT1
4. Serial communication has a single interrupt that belongs to both receive and
transmit.
Enabling Interrupt (IE) Register:
All interrupt are disabled after reset
We can enable and disable them bye IE
EA -- ET2 ES ET1 EX1 ET0 EX0
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EA IE.7 If EA=0, disables all interrupts, no interrupt is acknowledged
If EA=1, each interrupt source is individually enabled or disabled

by setting or clearing its enable bit.
-- IE.6 Not implemented, reserved for future use.
ET2 IE.5 Enables or disables Timer2 overflow or capture interrupt
(8052 only)
ES IE.4 Enables or disables the serial port interrupts.
ET1 IE.3 Enables or disables Timer 1 overflow interrupt.
EX1 IE.2 Enables or disables external interrupt 1.
ET0 IE.1 Enables or disables Timer 0 overflow interrupt.
EX0 IE.0 Enables or disables external interrupt 0.
Interrupt Priority (IP) Register:
0= lower priority, 1= higher priority, reset IP=00H
Lower priority ISR can be interrupted by a high priority interrupt.
A high priority ISR cannot be interrupted.
Low-priority interrupt wait until 8051 has finished servicing the high-priority interrupt.
-- -- PT2 PS PT1 PX1 PT0 PX0
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-- IP.7 Reserved
-- IP.6 Reserved
PT2 IP.5 Timer2 interrupt priority bit (8052 only)
PS IP.4 serial port interrupt priority bit.
PT1 IP.3 Timer 1 interrupt priority bit.
PX1 IP.2 external interrupt 1 priority bit.
PT0 IP.1 Timer 0 interrupt priority bit.
PX0 IP.0 external interrupt 0 priority bit.
Timer 0 and 1:
Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer 1 in
the AT89C51 and AT89C52.
Timer 0 Register
The 16-bit register of Timer 0 is accessed as low byte and high byte. The low byte
register is called TL0 (Timer 0 low byte) and high byte register is referred to as TH0
(Timer 0 high byte). These registers can be accessed like any other register, such as A, B,
R0, R1, R2, etc.
Timer 1 Register:
Timer 1 is also 16-bits, and its 16-bit register is split into two bytes, referred to as TL1
(Timer 1 low byte) and TH1 (Timer 1 high byte). These registers are accessible in the
same way as the registers of timer 0.
Timer 2 Registers:
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Control and status bits are contained in registers T2CON (shown in Table 5- 2) and
T2MOD (shown in Table 10-2) for Timer 2. The register pair (RCAP2H, RCAP2L) is the
Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Timer 2:
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in
Table 5-2). Timer 2 has three operating modes: capture, auto-reload (up or down
counting), and baud rate generator. The modes are selected by bits in T2CON, as shown
in Table 10-1. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer
function, the TL2 register is incremented every machine cycle. Since a machine cycle
consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency. In the
Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled
during S5P2 of every machine cycle. When the samples show a high in one cycle and a
low in the next cycle, the count is incremented. The new count value appears in the
register during S3P1 of the cycle following the one in which the transition was detected.
Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0
transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a
given level is sampled at least once before it changes, the level should be held for at least
one full machine cycle.
Table 2.3.1: Timer operating modes

Capture Mode:
In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 =
0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This
bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same
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operation, but a 1-to-0 transition at external input T2EX also causes the current value in
TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the
transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can
generate an interrupt. The capture mode is illustrated in Figure 10-1.
Auto-reload (Up or Down Counter):
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-
reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in
the SFR T2MOD (see Table 10-2). Upon reset, the DCEN bit is set to 0 so that timer 2
will default to count up. When DCEN is set, Timer 2 can count up or down, depending on
the value of the T2EX pin.
Fig 2.3.2: Timer in capture mode
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Table 2.3.3: Timer 2 mode control register

Figure 10-2 shows Timer 2 automatically counting up when DCEN = 0. In this mode,
two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to
0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer
registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in
Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a
16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external
input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can
generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or
down, as shown in Figure 10-2. In this mode, the T2EX pin controls the direction of the
count. A logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH
and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and RCAP2L
to be reloaded into the timer registers, TH2 and TL2, respectively. Logic 0 at T2EX
makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values
stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to
be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or
underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2
does not flag an interrupt.
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Fig 2.3.4: Timer 2 in reload mode
Fig 2.3.5: Timer 2 in auto reload mode
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2.4 Memory Organization:
MCS-51 devices have a separate address space for Program and Data Memory. Up to
64K bytes each of external Program and Data Memory can be addressed.
Program Memory:
If the EA pin is connected to GND, all program fetches are directed to external
memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses
0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H
through FFFFH are to external memory.
Data Memory:
The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a
parallel address space to the Special Function Registers. This means that the upper 128
bytes have the same addresses as the SFR space but are physically separate from SFR
space. When an instruction accesses an internal location above address 7FH, the address
mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of
RAM or the SFR space. Instructions which use direct addressing access the SFR space.
For example, the following direct addressing instruction accesses the SFR at location
0A0H (which is P2). MOV 0A0H, #data Instructions that use indirect addressing access
the upper 128 bytes of RAM. For example, the following indirect addressing instruction,
where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose
address is 0A0H). MOV @R0, #data Note that stack operations are examples of indirect
addressing, so the upper 128 bytes of data RAM are available as stack space.
Watchdog Timer (One-time Enabled with Reset-out):
The WDT is intended as a recovery method in situations where the CPU may be
subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog
Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To
enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register
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(SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle
while the oscillator is running. The WDT timeout period is dependent on the external
clock frequency. There is no way to disable the WDT except through reset (either
hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output
RESET HIGH pulse at the RST pin.
2.5 UART:
The UART in the AT89C52 operates the same way as the UART in the AT89C51
2.6 Baud Rate Generator:

Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in
T2CON (Table 5-2). Note that the baud rates for transmit and receive can be different if
Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function.
Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode, as shown in
Figure 11-1. The baud rate generator mode is similar to the auto-reload mode, in that a
rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in
registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes
1 and 3 are determined by Timer 2’s overflow rate according to the following equation
The Timer can be configured for either timer or counter operation. In most applications, it
is con-figured for timer operation (CP/T2 = 0). The timer operation is different for Timer
2 when it is used as a baud rate generator. Normally, as a timer, it increments every
machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it
increments every state time (at 1/2 the oscillator frequency). The baud rate formula is
given below.
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Where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit
unsigned integer. Timer 2 as a baud rate generator is shown in Figure 11-1. This figure is
valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set
TF2 and will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition
in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2,
TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an
extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the
baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these
conditions, the Timer is incremented every state time, and the results of a read or write
may not be accurate. The RCAP2 registers may be read but should not be written to,
because a write might overlap a reload and cause write and/or reload errors. The timer
should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.
Timer 2 baud rate generator:
Fig 2.6.1: Timer 2 baud rate generator
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2.7 Programmable Clock Out:

A 50% duty cycle clock can be programmed to come out on P1.0, as shown in Figure
12-1. This pin, besides being a regular I/O pin, has two alternate functions. It can be
programmed to input the external clock for Timer/Counter 2 or to output a 50% duty
cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). To
configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared
and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer.
The clock-out frequency depends on the oscillator frequency and the reload value of
Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation. In
the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is
similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a
baud-rate generator and a clock generator simultaneously. Note, however, that the baud-
rate and clock-out frequencies cannot be determined independently from one another
since they both use RCAP2H and RCAP2L.
Fig 2.7.1: Timer 2 in clock out mode
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2.8 Oscillator Characteristics:

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier
that can be configured for use as an on-chip oscillator, as shown in Figure 16-1. Either a
quartz crystal or ceramic resonator may be used. To drive the device from an external
clock source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in
Figure 16-2. There are no requirements on the duty cycle of the external clock signal,
since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but
minimum and maximum voltage high and low time specifications must be observed.
Table 2.8.1: Lock bit protection modes
When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched
during reset. If the device is powered up without a reset, the latch initializes to a random
value and holds that value until reset is activated. The latched value of EA must agree
with the current logic level at that pin in order for the device to function properly.
2.9 Programming the Flash – Parallel Mode
The AT89C52 is shipped with the on-chip Flash memory array ready to be
programmed. The programming interface needs a high-voltage (12-volt) program enable
signal and is compatible with conventional third-party Flash or EPROM programmers.
The AT89C52 code memory array is programmed byte-by-byte.
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Programming Algorithm:
Before programming the AT89S52, the address, data, and control signals should be set
up according to the “Flash Programming Modes” (Table 22-1) and Figure 22-1 and
Figure 22-2. To program the AT89S52, take the following steps: 1. Input the desired
memory location on the address lines. 2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V. 5. Pulse
ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write
cycle is self-timed and typically takes no more than 50 μs. Repeat steps 1 through 5,
changing the address and data for the entire array or until the end of the object file is
reached.
Data Polling: The AT89S52 features Data Polling to indicate the end of a byte
write cycle. During a write cycle, an attempted read of the last byte written will result in
the complement of the written data on P0.7. Once the write cycle has been completed,
true data is valid on all outputs, and the next cycle may begin. Data Polling may begin
any time after a write cycle has been initiated.
Ready/Busy: The progress of byte programming can also be monitored by the
RDY/BSY output signal. P3.0 is pulled low after ALE goes high during programming to
indicate BUSY. P3.0 is pulled high again when programming is done to indicate
READY.
Program Verify: If lock bits LB1 and LB2 have not been programmed, the
programmed code data can be read back via the address and data lines for verification.
The status of the individual lock bits can be verified directly by reading them back.
Reading the Signature Bytes: The signature bytes are read by the same procedure as
a nor-mal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7
must be pulled to a logic low. The values returned are as follows. (000H) = 1EH indicates
manufactured by Atmel (100H) = 52H indicates AT89S52 (200H) = 06H
Chip Erase: In the parallel programming mode, a chip erase operation is initiated by
using the proper combination of control signals and by pulsing ALE/PROG low for
duration of 200 ns - 500 ns. In the serial programming mode, a chip erase operation is
initiated by issuing the Chip Erase instruction. In this mode, chip erase is self-timed and
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takes about 500 ms. During chip erase, a serial read from any address location will return
00H at the data output.
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CHAPTER-3
HARDWARE
3.1 THE MAIN BLOCKS INVOLVED IN AUTOMATIC PLANT IRRIGATION:
 Sensors
 OP AMP LM-324
 Comparator Test Circuit
 Relay
 Microcontroller-AT2051/8051
 LCD
HT12E & HT12D Encoder and Decoder IC for RF Modules
3.2 Sensors:
A sensor is a device that measures a physical quantity and converts it into a signal
which can be read by an observer or by an instrument. For example, a mercury-in-glass
thermometer converts the measured temperature into expansion and contraction of a
liquid which can be read on a calibrated glass tube. A thermocouple converts temperature
to an output voltage which can be read by a voltmeter. For accuracy, all sensors need to
be calibrated against known standards.
Sensors are used in everyday objects such as touch-sensitive elevator buttons (tactile
sensor) and lamps which dim or brighten by touching the base. There are also
innumerable applications for sensors of which most people are never aware. Applications
include cars, machines, aerospace, medicine, manufacturing and robotics.
A sensor is a device which receives and responds to a signal or stimulus. Here, the
term "stimulus" means a property or a quantity that needs to be converted into electrical
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form. Hence, sensor can be defined as a device which receives a signal and converts it
into electrical form which can be further used for electronic devices. A sensor differs
from a transducer in the way that a transducer converts one form of energy into other
form whereas a sensor converts the received signal into electrical form only.
A sensor's sensitivity indicates how much the sensor's output changes when the measured
quantity changes. For instance, if the mercury in a thermometer moves 1 cm when the
temperature changes by 1 °C, the sensitivity is 1 cm/°C. Sensors that measure very small
changes must have very high sensitivities. Sensors also have an impact on what they
measure; for instance, a room temperature thermometer inserted into a hot cup of liquid
cools the liquid while the liquid heats the thermometer. Sensors need to be designed to
have a small effect on what is measured; making the sensor smaller often improves this
and may introduce other advantages.
A good sensor obeys the following rules:
• Is sensitive to the measured property
• Is insensitive to any other property
• Does not influence the measured property
Ideal sensors are designed to be linear. The output signal of such a sensor is linearly
proportional to the value of the measured property. The sensitivity is then defined as the
ratio between output signal and measured property. For example, if a sensor measures
temperature and has a voltage output, the sensitivity is a constant with the unit [V/K]; this
sensor is linear because the ratio is constant at all points of measurement. Here in Our
Project the Sensors Used are Copper Wires.
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Fig 3.2.1: Sensors
3.3 OP AMP LM-324 :
As the name implies, it is an operational amplifier. It performs mathematical

operations like addition, subtraction, log, antilog etc... The main reason for OPAMPS
used over transistors is that transistor can only amplify AC while OPAMPS can amplify
AC and DC. You can get good amplifier gain in OPAMPS. The most commonly used
OPAMPS are 741 and 324. IC741 is used in close loop configuration and LM324 in open
loop configuration. i.e. LM324 mainly used as comparator while 741 for amplification,
addition etc...
Fig 3.3.1: LM324
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Features:
• Internally frequency compensated for unity gain

• Large DC voltage gain 100 dB
• Wide bandwidth (unity gain) 1 MHz (temperature compensated)
• Wide power supply range: Single supply 3V to 32V or dual supplies ±1.5V to
±16V
• Very low supply current drain (700 µA)-essentially independent of supply voltage
• Low input biasing current 45 nA (temperature compensated)
• Low input offset voltage 2 mV and offset current: 5 nA
• Input common-mode voltage range includes ground
• Differential input voltage range equal to the power supply voltage
• Large output voltage swing 0V to V+ - 1.5V
The LM324 series consists of four independent, high gains; internally frequency
compensated operational amplifiers which were designed specifically to operate from a
single power supply over a wide range of voltages. Operation from split power supplies is
also possible and the low power supply current drain is independent of the magnitude of
the power supply voltage. Application areas include transducer amplifiers, DC gain
blocks and all the conventional op amp circuits which now can be more easily
implemented in single power supply systems. For example, the LM324 series can be
directly operated off of the standard +5V power supply voltage which is used in digital
systems and will easily provide the required interface electronics without requiring the
additional ±15V power supplies.
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PIN DIAGRAM: Fig 3.3.1: Pin diagram
Unique Characteristics:
• In the linear mode the input common-mode voltage range includes ground and the
output voltage can also swing to ground, even though operated from only a single
power supply voltage
• The unity gain cross frequency is temperature compensated
• The input bias current is also temperature compensated
Advantages:
• Eliminates need for dual supplies
• Four internally compensated op amps in a single package
• Allows directly sensing near GND and VOUT also goes to GND
• Compatible with all forms of logic
• Power drain suitable for battery operation
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3.4 Comparator Test Circuit:
Comparator is an analog circuit with two inputs and one output. It watches and
compares two voltages at the inputs and decides if the output should change or not based
on the inputs. For example, if the voltage on one of the inputs goes above a fixed trigger
voltage on the other input, the output could go from LOW to HIGH. This is only one
configuration. There are lots of other possibilities, and the test circuit will help you
understand them. Comparators are good at "conditioning" analog signals and turning
them into digital signals. The output can be hooked up directly to any logic input on
another chip, a BASIC Stamp, SSR etc. You can hook it up to a transistor (i.e.
TIP120/122 or TIP125/127) to drive relays, motors, solenoids etc.We are going to use the
LM324 quad operational amplifier (op−amp). There are four general purpose op−amps in
the LM324. Each of them can be used as a comparator. We’ll start with just one, so
connect all unused inputs to ground.
Fig 3.4.1: Comparator test circuit
Build this circuit on your breadboard to learn how comparators work. The pots can
be any value, but 10K or more is best. The pots supply adjustable voltages to the
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inputs. Measure and set them with a DMM as described. One pot sets a trip point
(reference voltage) called Vref. Another pot simulates a fluctuating voltage signal,
called Vin. In your projects Vin could be from a photocell, flex sensor,
microphone etc .A comparator is an analog circuit with two inputs and one output.
It watches and compares two voltages at the inputs and decides if the output should
change or not based on the inputs. For example, if the voltage on one of the
inputs goes above a fixed trigger voltage on the other input, the output could go
from LOW to HIGH. This is only one configuration. There are lots of other
possibilities, and the test circuit will help you understand them. Comparators are
good at "conditioning" analog signals and turning them into digital signals. The
output can be hooked up directly to any logic input on another chip, a BASIC
Stamp, SSR etc. You can hook it up to a transistor (i.e. TIP120/122 or
TIP125/127) to drive relays, motors, solenoids etc. We are going to use the LM324
quad operational amplifier (op−amp). There are four general purpose op−amps in
the LM324. Each of them can be used as a comparator. We’ll start with just one, so
connect all unused inputs to ground.
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Non-inverting Comparator:
1. In this example POT1 is used to set the reference voltage (Vref) and POT2 supplies the
Input voltage (Vin).
2. Use the DMM to measure Vref at TEST POINT A. Turn POT1 to set it. You can set it
to whatever you need, but for now let’s set it to 3 volts.
3. Now measure Vin at TEST POINT B. Turning POT2 changes the voltage up and
down.
4. Whenever Vin is HIGHER than 3 volts (Vref) the output is HIGH (LED turns on).
Whenever Vin is LOWER than 3 volts (Vref) the output is LOW (LED turns off).
Inverting Comparator:
1. In this example POT2 sets Vref and POT1 supplies Vin.

2. Use the DMM to measure Vref at TEST POINT B. Turn POT2 to set it. Let’s use 3
volts again.
3. Now measure Vin at TEST POINT A. Turning POT1 changes the voltage.
4. Whenever Vin is HIGHER than 3 volts (Vref) the output is LOW (LED turns off).
Whenever Vin is LOWER than 3 volts (Vref) the output is HIGH (LED turns on).
3.5 Electromagnetic Relays:
When a coil of wire is wound on a non magnetic material such as plastic, paper etc.,
it is called a air-core solenoid or simply a solenoid .if a soft iron core is inserted into the
coil, it becomes an electromagnet. This electromagnet is the basic component for relay
and many other electromechanical devices such as electric bell, circuit breaker etc,.
Operation:
When a current flows through the coil, the resulting magnetic field attracts an
armature that is mechanically linked to a moving contact. The movement either makes or
breaks a connection with a fixed contact. When the current to the coil is switched off, the
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VCET B.Tech(E.C.E)
armature is returned by a force approximately half as strong as the magnetic force to its
relaxed position. Usually this is a spring, but gravity is also used commonly in industrial
motor starters. Most relays are manufactured to operate quickly. In a low voltage
application, this is to reduce noise. In a high voltage or high current application, this is to
reduce arcing.
Fig 3.5.1: Electro Magnetic Relay
If the coil is energized with DC, a diode is frequently installed across the coil, to
dissipate the energy from the collapsing magnetic field at deactivation, which would
otherwise generate a spike of voltage and might cause damage to circuit components.
Some automotive relays already include that diode inside the relay case. If the coil is
designed to be energized with AC, a small copper ring can be crimped to the end of the
solenoid. This "shading ring" creates a small out-of-phase current, which increases the
minimum pull on the armature during the AC cycle.[1]
By analogy with the functions of the original electromagnetic device, a solid-state

relay is made with a thyristor or other solid-state switching device. To achieve electrical
isolation, a light-emitting diode (LED) is used with a photo transistor.
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Fig 3.5.2: Electro Magnetic Relay circuit
Pole & Throw

Since relays are switches, the terminology applied to switches is also applied to relays.
A relay will switch one or more poles, each of whose contacts can be thrown by
energizing the coil in one of three ways:
Normally-open (NO) contacts connect the circuit when the relay is activated; the
circuit is disconnected when the relay is inactive. It is also called a Form A contact or
"make" contact.
Normally-closed (NC) contacts disconnect the circuit when the relay is activated; the
circuit is connected when the relay is inactive. It is also called a Form B contact or
"break" contact.
Change-over, or double-throw, contacts control two circuits: one normally-open contact
and one normally-closed contact with a common terminal. It is also called a Form C
contact or "transfer" contact.
The following types of relays are commonly encountered:
SPST - Single Pole Single Throw:
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These have two terminals which can be connected or disconnected. Including two for
the coil, such a relay has four terminals in total. It is ambiguous whether the pole is
normally open or normally closed. The terminology "SPNO" and "SPNC" is sometimes
used to resolve the ambiguity.
SPDT - Single Pole Double Throw.

A common terminal connects to either of two others. Including two for the coil, such a
relay has five terminals in total.
DPST - Double Pole Single Throw:

These have two pairs of terminals. Equivalent to two SPST switches or relays actuated
by a single coil. Including two for the coil, such a relay has six terminals in total. It is
ambiguous whether the poles are normally open, normally closed, or one of each.
DPDT - Double Pole Double Throw:

These have two rows of change-over terminals. Equivalent to two SPDT switches or
relays actuated by a single coil. Such a relay has eight terminals, including the coil.
QPDT - Quadruple Pole Double Throw:

Often referred to as Quad Pole Double Throw, or 4PDT. These have four rows of
change-over terminals. Equivalent to four SPDT switches or relays actuated by a single
coil or two DPDT relays. In total, fourteen terminals including the coil.
Fig 3.5.3: Electro Magnetic Relay circuit
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3.6 LCD:
Interfacing an LCD to 8051 Microcontroller:
An 8051 program must interact with the outside world using input and output devices
that communicate directly with a human being. One of the most common devices
attached to an 8051 is an LCD display. Some of the most common LCDs connected to
the 8051 are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20
characters per line by 2 lines, respectively.
Table 3.7.1: LCD Pin Description
The standard requires 3 control lines as well as either 4 or 8 I/O lines for the data bus.
The user may select whether the LCD is to operate with a 4-bit data bus or an 8-bit data
bus. If a 4-bit data bus is used the LCD will require a total of 7 data lines (3 control lines
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plus the 4 lines for the data bus). If an 8-bit data bus is used the LCD will require a total
of 11 data lines (3 control lines plus the 8 lines for the data bus).
Sending data/command in 4-bit Mode
We will now look into the common steps to send data/command to LCD when working
in 4-bit mode. In 4-bit mode data is sent nibble by nibble, first we send higher nibble
and then lower nibble. This means in both command and data sending function we need
to separate the higher 4-bits and lower 4-bits.
The common steps are:
• Mask lower 4-bits
• Send to the LCD port
• Send enable signal
• Mask higher 4-bits
• Send to LCD port
• Send enable signal
The three control lines are referred to as EN, RS, and RW.
The EN line is called "Enable." This control line is used to tell the LCD that you are
sending it data. To send data to the LCD, your program should make sure this line is low
(0) and then set the other two control lines and/or put data on the data bus. When the
other lines are completely ready, bring EN high (1) and wait for the minimum amount of
time required by the LCD datasheet (this varies from LCD to LCD), and end by bringing
it low (0) again.
The RS line is the "Register Select" line. When RS is low (0), the data is to be treated
as a command or special instruction (such as clear screen, position cursor, etc.). When RS
is high (1), the data being sent is text data which should be displayed on the screen. For
example, to display the letter "T" on the screen you would set RS high.
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The RW line is the "Read/Write" control line. When RW is low (0), the information
on the data bus is being written to the LCD. When RW is high (1), the program is
effectively querying (or reading) the LCD. Only one instruction ("Get LCD status") is a
read command. All others are write commands--so RW will almost always be low.
Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation selected
by the user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1, DB2,
DB3, DB4, DB5, DB6, and DB7.
Initializing the LCD:
Before you may really use the LCD, you must initialize and configure it. This is
accomplished by sending a number of initialization instructions to the LCD. The first
instruction we send must tell the LCD whether we'll be communicating with it with an 8-
bit or 4-bit data bus. We also select a 5x8 dot character font. These two options are
selected by sending the command 38h to the LCD as a command. As you will recall from
the last section, we mentioned that the RS line must be low if we are sending a command
to the LCD.There are also instruction command codes that can be sent to the LCD to
clear the display or force the cursor to the home position or blink the cursor. Table lists
the instruction command code.
Fig 3.7.2: LCD
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Table 3.7.3: Command to LCD Instruction Register
3.8 HT12E & HT12D Encoder and Decoder IC for RF Modules:
The HT 12E Encoder ICs are series of CMOS LSIs for Remote Control system
applications. They are capable of Encoding 12 bit of information which consists of N
address bits and 12-N data bits. Each address/data input is externally trinary
programmable if bonded out.
The HT 12D ICs are series of CMOS LSIs for remote control system applications. This
ICs are paired with each other. For proper operation a pair of encoder/decoder with the
same number of address and data format should be selected. The Decoder receive the
serial address and data from its corresponding decoder, transmitted by a carrier using an
RF transmission medium and gives output to the output pins after processing the data.
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Fig 3.8.1:HT12E Fig 3.8.2: HT12D
Features:
Encoder:
• 18 PIN DIP
• Operating Voltage : 2.4V ~ 12V
• Low Power and High Noise Immunity CMOS Technology
• Low Standby Current and Minimum Transmission Word
• Built-in Oscillator needs only 5% Resistor
• Easy Interface with and RF or an Infrared transmission medium
• Minimal External Components
Decoder:
• 18 PIN DIP, Operating Voltage : 2.4V ~ 12.0V

• Low Power and High Noise Immunity, CMOS Technology
• Low Stand by Current, Ternary address setting
• Capable of Decoding 12 bits of Information
• 8 ~ 12 Address Pins and 0 ~ 4 Data Pins
• Received Data are checked 2 times, Built in Oscillator needs only 5% resistor
• VT goes high during a valid transmission
• Easy Interface with an RF of IR transmission medium
• Minimal External Components
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Applications:
• Burglar Alarm, Smoke Alarm, Fire Alarm, Car Alarm, Security System
• Garage Door and Car Door Controllers
• Cordless telephone
• Other Remote Control System
Compatibility:
• Compatible with RF Modules 433 MHz Link :RF Modules (Tx + Rx Pair) 433
MHz ASK
3.9 SUPPLY MODULES ARE:
 Step Down Transformer
 Bridge Rectifier With Filter
 Voltage Regulators
3.10 Regulated Power Supply: In mains-supplied electronic systems the AC input

voltage must be converted into a DC voltage with the right value and degree of
stabilization. The common DC voltages that are required to power up the devices are
generally in the range of 3 VDC to 30 VDC. Typically the fixed types of DC voltages are
5V, 9V, 12V, 15V and 18V DC.
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VCET B.Tech(E.C.E)
Fig 3.10.1: Regulated Power Supply
3.11Transformer:
Transformers convert AC electricity from one voltage to another with little loss of
power. Transformers work only with AC and this is one of the reasons why mains
electricity is AC. Step-up transformers increase voltage, step-down transformers reduce
voltage.
A step down power transformer is used to step down the AC voltage from the Line
voltage of 110 VAC or 220 VAC i.e., it converts higher voltage at the input side to a
lower voltage at the output.
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Fig 3.11.1: Transformer
3.12 Rectifier:
There are several ways of connecting diodes to make a rectifier to convert AC to DC.
The bridge rectifier is the most important and it produces full-wave varying DC.
Fig 3.12.1: Bridge rectifier Output: full-wave

varying DC
Alternate pairs of diodes conduct, changing over (using the entire AC wave)
The connections so the alternating directions of

AC are converted to the one direction of DC.
3.13 Filter:
Filtering is performed by a large value electrolytic capacitor connected across the DC

supply to act as a reservoir, supplying current to the output when the varying DC voltage
from the rectifier is falling. The diagram shows the unfiltered varying DC (dotted line)
and the filtered DC (solid line). The capacitor charges quickly near the peak of the
varying DC, and then discharges as it supplies current to the output.
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Fig 3.13.1: Filter
Typically 1000 μf capacitor is used.
3.14 Regulator:
This is a simple DC regulated supply project using 7805 voltage regulator to obtain a
variable DC voltage range from 5V to 15V.
Fig 3.14.Regulator
Pin out of the 7805 regulator IC.
1. Unregulated voltage in
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2. Ground
3. Regulated voltage out
If you need other voltages than +5V, you can modify the circuit by replacing the 7805
chips with another regulator with different output voltage from regulator 78xx chip
family. The last numbers in the chip code tells the output voltage. Remember that the
input voltage must be at least 3V greater than regulator output voltage ot otherwise the
regulator does not work well.
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CHAPTER- 4
BLOCK DIAGRAM AND IMPLEMENTATION ON 8051
Figure 4.1 Block Diagram of project
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Automatic plant irrigation system is a closed loop system which monitors the moisture
condition. When the moisture is dry then that will be sensed using two long copper wires
which are inserted into the soil. Depending on this the op amp-LM324 will generate a
high signal and the information will be passed to the micro controller. Microcontroller
depending on the program it will send signals to relay circuit to switch on the motor. The
motor will be switched on. Now the sensor will continuously sense the moisture
condition when it becomes wet then depending on it the op amp-LM324 will generate a
low signal which is given to microcontroller which will send signal to relay circuit to
switch off the circuit. Here op amp-LM324 is operated as a comparator. The comparator
will compare the preset resistance value with the detected or sensed resistance value. If
the detected value is less than the preset values then it will generate high signal (i.e.
output will be +5v). If the detected value is less than the preset value then it will generate
low signal (i.e. output will be 0v). Like this first from sensor to comparator, from
comparator to microcontroller, from microcontroller to finally motor.
By using this system we can protect the fields without getting over watered. It is even
very cheap. By using this system one can reduce the amount of water, power, and man
power.
Below is the tabular form of different types of soil resistance values in wet and dry
conditions
S:NO DRY SOIL WET SOIL
RESISTANCE VALUE RESISTANCE VALUE

1 81.5K 40.7K
2 128K 217K
3 148K 70.4K
4 144.7K 65.4K
5 170.6K 130.7K
6 156K 124K
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7 84.3K 51.6K
8 80.7K 49.2K
Table 4.2: Soil resistance values in dry and wet condition
With the reference to this the preset value of resistance is taken as 68k ohms for wet
condition of soil( i.e. 0-68k ohms resistance level will be treated as moisture is in wet
state and above 68k ohms is treated as moisture is in dry state). So if the sensed level is
more than 68k ohms then the motor will be switched ON or else it is in OFF state.
The salient features of Micro Irrigation systems are listed

below:
• Uniform water application maintains optimum soil moisture ratio
• Uniform germination
• No Soil Erosion- soil conservation
• Fine droplets and shorter irrigation intervals creates micro climatic conditions,
beneficial for crop
• Uniform application of fertilizer-even for organic manure application
• Frost protection
• Easy to install & dismantle
• Easy visual operation
• Being a versatile system , can be used for 2-3 crops each year
• Distance between sprinklers : 10-12 meter
• Low application rate : 4-5mm/hr
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• Low operating pressure, thus energy saving
• Environment friendly, avoids leaching of soil & fertilizers in ground water
• Durable and weather resistance - long life span.
The circuit diagram of the automatic plant irrigation system is as shown below:
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Figure 4.3: Circuit Diagram of project
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CONCLUSION
The project “INTELLIGENT AUTOMATIC WATER SPRINKLER USING

8051” has been designed and tested. It has been developed by integrating
features of all the hardware components. Presence of every module has been
reasoned out and placed carefully thus contributing to the best working of
the unit.
By using high advanced IC’s and with latest version of

software ,our project has been successfully implemented. Our project
will be further implemented which is very helpful in watering of plants.
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ADVANTAGES AND APPLICATIONS

Advantages:
 Highly sensitive
 Works according to the soil condition
 Fit and Forget system
 Low cost and reliable circuit
 Complete elimination of manpower
 Can handle heavy loads up to 7A
 System can be switched into manual mode whenever required
Applications:
 Roof Gardens
 Lawns
 Agriculture Lands
 Home Gardens
Added Feature:
The added feature in this project is that we can even know the status of plants whenever
the family goes out .This can be done with the help of RF communication. The status of
the system is encoded and transmitted via RF link. A remote RF receiver will get the
status and this will be decoded to drive LEDs
57
VCET B.Tech(E.C.E)
BIBLIOGRAPHY
 www.8051projects.net/downloads118.htm
 www.docstoc.com/docs/.../Automatic-Plant-Irrigation-System
 www.freepatentsonline.com/6845588.html
 www.littlegreenhouse.com/accessory/mist2.shtm
 www.ehow.com › Plant Care
 www.crazyengineers.com/.../34317-intelligent-smoke-fire-detector-
automatic-water-sprinkler-system.html -
 ww.indiamart.com › Plant & Machinery › Agricultural Machinery
 ww.gizmag.com/aquarius-intelligent-automated-sprinkler.../9986
 www.projectideas.co.in/resources/Embedded-project-list.pdf
 www.alibaba.com › Showroom
58
VCET B.Tech(E.C.E)
SOFTWARE CODING
#include<stdio.h>
Sbit mag1=p1_0;
Sbit mag2=p1_1;
Sbit led1=p1_2;
Sbit rs=p1_7;
Sbit rw=p1_6;
Sbit e=p1_5;
sbit ldata=p3 ;
void lcdcmd(unsigned char);
void lcddata(unsigned char);
void delay(unsigned int);
unsigned char b [ ] =”AUTOMATIC PLANT”;

unsigned char c [ ] =”IRRIGATION”;
unsigned char msg1 [ ] =”PLANTS DRY”;
unsigned char msg2 [ ] =”PLANTS WET”;
void main( )
{
Unsigned char a[ ]={0X38,0X01,0X06,0X0e};
Unsigned int i ,j, k, l;
For(i=0;i<=4;i++)
{
Lcdcmd(a[i]);
}
For(j=0;b[j]!=’\0’;j++)
{
Lcddata(b[j]);
}
For(j=0;c[j]!=’\0’;j++)
{
Lcddata(c[j]);
}
While(1)
{
59
VCET B.Tech(E.C.E)
If(mag1==0)
{
Lcdcmd(0*80);
For(k=0;msg1[k]!=’\0’;k++)
{
Lcddata(msg1[k]);
}
Led1=1;
}
Else id(mag2===0)
{
Lcdcmd(0*80);
For(l=0;msg!=’\0’;l++)
{
Lcddata(msg2[1]);
}
led1=0;
}
}
}
Void lcdcmd(unsigned char command)

{
Ldata=command;
Rs=0;
rw=0;
e=0;
delay(10);
e=0;
}
Void lcddata(unsigned char value)

{
ldata=value;
rs=1;
rw=0;
e=1;
delay(100);
e=0;
}
Void delay(unsigned int t)

{
60
VCET B.Tech(E.C.E)
Unsigned int i, j;
For(i=0;i<=t;i++)
For(j=0;j<=25;j++)
}
61
VCET B.Tech(E.C.E)
62
VCET B.Tech(E.C.E)

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07BT1A0452 AUTOMATIC WATER SPRINKLER

Another benefit of automatic irrigation techniques is convenience. In a previous

BLOCK DIAGRAM AND TOOLS REQUIRED

Figure 1.1 Block Diagram of project

1.2 Hardware and Software tools for project

 Comparator Test Circuit

1.3 Supply Modules Are:

 Step Down Transformer

 Bridge Rectifier With Filter

1.4 Software Tools:

• Compatible with MCS-51® Products

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with

memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-

RAM (Bytes) : 256

Vcc (V) : 4.0-5.5

Figure 2.1.1 Block Diagram of microcontroller

Figure 2.1.2 Pin Diagram of microcontroller

VCC -Supply voltage.

Table 2.1.3: Port functions

Table 2.1.4: Port functions

2.2.1General Purpose Register:

Fig 2.2.2: General purpose registers

The most widely used registers

Fig 2.2.4: DPTR & PC

2.2.5 Special Function Registers:

The program status word (PSW)

2.2.6 Timer/Counters Registers:

2.2.7 TMOD Register (timer mode):

TMOD: Timer/Counter Mode Control Register: Not Bit Addressable.

2.2.8 TCON: Timer/Counter Control Register

The upper four The lower 4 bits

TF1 Timer1 overflow flag. Set by hardware when the Timer/Counter 1

Interrupt Service Routine:

Six Interrupts in 8052:

Enabling Interrupt (IE) Register:

All interrupt are disabled after reset

We can enable and disable them bye IE

EA -- ET2 ES ET1 EX1 ET0 EX0

EA IE.7 If EA=0, disables all interrupts, no interrupt is acknowledged

If EA=1, each interrupt source is individually enabled or disabled

-- IE.6 Not implemented, reserved for future use.

ET2 IE.5 Enables or disables Timer2 overflow or capture interrupt

ES IE.4 Enables or disables the serial port interrupts.

ET1 IE.3 Enables or disables Timer 1 overflow interrupt.

EX1 IE.2 Enables or disables external interrupt 1.

ET0 IE.1 Enables or disables Timer 0 overflow interrupt.

EX0 IE.0 Enables or disables external interrupt 0.

Interrupt Priority (IP) Register:

0= lower priority, 1= higher priority, reset IP=00H

Lower priority ISR can be interrupted by a high priority interrupt.

A high priority ISR cannot be interrupted.

-- -- PT2 PS PT1 PX1 PT0 PX0

PT2 IP.5 Timer2 interrupt priority bit (8052 only)

PS IP.4 serial port interrupt priority bit.

PT1 IP.3 Timer 1 interrupt priority bit.

PX1 IP.2 external interrupt 1 priority bit.

PT0 IP.1 Timer 0 interrupt priority bit.

PX0 IP.0 external interrupt 0 priority bit.

Table 2.3.1: Timer operating modes

Fig 2.3.2: Timer in capture mode

Table 2.3.3: Timer 2 mode control register

Fig 2.3.4: Timer 2 in reload mode

Fig 2.3.5: Timer 2 in auto reload mode