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Code.

No: R05420202
R05 SET-1
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.TECH II SEM–REGULAR/SUPPLEMENTARY EXAMINATIONS MAY - 2010
DIGITAL CONTOL SYSTEMS
(ELECTRICAL & ELECTRONICS ENGINEERING)
Time: 3hours Max.Marks:80
Answer any FIVE questions
All questions carry equal marks
---
1.a) Explain different methods of A/D conversion?
b) Explain the sample and hold circuits with a neat circuit diagram. [8+8]

2.a) Find the Inverse Z-transform of the following function


1 + 6 z −2 + z −3
F ( z) =

b)
(1 − z −1 )(1 − 0.2 z −1 )
State and explain different theorems related to Z-transforms.
o m [8+8]

3.a)
. c
Determine the pulse transfer function of two cascaded systems, each described

ld
by the difference equation. y(k) = 0.5 y(k-1) + r(k).

r
b) Write short notes on mapping between s-plane and z-plane. [8+8]

4.a)
b)

w o
Explain the procedure for discretization of continuous time state space equations.
Determine the discrete state variable representation for the pulse transfer function
given below.

tu
5z
G (z) = 2 [8+8]
z + 2z +1

5.
j. n
Examine whether the discrete data system given below,
⎡0 1⎤ ⎡1⎤

w w
x ( k + 1) = ⎢ ⎥
⎣ −2 −2 ⎦
X (k ) + ⎢ ⎥ u (k )

y ( k ) = [1 0] X ( k ) is
⎣ −1⎦

6.
w
(i) State controllable, (ii) Output controllable (iii) Observable.
[16]

State and explain fury stability test applied to discrete time control systems. Also,
investigate the stability of the following characteristic equations.
(i) p ( z ) = z 3 − 0.2 z 2 − 0.25 z + 0.05 = 0
(ii) p ( z ) = z 4 − 1.7 z 3 + 1.04 z 2 − 0.268 z + 0.024 = 0 [16]

7.a) Write short notes on PID controllers.


b) Explain the design procedure of lead-lag compensator in W-plane. [8+8]

8. Explain the reduced order state observer with a schematic diagram. [16]
-oOo-
Code.No: R05420202
R05 SET-2
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.TECH II SEM–REGULAR/SUPPLEMENTARY EXAMINATIONS MAY - 2010
DIGITAL CONTOL SYSTEMS
(ELECTRICAL & ELECTRONICS ENGINEERING)
Time: 3hours Max.Marks:80
Answer any FIVE questions
All questions carry equal marks
---

1.a) What are the advantages and disadvantages of digital control system over analog
control system.
b) With suitable diagram explain any two methods of digital to analog conversion.
[8+8]

2.a) State the limitations of Z – transform?


o m
b) Obtain the Z –transform of
(i) f (t ) = t 2
. c
c)
(ii) f ( t ) = 9k ( 2 k −1 ) − 2k + 3, k ≥ 0.
State and explain shifting theorem in Z-transform.
r ld [16]

3.

w o
Obtain the closed loop pulse transfer function of the following system
configuration shown in figure. [16]

j. n tu
w w
4. w
Consider the discrete control system represented by the transfer function,

G ( z) =
z −1 (1 + z −1 )
(1 + 0.5 z −1 )(1 − 0.5 z −1 )
Obtain the state space representation in the diagonal form. Also, find its state
transition matrix. [16]
5. Investigate the controllability and observability of the following system.
⎡ x1 ( k + 1) ⎤ ⎡1 −2 ⎤ ⎡ x1 ( k ) ⎤ ⎡1 −1⎤
⎢ ⎥= ⎢ ⎥⎢ ⎥ +⎢ ⎥ u (k )
⎣ x2 ( k + 1) ⎦ ⎣1 −1⎦ ⎣ x2 ( k ) ⎦ ⎣ 0 0 ⎦

⎡ y1 ( k ) ⎤ ⎡1 0 ⎤ ⎡ x1 ( k ) ⎤
⎢ ⎥= ⎢ ⎥⎢ ⎥ [16]
⎣ y2 ( k ) ⎦ ⎣0 1 ⎦ ⎣ x2 ( k ) ⎦

6.a) Explain the mapping between s-plane and z-plane.


b) Using Jury’s stability criterion, find the range of k for which the characteristic
equation given below,
z 3 + kz 2 + 1.5 z − (k + 1) = 0 is representing the closed loop stable system. [8+8]

7. Explain the design procedure in the W-plane of lead compensator.

o m [16]

8.a)
b)
Draw the schematic diagram of full-order observer.

. c
State the salient steps involved in design of state feed back controller through pole

ld
placement. [16]

-oOo-

o r
tu w
j. n
w w
w
Code.No: R05420202
R05 SET-3
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.TECH II SEM–REGULAR/SUPPLEMENTARY EXAMINATIONS MAY - 2010
DIGITAL CONTOL SYSTEMS
(ELECTRICAL & ELECTRONICS ENGINEERING)
Time: 3hours Max.Marks:80
Answer any FIVE questions
All questions carry equal marks
---

1.a) Explain the necessity of sampling and its applications.


b) Obtain the transfer function of zero-order hold and first order hold circuits. [8+8]

2.a) State and prove initial and final value theorems related z-transforms.
b) Find the inverse z-transform of
F ( z) =
z ( z0 H )
( z − 1) ( z 2 − z + 1)
.

o m
c) Obtain the Z-transform of the following:
. c
ld
(i) Gk where G is an n × n matrix
(ii) k ak-1 by two methods. [16]

3.a)

o r
Solve the following difference equation by the use of Z-transform method.
x ( k + 2 ) + 3x ( k + 1) + 2 x ( k ) = 0

b)
With x ( 0 ) = 0x (1) = 1

tu w
Explain the mapping between S-plane and Z-plane. [8+8]

4.
j. n
Consider the discrete control system represented by the following transfer function.
G (z) =
1 + 0.8 z −1

w w 1 − z −1 + 0.5 z −2
.
Obtain the state space representation in all possible methods. Also, find its state
transition matrix. [16]

5.a)

b)
w
Define and explain the controllability and observability applied to discrete time
control systems.
For the following system, investigate the observability and controllability.
Y (z) z −1 (1 + 0.8 z −1 )
= . [8+8]
U (z) 1 + 1.3 z −1 + 0.4 z −2
6.a) State and explain Jury stability test applied to discrete time control systems.
b) Consider the digital system shown in figure.

Find the range of K for the system to be stable using Jury stability test. [8+8]

7. The digital controlled process of a unity feed back system is described by the
transfer function
k ( z + 0.5 )
Gho G p ( z ) =
( z − 1)( z − 0.5 )
Design a cascade phase – lag controller with the transfer function
o m
D ( z ) = kc
z − z1

. c
ld
z − p1
So that the following design speficifications are satisfied.
(i)
(ii)
kv = 6

o r
The dominant roots of the closed loop characteristic equation are
approximately at z = 0.71+j 0.19 and 0.71-j 0.19

8.
(iii)

tu w
The maximum over shoot is ≤ 15 percent.

Explain the reduced order observer with block diagram.


[16]

[16]

j. n -oOo-

w w
w
Code.No: R05420202
R05 SET-4
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.TECH II SEM–REGULAR/SUPPLEMENTARY EXAMINATIONS MAY - 2010
DIGITAL CONTOL SYSTEMS
(ELECTRICAL & ELECTRONICS ENGINEERING)
Time: 3hours Max.Marks:80
Answer any FIVE questions
All questions carry equal marks
---

1.a) Explain the following with respect to digital control system configuration
(i) A/D and D/A conversion.
(ii) Sample and hold circuit
(iii) Transducer
(iv) Different types of sampling operations. [16]

2. Obtain the inverse Z-transform of the following in the closed form.


o m
(i) F ( z) =
0.368 z 2 + 0.478 z + 0.154
z 2 ( z − 1)
. c
F ( z) =
2z3 + z
r ld
o
(ii)
( z − 1) ( z − 2 )
2

(iii) F ( z) =
z+2
z ( z − 2)
2

tu w [16]

3.
j. n
Solve the following difference equation
x ( k ) − 0.6 x ( k − 1) − 0.81x ( k − 2 ) + 0.67 x ( k − 3) − 0.12 x ( k − 4 ) = y ( k )

4.a)
w w
All the initial conditions are assumed to be zero.

State the properties of state transition matrix.


[16]

b)
w
Consider the discrete control system represented by the following transfer function,
G (z) =
1 + 0.8 z −1
1 − z −1 + 0.5 z −2
Obtain the state space representation of the system in all possible methods. [8+8]

5.a) Explain the principle of duality exists between observability and controllability.
b) Investigate the controllability and observability of the following system.
⎡ −1 1 ⎤ ⎡0⎤
x ( k + 1) + ⎢ ⎥ x ( k ) + ⎢ ⎥ u ( k ) and
⎣ 0 −1⎦ ⎣1 ⎦
Y ( k ) = [1 1] x ( k ) . [8+8]
6.a) Write short notes on primary strips and complementary strips.
b) The open loop transfer function of unity feed back control system is given by
k ( 0.3679 z + 0.2642 )
G ( z) = . [8+8]
( z − 0.3679 )( z − 1)
7. Explain the design procedure of lag compensator in W-plane. [16]

8. Consider the digital process with the state equations described by


⎡ 0 1⎤ ⎡0⎤
x ( k + 1) = ⎢ ⎥ x ( k ) + ⎢1 ⎥ u ( k ) and Y ( k ) = [ 2 0] x ( k )
⎣ −1 1⎦ ⎣ ⎦
Design a full order observer which will observe the states x1(k) and x2(k) from the
output y (k), having dead beat response. [16]

-oOo-

o m
. c
r ld
w o
j. n tu
w w
w

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