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ML510 VxWorks Workbench

BSP and System Image Creation


for the BSB DIMM1 SGMII
PPC440 Design

August 2008
Overview
• Hardware Setup
• Software Setup & Requirements
• Generate VxWorks BSP
• Create VxWorks Project
• Create VxWorks System Image
• Generate and Run an ACE File
Xilinx ML510 Board

Note: Presentation applies to the ML510


ML510 BSB DIMM1 Hardware
• The ML510 PPC440 design
hardware includes:
– DDR2 Interface (512 MB)
– BRAM
– External Memory Controller (EMC)
– Networking
– UART
– Interrupt Controller
– GPIO
– EEPROM (IIC and SPI)
– Timer
– System ACE CF Interface
– PLB Arbiter
Note: Presentation applies to the ML510
Additional Setup Details
• Refer to ml510_overview_setup.ppt for details on:
– Software Requirements
– ML510 Board Setup
• Equipment and Cables
• Software
• Network
– Terminal Programs
• This presentation requires the
9600-8-N-1 Baud terminal setup

Note: Presentation applies to the ML510


Hardware Setup
• Connect the Xilinx Parallel
Cable IV (PC4) to the
ML510 board

• Connect the RS232 null


modem cable to the
ML510 board
– Connect to the COM1 and
COM2 ports on the ML510
board
Software Setup
• Install Wind River Systems Workbench 2.5

Note: Presentation applies to the ML510


ISE Software Requirement
• Xilinx ISE 10.1i SP2 software

Note: Presentation applies to the ML510


EDK Software Requirement
• Xilinx EDK 10.1i SP2 software

Note: Presentation applies to the ML510


Software Setup
• Start the Terminal Programs, UART1 and UART2:

Note: Presentation applies to the ML510


Extracting the Design
• Unzip the ml510_bsb_dimm1_ppc440.zip file
– This creates ISE and EDK project directories

Note: Presentation applies to the ML510


Extracting the Design
• Rename the project directory to
ml510_bsb_dimm1_vxworks_ppc440

Note: Presentation applies to the ML510


Extracting the Design
• Unzip the ml510_bsb_dimm1_vxworks_ppc440_overlay.zip file
– Unzip to the ml510_bsb_dimm1_vxworks_ppc440 directory

Note: Presentation applies to the ML510


Add and Configure VxWorks BSP
Generate VxWorks BSP in EDK
• Parameters preset for VxWorks in ml510_bsb_system.xmp
– Common hardware design (ml510_bsb_system.mhs) across
software apps
– Software Platform Settings
• OS selection set to VxWorks 6.3
• Peripheral for Standard Input
• Peripheral for Standard Output
• Select peripherals connected for OS interface

Note: Presentation applies to the ML510


Generate VxWorks BSP in EDK
• Launch EDK project:
<design path>\ 1
ml510_bsb_system.xmp
• Select Software →
Software Platform
Settings… (1)

Note: Presentation applies to the ML510


Software Platform Settings
• Under Software 1

Platform (1)
– Select vxworks6_3 (2)

Note: Presentation applies to the ML510


Software Platform Settings
• Under OS and 1

Libraries (1):
– Set STDIN =
RS232_Uart_1 3
2
– Set STDOUT =
RS232_Uart_1 (2)
• Click the
connected_periphs
button (3)

Note: Presentation applies to the ML510


Generate VxWorks BSP in EDK
• Verify these peripherals are included in the pop-up dialog box (1)
– RS232_Uart_2
– Hard_Ethernet_MAC
– SysACE_CompactFlash

Note: Presentation applies to the ML510


Generate BSP in EDK
• Select :
– Software →
Generate Libraries 1
and BSPs (1)
• The generated
VxWorks BSP will be:
<design path>\
ppc440_0\
bsp_ppc440_0

Note: Presentation applies to the ML510


Optional Installation
• Bypass the VxWorks BSP and Project creation steps in this
presentation by using the pre-built BSP and Project:
• BSP: Unzip the file ml510_bsb_dimm1_vxworks_ppc440_bsp.zip
to the <design path>\workbench25 directory

Note: Presentation applies to the ML510


Optional Installation
• Project: Unzip the ml510_bsb_dimm1_vxworks_ppc440_proj.zip
file to the <design path>\workbench25 directory
• Go to Slide 47, if doing the Optional Installation

Note: Presentation applies to the ML510


Copy BSP Locally
• Copy
<design path>\ppc440_0\bsp_ppc440_0
To:
<design path>\workbench25
– Hold down the <Ctrl> while dragging to copy instead of move

Note: Presentation applies to the ML510


Update BSP
• Copy these three files:
– <design path>\workbench25\config.h
– <design path>\workbench25\Makefile
To:
– <design path>\workbench25\bsp_ppc440_0

Note: Overwrite the existing files


Update BSP
• Open <design path>\workbench25\bsp_ppc440_0\
ppc440_0_drv_csp\xsrc\xlltemac_g.c and delete the
XPAR_LLTEMAC_0 entry, shown in yellow below:

Note: Presentation applies to the ML510


Update BSP
• The file xlltemac_g.c after editing:

Note: Presentation applies to the ML510


Update BSP
• Open <design path>\workbench25\bsp_ppc440_0\
ppc440_0_drv_csp\xsrc\xparameters.c:
– Change XPAR_XLLTEMAC_NUM_INSTANCES to 1

Note: Presentation applies to the ML510


Update BSP
• Delete the Channel 0 references, shown in yellow below:

Note: Presentation applies to the ML510


Update BSP
• The file xparameters.h after editing, shown below
• Save these two files

Note: Presentation applies to the ML510


Create VxWorks Project
• Launch WindRiver
Workbench and select File
→ New Project…
• Choose “VxWorks Image
Project”

Note: Presentation applies to the ML510


Create VxWorks Project
• Set the project 1
name to:
ml510_bsb_dimm1_
vxworks_ppc440 (1)
• Set the location to
<design
2
path>\workbench25\
proj_ppc440_0 (2)

Note: Presentation applies to the ML510


Create VxWorks Project
• Select the BSP by browsing to the workbench25 directory (1)
• Select sfgnu (software
floating point) from the Tool
chain drop-down menu (2)
• Click Finish (3)
2

1
3

Note: Presentation applies to the ML510


Create VxWorks Project
• In the new VxWorks Project,
right-click on Kernel
Configuration, and select
Edit Kernel Configuration (1)
1

Note: Presentation applies to the ML510


Configure System Image
• To reproduce the pre-compiled
BSB VxWorks system image
– Components must be 2
Included or Excluded
• Select the Components tab (1)
• Right-click on the desired
components and select
“Include” (2)
– In some cases you will
select Exclude

Note: Presentation applies to the ML510


Configure System Image
• Include: C++ Components
– Some components are pre-checked - leave these checked (1)
– Click Next (2) and note the image size; then click Finish (3)

2 3

Note: Presentation applies to the ML510


Configure System Image
• Include: development tool components > WDB agent components
– Check WDB task breakpoints

Note: Presentation applies to the ML510


Configure System Image
• Include: development tool components > loader components
– Check module manager
– Check target unloader

Note: Presentation applies to the ML510


Configure System Image
• Include: development tool components > kernel shell components
– Check file system shell commands

Note: Presentation applies to the ML510


Configure System Image
• Include: operating system components > IO system components
> dosFs File System Components
– Check all boxes, except:
– DOS File System Old Directory
Format Handler
– File System Backup and
Archival

Note: Presentation applies to the ML510


Configure System Image
• Include: operating system components > IO system components
– Check the following:
– RAM disk driver
– XBD Block Device
– XBD Disk
Partition Handler
– XBD Ram Drive

Note: Presentation applies to the ML510


Configure System Image
• Include: Network Components > Network Applications
– Check FTP6 server

Note: Presentation applies to the ML510


Configure System Image
• Exclude: Network Components > Network Applications >
FTPv6 server security
– Eliminates the need to enter a password for FTP

Note: Presentation applies to the ML510


Configure System Image
• Include: Network Components > Network Utilities
Components
– Check Network interface show routines

Note: Presentation applies to the ML510


Configure System Image
• Do this step last, after adding other components
– Exclude: hardware > memory > enable caches

Note: Presentation applies to the ML510


Create VxWorks System Image
• Right-click vxWorks and select
Rebuild Project (1)
– This creates a VxWorks
system image

Note: Presentation applies to the ML510


Create VxWorks System Image
• A successful compile creates a VxWorks ELF kernel image
<design path>\workbench25\proj_ppc440_0\default\vxWorks

Note: Presentation applies to the ML510


Download Bootloop Bitstream
• Open an EDK shell
– Select Project →
Launch
EDK Shell (1) 1

Note: Presentation applies to the ML510


Download Bootloop Bitstream
• Download the pre-built bootloop bitstream using this
command:
impact -batch etc/bootloop.cmd

Note: Presentation applies to the ML510


Verify Bootloop Bitstream
• A memory read can
be executed to test
if the bootloop was
successfully loaded
– Select Debug → 1
Launch XMD (1)

Note: Presentation applies to the ML510


XMD Setup
• The first time XMD runs on
a project, the debug
options must be set
– Click OK (1)
– Click OK (2)

1
2

Note: Presentation applies to the ML510


Verify Bootloop in BRAM
• XMD opens and connects to the processor, using
the default options

Note: Presentation applies to the ML510


Verify Bootloop in BRAM
• To verify existence of bootloop inside of Block RAM:
mrd 0xfffffffc
• This will read the memory address at the reset vector; the
value should be 0x48000000 as shown below (1)

Note: Presentation applies to the ML510


Download ELF File
• Download the vxworks ELF file from XMD
dow workbench25/proj_ppc440_0/default/vxworks (1)
con (2)

Note: Presentation applies to the ML510


Run VxWorks
• View the output in the terminal program
• VxWorks running in external memory of ML510 (below)

Note: Presentation applies to the ML510


Target Shell Task Listing
• After the VxWorks banner screen, type i (1)
• View a list of tasks running on the ML510 (2)

Note: Presentation applies to the ML510


Network Statistics
• Type ifShow "lltemac" (1)
• Note the number of packets (2)

Note: Presentation applies to the ML510


Ping ML510 Target from Host
• Open a DOS window on the PC Host
(Start → Programs → Accessories → Command Prompt)
• Type ping 192.168.0.2 (1)
– Ping from PC host 192.168.0.1 to ML510 target 192.168.0.2

Note: Presentation applies to the ML510


Ping Host from ML510 Target
• Type ping "192.168.0.1", 4, 0 (1)
– Ping from ML510 target 192.168.0.2 to PC host 192.168.0.1
• Note: VxWorks requires double quotes on the IP address

Note: Presentation applies to the ML510


Network Statistics
• Type ifShow "lltemac" again (1)
• Number of packets has increased after pinging (2)

Note: Presentation applies to the ML510


Mounting a Local File System
• Create a Ram Disk file system (1):
xbdRamDiskDevCreate (512, 0x1000000, 0, "/ramDisk")
dosFsVolFormat ("/ramDisk", 2, 0)
cd "/ramDisk"

Note: Presentation applies to the ML510


List Directory
• The Ram Disk provides a DOS filesystem
• Type ll (1)
– No files are currently on the ram disk

Note: Presentation applies to the ML510


FTP to VxWorks Target
• From the DOS window, perform an FTP transfer of any
file to the ML510 Ram disk:
cd <tmp dir>
ftp 192.168.0.2
<enter*>
<enter*>
Binary
put <file name>
quit

* When prompted for a user name and password, hit the enter key
FTP to VxWorks Target
• Type ll again(1)
• The file (2) was transferred via ftp from the host to the
ram disk

1 2

Note: Presentation applies to the ML510


Create an Executable File
• These commands use I/O redirection with a file:
– Type printf"ll\n">mycmd (1) which “prints” the mycmd file
– Type <mycmd (2) which executes the ll command and shows the
new mycmd file on disk (3)

1
2
3

Note: Presentation applies to the ML510


Delete Files
• Delete the two new files with these commands (1):
rm "vxWorks"
rm "mycmd"
• Type ll and verify the files were deleted

Note: Presentation applies to the ML510


Workbench Target Server Setup
• Start Wind River Workbench 2.5
• From the menu, select Target
→ New Connection…
• Select Target Server 1
Connection (1)

Note: Presentation applies to the ML510


Workbench Target Server Setup
• The IP address should
be 192.168.0.2 (1)
• Set the Kernel Image to
point to the vxWorks
image for your design:
– <design path>/ 1
workbench25/
proj_ppc440_0/default/
vxWorks (2)
2
– This path will vary
depending on the
design

Note: Presentation applies to the ML510


Workbench Target Server Setup
• Click Next three times 1

and set the Connection


name to ml510 (1)
• Click Finish

Note: Presentation applies to the ML510


Connect Target Server
• Upon the initial creation of a Target Server Connection, it will
automatically connect

Note: Presentation applies to the ML510


Connect Target Server
• For subsequent sessions, the target server can be restarted
• Select Target → Connect 'ml510_dimm1' (1)

Note: Presentation applies to the ML510


Host Shell
• With the ml510 target connected, launch a host shell by
selecting Target → Host Shell and click OK

Note: Presentation applies to the ML510


Host Shell
• Type i in the host and target shells
• See the same task listings in both shells

Note: Presentation applies to the ML510


Create an ACE File
• Open an EDK shell
– Select Project →
Launch
EDK Shell (1) 1
– This shell is used for
entering and
executing the
commands to create
a concatenated
(HW+SW ) ACE file

Note: Presentation applies to the ML510


Create an ACE File
• At the EDK shell prompt, type (1):
cd ace
./genace_vxworks.sh

Note: Presentation applies to the ML510


Run ACE File
• Copy ml510_bsb_dimm1_ppc440_vxworks.ace to the
xilinx\cf7 directory on your CompactFlash card
– Important: Delete any existing ace files
in this cf7 directory
– Note: Use a CompactFlash reader to
mount the CompactFlash as a disk drive

Note: Presentation applies to the ML510


Run ACE File
• Eject the CompactFlash from your PC and insert it back into
the ML510
• Type 7 to run the newly created ACE file and load vxWorks

Note: Presentation applies to the ML510


Using the ACE File
• Target shell output after booting ACE file (on UART2)

Note: Presentation applies to the ML510


Target Shell Task Listing
• After the VxWorks banner screen, type i (1)
• View a list of tasks running on the ML510 (2)

Note: Presentation applies to the ML510


Documentation
• Virtex-5
– Silicon Devices
http://www.xilinx.com/products/silicon_solutions
– Virtex-5 Multi-Platform FPGA
http://www.xilinx.com/products/silicon_solutions/fpgas/virtex/virtex5
– Virtex-5 Family Overview: LX, LXT, SXT, and FXT Platforms
http://www.xilinx.com/support/documentation/data_sheets/ds100.pdf
– Virtex-5 FPGA DC and Switching Characteristics Data Sheet
http://www.xilinx.com/support/documentation/data_sheets/ds202.pdf
Documentation
• Virtex-5
– Virtex-5 FPGA User Guide
http://www.xilinx.com/support/documentation/user_guides/ug190.pdf
– Virtex-5 FPGA Configuration User Guide
http://www.xilinx.com/support/documentation/user_guides/ug191.pdf
– Virtex-5 System Monitor User Guide
http://www.xilinx.com/support/documentation/user_guides/ug192.pdf
– Virtex-5 Packaging and Pinout Specification
http://www.xilinx.com/support/documentation/user_guides/ug195.pdf
Documentation
• Virtex-5 RocketIO
– RocketIO GTP Transceivers
http://www.xilinx.com/products/silicon_solutions/fpgas/virtex/virtex5/
capabilities/RocketIO_GTP.htm
– RocketIO GTX Transceivers
http://www.xilinx.com/products/silicon_solutions/fpgas/virtex/virtex5/
capabilities/RocketIO_GTX.htm
– RocketIO GTP Transceiver User Guide – UG196
http://www.xilinx.com/support/documentation/user_guides/ug196.pdf
– RocketIO GTX Transceiver User Guide – UG198
http://www.xilinx.com/support/documentation/user_guides/ug198.pdf
Documentation
• Design Resources
– ISE Development Tools and IP
http://www.xilinx.com/ise
– Integrated Software Environment (ISE) Foundation Resources
http://www.xilinx.com/ise/logic_design_prod/foundation.htm
– ISE Manuals
http://www.xilinx.com/support/software_manuals.htm
– ISE Development System Reference Guide
http://toolbox.xilinx.com/docsan/xilinx10/books/docs/dev/dev.pdf
– ISE Development System Libraries Guide
http://toolbox.xilinx.com/docsan/xilinx10/books/docs/virtex5_hdl/virtex5_hdl.pdf
Documentation
• Additional Design Resources
– Customer Support
http://www.xilinx.com/support
– Xilinx Design Services:
http://www.xilinx.com/xds
– Titanium Dedicated Engineering:
http://www.xilinx.com/titanium
– Education Services:
http://www.xilinx.com/education
– Xilinx On Board (Board and kit locator):
http://www.xilinx.com/xob
Documentation
• Platform Studio
– Embedded Development Kit (EDK) Resources
http://www.xilinx.com/edk
– Embedded System Tools Reference Manual
http://www.xilinx.com/support/documentation/sw_manuals/edk10_est_rm.pdf
– EDK Concepts, Tools, and Techniques
http://www.xilinx.com/support/documentation/sw_manuals/edk_ctt.pdf
Documentation
• PowerPC 440
– PowerPC 440 Processor
http://www.xilinx.com/powerpc
– Embedded Processor Block in Virtex-5 FPGAs Reference Guide – UG200
http://www.xilinx.com/support/documentation/user_guides/ug200.pdf
– PPC440 Virtex-5 Wrapper – DS621
http://www.xilinx.com/support/documentation/ip_documentation/
ppc440_virtex5.pdf
– DDR2 Memory Controller for PowerPC 440 Processors – DS567
http://www.xilinx.com/support/documentation/data_sheets/ds567.pdf
Documentation
• MicroBlaze
– MicroBlaze Processor
http://www.xilinx.com/microblaze
– MicroBlaze Processor Reference Guide – UG081
http://www.xilinx.com/support/documentation/sw_manuals/mb_ref_guide.pdf
Documentation
• Memory Solutions
– Demos on Demand – Memory Interface Solutions with Xilinx FPGAs
http://www.demosondemand.com/clients/xilinx/001/page_new2/index.asp#35
– Xilinx Memory Corner
http://www.xilinx.com/products/design_resources/mem_corner
– Additional Memory Resources
http://www.xilinx.com/support/software/memory/protected/index.htm
– Xilinx Memory Interface Generator (MIG) 2.2 User Guide
http://www.xilinx.com/support/documentation/ip_documentation/ug086.pdf
– Memory Interfaces Made Easy with Xilinx FPGAs and the
Memory Interface Generator
http://www.xilinx.com/support/documentation/white_papers/wp260.pdf
Documentation
• ChipScope Pro
– ChipScope Pro 10.1i Serial IO Toolkit User Manual
http://www.xilinx.com/ise/verification/chipscope_pro_siotk_10_1_ug213.pdf
– ChipScope Pro 10.1i ChipScope Pro Software and Cores User Guide
http://www.xilinx.com/ise/verification/chipscope_pro_sw_cores_10_1_ug029.pdf
Documentation
• Ethernet
– Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper Data Sheet
http://www.xilinx.com/support/documentation/ip_documentation/
v5_emac_ds550.pdf
– Virtex-5 Embedded Tri-Mode Ethernet MAC Wrapper Getting Started Guide
http://www.xilinx.com/support/documentation/ip_documentation/
v5_emac_gsg340.pdf
– Virtex-5 Tri-Mode Ethernet Media Access Controller User Guide
http://www.xilinx.com/support/documentation/user_guides/ug194.pdf
– LightWeight IP (lwIP) Application Examples – XAPP1026
http://www.xilinx.com/support/documentation/application_notes/xapp1026.pdf
Documentation
• PLB v4.6 IP
– Processor Local Bus (PLB) v4.6 Data Sheet – DS531
http://www.xilinx.com/support/documentation/ip_documentation/plb_v46.pdf
– Multi-Port Memory Controller (MPMC) – DS643
http://www.xilinx.com/support/documentation/ip_documentation/mpmc.pdf
– XPS Multi-CHannel External Memory Controller (XPS MCH EMC) – DS575
http://www.xilinx.com/support/documentation/ip_documentation/
xps_mch_emc.pdf
– XPS LocalLink TEMAC – DS537
http://www.xilinx.com/support/documentation/ip_documentation/xps_ll_temac.pdf
– XPS LocalLink FIFO – DS568
http://www.xilinx.com/support/documentation/ip_documentation/xps_ll_fifo.pdf
Documentation
• PLB v4.6 IP
– XPS IIC Bus Interface – DS606
http://www.xilinx.com/support/documentation/ip_documentation/xps_iic.pdf
– XPS SYSACE (System ACE) Interface Controller – DS583
http://www.xilinx.com/support/documentation/ip_documentation/xps_sysace.pdf
– XPS Timer/Counter – DS573
http://www.xilinx.com/support/documentation/ip_documentation/xps_timer.pdf
– XPS Interrupt Controller – DS572
http://www.xilinx.com/support/documentation/ip_documentation/xps_intc.pdf
– Using and Creating Interrupt-Based Systems Application Note
http://www.xilinx.com/support/documentation/application_notes/xapp778.pdf
Documentation
• PLB v4.6 IP
– XPS General Purpose Input/Output (GPIO) – DS569
http://www.xilinx.com/support/documentation/ip_documentation/xps_gpio.pdf
– XPS External Peripheral Controller (EPC) – DS581
http://www.xilinx.com/support/documentation/ip_documentation/xps_epc.pdf
– XPS 16550 UART – DS577
http://www.xilinx.com/support/documentation/ip_documentation/
xps_uart16550.pdf
– PLBV46 to DCR Bridge Data Sheet – DS578
http://www.xilinx.com/support/documentation/ip_documentation/
plbv46_dcr_bridge.pdf
Documentation
• IP
– Local Memory Bus Data Sheet – DS445
http://www.xilinx.com/support/documentation/ip_documentation/lmb_v10.pdf
– Block RAM Block Data Sheet – DS444
http://www.xilinx.com/support/documentation/ip_documentation/bram_block.pdf
– Microprocessor Debug Module Data Sheet – DS641
http://www.xilinx.com/support/documentation/ip_documentation/mdm.pdf
– LMB Block RAM Interface Controller Data Sheet – DS452
http://www.xilinx.com/support/documentation/ip_documentation/
lmb_bram_if_cntlr.pdf
– Device Control Register Bus (DCR) v2.9 Data Sheet – DS406
http://www.xilinx.com/support/documentation/ip_documentation/dcr_v29.pdf
Documentation
• IP
– JTAGPPC Controller Data Sheet – DS298
http://www.xilinx.com/support/documentation/ip_documentation/jtagppc_cntlr.pdf
– Processor System Reset Module Data Sheet – DS402
http://www.xilinx.com/support/documentation/ip_documentation/
proc_sys_reset.pdf
– Clock Generator v2.0 Data Sheet – DS614
http://www.xilinx.com/support/documentation/ip_documentation/
clock_generator.pdf
– Util Bus Split Operation Data Sheet – DS484
http://www.xilinx.com/support/documentation/ip_documentation/
util_bus_split.pdf
Documentation
• ML510
– ML510 Overview
http://www.xilinx.com/ml510
– ML510 Evaluation Platform User Guide – UG356
http://www.xilinx.com/support/documentation/boards_and_kits/ug356.pdf
– ML510 Reference Design User Guide – UG355
http://www.xilinx.com/support/documentation/boards_and_kits/ug355.pdf
– ML510 Quickstart Tutorial
http://www.xilinx.com/products/boards/ml510/docs/ml510_quickstart.pdf
Documentation
• ML510
– ML510 Schematics
http://www.xilinx.com/support/documentation/boards_and_kits/
ml510_schematics.pdf
– ML510 Bill of Material
http://www.xilinx.com/support/documentation/boards_and_kits/ml510_bom.xls

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