UTC BT169 SCR

DESCRIPTION
The UTC BT169 is glass passivated, sensitive gate
thyristors in a plastic envelope, intended for use in
general purpose switching and phase control
applications. These devices are intended to be
interfaced directly to microcontrollers, logic integrated
circuits and other low power gate trigger circuits.
1

TO-92

1:CATHODE 2:GATE 3:ANODE

QUICK REFERENCE DATA

PARAMETER SYMBOL MAX(B) MAX(D) MAX(E) MAX(G) UNIT
Repetitive peak off-state voltages VDRM, VRRM 200 400 500 600 V
Average on-state current IT(AV) 0.5 0.5 0.5 0.5 A
RMS on-state current IT(RMS) 0.8 0.8 0.8 0.8 A
Non-repetitive peak on-state current ITSM 8 8 8 8 A

ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL CONDITIONS MIN MAX UNIT
Repetitive peak off-state voltages : VDRM,VRRM B:200 V
D:400
E:500
G:600
Average on-state current IT(AV) Half sine wave; 0.5 A
Tlead<=83°C
RMS on-state current IT(RMS) All conduction angles 0.8 A
Non-repetitive peak on-state current ITSM t=10ms 8 A
t=8.3ms 9
half sine wave;
Tj=25°C prior to surge
I2t for fusing I2t t=10ms 0.32 A2 S
Repetitive rate of rise of on-state current DIT/dt ITM=2A;IG=10mA; 50 A/µs
after triggering dIG/dt=100mA/µs
Peak gate current IGM 1 A
Peak gate voltage VGM 5 V
Peak reverse gate voltage VRGM 5 V

UTC UNISONIC TECHNOLOGIES CO., LTD. 1

UTC BT169 SCR
PARAMETER SYMBOL CONDITIONS MIN MAX UNIT
Peak gate power PGM 2 W
Average gate power PG(AV) Over any 20 ms period 0.1 W
Storage temperature Tstg -40 150 °C
Operating junction temperature Tj 125 °C

THERMAL RESISTANCES
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
Thermal resistance junction to lead Rth j-lead 60 K/W
Thermal resistance junction to Rth j-a pcb mounted; 150 K/W
ambient lead length=4mm

ELECTRICAL CHARACTERISTICS (Tj=25°C unless otherwise stated)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT
STATIC
Gate trigger current IGT VD=12V;IT=10mA;gate 50 200 µA
open circuit
Latching current IL VD=12V;IGT=0.5mA; 2 6 mA
RGK=1kΩ
Holding current IH VD=12V;IGT=0.5mA; 2 5 mA
RGK=1kΩ
On-state voltage VT IT=1A 1.2 1.35 V
Gate trigger voltage VGT VD=12V;IT=10mA; 0.5 0.8 V
gate open circuit
VD=VDRM(max) ;IT=10mA ; 0.2 0.3
Tj=125°C; gate open circuit
Off-state leakage current ID,IR VD=VDRM(max) ;VR=VRRM(m 0.05 0.1 mA
ax) ;Tj=125°C;RGK=1kΩ
DYNAMIC
Ciritical rate of rise of off-state dVD/dt VDM=67% VDRM(max); 25 V/µs
voltage Tj=125°C; exponential
waveform;RGK=1kΩ
Gate controlled turn-on time tgt ITM=2A;VD=VDRM(max); 2 µs
IG=10mA;dIG/dt=0.1A/µs
Circuit commutated turn-off time tq VD=67% VDRM(max) ; 100 µs
Tj=125°C;ITM=1.6A;VR=35V
;dITM/dt=30A/µs;
VD/dt=2V/µs;RGK=1kΩ

UTC UNISONIC TECHNOLOGIES CO., LTD. 2

UTC BT169 SCR

ITSM / A
Ptot / W Tc(max) / C 10
0.8 77
conduction form a=1.57 IT ITSM
0.7 angle factor 83
degrees a 1.9 8
0.6 30 4
89 T
60 2.8 2.2
90 2.2 2.8 time
0.5 120 1.9 95 6 Tj initial=25¢XC max
180 1.57
0.4 101
4
4
0.3 107
0.2 113 2
0.1 119
0 125 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1 10 100 1000
IF(AV) / A
Number of half cycles at 50Hz
FIG.1 Maximum on-state dissipation, P tot , versus average FIG.4 Maximnum permissible non-repetitive peak on-state current
on-state current, I T(AV) , where a=form factor=I T(RMS) / IT(AV) ITSM , versus number of cycles, for sinusoidal currents, f = 50Hz.

IT(RMS) / A
ITSM / A 2.0
1000

1.5
100

IT ITSM 1.0

10
T
time 0.5
Tj initial=25¢XC max
1 0
10µs 100µs 1ms 10ms 0.01 0.1 1.0 10
T/s
surge duration / s
FIG.2 Maximum permissible non-repetitive peak on-state current FIG.5 Maximum permissible repetitive rms on-state current I T(RMS) ,
ITSM ,versus pulse width tp,for sinusoidal currents, t p <=10ms. versus surge duration, for sinusoidal currents, f= 50Hz; Tlead<=83¢XC
IT(RMS) / A VGT(Tj)
1.0
VGT(25¢XC)
83¢XC 1.6
0.8
1.4
0.6 1.2
1.0
0.4
0.8
0.2
0.6
0 0.4
-50 50 0 100 150 -50 0 50 100 150
Tlead / C Tj / C
FIG.3 Maximum permissible rms current I T(RMS) , versus FIG.6 Normalised gate trigger voltage V GT (Tj)/V GT( 25¢XC),
lead temperature, Tlead versus junction temperature Tj

UTC UNISONIC TECHNOLOGIES CO., LTD. 3

UTC BT169 SCR

IGT(Tj) IT / A
VGT(25¢XC) 5
3.0 Tj=125¢XC - - -
Tj= 25¢XC
2.5 4
Vo=1.067V typ max
2.0 Rs=0.187Ω
3
1.5
2
1.0
0.5 1
0
-50 0 50 100 150 0
Tj / C 0 0.5 1.0 1.5 2.0
VT / V
I (Tj)/IGT(25¢XC),
FIG.7 Normalised gate trigger current GT
FIG.10 Typical and maximum on-state characteristic.
versus junction temperature Tj

Zth j-lead (K/W)

IL(Tj) 100
IL(25¢XC)
3.0
2.5 10
2.0
1.5 1

1.0 PD
tp
0.1
0.5
0 t
-50 0 50 100 150 0.01
Tj / C
10us 0.1ms 1ms 10ms 0.1s 1s 10s
tp / s
FIG.8 Normalised latching current L(I Tj)/IL(25¢XC),versus
junction temperature Tj, RGK= 1KΩ FIG.11 Transient thermal impedance Zth j-lead, versus pulse width tp.

IH(Tj)
IH(25¢XC) dVD/dt(V/us)
3.0 1000
2.5
2.0 100
RGK=1KΩ
1.5
1.0 10
0.5
0 1
-50 0 50 100 150 0 0 50 150
Tj / C Tj / C
FIG.9 Normalised holding current HI (Tj)/IH(25¢XC),versus FIG.12 Typical, critical rate of rise of off-state voltage,
junction temperature Tj, RGK=1KΩ dVD/dt versus junction temperature Tj.

UTC UNISONIC TECHNOLOGIES CO., LTD. 4

This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.