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SN54 / 74LS540
VCC
N SUFFIX
20 19 18 17 16 15 14 13 12 11
PLASTIC
CASE 738-03
20
1
DW SUFFIX
1 2 3 4 5 6 7 8 9 10 SOIC
GND 20
CASE 751D-03
SN54 / 74LS541 1
VCC
20 19 18 17 16 15 14 13 12 11
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
1 2 3 4 5 6 7 8 9 10
GND
BLOCK DIAGRAM
LS540 LS541
(1) (1)
E1 E1
(19) (19)
E2 E2 INPUTS OUTPUTS
E1 E2 D LS540 LS541
(2) (18) (2) (18)
D1 Y1 D1 Y1 L L H L H
H X X Z Z
(3) (17) (3) (17) X H X Z Z
D2 Y2 D2 Y2 L L L H L
(4) (16) (4) (16) L = LOW Voltage Level
D3 Y3 D3 Y3 H = HIGH Voltage Level
(5) (15) (5) (15) X = Immaterial
D4 Y4 D4 Y4 Z = High Impedance
(6) (14) (6) (14)
D5 Y5 D5 Y5
(7) (13) (7) (13)
D6 Y6 D6 Y6
(8) (12) (8) (12)
D7 Y7 D7 Y7
(9) (11) (9) (11)
D8 Y8 D8 Y8
VIK Input Clamp Diode Voltage – 0.65 – 1.5 V VCC = MIN, IIN = – 18 mA
54, 74 2.4 3.4 V VCC = MIN, IOH = – 3.0 mA
VOH Output HIGH Voltage
54, 74 2.0 V VCC = MIN, IOH = MAX, VIL = 0.5 V
LS541 32 mA
Output
p Enable Time LS540 20 38
tPZL ns
to LOW Level LS541 20 38
Output
p Disable Time LS540 10 18
tPHZ ns
to HIGH Level LS541 10 18
CL = 5.0
5 0 pF
F
Output
p Disable Time LS540 15 25
tPLZ ns
to LOW Level LS541 15 29
AC WAVEFORMS
VCC
VIN 1.3 V 1.3 V
RL
tPLH tPHL
VE
1.5 V 1.5 V
VE
tPZL tPLZ
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